1c942fddfSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later
2b285192aSMauro Carvalho Chehab /*
3b285192aSMauro Carvalho Chehab  *
4b285192aSMauro Carvalho Chehab  * device driver for philips saa7134 based TV cards
5b285192aSMauro Carvalho Chehab  * video4linux video interface
6b285192aSMauro Carvalho Chehab  *
7b285192aSMauro Carvalho Chehab  * (c) 2001,02 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
8b285192aSMauro Carvalho Chehab  */
9b285192aSMauro Carvalho Chehab 
109a12ccfcSMauro Carvalho Chehab #include "saa7134.h"
119a12ccfcSMauro Carvalho Chehab #include "saa7134-reg.h"
129a12ccfcSMauro Carvalho Chehab 
13b285192aSMauro Carvalho Chehab #include <linux/init.h>
14b285192aSMauro Carvalho Chehab #include <linux/list.h>
15b285192aSMauro Carvalho Chehab #include <linux/module.h>
16b285192aSMauro Carvalho Chehab #include <linux/kernel.h>
17b285192aSMauro Carvalho Chehab #include <linux/delay.h>
18b285192aSMauro Carvalho Chehab 
19b285192aSMauro Carvalho Chehab /* ------------------------------------------------------------------ */
20b285192aSMauro Carvalho Chehab 
21b285192aSMauro Carvalho Chehab static unsigned int ts_debug;
22b285192aSMauro Carvalho Chehab module_param(ts_debug, int, 0644);
23b285192aSMauro Carvalho Chehab MODULE_PARM_DESC(ts_debug,"enable debug messages [ts]");
24b285192aSMauro Carvalho Chehab 
2545f38cb3SMauro Carvalho Chehab #define ts_dbg(fmt, arg...) do { \
2645f38cb3SMauro Carvalho Chehab 	if (ts_debug) \
2745f38cb3SMauro Carvalho Chehab 		printk(KERN_DEBUG pr_fmt("ts: " fmt), ## arg); \
2845f38cb3SMauro Carvalho Chehab 	} while (0)
29b285192aSMauro Carvalho Chehab 
30b285192aSMauro Carvalho Chehab /* ------------------------------------------------------------------ */
buffer_activate(struct saa7134_dev * dev,struct saa7134_buf * buf,struct saa7134_buf * next)31b285192aSMauro Carvalho Chehab static int buffer_activate(struct saa7134_dev *dev,
32b285192aSMauro Carvalho Chehab 			   struct saa7134_buf *buf,
33b285192aSMauro Carvalho Chehab 			   struct saa7134_buf *next)
34b285192aSMauro Carvalho Chehab {
35b285192aSMauro Carvalho Chehab 
36af5d20ceSMauro Carvalho Chehab 	ts_dbg("buffer_activate [%p]", buf);
37b285192aSMauro Carvalho Chehab 	buf->top_seen = 0;
38b285192aSMauro Carvalho Chehab 
392ada815fSHans Verkuil 	if (!dev->ts_started)
402ada815fSHans Verkuil 		dev->ts_field = V4L2_FIELD_TOP;
412ada815fSHans Verkuil 
42b285192aSMauro Carvalho Chehab 	if (NULL == next)
43b285192aSMauro Carvalho Chehab 		next = buf;
442ada815fSHans Verkuil 	if (V4L2_FIELD_TOP == dev->ts_field) {
45af5d20ceSMauro Carvalho Chehab 		ts_dbg("- [top]     buf=%p next=%p\n", buf, next);
46b285192aSMauro Carvalho Chehab 		saa_writel(SAA7134_RS_BA1(5),saa7134_buffer_base(buf));
47b285192aSMauro Carvalho Chehab 		saa_writel(SAA7134_RS_BA2(5),saa7134_buffer_base(next));
482ada815fSHans Verkuil 		dev->ts_field = V4L2_FIELD_BOTTOM;
49b285192aSMauro Carvalho Chehab 	} else {
50af5d20ceSMauro Carvalho Chehab 		ts_dbg("- [bottom]  buf=%p next=%p\n", buf, next);
51b285192aSMauro Carvalho Chehab 		saa_writel(SAA7134_RS_BA1(5),saa7134_buffer_base(next));
52b285192aSMauro Carvalho Chehab 		saa_writel(SAA7134_RS_BA2(5),saa7134_buffer_base(buf));
532ada815fSHans Verkuil 		dev->ts_field = V4L2_FIELD_TOP;
54b285192aSMauro Carvalho Chehab 	}
55b285192aSMauro Carvalho Chehab 
56b285192aSMauro Carvalho Chehab 	/* start DMA */
57b285192aSMauro Carvalho Chehab 	saa7134_set_dmabits(dev);
58b285192aSMauro Carvalho Chehab 
59b285192aSMauro Carvalho Chehab 	mod_timer(&dev->ts_q.timeout, jiffies+TS_BUFFER_TIMEOUT);
60b285192aSMauro Carvalho Chehab 
61b285192aSMauro Carvalho Chehab 	if (!dev->ts_started)
62b285192aSMauro Carvalho Chehab 		saa7134_ts_start(dev);
63b285192aSMauro Carvalho Chehab 
64b285192aSMauro Carvalho Chehab 	return 0;
65b285192aSMauro Carvalho Chehab }
66b285192aSMauro Carvalho Chehab 
saa7134_ts_buffer_init(struct vb2_buffer * vb2)672ada815fSHans Verkuil int saa7134_ts_buffer_init(struct vb2_buffer *vb2)
68b285192aSMauro Carvalho Chehab {
692d700715SJunghak Sung 	struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb2);
702ada815fSHans Verkuil 	struct saa7134_dmaqueue *dmaq = vb2->vb2_queue->drv_priv;
712d700715SJunghak Sung 	struct saa7134_buf *buf = container_of(vbuf, struct saa7134_buf, vb2);
72b285192aSMauro Carvalho Chehab 
732ada815fSHans Verkuil 	dmaq->curr = NULL;
742ada815fSHans Verkuil 	buf->activate = buffer_activate;
752ada815fSHans Verkuil 
762ada815fSHans Verkuil 	return 0;
772ada815fSHans Verkuil }
782ada815fSHans Verkuil EXPORT_SYMBOL_GPL(saa7134_ts_buffer_init);
792ada815fSHans Verkuil 
saa7134_ts_buffer_prepare(struct vb2_buffer * vb2)802ada815fSHans Verkuil int saa7134_ts_buffer_prepare(struct vb2_buffer *vb2)
812ada815fSHans Verkuil {
822d700715SJunghak Sung 	struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb2);
832ada815fSHans Verkuil 	struct saa7134_dmaqueue *dmaq = vb2->vb2_queue->drv_priv;
842ada815fSHans Verkuil 	struct saa7134_dev *dev = dmaq->dev;
852d700715SJunghak Sung 	struct saa7134_buf *buf = container_of(vbuf, struct saa7134_buf, vb2);
862ada815fSHans Verkuil 	struct sg_table *dma = vb2_dma_sg_plane_desc(vb2, 0);
872ada815fSHans Verkuil 	unsigned int lines, llength, size;
882ada815fSHans Verkuil 
89af5d20ceSMauro Carvalho Chehab 	ts_dbg("buffer_prepare [%p]\n", buf);
90b285192aSMauro Carvalho Chehab 
91b285192aSMauro Carvalho Chehab 	llength = TS_PACKET_SIZE;
92b285192aSMauro Carvalho Chehab 	lines = dev->ts.nr_packets;
93b285192aSMauro Carvalho Chehab 
94b285192aSMauro Carvalho Chehab 	size = lines * llength;
952ada815fSHans Verkuil 	if (vb2_plane_size(vb2, 0) < size)
96b285192aSMauro Carvalho Chehab 		return -EINVAL;
97b285192aSMauro Carvalho Chehab 
982ada815fSHans Verkuil 	vb2_set_plane_payload(vb2, 0, size);
992d700715SJunghak Sung 	vbuf->field = dev->field;
100b285192aSMauro Carvalho Chehab 
1012ada815fSHans Verkuil 	return saa7134_pgtable_build(dev->pci, &dmaq->pt, dma->sgl, dma->nents,
102b285192aSMauro Carvalho Chehab 				    saa7134_buffer_startpage(buf));
103b285192aSMauro Carvalho Chehab }
1042ada815fSHans Verkuil EXPORT_SYMBOL_GPL(saa7134_ts_buffer_prepare);
105b285192aSMauro Carvalho Chehab 
saa7134_ts_queue_setup(struct vb2_queue * q,unsigned int * nbuffers,unsigned int * nplanes,unsigned int sizes[],struct device * alloc_devs[])106df9ecb0cSHans Verkuil int saa7134_ts_queue_setup(struct vb2_queue *q,
1072ada815fSHans Verkuil 			   unsigned int *nbuffers, unsigned int *nplanes,
10836c0f8b3SHans Verkuil 			   unsigned int sizes[], struct device *alloc_devs[])
1092ada815fSHans Verkuil {
1102ada815fSHans Verkuil 	struct saa7134_dmaqueue *dmaq = q->drv_priv;
1112ada815fSHans Verkuil 	struct saa7134_dev *dev = dmaq->dev;
1122ada815fSHans Verkuil 	int size = TS_PACKET_SIZE * dev->ts.nr_packets;
1132ada815fSHans Verkuil 
1142ada815fSHans Verkuil 	if (0 == *nbuffers)
1152ada815fSHans Verkuil 		*nbuffers = dev->ts.nr_bufs;
1162ada815fSHans Verkuil 	*nbuffers = saa7134_buffer_count(size, *nbuffers);
1172ada815fSHans Verkuil 	if (*nbuffers < 3)
1182ada815fSHans Verkuil 		*nbuffers = 3;
1192ada815fSHans Verkuil 	*nplanes = 1;
1202ada815fSHans Verkuil 	sizes[0] = size;
121b285192aSMauro Carvalho Chehab 	return 0;
122b285192aSMauro Carvalho Chehab }
1232ada815fSHans Verkuil EXPORT_SYMBOL_GPL(saa7134_ts_queue_setup);
124b285192aSMauro Carvalho Chehab 
saa7134_ts_start_streaming(struct vb2_queue * vq,unsigned int count)1252ada815fSHans Verkuil int saa7134_ts_start_streaming(struct vb2_queue *vq, unsigned int count)
126b285192aSMauro Carvalho Chehab {
1272ada815fSHans Verkuil 	struct saa7134_dmaqueue *dmaq = vq->drv_priv;
128a00e6888SHans Verkuil 	struct saa7134_dev *dev = dmaq->dev;
129b285192aSMauro Carvalho Chehab 
1302ada815fSHans Verkuil 	/*
1312ada815fSHans Verkuil 	 * Planar video capture and TS share the same DMA channel,
1322ada815fSHans Verkuil 	 * so only one can be active at a time.
1332ada815fSHans Verkuil 	 */
1342ada815fSHans Verkuil 	if (vb2_is_busy(&dev->video_vbq) && dev->fmt->planar) {
1352ada815fSHans Verkuil 		struct saa7134_buf *buf, *tmp;
1362ada815fSHans Verkuil 
1372ada815fSHans Verkuil 		list_for_each_entry_safe(buf, tmp, &dmaq->queue, entry) {
1382ada815fSHans Verkuil 			list_del(&buf->entry);
1392d700715SJunghak Sung 			vb2_buffer_done(&buf->vb2.vb2_buf,
1402d700715SJunghak Sung 					VB2_BUF_STATE_QUEUED);
141b285192aSMauro Carvalho Chehab 		}
1422ada815fSHans Verkuil 		if (dmaq->curr) {
1432d700715SJunghak Sung 			vb2_buffer_done(&dmaq->curr->vb2.vb2_buf,
1442d700715SJunghak Sung 					VB2_BUF_STATE_QUEUED);
1452ada815fSHans Verkuil 			dmaq->curr = NULL;
1462ada815fSHans Verkuil 		}
1472ada815fSHans Verkuil 		return -EBUSY;
1482ada815fSHans Verkuil 	}
1492ada815fSHans Verkuil 	dmaq->seq_nr = 0;
1502ada815fSHans Verkuil 	return 0;
1512ada815fSHans Verkuil }
1522ada815fSHans Verkuil EXPORT_SYMBOL_GPL(saa7134_ts_start_streaming);
153b285192aSMauro Carvalho Chehab 
saa7134_ts_stop_streaming(struct vb2_queue * vq)1542ada815fSHans Verkuil void saa7134_ts_stop_streaming(struct vb2_queue *vq)
155b285192aSMauro Carvalho Chehab {
1562ada815fSHans Verkuil 	struct saa7134_dmaqueue *dmaq = vq->drv_priv;
157a00e6888SHans Verkuil 	struct saa7134_dev *dev = dmaq->dev;
158b285192aSMauro Carvalho Chehab 
159b285192aSMauro Carvalho Chehab 	saa7134_ts_stop(dev);
1602ada815fSHans Verkuil 	saa7134_stop_streaming(dev, dmaq);
161b285192aSMauro Carvalho Chehab }
1622ada815fSHans Verkuil EXPORT_SYMBOL_GPL(saa7134_ts_stop_streaming);
163b285192aSMauro Carvalho Chehab 
1642ada815fSHans Verkuil struct vb2_ops saa7134_ts_qops = {
1652ada815fSHans Verkuil 	.queue_setup	= saa7134_ts_queue_setup,
1662ada815fSHans Verkuil 	.buf_init	= saa7134_ts_buffer_init,
1672ada815fSHans Verkuil 	.buf_prepare	= saa7134_ts_buffer_prepare,
1682ada815fSHans Verkuil 	.buf_queue	= saa7134_vb2_buffer_queue,
1692ada815fSHans Verkuil 	.wait_prepare	= vb2_ops_wait_prepare,
1702ada815fSHans Verkuil 	.wait_finish	= vb2_ops_wait_finish,
1712ada815fSHans Verkuil 	.stop_streaming = saa7134_ts_stop_streaming,
172b285192aSMauro Carvalho Chehab };
173b285192aSMauro Carvalho Chehab EXPORT_SYMBOL_GPL(saa7134_ts_qops);
174b285192aSMauro Carvalho Chehab 
175b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
176b285192aSMauro Carvalho Chehab /* exported stuff                                              */
177b285192aSMauro Carvalho Chehab 
178b285192aSMauro Carvalho Chehab static unsigned int tsbufs = 8;
179b285192aSMauro Carvalho Chehab module_param(tsbufs, int, 0444);
180b285192aSMauro Carvalho Chehab MODULE_PARM_DESC(tsbufs, "number of ts buffers for read/write IO, range 2-32");
181b285192aSMauro Carvalho Chehab 
182b285192aSMauro Carvalho Chehab static unsigned int ts_nr_packets = 64;
183b285192aSMauro Carvalho Chehab module_param(ts_nr_packets, int, 0444);
184b285192aSMauro Carvalho Chehab MODULE_PARM_DESC(ts_nr_packets,"size of a ts buffers (in ts packets)");
185b285192aSMauro Carvalho Chehab 
saa7134_ts_init_hw(struct saa7134_dev * dev)186b285192aSMauro Carvalho Chehab int saa7134_ts_init_hw(struct saa7134_dev *dev)
187b285192aSMauro Carvalho Chehab {
188b285192aSMauro Carvalho Chehab 	/* deactivate TS softreset */
189b285192aSMauro Carvalho Chehab 	saa_writeb(SAA7134_TS_SERIAL1, 0x00);
190b285192aSMauro Carvalho Chehab 	/* TSSOP high active, TSVAL high active, TSLOCK ignored */
191b285192aSMauro Carvalho Chehab 	saa_writeb(SAA7134_TS_PARALLEL, 0x6c);
192b285192aSMauro Carvalho Chehab 	saa_writeb(SAA7134_TS_PARALLEL_SERIAL, (TS_PACKET_SIZE-1));
193b285192aSMauro Carvalho Chehab 	saa_writeb(SAA7134_TS_DMA0, ((dev->ts.nr_packets-1)&0xff));
194b285192aSMauro Carvalho Chehab 	saa_writeb(SAA7134_TS_DMA1, (((dev->ts.nr_packets-1)>>8)&0xff));
195b285192aSMauro Carvalho Chehab 	/* TSNOPIT=0, TSCOLAP=0 */
196b285192aSMauro Carvalho Chehab 	saa_writeb(SAA7134_TS_DMA2,
197b285192aSMauro Carvalho Chehab 		((((dev->ts.nr_packets-1)>>16)&0x3f) | 0x00));
198b285192aSMauro Carvalho Chehab 
199b285192aSMauro Carvalho Chehab 	return 0;
200b285192aSMauro Carvalho Chehab }
201b285192aSMauro Carvalho Chehab 
saa7134_ts_init1(struct saa7134_dev * dev)202b285192aSMauro Carvalho Chehab int saa7134_ts_init1(struct saa7134_dev *dev)
203b285192aSMauro Carvalho Chehab {
204b285192aSMauro Carvalho Chehab 	/* sanitycheck insmod options */
205b285192aSMauro Carvalho Chehab 	if (tsbufs < 2)
206b285192aSMauro Carvalho Chehab 		tsbufs = 2;
207b285192aSMauro Carvalho Chehab 	if (tsbufs > VIDEO_MAX_FRAME)
208b285192aSMauro Carvalho Chehab 		tsbufs = VIDEO_MAX_FRAME;
209b285192aSMauro Carvalho Chehab 	if (ts_nr_packets < 4)
210b285192aSMauro Carvalho Chehab 		ts_nr_packets = 4;
211b285192aSMauro Carvalho Chehab 	if (ts_nr_packets > 312)
212b285192aSMauro Carvalho Chehab 		ts_nr_packets = 312;
213b285192aSMauro Carvalho Chehab 	dev->ts.nr_bufs    = tsbufs;
214b285192aSMauro Carvalho Chehab 	dev->ts.nr_packets = ts_nr_packets;
215b285192aSMauro Carvalho Chehab 
216b285192aSMauro Carvalho Chehab 	INIT_LIST_HEAD(&dev->ts_q.queue);
2171e7126b4SKees Cook 	timer_setup(&dev->ts_q.timeout, saa7134_buffer_timeout, 0);
218b285192aSMauro Carvalho Chehab 	dev->ts_q.dev              = dev;
219b285192aSMauro Carvalho Chehab 	dev->ts_q.need_two         = 1;
220b285192aSMauro Carvalho Chehab 	dev->ts_started            = 0;
221a00e6888SHans Verkuil 	saa7134_pgtable_alloc(dev->pci, &dev->ts_q.pt);
222b285192aSMauro Carvalho Chehab 
223b285192aSMauro Carvalho Chehab 	/* init TS hw */
224b285192aSMauro Carvalho Chehab 	saa7134_ts_init_hw(dev);
225b285192aSMauro Carvalho Chehab 
226b285192aSMauro Carvalho Chehab 	return 0;
227b285192aSMauro Carvalho Chehab }
228b285192aSMauro Carvalho Chehab 
229b285192aSMauro Carvalho Chehab /* Function for stop TS */
saa7134_ts_stop(struct saa7134_dev * dev)230b285192aSMauro Carvalho Chehab int saa7134_ts_stop(struct saa7134_dev *dev)
231b285192aSMauro Carvalho Chehab {
232af5d20ceSMauro Carvalho Chehab 	ts_dbg("TS stop\n");
233b285192aSMauro Carvalho Chehab 
2342ada815fSHans Verkuil 	if (!dev->ts_started)
2352ada815fSHans Verkuil 		return 0;
236b285192aSMauro Carvalho Chehab 
237b285192aSMauro Carvalho Chehab 	/* Stop TS stream */
238b285192aSMauro Carvalho Chehab 	switch (saa7134_boards[dev->board].ts_type) {
239b285192aSMauro Carvalho Chehab 	case SAA7134_MPEG_TS_PARALLEL:
240b285192aSMauro Carvalho Chehab 		saa_writeb(SAA7134_TS_PARALLEL, 0x6c);
241b285192aSMauro Carvalho Chehab 		dev->ts_started = 0;
242b285192aSMauro Carvalho Chehab 		break;
243b285192aSMauro Carvalho Chehab 	case SAA7134_MPEG_TS_SERIAL:
244b285192aSMauro Carvalho Chehab 		saa_writeb(SAA7134_TS_SERIAL0, 0x40);
245b285192aSMauro Carvalho Chehab 		dev->ts_started = 0;
246b285192aSMauro Carvalho Chehab 		break;
247b285192aSMauro Carvalho Chehab 	}
248b285192aSMauro Carvalho Chehab 	return 0;
249b285192aSMauro Carvalho Chehab }
250b285192aSMauro Carvalho Chehab 
251b285192aSMauro Carvalho Chehab /* Function for start TS */
saa7134_ts_start(struct saa7134_dev * dev)252b285192aSMauro Carvalho Chehab int saa7134_ts_start(struct saa7134_dev *dev)
253b285192aSMauro Carvalho Chehab {
254af5d20ceSMauro Carvalho Chehab 	ts_dbg("TS start\n");
255b285192aSMauro Carvalho Chehab 
2562ada815fSHans Verkuil 	if (WARN_ON(dev->ts_started))
2572ada815fSHans Verkuil 		return 0;
258b285192aSMauro Carvalho Chehab 
259b285192aSMauro Carvalho Chehab 	/* dma: setup channel 5 (= TS) */
260b285192aSMauro Carvalho Chehab 	saa_writeb(SAA7134_TS_DMA0, (dev->ts.nr_packets - 1) & 0xff);
261b285192aSMauro Carvalho Chehab 	saa_writeb(SAA7134_TS_DMA1,
262b285192aSMauro Carvalho Chehab 		((dev->ts.nr_packets - 1) >> 8) & 0xff);
263b285192aSMauro Carvalho Chehab 	/* TSNOPIT=0, TSCOLAP=0 */
264b285192aSMauro Carvalho Chehab 	saa_writeb(SAA7134_TS_DMA2,
265b285192aSMauro Carvalho Chehab 		(((dev->ts.nr_packets - 1) >> 16) & 0x3f) | 0x00);
266b285192aSMauro Carvalho Chehab 	saa_writel(SAA7134_RS_PITCH(5), TS_PACKET_SIZE);
267b285192aSMauro Carvalho Chehab 	saa_writel(SAA7134_RS_CONTROL(5), SAA7134_RS_CONTROL_BURST_16 |
268b285192aSMauro Carvalho Chehab 					  SAA7134_RS_CONTROL_ME |
269a00e6888SHans Verkuil 					  (dev->ts_q.pt.dma >> 12));
270b285192aSMauro Carvalho Chehab 
271b285192aSMauro Carvalho Chehab 	/* reset hardware TS buffers */
272b285192aSMauro Carvalho Chehab 	saa_writeb(SAA7134_TS_SERIAL1, 0x00);
273b285192aSMauro Carvalho Chehab 	saa_writeb(SAA7134_TS_SERIAL1, 0x03);
274b285192aSMauro Carvalho Chehab 	saa_writeb(SAA7134_TS_SERIAL1, 0x00);
275b285192aSMauro Carvalho Chehab 	saa_writeb(SAA7134_TS_SERIAL1, 0x01);
276b285192aSMauro Carvalho Chehab 
277b285192aSMauro Carvalho Chehab 	/* TS clock non-inverted */
278b285192aSMauro Carvalho Chehab 	saa_writeb(SAA7134_TS_SERIAL1, 0x00);
279b285192aSMauro Carvalho Chehab 
280b285192aSMauro Carvalho Chehab 	/* Start TS stream */
281b285192aSMauro Carvalho Chehab 	switch (saa7134_boards[dev->board].ts_type) {
282b285192aSMauro Carvalho Chehab 	case SAA7134_MPEG_TS_PARALLEL:
283b285192aSMauro Carvalho Chehab 		saa_writeb(SAA7134_TS_SERIAL0, 0x40);
284b285192aSMauro Carvalho Chehab 		saa_writeb(SAA7134_TS_PARALLEL, 0xec |
285b285192aSMauro Carvalho Chehab 			(saa7134_boards[dev->board].ts_force_val << 4));
286b285192aSMauro Carvalho Chehab 		break;
287b285192aSMauro Carvalho Chehab 	case SAA7134_MPEG_TS_SERIAL:
288b285192aSMauro Carvalho Chehab 		saa_writeb(SAA7134_TS_SERIAL0, 0xd8);
289b285192aSMauro Carvalho Chehab 		saa_writeb(SAA7134_TS_PARALLEL, 0x6c |
290b285192aSMauro Carvalho Chehab 			(saa7134_boards[dev->board].ts_force_val << 4));
291b285192aSMauro Carvalho Chehab 		saa_writeb(SAA7134_TS_PARALLEL_SERIAL, 0xbc);
292b285192aSMauro Carvalho Chehab 		saa_writeb(SAA7134_TS_SERIAL1, 0x02);
293b285192aSMauro Carvalho Chehab 		break;
294b285192aSMauro Carvalho Chehab 	}
295b285192aSMauro Carvalho Chehab 
296b285192aSMauro Carvalho Chehab 	dev->ts_started = 1;
297b285192aSMauro Carvalho Chehab 
298b285192aSMauro Carvalho Chehab 	return 0;
299b285192aSMauro Carvalho Chehab }
300b285192aSMauro Carvalho Chehab 
saa7134_ts_fini(struct saa7134_dev * dev)301b285192aSMauro Carvalho Chehab int saa7134_ts_fini(struct saa7134_dev *dev)
302b285192aSMauro Carvalho Chehab {
303*30cf57daSZheng Wang 	del_timer_sync(&dev->ts_q.timeout);
304a00e6888SHans Verkuil 	saa7134_pgtable_free(dev->pci, &dev->ts_q.pt);
305b285192aSMauro Carvalho Chehab 	return 0;
306b285192aSMauro Carvalho Chehab }
307b285192aSMauro Carvalho Chehab 
saa7134_irq_ts_done(struct saa7134_dev * dev,unsigned long status)308b285192aSMauro Carvalho Chehab void saa7134_irq_ts_done(struct saa7134_dev *dev, unsigned long status)
309b285192aSMauro Carvalho Chehab {
310b285192aSMauro Carvalho Chehab 	enum v4l2_field field;
311b285192aSMauro Carvalho Chehab 
312b285192aSMauro Carvalho Chehab 	spin_lock(&dev->slock);
313b285192aSMauro Carvalho Chehab 	if (dev->ts_q.curr) {
3142ada815fSHans Verkuil 		field = dev->ts_field;
3152ada815fSHans Verkuil 		if (field != V4L2_FIELD_TOP) {
316b285192aSMauro Carvalho Chehab 			if ((status & 0x100000) != 0x000000)
317b285192aSMauro Carvalho Chehab 				goto done;
318b285192aSMauro Carvalho Chehab 		} else {
319b285192aSMauro Carvalho Chehab 			if ((status & 0x100000) != 0x100000)
320b285192aSMauro Carvalho Chehab 				goto done;
321b285192aSMauro Carvalho Chehab 		}
3222ada815fSHans Verkuil 		saa7134_buffer_finish(dev, &dev->ts_q, VB2_BUF_STATE_DONE);
323b285192aSMauro Carvalho Chehab 	}
324b285192aSMauro Carvalho Chehab 	saa7134_buffer_next(dev,&dev->ts_q);
325b285192aSMauro Carvalho Chehab 
326b285192aSMauro Carvalho Chehab  done:
327b285192aSMauro Carvalho Chehab 	spin_unlock(&dev->slock);
328b285192aSMauro Carvalho Chehab }
329