1 /* 2 * netup_unidvb_spi.c 3 * 4 * Internal SPI driver for NetUP Universal Dual DVB-CI 5 * 6 * Copyright (C) 2014 NetUP Inc. 7 * Copyright (C) 2014 Sergey Kozlov <serjk@netup.ru> 8 * Copyright (C) 2014 Abylay Ospan <aospan@netup.ru> 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; either version 2 of the License, or 13 * (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 */ 20 21 #include "netup_unidvb.h" 22 #include <linux/spi/spi.h> 23 #include <linux/spi/flash.h> 24 #include <linux/mtd/partitions.h> 25 #include <mtd/mtd-abi.h> 26 27 #define NETUP_SPI_CTRL_IRQ 0x1000 28 #define NETUP_SPI_CTRL_IMASK 0x2000 29 #define NETUP_SPI_CTRL_START 0x8000 30 #define NETUP_SPI_CTRL_LAST_CS 0x4000 31 32 #define NETUP_SPI_TIMEOUT 6000 33 34 enum netup_spi_state { 35 SPI_STATE_START, 36 SPI_STATE_DONE, 37 }; 38 39 struct netup_spi_regs { 40 __u8 data[1024]; 41 __le16 control_stat; 42 __le16 clock_divider; 43 } __packed __aligned(1); 44 45 struct netup_spi { 46 struct device *dev; 47 struct spi_master *master; 48 struct netup_spi_regs *regs; 49 u8 __iomem *mmio; 50 spinlock_t lock; 51 wait_queue_head_t waitq; 52 enum netup_spi_state state; 53 }; 54 55 static char netup_spi_name[64] = "fpga"; 56 57 static struct mtd_partition netup_spi_flash_partitions = { 58 .name = netup_spi_name, 59 .size = 0x1000000, /* 16MB */ 60 .offset = 0, 61 .mask_flags = MTD_CAP_ROM 62 }; 63 64 static struct flash_platform_data spi_flash_data = { 65 .name = "netup0_m25p128", 66 .parts = &netup_spi_flash_partitions, 67 .nr_parts = 1, 68 }; 69 70 static struct spi_board_info netup_spi_board = { 71 .modalias = "m25p128", 72 .max_speed_hz = 11000000, 73 .chip_select = 0, 74 .mode = SPI_MODE_0, 75 .platform_data = &spi_flash_data, 76 }; 77 78 irqreturn_t netup_spi_interrupt(struct netup_spi *spi) 79 { 80 u16 reg; 81 unsigned long flags; 82 83 if (!spi) { 84 dev_dbg(&spi->master->dev, 85 "%s(): SPI not initialized\n", __func__); 86 return IRQ_NONE; 87 } 88 spin_lock_irqsave(&spi->lock, flags); 89 reg = readw(&spi->regs->control_stat); 90 if (!(reg & NETUP_SPI_CTRL_IRQ)) { 91 spin_unlock_irqrestore(&spi->lock, flags); 92 dev_dbg(&spi->master->dev, 93 "%s(): not mine interrupt\n", __func__); 94 return IRQ_NONE; 95 } 96 writew(reg | NETUP_SPI_CTRL_IRQ, &spi->regs->control_stat); 97 reg = readw(&spi->regs->control_stat); 98 writew(reg & ~NETUP_SPI_CTRL_IMASK, &spi->regs->control_stat); 99 spi->state = SPI_STATE_DONE; 100 wake_up(&spi->waitq); 101 spin_unlock_irqrestore(&spi->lock, flags); 102 dev_dbg(&spi->master->dev, 103 "%s(): SPI interrupt handled\n", __func__); 104 return IRQ_HANDLED; 105 } 106 107 static int netup_spi_transfer(struct spi_master *master, 108 struct spi_message *msg) 109 { 110 struct netup_spi *spi = spi_master_get_devdata(master); 111 struct spi_transfer *t; 112 int result = 0; 113 u32 tr_size; 114 115 /* reset CS */ 116 writew(NETUP_SPI_CTRL_LAST_CS, &spi->regs->control_stat); 117 writew(0, &spi->regs->control_stat); 118 list_for_each_entry(t, &msg->transfers, transfer_list) { 119 tr_size = t->len; 120 while (tr_size) { 121 u32 frag_offset = t->len - tr_size; 122 u32 frag_size = (tr_size > sizeof(spi->regs->data)) ? 123 sizeof(spi->regs->data) : tr_size; 124 int frag_last = 0; 125 126 if (list_is_last(&t->transfer_list, 127 &msg->transfers) && 128 frag_offset + frag_size == t->len) { 129 frag_last = 1; 130 } 131 if (t->tx_buf) { 132 memcpy_toio(spi->regs->data, 133 t->tx_buf + frag_offset, 134 frag_size); 135 } else { 136 memset_io(spi->regs->data, 137 0, frag_size); 138 } 139 spi->state = SPI_STATE_START; 140 writew((frag_size & 0x3ff) | 141 NETUP_SPI_CTRL_IMASK | 142 NETUP_SPI_CTRL_START | 143 (frag_last ? NETUP_SPI_CTRL_LAST_CS : 0), 144 &spi->regs->control_stat); 145 dev_dbg(&spi->master->dev, 146 "%s(): control_stat 0x%04x\n", 147 __func__, readw(&spi->regs->control_stat)); 148 wait_event_timeout(spi->waitq, 149 spi->state != SPI_STATE_START, 150 msecs_to_jiffies(NETUP_SPI_TIMEOUT)); 151 if (spi->state == SPI_STATE_DONE) { 152 if (t->rx_buf) { 153 memcpy_fromio(t->rx_buf + frag_offset, 154 spi->regs->data, frag_size); 155 } 156 } else { 157 if (spi->state == SPI_STATE_START) { 158 dev_dbg(&spi->master->dev, 159 "%s(): transfer timeout\n", 160 __func__); 161 } else { 162 dev_dbg(&spi->master->dev, 163 "%s(): invalid state %d\n", 164 __func__, spi->state); 165 } 166 result = -EIO; 167 goto done; 168 } 169 tr_size -= frag_size; 170 msg->actual_length += frag_size; 171 } 172 } 173 done: 174 msg->status = result; 175 spi_finalize_current_message(master); 176 return result; 177 } 178 179 static int netup_spi_setup(struct spi_device *spi) 180 { 181 return 0; 182 } 183 184 int netup_spi_init(struct netup_unidvb_dev *ndev) 185 { 186 struct spi_master *master; 187 struct netup_spi *nspi; 188 189 master = spi_alloc_master(&ndev->pci_dev->dev, 190 sizeof(struct netup_spi)); 191 if (!master) { 192 dev_err(&ndev->pci_dev->dev, 193 "%s(): unable to alloc SPI master\n", __func__); 194 return -EINVAL; 195 } 196 nspi = spi_master_get_devdata(master); 197 master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST; 198 master->bus_num = -1; 199 master->num_chipselect = 1; 200 master->transfer_one_message = netup_spi_transfer; 201 master->setup = netup_spi_setup; 202 spin_lock_init(&nspi->lock); 203 init_waitqueue_head(&nspi->waitq); 204 nspi->master = master; 205 nspi->regs = (struct netup_spi_regs *)(ndev->bmmio0 + 0x4000); 206 writew(2, &nspi->regs->clock_divider); 207 writew(NETUP_UNIDVB_IRQ_SPI, ndev->bmmio0 + REG_IMASK_SET); 208 ndev->spi = nspi; 209 if (spi_register_master(master)) { 210 ndev->spi = NULL; 211 dev_err(&ndev->pci_dev->dev, 212 "%s(): unable to register SPI bus\n", __func__); 213 return -EINVAL; 214 } 215 snprintf(netup_spi_name, 216 sizeof(netup_spi_name), 217 "fpga_%02x:%02x.%01x", 218 ndev->pci_bus, 219 ndev->pci_slot, 220 ndev->pci_func); 221 if (!spi_new_device(master, &netup_spi_board)) { 222 ndev->spi = NULL; 223 dev_err(&ndev->pci_dev->dev, 224 "%s(): unable to create SPI device\n", __func__); 225 return -EINVAL; 226 } 227 dev_dbg(&ndev->pci_dev->dev, "%s(): SPI init OK\n", __func__); 228 return 0; 229 } 230 231 void netup_spi_release(struct netup_unidvb_dev *ndev) 232 { 233 u16 reg; 234 unsigned long flags; 235 struct netup_spi *spi = ndev->spi; 236 237 if (!spi) { 238 dev_dbg(&spi->master->dev, 239 "%s(): SPI not initialized\n", __func__); 240 return; 241 } 242 spin_lock_irqsave(&spi->lock, flags); 243 reg = readw(&spi->regs->control_stat); 244 writew(reg | NETUP_SPI_CTRL_IRQ, &spi->regs->control_stat); 245 reg = readw(&spi->regs->control_stat); 246 writew(reg & ~NETUP_SPI_CTRL_IMASK, &spi->regs->control_stat); 247 spin_unlock_irqrestore(&spi->lock, flags); 248 spi_unregister_master(spi->master); 249 ndev->spi = NULL; 250 } 251 252 253