xref: /openbmc/linux/drivers/media/pci/dm1105/dm1105.c (revision f1575595)
1 /*
2  * dm1105.c - driver for DVB cards based on SDMC DM1105 PCI chip
3  *
4  * Copyright (C) 2008 Igor M. Liplianin <liplianin@me.by>
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  */
17 
18 #include <linux/i2c.h>
19 #include <linux/i2c-algo-bit.h>
20 #include <linux/init.h>
21 #include <linux/interrupt.h>
22 #include <linux/kernel.h>
23 #include <linux/module.h>
24 #include <linux/proc_fs.h>
25 #include <linux/pci.h>
26 #include <linux/dma-mapping.h>
27 #include <linux/slab.h>
28 #include <media/rc-core.h>
29 
30 #include <media/demux.h>
31 #include <media/dmxdev.h>
32 #include <media/dvb_demux.h>
33 #include <media/dvb_frontend.h>
34 #include <media/dvb_net.h>
35 #include <media/dvbdev.h>
36 #include "dvb-pll.h"
37 
38 #include "stv0299.h"
39 #include "stv0288.h"
40 #include "stb6000.h"
41 #include "si21xx.h"
42 #include "cx24116.h"
43 #include "z0194a.h"
44 #include "ts2020.h"
45 #include "ds3000.h"
46 
47 #define MODULE_NAME "dm1105"
48 
49 #define UNSET (-1U)
50 
51 #define DM1105_BOARD_NOAUTO			UNSET
52 #define DM1105_BOARD_UNKNOWN			0
53 #define DM1105_BOARD_DVBWORLD_2002		1
54 #define DM1105_BOARD_DVBWORLD_2004		2
55 #define DM1105_BOARD_AXESS_DM05			3
56 #define DM1105_BOARD_UNBRANDED_I2C_ON_GPIO	4
57 
58 /* ----------------------------------------------- */
59 /*
60  * PCI ID's
61  */
62 #ifndef PCI_VENDOR_ID_TRIGEM
63 #define PCI_VENDOR_ID_TRIGEM	0x109f
64 #endif
65 #ifndef PCI_VENDOR_ID_AXESS
66 #define PCI_VENDOR_ID_AXESS	0x195d
67 #endif
68 #ifndef PCI_DEVICE_ID_DM1105
69 #define PCI_DEVICE_ID_DM1105	0x036f
70 #endif
71 #ifndef PCI_DEVICE_ID_DW2002
72 #define PCI_DEVICE_ID_DW2002	0x2002
73 #endif
74 #ifndef PCI_DEVICE_ID_DW2004
75 #define PCI_DEVICE_ID_DW2004	0x2004
76 #endif
77 #ifndef PCI_DEVICE_ID_DM05
78 #define PCI_DEVICE_ID_DM05	0x1105
79 #endif
80 /* ----------------------------------------------- */
81 /* sdmc dm1105 registers */
82 
83 /* TS Control */
84 #define DM1105_TSCTR				0x00
85 #define DM1105_DTALENTH				0x04
86 
87 /* GPIO Interface */
88 #define DM1105_GPIOVAL				0x08
89 #define DM1105_GPIOCTR				0x0c
90 
91 /* PID serial number */
92 #define DM1105_PIDN				0x10
93 
94 /* Odd-even secret key select */
95 #define DM1105_CWSEL				0x14
96 
97 /* Host Command Interface */
98 #define DM1105_HOST_CTR				0x18
99 #define DM1105_HOST_AD				0x1c
100 
101 /* PCI Interface */
102 #define DM1105_CR				0x30
103 #define DM1105_RST				0x34
104 #define DM1105_STADR				0x38
105 #define DM1105_RLEN				0x3c
106 #define DM1105_WRP				0x40
107 #define DM1105_INTCNT				0x44
108 #define DM1105_INTMAK				0x48
109 #define DM1105_INTSTS				0x4c
110 
111 /* CW Value */
112 #define DM1105_ODD				0x50
113 #define DM1105_EVEN				0x58
114 
115 /* PID Value */
116 #define DM1105_PID				0x60
117 
118 /* IR Control */
119 #define DM1105_IRCTR				0x64
120 #define DM1105_IRMODE				0x68
121 #define DM1105_SYSTEMCODE			0x6c
122 #define DM1105_IRCODE				0x70
123 
124 /* Unknown Values */
125 #define DM1105_ENCRYPT				0x74
126 #define DM1105_VER				0x7c
127 
128 /* I2C Interface */
129 #define DM1105_I2CCTR				0x80
130 #define DM1105_I2CSTS				0x81
131 #define DM1105_I2CDAT				0x82
132 #define DM1105_I2C_RA				0x83
133 /* ----------------------------------------------- */
134 /* Interrupt Mask Bits */
135 
136 #define INTMAK_TSIRQM				0x01
137 #define INTMAK_HIRQM				0x04
138 #define INTMAK_IRM				0x08
139 #define INTMAK_ALLMASK				(INTMAK_TSIRQM | \
140 						INTMAK_HIRQM | \
141 						INTMAK_IRM)
142 #define INTMAK_NONEMASK				0x00
143 
144 /* Interrupt Status Bits */
145 #define INTSTS_TSIRQ				0x01
146 #define INTSTS_HIRQ				0x04
147 #define INTSTS_IR				0x08
148 
149 /* IR Control Bits */
150 #define DM1105_IR_EN				0x01
151 #define DM1105_SYS_CHK				0x02
152 #define DM1105_REP_FLG				0x08
153 
154 /* EEPROM addr */
155 #define IIC_24C01_addr				0xa0
156 /* Max board count */
157 #define DM1105_MAX				0x04
158 
159 #define DRIVER_NAME				"dm1105"
160 #define DM1105_I2C_GPIO_NAME			"dm1105-gpio"
161 
162 #define DM1105_DMA_PACKETS			47
163 #define DM1105_DMA_PACKET_LENGTH		(128*4)
164 #define DM1105_DMA_BYTES			(128 * 4 * DM1105_DMA_PACKETS)
165 
166 /*  */
167 #define GPIO08					(1 << 8)
168 #define GPIO13					(1 << 13)
169 #define GPIO14					(1 << 14)
170 #define GPIO15					(1 << 15)
171 #define GPIO16					(1 << 16)
172 #define GPIO17					(1 << 17)
173 #define GPIO_ALL				0x03ffff
174 
175 /* GPIO's for LNB power control */
176 #define DM1105_LNB_MASK				(GPIO_ALL & ~(GPIO14 | GPIO13))
177 #define DM1105_LNB_OFF				GPIO17
178 #define DM1105_LNB_13V				(GPIO16 | GPIO08)
179 #define DM1105_LNB_18V				GPIO08
180 
181 /* GPIO's for LNB power control for Axess DM05 */
182 #define DM05_LNB_MASK				(GPIO_ALL & ~(GPIO14 | GPIO13))
183 #define DM05_LNB_OFF				GPIO17/* actually 13v */
184 #define DM05_LNB_13V				GPIO17
185 #define DM05_LNB_18V				(GPIO17 | GPIO16)
186 
187 /* GPIO's for LNB power control for unbranded with I2C on GPIO */
188 #define UNBR_LNB_MASK				(GPIO17 | GPIO16)
189 #define UNBR_LNB_OFF				0
190 #define UNBR_LNB_13V				GPIO17
191 #define UNBR_LNB_18V				(GPIO17 | GPIO16)
192 
193 static unsigned int card[]  = {[0 ... 3] = UNSET };
194 module_param_array(card,  int, NULL, 0444);
195 MODULE_PARM_DESC(card, "card type");
196 
197 static int ir_debug;
198 module_param(ir_debug, int, 0644);
199 MODULE_PARM_DESC(ir_debug, "enable debugging information for IR decoding");
200 
201 static unsigned int dm1105_devcount;
202 
203 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
204 
205 struct dm1105_board {
206 	char	*name;
207 	struct	{
208 		u32	mask, off, v13, v18;
209 	} lnb;
210 	u32	gpio_scl, gpio_sda;
211 };
212 
213 struct dm1105_subid {
214 	u16     subvendor;
215 	u16     subdevice;
216 	u32     card;
217 };
218 
219 static const struct dm1105_board dm1105_boards[] = {
220 	[DM1105_BOARD_UNKNOWN] = {
221 		.name		= "UNKNOWN/GENERIC",
222 		.lnb = {
223 			.mask = DM1105_LNB_MASK,
224 			.off = DM1105_LNB_OFF,
225 			.v13 = DM1105_LNB_13V,
226 			.v18 = DM1105_LNB_18V,
227 		},
228 	},
229 	[DM1105_BOARD_DVBWORLD_2002] = {
230 		.name		= "DVBWorld PCI 2002",
231 		.lnb = {
232 			.mask = DM1105_LNB_MASK,
233 			.off = DM1105_LNB_OFF,
234 			.v13 = DM1105_LNB_13V,
235 			.v18 = DM1105_LNB_18V,
236 		},
237 	},
238 	[DM1105_BOARD_DVBWORLD_2004] = {
239 		.name		= "DVBWorld PCI 2004",
240 		.lnb = {
241 			.mask = DM1105_LNB_MASK,
242 			.off = DM1105_LNB_OFF,
243 			.v13 = DM1105_LNB_13V,
244 			.v18 = DM1105_LNB_18V,
245 		},
246 	},
247 	[DM1105_BOARD_AXESS_DM05] = {
248 		.name		= "Axess/EasyTv DM05",
249 		.lnb = {
250 			.mask = DM05_LNB_MASK,
251 			.off = DM05_LNB_OFF,
252 			.v13 = DM05_LNB_13V,
253 			.v18 = DM05_LNB_18V,
254 		},
255 	},
256 	[DM1105_BOARD_UNBRANDED_I2C_ON_GPIO] = {
257 		.name		= "Unbranded DM1105 with i2c on GPIOs",
258 		.lnb = {
259 			.mask = UNBR_LNB_MASK,
260 			.off = UNBR_LNB_OFF,
261 			.v13 = UNBR_LNB_13V,
262 			.v18 = UNBR_LNB_18V,
263 		},
264 		.gpio_scl	= GPIO14,
265 		.gpio_sda	= GPIO13,
266 	},
267 };
268 
269 static const struct dm1105_subid dm1105_subids[] = {
270 	{
271 		.subvendor = 0x0000,
272 		.subdevice = 0x2002,
273 		.card      = DM1105_BOARD_DVBWORLD_2002,
274 	}, {
275 		.subvendor = 0x0001,
276 		.subdevice = 0x2002,
277 		.card      = DM1105_BOARD_DVBWORLD_2002,
278 	}, {
279 		.subvendor = 0x0000,
280 		.subdevice = 0x2004,
281 		.card      = DM1105_BOARD_DVBWORLD_2004,
282 	}, {
283 		.subvendor = 0x0001,
284 		.subdevice = 0x2004,
285 		.card      = DM1105_BOARD_DVBWORLD_2004,
286 	}, {
287 		.subvendor = 0x195d,
288 		.subdevice = 0x1105,
289 		.card      = DM1105_BOARD_AXESS_DM05,
290 	},
291 };
292 
293 static void dm1105_card_list(struct pci_dev *pci)
294 {
295 	int i;
296 
297 	if (0 == pci->subsystem_vendor &&
298 			0 == pci->subsystem_device) {
299 		printk(KERN_ERR
300 			"dm1105: Your board has no valid PCI Subsystem ID\n"
301 			"dm1105: and thus can't be autodetected\n"
302 			"dm1105: Please pass card=<n> insmod option to\n"
303 			"dm1105: workaround that.  Redirect complaints to\n"
304 			"dm1105: the vendor of the TV card.  Best regards,\n"
305 			"dm1105: -- tux\n");
306 	} else {
307 		printk(KERN_ERR
308 			"dm1105: Your board isn't known (yet) to the driver.\n"
309 			"dm1105: You can try to pick one of the existing\n"
310 			"dm1105: card configs via card=<n> insmod option.\n"
311 			"dm1105: Updating to the latest version might help\n"
312 			"dm1105: as well.\n");
313 	}
314 	printk(KERN_ERR "Here is a list of valid choices for the card=<n> insmod option:\n");
315 	for (i = 0; i < ARRAY_SIZE(dm1105_boards); i++)
316 		printk(KERN_ERR "dm1105:    card=%d -> %s\n",
317 				i, dm1105_boards[i].name);
318 }
319 
320 /* infrared remote control */
321 struct infrared {
322 	struct rc_dev		*dev;
323 	char			input_phys[32];
324 	struct work_struct	work;
325 	u32			ir_command;
326 };
327 
328 struct dm1105_dev {
329 	/* pci */
330 	struct pci_dev *pdev;
331 	u8 __iomem *io_mem;
332 
333 	/* ir */
334 	struct infrared ir;
335 
336 	/* dvb */
337 	struct dmx_frontend hw_frontend;
338 	struct dmx_frontend mem_frontend;
339 	struct dmxdev dmxdev;
340 	struct dvb_adapter dvb_adapter;
341 	struct dvb_demux demux;
342 	struct dvb_frontend *fe;
343 	struct dvb_net dvbnet;
344 	unsigned int full_ts_users;
345 	unsigned int boardnr;
346 	int nr;
347 
348 	/* i2c */
349 	struct i2c_adapter i2c_adap;
350 	struct i2c_adapter i2c_bb_adap;
351 	struct i2c_algo_bit_data i2c_bit;
352 
353 	/* irq */
354 	struct work_struct work;
355 	struct workqueue_struct *wq;
356 	char wqn[16];
357 
358 	/* dma */
359 	dma_addr_t dma_addr;
360 	unsigned char *ts_buf;
361 	u32 wrp;
362 	u32 nextwrp;
363 	u32 buffer_size;
364 	unsigned int	PacketErrorCount;
365 	unsigned int dmarst;
366 	spinlock_t lock;
367 };
368 
369 #define dm_io_mem(reg)	((unsigned long)(&dev->io_mem[reg]))
370 
371 #define dm_readb(reg)		inb(dm_io_mem(reg))
372 #define dm_writeb(reg, value)	outb((value), (dm_io_mem(reg)))
373 
374 #define dm_readw(reg)		inw(dm_io_mem(reg))
375 #define dm_writew(reg, value)	outw((value), (dm_io_mem(reg)))
376 
377 #define dm_readl(reg)		inl(dm_io_mem(reg))
378 #define dm_writel(reg, value)	outl((value), (dm_io_mem(reg)))
379 
380 #define dm_andorl(reg, mask, value) \
381 	outl((inl(dm_io_mem(reg)) & ~(mask)) |\
382 		((value) & (mask)), (dm_io_mem(reg)))
383 
384 #define dm_setl(reg, bit)	dm_andorl((reg), (bit), (bit))
385 #define dm_clearl(reg, bit)	dm_andorl((reg), (bit), 0)
386 
387 /* The chip has 18 GPIOs. In HOST mode GPIO's used as 15 bit address lines,
388  so we can use only 3 GPIO's from GPIO15 to GPIO17.
389  Here I don't check whether HOST is enebled as it is not implemented yet.
390  */
391 static void dm1105_gpio_set(struct dm1105_dev *dev, u32 mask)
392 {
393 	if (mask & 0xfffc0000)
394 		printk(KERN_ERR "%s: Only 18 GPIO's are allowed\n", __func__);
395 
396 	if (mask & 0x0003ffff)
397 		dm_setl(DM1105_GPIOVAL, mask & 0x0003ffff);
398 
399 }
400 
401 static void dm1105_gpio_clear(struct dm1105_dev *dev, u32 mask)
402 {
403 	if (mask & 0xfffc0000)
404 		printk(KERN_ERR "%s: Only 18 GPIO's are allowed\n", __func__);
405 
406 	if (mask & 0x0003ffff)
407 		dm_clearl(DM1105_GPIOVAL, mask & 0x0003ffff);
408 
409 }
410 
411 static void dm1105_gpio_andor(struct dm1105_dev *dev, u32 mask, u32 val)
412 {
413 	if (mask & 0xfffc0000)
414 		printk(KERN_ERR "%s: Only 18 GPIO's are allowed\n", __func__);
415 
416 	if (mask & 0x0003ffff)
417 		dm_andorl(DM1105_GPIOVAL, mask & 0x0003ffff, val);
418 
419 }
420 
421 static u32 dm1105_gpio_get(struct dm1105_dev *dev, u32 mask)
422 {
423 	if (mask & 0xfffc0000)
424 		printk(KERN_ERR "%s: Only 18 GPIO's are allowed\n", __func__);
425 
426 	if (mask & 0x0003ffff)
427 		return dm_readl(DM1105_GPIOVAL) & mask & 0x0003ffff;
428 
429 	return 0;
430 }
431 
432 static void dm1105_gpio_enable(struct dm1105_dev *dev, u32 mask, int asoutput)
433 {
434 	if (mask & 0xfffc0000)
435 		printk(KERN_ERR "%s: Only 18 GPIO's are allowed\n", __func__);
436 
437 	if ((mask & 0x0003ffff) && asoutput)
438 		dm_clearl(DM1105_GPIOCTR, mask & 0x0003ffff);
439 	else if ((mask & 0x0003ffff) && !asoutput)
440 		dm_setl(DM1105_GPIOCTR, mask & 0x0003ffff);
441 
442 }
443 
444 static void dm1105_setline(struct dm1105_dev *dev, u32 line, int state)
445 {
446 	if (state)
447 		dm1105_gpio_enable(dev, line, 0);
448 	else {
449 		dm1105_gpio_enable(dev, line, 1);
450 		dm1105_gpio_clear(dev, line);
451 	}
452 }
453 
454 static void dm1105_setsda(void *data, int state)
455 {
456 	struct dm1105_dev *dev = data;
457 
458 	dm1105_setline(dev, dm1105_boards[dev->boardnr].gpio_sda, state);
459 }
460 
461 static void dm1105_setscl(void *data, int state)
462 {
463 	struct dm1105_dev *dev = data;
464 
465 	dm1105_setline(dev, dm1105_boards[dev->boardnr].gpio_scl, state);
466 }
467 
468 static int dm1105_getsda(void *data)
469 {
470 	struct dm1105_dev *dev = data;
471 
472 	return dm1105_gpio_get(dev, dm1105_boards[dev->boardnr].gpio_sda)
473 									? 1 : 0;
474 }
475 
476 static int dm1105_getscl(void *data)
477 {
478 	struct dm1105_dev *dev = data;
479 
480 	return dm1105_gpio_get(dev, dm1105_boards[dev->boardnr].gpio_scl)
481 									? 1 : 0;
482 }
483 
484 static int dm1105_i2c_xfer(struct i2c_adapter *i2c_adap,
485 			    struct i2c_msg *msgs, int num)
486 {
487 	struct dm1105_dev *dev ;
488 
489 	int addr, rc, i, j, k, len, byte, data;
490 	u8 status;
491 
492 	dev = i2c_adap->algo_data;
493 	for (i = 0; i < num; i++) {
494 		dm_writeb(DM1105_I2CCTR, 0x00);
495 		if (msgs[i].flags & I2C_M_RD) {
496 			/* read bytes */
497 			addr  = msgs[i].addr << 1;
498 			addr |= 1;
499 			dm_writeb(DM1105_I2CDAT, addr);
500 			for (byte = 0; byte < msgs[i].len; byte++)
501 				dm_writeb(DM1105_I2CDAT + byte + 1, 0);
502 
503 			dm_writeb(DM1105_I2CCTR, 0x81 + msgs[i].len);
504 			for (j = 0; j < 55; j++) {
505 				mdelay(10);
506 				status = dm_readb(DM1105_I2CSTS);
507 				if ((status & 0xc0) == 0x40)
508 					break;
509 			}
510 			if (j >= 55)
511 				return -1;
512 
513 			for (byte = 0; byte < msgs[i].len; byte++) {
514 				rc = dm_readb(DM1105_I2CDAT + byte + 1);
515 				if (rc < 0)
516 					goto err;
517 				msgs[i].buf[byte] = rc;
518 			}
519 		} else if ((msgs[i].buf[0] == 0xf7) && (msgs[i].addr == 0x55)) {
520 			/* prepaired for cx24116 firmware */
521 			/* Write in small blocks */
522 			len = msgs[i].len - 1;
523 			k = 1;
524 			do {
525 				dm_writeb(DM1105_I2CDAT, msgs[i].addr << 1);
526 				dm_writeb(DM1105_I2CDAT + 1, 0xf7);
527 				for (byte = 0; byte < (len > 48 ? 48 : len); byte++) {
528 					data = msgs[i].buf[k + byte];
529 					dm_writeb(DM1105_I2CDAT + byte + 2, data);
530 				}
531 				dm_writeb(DM1105_I2CCTR, 0x82 + (len > 48 ? 48 : len));
532 				for (j = 0; j < 25; j++) {
533 					mdelay(10);
534 					status = dm_readb(DM1105_I2CSTS);
535 					if ((status & 0xc0) == 0x40)
536 						break;
537 				}
538 
539 				if (j >= 25)
540 					return -1;
541 
542 				k += 48;
543 				len -= 48;
544 			} while (len > 0);
545 		} else {
546 			/* write bytes */
547 			dm_writeb(DM1105_I2CDAT, msgs[i].addr << 1);
548 			for (byte = 0; byte < msgs[i].len; byte++) {
549 				data = msgs[i].buf[byte];
550 				dm_writeb(DM1105_I2CDAT + byte + 1, data);
551 			}
552 			dm_writeb(DM1105_I2CCTR, 0x81 + msgs[i].len);
553 			for (j = 0; j < 25; j++) {
554 				mdelay(10);
555 				status = dm_readb(DM1105_I2CSTS);
556 				if ((status & 0xc0) == 0x40)
557 					break;
558 			}
559 
560 			if (j >= 25)
561 				return -1;
562 		}
563 	}
564 	return num;
565  err:
566 	return rc;
567 }
568 
569 static u32 functionality(struct i2c_adapter *adap)
570 {
571 	return I2C_FUNC_I2C;
572 }
573 
574 static const struct i2c_algorithm dm1105_algo = {
575 	.master_xfer   = dm1105_i2c_xfer,
576 	.functionality = functionality,
577 };
578 
579 static inline struct dm1105_dev *feed_to_dm1105_dev(struct dvb_demux_feed *feed)
580 {
581 	return container_of(feed->demux, struct dm1105_dev, demux);
582 }
583 
584 static inline struct dm1105_dev *frontend_to_dm1105_dev(struct dvb_frontend *fe)
585 {
586 	return container_of(fe->dvb, struct dm1105_dev, dvb_adapter);
587 }
588 
589 static int dm1105_set_voltage(struct dvb_frontend *fe,
590 			      enum fe_sec_voltage voltage)
591 {
592 	struct dm1105_dev *dev = frontend_to_dm1105_dev(fe);
593 
594 	dm1105_gpio_enable(dev, dm1105_boards[dev->boardnr].lnb.mask, 1);
595 	if (voltage == SEC_VOLTAGE_18)
596 		dm1105_gpio_andor(dev,
597 				dm1105_boards[dev->boardnr].lnb.mask,
598 				dm1105_boards[dev->boardnr].lnb.v18);
599 	else if (voltage == SEC_VOLTAGE_13)
600 		dm1105_gpio_andor(dev,
601 				dm1105_boards[dev->boardnr].lnb.mask,
602 				dm1105_boards[dev->boardnr].lnb.v13);
603 	else
604 		dm1105_gpio_andor(dev,
605 				dm1105_boards[dev->boardnr].lnb.mask,
606 				dm1105_boards[dev->boardnr].lnb.off);
607 
608 	return 0;
609 }
610 
611 static void dm1105_set_dma_addr(struct dm1105_dev *dev)
612 {
613 	dm_writel(DM1105_STADR, (__force u32)cpu_to_le32(dev->dma_addr));
614 }
615 
616 static int dm1105_dma_map(struct dm1105_dev *dev)
617 {
618 	dev->ts_buf = pci_alloc_consistent(dev->pdev,
619 					6 * DM1105_DMA_BYTES,
620 					&dev->dma_addr);
621 
622 	return !dev->ts_buf;
623 }
624 
625 static void dm1105_dma_unmap(struct dm1105_dev *dev)
626 {
627 	pci_free_consistent(dev->pdev,
628 			6 * DM1105_DMA_BYTES,
629 			dev->ts_buf,
630 			dev->dma_addr);
631 }
632 
633 static void dm1105_enable_irqs(struct dm1105_dev *dev)
634 {
635 	dm_writeb(DM1105_INTMAK, INTMAK_ALLMASK);
636 	dm_writeb(DM1105_CR, 1);
637 }
638 
639 static void dm1105_disable_irqs(struct dm1105_dev *dev)
640 {
641 	dm_writeb(DM1105_INTMAK, INTMAK_IRM);
642 	dm_writeb(DM1105_CR, 0);
643 }
644 
645 static int dm1105_start_feed(struct dvb_demux_feed *f)
646 {
647 	struct dm1105_dev *dev = feed_to_dm1105_dev(f);
648 
649 	if (dev->full_ts_users++ == 0)
650 		dm1105_enable_irqs(dev);
651 
652 	return 0;
653 }
654 
655 static int dm1105_stop_feed(struct dvb_demux_feed *f)
656 {
657 	struct dm1105_dev *dev = feed_to_dm1105_dev(f);
658 
659 	if (--dev->full_ts_users == 0)
660 		dm1105_disable_irqs(dev);
661 
662 	return 0;
663 }
664 
665 /* ir work handler */
666 static void dm1105_emit_key(struct work_struct *work)
667 {
668 	struct infrared *ir = container_of(work, struct infrared, work);
669 	u32 ircom = ir->ir_command;
670 	u8 data;
671 
672 	if (ir_debug)
673 		printk(KERN_INFO "%s: received byte 0x%04x\n", __func__, ircom);
674 
675 	data = (ircom >> 8) & 0x7f;
676 
677 	/* FIXME: UNKNOWN because we don't generate a full NEC scancode (yet?) */
678 	rc_keydown(ir->dev, RC_PROTO_UNKNOWN, data, 0);
679 }
680 
681 /* work handler */
682 static void dm1105_dmx_buffer(struct work_struct *work)
683 {
684 	struct dm1105_dev *dev = container_of(work, struct dm1105_dev, work);
685 	unsigned int nbpackets;
686 	u32 oldwrp = dev->wrp;
687 	u32 nextwrp = dev->nextwrp;
688 
689 	if (!((dev->ts_buf[oldwrp] == 0x47) &&
690 			(dev->ts_buf[oldwrp + 188] == 0x47) &&
691 			(dev->ts_buf[oldwrp + 188 * 2] == 0x47))) {
692 		dev->PacketErrorCount++;
693 		/* bad packet found */
694 		if ((dev->PacketErrorCount >= 2) &&
695 				(dev->dmarst == 0)) {
696 			dm_writeb(DM1105_RST, 1);
697 			dev->wrp = 0;
698 			dev->PacketErrorCount = 0;
699 			dev->dmarst = 0;
700 			return;
701 		}
702 	}
703 
704 	if (nextwrp < oldwrp) {
705 		memcpy(dev->ts_buf + dev->buffer_size, dev->ts_buf, nextwrp);
706 		nbpackets = ((dev->buffer_size - oldwrp) + nextwrp) / 188;
707 	} else
708 		nbpackets = (nextwrp - oldwrp) / 188;
709 
710 	dev->wrp = nextwrp;
711 	dvb_dmx_swfilter_packets(&dev->demux, &dev->ts_buf[oldwrp], nbpackets);
712 }
713 
714 static irqreturn_t dm1105_irq(int irq, void *dev_id)
715 {
716 	struct dm1105_dev *dev = dev_id;
717 
718 	/* Read-Write INSTS Ack's Interrupt for DM1105 chip 16.03.2008 */
719 	unsigned int intsts = dm_readb(DM1105_INTSTS);
720 	dm_writeb(DM1105_INTSTS, intsts);
721 
722 	switch (intsts) {
723 	case INTSTS_TSIRQ:
724 	case (INTSTS_TSIRQ | INTSTS_IR):
725 		dev->nextwrp = dm_readl(DM1105_WRP) - dm_readl(DM1105_STADR);
726 		queue_work(dev->wq, &dev->work);
727 		break;
728 	case INTSTS_IR:
729 		dev->ir.ir_command = dm_readl(DM1105_IRCODE);
730 		schedule_work(&dev->ir.work);
731 		break;
732 	}
733 
734 	return IRQ_HANDLED;
735 }
736 
737 static int dm1105_ir_init(struct dm1105_dev *dm1105)
738 {
739 	struct rc_dev *dev;
740 	int err = -ENOMEM;
741 
742 	dev = rc_allocate_device(RC_DRIVER_SCANCODE);
743 	if (!dev)
744 		return -ENOMEM;
745 
746 	snprintf(dm1105->ir.input_phys, sizeof(dm1105->ir.input_phys),
747 		"pci-%s/ir0", pci_name(dm1105->pdev));
748 
749 	dev->driver_name = MODULE_NAME;
750 	dev->map_name = RC_MAP_DM1105_NEC;
751 	dev->device_name = "DVB on-card IR receiver";
752 	dev->input_phys = dm1105->ir.input_phys;
753 	dev->input_id.bustype = BUS_PCI;
754 	dev->input_id.version = 1;
755 	if (dm1105->pdev->subsystem_vendor) {
756 		dev->input_id.vendor = dm1105->pdev->subsystem_vendor;
757 		dev->input_id.product = dm1105->pdev->subsystem_device;
758 	} else {
759 		dev->input_id.vendor = dm1105->pdev->vendor;
760 		dev->input_id.product = dm1105->pdev->device;
761 	}
762 	dev->dev.parent = &dm1105->pdev->dev;
763 
764 	INIT_WORK(&dm1105->ir.work, dm1105_emit_key);
765 
766 	err = rc_register_device(dev);
767 	if (err < 0) {
768 		rc_free_device(dev);
769 		return err;
770 	}
771 
772 	dm1105->ir.dev = dev;
773 	return 0;
774 }
775 
776 static void dm1105_ir_exit(struct dm1105_dev *dm1105)
777 {
778 	rc_unregister_device(dm1105->ir.dev);
779 }
780 
781 static int dm1105_hw_init(struct dm1105_dev *dev)
782 {
783 	dm1105_disable_irqs(dev);
784 
785 	dm_writeb(DM1105_HOST_CTR, 0);
786 
787 	/*DATALEN 188,*/
788 	dm_writeb(DM1105_DTALENTH, 188);
789 	/*TS_STRT TS_VALP MSBFIRST TS_MODE ALPAS TSPES*/
790 	dm_writew(DM1105_TSCTR, 0xc10a);
791 
792 	/* map DMA and set address */
793 	dm1105_dma_map(dev);
794 	dm1105_set_dma_addr(dev);
795 	/* big buffer */
796 	dm_writel(DM1105_RLEN, 5 * DM1105_DMA_BYTES);
797 	dm_writeb(DM1105_INTCNT, 47);
798 
799 	/* IR NEC mode enable */
800 	dm_writeb(DM1105_IRCTR, (DM1105_IR_EN | DM1105_SYS_CHK));
801 	dm_writeb(DM1105_IRMODE, 0);
802 	dm_writew(DM1105_SYSTEMCODE, 0);
803 
804 	return 0;
805 }
806 
807 static void dm1105_hw_exit(struct dm1105_dev *dev)
808 {
809 	dm1105_disable_irqs(dev);
810 
811 	/* IR disable */
812 	dm_writeb(DM1105_IRCTR, 0);
813 	dm_writeb(DM1105_INTMAK, INTMAK_NONEMASK);
814 
815 	dm1105_dma_unmap(dev);
816 }
817 
818 static const struct stv0299_config sharp_z0194a_config = {
819 	.demod_address = 0x68,
820 	.inittab = sharp_z0194a_inittab,
821 	.mclk = 88000000UL,
822 	.invert = 1,
823 	.skip_reinit = 0,
824 	.lock_output = STV0299_LOCKOUTPUT_1,
825 	.volt13_op0_op1 = STV0299_VOLT13_OP1,
826 	.min_delay_ms = 100,
827 	.set_symbol_rate = sharp_z0194a_set_symbol_rate,
828 };
829 
830 static struct stv0288_config earda_config = {
831 	.demod_address = 0x68,
832 	.min_delay_ms = 100,
833 };
834 
835 static struct si21xx_config serit_config = {
836 	.demod_address = 0x68,
837 	.min_delay_ms = 100,
838 
839 };
840 
841 static struct cx24116_config serit_sp2633_config = {
842 	.demod_address = 0x55,
843 };
844 
845 static struct ds3000_config dvbworld_ds3000_config = {
846 	.demod_address = 0x68,
847 };
848 
849 static struct ts2020_config dvbworld_ts2020_config  = {
850 	.tuner_address = 0x60,
851 	.clk_out_div = 1,
852 };
853 
854 static int frontend_init(struct dm1105_dev *dev)
855 {
856 	int ret;
857 
858 	switch (dev->boardnr) {
859 	case DM1105_BOARD_UNBRANDED_I2C_ON_GPIO:
860 		dm1105_gpio_enable(dev, GPIO15, 1);
861 		dm1105_gpio_clear(dev, GPIO15);
862 		msleep(100);
863 		dm1105_gpio_set(dev, GPIO15);
864 		msleep(200);
865 		dev->fe = dvb_attach(
866 			stv0299_attach, &sharp_z0194a_config,
867 			&dev->i2c_bb_adap);
868 		if (dev->fe) {
869 			dev->fe->ops.set_voltage = dm1105_set_voltage;
870 			dvb_attach(dvb_pll_attach, dev->fe, 0x60,
871 					&dev->i2c_bb_adap, DVB_PLL_OPERA1);
872 			break;
873 		}
874 
875 		dev->fe = dvb_attach(
876 			stv0288_attach, &earda_config,
877 			&dev->i2c_bb_adap);
878 		if (dev->fe) {
879 			dev->fe->ops.set_voltage = dm1105_set_voltage;
880 			dvb_attach(stb6000_attach, dev->fe, 0x61,
881 					&dev->i2c_bb_adap);
882 			break;
883 		}
884 
885 		dev->fe = dvb_attach(
886 			si21xx_attach, &serit_config,
887 			&dev->i2c_bb_adap);
888 		if (dev->fe)
889 			dev->fe->ops.set_voltage = dm1105_set_voltage;
890 		break;
891 	case DM1105_BOARD_DVBWORLD_2004:
892 		dev->fe = dvb_attach(
893 			cx24116_attach, &serit_sp2633_config,
894 			&dev->i2c_adap);
895 		if (dev->fe) {
896 			dev->fe->ops.set_voltage = dm1105_set_voltage;
897 			break;
898 		}
899 
900 		dev->fe = dvb_attach(
901 			ds3000_attach, &dvbworld_ds3000_config,
902 			&dev->i2c_adap);
903 		if (dev->fe) {
904 			dvb_attach(ts2020_attach, dev->fe,
905 				&dvbworld_ts2020_config, &dev->i2c_adap);
906 			dev->fe->ops.set_voltage = dm1105_set_voltage;
907 		}
908 
909 		break;
910 	case DM1105_BOARD_DVBWORLD_2002:
911 	case DM1105_BOARD_AXESS_DM05:
912 	default:
913 		dev->fe = dvb_attach(
914 			stv0299_attach, &sharp_z0194a_config,
915 			&dev->i2c_adap);
916 		if (dev->fe) {
917 			dev->fe->ops.set_voltage = dm1105_set_voltage;
918 			dvb_attach(dvb_pll_attach, dev->fe, 0x60,
919 					&dev->i2c_adap, DVB_PLL_OPERA1);
920 			break;
921 		}
922 
923 		dev->fe = dvb_attach(
924 			stv0288_attach, &earda_config,
925 			&dev->i2c_adap);
926 		if (dev->fe) {
927 			dev->fe->ops.set_voltage = dm1105_set_voltage;
928 			dvb_attach(stb6000_attach, dev->fe, 0x61,
929 					&dev->i2c_adap);
930 			break;
931 		}
932 
933 		dev->fe = dvb_attach(
934 			si21xx_attach, &serit_config,
935 			&dev->i2c_adap);
936 		if (dev->fe)
937 			dev->fe->ops.set_voltage = dm1105_set_voltage;
938 
939 	}
940 
941 	if (!dev->fe) {
942 		dev_err(&dev->pdev->dev, "could not attach frontend\n");
943 		return -ENODEV;
944 	}
945 
946 	ret = dvb_register_frontend(&dev->dvb_adapter, dev->fe);
947 	if (ret < 0) {
948 		if (dev->fe->ops.release)
949 			dev->fe->ops.release(dev->fe);
950 		dev->fe = NULL;
951 		return ret;
952 	}
953 
954 	return 0;
955 }
956 
957 static void dm1105_read_mac(struct dm1105_dev *dev, u8 *mac)
958 {
959 	static u8 command[1] = { 0x28 };
960 
961 	struct i2c_msg msg[] = {
962 		{
963 			.addr = IIC_24C01_addr >> 1,
964 			.flags = 0,
965 			.buf = command,
966 			.len = 1
967 		}, {
968 			.addr = IIC_24C01_addr >> 1,
969 			.flags = I2C_M_RD,
970 			.buf = mac,
971 			.len = 6
972 		},
973 	};
974 
975 	dm1105_i2c_xfer(&dev->i2c_adap, msg , 2);
976 	dev_info(&dev->pdev->dev, "MAC %pM\n", mac);
977 }
978 
979 static int dm1105_probe(struct pci_dev *pdev,
980 				  const struct pci_device_id *ent)
981 {
982 	struct dm1105_dev *dev;
983 	struct dvb_adapter *dvb_adapter;
984 	struct dvb_demux *dvbdemux;
985 	struct dmx_demux *dmx;
986 	int ret = -ENOMEM;
987 	int i;
988 
989 	if (dm1105_devcount >= ARRAY_SIZE(card))
990 		return -ENODEV;
991 
992 	dev = kzalloc(sizeof(struct dm1105_dev), GFP_KERNEL);
993 	if (!dev)
994 		return -ENOMEM;
995 
996 	/* board config */
997 	dev->nr = dm1105_devcount;
998 	dev->boardnr = UNSET;
999 	if (card[dev->nr] < ARRAY_SIZE(dm1105_boards))
1000 		dev->boardnr = card[dev->nr];
1001 	for (i = 0; UNSET == dev->boardnr &&
1002 				i < ARRAY_SIZE(dm1105_subids); i++)
1003 		if (pdev->subsystem_vendor ==
1004 			dm1105_subids[i].subvendor &&
1005 				pdev->subsystem_device ==
1006 					dm1105_subids[i].subdevice)
1007 			dev->boardnr = dm1105_subids[i].card;
1008 
1009 	if (UNSET == dev->boardnr) {
1010 		dev->boardnr = DM1105_BOARD_UNKNOWN;
1011 		dm1105_card_list(pdev);
1012 	}
1013 
1014 	dm1105_devcount++;
1015 	dev->pdev = pdev;
1016 	dev->buffer_size = 5 * DM1105_DMA_BYTES;
1017 	dev->PacketErrorCount = 0;
1018 	dev->dmarst = 0;
1019 
1020 	ret = pci_enable_device(pdev);
1021 	if (ret < 0)
1022 		goto err_kfree;
1023 
1024 	ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
1025 	if (ret < 0)
1026 		goto err_pci_disable_device;
1027 
1028 	pci_set_master(pdev);
1029 
1030 	ret = pci_request_regions(pdev, DRIVER_NAME);
1031 	if (ret < 0)
1032 		goto err_pci_disable_device;
1033 
1034 	dev->io_mem = pci_iomap(pdev, 0, pci_resource_len(pdev, 0));
1035 	if (!dev->io_mem) {
1036 		ret = -EIO;
1037 		goto err_pci_release_regions;
1038 	}
1039 
1040 	spin_lock_init(&dev->lock);
1041 	pci_set_drvdata(pdev, dev);
1042 
1043 	ret = dm1105_hw_init(dev);
1044 	if (ret < 0)
1045 		goto err_pci_iounmap;
1046 
1047 	/* i2c */
1048 	i2c_set_adapdata(&dev->i2c_adap, dev);
1049 	strcpy(dev->i2c_adap.name, DRIVER_NAME);
1050 	dev->i2c_adap.owner = THIS_MODULE;
1051 	dev->i2c_adap.dev.parent = &pdev->dev;
1052 	dev->i2c_adap.algo = &dm1105_algo;
1053 	dev->i2c_adap.algo_data = dev;
1054 	ret = i2c_add_adapter(&dev->i2c_adap);
1055 
1056 	if (ret < 0)
1057 		goto err_dm1105_hw_exit;
1058 
1059 	i2c_set_adapdata(&dev->i2c_bb_adap, dev);
1060 	strcpy(dev->i2c_bb_adap.name, DM1105_I2C_GPIO_NAME);
1061 	dev->i2c_bb_adap.owner = THIS_MODULE;
1062 	dev->i2c_bb_adap.dev.parent = &pdev->dev;
1063 	dev->i2c_bb_adap.algo_data = &dev->i2c_bit;
1064 	dev->i2c_bit.data = dev;
1065 	dev->i2c_bit.setsda = dm1105_setsda;
1066 	dev->i2c_bit.setscl = dm1105_setscl;
1067 	dev->i2c_bit.getsda = dm1105_getsda;
1068 	dev->i2c_bit.getscl = dm1105_getscl;
1069 	dev->i2c_bit.udelay = 10;
1070 	dev->i2c_bit.timeout = 10;
1071 
1072 	/* Raise SCL and SDA */
1073 	dm1105_setsda(dev, 1);
1074 	dm1105_setscl(dev, 1);
1075 
1076 	ret = i2c_bit_add_bus(&dev->i2c_bb_adap);
1077 	if (ret < 0)
1078 		goto err_i2c_del_adapter;
1079 
1080 	/* dvb */
1081 	ret = dvb_register_adapter(&dev->dvb_adapter, DRIVER_NAME,
1082 					THIS_MODULE, &pdev->dev, adapter_nr);
1083 	if (ret < 0)
1084 		goto err_i2c_del_adapters;
1085 
1086 	dvb_adapter = &dev->dvb_adapter;
1087 
1088 	dm1105_read_mac(dev, dvb_adapter->proposed_mac);
1089 
1090 	dvbdemux = &dev->demux;
1091 	dvbdemux->filternum = 256;
1092 	dvbdemux->feednum = 256;
1093 	dvbdemux->start_feed = dm1105_start_feed;
1094 	dvbdemux->stop_feed = dm1105_stop_feed;
1095 	dvbdemux->dmx.capabilities = (DMX_TS_FILTERING |
1096 			DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING);
1097 	ret = dvb_dmx_init(dvbdemux);
1098 	if (ret < 0)
1099 		goto err_dvb_unregister_adapter;
1100 
1101 	dmx = &dvbdemux->dmx;
1102 	dev->dmxdev.filternum = 256;
1103 	dev->dmxdev.demux = dmx;
1104 	dev->dmxdev.capabilities = 0;
1105 
1106 	ret = dvb_dmxdev_init(&dev->dmxdev, dvb_adapter);
1107 	if (ret < 0)
1108 		goto err_dvb_dmx_release;
1109 
1110 	dev->hw_frontend.source = DMX_FRONTEND_0;
1111 
1112 	ret = dmx->add_frontend(dmx, &dev->hw_frontend);
1113 	if (ret < 0)
1114 		goto err_dvb_dmxdev_release;
1115 
1116 	dev->mem_frontend.source = DMX_MEMORY_FE;
1117 
1118 	ret = dmx->add_frontend(dmx, &dev->mem_frontend);
1119 	if (ret < 0)
1120 		goto err_remove_hw_frontend;
1121 
1122 	ret = dmx->connect_frontend(dmx, &dev->hw_frontend);
1123 	if (ret < 0)
1124 		goto err_remove_mem_frontend;
1125 
1126 	ret = dvb_net_init(dvb_adapter, &dev->dvbnet, dmx);
1127 	if (ret < 0)
1128 		goto err_disconnect_frontend;
1129 
1130 	ret = frontend_init(dev);
1131 	if (ret < 0)
1132 		goto err_dvb_net;
1133 
1134 	dm1105_ir_init(dev);
1135 
1136 	INIT_WORK(&dev->work, dm1105_dmx_buffer);
1137 	sprintf(dev->wqn, "%s/%d", dvb_adapter->name, dvb_adapter->num);
1138 	dev->wq = create_singlethread_workqueue(dev->wqn);
1139 	if (!dev->wq) {
1140 		ret = -ENOMEM;
1141 		goto err_dvb_net;
1142 	}
1143 
1144 	ret = request_irq(pdev->irq, dm1105_irq, IRQF_SHARED,
1145 						DRIVER_NAME, dev);
1146 	if (ret < 0)
1147 		goto err_workqueue;
1148 
1149 	return 0;
1150 
1151 err_workqueue:
1152 	destroy_workqueue(dev->wq);
1153 err_dvb_net:
1154 	dvb_net_release(&dev->dvbnet);
1155 err_disconnect_frontend:
1156 	dmx->disconnect_frontend(dmx);
1157 err_remove_mem_frontend:
1158 	dmx->remove_frontend(dmx, &dev->mem_frontend);
1159 err_remove_hw_frontend:
1160 	dmx->remove_frontend(dmx, &dev->hw_frontend);
1161 err_dvb_dmxdev_release:
1162 	dvb_dmxdev_release(&dev->dmxdev);
1163 err_dvb_dmx_release:
1164 	dvb_dmx_release(dvbdemux);
1165 err_dvb_unregister_adapter:
1166 	dvb_unregister_adapter(dvb_adapter);
1167 err_i2c_del_adapters:
1168 	i2c_del_adapter(&dev->i2c_bb_adap);
1169 err_i2c_del_adapter:
1170 	i2c_del_adapter(&dev->i2c_adap);
1171 err_dm1105_hw_exit:
1172 	dm1105_hw_exit(dev);
1173 err_pci_iounmap:
1174 	pci_iounmap(pdev, dev->io_mem);
1175 err_pci_release_regions:
1176 	pci_release_regions(pdev);
1177 err_pci_disable_device:
1178 	pci_disable_device(pdev);
1179 err_kfree:
1180 	kfree(dev);
1181 	return ret;
1182 }
1183 
1184 static void dm1105_remove(struct pci_dev *pdev)
1185 {
1186 	struct dm1105_dev *dev = pci_get_drvdata(pdev);
1187 	struct dvb_adapter *dvb_adapter = &dev->dvb_adapter;
1188 	struct dvb_demux *dvbdemux = &dev->demux;
1189 	struct dmx_demux *dmx = &dvbdemux->dmx;
1190 
1191 	dm1105_ir_exit(dev);
1192 	dmx->close(dmx);
1193 	dvb_net_release(&dev->dvbnet);
1194 	if (dev->fe)
1195 		dvb_unregister_frontend(dev->fe);
1196 
1197 	dmx->disconnect_frontend(dmx);
1198 	dmx->remove_frontend(dmx, &dev->mem_frontend);
1199 	dmx->remove_frontend(dmx, &dev->hw_frontend);
1200 	dvb_dmxdev_release(&dev->dmxdev);
1201 	dvb_dmx_release(dvbdemux);
1202 	dvb_unregister_adapter(dvb_adapter);
1203 	i2c_del_adapter(&dev->i2c_adap);
1204 
1205 	dm1105_hw_exit(dev);
1206 	free_irq(pdev->irq, dev);
1207 	pci_iounmap(pdev, dev->io_mem);
1208 	pci_release_regions(pdev);
1209 	pci_disable_device(pdev);
1210 	dm1105_devcount--;
1211 	kfree(dev);
1212 }
1213 
1214 static const struct pci_device_id dm1105_id_table[] = {
1215 	{
1216 		.vendor = PCI_VENDOR_ID_TRIGEM,
1217 		.device = PCI_DEVICE_ID_DM1105,
1218 		.subvendor = PCI_ANY_ID,
1219 		.subdevice = PCI_ANY_ID,
1220 	}, {
1221 		.vendor = PCI_VENDOR_ID_AXESS,
1222 		.device = PCI_DEVICE_ID_DM05,
1223 		.subvendor = PCI_ANY_ID,
1224 		.subdevice = PCI_ANY_ID,
1225 	}, {
1226 		/* empty */
1227 	},
1228 };
1229 
1230 MODULE_DEVICE_TABLE(pci, dm1105_id_table);
1231 
1232 static struct pci_driver dm1105_driver = {
1233 	.name = DRIVER_NAME,
1234 	.id_table = dm1105_id_table,
1235 	.probe = dm1105_probe,
1236 	.remove = dm1105_remove,
1237 };
1238 
1239 module_pci_driver(dm1105_driver);
1240 
1241 MODULE_AUTHOR("Igor M. Liplianin <liplianin@me.by>");
1242 MODULE_DESCRIPTION("SDMC DM1105 DVB driver");
1243 MODULE_LICENSE("GPL");
1244