1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * dm1105.c - driver for DVB cards based on SDMC DM1105 PCI chip 4 * 5 * Copyright (C) 2008 Igor M. Liplianin <liplianin@me.by> 6 */ 7 8 #include <linux/i2c.h> 9 #include <linux/i2c-algo-bit.h> 10 #include <linux/init.h> 11 #include <linux/interrupt.h> 12 #include <linux/kernel.h> 13 #include <linux/module.h> 14 #include <linux/pci.h> 15 #include <linux/dma-mapping.h> 16 #include <linux/slab.h> 17 #include <media/rc-core.h> 18 19 #include <media/demux.h> 20 #include <media/dmxdev.h> 21 #include <media/dvb_demux.h> 22 #include <media/dvb_frontend.h> 23 #include <media/dvb_net.h> 24 #include <media/dvbdev.h> 25 #include "dvb-pll.h" 26 27 #include "stv0299.h" 28 #include "stv0288.h" 29 #include "stb6000.h" 30 #include "si21xx.h" 31 #include "cx24116.h" 32 #include "z0194a.h" 33 #include "ts2020.h" 34 #include "ds3000.h" 35 36 #define MODULE_NAME "dm1105" 37 38 #define UNSET (-1U) 39 40 #define DM1105_BOARD_NOAUTO UNSET 41 #define DM1105_BOARD_UNKNOWN 0 42 #define DM1105_BOARD_DVBWORLD_2002 1 43 #define DM1105_BOARD_DVBWORLD_2004 2 44 #define DM1105_BOARD_AXESS_DM05 3 45 #define DM1105_BOARD_UNBRANDED_I2C_ON_GPIO 4 46 47 /* ----------------------------------------------- */ 48 /* 49 * PCI ID's 50 */ 51 #ifndef PCI_VENDOR_ID_TRIGEM 52 #define PCI_VENDOR_ID_TRIGEM 0x109f 53 #endif 54 #ifndef PCI_VENDOR_ID_AXESS 55 #define PCI_VENDOR_ID_AXESS 0x195d 56 #endif 57 #ifndef PCI_DEVICE_ID_DM1105 58 #define PCI_DEVICE_ID_DM1105 0x036f 59 #endif 60 #ifndef PCI_DEVICE_ID_DW2002 61 #define PCI_DEVICE_ID_DW2002 0x2002 62 #endif 63 #ifndef PCI_DEVICE_ID_DW2004 64 #define PCI_DEVICE_ID_DW2004 0x2004 65 #endif 66 #ifndef PCI_DEVICE_ID_DM05 67 #define PCI_DEVICE_ID_DM05 0x1105 68 #endif 69 /* ----------------------------------------------- */ 70 /* sdmc dm1105 registers */ 71 72 /* TS Control */ 73 #define DM1105_TSCTR 0x00 74 #define DM1105_DTALENTH 0x04 75 76 /* GPIO Interface */ 77 #define DM1105_GPIOVAL 0x08 78 #define DM1105_GPIOCTR 0x0c 79 80 /* PID serial number */ 81 #define DM1105_PIDN 0x10 82 83 /* Odd-even secret key select */ 84 #define DM1105_CWSEL 0x14 85 86 /* Host Command Interface */ 87 #define DM1105_HOST_CTR 0x18 88 #define DM1105_HOST_AD 0x1c 89 90 /* PCI Interface */ 91 #define DM1105_CR 0x30 92 #define DM1105_RST 0x34 93 #define DM1105_STADR 0x38 94 #define DM1105_RLEN 0x3c 95 #define DM1105_WRP 0x40 96 #define DM1105_INTCNT 0x44 97 #define DM1105_INTMAK 0x48 98 #define DM1105_INTSTS 0x4c 99 100 /* CW Value */ 101 #define DM1105_ODD 0x50 102 #define DM1105_EVEN 0x58 103 104 /* PID Value */ 105 #define DM1105_PID 0x60 106 107 /* IR Control */ 108 #define DM1105_IRCTR 0x64 109 #define DM1105_IRMODE 0x68 110 #define DM1105_SYSTEMCODE 0x6c 111 #define DM1105_IRCODE 0x70 112 113 /* Unknown Values */ 114 #define DM1105_ENCRYPT 0x74 115 #define DM1105_VER 0x7c 116 117 /* I2C Interface */ 118 #define DM1105_I2CCTR 0x80 119 #define DM1105_I2CSTS 0x81 120 #define DM1105_I2CDAT 0x82 121 #define DM1105_I2C_RA 0x83 122 /* ----------------------------------------------- */ 123 /* Interrupt Mask Bits */ 124 125 #define INTMAK_TSIRQM 0x01 126 #define INTMAK_HIRQM 0x04 127 #define INTMAK_IRM 0x08 128 #define INTMAK_ALLMASK (INTMAK_TSIRQM | \ 129 INTMAK_HIRQM | \ 130 INTMAK_IRM) 131 #define INTMAK_NONEMASK 0x00 132 133 /* Interrupt Status Bits */ 134 #define INTSTS_TSIRQ 0x01 135 #define INTSTS_HIRQ 0x04 136 #define INTSTS_IR 0x08 137 138 /* IR Control Bits */ 139 #define DM1105_IR_EN 0x01 140 #define DM1105_SYS_CHK 0x02 141 #define DM1105_REP_FLG 0x08 142 143 /* EEPROM addr */ 144 #define IIC_24C01_addr 0xa0 145 /* Max board count */ 146 #define DM1105_MAX 0x04 147 148 #define DRIVER_NAME "dm1105" 149 #define DM1105_I2C_GPIO_NAME "dm1105-gpio" 150 151 #define DM1105_DMA_PACKETS 47 152 #define DM1105_DMA_PACKET_LENGTH (128*4) 153 #define DM1105_DMA_BYTES (128 * 4 * DM1105_DMA_PACKETS) 154 155 /* */ 156 #define GPIO08 (1 << 8) 157 #define GPIO13 (1 << 13) 158 #define GPIO14 (1 << 14) 159 #define GPIO15 (1 << 15) 160 #define GPIO16 (1 << 16) 161 #define GPIO17 (1 << 17) 162 #define GPIO_ALL 0x03ffff 163 164 /* GPIO's for LNB power control */ 165 #define DM1105_LNB_MASK (GPIO_ALL & ~(GPIO14 | GPIO13)) 166 #define DM1105_LNB_OFF GPIO17 167 #define DM1105_LNB_13V (GPIO16 | GPIO08) 168 #define DM1105_LNB_18V GPIO08 169 170 /* GPIO's for LNB power control for Axess DM05 */ 171 #define DM05_LNB_MASK (GPIO_ALL & ~(GPIO14 | GPIO13)) 172 #define DM05_LNB_OFF GPIO17/* actually 13v */ 173 #define DM05_LNB_13V GPIO17 174 #define DM05_LNB_18V (GPIO17 | GPIO16) 175 176 /* GPIO's for LNB power control for unbranded with I2C on GPIO */ 177 #define UNBR_LNB_MASK (GPIO17 | GPIO16) 178 #define UNBR_LNB_OFF 0 179 #define UNBR_LNB_13V GPIO17 180 #define UNBR_LNB_18V (GPIO17 | GPIO16) 181 182 static unsigned int card[] = {[0 ... 3] = UNSET }; 183 module_param_array(card, int, NULL, 0444); 184 MODULE_PARM_DESC(card, "card type"); 185 186 static int ir_debug; 187 module_param(ir_debug, int, 0644); 188 MODULE_PARM_DESC(ir_debug, "enable debugging information for IR decoding"); 189 190 static unsigned int dm1105_devcount; 191 192 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr); 193 194 struct dm1105_board { 195 char *name; 196 struct { 197 u32 mask, off, v13, v18; 198 } lnb; 199 u32 gpio_scl, gpio_sda; 200 }; 201 202 struct dm1105_subid { 203 u16 subvendor; 204 u16 subdevice; 205 u32 card; 206 }; 207 208 static const struct dm1105_board dm1105_boards[] = { 209 [DM1105_BOARD_UNKNOWN] = { 210 .name = "UNKNOWN/GENERIC", 211 .lnb = { 212 .mask = DM1105_LNB_MASK, 213 .off = DM1105_LNB_OFF, 214 .v13 = DM1105_LNB_13V, 215 .v18 = DM1105_LNB_18V, 216 }, 217 }, 218 [DM1105_BOARD_DVBWORLD_2002] = { 219 .name = "DVBWorld PCI 2002", 220 .lnb = { 221 .mask = DM1105_LNB_MASK, 222 .off = DM1105_LNB_OFF, 223 .v13 = DM1105_LNB_13V, 224 .v18 = DM1105_LNB_18V, 225 }, 226 }, 227 [DM1105_BOARD_DVBWORLD_2004] = { 228 .name = "DVBWorld PCI 2004", 229 .lnb = { 230 .mask = DM1105_LNB_MASK, 231 .off = DM1105_LNB_OFF, 232 .v13 = DM1105_LNB_13V, 233 .v18 = DM1105_LNB_18V, 234 }, 235 }, 236 [DM1105_BOARD_AXESS_DM05] = { 237 .name = "Axess/EasyTv DM05", 238 .lnb = { 239 .mask = DM05_LNB_MASK, 240 .off = DM05_LNB_OFF, 241 .v13 = DM05_LNB_13V, 242 .v18 = DM05_LNB_18V, 243 }, 244 }, 245 [DM1105_BOARD_UNBRANDED_I2C_ON_GPIO] = { 246 .name = "Unbranded DM1105 with i2c on GPIOs", 247 .lnb = { 248 .mask = UNBR_LNB_MASK, 249 .off = UNBR_LNB_OFF, 250 .v13 = UNBR_LNB_13V, 251 .v18 = UNBR_LNB_18V, 252 }, 253 .gpio_scl = GPIO14, 254 .gpio_sda = GPIO13, 255 }, 256 }; 257 258 static const struct dm1105_subid dm1105_subids[] = { 259 { 260 .subvendor = 0x0000, 261 .subdevice = 0x2002, 262 .card = DM1105_BOARD_DVBWORLD_2002, 263 }, { 264 .subvendor = 0x0001, 265 .subdevice = 0x2002, 266 .card = DM1105_BOARD_DVBWORLD_2002, 267 }, { 268 .subvendor = 0x0000, 269 .subdevice = 0x2004, 270 .card = DM1105_BOARD_DVBWORLD_2004, 271 }, { 272 .subvendor = 0x0001, 273 .subdevice = 0x2004, 274 .card = DM1105_BOARD_DVBWORLD_2004, 275 }, { 276 .subvendor = 0x195d, 277 .subdevice = 0x1105, 278 .card = DM1105_BOARD_AXESS_DM05, 279 }, 280 }; 281 282 static void dm1105_card_list(struct pci_dev *pci) 283 { 284 int i; 285 286 if (0 == pci->subsystem_vendor && 287 0 == pci->subsystem_device) { 288 printk(KERN_ERR 289 "dm1105: Your board has no valid PCI Subsystem ID\n" 290 "dm1105: and thus can't be autodetected\n" 291 "dm1105: Please pass card=<n> insmod option to\n" 292 "dm1105: workaround that. Redirect complaints to\n" 293 "dm1105: the vendor of the TV card. Best regards,\n" 294 "dm1105: -- tux\n"); 295 } else { 296 printk(KERN_ERR 297 "dm1105: Your board isn't known (yet) to the driver.\n" 298 "dm1105: You can try to pick one of the existing\n" 299 "dm1105: card configs via card=<n> insmod option.\n" 300 "dm1105: Updating to the latest version might help\n" 301 "dm1105: as well.\n"); 302 } 303 printk(KERN_ERR "Here is a list of valid choices for the card=<n> insmod option:\n"); 304 for (i = 0; i < ARRAY_SIZE(dm1105_boards); i++) 305 printk(KERN_ERR "dm1105: card=%d -> %s\n", 306 i, dm1105_boards[i].name); 307 } 308 309 /* infrared remote control */ 310 struct infrared { 311 struct rc_dev *dev; 312 char input_phys[32]; 313 struct work_struct work; 314 u32 ir_command; 315 }; 316 317 struct dm1105_dev { 318 /* pci */ 319 struct pci_dev *pdev; 320 u8 __iomem *io_mem; 321 322 /* ir */ 323 struct infrared ir; 324 325 /* dvb */ 326 struct dmx_frontend hw_frontend; 327 struct dmx_frontend mem_frontend; 328 struct dmxdev dmxdev; 329 struct dvb_adapter dvb_adapter; 330 struct dvb_demux demux; 331 struct dvb_frontend *fe; 332 struct dvb_net dvbnet; 333 unsigned int full_ts_users; 334 unsigned int boardnr; 335 int nr; 336 337 /* i2c */ 338 struct i2c_adapter i2c_adap; 339 struct i2c_adapter i2c_bb_adap; 340 struct i2c_algo_bit_data i2c_bit; 341 342 /* irq */ 343 struct work_struct work; 344 struct workqueue_struct *wq; 345 char wqn[16]; 346 347 /* dma */ 348 dma_addr_t dma_addr; 349 unsigned char *ts_buf; 350 u32 wrp; 351 u32 nextwrp; 352 u32 buffer_size; 353 unsigned int PacketErrorCount; 354 unsigned int dmarst; 355 spinlock_t lock; 356 }; 357 358 #define dm_io_mem(reg) ((unsigned long)(&dev->io_mem[reg])) 359 360 #define dm_readb(reg) inb(dm_io_mem(reg)) 361 #define dm_writeb(reg, value) outb((value), (dm_io_mem(reg))) 362 363 #define dm_readw(reg) inw(dm_io_mem(reg)) 364 #define dm_writew(reg, value) outw((value), (dm_io_mem(reg))) 365 366 #define dm_readl(reg) inl(dm_io_mem(reg)) 367 #define dm_writel(reg, value) outl((value), (dm_io_mem(reg))) 368 369 #define dm_andorl(reg, mask, value) \ 370 outl((inl(dm_io_mem(reg)) & ~(mask)) |\ 371 ((value) & (mask)), (dm_io_mem(reg))) 372 373 #define dm_setl(reg, bit) dm_andorl((reg), (bit), (bit)) 374 #define dm_clearl(reg, bit) dm_andorl((reg), (bit), 0) 375 376 /* The chip has 18 GPIOs. In HOST mode GPIO's used as 15 bit address lines, 377 so we can use only 3 GPIO's from GPIO15 to GPIO17. 378 Here I don't check whether HOST is enebled as it is not implemented yet. 379 */ 380 static void dm1105_gpio_set(struct dm1105_dev *dev, u32 mask) 381 { 382 if (mask & 0xfffc0000) 383 printk(KERN_ERR "%s: Only 18 GPIO's are allowed\n", __func__); 384 385 if (mask & 0x0003ffff) 386 dm_setl(DM1105_GPIOVAL, mask & 0x0003ffff); 387 388 } 389 390 static void dm1105_gpio_clear(struct dm1105_dev *dev, u32 mask) 391 { 392 if (mask & 0xfffc0000) 393 printk(KERN_ERR "%s: Only 18 GPIO's are allowed\n", __func__); 394 395 if (mask & 0x0003ffff) 396 dm_clearl(DM1105_GPIOVAL, mask & 0x0003ffff); 397 398 } 399 400 static void dm1105_gpio_andor(struct dm1105_dev *dev, u32 mask, u32 val) 401 { 402 if (mask & 0xfffc0000) 403 printk(KERN_ERR "%s: Only 18 GPIO's are allowed\n", __func__); 404 405 if (mask & 0x0003ffff) 406 dm_andorl(DM1105_GPIOVAL, mask & 0x0003ffff, val); 407 408 } 409 410 static u32 dm1105_gpio_get(struct dm1105_dev *dev, u32 mask) 411 { 412 if (mask & 0xfffc0000) 413 printk(KERN_ERR "%s: Only 18 GPIO's are allowed\n", __func__); 414 415 if (mask & 0x0003ffff) 416 return dm_readl(DM1105_GPIOVAL) & mask & 0x0003ffff; 417 418 return 0; 419 } 420 421 static void dm1105_gpio_enable(struct dm1105_dev *dev, u32 mask, int asoutput) 422 { 423 if (mask & 0xfffc0000) 424 printk(KERN_ERR "%s: Only 18 GPIO's are allowed\n", __func__); 425 426 if ((mask & 0x0003ffff) && asoutput) 427 dm_clearl(DM1105_GPIOCTR, mask & 0x0003ffff); 428 else if ((mask & 0x0003ffff) && !asoutput) 429 dm_setl(DM1105_GPIOCTR, mask & 0x0003ffff); 430 431 } 432 433 static void dm1105_setline(struct dm1105_dev *dev, u32 line, int state) 434 { 435 if (state) 436 dm1105_gpio_enable(dev, line, 0); 437 else { 438 dm1105_gpio_enable(dev, line, 1); 439 dm1105_gpio_clear(dev, line); 440 } 441 } 442 443 static void dm1105_setsda(void *data, int state) 444 { 445 struct dm1105_dev *dev = data; 446 447 dm1105_setline(dev, dm1105_boards[dev->boardnr].gpio_sda, state); 448 } 449 450 static void dm1105_setscl(void *data, int state) 451 { 452 struct dm1105_dev *dev = data; 453 454 dm1105_setline(dev, dm1105_boards[dev->boardnr].gpio_scl, state); 455 } 456 457 static int dm1105_getsda(void *data) 458 { 459 struct dm1105_dev *dev = data; 460 461 return dm1105_gpio_get(dev, dm1105_boards[dev->boardnr].gpio_sda) 462 ? 1 : 0; 463 } 464 465 static int dm1105_getscl(void *data) 466 { 467 struct dm1105_dev *dev = data; 468 469 return dm1105_gpio_get(dev, dm1105_boards[dev->boardnr].gpio_scl) 470 ? 1 : 0; 471 } 472 473 static int dm1105_i2c_xfer(struct i2c_adapter *i2c_adap, 474 struct i2c_msg *msgs, int num) 475 { 476 struct dm1105_dev *dev ; 477 478 int addr, rc, i, j, k, len, byte, data; 479 u8 status; 480 481 dev = i2c_adap->algo_data; 482 for (i = 0; i < num; i++) { 483 dm_writeb(DM1105_I2CCTR, 0x00); 484 if (msgs[i].flags & I2C_M_RD) { 485 /* read bytes */ 486 addr = msgs[i].addr << 1; 487 addr |= 1; 488 dm_writeb(DM1105_I2CDAT, addr); 489 for (byte = 0; byte < msgs[i].len; byte++) 490 dm_writeb(DM1105_I2CDAT + byte + 1, 0); 491 492 dm_writeb(DM1105_I2CCTR, 0x81 + msgs[i].len); 493 for (j = 0; j < 55; j++) { 494 mdelay(10); 495 status = dm_readb(DM1105_I2CSTS); 496 if ((status & 0xc0) == 0x40) 497 break; 498 } 499 if (j >= 55) 500 return -1; 501 502 for (byte = 0; byte < msgs[i].len; byte++) { 503 rc = dm_readb(DM1105_I2CDAT + byte + 1); 504 if (rc < 0) 505 goto err; 506 msgs[i].buf[byte] = rc; 507 } 508 } else if ((msgs[i].buf[0] == 0xf7) && (msgs[i].addr == 0x55)) { 509 /* prepared for cx24116 firmware */ 510 /* Write in small blocks */ 511 len = msgs[i].len - 1; 512 k = 1; 513 do { 514 dm_writeb(DM1105_I2CDAT, msgs[i].addr << 1); 515 dm_writeb(DM1105_I2CDAT + 1, 0xf7); 516 for (byte = 0; byte < (len > 48 ? 48 : len); byte++) { 517 data = msgs[i].buf[k + byte]; 518 dm_writeb(DM1105_I2CDAT + byte + 2, data); 519 } 520 dm_writeb(DM1105_I2CCTR, 0x82 + (len > 48 ? 48 : len)); 521 for (j = 0; j < 25; j++) { 522 mdelay(10); 523 status = dm_readb(DM1105_I2CSTS); 524 if ((status & 0xc0) == 0x40) 525 break; 526 } 527 528 if (j >= 25) 529 return -1; 530 531 k += 48; 532 len -= 48; 533 } while (len > 0); 534 } else { 535 /* write bytes */ 536 dm_writeb(DM1105_I2CDAT, msgs[i].addr << 1); 537 for (byte = 0; byte < msgs[i].len; byte++) { 538 data = msgs[i].buf[byte]; 539 dm_writeb(DM1105_I2CDAT + byte + 1, data); 540 } 541 dm_writeb(DM1105_I2CCTR, 0x81 + msgs[i].len); 542 for (j = 0; j < 25; j++) { 543 mdelay(10); 544 status = dm_readb(DM1105_I2CSTS); 545 if ((status & 0xc0) == 0x40) 546 break; 547 } 548 549 if (j >= 25) 550 return -1; 551 } 552 } 553 return num; 554 err: 555 return rc; 556 } 557 558 static u32 functionality(struct i2c_adapter *adap) 559 { 560 return I2C_FUNC_I2C; 561 } 562 563 static const struct i2c_algorithm dm1105_algo = { 564 .master_xfer = dm1105_i2c_xfer, 565 .functionality = functionality, 566 }; 567 568 static inline struct dm1105_dev *feed_to_dm1105_dev(struct dvb_demux_feed *feed) 569 { 570 return container_of(feed->demux, struct dm1105_dev, demux); 571 } 572 573 static inline struct dm1105_dev *frontend_to_dm1105_dev(struct dvb_frontend *fe) 574 { 575 return container_of(fe->dvb, struct dm1105_dev, dvb_adapter); 576 } 577 578 static int dm1105_set_voltage(struct dvb_frontend *fe, 579 enum fe_sec_voltage voltage) 580 { 581 struct dm1105_dev *dev = frontend_to_dm1105_dev(fe); 582 583 dm1105_gpio_enable(dev, dm1105_boards[dev->boardnr].lnb.mask, 1); 584 if (voltage == SEC_VOLTAGE_18) 585 dm1105_gpio_andor(dev, 586 dm1105_boards[dev->boardnr].lnb.mask, 587 dm1105_boards[dev->boardnr].lnb.v18); 588 else if (voltage == SEC_VOLTAGE_13) 589 dm1105_gpio_andor(dev, 590 dm1105_boards[dev->boardnr].lnb.mask, 591 dm1105_boards[dev->boardnr].lnb.v13); 592 else 593 dm1105_gpio_andor(dev, 594 dm1105_boards[dev->boardnr].lnb.mask, 595 dm1105_boards[dev->boardnr].lnb.off); 596 597 return 0; 598 } 599 600 static void dm1105_set_dma_addr(struct dm1105_dev *dev) 601 { 602 dm_writel(DM1105_STADR, (__force u32)cpu_to_le32(dev->dma_addr)); 603 } 604 605 static int dm1105_dma_map(struct dm1105_dev *dev) 606 { 607 dev->ts_buf = dma_alloc_coherent(&dev->pdev->dev, 608 6 * DM1105_DMA_BYTES, &dev->dma_addr, 609 GFP_KERNEL); 610 611 return !dev->ts_buf; 612 } 613 614 static void dm1105_dma_unmap(struct dm1105_dev *dev) 615 { 616 dma_free_coherent(&dev->pdev->dev, 6 * DM1105_DMA_BYTES, dev->ts_buf, 617 dev->dma_addr); 618 } 619 620 static void dm1105_enable_irqs(struct dm1105_dev *dev) 621 { 622 dm_writeb(DM1105_INTMAK, INTMAK_ALLMASK); 623 dm_writeb(DM1105_CR, 1); 624 } 625 626 static void dm1105_disable_irqs(struct dm1105_dev *dev) 627 { 628 dm_writeb(DM1105_INTMAK, INTMAK_IRM); 629 dm_writeb(DM1105_CR, 0); 630 } 631 632 static int dm1105_start_feed(struct dvb_demux_feed *f) 633 { 634 struct dm1105_dev *dev = feed_to_dm1105_dev(f); 635 636 if (dev->full_ts_users++ == 0) 637 dm1105_enable_irqs(dev); 638 639 return 0; 640 } 641 642 static int dm1105_stop_feed(struct dvb_demux_feed *f) 643 { 644 struct dm1105_dev *dev = feed_to_dm1105_dev(f); 645 646 if (--dev->full_ts_users == 0) 647 dm1105_disable_irqs(dev); 648 649 return 0; 650 } 651 652 /* ir work handler */ 653 static void dm1105_emit_key(struct work_struct *work) 654 { 655 struct infrared *ir = container_of(work, struct infrared, work); 656 u32 ircom = ir->ir_command; 657 u8 data; 658 659 if (ir_debug) 660 printk(KERN_INFO "%s: received byte 0x%04x\n", __func__, ircom); 661 662 data = (ircom >> 8) & 0x7f; 663 664 /* FIXME: UNKNOWN because we don't generate a full NEC scancode (yet?) */ 665 rc_keydown(ir->dev, RC_PROTO_UNKNOWN, data, 0); 666 } 667 668 /* work handler */ 669 static void dm1105_dmx_buffer(struct work_struct *work) 670 { 671 struct dm1105_dev *dev = container_of(work, struct dm1105_dev, work); 672 unsigned int nbpackets; 673 u32 oldwrp = dev->wrp; 674 u32 nextwrp = dev->nextwrp; 675 676 if (!((dev->ts_buf[oldwrp] == 0x47) && 677 (dev->ts_buf[oldwrp + 188] == 0x47) && 678 (dev->ts_buf[oldwrp + 188 * 2] == 0x47))) { 679 dev->PacketErrorCount++; 680 /* bad packet found */ 681 if ((dev->PacketErrorCount >= 2) && 682 (dev->dmarst == 0)) { 683 dm_writeb(DM1105_RST, 1); 684 dev->wrp = 0; 685 dev->PacketErrorCount = 0; 686 dev->dmarst = 0; 687 return; 688 } 689 } 690 691 if (nextwrp < oldwrp) { 692 memcpy(dev->ts_buf + dev->buffer_size, dev->ts_buf, nextwrp); 693 nbpackets = ((dev->buffer_size - oldwrp) + nextwrp) / 188; 694 } else 695 nbpackets = (nextwrp - oldwrp) / 188; 696 697 dev->wrp = nextwrp; 698 dvb_dmx_swfilter_packets(&dev->demux, &dev->ts_buf[oldwrp], nbpackets); 699 } 700 701 static irqreturn_t dm1105_irq(int irq, void *dev_id) 702 { 703 struct dm1105_dev *dev = dev_id; 704 705 /* Read-Write INSTS Ack's Interrupt for DM1105 chip 16.03.2008 */ 706 unsigned int intsts = dm_readb(DM1105_INTSTS); 707 dm_writeb(DM1105_INTSTS, intsts); 708 709 switch (intsts) { 710 case INTSTS_TSIRQ: 711 case (INTSTS_TSIRQ | INTSTS_IR): 712 dev->nextwrp = dm_readl(DM1105_WRP) - dm_readl(DM1105_STADR); 713 queue_work(dev->wq, &dev->work); 714 break; 715 case INTSTS_IR: 716 dev->ir.ir_command = dm_readl(DM1105_IRCODE); 717 schedule_work(&dev->ir.work); 718 break; 719 } 720 721 return IRQ_HANDLED; 722 } 723 724 static int dm1105_ir_init(struct dm1105_dev *dm1105) 725 { 726 struct rc_dev *dev; 727 int err = -ENOMEM; 728 729 dev = rc_allocate_device(RC_DRIVER_SCANCODE); 730 if (!dev) 731 return -ENOMEM; 732 733 snprintf(dm1105->ir.input_phys, sizeof(dm1105->ir.input_phys), 734 "pci-%s/ir0", pci_name(dm1105->pdev)); 735 736 dev->driver_name = MODULE_NAME; 737 dev->map_name = RC_MAP_DM1105_NEC; 738 dev->device_name = "DVB on-card IR receiver"; 739 dev->input_phys = dm1105->ir.input_phys; 740 dev->input_id.bustype = BUS_PCI; 741 dev->input_id.version = 1; 742 if (dm1105->pdev->subsystem_vendor) { 743 dev->input_id.vendor = dm1105->pdev->subsystem_vendor; 744 dev->input_id.product = dm1105->pdev->subsystem_device; 745 } else { 746 dev->input_id.vendor = dm1105->pdev->vendor; 747 dev->input_id.product = dm1105->pdev->device; 748 } 749 dev->dev.parent = &dm1105->pdev->dev; 750 751 INIT_WORK(&dm1105->ir.work, dm1105_emit_key); 752 753 err = rc_register_device(dev); 754 if (err < 0) { 755 rc_free_device(dev); 756 return err; 757 } 758 759 dm1105->ir.dev = dev; 760 return 0; 761 } 762 763 static void dm1105_ir_exit(struct dm1105_dev *dm1105) 764 { 765 rc_unregister_device(dm1105->ir.dev); 766 } 767 768 static int dm1105_hw_init(struct dm1105_dev *dev) 769 { 770 dm1105_disable_irqs(dev); 771 772 dm_writeb(DM1105_HOST_CTR, 0); 773 774 /*DATALEN 188,*/ 775 dm_writeb(DM1105_DTALENTH, 188); 776 /*TS_STRT TS_VALP MSBFIRST TS_MODE ALPAS TSPES*/ 777 dm_writew(DM1105_TSCTR, 0xc10a); 778 779 /* map DMA and set address */ 780 dm1105_dma_map(dev); 781 dm1105_set_dma_addr(dev); 782 /* big buffer */ 783 dm_writel(DM1105_RLEN, 5 * DM1105_DMA_BYTES); 784 dm_writeb(DM1105_INTCNT, 47); 785 786 /* IR NEC mode enable */ 787 dm_writeb(DM1105_IRCTR, (DM1105_IR_EN | DM1105_SYS_CHK)); 788 dm_writeb(DM1105_IRMODE, 0); 789 dm_writew(DM1105_SYSTEMCODE, 0); 790 791 return 0; 792 } 793 794 static void dm1105_hw_exit(struct dm1105_dev *dev) 795 { 796 dm1105_disable_irqs(dev); 797 798 /* IR disable */ 799 dm_writeb(DM1105_IRCTR, 0); 800 dm_writeb(DM1105_INTMAK, INTMAK_NONEMASK); 801 802 dm1105_dma_unmap(dev); 803 } 804 805 static const struct stv0299_config sharp_z0194a_config = { 806 .demod_address = 0x68, 807 .inittab = sharp_z0194a_inittab, 808 .mclk = 88000000UL, 809 .invert = 1, 810 .skip_reinit = 0, 811 .lock_output = STV0299_LOCKOUTPUT_1, 812 .volt13_op0_op1 = STV0299_VOLT13_OP1, 813 .min_delay_ms = 100, 814 .set_symbol_rate = sharp_z0194a_set_symbol_rate, 815 }; 816 817 static struct stv0288_config earda_config = { 818 .demod_address = 0x68, 819 .min_delay_ms = 100, 820 }; 821 822 static struct si21xx_config serit_config = { 823 .demod_address = 0x68, 824 .min_delay_ms = 100, 825 826 }; 827 828 static struct cx24116_config serit_sp2633_config = { 829 .demod_address = 0x55, 830 }; 831 832 static struct ds3000_config dvbworld_ds3000_config = { 833 .demod_address = 0x68, 834 }; 835 836 static struct ts2020_config dvbworld_ts2020_config = { 837 .tuner_address = 0x60, 838 .clk_out_div = 1, 839 }; 840 841 static int frontend_init(struct dm1105_dev *dev) 842 { 843 int ret; 844 845 switch (dev->boardnr) { 846 case DM1105_BOARD_UNBRANDED_I2C_ON_GPIO: 847 dm1105_gpio_enable(dev, GPIO15, 1); 848 dm1105_gpio_clear(dev, GPIO15); 849 msleep(100); 850 dm1105_gpio_set(dev, GPIO15); 851 msleep(200); 852 dev->fe = dvb_attach( 853 stv0299_attach, &sharp_z0194a_config, 854 &dev->i2c_bb_adap); 855 if (dev->fe) { 856 dev->fe->ops.set_voltage = dm1105_set_voltage; 857 dvb_attach(dvb_pll_attach, dev->fe, 0x60, 858 &dev->i2c_bb_adap, DVB_PLL_OPERA1); 859 break; 860 } 861 862 dev->fe = dvb_attach( 863 stv0288_attach, &earda_config, 864 &dev->i2c_bb_adap); 865 if (dev->fe) { 866 dev->fe->ops.set_voltage = dm1105_set_voltage; 867 dvb_attach(stb6000_attach, dev->fe, 0x61, 868 &dev->i2c_bb_adap); 869 break; 870 } 871 872 dev->fe = dvb_attach( 873 si21xx_attach, &serit_config, 874 &dev->i2c_bb_adap); 875 if (dev->fe) 876 dev->fe->ops.set_voltage = dm1105_set_voltage; 877 break; 878 case DM1105_BOARD_DVBWORLD_2004: 879 dev->fe = dvb_attach( 880 cx24116_attach, &serit_sp2633_config, 881 &dev->i2c_adap); 882 if (dev->fe) { 883 dev->fe->ops.set_voltage = dm1105_set_voltage; 884 break; 885 } 886 887 dev->fe = dvb_attach( 888 ds3000_attach, &dvbworld_ds3000_config, 889 &dev->i2c_adap); 890 if (dev->fe) { 891 dvb_attach(ts2020_attach, dev->fe, 892 &dvbworld_ts2020_config, &dev->i2c_adap); 893 dev->fe->ops.set_voltage = dm1105_set_voltage; 894 } 895 896 break; 897 case DM1105_BOARD_DVBWORLD_2002: 898 case DM1105_BOARD_AXESS_DM05: 899 default: 900 dev->fe = dvb_attach( 901 stv0299_attach, &sharp_z0194a_config, 902 &dev->i2c_adap); 903 if (dev->fe) { 904 dev->fe->ops.set_voltage = dm1105_set_voltage; 905 dvb_attach(dvb_pll_attach, dev->fe, 0x60, 906 &dev->i2c_adap, DVB_PLL_OPERA1); 907 break; 908 } 909 910 dev->fe = dvb_attach( 911 stv0288_attach, &earda_config, 912 &dev->i2c_adap); 913 if (dev->fe) { 914 dev->fe->ops.set_voltage = dm1105_set_voltage; 915 dvb_attach(stb6000_attach, dev->fe, 0x61, 916 &dev->i2c_adap); 917 break; 918 } 919 920 dev->fe = dvb_attach( 921 si21xx_attach, &serit_config, 922 &dev->i2c_adap); 923 if (dev->fe) 924 dev->fe->ops.set_voltage = dm1105_set_voltage; 925 926 } 927 928 if (!dev->fe) { 929 dev_err(&dev->pdev->dev, "could not attach frontend\n"); 930 return -ENODEV; 931 } 932 933 ret = dvb_register_frontend(&dev->dvb_adapter, dev->fe); 934 if (ret < 0) { 935 if (dev->fe->ops.release) 936 dev->fe->ops.release(dev->fe); 937 dev->fe = NULL; 938 return ret; 939 } 940 941 return 0; 942 } 943 944 static void dm1105_read_mac(struct dm1105_dev *dev, u8 *mac) 945 { 946 static u8 command[1] = { 0x28 }; 947 948 struct i2c_msg msg[] = { 949 { 950 .addr = IIC_24C01_addr >> 1, 951 .flags = 0, 952 .buf = command, 953 .len = 1 954 }, { 955 .addr = IIC_24C01_addr >> 1, 956 .flags = I2C_M_RD, 957 .buf = mac, 958 .len = 6 959 }, 960 }; 961 962 dm1105_i2c_xfer(&dev->i2c_adap, msg , 2); 963 dev_info(&dev->pdev->dev, "MAC %pM\n", mac); 964 } 965 966 static int dm1105_probe(struct pci_dev *pdev, 967 const struct pci_device_id *ent) 968 { 969 struct dm1105_dev *dev; 970 struct dvb_adapter *dvb_adapter; 971 struct dvb_demux *dvbdemux; 972 struct dmx_demux *dmx; 973 int ret = -ENOMEM; 974 int i; 975 976 if (dm1105_devcount >= ARRAY_SIZE(card)) 977 return -ENODEV; 978 979 dev = kzalloc(sizeof(struct dm1105_dev), GFP_KERNEL); 980 if (!dev) 981 return -ENOMEM; 982 983 /* board config */ 984 dev->nr = dm1105_devcount; 985 dev->boardnr = UNSET; 986 if (card[dev->nr] < ARRAY_SIZE(dm1105_boards)) 987 dev->boardnr = card[dev->nr]; 988 for (i = 0; UNSET == dev->boardnr && 989 i < ARRAY_SIZE(dm1105_subids); i++) 990 if (pdev->subsystem_vendor == 991 dm1105_subids[i].subvendor && 992 pdev->subsystem_device == 993 dm1105_subids[i].subdevice) 994 dev->boardnr = dm1105_subids[i].card; 995 996 if (UNSET == dev->boardnr) { 997 dev->boardnr = DM1105_BOARD_UNKNOWN; 998 dm1105_card_list(pdev); 999 } 1000 1001 dm1105_devcount++; 1002 dev->pdev = pdev; 1003 dev->buffer_size = 5 * DM1105_DMA_BYTES; 1004 dev->PacketErrorCount = 0; 1005 dev->dmarst = 0; 1006 1007 ret = pci_enable_device(pdev); 1008 if (ret < 0) 1009 goto err_kfree; 1010 1011 ret = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); 1012 if (ret < 0) 1013 goto err_pci_disable_device; 1014 1015 pci_set_master(pdev); 1016 1017 ret = pci_request_regions(pdev, DRIVER_NAME); 1018 if (ret < 0) 1019 goto err_pci_disable_device; 1020 1021 dev->io_mem = pci_iomap(pdev, 0, pci_resource_len(pdev, 0)); 1022 if (!dev->io_mem) { 1023 ret = -EIO; 1024 goto err_pci_release_regions; 1025 } 1026 1027 spin_lock_init(&dev->lock); 1028 pci_set_drvdata(pdev, dev); 1029 1030 ret = dm1105_hw_init(dev); 1031 if (ret < 0) 1032 goto err_pci_iounmap; 1033 1034 /* i2c */ 1035 i2c_set_adapdata(&dev->i2c_adap, dev); 1036 strscpy(dev->i2c_adap.name, DRIVER_NAME, sizeof(dev->i2c_adap.name)); 1037 dev->i2c_adap.owner = THIS_MODULE; 1038 dev->i2c_adap.dev.parent = &pdev->dev; 1039 dev->i2c_adap.algo = &dm1105_algo; 1040 dev->i2c_adap.algo_data = dev; 1041 ret = i2c_add_adapter(&dev->i2c_adap); 1042 1043 if (ret < 0) 1044 goto err_dm1105_hw_exit; 1045 1046 i2c_set_adapdata(&dev->i2c_bb_adap, dev); 1047 strscpy(dev->i2c_bb_adap.name, DM1105_I2C_GPIO_NAME, 1048 sizeof(dev->i2c_bb_adap.name)); 1049 dev->i2c_bb_adap.owner = THIS_MODULE; 1050 dev->i2c_bb_adap.dev.parent = &pdev->dev; 1051 dev->i2c_bb_adap.algo_data = &dev->i2c_bit; 1052 dev->i2c_bit.data = dev; 1053 dev->i2c_bit.setsda = dm1105_setsda; 1054 dev->i2c_bit.setscl = dm1105_setscl; 1055 dev->i2c_bit.getsda = dm1105_getsda; 1056 dev->i2c_bit.getscl = dm1105_getscl; 1057 dev->i2c_bit.udelay = 10; 1058 dev->i2c_bit.timeout = 10; 1059 1060 /* Raise SCL and SDA */ 1061 dm1105_setsda(dev, 1); 1062 dm1105_setscl(dev, 1); 1063 1064 ret = i2c_bit_add_bus(&dev->i2c_bb_adap); 1065 if (ret < 0) 1066 goto err_i2c_del_adapter; 1067 1068 /* dvb */ 1069 ret = dvb_register_adapter(&dev->dvb_adapter, DRIVER_NAME, 1070 THIS_MODULE, &pdev->dev, adapter_nr); 1071 if (ret < 0) 1072 goto err_i2c_del_adapters; 1073 1074 dvb_adapter = &dev->dvb_adapter; 1075 1076 dm1105_read_mac(dev, dvb_adapter->proposed_mac); 1077 1078 dvbdemux = &dev->demux; 1079 dvbdemux->filternum = 256; 1080 dvbdemux->feednum = 256; 1081 dvbdemux->start_feed = dm1105_start_feed; 1082 dvbdemux->stop_feed = dm1105_stop_feed; 1083 dvbdemux->dmx.capabilities = (DMX_TS_FILTERING | 1084 DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING); 1085 ret = dvb_dmx_init(dvbdemux); 1086 if (ret < 0) 1087 goto err_dvb_unregister_adapter; 1088 1089 dmx = &dvbdemux->dmx; 1090 dev->dmxdev.filternum = 256; 1091 dev->dmxdev.demux = dmx; 1092 dev->dmxdev.capabilities = 0; 1093 1094 ret = dvb_dmxdev_init(&dev->dmxdev, dvb_adapter); 1095 if (ret < 0) 1096 goto err_dvb_dmx_release; 1097 1098 dev->hw_frontend.source = DMX_FRONTEND_0; 1099 1100 ret = dmx->add_frontend(dmx, &dev->hw_frontend); 1101 if (ret < 0) 1102 goto err_dvb_dmxdev_release; 1103 1104 dev->mem_frontend.source = DMX_MEMORY_FE; 1105 1106 ret = dmx->add_frontend(dmx, &dev->mem_frontend); 1107 if (ret < 0) 1108 goto err_remove_hw_frontend; 1109 1110 ret = dmx->connect_frontend(dmx, &dev->hw_frontend); 1111 if (ret < 0) 1112 goto err_remove_mem_frontend; 1113 1114 ret = dvb_net_init(dvb_adapter, &dev->dvbnet, dmx); 1115 if (ret < 0) 1116 goto err_disconnect_frontend; 1117 1118 ret = frontend_init(dev); 1119 if (ret < 0) 1120 goto err_dvb_net; 1121 1122 dm1105_ir_init(dev); 1123 1124 INIT_WORK(&dev->work, dm1105_dmx_buffer); 1125 sprintf(dev->wqn, "%s/%d", dvb_adapter->name, dvb_adapter->num); 1126 dev->wq = create_singlethread_workqueue(dev->wqn); 1127 if (!dev->wq) { 1128 ret = -ENOMEM; 1129 goto err_dvb_net; 1130 } 1131 1132 ret = request_irq(pdev->irq, dm1105_irq, IRQF_SHARED, 1133 DRIVER_NAME, dev); 1134 if (ret < 0) 1135 goto err_workqueue; 1136 1137 return 0; 1138 1139 err_workqueue: 1140 destroy_workqueue(dev->wq); 1141 err_dvb_net: 1142 dvb_net_release(&dev->dvbnet); 1143 err_disconnect_frontend: 1144 dmx->disconnect_frontend(dmx); 1145 err_remove_mem_frontend: 1146 dmx->remove_frontend(dmx, &dev->mem_frontend); 1147 err_remove_hw_frontend: 1148 dmx->remove_frontend(dmx, &dev->hw_frontend); 1149 err_dvb_dmxdev_release: 1150 dvb_dmxdev_release(&dev->dmxdev); 1151 err_dvb_dmx_release: 1152 dvb_dmx_release(dvbdemux); 1153 err_dvb_unregister_adapter: 1154 dvb_unregister_adapter(dvb_adapter); 1155 err_i2c_del_adapters: 1156 i2c_del_adapter(&dev->i2c_bb_adap); 1157 err_i2c_del_adapter: 1158 i2c_del_adapter(&dev->i2c_adap); 1159 err_dm1105_hw_exit: 1160 dm1105_hw_exit(dev); 1161 err_pci_iounmap: 1162 pci_iounmap(pdev, dev->io_mem); 1163 err_pci_release_regions: 1164 pci_release_regions(pdev); 1165 err_pci_disable_device: 1166 pci_disable_device(pdev); 1167 err_kfree: 1168 kfree(dev); 1169 return ret; 1170 } 1171 1172 static void dm1105_remove(struct pci_dev *pdev) 1173 { 1174 struct dm1105_dev *dev = pci_get_drvdata(pdev); 1175 struct dvb_adapter *dvb_adapter = &dev->dvb_adapter; 1176 struct dvb_demux *dvbdemux = &dev->demux; 1177 struct dmx_demux *dmx = &dvbdemux->dmx; 1178 1179 dm1105_ir_exit(dev); 1180 dmx->close(dmx); 1181 dvb_net_release(&dev->dvbnet); 1182 if (dev->fe) 1183 dvb_unregister_frontend(dev->fe); 1184 1185 dmx->disconnect_frontend(dmx); 1186 dmx->remove_frontend(dmx, &dev->mem_frontend); 1187 dmx->remove_frontend(dmx, &dev->hw_frontend); 1188 dvb_dmxdev_release(&dev->dmxdev); 1189 dvb_dmx_release(dvbdemux); 1190 dvb_unregister_adapter(dvb_adapter); 1191 i2c_del_adapter(&dev->i2c_adap); 1192 1193 dm1105_hw_exit(dev); 1194 free_irq(pdev->irq, dev); 1195 pci_iounmap(pdev, dev->io_mem); 1196 pci_release_regions(pdev); 1197 pci_disable_device(pdev); 1198 dm1105_devcount--; 1199 kfree(dev); 1200 } 1201 1202 static const struct pci_device_id dm1105_id_table[] = { 1203 { 1204 .vendor = PCI_VENDOR_ID_TRIGEM, 1205 .device = PCI_DEVICE_ID_DM1105, 1206 .subvendor = PCI_ANY_ID, 1207 .subdevice = PCI_ANY_ID, 1208 }, { 1209 .vendor = PCI_VENDOR_ID_AXESS, 1210 .device = PCI_DEVICE_ID_DM05, 1211 .subvendor = PCI_ANY_ID, 1212 .subdevice = PCI_ANY_ID, 1213 }, { 1214 /* empty */ 1215 }, 1216 }; 1217 1218 MODULE_DEVICE_TABLE(pci, dm1105_id_table); 1219 1220 static struct pci_driver dm1105_driver = { 1221 .name = DRIVER_NAME, 1222 .id_table = dm1105_id_table, 1223 .probe = dm1105_probe, 1224 .remove = dm1105_remove, 1225 }; 1226 1227 module_pci_driver(dm1105_driver); 1228 1229 MODULE_AUTHOR("Igor M. Liplianin <liplianin@me.by>"); 1230 MODULE_DESCRIPTION("SDMC DM1105 DVB driver"); 1231 MODULE_LICENSE("GPL"); 1232