1 /*
2  * ddbridge.h: Digital Devices PCIe bridge driver
3  *
4  * Copyright (C) 2010-2017 Digital Devices GmbH
5  *                         Ralph Metzler <rmetzler@digitaldevices.de>
6  *
7  * This program is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU General Public License
9  * version 2 only, as published by the Free Software Foundation.
10  *
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  * To obtain the license, point your browser to
18  * http://www.gnu.org/copyleft/gpl.html
19  */
20 
21 #ifndef _DDBRIDGE_H_
22 #define _DDBRIDGE_H_
23 
24 #include <linux/module.h>
25 #include <linux/init.h>
26 #include <linux/interrupt.h>
27 #include <linux/delay.h>
28 #include <linux/slab.h>
29 #include <linux/poll.h>
30 #include <linux/io.h>
31 #include <linux/pci.h>
32 #include <linux/timer.h>
33 #include <linux/i2c.h>
34 #include <linux/swab.h>
35 #include <linux/vmalloc.h>
36 #include <linux/workqueue.h>
37 #include <linux/kthread.h>
38 #include <linux/platform_device.h>
39 #include <linux/clk.h>
40 #include <linux/spi/spi.h>
41 #include <linux/gpio.h>
42 #include <linux/completion.h>
43 
44 #include <linux/types.h>
45 #include <linux/sched.h>
46 #include <linux/interrupt.h>
47 #include <linux/mutex.h>
48 #include <asm/dma.h>
49 #include <asm/irq.h>
50 #include <linux/io.h>
51 #include <linux/uaccess.h>
52 
53 #include <linux/dvb/ca.h>
54 #include <linux/socket.h>
55 #include <linux/device.h>
56 #include <linux/io.h>
57 
58 #include "dmxdev.h"
59 #include "dvbdev.h"
60 #include "dvb_demux.h"
61 #include "dvb_frontend.h"
62 #include "dvb_ringbuffer.h"
63 #include "dvb_ca_en50221.h"
64 #include "dvb_net.h"
65 
66 #define DDBRIDGE_VERSION "0.9.31intermediate-integrated"
67 
68 #define DDB_MAX_I2C    32
69 #define DDB_MAX_PORT   32
70 #define DDB_MAX_INPUT  64
71 #define DDB_MAX_OUTPUT 32
72 #define DDB_MAX_LINK    4
73 #define DDB_LINK_SHIFT 28
74 
75 #define DDB_LINK_TAG(_x) (_x << DDB_LINK_SHIFT)
76 
77 struct ddb_regset {
78 	u32 base;
79 	u32 num;
80 	u32 size;
81 };
82 
83 struct ddb_regmap {
84 	u32 irq_base_i2c;
85 	u32 irq_base_idma;
86 	u32 irq_base_odma;
87 
88 	const struct ddb_regset *i2c;
89 	const struct ddb_regset *i2c_buf;
90 	const struct ddb_regset *idma;
91 	const struct ddb_regset *idma_buf;
92 	const struct ddb_regset *odma;
93 	const struct ddb_regset *odma_buf;
94 
95 	const struct ddb_regset *input;
96 	const struct ddb_regset *output;
97 
98 	const struct ddb_regset *channel;
99 };
100 
101 struct ddb_ids {
102 	u16 vendor;
103 	u16 device;
104 	u16 subvendor;
105 	u16 subdevice;
106 
107 	u32 hwid;
108 	u32 regmapid;
109 	u32 devid;
110 	u32 mac;
111 };
112 
113 struct ddb_info {
114 	int   type;
115 #define DDB_NONE         0
116 #define DDB_OCTOPUS      1
117 #define DDB_OCTOPUS_CI   2
118 #define DDB_OCTOPUS_MAX  5
119 #define DDB_OCTOPUS_MAX_CT  6
120 	char *name;
121 	u32   i2c_mask;
122 	u8    port_num;
123 	u8    led_num;
124 	u8    fan_num;
125 	u8    temp_num;
126 	u8    temp_bus;
127 	u32   board_control;
128 	u32   board_control_2;
129 	u8    mdio_num;
130 	u8    con_clock; /* use a continuous clock */
131 	u8    ts_quirks;
132 #define TS_QUIRK_SERIAL   1
133 #define TS_QUIRK_REVERSED 2
134 #define TS_QUIRK_ALT_OSC  8
135 	u32   tempmon_irq;
136 	const struct ddb_regmap *regmap;
137 };
138 
139 /* DMA_SIZE MUST be smaller than 256k and
140  * MUST be divisible by 188 and 128 !!!
141  */
142 
143 #define DMA_MAX_BUFS 32      /* hardware table limit */
144 
145 #define INPUT_DMA_BUFS 8
146 #define INPUT_DMA_SIZE (128*47*21)
147 #define INPUT_DMA_IRQ_DIV 1
148 
149 #define OUTPUT_DMA_BUFS 8
150 #define OUTPUT_DMA_SIZE (128*47*21)
151 #define OUTPUT_DMA_IRQ_DIV 1
152 
153 struct ddb;
154 struct ddb_port;
155 
156 struct ddb_dma {
157 	void                  *io;
158 	u32                    regs;
159 	u32                    bufregs;
160 
161 	dma_addr_t             pbuf[DMA_MAX_BUFS];
162 	u8                    *vbuf[DMA_MAX_BUFS];
163 	u32                    num;
164 	u32                    size;
165 	u32                    div;
166 	u32                    bufval;
167 
168 	struct work_struct     work;
169 	spinlock_t             lock;
170 	wait_queue_head_t      wq;
171 	int                    running;
172 	u32                    stat;
173 	u32                    ctrl;
174 	u32                    cbuf;
175 	u32                    coff;
176 };
177 
178 struct ddb_dvb {
179 	struct dvb_adapter    *adap;
180 	int                    adap_registered;
181 	struct dvb_device     *dev;
182 	struct i2c_client     *i2c_client[1];
183 	struct dvb_frontend   *fe;
184 	struct dvb_frontend   *fe2;
185 	struct dmxdev          dmxdev;
186 	struct dvb_demux       demux;
187 	struct dvb_net         dvbnet;
188 	struct dmx_frontend    hw_frontend;
189 	struct dmx_frontend    mem_frontend;
190 	int                    users;
191 	u32                    attached;
192 	u8                     input;
193 
194 	enum fe_sec_tone_mode  tone;
195 	enum fe_sec_voltage    voltage;
196 
197 	int (*i2c_gate_ctrl)(struct dvb_frontend *, int);
198 	int (*set_voltage)(struct dvb_frontend *fe,
199 		enum fe_sec_voltage voltage);
200 	int (*set_input)(struct dvb_frontend *fe, int input);
201 	int (*diseqc_send_master_cmd)(struct dvb_frontend *fe,
202 		struct dvb_diseqc_master_cmd *cmd);
203 };
204 
205 struct ddb_ci {
206 	struct dvb_ca_en50221  en;
207 	struct ddb_port       *port;
208 	u32                    nr;
209 	struct mutex           lock;
210 };
211 
212 struct ddb_io {
213 	struct ddb_port       *port;
214 	u32                    nr;
215 	u32                    regs;
216 	struct ddb_dma        *dma;
217 	struct ddb_io         *redo;
218 	struct ddb_io         *redi;
219 };
220 
221 #define ddb_output ddb_io
222 #define ddb_input ddb_io
223 
224 struct ddb_i2c {
225 	struct ddb            *dev;
226 	u32                    nr;
227 	u32                    regs;
228 	u32                    link;
229 	struct i2c_adapter     adap;
230 	u32                    rbuf;
231 	u32                    wbuf;
232 	u32                    bsize;
233 	struct completion      completion;
234 };
235 
236 struct ddb_port {
237 	struct ddb            *dev;
238 	u32                    nr;
239 	u32                    pnr;
240 	u32                    regs;
241 	u32                    lnr;
242 	struct ddb_i2c        *i2c;
243 	struct mutex           i2c_gate_lock;
244 	u32                    class;
245 #define DDB_PORT_NONE           0
246 #define DDB_PORT_CI             1
247 #define DDB_PORT_TUNER          2
248 #define DDB_PORT_LOOP           3
249 	char                   *name;
250 	char                   *type_name;
251 	u32                     type;
252 #define DDB_TUNER_NONE           0
253 #define DDB_TUNER_DVBS_ST        1
254 #define DDB_TUNER_DVBS_ST_AA     2
255 #define DDB_TUNER_DVBCT_TR       3
256 #define DDB_TUNER_DVBCT_ST       4
257 #define DDB_CI_INTERNAL          5
258 #define DDB_CI_EXTERNAL_SONY     6
259 #define DDB_TUNER_DVBCT2_SONY_P  7
260 #define DDB_TUNER_DVBC2T2_SONY_P 8
261 #define DDB_TUNER_ISDBT_SONY_P   9
262 #define DDB_TUNER_DVBS_STV0910_P 10
263 #define DDB_TUNER_MXL5XX         11
264 #define DDB_CI_EXTERNAL_XO2      12
265 #define DDB_CI_EXTERNAL_XO2_B    13
266 #define DDB_TUNER_DVBS_STV0910_PR 14
267 #define DDB_TUNER_DVBC2T2I_SONY_P 15
268 
269 #define DDB_TUNER_XO2            32
270 #define DDB_TUNER_DVBS_STV0910   (DDB_TUNER_XO2 + 0)
271 #define DDB_TUNER_DVBCT2_SONY    (DDB_TUNER_XO2 + 1)
272 #define DDB_TUNER_ISDBT_SONY     (DDB_TUNER_XO2 + 2)
273 #define DDB_TUNER_DVBC2T2_SONY   (DDB_TUNER_XO2 + 3)
274 #define DDB_TUNER_ATSC_ST        (DDB_TUNER_XO2 + 4)
275 #define DDB_TUNER_DVBC2T2I_SONY  (DDB_TUNER_XO2 + 5)
276 
277 	struct ddb_input      *input[2];
278 	struct ddb_output     *output;
279 	struct dvb_ca_en50221 *en;
280 	struct ddb_dvb         dvb[2];
281 	u32                    gap;
282 	u32                    obr;
283 	u8                     creg;
284 };
285 
286 #define CM_STARTUP_DELAY 2
287 #define CM_AVERAGE  20
288 #define CM_GAIN     10
289 
290 #define HW_LSB_SHIFT    12
291 #define HW_LSB_MASK     0x1000
292 
293 #define CM_IDLE    0
294 #define CM_STARTUP 1
295 #define CM_ADJUST  2
296 
297 #define TS_CAPTURE_LEN  (4096)
298 
299 struct ddb_lnb {
300 	struct mutex           lock;
301 	u32                    tone;
302 	enum fe_sec_voltage    oldvoltage[4];
303 	u32                    voltage[4];
304 	u32                    voltages;
305 	u32                    fmode;
306 };
307 
308 struct ddb_link {
309 	struct ddb            *dev;
310 	const struct ddb_info *info;
311 	u32                    nr;
312 	u32                    regs;
313 	spinlock_t             lock;
314 	struct mutex           flash_mutex;
315 	struct ddb_lnb         lnb;
316 	struct tasklet_struct  tasklet;
317 	struct ddb_ids         ids;
318 
319 	spinlock_t             temp_lock;
320 	int                    overtemperature_error;
321 	u8                     temp_tab[11];
322 };
323 
324 struct ddb {
325 	struct pci_dev        *pdev;
326 	struct platform_device *pfdev;
327 	struct device         *dev;
328 
329 	int                    msi;
330 	struct workqueue_struct *wq;
331 	u32                    has_dma;
332 
333 	struct ddb_link        link[DDB_MAX_LINK];
334 	unsigned char __iomem *regs;
335 	u32                    regs_len;
336 	u32                    port_num;
337 	struct ddb_port        port[DDB_MAX_PORT];
338 	u32                    i2c_num;
339 	struct ddb_i2c         i2c[DDB_MAX_I2C];
340 	struct ddb_input       input[DDB_MAX_INPUT];
341 	struct ddb_output      output[DDB_MAX_OUTPUT];
342 	struct dvb_adapter     adap[DDB_MAX_INPUT];
343 	struct ddb_dma         idma[DDB_MAX_INPUT];
344 	struct ddb_dma         odma[DDB_MAX_OUTPUT];
345 
346 	void                   (*handler[4][256])(unsigned long);
347 	unsigned long          handler_data[4][256];
348 
349 	struct device         *ddb_dev;
350 	u32                    ddb_dev_users;
351 	u32                    nr;
352 	u8                     iobuf[1028];
353 
354 	u8                     leds;
355 	u32                    ts_irq;
356 	u32                    i2c_irq;
357 
358 	struct mutex           mutex;
359 
360 	u8                     tsbuf[TS_CAPTURE_LEN];
361 };
362 
363 /****************************************************************************/
364 /****************************************************************************/
365 /****************************************************************************/
366 
367 int ddbridge_flashread(struct ddb *dev, u32 link, u8 *buf, u32 addr, u32 len);
368 
369 /****************************************************************************/
370 
371 /* ddbridge-main.c (modparams) */
372 extern int ci_bitrate;
373 extern int ts_loop;
374 extern int xo2_speed;
375 extern int alt_dma;
376 extern int no_init;
377 extern int stv0910_single;
378 extern struct workqueue_struct *ddb_wq;
379 
380 /* ddbridge-core.c */
381 void ddb_ports_detach(struct ddb *dev);
382 void ddb_ports_release(struct ddb *dev);
383 void ddb_buffers_free(struct ddb *dev);
384 void ddb_device_destroy(struct ddb *dev);
385 irqreturn_t ddb_irq_handler0(int irq, void *dev_id);
386 irqreturn_t ddb_irq_handler1(int irq, void *dev_id);
387 irqreturn_t ddb_irq_handler(int irq, void *dev_id);
388 void ddb_ports_init(struct ddb *dev);
389 int ddb_buffers_alloc(struct ddb *dev);
390 int ddb_ports_attach(struct ddb *dev);
391 int ddb_device_create(struct ddb *dev);
392 int ddb_class_create(void);
393 void ddb_class_destroy(void);
394 int ddb_init(struct ddb *dev);
395 void ddb_unmap(struct ddb *dev);
396 
397 #endif /* DDBRIDGE_H */
398