1 /* 2 * ddbridge.c: Digital Devices PCIe bridge driver 3 * 4 * Copyright (C) 2010-2017 Digital Devices GmbH 5 * Ralph Metzler <rjkm@metzlerbros.de> 6 * Marcus Metzler <mocm@metzlerbros.de> 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License 10 * version 2 only, as published by the Free Software Foundation. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 */ 18 19 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 20 21 #include <linux/module.h> 22 #include <linux/init.h> 23 #include <linux/interrupt.h> 24 #include <linux/delay.h> 25 #include <linux/slab.h> 26 #include <linux/poll.h> 27 #include <linux/io.h> 28 #include <linux/pci.h> 29 #include <linux/pci_ids.h> 30 #include <linux/timer.h> 31 #include <linux/i2c.h> 32 #include <linux/swab.h> 33 #include <linux/vmalloc.h> 34 35 #include "ddbridge.h" 36 #include "ddbridge-i2c.h" 37 #include "ddbridge-regs.h" 38 #include "ddbridge-hw.h" 39 #include "ddbridge-io.h" 40 41 /****************************************************************************/ 42 /* module parameters */ 43 44 #ifdef CONFIG_PCI_MSI 45 #ifdef CONFIG_DVB_DDBRIDGE_MSIENABLE 46 static int msi = 1; 47 #else 48 static int msi; 49 #endif 50 module_param(msi, int, 0444); 51 #ifdef CONFIG_DVB_DDBRIDGE_MSIENABLE 52 MODULE_PARM_DESC(msi, "Control MSI interrupts: 0-disable, 1-enable (default)"); 53 #else 54 MODULE_PARM_DESC(msi, "Control MSI interrupts: 0-disable (default), 1-enable"); 55 #endif 56 #endif 57 58 int ci_bitrate = 70000; 59 module_param(ci_bitrate, int, 0444); 60 MODULE_PARM_DESC(ci_bitrate, " Bitrate in KHz for output to CI."); 61 62 int ts_loop = -1; 63 module_param(ts_loop, int, 0444); 64 MODULE_PARM_DESC(ts_loop, "TS in/out test loop on port ts_loop"); 65 66 int xo2_speed = 2; 67 module_param(xo2_speed, int, 0444); 68 MODULE_PARM_DESC(xo2_speed, "default transfer speed for xo2 based duoflex, 0=55,1=75,2=90,3=104 MBit/s, default=2, use attribute to change for individual cards"); 69 70 #ifdef __arm__ 71 int alt_dma = 1; 72 #else 73 int alt_dma; 74 #endif 75 module_param(alt_dma, int, 0444); 76 MODULE_PARM_DESC(alt_dma, "use alternative DMA buffer handling"); 77 78 int no_init; 79 module_param(no_init, int, 0444); 80 MODULE_PARM_DESC(no_init, "do not initialize most devices"); 81 82 int stv0910_single; 83 module_param(stv0910_single, int, 0444); 84 MODULE_PARM_DESC(stv0910_single, "use stv0910 cards as single demods"); 85 86 /****************************************************************************/ 87 /****************************************************************************/ 88 /****************************************************************************/ 89 90 static void ddb_irq_disable(struct ddb *dev) 91 { 92 ddbwritel(dev, 0, INTERRUPT_ENABLE); 93 ddbwritel(dev, 0, MSI1_ENABLE); 94 } 95 96 static void ddb_irq_exit(struct ddb *dev) 97 { 98 ddb_irq_disable(dev); 99 if (dev->msi == 2) 100 free_irq(dev->pdev->irq + 1, dev); 101 free_irq(dev->pdev->irq, dev); 102 #ifdef CONFIG_PCI_MSI 103 if (dev->msi) 104 pci_disable_msi(dev->pdev); 105 #endif 106 } 107 108 static void ddb_remove(struct pci_dev *pdev) 109 { 110 struct ddb *dev = (struct ddb *)pci_get_drvdata(pdev); 111 112 ddb_device_destroy(dev); 113 ddb_ports_detach(dev); 114 ddb_i2c_release(dev); 115 116 ddb_irq_exit(dev); 117 ddb_ports_release(dev); 118 ddb_buffers_free(dev); 119 120 ddb_unmap(dev); 121 pci_set_drvdata(pdev, NULL); 122 pci_disable_device(pdev); 123 } 124 125 #ifdef CONFIG_PCI_MSI 126 static void ddb_irq_msi(struct ddb *dev, int nr) 127 { 128 int stat; 129 130 if (msi && pci_msi_enabled()) { 131 stat = pci_alloc_irq_vectors(dev->pdev, 1, nr, PCI_IRQ_MSI); 132 if (stat >= 1) { 133 dev->msi = stat; 134 dev_info(dev->dev, "using %d MSI interrupt(s)\n", 135 dev->msi); 136 } else { 137 dev_info(dev->dev, "MSI not available.\n"); 138 } 139 } 140 } 141 #endif 142 143 static int ddb_irq_init(struct ddb *dev) 144 { 145 int stat; 146 int irq_flag = IRQF_SHARED; 147 148 ddbwritel(dev, 0x00000000, INTERRUPT_ENABLE); 149 ddbwritel(dev, 0x00000000, MSI1_ENABLE); 150 ddbwritel(dev, 0x00000000, MSI2_ENABLE); 151 ddbwritel(dev, 0x00000000, MSI3_ENABLE); 152 ddbwritel(dev, 0x00000000, MSI4_ENABLE); 153 ddbwritel(dev, 0x00000000, MSI5_ENABLE); 154 ddbwritel(dev, 0x00000000, MSI6_ENABLE); 155 ddbwritel(dev, 0x00000000, MSI7_ENABLE); 156 157 #ifdef CONFIG_PCI_MSI 158 ddb_irq_msi(dev, 2); 159 160 if (dev->msi) 161 irq_flag = 0; 162 if (dev->msi == 2) { 163 stat = request_irq(dev->pdev->irq, ddb_irq_handler0, 164 irq_flag, "ddbridge", (void *)dev); 165 if (stat < 0) 166 return stat; 167 stat = request_irq(dev->pdev->irq + 1, ddb_irq_handler1, 168 irq_flag, "ddbridge", (void *)dev); 169 if (stat < 0) { 170 free_irq(dev->pdev->irq, dev); 171 return stat; 172 } 173 } else 174 #endif 175 { 176 stat = request_irq(dev->pdev->irq, ddb_irq_handler, 177 irq_flag, "ddbridge", (void *)dev); 178 if (stat < 0) 179 return stat; 180 } 181 if (dev->msi == 2) { 182 ddbwritel(dev, 0x0fffff00, INTERRUPT_ENABLE); 183 ddbwritel(dev, 0x0000000f, MSI1_ENABLE); 184 } else { 185 ddbwritel(dev, 0x0fffff0f, INTERRUPT_ENABLE); 186 ddbwritel(dev, 0x00000000, MSI1_ENABLE); 187 } 188 return stat; 189 } 190 191 static int ddb_probe(struct pci_dev *pdev, 192 const struct pci_device_id *id) 193 { 194 struct ddb *dev; 195 int stat = 0; 196 197 if (pci_enable_device(pdev) < 0) 198 return -ENODEV; 199 200 pci_set_master(pdev); 201 202 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) 203 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) 204 return -ENODEV; 205 206 dev = vzalloc(sizeof(*dev)); 207 if (!dev) 208 return -ENOMEM; 209 210 mutex_init(&dev->mutex); 211 dev->has_dma = 1; 212 dev->pdev = pdev; 213 dev->dev = &pdev->dev; 214 pci_set_drvdata(pdev, dev); 215 216 dev->link[0].ids.vendor = id->vendor; 217 dev->link[0].ids.device = id->device; 218 dev->link[0].ids.subvendor = id->subvendor; 219 dev->link[0].ids.subdevice = pdev->subsystem_device; 220 221 dev->link[0].dev = dev; 222 dev->link[0].info = get_ddb_info(id->vendor, id->device, 223 id->subvendor, pdev->subsystem_device); 224 225 dev_info(&pdev->dev, "detected %s\n", dev->link[0].info->name); 226 227 dev->regs_len = pci_resource_len(dev->pdev, 0); 228 dev->regs = ioremap(pci_resource_start(dev->pdev, 0), 229 pci_resource_len(dev->pdev, 0)); 230 231 if (!dev->regs) { 232 dev_err(&pdev->dev, "not enough memory for register map\n"); 233 stat = -ENOMEM; 234 goto fail; 235 } 236 if (ddbreadl(dev, 0) == 0xffffffff) { 237 dev_err(&pdev->dev, "cannot read registers\n"); 238 stat = -ENODEV; 239 goto fail; 240 } 241 242 dev->link[0].ids.hwid = ddbreadl(dev, 0); 243 dev->link[0].ids.regmapid = ddbreadl(dev, 4); 244 245 dev_info(&pdev->dev, "HW %08x REGMAP %08x\n", 246 dev->link[0].ids.hwid, dev->link[0].ids.regmapid); 247 248 ddbwritel(dev, 0, DMA_BASE_READ); 249 ddbwritel(dev, 0, DMA_BASE_WRITE); 250 251 stat = ddb_irq_init(dev); 252 if (stat < 0) 253 goto fail0; 254 255 if (ddb_init(dev) == 0) 256 return 0; 257 258 ddb_irq_exit(dev); 259 fail0: 260 dev_err(&pdev->dev, "fail0\n"); 261 if (dev->msi) 262 pci_disable_msi(dev->pdev); 263 fail: 264 dev_err(&pdev->dev, "fail\n"); 265 266 ddb_unmap(dev); 267 pci_set_drvdata(pdev, NULL); 268 pci_disable_device(pdev); 269 return -1; 270 } 271 272 /****************************************************************************/ 273 /****************************************************************************/ 274 /****************************************************************************/ 275 276 #define DDB_DEVICE_ANY(_device) \ 277 { PCI_DEVICE_SUB(DDVID, _device, DDVID, PCI_ANY_ID) } 278 279 static const struct pci_device_id ddb_id_table[] = { 280 DDB_DEVICE_ANY(0x0002), 281 DDB_DEVICE_ANY(0x0003), 282 DDB_DEVICE_ANY(0x0005), 283 DDB_DEVICE_ANY(0x0006), 284 DDB_DEVICE_ANY(0x0007), 285 DDB_DEVICE_ANY(0x0008), 286 DDB_DEVICE_ANY(0x0011), 287 DDB_DEVICE_ANY(0x0012), 288 DDB_DEVICE_ANY(0x0013), 289 DDB_DEVICE_ANY(0x0201), 290 DDB_DEVICE_ANY(0x0203), 291 DDB_DEVICE_ANY(0x0210), 292 DDB_DEVICE_ANY(0x0220), 293 DDB_DEVICE_ANY(0x0320), 294 DDB_DEVICE_ANY(0x0321), 295 DDB_DEVICE_ANY(0x0322), 296 DDB_DEVICE_ANY(0x0323), 297 DDB_DEVICE_ANY(0x0328), 298 DDB_DEVICE_ANY(0x0329), 299 {0} 300 }; 301 302 MODULE_DEVICE_TABLE(pci, ddb_id_table); 303 304 static struct pci_driver ddb_pci_driver = { 305 .name = "ddbridge", 306 .id_table = ddb_id_table, 307 .probe = ddb_probe, 308 .remove = ddb_remove, 309 }; 310 311 static __init int module_init_ddbridge(void) 312 { 313 int stat = -1; 314 315 pr_info("Digital Devices PCIE bridge driver " 316 DDBRIDGE_VERSION 317 ", Copyright (C) 2010-17 Digital Devices GmbH\n"); 318 if (ddb_class_create() < 0) 319 return -1; 320 ddb_wq = create_workqueue("ddbridge"); 321 if (!ddb_wq) 322 goto exit1; 323 stat = pci_register_driver(&ddb_pci_driver); 324 if (stat < 0) 325 goto exit2; 326 return stat; 327 exit2: 328 destroy_workqueue(ddb_wq); 329 exit1: 330 ddb_class_destroy(); 331 return stat; 332 } 333 334 static __exit void module_exit_ddbridge(void) 335 { 336 pci_unregister_driver(&ddb_pci_driver); 337 destroy_workqueue(ddb_wq); 338 ddb_class_destroy(); 339 } 340 341 module_init(module_init_ddbridge); 342 module_exit(module_exit_ddbridge); 343 344 MODULE_DESCRIPTION("Digital Devices PCIe Bridge"); 345 MODULE_AUTHOR("Ralph and Marcus Metzler, Metzler Brothers Systementwicklung GbR"); 346 MODULE_LICENSE("GPL"); 347 MODULE_VERSION(DDBRIDGE_VERSION); 348