1 /* 2 * ddbridge-core.c: Digital Devices bridge core functions 3 * 4 * Copyright (C) 2010-2017 Digital Devices GmbH 5 * Marcus Metzler <mocm@metzlerbros.de> 6 * Ralph Metzler <rjkm@metzlerbros.de> 7 * 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License 11 * version 2 only, as published by the Free Software Foundation. 12 * 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * To obtain the license, point your browser to 20 * http://www.gnu.org/copyleft/gpl.html 21 */ 22 23 #include <linux/module.h> 24 #include <linux/init.h> 25 #include <linux/interrupt.h> 26 #include <linux/delay.h> 27 #include <linux/slab.h> 28 #include <linux/poll.h> 29 #include <linux/io.h> 30 #include <linux/pci.h> 31 #include <linux/pci_ids.h> 32 #include <linux/timer.h> 33 #include <linux/i2c.h> 34 #include <linux/swab.h> 35 #include <linux/vmalloc.h> 36 37 #include "ddbridge.h" 38 #include "ddbridge-i2c.h" 39 #include "ddbridge-regs.h" 40 #include "ddbridge-max.h" 41 #include "ddbridge-ci.h" 42 #include "ddbridge-io.h" 43 44 #include "tda18271c2dd.h" 45 #include "stv6110x.h" 46 #include "stv090x.h" 47 #include "lnbh24.h" 48 #include "drxk.h" 49 #include "stv0367.h" 50 #include "stv0367_priv.h" 51 #include "cxd2841er.h" 52 #include "tda18212.h" 53 #include "stv0910.h" 54 #include "stv6111.h" 55 #include "lnbh25.h" 56 #include "cxd2099.h" 57 #include "dvb_dummy_fe.h" 58 59 /****************************************************************************/ 60 61 #define DDB_MAX_ADAPTER 64 62 63 /****************************************************************************/ 64 65 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr); 66 67 static int adapter_alloc; 68 module_param(adapter_alloc, int, 0444); 69 MODULE_PARM_DESC(adapter_alloc, 70 "0-one adapter per io, 1-one per tab with io, 2-one per tab, 3-one for all"); 71 72 static int ci_bitrate = 70000; 73 module_param(ci_bitrate, int, 0444); 74 MODULE_PARM_DESC(ci_bitrate, " Bitrate in KHz for output to CI."); 75 76 static int ts_loop = -1; 77 module_param(ts_loop, int, 0444); 78 MODULE_PARM_DESC(ts_loop, "TS in/out test loop on port ts_loop"); 79 80 static int xo2_speed = 2; 81 module_param(xo2_speed, int, 0444); 82 MODULE_PARM_DESC(xo2_speed, "default transfer speed for xo2 based duoflex, 0=55,1=75,2=90,3=104 MBit/s, default=2, use attribute to change for individual cards"); 83 84 #ifdef __arm__ 85 static int alt_dma = 1; 86 #else 87 static int alt_dma; 88 #endif 89 module_param(alt_dma, int, 0444); 90 MODULE_PARM_DESC(alt_dma, "use alternative DMA buffer handling"); 91 92 static int no_init; 93 module_param(no_init, int, 0444); 94 MODULE_PARM_DESC(no_init, "do not initialize most devices"); 95 96 static int stv0910_single; 97 module_param(stv0910_single, int, 0444); 98 MODULE_PARM_DESC(stv0910_single, "use stv0910 cards as single demods"); 99 100 static int dma_buf_num = 8; 101 module_param(dma_buf_num, int, 0444); 102 MODULE_PARM_DESC(dma_buf_num, "Number of DMA buffers, possible values: 8-32"); 103 104 static int dma_buf_size = 21; 105 module_param(dma_buf_size, int, 0444); 106 MODULE_PARM_DESC(dma_buf_size, 107 "DMA buffer size as multiple of 128*47, possible values: 1-43"); 108 109 static int dummy_tuner; 110 module_param(dummy_tuner, int, 0444); 111 MODULE_PARM_DESC(dummy_tuner, 112 "attach dummy tuner to port 0 on Octopus V3 or Octopus Mini cards"); 113 114 /****************************************************************************/ 115 116 static DEFINE_MUTEX(redirect_lock); 117 118 static struct workqueue_struct *ddb_wq; 119 120 static struct ddb *ddbs[DDB_MAX_ADAPTER]; 121 122 /****************************************************************************/ 123 /****************************************************************************/ 124 /****************************************************************************/ 125 126 struct ddb_irq *ddb_irq_set(struct ddb *dev, u32 link, u32 nr, 127 void (*handler)(void *), void *data) 128 { 129 struct ddb_irq *irq = &dev->link[link].irq[nr]; 130 131 irq->handler = handler; 132 irq->data = data; 133 return irq; 134 } 135 136 static void ddb_set_dma_table(struct ddb_io *io) 137 { 138 struct ddb *dev = io->port->dev; 139 struct ddb_dma *dma = io->dma; 140 u32 i; 141 u64 mem; 142 143 if (!dma) 144 return; 145 for (i = 0; i < dma->num; i++) { 146 mem = dma->pbuf[i]; 147 ddbwritel(dev, mem & 0xffffffff, dma->bufregs + i * 8); 148 ddbwritel(dev, mem >> 32, dma->bufregs + i * 8 + 4); 149 } 150 dma->bufval = ((dma->div & 0x0f) << 16) | 151 ((dma->num & 0x1f) << 11) | 152 ((dma->size >> 7) & 0x7ff); 153 } 154 155 static void ddb_set_dma_tables(struct ddb *dev) 156 { 157 u32 i; 158 159 for (i = 0; i < DDB_MAX_PORT; i++) { 160 if (dev->port[i].input[0]) 161 ddb_set_dma_table(dev->port[i].input[0]); 162 if (dev->port[i].input[1]) 163 ddb_set_dma_table(dev->port[i].input[1]); 164 if (dev->port[i].output) 165 ddb_set_dma_table(dev->port[i].output); 166 } 167 } 168 169 /****************************************************************************/ 170 /****************************************************************************/ 171 /****************************************************************************/ 172 173 static void ddb_redirect_dma(struct ddb *dev, 174 struct ddb_dma *sdma, 175 struct ddb_dma *ddma) 176 { 177 u32 i, base; 178 u64 mem; 179 180 sdma->bufval = ddma->bufval; 181 base = sdma->bufregs; 182 for (i = 0; i < ddma->num; i++) { 183 mem = ddma->pbuf[i]; 184 ddbwritel(dev, mem & 0xffffffff, base + i * 8); 185 ddbwritel(dev, mem >> 32, base + i * 8 + 4); 186 } 187 } 188 189 static int ddb_unredirect(struct ddb_port *port) 190 { 191 struct ddb_input *oredi, *iredi = NULL; 192 struct ddb_output *iredo = NULL; 193 194 /* dev_info(port->dev->dev, 195 * "unredirect %d.%d\n", port->dev->nr, port->nr); 196 */ 197 mutex_lock(&redirect_lock); 198 if (port->output->dma->running) { 199 mutex_unlock(&redirect_lock); 200 return -EBUSY; 201 } 202 oredi = port->output->redi; 203 if (!oredi) 204 goto done; 205 if (port->input[0]) { 206 iredi = port->input[0]->redi; 207 iredo = port->input[0]->redo; 208 209 if (iredo) { 210 iredo->port->output->redi = oredi; 211 if (iredo->port->input[0]) { 212 iredo->port->input[0]->redi = iredi; 213 ddb_redirect_dma(oredi->port->dev, 214 oredi->dma, iredo->dma); 215 } 216 port->input[0]->redo = NULL; 217 ddb_set_dma_table(port->input[0]); 218 } 219 oredi->redi = iredi; 220 port->input[0]->redi = NULL; 221 } 222 oredi->redo = NULL; 223 port->output->redi = NULL; 224 225 ddb_set_dma_table(oredi); 226 done: 227 mutex_unlock(&redirect_lock); 228 return 0; 229 } 230 231 static int ddb_redirect(u32 i, u32 p) 232 { 233 struct ddb *idev = ddbs[(i >> 4) & 0x3f]; 234 struct ddb_input *input, *input2; 235 struct ddb *pdev = ddbs[(p >> 4) & 0x3f]; 236 struct ddb_port *port; 237 238 if (!idev || !pdev) 239 return -EINVAL; 240 if (!idev->has_dma || !pdev->has_dma) 241 return -EINVAL; 242 243 port = &pdev->port[p & 0x0f]; 244 if (!port->output) 245 return -EINVAL; 246 if (ddb_unredirect(port)) 247 return -EBUSY; 248 249 if (i == 8) 250 return 0; 251 252 input = &idev->input[i & 7]; 253 if (!input) 254 return -EINVAL; 255 256 mutex_lock(&redirect_lock); 257 if (port->output->dma->running || input->dma->running) { 258 mutex_unlock(&redirect_lock); 259 return -EBUSY; 260 } 261 input2 = port->input[0]; 262 if (input2) { 263 if (input->redi) { 264 input2->redi = input->redi; 265 input->redi = NULL; 266 } else { 267 input2->redi = input; 268 } 269 } 270 input->redo = port->output; 271 port->output->redi = input; 272 273 ddb_redirect_dma(input->port->dev, input->dma, port->output->dma); 274 mutex_unlock(&redirect_lock); 275 return 0; 276 } 277 278 /****************************************************************************/ 279 /****************************************************************************/ 280 /****************************************************************************/ 281 282 static void dma_free(struct pci_dev *pdev, struct ddb_dma *dma, int dir) 283 { 284 int i; 285 286 if (!dma) 287 return; 288 for (i = 0; i < dma->num; i++) { 289 if (dma->vbuf[i]) { 290 if (alt_dma) { 291 dma_unmap_single(&pdev->dev, dma->pbuf[i], 292 dma->size, 293 dir ? DMA_TO_DEVICE : 294 DMA_FROM_DEVICE); 295 kfree(dma->vbuf[i]); 296 dma->vbuf[i] = NULL; 297 } else { 298 dma_free_coherent(&pdev->dev, dma->size, 299 dma->vbuf[i], dma->pbuf[i]); 300 } 301 302 dma->vbuf[i] = NULL; 303 } 304 } 305 } 306 307 static int dma_alloc(struct pci_dev *pdev, struct ddb_dma *dma, int dir) 308 { 309 int i; 310 311 if (!dma) 312 return 0; 313 for (i = 0; i < dma->num; i++) { 314 if (alt_dma) { 315 dma->vbuf[i] = kmalloc(dma->size, __GFP_RETRY_MAYFAIL); 316 if (!dma->vbuf[i]) 317 return -ENOMEM; 318 dma->pbuf[i] = dma_map_single(&pdev->dev, 319 dma->vbuf[i], 320 dma->size, 321 dir ? DMA_TO_DEVICE : 322 DMA_FROM_DEVICE); 323 if (dma_mapping_error(&pdev->dev, dma->pbuf[i])) { 324 kfree(dma->vbuf[i]); 325 dma->vbuf[i] = NULL; 326 return -ENOMEM; 327 } 328 } else { 329 dma->vbuf[i] = dma_alloc_coherent(&pdev->dev, 330 dma->size, 331 &dma->pbuf[i], 332 GFP_KERNEL); 333 if (!dma->vbuf[i]) 334 return -ENOMEM; 335 } 336 } 337 return 0; 338 } 339 340 int ddb_buffers_alloc(struct ddb *dev) 341 { 342 int i; 343 struct ddb_port *port; 344 345 for (i = 0; i < dev->port_num; i++) { 346 port = &dev->port[i]; 347 switch (port->class) { 348 case DDB_PORT_TUNER: 349 if (port->input[0]->dma) 350 if (dma_alloc(dev->pdev, port->input[0]->dma, 0) 351 < 0) 352 return -1; 353 if (port->input[1]->dma) 354 if (dma_alloc(dev->pdev, port->input[1]->dma, 0) 355 < 0) 356 return -1; 357 break; 358 case DDB_PORT_CI: 359 case DDB_PORT_LOOP: 360 if (port->input[0]->dma) 361 if (dma_alloc(dev->pdev, port->input[0]->dma, 0) 362 < 0) 363 return -1; 364 if (port->output->dma) 365 if (dma_alloc(dev->pdev, port->output->dma, 1) 366 < 0) 367 return -1; 368 break; 369 default: 370 break; 371 } 372 } 373 ddb_set_dma_tables(dev); 374 return 0; 375 } 376 377 void ddb_buffers_free(struct ddb *dev) 378 { 379 int i; 380 struct ddb_port *port; 381 382 for (i = 0; i < dev->port_num; i++) { 383 port = &dev->port[i]; 384 385 if (port->input[0] && port->input[0]->dma) 386 dma_free(dev->pdev, port->input[0]->dma, 0); 387 if (port->input[1] && port->input[1]->dma) 388 dma_free(dev->pdev, port->input[1]->dma, 0); 389 if (port->output && port->output->dma) 390 dma_free(dev->pdev, port->output->dma, 1); 391 } 392 } 393 394 static void calc_con(struct ddb_output *output, u32 *con, u32 *con2, u32 flags) 395 { 396 struct ddb *dev = output->port->dev; 397 u32 bitrate = output->port->obr, max_bitrate = 72000; 398 u32 gap = 4, nco = 0; 399 400 *con = 0x1c; 401 if (output->port->gap != 0xffffffff) { 402 flags |= 1; 403 gap = output->port->gap; 404 max_bitrate = 0; 405 } 406 if (dev->link[0].info->type == DDB_OCTOPUS_CI && output->port->nr > 1) { 407 *con = 0x10c; 408 if (dev->link[0].ids.regmapid >= 0x10003 && !(flags & 1)) { 409 if (!(flags & 2)) { 410 /* NCO */ 411 max_bitrate = 0; 412 gap = 0; 413 if (bitrate != 72000) { 414 if (bitrate >= 96000) { 415 *con |= 0x800; 416 } else { 417 *con |= 0x1000; 418 nco = (bitrate * 8192 + 71999) 419 / 72000; 420 } 421 } 422 } else { 423 /* Divider and gap */ 424 *con |= 0x1810; 425 if (bitrate <= 64000) { 426 max_bitrate = 64000; 427 nco = 8; 428 } else if (bitrate <= 72000) { 429 max_bitrate = 72000; 430 nco = 7; 431 } else { 432 max_bitrate = 96000; 433 nco = 5; 434 } 435 } 436 } else { 437 if (bitrate > 72000) { 438 *con |= 0x810; /* 96 MBit/s and gap */ 439 max_bitrate = 96000; 440 } 441 *con |= 0x10; /* enable gap */ 442 } 443 } 444 if (max_bitrate > 0) { 445 if (bitrate > max_bitrate) 446 bitrate = max_bitrate; 447 if (bitrate < 31000) 448 bitrate = 31000; 449 gap = ((max_bitrate - bitrate) * 94) / bitrate; 450 if (gap < 2) 451 *con &= ~0x10; /* Disable gap */ 452 else 453 gap -= 2; 454 if (gap > 127) 455 gap = 127; 456 } 457 458 *con2 = (nco << 16) | gap; 459 } 460 461 static void ddb_output_start(struct ddb_output *output) 462 { 463 struct ddb *dev = output->port->dev; 464 u32 con = 0x11c, con2 = 0; 465 466 spin_lock_irq(&output->dma->lock); 467 output->dma->cbuf = 0; 468 output->dma->coff = 0; 469 output->dma->stat = 0; 470 ddbwritel(dev, 0, DMA_BUFFER_CONTROL(output->dma)); 471 472 if (output->port->input[0]->port->class == DDB_PORT_LOOP) 473 con = (1UL << 13) | 0x14; 474 else 475 calc_con(output, &con, &con2, 0); 476 477 ddbwritel(dev, 0, TS_CONTROL(output)); 478 ddbwritel(dev, 2, TS_CONTROL(output)); 479 ddbwritel(dev, 0, TS_CONTROL(output)); 480 ddbwritel(dev, con, TS_CONTROL(output)); 481 ddbwritel(dev, con2, TS_CONTROL2(output)); 482 483 ddbwritel(dev, output->dma->bufval, 484 DMA_BUFFER_SIZE(output->dma)); 485 ddbwritel(dev, 0, DMA_BUFFER_ACK(output->dma)); 486 ddbwritel(dev, 1, DMA_BASE_READ); 487 ddbwritel(dev, 7, DMA_BUFFER_CONTROL(output->dma)); 488 489 ddbwritel(dev, con | 1, TS_CONTROL(output)); 490 491 output->dma->running = 1; 492 spin_unlock_irq(&output->dma->lock); 493 } 494 495 static void ddb_output_stop(struct ddb_output *output) 496 { 497 struct ddb *dev = output->port->dev; 498 499 spin_lock_irq(&output->dma->lock); 500 501 ddbwritel(dev, 0, TS_CONTROL(output)); 502 503 ddbwritel(dev, 0, DMA_BUFFER_CONTROL(output->dma)); 504 output->dma->running = 0; 505 spin_unlock_irq(&output->dma->lock); 506 } 507 508 static void ddb_input_stop(struct ddb_input *input) 509 { 510 struct ddb *dev = input->port->dev; 511 u32 tag = DDB_LINK_TAG(input->port->lnr); 512 513 spin_lock_irq(&input->dma->lock); 514 515 ddbwritel(dev, 0, tag | TS_CONTROL(input)); 516 517 ddbwritel(dev, 0, DMA_BUFFER_CONTROL(input->dma)); 518 input->dma->running = 0; 519 spin_unlock_irq(&input->dma->lock); 520 } 521 522 static void ddb_input_start(struct ddb_input *input) 523 { 524 struct ddb *dev = input->port->dev; 525 526 spin_lock_irq(&input->dma->lock); 527 input->dma->cbuf = 0; 528 input->dma->coff = 0; 529 input->dma->stat = 0; 530 ddbwritel(dev, 0, DMA_BUFFER_CONTROL(input->dma)); 531 532 ddbwritel(dev, 0, TS_CONTROL(input)); 533 ddbwritel(dev, 2, TS_CONTROL(input)); 534 ddbwritel(dev, 0, TS_CONTROL(input)); 535 536 ddbwritel(dev, input->dma->bufval, 537 DMA_BUFFER_SIZE(input->dma)); 538 ddbwritel(dev, 0, DMA_BUFFER_ACK(input->dma)); 539 ddbwritel(dev, 1, DMA_BASE_WRITE); 540 ddbwritel(dev, 3, DMA_BUFFER_CONTROL(input->dma)); 541 542 ddbwritel(dev, 0x09, TS_CONTROL(input)); 543 544 if (input->port->type == DDB_TUNER_DUMMY) 545 ddbwritel(dev, 0x000fff01, TS_CONTROL2(input)); 546 547 input->dma->running = 1; 548 spin_unlock_irq(&input->dma->lock); 549 } 550 551 static void ddb_input_start_all(struct ddb_input *input) 552 { 553 struct ddb_input *i = input; 554 struct ddb_output *o; 555 556 mutex_lock(&redirect_lock); 557 while (i && (o = i->redo)) { 558 ddb_output_start(o); 559 i = o->port->input[0]; 560 if (i) 561 ddb_input_start(i); 562 } 563 ddb_input_start(input); 564 mutex_unlock(&redirect_lock); 565 } 566 567 static void ddb_input_stop_all(struct ddb_input *input) 568 { 569 struct ddb_input *i = input; 570 struct ddb_output *o; 571 572 mutex_lock(&redirect_lock); 573 ddb_input_stop(input); 574 while (i && (o = i->redo)) { 575 ddb_output_stop(o); 576 i = o->port->input[0]; 577 if (i) 578 ddb_input_stop(i); 579 } 580 mutex_unlock(&redirect_lock); 581 } 582 583 static u32 ddb_output_free(struct ddb_output *output) 584 { 585 u32 idx, off, stat = output->dma->stat; 586 s32 diff; 587 588 idx = (stat >> 11) & 0x1f; 589 off = (stat & 0x7ff) << 7; 590 591 if (output->dma->cbuf != idx) { 592 if ((((output->dma->cbuf + 1) % output->dma->num) == idx) && 593 (output->dma->size - output->dma->coff <= (2 * 188))) 594 return 0; 595 return 188; 596 } 597 diff = off - output->dma->coff; 598 if (diff <= 0 || diff > (2 * 188)) 599 return 188; 600 return 0; 601 } 602 603 static ssize_t ddb_output_write(struct ddb_output *output, 604 const __user u8 *buf, size_t count) 605 { 606 struct ddb *dev = output->port->dev; 607 u32 idx, off, stat = output->dma->stat; 608 u32 left = count, len; 609 610 idx = (stat >> 11) & 0x1f; 611 off = (stat & 0x7ff) << 7; 612 613 while (left) { 614 len = output->dma->size - output->dma->coff; 615 if ((((output->dma->cbuf + 1) % output->dma->num) == idx) && 616 off == 0) { 617 if (len <= 188) 618 break; 619 len -= 188; 620 } 621 if (output->dma->cbuf == idx) { 622 if (off > output->dma->coff) { 623 len = off - output->dma->coff; 624 len -= (len % 188); 625 if (len <= 188) 626 break; 627 len -= 188; 628 } 629 } 630 if (len > left) 631 len = left; 632 if (copy_from_user(output->dma->vbuf[output->dma->cbuf] + 633 output->dma->coff, 634 buf, len)) 635 return -EIO; 636 if (alt_dma) 637 dma_sync_single_for_device( 638 dev->dev, 639 output->dma->pbuf[output->dma->cbuf], 640 output->dma->size, DMA_TO_DEVICE); 641 left -= len; 642 buf += len; 643 output->dma->coff += len; 644 if (output->dma->coff == output->dma->size) { 645 output->dma->coff = 0; 646 output->dma->cbuf = ((output->dma->cbuf + 1) % 647 output->dma->num); 648 } 649 ddbwritel(dev, 650 (output->dma->cbuf << 11) | 651 (output->dma->coff >> 7), 652 DMA_BUFFER_ACK(output->dma)); 653 } 654 return count - left; 655 } 656 657 static u32 ddb_input_avail(struct ddb_input *input) 658 { 659 struct ddb *dev = input->port->dev; 660 u32 idx, off, stat = input->dma->stat; 661 u32 ctrl = ddbreadl(dev, DMA_BUFFER_CONTROL(input->dma)); 662 663 idx = (stat >> 11) & 0x1f; 664 off = (stat & 0x7ff) << 7; 665 666 if (ctrl & 4) { 667 dev_err(dev->dev, "IA %d %d %08x\n", idx, off, ctrl); 668 ddbwritel(dev, stat, DMA_BUFFER_ACK(input->dma)); 669 return 0; 670 } 671 if (input->dma->cbuf != idx) 672 return 188; 673 return 0; 674 } 675 676 static ssize_t ddb_input_read(struct ddb_input *input, 677 __user u8 *buf, size_t count) 678 { 679 struct ddb *dev = input->port->dev; 680 u32 left = count; 681 u32 idx, free, stat = input->dma->stat; 682 int ret; 683 684 idx = (stat >> 11) & 0x1f; 685 686 while (left) { 687 if (input->dma->cbuf == idx) 688 return count - left; 689 free = input->dma->size - input->dma->coff; 690 if (free > left) 691 free = left; 692 if (alt_dma) 693 dma_sync_single_for_cpu( 694 dev->dev, 695 input->dma->pbuf[input->dma->cbuf], 696 input->dma->size, DMA_FROM_DEVICE); 697 ret = copy_to_user(buf, input->dma->vbuf[input->dma->cbuf] + 698 input->dma->coff, free); 699 if (ret) 700 return -EFAULT; 701 input->dma->coff += free; 702 if (input->dma->coff == input->dma->size) { 703 input->dma->coff = 0; 704 input->dma->cbuf = (input->dma->cbuf + 1) % 705 input->dma->num; 706 } 707 left -= free; 708 buf += free; 709 ddbwritel(dev, 710 (input->dma->cbuf << 11) | (input->dma->coff >> 7), 711 DMA_BUFFER_ACK(input->dma)); 712 } 713 return count; 714 } 715 716 /****************************************************************************/ 717 /****************************************************************************/ 718 719 static ssize_t ts_write(struct file *file, const __user char *buf, 720 size_t count, loff_t *ppos) 721 { 722 struct dvb_device *dvbdev = file->private_data; 723 struct ddb_output *output = dvbdev->priv; 724 struct ddb *dev = output->port->dev; 725 size_t left = count; 726 int stat; 727 728 if (!dev->has_dma) 729 return -EINVAL; 730 while (left) { 731 if (ddb_output_free(output) < 188) { 732 if (file->f_flags & O_NONBLOCK) 733 break; 734 if (wait_event_interruptible( 735 output->dma->wq, 736 ddb_output_free(output) >= 188) < 0) 737 break; 738 } 739 stat = ddb_output_write(output, buf, left); 740 if (stat < 0) 741 return stat; 742 buf += stat; 743 left -= stat; 744 } 745 return (left == count) ? -EAGAIN : (count - left); 746 } 747 748 static ssize_t ts_read(struct file *file, __user char *buf, 749 size_t count, loff_t *ppos) 750 { 751 struct dvb_device *dvbdev = file->private_data; 752 struct ddb_output *output = dvbdev->priv; 753 struct ddb_input *input = output->port->input[0]; 754 struct ddb *dev = output->port->dev; 755 size_t left = count; 756 int stat; 757 758 if (!dev->has_dma) 759 return -EINVAL; 760 while (left) { 761 if (ddb_input_avail(input) < 188) { 762 if (file->f_flags & O_NONBLOCK) 763 break; 764 if (wait_event_interruptible( 765 input->dma->wq, 766 ddb_input_avail(input) >= 188) < 0) 767 break; 768 } 769 stat = ddb_input_read(input, buf, left); 770 if (stat < 0) 771 return stat; 772 left -= stat; 773 buf += stat; 774 } 775 return (count && (left == count)) ? -EAGAIN : (count - left); 776 } 777 778 static __poll_t ts_poll(struct file *file, poll_table *wait) 779 { 780 struct dvb_device *dvbdev = file->private_data; 781 struct ddb_output *output = dvbdev->priv; 782 struct ddb_input *input = output->port->input[0]; 783 784 __poll_t mask = 0; 785 786 poll_wait(file, &input->dma->wq, wait); 787 poll_wait(file, &output->dma->wq, wait); 788 if (ddb_input_avail(input) >= 188) 789 mask |= EPOLLIN | EPOLLRDNORM; 790 if (ddb_output_free(output) >= 188) 791 mask |= EPOLLOUT | EPOLLWRNORM; 792 return mask; 793 } 794 795 static int ts_release(struct inode *inode, struct file *file) 796 { 797 struct dvb_device *dvbdev = file->private_data; 798 struct ddb_output *output = NULL; 799 struct ddb_input *input = NULL; 800 801 if (dvbdev) { 802 output = dvbdev->priv; 803 input = output->port->input[0]; 804 } 805 806 if ((file->f_flags & O_ACCMODE) == O_RDONLY) { 807 if (!input) 808 return -EINVAL; 809 ddb_input_stop(input); 810 } else if ((file->f_flags & O_ACCMODE) == O_WRONLY) { 811 if (!output) 812 return -EINVAL; 813 ddb_output_stop(output); 814 } 815 return dvb_generic_release(inode, file); 816 } 817 818 static int ts_open(struct inode *inode, struct file *file) 819 { 820 int err; 821 struct dvb_device *dvbdev = file->private_data; 822 struct ddb_output *output = NULL; 823 struct ddb_input *input = NULL; 824 825 if (dvbdev) { 826 output = dvbdev->priv; 827 input = output->port->input[0]; 828 } 829 830 if ((file->f_flags & O_ACCMODE) == O_RDONLY) { 831 if (!input) 832 return -EINVAL; 833 if (input->redo || input->redi) 834 return -EBUSY; 835 } else if ((file->f_flags & O_ACCMODE) == O_WRONLY) { 836 if (!output) 837 return -EINVAL; 838 } else { 839 return -EINVAL; 840 } 841 842 err = dvb_generic_open(inode, file); 843 if (err < 0) 844 return err; 845 if ((file->f_flags & O_ACCMODE) == O_RDONLY) 846 ddb_input_start(input); 847 else if ((file->f_flags & O_ACCMODE) == O_WRONLY) 848 ddb_output_start(output); 849 return err; 850 } 851 852 static const struct file_operations ci_fops = { 853 .owner = THIS_MODULE, 854 .read = ts_read, 855 .write = ts_write, 856 .open = ts_open, 857 .release = ts_release, 858 .poll = ts_poll, 859 .mmap = NULL, 860 }; 861 862 static struct dvb_device dvbdev_ci = { 863 .priv = NULL, 864 .readers = 1, 865 .writers = 1, 866 .users = 2, 867 .fops = &ci_fops, 868 }; 869 870 /****************************************************************************/ 871 /****************************************************************************/ 872 873 static int locked_gate_ctrl(struct dvb_frontend *fe, int enable) 874 { 875 struct ddb_input *input = fe->sec_priv; 876 struct ddb_port *port = input->port; 877 struct ddb_dvb *dvb = &port->dvb[input->nr & 1]; 878 int status; 879 880 if (enable) { 881 mutex_lock(&port->i2c_gate_lock); 882 status = dvb->i2c_gate_ctrl(fe, 1); 883 } else { 884 status = dvb->i2c_gate_ctrl(fe, 0); 885 mutex_unlock(&port->i2c_gate_lock); 886 } 887 return status; 888 } 889 890 static int demod_attach_drxk(struct ddb_input *input) 891 { 892 struct i2c_adapter *i2c = &input->port->i2c->adap; 893 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 894 struct device *dev = input->port->dev->dev; 895 struct drxk_config config; 896 897 memset(&config, 0, sizeof(config)); 898 config.adr = 0x29 + (input->nr & 1); 899 config.microcode_name = "drxk_a3.mc"; 900 901 dvb->fe = dvb_attach(drxk_attach, &config, i2c); 902 if (!dvb->fe) { 903 dev_err(dev, "No DRXK found!\n"); 904 return -ENODEV; 905 } 906 dvb->fe->sec_priv = input; 907 dvb->i2c_gate_ctrl = dvb->fe->ops.i2c_gate_ctrl; 908 dvb->fe->ops.i2c_gate_ctrl = locked_gate_ctrl; 909 return 0; 910 } 911 912 static int tuner_attach_tda18271(struct ddb_input *input) 913 { 914 struct i2c_adapter *i2c = &input->port->i2c->adap; 915 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 916 struct device *dev = input->port->dev->dev; 917 struct dvb_frontend *fe; 918 919 if (dvb->fe->ops.i2c_gate_ctrl) 920 dvb->fe->ops.i2c_gate_ctrl(dvb->fe, 1); 921 fe = dvb_attach(tda18271c2dd_attach, dvb->fe, i2c, 0x60); 922 if (dvb->fe->ops.i2c_gate_ctrl) 923 dvb->fe->ops.i2c_gate_ctrl(dvb->fe, 0); 924 if (!fe) { 925 dev_err(dev, "No TDA18271 found!\n"); 926 return -ENODEV; 927 } 928 return 0; 929 } 930 931 /******************************************************************************/ 932 /******************************************************************************/ 933 /******************************************************************************/ 934 935 static struct stv0367_config ddb_stv0367_config[] = { 936 { 937 .demod_address = 0x1f, 938 .xtal = 27000000, 939 .if_khz = 0, 940 .if_iq_mode = FE_TER_NORMAL_IF_TUNER, 941 .ts_mode = STV0367_SERIAL_PUNCT_CLOCK, 942 .clk_pol = STV0367_CLOCKPOLARITY_DEFAULT, 943 }, { 944 .demod_address = 0x1e, 945 .xtal = 27000000, 946 .if_khz = 0, 947 .if_iq_mode = FE_TER_NORMAL_IF_TUNER, 948 .ts_mode = STV0367_SERIAL_PUNCT_CLOCK, 949 .clk_pol = STV0367_CLOCKPOLARITY_DEFAULT, 950 }, 951 }; 952 953 static int demod_attach_stv0367(struct ddb_input *input) 954 { 955 struct i2c_adapter *i2c = &input->port->i2c->adap; 956 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 957 struct device *dev = input->port->dev->dev; 958 959 /* attach frontend */ 960 dvb->fe = dvb_attach(stv0367ddb_attach, 961 &ddb_stv0367_config[(input->nr & 1)], i2c); 962 963 if (!dvb->fe) { 964 dev_err(dev, "No stv0367 found!\n"); 965 return -ENODEV; 966 } 967 dvb->fe->sec_priv = input; 968 dvb->i2c_gate_ctrl = dvb->fe->ops.i2c_gate_ctrl; 969 dvb->fe->ops.i2c_gate_ctrl = locked_gate_ctrl; 970 return 0; 971 } 972 973 static int tuner_tda18212_ping(struct ddb_input *input, unsigned short adr) 974 { 975 struct i2c_adapter *adapter = &input->port->i2c->adap; 976 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 977 struct device *dev = input->port->dev->dev; 978 u8 tda_id[2]; 979 u8 subaddr = 0x00; 980 981 dev_dbg(dev, "stv0367-tda18212 tuner ping\n"); 982 if (dvb->fe->ops.i2c_gate_ctrl) 983 dvb->fe->ops.i2c_gate_ctrl(dvb->fe, 1); 984 985 if (i2c_read_regs(adapter, adr, subaddr, tda_id, sizeof(tda_id)) < 0) 986 dev_dbg(dev, "tda18212 ping 1 fail\n"); 987 if (i2c_read_regs(adapter, adr, subaddr, tda_id, sizeof(tda_id)) < 0) 988 dev_warn(dev, "tda18212 ping failed, expect problems\n"); 989 990 if (dvb->fe->ops.i2c_gate_ctrl) 991 dvb->fe->ops.i2c_gate_ctrl(dvb->fe, 0); 992 993 return 0; 994 } 995 996 static int demod_attach_cxd28xx(struct ddb_input *input, int par, int osc24) 997 { 998 struct i2c_adapter *i2c = &input->port->i2c->adap; 999 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 1000 struct device *dev = input->port->dev->dev; 1001 struct cxd2841er_config cfg; 1002 1003 /* the cxd2841er driver expects 8bit/shifted I2C addresses */ 1004 cfg.i2c_addr = ((input->nr & 1) ? 0x6d : 0x6c) << 1; 1005 1006 cfg.xtal = osc24 ? SONY_XTAL_24000 : SONY_XTAL_20500; 1007 cfg.flags = CXD2841ER_AUTO_IFHZ | CXD2841ER_EARLY_TUNE | 1008 CXD2841ER_NO_WAIT_LOCK | CXD2841ER_NO_AGCNEG | 1009 CXD2841ER_TSBITS; 1010 1011 if (!par) 1012 cfg.flags |= CXD2841ER_TS_SERIAL; 1013 1014 /* attach frontend */ 1015 dvb->fe = dvb_attach(cxd2841er_attach_t_c, &cfg, i2c); 1016 1017 if (!dvb->fe) { 1018 dev_err(dev, "No cxd2837/38/43/54 found!\n"); 1019 return -ENODEV; 1020 } 1021 dvb->fe->sec_priv = input; 1022 dvb->i2c_gate_ctrl = dvb->fe->ops.i2c_gate_ctrl; 1023 dvb->fe->ops.i2c_gate_ctrl = locked_gate_ctrl; 1024 return 0; 1025 } 1026 1027 static int tuner_attach_tda18212(struct ddb_input *input, u32 porttype) 1028 { 1029 struct i2c_adapter *adapter = &input->port->i2c->adap; 1030 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 1031 struct device *dev = input->port->dev->dev; 1032 struct i2c_client *client; 1033 struct tda18212_config config = { 1034 .fe = dvb->fe, 1035 .if_dvbt_6 = 3550, 1036 .if_dvbt_7 = 3700, 1037 .if_dvbt_8 = 4150, 1038 .if_dvbt2_6 = 3250, 1039 .if_dvbt2_7 = 4000, 1040 .if_dvbt2_8 = 4000, 1041 .if_dvbc = 5000, 1042 }; 1043 u8 addr = (input->nr & 1) ? 0x63 : 0x60; 1044 1045 /* due to a hardware quirk with the I2C gate on the stv0367+tda18212 1046 * combo, the tda18212 must be probed by reading it's id _twice_ when 1047 * cold started, or it very likely will fail. 1048 */ 1049 if (porttype == DDB_TUNER_DVBCT_ST) 1050 tuner_tda18212_ping(input, addr); 1051 1052 /* perform tuner probe/init/attach */ 1053 client = dvb_module_probe("tda18212", NULL, adapter, addr, &config); 1054 if (!client) 1055 goto err; 1056 1057 dvb->i2c_client[0] = client; 1058 return 0; 1059 err: 1060 dev_err(dev, "TDA18212 tuner not found. Device is not fully operational.\n"); 1061 return -ENODEV; 1062 } 1063 1064 /****************************************************************************/ 1065 /****************************************************************************/ 1066 /****************************************************************************/ 1067 1068 static struct stv090x_config stv0900 = { 1069 .device = STV0900, 1070 .demod_mode = STV090x_DUAL, 1071 .clk_mode = STV090x_CLK_EXT, 1072 1073 .xtal = 27000000, 1074 .address = 0x69, 1075 1076 .ts1_mode = STV090x_TSMODE_SERIAL_PUNCTURED, 1077 .ts2_mode = STV090x_TSMODE_SERIAL_PUNCTURED, 1078 1079 .ts1_tei = 1, 1080 .ts2_tei = 1, 1081 1082 .repeater_level = STV090x_RPTLEVEL_16, 1083 1084 .adc1_range = STV090x_ADC_1Vpp, 1085 .adc2_range = STV090x_ADC_1Vpp, 1086 1087 .diseqc_envelope_mode = true, 1088 }; 1089 1090 static struct stv090x_config stv0900_aa = { 1091 .device = STV0900, 1092 .demod_mode = STV090x_DUAL, 1093 .clk_mode = STV090x_CLK_EXT, 1094 1095 .xtal = 27000000, 1096 .address = 0x68, 1097 1098 .ts1_mode = STV090x_TSMODE_SERIAL_PUNCTURED, 1099 .ts2_mode = STV090x_TSMODE_SERIAL_PUNCTURED, 1100 1101 .ts1_tei = 1, 1102 .ts2_tei = 1, 1103 1104 .repeater_level = STV090x_RPTLEVEL_16, 1105 1106 .adc1_range = STV090x_ADC_1Vpp, 1107 .adc2_range = STV090x_ADC_1Vpp, 1108 1109 .diseqc_envelope_mode = true, 1110 }; 1111 1112 static struct stv6110x_config stv6110a = { 1113 .addr = 0x60, 1114 .refclk = 27000000, 1115 .clk_div = 1, 1116 }; 1117 1118 static struct stv6110x_config stv6110b = { 1119 .addr = 0x63, 1120 .refclk = 27000000, 1121 .clk_div = 1, 1122 }; 1123 1124 static int demod_attach_stv0900(struct ddb_input *input, int type) 1125 { 1126 struct i2c_adapter *i2c = &input->port->i2c->adap; 1127 struct stv090x_config *feconf = type ? &stv0900_aa : &stv0900; 1128 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 1129 struct device *dev = input->port->dev->dev; 1130 1131 dvb->fe = dvb_attach(stv090x_attach, feconf, i2c, 1132 (input->nr & 1) ? STV090x_DEMODULATOR_1 1133 : STV090x_DEMODULATOR_0); 1134 if (!dvb->fe) { 1135 dev_err(dev, "No STV0900 found!\n"); 1136 return -ENODEV; 1137 } 1138 if (!dvb_attach(lnbh24_attach, dvb->fe, i2c, 0, 1139 0, (input->nr & 1) ? 1140 (0x09 - type) : (0x0b - type))) { 1141 dev_err(dev, "No LNBH24 found!\n"); 1142 dvb_frontend_detach(dvb->fe); 1143 return -ENODEV; 1144 } 1145 return 0; 1146 } 1147 1148 static int tuner_attach_stv6110(struct ddb_input *input, int type) 1149 { 1150 struct i2c_adapter *i2c = &input->port->i2c->adap; 1151 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 1152 struct device *dev = input->port->dev->dev; 1153 struct stv090x_config *feconf = type ? &stv0900_aa : &stv0900; 1154 struct stv6110x_config *tunerconf = (input->nr & 1) ? 1155 &stv6110b : &stv6110a; 1156 const struct stv6110x_devctl *ctl; 1157 1158 ctl = dvb_attach(stv6110x_attach, dvb->fe, tunerconf, i2c); 1159 if (!ctl) { 1160 dev_err(dev, "No STV6110X found!\n"); 1161 return -ENODEV; 1162 } 1163 dev_info(dev, "attach tuner input %d adr %02x\n", 1164 input->nr, tunerconf->addr); 1165 1166 feconf->tuner_init = ctl->tuner_init; 1167 feconf->tuner_sleep = ctl->tuner_sleep; 1168 feconf->tuner_set_mode = ctl->tuner_set_mode; 1169 feconf->tuner_set_frequency = ctl->tuner_set_frequency; 1170 feconf->tuner_get_frequency = ctl->tuner_get_frequency; 1171 feconf->tuner_set_bandwidth = ctl->tuner_set_bandwidth; 1172 feconf->tuner_get_bandwidth = ctl->tuner_get_bandwidth; 1173 feconf->tuner_set_bbgain = ctl->tuner_set_bbgain; 1174 feconf->tuner_get_bbgain = ctl->tuner_get_bbgain; 1175 feconf->tuner_set_refclk = ctl->tuner_set_refclk; 1176 feconf->tuner_get_status = ctl->tuner_get_status; 1177 1178 return 0; 1179 } 1180 1181 static const struct stv0910_cfg stv0910_p = { 1182 .adr = 0x68, 1183 .parallel = 1, 1184 .rptlvl = 4, 1185 .clk = 30000000, 1186 .tsspeed = 0x28, 1187 }; 1188 1189 static const struct lnbh25_config lnbh25_cfg = { 1190 .i2c_address = 0x0c << 1, 1191 .data2_config = LNBH25_TEN 1192 }; 1193 1194 static int demod_attach_stv0910(struct ddb_input *input, int type, int tsfast) 1195 { 1196 struct i2c_adapter *i2c = &input->port->i2c->adap; 1197 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 1198 struct device *dev = input->port->dev->dev; 1199 struct stv0910_cfg cfg = stv0910_p; 1200 struct lnbh25_config lnbcfg = lnbh25_cfg; 1201 1202 if (stv0910_single) 1203 cfg.single = 1; 1204 1205 if (type) 1206 cfg.parallel = 2; 1207 1208 if (tsfast) { 1209 dev_info(dev, "Enabling stv0910 higher speed TS\n"); 1210 cfg.tsspeed = 0x10; 1211 } 1212 1213 dvb->fe = dvb_attach(stv0910_attach, i2c, &cfg, (input->nr & 1)); 1214 if (!dvb->fe) { 1215 cfg.adr = 0x6c; 1216 dvb->fe = dvb_attach(stv0910_attach, i2c, 1217 &cfg, (input->nr & 1)); 1218 } 1219 if (!dvb->fe) { 1220 dev_err(dev, "No STV0910 found!\n"); 1221 return -ENODEV; 1222 } 1223 1224 /* attach lnbh25 - leftshift by one as the lnbh25 driver expects 8bit 1225 * i2c addresses 1226 */ 1227 lnbcfg.i2c_address = (((input->nr & 1) ? 0x0d : 0x0c) << 1); 1228 if (!dvb_attach(lnbh25_attach, dvb->fe, &lnbcfg, i2c)) { 1229 lnbcfg.i2c_address = (((input->nr & 1) ? 0x09 : 0x08) << 1); 1230 if (!dvb_attach(lnbh25_attach, dvb->fe, &lnbcfg, i2c)) { 1231 dev_err(dev, "No LNBH25 found!\n"); 1232 dvb_frontend_detach(dvb->fe); 1233 return -ENODEV; 1234 } 1235 } 1236 1237 return 0; 1238 } 1239 1240 static int tuner_attach_stv6111(struct ddb_input *input, int type) 1241 { 1242 struct i2c_adapter *i2c = &input->port->i2c->adap; 1243 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 1244 struct device *dev = input->port->dev->dev; 1245 struct dvb_frontend *fe; 1246 u8 adr = (type ? 0 : 4) + ((input->nr & 1) ? 0x63 : 0x60); 1247 1248 fe = dvb_attach(stv6111_attach, dvb->fe, i2c, adr); 1249 if (!fe) { 1250 fe = dvb_attach(stv6111_attach, dvb->fe, i2c, adr & ~4); 1251 if (!fe) { 1252 dev_err(dev, "No STV6111 found at 0x%02x!\n", adr); 1253 return -ENODEV; 1254 } 1255 } 1256 return 0; 1257 } 1258 1259 static int demod_attach_dummy(struct ddb_input *input) 1260 { 1261 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 1262 struct device *dev = input->port->dev->dev; 1263 1264 dvb->fe = dvb_attach(dvb_dummy_fe_qam_attach); 1265 if (!dvb->fe) { 1266 dev_err(dev, "QAM dummy attach failed!\n"); 1267 return -ENODEV; 1268 } 1269 1270 return 0; 1271 } 1272 1273 static int start_feed(struct dvb_demux_feed *dvbdmxfeed) 1274 { 1275 struct dvb_demux *dvbdmx = dvbdmxfeed->demux; 1276 struct ddb_input *input = dvbdmx->priv; 1277 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 1278 1279 if (!dvb->users) 1280 ddb_input_start_all(input); 1281 1282 return ++dvb->users; 1283 } 1284 1285 static int stop_feed(struct dvb_demux_feed *dvbdmxfeed) 1286 { 1287 struct dvb_demux *dvbdmx = dvbdmxfeed->demux; 1288 struct ddb_input *input = dvbdmx->priv; 1289 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 1290 1291 if (--dvb->users) 1292 return dvb->users; 1293 1294 ddb_input_stop_all(input); 1295 return 0; 1296 } 1297 1298 static void dvb_input_detach(struct ddb_input *input) 1299 { 1300 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 1301 struct dvb_demux *dvbdemux = &dvb->demux; 1302 1303 switch (dvb->attached) { 1304 case 0x31: 1305 if (dvb->fe2) 1306 dvb_unregister_frontend(dvb->fe2); 1307 if (dvb->fe) 1308 dvb_unregister_frontend(dvb->fe); 1309 /* fallthrough */ 1310 case 0x30: 1311 dvb_module_release(dvb->i2c_client[0]); 1312 dvb->i2c_client[0] = NULL; 1313 1314 if (dvb->fe2) 1315 dvb_frontend_detach(dvb->fe2); 1316 if (dvb->fe) 1317 dvb_frontend_detach(dvb->fe); 1318 dvb->fe = NULL; 1319 dvb->fe2 = NULL; 1320 /* fallthrough */ 1321 case 0x20: 1322 dvb_net_release(&dvb->dvbnet); 1323 /* fallthrough */ 1324 case 0x12: 1325 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, 1326 &dvb->hw_frontend); 1327 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, 1328 &dvb->mem_frontend); 1329 /* fallthrough */ 1330 case 0x11: 1331 dvb_dmxdev_release(&dvb->dmxdev); 1332 /* fallthrough */ 1333 case 0x10: 1334 dvb_dmx_release(&dvb->demux); 1335 /* fallthrough */ 1336 case 0x01: 1337 break; 1338 } 1339 dvb->attached = 0x00; 1340 } 1341 1342 static int dvb_register_adapters(struct ddb *dev) 1343 { 1344 int i, ret = 0; 1345 struct ddb_port *port; 1346 struct dvb_adapter *adap; 1347 1348 if (adapter_alloc == 3) { 1349 port = &dev->port[0]; 1350 adap = port->dvb[0].adap; 1351 ret = dvb_register_adapter(adap, "DDBridge", THIS_MODULE, 1352 port->dev->dev, 1353 adapter_nr); 1354 if (ret < 0) 1355 return ret; 1356 port->dvb[0].adap_registered = 1; 1357 for (i = 0; i < dev->port_num; i++) { 1358 port = &dev->port[i]; 1359 port->dvb[0].adap = adap; 1360 port->dvb[1].adap = adap; 1361 } 1362 return 0; 1363 } 1364 1365 for (i = 0; i < dev->port_num; i++) { 1366 port = &dev->port[i]; 1367 switch (port->class) { 1368 case DDB_PORT_TUNER: 1369 adap = port->dvb[0].adap; 1370 ret = dvb_register_adapter(adap, "DDBridge", 1371 THIS_MODULE, 1372 port->dev->dev, 1373 adapter_nr); 1374 if (ret < 0) 1375 return ret; 1376 port->dvb[0].adap_registered = 1; 1377 1378 if (adapter_alloc > 0) { 1379 port->dvb[1].adap = port->dvb[0].adap; 1380 break; 1381 } 1382 adap = port->dvb[1].adap; 1383 ret = dvb_register_adapter(adap, "DDBridge", 1384 THIS_MODULE, 1385 port->dev->dev, 1386 adapter_nr); 1387 if (ret < 0) 1388 return ret; 1389 port->dvb[1].adap_registered = 1; 1390 break; 1391 1392 case DDB_PORT_CI: 1393 case DDB_PORT_LOOP: 1394 adap = port->dvb[0].adap; 1395 ret = dvb_register_adapter(adap, "DDBridge", 1396 THIS_MODULE, 1397 port->dev->dev, 1398 adapter_nr); 1399 if (ret < 0) 1400 return ret; 1401 port->dvb[0].adap_registered = 1; 1402 break; 1403 default: 1404 if (adapter_alloc < 2) 1405 break; 1406 adap = port->dvb[0].adap; 1407 ret = dvb_register_adapter(adap, "DDBridge", 1408 THIS_MODULE, 1409 port->dev->dev, 1410 adapter_nr); 1411 if (ret < 0) 1412 return ret; 1413 port->dvb[0].adap_registered = 1; 1414 break; 1415 } 1416 } 1417 return ret; 1418 } 1419 1420 static void dvb_unregister_adapters(struct ddb *dev) 1421 { 1422 int i; 1423 struct ddb_port *port; 1424 struct ddb_dvb *dvb; 1425 1426 for (i = 0; i < dev->link[0].info->port_num; i++) { 1427 port = &dev->port[i]; 1428 1429 dvb = &port->dvb[0]; 1430 if (dvb->adap_registered) 1431 dvb_unregister_adapter(dvb->adap); 1432 dvb->adap_registered = 0; 1433 1434 dvb = &port->dvb[1]; 1435 if (dvb->adap_registered) 1436 dvb_unregister_adapter(dvb->adap); 1437 dvb->adap_registered = 0; 1438 } 1439 } 1440 1441 static int dvb_input_attach(struct ddb_input *input) 1442 { 1443 int ret = 0; 1444 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 1445 struct ddb_port *port = input->port; 1446 struct dvb_adapter *adap = dvb->adap; 1447 struct dvb_demux *dvbdemux = &dvb->demux; 1448 struct ddb_ids *devids = &input->port->dev->link[input->port->lnr].ids; 1449 int par = 0, osc24 = 0, tsfast = 0; 1450 1451 /* 1452 * Determine if bridges with stv0910 demods can run with fast TS and 1453 * thus support high bandwidth transponders. 1454 * STV0910_PR and STV0910_P tuner types covers all relevant bridges, 1455 * namely the CineS2 V7(A) and the Octopus CI S2 Pro/Advanced. All 1456 * DuoFlex S2 V4(A) have type=DDB_TUNER_DVBS_STV0910 without any suffix 1457 * and are limited by the serial link to the bridge, thus won't work 1458 * in fast TS mode. 1459 */ 1460 if (port->nr == 0 && 1461 (port->type == DDB_TUNER_DVBS_STV0910_PR || 1462 port->type == DDB_TUNER_DVBS_STV0910_P)) { 1463 /* fast TS on port 0 requires FPGA version >= 1.7 */ 1464 if ((devids->hwid & 0x00ffffff) >= 0x00010007) 1465 tsfast = 1; 1466 } 1467 1468 dvb->attached = 0x01; 1469 1470 dvbdemux->priv = input; 1471 dvbdemux->dmx.capabilities = DMX_TS_FILTERING | 1472 DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING; 1473 dvbdemux->start_feed = start_feed; 1474 dvbdemux->stop_feed = stop_feed; 1475 dvbdemux->filternum = 256; 1476 dvbdemux->feednum = 256; 1477 ret = dvb_dmx_init(dvbdemux); 1478 if (ret < 0) 1479 return ret; 1480 dvb->attached = 0x10; 1481 1482 dvb->dmxdev.filternum = 256; 1483 dvb->dmxdev.demux = &dvbdemux->dmx; 1484 ret = dvb_dmxdev_init(&dvb->dmxdev, adap); 1485 if (ret < 0) 1486 goto err_detach; 1487 dvb->attached = 0x11; 1488 1489 dvb->mem_frontend.source = DMX_MEMORY_FE; 1490 dvb->demux.dmx.add_frontend(&dvb->demux.dmx, &dvb->mem_frontend); 1491 dvb->hw_frontend.source = DMX_FRONTEND_0; 1492 dvb->demux.dmx.add_frontend(&dvb->demux.dmx, &dvb->hw_frontend); 1493 ret = dvbdemux->dmx.connect_frontend(&dvbdemux->dmx, &dvb->hw_frontend); 1494 if (ret < 0) 1495 goto err_detach; 1496 dvb->attached = 0x12; 1497 1498 ret = dvb_net_init(adap, &dvb->dvbnet, dvb->dmxdev.demux); 1499 if (ret < 0) 1500 goto err_detach; 1501 dvb->attached = 0x20; 1502 1503 dvb->fe = NULL; 1504 dvb->fe2 = NULL; 1505 switch (port->type) { 1506 case DDB_TUNER_MXL5XX: 1507 if (ddb_fe_attach_mxl5xx(input) < 0) 1508 goto err_detach; 1509 break; 1510 case DDB_TUNER_DVBS_ST: 1511 if (demod_attach_stv0900(input, 0) < 0) 1512 goto err_detach; 1513 if (tuner_attach_stv6110(input, 0) < 0) 1514 goto err_tuner; 1515 break; 1516 case DDB_TUNER_DVBS_ST_AA: 1517 if (demod_attach_stv0900(input, 1) < 0) 1518 goto err_detach; 1519 if (tuner_attach_stv6110(input, 1) < 0) 1520 goto err_tuner; 1521 break; 1522 case DDB_TUNER_DVBS_STV0910: 1523 if (demod_attach_stv0910(input, 0, tsfast) < 0) 1524 goto err_detach; 1525 if (tuner_attach_stv6111(input, 0) < 0) 1526 goto err_tuner; 1527 break; 1528 case DDB_TUNER_DVBS_STV0910_PR: 1529 if (demod_attach_stv0910(input, 1, tsfast) < 0) 1530 goto err_detach; 1531 if (tuner_attach_stv6111(input, 1) < 0) 1532 goto err_tuner; 1533 break; 1534 case DDB_TUNER_DVBS_STV0910_P: 1535 if (demod_attach_stv0910(input, 0, tsfast) < 0) 1536 goto err_detach; 1537 if (tuner_attach_stv6111(input, 1) < 0) 1538 goto err_tuner; 1539 break; 1540 case DDB_TUNER_DVBCT_TR: 1541 if (demod_attach_drxk(input) < 0) 1542 goto err_detach; 1543 if (tuner_attach_tda18271(input) < 0) 1544 goto err_tuner; 1545 break; 1546 case DDB_TUNER_DVBCT_ST: 1547 if (demod_attach_stv0367(input) < 0) 1548 goto err_detach; 1549 if (tuner_attach_tda18212(input, port->type) < 0) 1550 goto err_tuner; 1551 break; 1552 case DDB_TUNER_DVBC2T2I_SONY_P: 1553 if (input->port->dev->link[input->port->lnr].info->ts_quirks & 1554 TS_QUIRK_ALT_OSC) 1555 osc24 = 0; 1556 else 1557 osc24 = 1; 1558 /* fall-through */ 1559 case DDB_TUNER_DVBCT2_SONY_P: 1560 case DDB_TUNER_DVBC2T2_SONY_P: 1561 case DDB_TUNER_ISDBT_SONY_P: 1562 if (input->port->dev->link[input->port->lnr].info->ts_quirks 1563 & TS_QUIRK_SERIAL) 1564 par = 0; 1565 else 1566 par = 1; 1567 if (demod_attach_cxd28xx(input, par, osc24) < 0) 1568 goto err_detach; 1569 if (tuner_attach_tda18212(input, port->type) < 0) 1570 goto err_tuner; 1571 break; 1572 case DDB_TUNER_DVBC2T2I_SONY: 1573 osc24 = 1; 1574 /* fall-through */ 1575 case DDB_TUNER_DVBCT2_SONY: 1576 case DDB_TUNER_DVBC2T2_SONY: 1577 case DDB_TUNER_ISDBT_SONY: 1578 if (demod_attach_cxd28xx(input, 0, osc24) < 0) 1579 goto err_detach; 1580 if (tuner_attach_tda18212(input, port->type) < 0) 1581 goto err_tuner; 1582 break; 1583 case DDB_TUNER_DUMMY: 1584 if (demod_attach_dummy(input) < 0) 1585 goto err_detach; 1586 break; 1587 case DDB_TUNER_MCI: 1588 if (ddb_fe_attach_mci(input) < 0) 1589 goto err_detach; 1590 break; 1591 default: 1592 return 0; 1593 } 1594 dvb->attached = 0x30; 1595 1596 if (dvb->fe) { 1597 if (dvb_register_frontend(adap, dvb->fe) < 0) 1598 goto err_detach; 1599 1600 if (dvb->fe2) { 1601 if (dvb_register_frontend(adap, dvb->fe2) < 0) { 1602 dvb_unregister_frontend(dvb->fe); 1603 goto err_detach; 1604 } 1605 dvb->fe2->tuner_priv = dvb->fe->tuner_priv; 1606 memcpy(&dvb->fe2->ops.tuner_ops, 1607 &dvb->fe->ops.tuner_ops, 1608 sizeof(struct dvb_tuner_ops)); 1609 } 1610 } 1611 1612 dvb->attached = 0x31; 1613 return 0; 1614 1615 err_tuner: 1616 dev_err(port->dev->dev, "tuner attach failed!\n"); 1617 1618 if (dvb->fe2) 1619 dvb_frontend_detach(dvb->fe2); 1620 if (dvb->fe) 1621 dvb_frontend_detach(dvb->fe); 1622 err_detach: 1623 dvb_input_detach(input); 1624 1625 /* return error from ret if set */ 1626 if (ret < 0) 1627 return ret; 1628 1629 return -ENODEV; 1630 } 1631 1632 static int port_has_encti(struct ddb_port *port) 1633 { 1634 struct device *dev = port->dev->dev; 1635 u8 val; 1636 int ret = i2c_read_reg(&port->i2c->adap, 0x20, 0, &val); 1637 1638 if (!ret) 1639 dev_info(dev, "[0x20]=0x%02x\n", val); 1640 return ret ? 0 : 1; 1641 } 1642 1643 static int port_has_cxd(struct ddb_port *port, u8 *type) 1644 { 1645 u8 val; 1646 u8 probe[4] = { 0xe0, 0x00, 0x00, 0x00 }, data[4]; 1647 struct i2c_msg msgs[2] = {{ .addr = 0x40, .flags = 0, 1648 .buf = probe, .len = 4 }, 1649 { .addr = 0x40, .flags = I2C_M_RD, 1650 .buf = data, .len = 4 } }; 1651 val = i2c_transfer(&port->i2c->adap, msgs, 2); 1652 if (val != 2) 1653 return 0; 1654 1655 if (data[0] == 0x02 && data[1] == 0x2b && data[3] == 0x43) 1656 *type = 2; 1657 else 1658 *type = 1; 1659 return 1; 1660 } 1661 1662 static int port_has_xo2(struct ddb_port *port, u8 *type, u8 *id) 1663 { 1664 u8 probe[1] = { 0x00 }, data[4]; 1665 1666 if (i2c_io(&port->i2c->adap, 0x10, probe, 1, data, 4)) 1667 return 0; 1668 if (data[0] == 'D' && data[1] == 'F') { 1669 *id = data[2]; 1670 *type = 1; 1671 return 1; 1672 } 1673 if (data[0] == 'C' && data[1] == 'I') { 1674 *id = data[2]; 1675 *type = 2; 1676 return 1; 1677 } 1678 return 0; 1679 } 1680 1681 static int port_has_stv0900(struct ddb_port *port) 1682 { 1683 u8 val; 1684 1685 if (i2c_read_reg16(&port->i2c->adap, 0x69, 0xf100, &val) < 0) 1686 return 0; 1687 return 1; 1688 } 1689 1690 static int port_has_stv0900_aa(struct ddb_port *port, u8 *id) 1691 { 1692 if (i2c_read_reg16(&port->i2c->adap, 0x68, 0xf100, id) < 0) 1693 return 0; 1694 return 1; 1695 } 1696 1697 static int port_has_drxks(struct ddb_port *port) 1698 { 1699 u8 val; 1700 1701 if (i2c_read(&port->i2c->adap, 0x29, &val) < 0) 1702 return 0; 1703 if (i2c_read(&port->i2c->adap, 0x2a, &val) < 0) 1704 return 0; 1705 return 1; 1706 } 1707 1708 static int port_has_stv0367(struct ddb_port *port) 1709 { 1710 u8 val; 1711 1712 if (i2c_read_reg16(&port->i2c->adap, 0x1e, 0xf000, &val) < 0) 1713 return 0; 1714 if (val != 0x60) 1715 return 0; 1716 if (i2c_read_reg16(&port->i2c->adap, 0x1f, 0xf000, &val) < 0) 1717 return 0; 1718 if (val != 0x60) 1719 return 0; 1720 return 1; 1721 } 1722 1723 static int init_xo2(struct ddb_port *port) 1724 { 1725 struct i2c_adapter *i2c = &port->i2c->adap; 1726 struct ddb *dev = port->dev; 1727 u8 val, data[2]; 1728 int res; 1729 1730 res = i2c_read_regs(i2c, 0x10, 0x04, data, 2); 1731 if (res < 0) 1732 return res; 1733 1734 if (data[0] != 0x01) { 1735 dev_info(dev->dev, "Port %d: invalid XO2\n", port->nr); 1736 return -1; 1737 } 1738 1739 i2c_read_reg(i2c, 0x10, 0x08, &val); 1740 if (val != 0) { 1741 i2c_write_reg(i2c, 0x10, 0x08, 0x00); 1742 msleep(100); 1743 } 1744 /* Enable tuner power, disable pll, reset demods */ 1745 i2c_write_reg(i2c, 0x10, 0x08, 0x04); 1746 usleep_range(2000, 3000); 1747 /* Release demod resets */ 1748 i2c_write_reg(i2c, 0x10, 0x08, 0x07); 1749 1750 /* speed: 0=55,1=75,2=90,3=104 MBit/s */ 1751 i2c_write_reg(i2c, 0x10, 0x09, xo2_speed); 1752 1753 if (dev->link[port->lnr].info->con_clock) { 1754 dev_info(dev->dev, "Setting continuous clock for XO2\n"); 1755 i2c_write_reg(i2c, 0x10, 0x0a, 0x03); 1756 i2c_write_reg(i2c, 0x10, 0x0b, 0x03); 1757 } else { 1758 i2c_write_reg(i2c, 0x10, 0x0a, 0x01); 1759 i2c_write_reg(i2c, 0x10, 0x0b, 0x01); 1760 } 1761 1762 usleep_range(2000, 3000); 1763 /* Start XO2 PLL */ 1764 i2c_write_reg(i2c, 0x10, 0x08, 0x87); 1765 1766 return 0; 1767 } 1768 1769 static int init_xo2_ci(struct ddb_port *port) 1770 { 1771 struct i2c_adapter *i2c = &port->i2c->adap; 1772 struct ddb *dev = port->dev; 1773 u8 val, data[2]; 1774 int res; 1775 1776 res = i2c_read_regs(i2c, 0x10, 0x04, data, 2); 1777 if (res < 0) 1778 return res; 1779 1780 if (data[0] > 1) { 1781 dev_info(dev->dev, "Port %d: invalid XO2 CI %02x\n", 1782 port->nr, data[0]); 1783 return -1; 1784 } 1785 dev_info(dev->dev, "Port %d: DuoFlex CI %u.%u\n", 1786 port->nr, data[0], data[1]); 1787 1788 i2c_read_reg(i2c, 0x10, 0x08, &val); 1789 if (val != 0) { 1790 i2c_write_reg(i2c, 0x10, 0x08, 0x00); 1791 msleep(100); 1792 } 1793 /* Enable both CI */ 1794 i2c_write_reg(i2c, 0x10, 0x08, 3); 1795 usleep_range(2000, 3000); 1796 1797 /* speed: 0=55,1=75,2=90,3=104 MBit/s */ 1798 i2c_write_reg(i2c, 0x10, 0x09, 1); 1799 1800 i2c_write_reg(i2c, 0x10, 0x08, 0x83); 1801 usleep_range(2000, 3000); 1802 1803 if (dev->link[port->lnr].info->con_clock) { 1804 dev_info(dev->dev, "Setting continuous clock for DuoFlex CI\n"); 1805 i2c_write_reg(i2c, 0x10, 0x0a, 0x03); 1806 i2c_write_reg(i2c, 0x10, 0x0b, 0x03); 1807 } else { 1808 i2c_write_reg(i2c, 0x10, 0x0a, 0x01); 1809 i2c_write_reg(i2c, 0x10, 0x0b, 0x01); 1810 } 1811 return 0; 1812 } 1813 1814 static int port_has_cxd28xx(struct ddb_port *port, u8 *id) 1815 { 1816 struct i2c_adapter *i2c = &port->i2c->adap; 1817 int status; 1818 1819 status = i2c_write_reg(&port->i2c->adap, 0x6e, 0, 0); 1820 if (status) 1821 return 0; 1822 status = i2c_read_reg(i2c, 0x6e, 0xfd, id); 1823 if (status) 1824 return 0; 1825 return 1; 1826 } 1827 1828 static char *xo2names[] = { 1829 "DUAL DVB-S2", "DUAL DVB-C/T/T2", 1830 "DUAL DVB-ISDBT", "DUAL DVB-C/C2/T/T2", 1831 "DUAL ATSC", "DUAL DVB-C/C2/T/T2,ISDB-T", 1832 "", "" 1833 }; 1834 1835 static char *xo2types[] = { 1836 "DVBS_ST", "DVBCT2_SONY", 1837 "ISDBT_SONY", "DVBC2T2_SONY", 1838 "ATSC_ST", "DVBC2T2I_SONY" 1839 }; 1840 1841 static void ddb_port_probe(struct ddb_port *port) 1842 { 1843 struct ddb *dev = port->dev; 1844 u32 l = port->lnr; 1845 u8 id, type; 1846 1847 port->name = "NO MODULE"; 1848 port->type_name = "NONE"; 1849 port->class = DDB_PORT_NONE; 1850 1851 /* Handle missing ports and ports without I2C */ 1852 1853 if (dummy_tuner && !port->nr && 1854 dev->link[0].ids.device == 0x0005) { 1855 port->name = "DUMMY"; 1856 port->class = DDB_PORT_TUNER; 1857 port->type = DDB_TUNER_DUMMY; 1858 port->type_name = "DUMMY"; 1859 return; 1860 } 1861 1862 if (port->nr == ts_loop) { 1863 port->name = "TS LOOP"; 1864 port->class = DDB_PORT_LOOP; 1865 return; 1866 } 1867 1868 if (port->nr == 1 && dev->link[l].info->type == DDB_OCTOPUS_CI && 1869 dev->link[l].info->i2c_mask == 1) { 1870 port->name = "NO TAB"; 1871 port->class = DDB_PORT_NONE; 1872 return; 1873 } 1874 1875 if (dev->link[l].info->type == DDB_OCTOPUS_MAX) { 1876 port->name = "DUAL DVB-S2 MAX"; 1877 port->type_name = "MXL5XX"; 1878 port->class = DDB_PORT_TUNER; 1879 port->type = DDB_TUNER_MXL5XX; 1880 if (port->i2c) 1881 ddbwritel(dev, I2C_SPEED_400, 1882 port->i2c->regs + I2C_TIMING); 1883 return; 1884 } 1885 1886 if (dev->link[l].info->type == DDB_OCTOPUS_MCI) { 1887 if (port->nr >= dev->link[l].info->mci) 1888 return; 1889 port->name = "DUAL MCI"; 1890 port->type_name = "MCI"; 1891 port->class = DDB_PORT_TUNER; 1892 port->type = DDB_TUNER_MCI; 1893 return; 1894 } 1895 1896 if (port->nr > 1 && dev->link[l].info->type == DDB_OCTOPUS_CI) { 1897 port->name = "CI internal"; 1898 port->type_name = "INTERNAL"; 1899 port->class = DDB_PORT_CI; 1900 port->type = DDB_CI_INTERNAL; 1901 } 1902 1903 if (!port->i2c) 1904 return; 1905 1906 /* Probe ports with I2C */ 1907 1908 if (port_has_cxd(port, &id)) { 1909 if (id == 1) { 1910 port->name = "CI"; 1911 port->type_name = "CXD2099"; 1912 port->class = DDB_PORT_CI; 1913 port->type = DDB_CI_EXTERNAL_SONY; 1914 ddbwritel(dev, I2C_SPEED_400, 1915 port->i2c->regs + I2C_TIMING); 1916 } else { 1917 dev_info(dev->dev, "Port %d: Uninitialized DuoFlex\n", 1918 port->nr); 1919 return; 1920 } 1921 } else if (port_has_xo2(port, &type, &id)) { 1922 ddbwritel(dev, I2C_SPEED_400, port->i2c->regs + I2C_TIMING); 1923 /*dev_info(dev->dev, "XO2 ID %02x\n", id);*/ 1924 if (type == 2) { 1925 port->name = "DuoFlex CI"; 1926 port->class = DDB_PORT_CI; 1927 port->type = DDB_CI_EXTERNAL_XO2; 1928 port->type_name = "CI_XO2"; 1929 init_xo2_ci(port); 1930 return; 1931 } 1932 id >>= 2; 1933 if (id > 5) { 1934 port->name = "unknown XO2 DuoFlex"; 1935 port->type_name = "UNKNOWN"; 1936 } else { 1937 port->name = xo2names[id]; 1938 port->class = DDB_PORT_TUNER; 1939 port->type = DDB_TUNER_XO2 + id; 1940 port->type_name = xo2types[id]; 1941 init_xo2(port); 1942 } 1943 } else if (port_has_cxd28xx(port, &id)) { 1944 switch (id) { 1945 case 0xa4: 1946 port->name = "DUAL DVB-C2T2 CXD2843"; 1947 port->type = DDB_TUNER_DVBC2T2_SONY_P; 1948 port->type_name = "DVBC2T2_SONY"; 1949 break; 1950 case 0xb1: 1951 port->name = "DUAL DVB-CT2 CXD2837"; 1952 port->type = DDB_TUNER_DVBCT2_SONY_P; 1953 port->type_name = "DVBCT2_SONY"; 1954 break; 1955 case 0xb0: 1956 port->name = "DUAL ISDB-T CXD2838"; 1957 port->type = DDB_TUNER_ISDBT_SONY_P; 1958 port->type_name = "ISDBT_SONY"; 1959 break; 1960 case 0xc1: 1961 port->name = "DUAL DVB-C2T2 ISDB-T CXD2854"; 1962 port->type = DDB_TUNER_DVBC2T2I_SONY_P; 1963 port->type_name = "DVBC2T2I_ISDBT_SONY"; 1964 break; 1965 default: 1966 return; 1967 } 1968 port->class = DDB_PORT_TUNER; 1969 ddbwritel(dev, I2C_SPEED_400, port->i2c->regs + I2C_TIMING); 1970 } else if (port_has_stv0900(port)) { 1971 port->name = "DUAL DVB-S2"; 1972 port->class = DDB_PORT_TUNER; 1973 port->type = DDB_TUNER_DVBS_ST; 1974 port->type_name = "DVBS_ST"; 1975 ddbwritel(dev, I2C_SPEED_100, port->i2c->regs + I2C_TIMING); 1976 } else if (port_has_stv0900_aa(port, &id)) { 1977 port->name = "DUAL DVB-S2"; 1978 port->class = DDB_PORT_TUNER; 1979 if (id == 0x51) { 1980 if (port->nr == 0 && 1981 dev->link[l].info->ts_quirks & TS_QUIRK_REVERSED) 1982 port->type = DDB_TUNER_DVBS_STV0910_PR; 1983 else 1984 port->type = DDB_TUNER_DVBS_STV0910_P; 1985 port->type_name = "DVBS_ST_0910"; 1986 } else { 1987 port->type = DDB_TUNER_DVBS_ST_AA; 1988 port->type_name = "DVBS_ST_AA"; 1989 } 1990 ddbwritel(dev, I2C_SPEED_100, port->i2c->regs + I2C_TIMING); 1991 } else if (port_has_drxks(port)) { 1992 port->name = "DUAL DVB-C/T"; 1993 port->class = DDB_PORT_TUNER; 1994 port->type = DDB_TUNER_DVBCT_TR; 1995 port->type_name = "DVBCT_TR"; 1996 ddbwritel(dev, I2C_SPEED_400, port->i2c->regs + I2C_TIMING); 1997 } else if (port_has_stv0367(port)) { 1998 port->name = "DUAL DVB-C/T"; 1999 port->class = DDB_PORT_TUNER; 2000 port->type = DDB_TUNER_DVBCT_ST; 2001 port->type_name = "DVBCT_ST"; 2002 ddbwritel(dev, I2C_SPEED_100, port->i2c->regs + I2C_TIMING); 2003 } else if (port_has_encti(port)) { 2004 port->name = "ENCTI"; 2005 port->class = DDB_PORT_LOOP; 2006 } 2007 } 2008 2009 /****************************************************************************/ 2010 /****************************************************************************/ 2011 /****************************************************************************/ 2012 2013 static int ddb_port_attach(struct ddb_port *port) 2014 { 2015 int ret = 0; 2016 2017 switch (port->class) { 2018 case DDB_PORT_TUNER: 2019 ret = dvb_input_attach(port->input[0]); 2020 if (ret < 0) 2021 break; 2022 ret = dvb_input_attach(port->input[1]); 2023 if (ret < 0) { 2024 dvb_input_detach(port->input[0]); 2025 break; 2026 } 2027 port->input[0]->redi = port->input[0]; 2028 port->input[1]->redi = port->input[1]; 2029 break; 2030 case DDB_PORT_CI: 2031 ret = ddb_ci_attach(port, ci_bitrate); 2032 if (ret < 0) 2033 break; 2034 /* fall-through */ 2035 case DDB_PORT_LOOP: 2036 ret = dvb_register_device(port->dvb[0].adap, 2037 &port->dvb[0].dev, 2038 &dvbdev_ci, (void *)port->output, 2039 DVB_DEVICE_SEC, 0); 2040 break; 2041 default: 2042 break; 2043 } 2044 if (ret < 0) 2045 dev_err(port->dev->dev, "port_attach on port %d failed\n", 2046 port->nr); 2047 return ret; 2048 } 2049 2050 int ddb_ports_attach(struct ddb *dev) 2051 { 2052 int i, numports, err_ports = 0, ret = 0; 2053 struct ddb_port *port; 2054 2055 if (dev->port_num) { 2056 ret = dvb_register_adapters(dev); 2057 if (ret < 0) { 2058 dev_err(dev->dev, "Registering adapters failed. Check DVB_MAX_ADAPTERS in config.\n"); 2059 return ret; 2060 } 2061 } 2062 2063 numports = dev->port_num; 2064 2065 for (i = 0; i < dev->port_num; i++) { 2066 port = &dev->port[i]; 2067 if (port->class != DDB_PORT_NONE) { 2068 ret = ddb_port_attach(port); 2069 if (ret) 2070 err_ports++; 2071 } else { 2072 numports--; 2073 } 2074 } 2075 2076 if (err_ports) { 2077 if (err_ports == numports) { 2078 dev_err(dev->dev, "All connected ports failed to initialise!\n"); 2079 return -ENODEV; 2080 } 2081 2082 dev_warn(dev->dev, "%d of %d connected ports failed to initialise!\n", 2083 err_ports, numports); 2084 } 2085 2086 return 0; 2087 } 2088 2089 void ddb_ports_detach(struct ddb *dev) 2090 { 2091 int i; 2092 struct ddb_port *port; 2093 2094 for (i = 0; i < dev->port_num; i++) { 2095 port = &dev->port[i]; 2096 2097 switch (port->class) { 2098 case DDB_PORT_TUNER: 2099 dvb_input_detach(port->input[1]); 2100 dvb_input_detach(port->input[0]); 2101 break; 2102 case DDB_PORT_CI: 2103 case DDB_PORT_LOOP: 2104 ddb_ci_detach(port); 2105 break; 2106 } 2107 } 2108 dvb_unregister_adapters(dev); 2109 } 2110 2111 /* Copy input DMA pointers to output DMA and ACK. */ 2112 2113 static void input_write_output(struct ddb_input *input, 2114 struct ddb_output *output) 2115 { 2116 ddbwritel(output->port->dev, 2117 input->dma->stat, DMA_BUFFER_ACK(output->dma)); 2118 output->dma->cbuf = (input->dma->stat >> 11) & 0x1f; 2119 output->dma->coff = (input->dma->stat & 0x7ff) << 7; 2120 } 2121 2122 static void output_ack_input(struct ddb_output *output, 2123 struct ddb_input *input) 2124 { 2125 ddbwritel(input->port->dev, 2126 output->dma->stat, DMA_BUFFER_ACK(input->dma)); 2127 } 2128 2129 static void input_write_dvb(struct ddb_input *input, 2130 struct ddb_input *input2) 2131 { 2132 struct ddb_dvb *dvb = &input2->port->dvb[input2->nr & 1]; 2133 struct ddb_dma *dma, *dma2; 2134 struct ddb *dev = input->port->dev; 2135 int ack = 1; 2136 2137 dma = input->dma; 2138 dma2 = input->dma; 2139 /* 2140 * if there also is an output connected, do not ACK. 2141 * input_write_output will ACK. 2142 */ 2143 if (input->redo) { 2144 dma2 = input->redo->dma; 2145 ack = 0; 2146 } 2147 while (dma->cbuf != ((dma->stat >> 11) & 0x1f) || 2148 (4 & dma->ctrl)) { 2149 if (4 & dma->ctrl) { 2150 /* dev_err(dev->dev, "Overflow dma %d\n", dma->nr); */ 2151 ack = 1; 2152 } 2153 if (alt_dma) 2154 dma_sync_single_for_cpu(dev->dev, dma2->pbuf[dma->cbuf], 2155 dma2->size, DMA_FROM_DEVICE); 2156 dvb_dmx_swfilter_packets(&dvb->demux, 2157 dma2->vbuf[dma->cbuf], 2158 dma2->size / 188); 2159 dma->cbuf = (dma->cbuf + 1) % dma2->num; 2160 if (ack) 2161 ddbwritel(dev, (dma->cbuf << 11), 2162 DMA_BUFFER_ACK(dma)); 2163 dma->stat = safe_ddbreadl(dev, DMA_BUFFER_CURRENT(dma)); 2164 dma->ctrl = safe_ddbreadl(dev, DMA_BUFFER_CONTROL(dma)); 2165 } 2166 } 2167 2168 static void input_work(struct work_struct *work) 2169 { 2170 struct ddb_dma *dma = container_of(work, struct ddb_dma, work); 2171 struct ddb_input *input = (struct ddb_input *)dma->io; 2172 struct ddb *dev = input->port->dev; 2173 unsigned long flags; 2174 2175 spin_lock_irqsave(&dma->lock, flags); 2176 if (!dma->running) { 2177 spin_unlock_irqrestore(&dma->lock, flags); 2178 return; 2179 } 2180 dma->stat = ddbreadl(dev, DMA_BUFFER_CURRENT(dma)); 2181 dma->ctrl = ddbreadl(dev, DMA_BUFFER_CONTROL(dma)); 2182 2183 if (input->redi) 2184 input_write_dvb(input, input->redi); 2185 if (input->redo) 2186 input_write_output(input, input->redo); 2187 wake_up(&dma->wq); 2188 spin_unlock_irqrestore(&dma->lock, flags); 2189 } 2190 2191 static void input_handler(void *data) 2192 { 2193 struct ddb_input *input = (struct ddb_input *)data; 2194 struct ddb_dma *dma = input->dma; 2195 2196 queue_work(ddb_wq, &dma->work); 2197 } 2198 2199 static void output_work(struct work_struct *work) 2200 { 2201 struct ddb_dma *dma = container_of(work, struct ddb_dma, work); 2202 struct ddb_output *output = (struct ddb_output *)dma->io; 2203 struct ddb *dev = output->port->dev; 2204 unsigned long flags; 2205 2206 spin_lock_irqsave(&dma->lock, flags); 2207 if (!dma->running) 2208 goto unlock_exit; 2209 dma->stat = ddbreadl(dev, DMA_BUFFER_CURRENT(dma)); 2210 dma->ctrl = ddbreadl(dev, DMA_BUFFER_CONTROL(dma)); 2211 if (output->redi) 2212 output_ack_input(output, output->redi); 2213 wake_up(&dma->wq); 2214 unlock_exit: 2215 spin_unlock_irqrestore(&dma->lock, flags); 2216 } 2217 2218 static void output_handler(void *data) 2219 { 2220 struct ddb_output *output = (struct ddb_output *)data; 2221 struct ddb_dma *dma = output->dma; 2222 2223 queue_work(ddb_wq, &dma->work); 2224 } 2225 2226 /****************************************************************************/ 2227 /****************************************************************************/ 2228 2229 static const struct ddb_regmap *io_regmap(struct ddb_io *io, int link) 2230 { 2231 const struct ddb_info *info; 2232 2233 if (link) 2234 info = io->port->dev->link[io->port->lnr].info; 2235 else 2236 info = io->port->dev->link[0].info; 2237 2238 if (!info) 2239 return NULL; 2240 2241 return info->regmap; 2242 } 2243 2244 static void ddb_dma_init(struct ddb_io *io, int nr, int out) 2245 { 2246 struct ddb_dma *dma; 2247 const struct ddb_regmap *rm = io_regmap(io, 0); 2248 2249 dma = out ? &io->port->dev->odma[nr] : &io->port->dev->idma[nr]; 2250 io->dma = dma; 2251 dma->io = io; 2252 2253 spin_lock_init(&dma->lock); 2254 init_waitqueue_head(&dma->wq); 2255 if (out) { 2256 INIT_WORK(&dma->work, output_work); 2257 dma->regs = rm->odma->base + rm->odma->size * nr; 2258 dma->bufregs = rm->odma_buf->base + rm->odma_buf->size * nr; 2259 dma->num = dma_buf_num; 2260 dma->size = dma_buf_size * 128 * 47; 2261 dma->div = 1; 2262 } else { 2263 INIT_WORK(&dma->work, input_work); 2264 dma->regs = rm->idma->base + rm->idma->size * nr; 2265 dma->bufregs = rm->idma_buf->base + rm->idma_buf->size * nr; 2266 dma->num = dma_buf_num; 2267 dma->size = dma_buf_size * 128 * 47; 2268 dma->div = 1; 2269 } 2270 ddbwritel(io->port->dev, 0, DMA_BUFFER_ACK(dma)); 2271 dev_dbg(io->port->dev->dev, "init link %u, io %u, dma %u, dmaregs %08x bufregs %08x\n", 2272 io->port->lnr, io->nr, nr, dma->regs, dma->bufregs); 2273 } 2274 2275 static void ddb_input_init(struct ddb_port *port, int nr, int pnr, int anr) 2276 { 2277 struct ddb *dev = port->dev; 2278 struct ddb_input *input = &dev->input[anr]; 2279 const struct ddb_regmap *rm; 2280 2281 port->input[pnr] = input; 2282 input->nr = nr; 2283 input->port = port; 2284 rm = io_regmap(input, 1); 2285 input->regs = DDB_LINK_TAG(port->lnr) | 2286 (rm->input->base + rm->input->size * nr); 2287 dev_dbg(dev->dev, "init link %u, input %u, regs %08x\n", 2288 port->lnr, nr, input->regs); 2289 2290 if (dev->has_dma) { 2291 const struct ddb_regmap *rm0 = io_regmap(input, 0); 2292 u32 base = rm0->irq_base_idma; 2293 u32 dma_nr = nr; 2294 2295 if (port->lnr) 2296 dma_nr += 32 + (port->lnr - 1) * 8; 2297 2298 dev_dbg(dev->dev, "init link %u, input %u, handler %u\n", 2299 port->lnr, nr, dma_nr + base); 2300 2301 ddb_irq_set(dev, 0, dma_nr + base, &input_handler, input); 2302 ddb_dma_init(input, dma_nr, 0); 2303 } 2304 } 2305 2306 static void ddb_output_init(struct ddb_port *port, int nr) 2307 { 2308 struct ddb *dev = port->dev; 2309 struct ddb_output *output = &dev->output[nr]; 2310 const struct ddb_regmap *rm; 2311 2312 port->output = output; 2313 output->nr = nr; 2314 output->port = port; 2315 rm = io_regmap(output, 1); 2316 output->regs = DDB_LINK_TAG(port->lnr) | 2317 (rm->output->base + rm->output->size * nr); 2318 2319 dev_dbg(dev->dev, "init link %u, output %u, regs %08x\n", 2320 port->lnr, nr, output->regs); 2321 2322 if (dev->has_dma) { 2323 const struct ddb_regmap *rm0 = io_regmap(output, 0); 2324 u32 base = rm0->irq_base_odma; 2325 2326 ddb_irq_set(dev, 0, nr + base, &output_handler, output); 2327 ddb_dma_init(output, nr, 1); 2328 } 2329 } 2330 2331 static int ddb_port_match_i2c(struct ddb_port *port) 2332 { 2333 struct ddb *dev = port->dev; 2334 u32 i; 2335 2336 for (i = 0; i < dev->i2c_num; i++) { 2337 if (dev->i2c[i].link == port->lnr && 2338 dev->i2c[i].nr == port->nr) { 2339 port->i2c = &dev->i2c[i]; 2340 return 1; 2341 } 2342 } 2343 return 0; 2344 } 2345 2346 static int ddb_port_match_link_i2c(struct ddb_port *port) 2347 { 2348 struct ddb *dev = port->dev; 2349 u32 i; 2350 2351 for (i = 0; i < dev->i2c_num; i++) { 2352 if (dev->i2c[i].link == port->lnr) { 2353 port->i2c = &dev->i2c[i]; 2354 return 1; 2355 } 2356 } 2357 return 0; 2358 } 2359 2360 void ddb_ports_init(struct ddb *dev) 2361 { 2362 u32 i, l, p; 2363 struct ddb_port *port; 2364 const struct ddb_info *info; 2365 const struct ddb_regmap *rm; 2366 2367 for (p = l = 0; l < DDB_MAX_LINK; l++) { 2368 info = dev->link[l].info; 2369 if (!info) 2370 continue; 2371 rm = info->regmap; 2372 if (!rm) 2373 continue; 2374 for (i = 0; i < info->port_num; i++, p++) { 2375 port = &dev->port[p]; 2376 port->dev = dev; 2377 port->nr = i; 2378 port->lnr = l; 2379 port->pnr = p; 2380 port->gap = 0xffffffff; 2381 port->obr = ci_bitrate; 2382 mutex_init(&port->i2c_gate_lock); 2383 2384 if (!ddb_port_match_i2c(port)) { 2385 if (info->type == DDB_OCTOPUS_MAX) 2386 ddb_port_match_link_i2c(port); 2387 } 2388 2389 ddb_port_probe(port); 2390 2391 port->dvb[0].adap = &dev->adap[2 * p]; 2392 port->dvb[1].adap = &dev->adap[2 * p + 1]; 2393 2394 if (port->class == DDB_PORT_NONE && i && p && 2395 dev->port[p - 1].type == DDB_CI_EXTERNAL_XO2) { 2396 port->class = DDB_PORT_CI; 2397 port->type = DDB_CI_EXTERNAL_XO2_B; 2398 port->name = "DuoFlex CI_B"; 2399 port->i2c = dev->port[p - 1].i2c; 2400 } 2401 2402 dev_info(dev->dev, "Port %u: Link %u, Link Port %u (TAB %u): %s\n", 2403 port->pnr, port->lnr, port->nr, port->nr + 1, 2404 port->name); 2405 2406 if (port->class == DDB_PORT_CI && 2407 port->type == DDB_CI_EXTERNAL_XO2) { 2408 ddb_input_init(port, 2 * i, 0, 2 * i); 2409 ddb_output_init(port, i); 2410 continue; 2411 } 2412 2413 if (port->class == DDB_PORT_CI && 2414 port->type == DDB_CI_EXTERNAL_XO2_B) { 2415 ddb_input_init(port, 2 * i - 1, 0, 2 * i - 1); 2416 ddb_output_init(port, i); 2417 continue; 2418 } 2419 2420 if (port->class == DDB_PORT_NONE) 2421 continue; 2422 2423 switch (dev->link[l].info->type) { 2424 case DDB_OCTOPUS_CI: 2425 if (i >= 2) { 2426 ddb_input_init(port, 2 + i, 0, 2 + i); 2427 ddb_input_init(port, 4 + i, 1, 4 + i); 2428 ddb_output_init(port, i); 2429 break; 2430 } /* fallthrough */ 2431 case DDB_OCTOPUS: 2432 ddb_input_init(port, 2 * i, 0, 2 * i); 2433 ddb_input_init(port, 2 * i + 1, 1, 2 * i + 1); 2434 ddb_output_init(port, i); 2435 break; 2436 case DDB_OCTOPUS_MAX: 2437 case DDB_OCTOPUS_MAX_CT: 2438 case DDB_OCTOPUS_MCI: 2439 ddb_input_init(port, 2 * i, 0, 2 * p); 2440 ddb_input_init(port, 2 * i + 1, 1, 2 * p + 1); 2441 break; 2442 default: 2443 break; 2444 } 2445 } 2446 } 2447 dev->port_num = p; 2448 } 2449 2450 void ddb_ports_release(struct ddb *dev) 2451 { 2452 int i; 2453 struct ddb_port *port; 2454 2455 for (i = 0; i < dev->port_num; i++) { 2456 port = &dev->port[i]; 2457 if (port->input[0] && port->input[0]->dma) 2458 cancel_work_sync(&port->input[0]->dma->work); 2459 if (port->input[1] && port->input[1]->dma) 2460 cancel_work_sync(&port->input[1]->dma->work); 2461 if (port->output && port->output->dma) 2462 cancel_work_sync(&port->output->dma->work); 2463 } 2464 } 2465 2466 /****************************************************************************/ 2467 /****************************************************************************/ 2468 /****************************************************************************/ 2469 2470 #define IRQ_HANDLE(_nr) \ 2471 do { if ((s & (1UL << ((_nr) & 0x1f))) && \ 2472 dev->link[0].irq[_nr].handler) \ 2473 dev->link[0].irq[_nr].handler(dev->link[0].irq[_nr].data); } \ 2474 while (0) 2475 2476 #define IRQ_HANDLE_NIBBLE(_shift) { \ 2477 if (s & (0x0000000f << ((_shift) & 0x1f))) { \ 2478 IRQ_HANDLE(0 + (_shift)); \ 2479 IRQ_HANDLE(1 + (_shift)); \ 2480 IRQ_HANDLE(2 + (_shift)); \ 2481 IRQ_HANDLE(3 + (_shift)); \ 2482 } \ 2483 } 2484 2485 #define IRQ_HANDLE_BYTE(_shift) { \ 2486 if (s & (0x000000ff << ((_shift) & 0x1f))) { \ 2487 IRQ_HANDLE(0 + (_shift)); \ 2488 IRQ_HANDLE(1 + (_shift)); \ 2489 IRQ_HANDLE(2 + (_shift)); \ 2490 IRQ_HANDLE(3 + (_shift)); \ 2491 IRQ_HANDLE(4 + (_shift)); \ 2492 IRQ_HANDLE(5 + (_shift)); \ 2493 IRQ_HANDLE(6 + (_shift)); \ 2494 IRQ_HANDLE(7 + (_shift)); \ 2495 } \ 2496 } 2497 2498 static void irq_handle_msg(struct ddb *dev, u32 s) 2499 { 2500 dev->i2c_irq++; 2501 IRQ_HANDLE_NIBBLE(0); 2502 } 2503 2504 static void irq_handle_io(struct ddb *dev, u32 s) 2505 { 2506 dev->ts_irq++; 2507 IRQ_HANDLE_NIBBLE(4); 2508 IRQ_HANDLE_BYTE(8); 2509 IRQ_HANDLE_BYTE(16); 2510 IRQ_HANDLE_BYTE(24); 2511 } 2512 2513 irqreturn_t ddb_irq_handler0(int irq, void *dev_id) 2514 { 2515 struct ddb *dev = (struct ddb *)dev_id; 2516 u32 mask = 0x8fffff00; 2517 u32 s = mask & ddbreadl(dev, INTERRUPT_STATUS); 2518 2519 if (!s) 2520 return IRQ_NONE; 2521 do { 2522 if (s & 0x80000000) 2523 return IRQ_NONE; 2524 ddbwritel(dev, s, INTERRUPT_ACK); 2525 irq_handle_io(dev, s); 2526 } while ((s = mask & ddbreadl(dev, INTERRUPT_STATUS))); 2527 2528 return IRQ_HANDLED; 2529 } 2530 2531 irqreturn_t ddb_irq_handler1(int irq, void *dev_id) 2532 { 2533 struct ddb *dev = (struct ddb *)dev_id; 2534 u32 mask = 0x8000000f; 2535 u32 s = mask & ddbreadl(dev, INTERRUPT_STATUS); 2536 2537 if (!s) 2538 return IRQ_NONE; 2539 do { 2540 if (s & 0x80000000) 2541 return IRQ_NONE; 2542 ddbwritel(dev, s, INTERRUPT_ACK); 2543 irq_handle_msg(dev, s); 2544 } while ((s = mask & ddbreadl(dev, INTERRUPT_STATUS))); 2545 2546 return IRQ_HANDLED; 2547 } 2548 2549 irqreturn_t ddb_irq_handler(int irq, void *dev_id) 2550 { 2551 struct ddb *dev = (struct ddb *)dev_id; 2552 u32 s = ddbreadl(dev, INTERRUPT_STATUS); 2553 int ret = IRQ_HANDLED; 2554 2555 if (!s) 2556 return IRQ_NONE; 2557 do { 2558 if (s & 0x80000000) 2559 return IRQ_NONE; 2560 ddbwritel(dev, s, INTERRUPT_ACK); 2561 2562 if (s & 0x0000000f) 2563 irq_handle_msg(dev, s); 2564 if (s & 0x0fffff00) 2565 irq_handle_io(dev, s); 2566 } while ((s = ddbreadl(dev, INTERRUPT_STATUS))); 2567 2568 return ret; 2569 } 2570 2571 /****************************************************************************/ 2572 /****************************************************************************/ 2573 /****************************************************************************/ 2574 2575 static int reg_wait(struct ddb *dev, u32 reg, u32 bit) 2576 { 2577 u32 count = 0; 2578 2579 while (safe_ddbreadl(dev, reg) & bit) { 2580 ndelay(10); 2581 if (++count == 100) 2582 return -1; 2583 } 2584 return 0; 2585 } 2586 2587 static int flashio(struct ddb *dev, u32 lnr, u8 *wbuf, u32 wlen, u8 *rbuf, 2588 u32 rlen) 2589 { 2590 u32 data, shift; 2591 u32 tag = DDB_LINK_TAG(lnr); 2592 struct ddb_link *link = &dev->link[lnr]; 2593 2594 mutex_lock(&link->flash_mutex); 2595 if (wlen > 4) 2596 ddbwritel(dev, 1, tag | SPI_CONTROL); 2597 while (wlen > 4) { 2598 /* FIXME: check for big-endian */ 2599 data = swab32(*(u32 *)wbuf); 2600 wbuf += 4; 2601 wlen -= 4; 2602 ddbwritel(dev, data, tag | SPI_DATA); 2603 if (reg_wait(dev, tag | SPI_CONTROL, 4)) 2604 goto fail; 2605 } 2606 if (rlen) 2607 ddbwritel(dev, 0x0001 | ((wlen << (8 + 3)) & 0x1f00), 2608 tag | SPI_CONTROL); 2609 else 2610 ddbwritel(dev, 0x0003 | ((wlen << (8 + 3)) & 0x1f00), 2611 tag | SPI_CONTROL); 2612 2613 data = 0; 2614 shift = ((4 - wlen) * 8); 2615 while (wlen) { 2616 data <<= 8; 2617 data |= *wbuf; 2618 wlen--; 2619 wbuf++; 2620 } 2621 if (shift) 2622 data <<= shift; 2623 ddbwritel(dev, data, tag | SPI_DATA); 2624 if (reg_wait(dev, tag | SPI_CONTROL, 4)) 2625 goto fail; 2626 2627 if (!rlen) { 2628 ddbwritel(dev, 0, tag | SPI_CONTROL); 2629 goto exit; 2630 } 2631 if (rlen > 4) 2632 ddbwritel(dev, 1, tag | SPI_CONTROL); 2633 2634 while (rlen > 4) { 2635 ddbwritel(dev, 0xffffffff, tag | SPI_DATA); 2636 if (reg_wait(dev, tag | SPI_CONTROL, 4)) 2637 goto fail; 2638 data = ddbreadl(dev, tag | SPI_DATA); 2639 *(u32 *)rbuf = swab32(data); 2640 rbuf += 4; 2641 rlen -= 4; 2642 } 2643 ddbwritel(dev, 0x0003 | ((rlen << (8 + 3)) & 0x1F00), 2644 tag | SPI_CONTROL); 2645 ddbwritel(dev, 0xffffffff, tag | SPI_DATA); 2646 if (reg_wait(dev, tag | SPI_CONTROL, 4)) 2647 goto fail; 2648 2649 data = ddbreadl(dev, tag | SPI_DATA); 2650 ddbwritel(dev, 0, tag | SPI_CONTROL); 2651 2652 if (rlen < 4) 2653 data <<= ((4 - rlen) * 8); 2654 2655 while (rlen > 0) { 2656 *rbuf = ((data >> 24) & 0xff); 2657 data <<= 8; 2658 rbuf++; 2659 rlen--; 2660 } 2661 exit: 2662 mutex_unlock(&link->flash_mutex); 2663 return 0; 2664 fail: 2665 mutex_unlock(&link->flash_mutex); 2666 return -1; 2667 } 2668 2669 int ddbridge_flashread(struct ddb *dev, u32 link, u8 *buf, u32 addr, u32 len) 2670 { 2671 u8 cmd[4] = {0x03, (addr >> 16) & 0xff, 2672 (addr >> 8) & 0xff, addr & 0xff}; 2673 2674 return flashio(dev, link, cmd, 4, buf, len); 2675 } 2676 2677 /* 2678 * TODO/FIXME: add/implement IOCTLs from upstream driver 2679 */ 2680 2681 #define DDB_NAME "ddbridge" 2682 2683 static u32 ddb_num; 2684 static int ddb_major; 2685 static DEFINE_MUTEX(ddb_mutex); 2686 2687 static int ddb_release(struct inode *inode, struct file *file) 2688 { 2689 struct ddb *dev = file->private_data; 2690 2691 dev->ddb_dev_users--; 2692 return 0; 2693 } 2694 2695 static int ddb_open(struct inode *inode, struct file *file) 2696 { 2697 struct ddb *dev = ddbs[iminor(inode)]; 2698 2699 if (dev->ddb_dev_users) 2700 return -EBUSY; 2701 dev->ddb_dev_users++; 2702 file->private_data = dev; 2703 return 0; 2704 } 2705 2706 static long ddb_ioctl(struct file *file, unsigned int cmd, unsigned long arg) 2707 { 2708 struct ddb *dev = file->private_data; 2709 2710 dev_warn(dev->dev, "DDB IOCTLs unsupported (cmd: %d, arg: %lu)\n", 2711 cmd, arg); 2712 2713 return -ENOTTY; 2714 } 2715 2716 static const struct file_operations ddb_fops = { 2717 .unlocked_ioctl = ddb_ioctl, 2718 .open = ddb_open, 2719 .release = ddb_release, 2720 }; 2721 2722 static char *ddb_devnode(struct device *device, umode_t *mode) 2723 { 2724 struct ddb *dev = dev_get_drvdata(device); 2725 2726 return kasprintf(GFP_KERNEL, "ddbridge/card%d", dev->nr); 2727 } 2728 2729 #define __ATTR_MRO(_name, _show) { \ 2730 .attr = { .name = __stringify(_name), .mode = 0444 }, \ 2731 .show = _show, \ 2732 } 2733 2734 #define __ATTR_MWO(_name, _store) { \ 2735 .attr = { .name = __stringify(_name), .mode = 0222 }, \ 2736 .store = _store, \ 2737 } 2738 2739 static ssize_t ports_show(struct device *device, 2740 struct device_attribute *attr, char *buf) 2741 { 2742 struct ddb *dev = dev_get_drvdata(device); 2743 2744 return sprintf(buf, "%d\n", dev->port_num); 2745 } 2746 2747 static ssize_t ts_irq_show(struct device *device, 2748 struct device_attribute *attr, char *buf) 2749 { 2750 struct ddb *dev = dev_get_drvdata(device); 2751 2752 return sprintf(buf, "%d\n", dev->ts_irq); 2753 } 2754 2755 static ssize_t i2c_irq_show(struct device *device, 2756 struct device_attribute *attr, char *buf) 2757 { 2758 struct ddb *dev = dev_get_drvdata(device); 2759 2760 return sprintf(buf, "%d\n", dev->i2c_irq); 2761 } 2762 2763 static ssize_t fan_show(struct device *device, 2764 struct device_attribute *attr, char *buf) 2765 { 2766 struct ddb *dev = dev_get_drvdata(device); 2767 u32 val; 2768 2769 val = ddbreadl(dev, GPIO_OUTPUT) & 1; 2770 return sprintf(buf, "%d\n", val); 2771 } 2772 2773 static ssize_t fan_store(struct device *device, struct device_attribute *d, 2774 const char *buf, size_t count) 2775 { 2776 struct ddb *dev = dev_get_drvdata(device); 2777 u32 val; 2778 2779 if (sscanf(buf, "%u\n", &val) != 1) 2780 return -EINVAL; 2781 ddbwritel(dev, 1, GPIO_DIRECTION); 2782 ddbwritel(dev, val & 1, GPIO_OUTPUT); 2783 return count; 2784 } 2785 2786 static ssize_t fanspeed_show(struct device *device, 2787 struct device_attribute *attr, char *buf) 2788 { 2789 struct ddb *dev = dev_get_drvdata(device); 2790 int num = attr->attr.name[8] - 0x30; 2791 struct ddb_link *link = &dev->link[num]; 2792 u32 spd; 2793 2794 spd = ddblreadl(link, TEMPMON_FANCONTROL) & 0xff; 2795 return sprintf(buf, "%u\n", spd * 100); 2796 } 2797 2798 static ssize_t temp_show(struct device *device, 2799 struct device_attribute *attr, char *buf) 2800 { 2801 struct ddb *dev = dev_get_drvdata(device); 2802 struct ddb_link *link = &dev->link[0]; 2803 struct i2c_adapter *adap; 2804 int temp, temp2; 2805 u8 tmp[2]; 2806 2807 if (!link->info->temp_num) 2808 return sprintf(buf, "no sensor\n"); 2809 adap = &dev->i2c[link->info->temp_bus].adap; 2810 if (i2c_read_regs(adap, 0x48, 0, tmp, 2) < 0) 2811 return sprintf(buf, "read_error\n"); 2812 temp = (tmp[0] << 3) | (tmp[1] >> 5); 2813 temp *= 125; 2814 if (link->info->temp_num == 2) { 2815 if (i2c_read_regs(adap, 0x49, 0, tmp, 2) < 0) 2816 return sprintf(buf, "read_error\n"); 2817 temp2 = (tmp[0] << 3) | (tmp[1] >> 5); 2818 temp2 *= 125; 2819 return sprintf(buf, "%d %d\n", temp, temp2); 2820 } 2821 return sprintf(buf, "%d\n", temp); 2822 } 2823 2824 static ssize_t ctemp_show(struct device *device, 2825 struct device_attribute *attr, char *buf) 2826 { 2827 struct ddb *dev = dev_get_drvdata(device); 2828 struct i2c_adapter *adap; 2829 int temp; 2830 u8 tmp[2]; 2831 int num = attr->attr.name[4] - 0x30; 2832 2833 adap = &dev->i2c[num].adap; 2834 if (!adap) 2835 return 0; 2836 if (i2c_read_regs(adap, 0x49, 0, tmp, 2) < 0) 2837 if (i2c_read_regs(adap, 0x4d, 0, tmp, 2) < 0) 2838 return sprintf(buf, "no sensor\n"); 2839 temp = tmp[0] * 1000; 2840 return sprintf(buf, "%d\n", temp); 2841 } 2842 2843 static ssize_t led_show(struct device *device, 2844 struct device_attribute *attr, char *buf) 2845 { 2846 struct ddb *dev = dev_get_drvdata(device); 2847 int num = attr->attr.name[3] - 0x30; 2848 2849 return sprintf(buf, "%d\n", dev->leds & (1 << num) ? 1 : 0); 2850 } 2851 2852 static void ddb_set_led(struct ddb *dev, int num, int val) 2853 { 2854 if (!dev->link[0].info->led_num) 2855 return; 2856 switch (dev->port[num].class) { 2857 case DDB_PORT_TUNER: 2858 switch (dev->port[num].type) { 2859 case DDB_TUNER_DVBS_ST: 2860 i2c_write_reg16(&dev->i2c[num].adap, 2861 0x69, 0xf14c, val ? 2 : 0); 2862 break; 2863 case DDB_TUNER_DVBCT_ST: 2864 i2c_write_reg16(&dev->i2c[num].adap, 2865 0x1f, 0xf00e, 0); 2866 i2c_write_reg16(&dev->i2c[num].adap, 2867 0x1f, 0xf00f, val ? 1 : 0); 2868 break; 2869 case DDB_TUNER_XO2 ... DDB_TUNER_DVBC2T2I_SONY: 2870 { 2871 u8 v; 2872 2873 i2c_read_reg(&dev->i2c[num].adap, 0x10, 0x08, &v); 2874 v = (v & ~0x10) | (val ? 0x10 : 0); 2875 i2c_write_reg(&dev->i2c[num].adap, 0x10, 0x08, v); 2876 break; 2877 } 2878 default: 2879 break; 2880 } 2881 break; 2882 } 2883 } 2884 2885 static ssize_t led_store(struct device *device, 2886 struct device_attribute *attr, 2887 const char *buf, size_t count) 2888 { 2889 struct ddb *dev = dev_get_drvdata(device); 2890 int num = attr->attr.name[3] - 0x30; 2891 u32 val; 2892 2893 if (sscanf(buf, "%u\n", &val) != 1) 2894 return -EINVAL; 2895 if (val) 2896 dev->leds |= (1 << num); 2897 else 2898 dev->leds &= ~(1 << num); 2899 ddb_set_led(dev, num, val); 2900 return count; 2901 } 2902 2903 static ssize_t snr_show(struct device *device, 2904 struct device_attribute *attr, char *buf) 2905 { 2906 struct ddb *dev = dev_get_drvdata(device); 2907 char snr[32]; 2908 int num = attr->attr.name[3] - 0x30; 2909 2910 if (dev->port[num].type >= DDB_TUNER_XO2) { 2911 if (i2c_read_regs(&dev->i2c[num].adap, 0x10, 0x10, snr, 16) < 0) 2912 return sprintf(buf, "NO SNR\n"); 2913 snr[16] = 0; 2914 } else { 2915 /* serial number at 0x100-0x11f */ 2916 if (i2c_read_regs16(&dev->i2c[num].adap, 2917 0x57, 0x100, snr, 32) < 0) 2918 if (i2c_read_regs16(&dev->i2c[num].adap, 2919 0x50, 0x100, snr, 32) < 0) 2920 return sprintf(buf, "NO SNR\n"); 2921 snr[31] = 0; /* in case it is not terminated on EEPROM */ 2922 } 2923 return sprintf(buf, "%s\n", snr); 2924 } 2925 2926 static ssize_t bsnr_show(struct device *device, 2927 struct device_attribute *attr, char *buf) 2928 { 2929 struct ddb *dev = dev_get_drvdata(device); 2930 char snr[16]; 2931 2932 ddbridge_flashread(dev, 0, snr, 0x10, 15); 2933 snr[15] = 0; /* in case it is not terminated on EEPROM */ 2934 return sprintf(buf, "%s\n", snr); 2935 } 2936 2937 static ssize_t bpsnr_show(struct device *device, 2938 struct device_attribute *attr, char *buf) 2939 { 2940 struct ddb *dev = dev_get_drvdata(device); 2941 unsigned char snr[32]; 2942 2943 if (!dev->i2c_num) 2944 return 0; 2945 2946 if (i2c_read_regs16(&dev->i2c[0].adap, 2947 0x50, 0x0000, snr, 32) < 0 || 2948 snr[0] == 0xff) 2949 return sprintf(buf, "NO SNR\n"); 2950 snr[31] = 0; /* in case it is not terminated on EEPROM */ 2951 return sprintf(buf, "%s\n", snr); 2952 } 2953 2954 static ssize_t redirect_show(struct device *device, 2955 struct device_attribute *attr, char *buf) 2956 { 2957 return 0; 2958 } 2959 2960 static ssize_t redirect_store(struct device *device, 2961 struct device_attribute *attr, 2962 const char *buf, size_t count) 2963 { 2964 unsigned int i, p; 2965 int res; 2966 2967 if (sscanf(buf, "%x %x\n", &i, &p) != 2) 2968 return -EINVAL; 2969 res = ddb_redirect(i, p); 2970 if (res < 0) 2971 return res; 2972 dev_info(device, "redirect: %02x, %02x\n", i, p); 2973 return count; 2974 } 2975 2976 static ssize_t gap_show(struct device *device, 2977 struct device_attribute *attr, char *buf) 2978 { 2979 struct ddb *dev = dev_get_drvdata(device); 2980 int num = attr->attr.name[3] - 0x30; 2981 2982 return sprintf(buf, "%d\n", dev->port[num].gap); 2983 } 2984 2985 static ssize_t gap_store(struct device *device, struct device_attribute *attr, 2986 const char *buf, size_t count) 2987 { 2988 struct ddb *dev = dev_get_drvdata(device); 2989 int num = attr->attr.name[3] - 0x30; 2990 unsigned int val; 2991 2992 if (sscanf(buf, "%u\n", &val) != 1) 2993 return -EINVAL; 2994 if (val > 128) 2995 return -EINVAL; 2996 if (val == 128) 2997 val = 0xffffffff; 2998 dev->port[num].gap = val; 2999 return count; 3000 } 3001 3002 static ssize_t version_show(struct device *device, 3003 struct device_attribute *attr, char *buf) 3004 { 3005 struct ddb *dev = dev_get_drvdata(device); 3006 3007 return sprintf(buf, "%08x %08x\n", 3008 dev->link[0].ids.hwid, dev->link[0].ids.regmapid); 3009 } 3010 3011 static ssize_t hwid_show(struct device *device, 3012 struct device_attribute *attr, char *buf) 3013 { 3014 struct ddb *dev = dev_get_drvdata(device); 3015 3016 return sprintf(buf, "0x%08X\n", dev->link[0].ids.hwid); 3017 } 3018 3019 static ssize_t regmap_show(struct device *device, 3020 struct device_attribute *attr, char *buf) 3021 { 3022 struct ddb *dev = dev_get_drvdata(device); 3023 3024 return sprintf(buf, "0x%08X\n", dev->link[0].ids.regmapid); 3025 } 3026 3027 static ssize_t fmode_show(struct device *device, 3028 struct device_attribute *attr, char *buf) 3029 { 3030 int num = attr->attr.name[5] - 0x30; 3031 struct ddb *dev = dev_get_drvdata(device); 3032 3033 return sprintf(buf, "%u\n", dev->link[num].lnb.fmode); 3034 } 3035 3036 static ssize_t devid_show(struct device *device, 3037 struct device_attribute *attr, char *buf) 3038 { 3039 int num = attr->attr.name[5] - 0x30; 3040 struct ddb *dev = dev_get_drvdata(device); 3041 3042 return sprintf(buf, "%08x\n", dev->link[num].ids.devid); 3043 } 3044 3045 static ssize_t fmode_store(struct device *device, struct device_attribute *attr, 3046 const char *buf, size_t count) 3047 { 3048 struct ddb *dev = dev_get_drvdata(device); 3049 int num = attr->attr.name[5] - 0x30; 3050 unsigned int val; 3051 3052 if (sscanf(buf, "%u\n", &val) != 1) 3053 return -EINVAL; 3054 if (val > 3) 3055 return -EINVAL; 3056 ddb_lnb_init_fmode(dev, &dev->link[num], val); 3057 return count; 3058 } 3059 3060 static struct device_attribute ddb_attrs[] = { 3061 __ATTR_RO(version), 3062 __ATTR_RO(ports), 3063 __ATTR_RO(ts_irq), 3064 __ATTR_RO(i2c_irq), 3065 __ATTR(gap0, 0664, gap_show, gap_store), 3066 __ATTR(gap1, 0664, gap_show, gap_store), 3067 __ATTR(gap2, 0664, gap_show, gap_store), 3068 __ATTR(gap3, 0664, gap_show, gap_store), 3069 __ATTR(fmode0, 0664, fmode_show, fmode_store), 3070 __ATTR(fmode1, 0664, fmode_show, fmode_store), 3071 __ATTR(fmode2, 0664, fmode_show, fmode_store), 3072 __ATTR(fmode3, 0664, fmode_show, fmode_store), 3073 __ATTR_MRO(devid0, devid_show), 3074 __ATTR_MRO(devid1, devid_show), 3075 __ATTR_MRO(devid2, devid_show), 3076 __ATTR_MRO(devid3, devid_show), 3077 __ATTR_RO(hwid), 3078 __ATTR_RO(regmap), 3079 __ATTR(redirect, 0664, redirect_show, redirect_store), 3080 __ATTR_MRO(snr, bsnr_show), 3081 __ATTR_RO(bpsnr), 3082 __ATTR_NULL, 3083 }; 3084 3085 static struct device_attribute ddb_attrs_temp[] = { 3086 __ATTR_RO(temp), 3087 }; 3088 3089 static struct device_attribute ddb_attrs_fan[] = { 3090 __ATTR(fan, 0664, fan_show, fan_store), 3091 }; 3092 3093 static struct device_attribute ddb_attrs_snr[] = { 3094 __ATTR_MRO(snr0, snr_show), 3095 __ATTR_MRO(snr1, snr_show), 3096 __ATTR_MRO(snr2, snr_show), 3097 __ATTR_MRO(snr3, snr_show), 3098 }; 3099 3100 static struct device_attribute ddb_attrs_ctemp[] = { 3101 __ATTR_MRO(temp0, ctemp_show), 3102 __ATTR_MRO(temp1, ctemp_show), 3103 __ATTR_MRO(temp2, ctemp_show), 3104 __ATTR_MRO(temp3, ctemp_show), 3105 }; 3106 3107 static struct device_attribute ddb_attrs_led[] = { 3108 __ATTR(led0, 0664, led_show, led_store), 3109 __ATTR(led1, 0664, led_show, led_store), 3110 __ATTR(led2, 0664, led_show, led_store), 3111 __ATTR(led3, 0664, led_show, led_store), 3112 }; 3113 3114 static struct device_attribute ddb_attrs_fanspeed[] = { 3115 __ATTR_MRO(fanspeed0, fanspeed_show), 3116 __ATTR_MRO(fanspeed1, fanspeed_show), 3117 __ATTR_MRO(fanspeed2, fanspeed_show), 3118 __ATTR_MRO(fanspeed3, fanspeed_show), 3119 }; 3120 3121 static struct class ddb_class = { 3122 .name = "ddbridge", 3123 .owner = THIS_MODULE, 3124 .devnode = ddb_devnode, 3125 }; 3126 3127 static int ddb_class_create(void) 3128 { 3129 ddb_major = register_chrdev(0, DDB_NAME, &ddb_fops); 3130 if (ddb_major < 0) 3131 return ddb_major; 3132 if (class_register(&ddb_class) < 0) 3133 return -1; 3134 return 0; 3135 } 3136 3137 static void ddb_class_destroy(void) 3138 { 3139 class_unregister(&ddb_class); 3140 unregister_chrdev(ddb_major, DDB_NAME); 3141 } 3142 3143 static void ddb_device_attrs_del(struct ddb *dev) 3144 { 3145 int i; 3146 3147 for (i = 0; i < 4; i++) 3148 if (dev->link[i].info && dev->link[i].info->tempmon_irq) 3149 device_remove_file(dev->ddb_dev, 3150 &ddb_attrs_fanspeed[i]); 3151 for (i = 0; i < dev->link[0].info->temp_num; i++) 3152 device_remove_file(dev->ddb_dev, &ddb_attrs_temp[i]); 3153 for (i = 0; i < dev->link[0].info->fan_num; i++) 3154 device_remove_file(dev->ddb_dev, &ddb_attrs_fan[i]); 3155 for (i = 0; i < dev->i2c_num && i < 4; i++) { 3156 if (dev->link[0].info->led_num) 3157 device_remove_file(dev->ddb_dev, &ddb_attrs_led[i]); 3158 device_remove_file(dev->ddb_dev, &ddb_attrs_snr[i]); 3159 device_remove_file(dev->ddb_dev, &ddb_attrs_ctemp[i]); 3160 } 3161 for (i = 0; ddb_attrs[i].attr.name; i++) 3162 device_remove_file(dev->ddb_dev, &ddb_attrs[i]); 3163 } 3164 3165 static int ddb_device_attrs_add(struct ddb *dev) 3166 { 3167 int i; 3168 3169 for (i = 0; ddb_attrs[i].attr.name; i++) 3170 if (device_create_file(dev->ddb_dev, &ddb_attrs[i])) 3171 goto fail; 3172 for (i = 0; i < dev->link[0].info->temp_num; i++) 3173 if (device_create_file(dev->ddb_dev, &ddb_attrs_temp[i])) 3174 goto fail; 3175 for (i = 0; i < dev->link[0].info->fan_num; i++) 3176 if (device_create_file(dev->ddb_dev, &ddb_attrs_fan[i])) 3177 goto fail; 3178 for (i = 0; (i < dev->i2c_num) && (i < 4); i++) { 3179 if (device_create_file(dev->ddb_dev, &ddb_attrs_snr[i])) 3180 goto fail; 3181 if (device_create_file(dev->ddb_dev, &ddb_attrs_ctemp[i])) 3182 goto fail; 3183 if (dev->link[0].info->led_num) 3184 if (device_create_file(dev->ddb_dev, 3185 &ddb_attrs_led[i])) 3186 goto fail; 3187 } 3188 for (i = 0; i < 4; i++) 3189 if (dev->link[i].info && dev->link[i].info->tempmon_irq) 3190 if (device_create_file(dev->ddb_dev, 3191 &ddb_attrs_fanspeed[i])) 3192 goto fail; 3193 return 0; 3194 fail: 3195 return -1; 3196 } 3197 3198 int ddb_device_create(struct ddb *dev) 3199 { 3200 int res = 0; 3201 3202 if (ddb_num == DDB_MAX_ADAPTER) 3203 return -ENOMEM; 3204 mutex_lock(&ddb_mutex); 3205 dev->nr = ddb_num; 3206 ddbs[dev->nr] = dev; 3207 dev->ddb_dev = device_create(&ddb_class, dev->dev, 3208 MKDEV(ddb_major, dev->nr), 3209 dev, "ddbridge%d", dev->nr); 3210 if (IS_ERR(dev->ddb_dev)) { 3211 res = PTR_ERR(dev->ddb_dev); 3212 dev_info(dev->dev, "Could not create ddbridge%d\n", dev->nr); 3213 goto fail; 3214 } 3215 res = ddb_device_attrs_add(dev); 3216 if (res) { 3217 ddb_device_attrs_del(dev); 3218 device_destroy(&ddb_class, MKDEV(ddb_major, dev->nr)); 3219 ddbs[dev->nr] = NULL; 3220 dev->ddb_dev = ERR_PTR(-ENODEV); 3221 } else { 3222 ddb_num++; 3223 } 3224 fail: 3225 mutex_unlock(&ddb_mutex); 3226 return res; 3227 } 3228 3229 void ddb_device_destroy(struct ddb *dev) 3230 { 3231 if (IS_ERR(dev->ddb_dev)) 3232 return; 3233 ddb_device_attrs_del(dev); 3234 device_destroy(&ddb_class, MKDEV(ddb_major, dev->nr)); 3235 } 3236 3237 /****************************************************************************/ 3238 /****************************************************************************/ 3239 /****************************************************************************/ 3240 3241 static void tempmon_setfan(struct ddb_link *link) 3242 { 3243 u32 temp, temp2, pwm; 3244 3245 if ((ddblreadl(link, TEMPMON_CONTROL) & 3246 TEMPMON_CONTROL_OVERTEMP) != 0) { 3247 dev_info(link->dev->dev, "Over temperature condition\n"); 3248 link->overtemperature_error = 1; 3249 } 3250 temp = (ddblreadl(link, TEMPMON_SENSOR0) >> 8) & 0xFF; 3251 if (temp & 0x80) 3252 temp = 0; 3253 temp2 = (ddblreadl(link, TEMPMON_SENSOR1) >> 8) & 0xFF; 3254 if (temp2 & 0x80) 3255 temp2 = 0; 3256 if (temp2 > temp) 3257 temp = temp2; 3258 3259 pwm = (ddblreadl(link, TEMPMON_FANCONTROL) >> 8) & 0x0F; 3260 if (pwm > 10) 3261 pwm = 10; 3262 3263 if (temp >= link->temp_tab[pwm]) { 3264 while (pwm < 10 && temp >= link->temp_tab[pwm + 1]) 3265 pwm += 1; 3266 } else { 3267 while (pwm > 1 && temp < link->temp_tab[pwm - 2]) 3268 pwm -= 1; 3269 } 3270 ddblwritel(link, (pwm << 8), TEMPMON_FANCONTROL); 3271 } 3272 3273 static void temp_handler(void *data) 3274 { 3275 struct ddb_link *link = (struct ddb_link *)data; 3276 3277 spin_lock(&link->temp_lock); 3278 tempmon_setfan(link); 3279 spin_unlock(&link->temp_lock); 3280 } 3281 3282 static int tempmon_init(struct ddb_link *link, int first_time) 3283 { 3284 struct ddb *dev = link->dev; 3285 int status = 0; 3286 u32 l = link->nr; 3287 3288 spin_lock_irq(&link->temp_lock); 3289 if (first_time) { 3290 static u8 temperature_table[11] = { 3291 30, 35, 40, 45, 50, 55, 60, 65, 70, 75, 80 }; 3292 3293 memcpy(link->temp_tab, temperature_table, 3294 sizeof(temperature_table)); 3295 } 3296 ddb_irq_set(dev, l, link->info->tempmon_irq, temp_handler, link); 3297 ddblwritel(link, (TEMPMON_CONTROL_OVERTEMP | TEMPMON_CONTROL_AUTOSCAN | 3298 TEMPMON_CONTROL_INTENABLE), 3299 TEMPMON_CONTROL); 3300 ddblwritel(link, (3 << 8), TEMPMON_FANCONTROL); 3301 3302 link->overtemperature_error = 3303 ((ddblreadl(link, TEMPMON_CONTROL) & 3304 TEMPMON_CONTROL_OVERTEMP) != 0); 3305 if (link->overtemperature_error) { 3306 dev_info(link->dev->dev, "Over temperature condition\n"); 3307 status = -1; 3308 } 3309 tempmon_setfan(link); 3310 spin_unlock_irq(&link->temp_lock); 3311 return status; 3312 } 3313 3314 static int ddb_init_tempmon(struct ddb_link *link) 3315 { 3316 const struct ddb_info *info = link->info; 3317 3318 if (!info->tempmon_irq) 3319 return 0; 3320 if (info->type == DDB_OCTOPUS_MAX_CT) 3321 if (link->ids.regmapid < 0x00010002) 3322 return 0; 3323 spin_lock_init(&link->temp_lock); 3324 dev_dbg(link->dev->dev, "init_tempmon\n"); 3325 return tempmon_init(link, 1); 3326 } 3327 3328 /****************************************************************************/ 3329 /****************************************************************************/ 3330 /****************************************************************************/ 3331 3332 static int ddb_init_boards(struct ddb *dev) 3333 { 3334 const struct ddb_info *info; 3335 struct ddb_link *link; 3336 u32 l; 3337 3338 for (l = 0; l < DDB_MAX_LINK; l++) { 3339 link = &dev->link[l]; 3340 info = link->info; 3341 3342 if (!info) 3343 continue; 3344 if (info->board_control) { 3345 ddbwritel(dev, 0, DDB_LINK_TAG(l) | BOARD_CONTROL); 3346 msleep(100); 3347 ddbwritel(dev, info->board_control_2, 3348 DDB_LINK_TAG(l) | BOARD_CONTROL); 3349 usleep_range(2000, 3000); 3350 ddbwritel(dev, 3351 info->board_control_2 | info->board_control, 3352 DDB_LINK_TAG(l) | BOARD_CONTROL); 3353 usleep_range(2000, 3000); 3354 } 3355 ddb_init_tempmon(link); 3356 } 3357 return 0; 3358 } 3359 3360 int ddb_init(struct ddb *dev) 3361 { 3362 mutex_init(&dev->link[0].lnb.lock); 3363 mutex_init(&dev->link[0].flash_mutex); 3364 if (no_init) { 3365 ddb_device_create(dev); 3366 return 0; 3367 } 3368 3369 ddb_init_boards(dev); 3370 3371 if (ddb_i2c_init(dev) < 0) 3372 goto fail1; 3373 ddb_ports_init(dev); 3374 if (ddb_buffers_alloc(dev) < 0) { 3375 dev_info(dev->dev, "Could not allocate buffer memory\n"); 3376 goto fail2; 3377 } 3378 if (ddb_ports_attach(dev) < 0) 3379 goto fail3; 3380 3381 ddb_device_create(dev); 3382 3383 if (dev->link[0].info->fan_num) { 3384 ddbwritel(dev, 1, GPIO_DIRECTION); 3385 ddbwritel(dev, 1, GPIO_OUTPUT); 3386 } 3387 return 0; 3388 3389 fail3: 3390 dev_err(dev->dev, "fail3\n"); 3391 ddb_ports_detach(dev); 3392 ddb_buffers_free(dev); 3393 fail2: 3394 dev_err(dev->dev, "fail2\n"); 3395 ddb_ports_release(dev); 3396 ddb_i2c_release(dev); 3397 fail1: 3398 dev_err(dev->dev, "fail1\n"); 3399 return -1; 3400 } 3401 3402 void ddb_unmap(struct ddb *dev) 3403 { 3404 if (dev->regs) 3405 iounmap(dev->regs); 3406 vfree(dev); 3407 } 3408 3409 int ddb_exit_ddbridge(int stage, int error) 3410 { 3411 switch (stage) { 3412 default: 3413 case 2: 3414 destroy_workqueue(ddb_wq); 3415 /* fall-through */ 3416 case 1: 3417 ddb_class_destroy(); 3418 break; 3419 } 3420 3421 return error; 3422 } 3423 3424 int ddb_init_ddbridge(void) 3425 { 3426 if (dma_buf_num < 8) 3427 dma_buf_num = 8; 3428 if (dma_buf_num > 32) 3429 dma_buf_num = 32; 3430 if (dma_buf_size < 1) 3431 dma_buf_size = 1; 3432 if (dma_buf_size > 43) 3433 dma_buf_size = 43; 3434 3435 if (ddb_class_create() < 0) 3436 return -1; 3437 ddb_wq = alloc_workqueue("ddbridge", 0, 0); 3438 if (!ddb_wq) 3439 return ddb_exit_ddbridge(1, -1); 3440 3441 return 0; 3442 } 3443