1 /* 2 * ddbridge-core.c: Digital Devices bridge core functions 3 * 4 * Copyright (C) 2010-2017 Digital Devices GmbH 5 * Marcus Metzler <mocm@metzlerbros.de> 6 * Ralph Metzler <rjkm@metzlerbros.de> 7 * 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License 11 * version 2 only, as published by the Free Software Foundation. 12 * 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * To obtain the license, point your browser to 20 * http://www.gnu.org/copyleft/gpl.html 21 */ 22 23 #include <linux/module.h> 24 #include <linux/init.h> 25 #include <linux/interrupt.h> 26 #include <linux/delay.h> 27 #include <linux/slab.h> 28 #include <linux/poll.h> 29 #include <linux/io.h> 30 #include <linux/pci.h> 31 #include <linux/pci_ids.h> 32 #include <linux/timer.h> 33 #include <linux/i2c.h> 34 #include <linux/swab.h> 35 #include <linux/vmalloc.h> 36 37 #include "ddbridge.h" 38 #include "ddbridge-i2c.h" 39 #include "ddbridge-regs.h" 40 #include "ddbridge-max.h" 41 #include "ddbridge-ci.h" 42 #include "ddbridge-io.h" 43 44 #include "tda18271c2dd.h" 45 #include "stv6110x.h" 46 #include "stv090x.h" 47 #include "lnbh24.h" 48 #include "drxk.h" 49 #include "stv0367.h" 50 #include "stv0367_priv.h" 51 #include "cxd2841er.h" 52 #include "tda18212.h" 53 #include "stv0910.h" 54 #include "stv6111.h" 55 #include "lnbh25.h" 56 #include "cxd2099.h" 57 58 /****************************************************************************/ 59 60 #define DDB_MAX_ADAPTER 64 61 62 /****************************************************************************/ 63 64 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr); 65 66 static int adapter_alloc; 67 module_param(adapter_alloc, int, 0444); 68 MODULE_PARM_DESC(adapter_alloc, 69 "0-one adapter per io, 1-one per tab with io, 2-one per tab, 3-one for all"); 70 71 /****************************************************************************/ 72 73 static DEFINE_MUTEX(redirect_lock); 74 75 struct workqueue_struct *ddb_wq; 76 77 static struct ddb *ddbs[DDB_MAX_ADAPTER]; 78 79 /****************************************************************************/ 80 /****************************************************************************/ 81 /****************************************************************************/ 82 83 static void ddb_set_dma_table(struct ddb_io *io) 84 { 85 struct ddb *dev = io->port->dev; 86 struct ddb_dma *dma = io->dma; 87 u32 i; 88 u64 mem; 89 90 if (!dma) 91 return; 92 for (i = 0; i < dma->num; i++) { 93 mem = dma->pbuf[i]; 94 ddbwritel(dev, mem & 0xffffffff, dma->bufregs + i * 8); 95 ddbwritel(dev, mem >> 32, dma->bufregs + i * 8 + 4); 96 } 97 dma->bufval = ((dma->div & 0x0f) << 16) | 98 ((dma->num & 0x1f) << 11) | 99 ((dma->size >> 7) & 0x7ff); 100 } 101 102 static void ddb_set_dma_tables(struct ddb *dev) 103 { 104 u32 i; 105 106 for (i = 0; i < DDB_MAX_PORT; i++) { 107 if (dev->port[i].input[0]) 108 ddb_set_dma_table(dev->port[i].input[0]); 109 if (dev->port[i].input[1]) 110 ddb_set_dma_table(dev->port[i].input[1]); 111 if (dev->port[i].output) 112 ddb_set_dma_table(dev->port[i].output); 113 } 114 } 115 116 /****************************************************************************/ 117 /****************************************************************************/ 118 /****************************************************************************/ 119 120 static void ddb_redirect_dma(struct ddb *dev, 121 struct ddb_dma *sdma, 122 struct ddb_dma *ddma) 123 { 124 u32 i, base; 125 u64 mem; 126 127 sdma->bufval = ddma->bufval; 128 base = sdma->bufregs; 129 for (i = 0; i < ddma->num; i++) { 130 mem = ddma->pbuf[i]; 131 ddbwritel(dev, mem & 0xffffffff, base + i * 8); 132 ddbwritel(dev, mem >> 32, base + i * 8 + 4); 133 } 134 } 135 136 static int ddb_unredirect(struct ddb_port *port) 137 { 138 struct ddb_input *oredi, *iredi = NULL; 139 struct ddb_output *iredo = NULL; 140 141 /* dev_info(port->dev->dev, 142 * "unredirect %d.%d\n", port->dev->nr, port->nr); 143 */ 144 mutex_lock(&redirect_lock); 145 if (port->output->dma->running) { 146 mutex_unlock(&redirect_lock); 147 return -EBUSY; 148 } 149 oredi = port->output->redi; 150 if (!oredi) 151 goto done; 152 if (port->input[0]) { 153 iredi = port->input[0]->redi; 154 iredo = port->input[0]->redo; 155 156 if (iredo) { 157 iredo->port->output->redi = oredi; 158 if (iredo->port->input[0]) { 159 iredo->port->input[0]->redi = iredi; 160 ddb_redirect_dma(oredi->port->dev, 161 oredi->dma, iredo->dma); 162 } 163 port->input[0]->redo = NULL; 164 ddb_set_dma_table(port->input[0]); 165 } 166 oredi->redi = iredi; 167 port->input[0]->redi = NULL; 168 } 169 oredi->redo = NULL; 170 port->output->redi = NULL; 171 172 ddb_set_dma_table(oredi); 173 done: 174 mutex_unlock(&redirect_lock); 175 return 0; 176 } 177 178 static int ddb_redirect(u32 i, u32 p) 179 { 180 struct ddb *idev = ddbs[(i >> 4) & 0x3f]; 181 struct ddb_input *input, *input2; 182 struct ddb *pdev = ddbs[(p >> 4) & 0x3f]; 183 struct ddb_port *port; 184 185 if (!idev || !pdev) 186 return -EINVAL; 187 if (!idev->has_dma || !pdev->has_dma) 188 return -EINVAL; 189 190 port = &pdev->port[p & 0x0f]; 191 if (!port->output) 192 return -EINVAL; 193 if (ddb_unredirect(port)) 194 return -EBUSY; 195 196 if (i == 8) 197 return 0; 198 199 input = &idev->input[i & 7]; 200 if (!input) 201 return -EINVAL; 202 203 mutex_lock(&redirect_lock); 204 if (port->output->dma->running || input->dma->running) { 205 mutex_unlock(&redirect_lock); 206 return -EBUSY; 207 } 208 input2 = port->input[0]; 209 if (input2) { 210 if (input->redi) { 211 input2->redi = input->redi; 212 input->redi = NULL; 213 } else { 214 input2->redi = input; 215 } 216 } 217 input->redo = port->output; 218 port->output->redi = input; 219 220 ddb_redirect_dma(input->port->dev, input->dma, port->output->dma); 221 mutex_unlock(&redirect_lock); 222 return 0; 223 } 224 225 /****************************************************************************/ 226 /****************************************************************************/ 227 /****************************************************************************/ 228 229 static void dma_free(struct pci_dev *pdev, struct ddb_dma *dma, int dir) 230 { 231 int i; 232 233 if (!dma) 234 return; 235 for (i = 0; i < dma->num; i++) { 236 if (dma->vbuf[i]) { 237 if (alt_dma) { 238 dma_unmap_single(&pdev->dev, dma->pbuf[i], 239 dma->size, 240 dir ? DMA_TO_DEVICE : 241 DMA_FROM_DEVICE); 242 kfree(dma->vbuf[i]); 243 dma->vbuf[i] = NULL; 244 } else { 245 dma_free_coherent(&pdev->dev, dma->size, 246 dma->vbuf[i], dma->pbuf[i]); 247 } 248 249 dma->vbuf[i] = NULL; 250 } 251 } 252 } 253 254 static int dma_alloc(struct pci_dev *pdev, struct ddb_dma *dma, int dir) 255 { 256 int i; 257 258 if (!dma) 259 return 0; 260 for (i = 0; i < dma->num; i++) { 261 if (alt_dma) { 262 dma->vbuf[i] = kmalloc(dma->size, __GFP_RETRY_MAYFAIL); 263 if (!dma->vbuf[i]) 264 return -ENOMEM; 265 dma->pbuf[i] = dma_map_single(&pdev->dev, 266 dma->vbuf[i], 267 dma->size, 268 dir ? DMA_TO_DEVICE : 269 DMA_FROM_DEVICE); 270 if (dma_mapping_error(&pdev->dev, dma->pbuf[i])) { 271 kfree(dma->vbuf[i]); 272 dma->vbuf[i] = NULL; 273 return -ENOMEM; 274 } 275 } else { 276 dma->vbuf[i] = dma_alloc_coherent(&pdev->dev, 277 dma->size, 278 &dma->pbuf[i], 279 GFP_KERNEL); 280 if (!dma->vbuf[i]) 281 return -ENOMEM; 282 } 283 } 284 return 0; 285 } 286 287 int ddb_buffers_alloc(struct ddb *dev) 288 { 289 int i; 290 struct ddb_port *port; 291 292 for (i = 0; i < dev->port_num; i++) { 293 port = &dev->port[i]; 294 switch (port->class) { 295 case DDB_PORT_TUNER: 296 if (port->input[0]->dma) 297 if (dma_alloc(dev->pdev, port->input[0]->dma, 0) 298 < 0) 299 return -1; 300 if (port->input[1]->dma) 301 if (dma_alloc(dev->pdev, port->input[1]->dma, 0) 302 < 0) 303 return -1; 304 break; 305 case DDB_PORT_CI: 306 case DDB_PORT_LOOP: 307 if (port->input[0]->dma) 308 if (dma_alloc(dev->pdev, port->input[0]->dma, 0) 309 < 0) 310 return -1; 311 if (port->output->dma) 312 if (dma_alloc(dev->pdev, port->output->dma, 1) 313 < 0) 314 return -1; 315 break; 316 default: 317 break; 318 } 319 } 320 ddb_set_dma_tables(dev); 321 return 0; 322 } 323 324 void ddb_buffers_free(struct ddb *dev) 325 { 326 int i; 327 struct ddb_port *port; 328 329 for (i = 0; i < dev->port_num; i++) { 330 port = &dev->port[i]; 331 332 if (port->input[0] && port->input[0]->dma) 333 dma_free(dev->pdev, port->input[0]->dma, 0); 334 if (port->input[1] && port->input[1]->dma) 335 dma_free(dev->pdev, port->input[1]->dma, 0); 336 if (port->output && port->output->dma) 337 dma_free(dev->pdev, port->output->dma, 1); 338 } 339 } 340 341 static void calc_con(struct ddb_output *output, u32 *con, u32 *con2, u32 flags) 342 { 343 struct ddb *dev = output->port->dev; 344 u32 bitrate = output->port->obr, max_bitrate = 72000; 345 u32 gap = 4, nco = 0; 346 347 *con = 0x1c; 348 if (output->port->gap != 0xffffffff) { 349 flags |= 1; 350 gap = output->port->gap; 351 max_bitrate = 0; 352 } 353 if (dev->link[0].info->type == DDB_OCTOPUS_CI && output->port->nr > 1) { 354 *con = 0x10c; 355 if (dev->link[0].ids.regmapid >= 0x10003 && !(flags & 1)) { 356 if (!(flags & 2)) { 357 /* NCO */ 358 max_bitrate = 0; 359 gap = 0; 360 if (bitrate != 72000) { 361 if (bitrate >= 96000) { 362 *con |= 0x800; 363 } else { 364 *con |= 0x1000; 365 nco = (bitrate * 8192 + 71999) 366 / 72000; 367 } 368 } 369 } else { 370 /* Divider and gap */ 371 *con |= 0x1810; 372 if (bitrate <= 64000) { 373 max_bitrate = 64000; 374 nco = 8; 375 } else if (bitrate <= 72000) { 376 max_bitrate = 72000; 377 nco = 7; 378 } else { 379 max_bitrate = 96000; 380 nco = 5; 381 } 382 } 383 } else { 384 if (bitrate > 72000) { 385 *con |= 0x810; /* 96 MBit/s and gap */ 386 max_bitrate = 96000; 387 } 388 *con |= 0x10; /* enable gap */ 389 } 390 } 391 if (max_bitrate > 0) { 392 if (bitrate > max_bitrate) 393 bitrate = max_bitrate; 394 if (bitrate < 31000) 395 bitrate = 31000; 396 gap = ((max_bitrate - bitrate) * 94) / bitrate; 397 if (gap < 2) 398 *con &= ~0x10; /* Disable gap */ 399 else 400 gap -= 2; 401 if (gap > 127) 402 gap = 127; 403 } 404 405 *con2 = (nco << 16) | gap; 406 } 407 408 static void ddb_output_start(struct ddb_output *output) 409 { 410 struct ddb *dev = output->port->dev; 411 u32 con = 0x11c, con2 = 0; 412 413 if (output->dma) { 414 spin_lock_irq(&output->dma->lock); 415 output->dma->cbuf = 0; 416 output->dma->coff = 0; 417 output->dma->stat = 0; 418 ddbwritel(dev, 0, DMA_BUFFER_CONTROL(output->dma)); 419 } 420 421 if (output->port->input[0]->port->class == DDB_PORT_LOOP) 422 con = (1UL << 13) | 0x14; 423 else 424 calc_con(output, &con, &con2, 0); 425 426 ddbwritel(dev, 0, TS_CONTROL(output)); 427 ddbwritel(dev, 2, TS_CONTROL(output)); 428 ddbwritel(dev, 0, TS_CONTROL(output)); 429 ddbwritel(dev, con, TS_CONTROL(output)); 430 ddbwritel(dev, con2, TS_CONTROL2(output)); 431 432 if (output->dma) { 433 ddbwritel(dev, output->dma->bufval, 434 DMA_BUFFER_SIZE(output->dma)); 435 ddbwritel(dev, 0, DMA_BUFFER_ACK(output->dma)); 436 ddbwritel(dev, 1, DMA_BASE_READ); 437 ddbwritel(dev, 7, DMA_BUFFER_CONTROL(output->dma)); 438 } 439 440 ddbwritel(dev, con | 1, TS_CONTROL(output)); 441 442 if (output->dma) { 443 output->dma->running = 1; 444 spin_unlock_irq(&output->dma->lock); 445 } 446 } 447 448 static void ddb_output_stop(struct ddb_output *output) 449 { 450 struct ddb *dev = output->port->dev; 451 452 if (output->dma) 453 spin_lock_irq(&output->dma->lock); 454 455 ddbwritel(dev, 0, TS_CONTROL(output)); 456 457 if (output->dma) { 458 ddbwritel(dev, 0, DMA_BUFFER_CONTROL(output->dma)); 459 output->dma->running = 0; 460 spin_unlock_irq(&output->dma->lock); 461 } 462 } 463 464 static void ddb_input_stop(struct ddb_input *input) 465 { 466 struct ddb *dev = input->port->dev; 467 u32 tag = DDB_LINK_TAG(input->port->lnr); 468 469 if (input->dma) 470 spin_lock_irq(&input->dma->lock); 471 ddbwritel(dev, 0, tag | TS_CONTROL(input)); 472 if (input->dma) { 473 ddbwritel(dev, 0, DMA_BUFFER_CONTROL(input->dma)); 474 input->dma->running = 0; 475 spin_unlock_irq(&input->dma->lock); 476 } 477 } 478 479 static void ddb_input_start(struct ddb_input *input) 480 { 481 struct ddb *dev = input->port->dev; 482 483 if (input->dma) { 484 spin_lock_irq(&input->dma->lock); 485 input->dma->cbuf = 0; 486 input->dma->coff = 0; 487 input->dma->stat = 0; 488 ddbwritel(dev, 0, DMA_BUFFER_CONTROL(input->dma)); 489 } 490 ddbwritel(dev, 0, TS_CONTROL(input)); 491 ddbwritel(dev, 2, TS_CONTROL(input)); 492 ddbwritel(dev, 0, TS_CONTROL(input)); 493 494 if (input->dma) { 495 ddbwritel(dev, input->dma->bufval, 496 DMA_BUFFER_SIZE(input->dma)); 497 ddbwritel(dev, 0, DMA_BUFFER_ACK(input->dma)); 498 ddbwritel(dev, 1, DMA_BASE_WRITE); 499 ddbwritel(dev, 3, DMA_BUFFER_CONTROL(input->dma)); 500 } 501 502 ddbwritel(dev, 0x09, TS_CONTROL(input)); 503 504 if (input->dma) { 505 input->dma->running = 1; 506 spin_unlock_irq(&input->dma->lock); 507 } 508 } 509 510 static void ddb_input_start_all(struct ddb_input *input) 511 { 512 struct ddb_input *i = input; 513 struct ddb_output *o; 514 515 mutex_lock(&redirect_lock); 516 while (i && (o = i->redo)) { 517 ddb_output_start(o); 518 i = o->port->input[0]; 519 if (i) 520 ddb_input_start(i); 521 } 522 ddb_input_start(input); 523 mutex_unlock(&redirect_lock); 524 } 525 526 static void ddb_input_stop_all(struct ddb_input *input) 527 { 528 struct ddb_input *i = input; 529 struct ddb_output *o; 530 531 mutex_lock(&redirect_lock); 532 ddb_input_stop(input); 533 while (i && (o = i->redo)) { 534 ddb_output_stop(o); 535 i = o->port->input[0]; 536 if (i) 537 ddb_input_stop(i); 538 } 539 mutex_unlock(&redirect_lock); 540 } 541 542 static u32 ddb_output_free(struct ddb_output *output) 543 { 544 u32 idx, off, stat = output->dma->stat; 545 s32 diff; 546 547 idx = (stat >> 11) & 0x1f; 548 off = (stat & 0x7ff) << 7; 549 550 if (output->dma->cbuf != idx) { 551 if ((((output->dma->cbuf + 1) % output->dma->num) == idx) && 552 (output->dma->size - output->dma->coff <= 188)) 553 return 0; 554 return 188; 555 } 556 diff = off - output->dma->coff; 557 if (diff <= 0 || diff > 188) 558 return 188; 559 return 0; 560 } 561 562 static ssize_t ddb_output_write(struct ddb_output *output, 563 const __user u8 *buf, size_t count) 564 { 565 struct ddb *dev = output->port->dev; 566 u32 idx, off, stat = output->dma->stat; 567 u32 left = count, len; 568 569 idx = (stat >> 11) & 0x1f; 570 off = (stat & 0x7ff) << 7; 571 572 while (left) { 573 len = output->dma->size - output->dma->coff; 574 if ((((output->dma->cbuf + 1) % output->dma->num) == idx) && 575 off == 0) { 576 if (len <= 188) 577 break; 578 len -= 188; 579 } 580 if (output->dma->cbuf == idx) { 581 if (off > output->dma->coff) { 582 len = off - output->dma->coff; 583 len -= (len % 188); 584 if (len <= 188) 585 break; 586 len -= 188; 587 } 588 } 589 if (len > left) 590 len = left; 591 if (copy_from_user(output->dma->vbuf[output->dma->cbuf] + 592 output->dma->coff, 593 buf, len)) 594 return -EIO; 595 if (alt_dma) 596 dma_sync_single_for_device( 597 dev->dev, 598 output->dma->pbuf[output->dma->cbuf], 599 output->dma->size, DMA_TO_DEVICE); 600 left -= len; 601 buf += len; 602 output->dma->coff += len; 603 if (output->dma->coff == output->dma->size) { 604 output->dma->coff = 0; 605 output->dma->cbuf = ((output->dma->cbuf + 1) % 606 output->dma->num); 607 } 608 ddbwritel(dev, 609 (output->dma->cbuf << 11) | 610 (output->dma->coff >> 7), 611 DMA_BUFFER_ACK(output->dma)); 612 } 613 return count - left; 614 } 615 616 static u32 ddb_input_avail(struct ddb_input *input) 617 { 618 struct ddb *dev = input->port->dev; 619 u32 idx, off, stat = input->dma->stat; 620 u32 ctrl = ddbreadl(dev, DMA_BUFFER_CONTROL(input->dma)); 621 622 idx = (stat >> 11) & 0x1f; 623 off = (stat & 0x7ff) << 7; 624 625 if (ctrl & 4) { 626 dev_err(dev->dev, "IA %d %d %08x\n", idx, off, ctrl); 627 ddbwritel(dev, stat, DMA_BUFFER_ACK(input->dma)); 628 return 0; 629 } 630 if (input->dma->cbuf != idx) 631 return 188; 632 return 0; 633 } 634 635 static ssize_t ddb_input_read(struct ddb_input *input, 636 __user u8 *buf, size_t count) 637 { 638 struct ddb *dev = input->port->dev; 639 u32 left = count; 640 u32 idx, free, stat = input->dma->stat; 641 int ret; 642 643 idx = (stat >> 11) & 0x1f; 644 645 while (left) { 646 if (input->dma->cbuf == idx) 647 return count - left; 648 free = input->dma->size - input->dma->coff; 649 if (free > left) 650 free = left; 651 if (alt_dma) 652 dma_sync_single_for_cpu( 653 dev->dev, 654 input->dma->pbuf[input->dma->cbuf], 655 input->dma->size, DMA_FROM_DEVICE); 656 ret = copy_to_user(buf, input->dma->vbuf[input->dma->cbuf] + 657 input->dma->coff, free); 658 if (ret) 659 return -EFAULT; 660 input->dma->coff += free; 661 if (input->dma->coff == input->dma->size) { 662 input->dma->coff = 0; 663 input->dma->cbuf = (input->dma->cbuf + 1) % 664 input->dma->num; 665 } 666 left -= free; 667 buf += free; 668 ddbwritel(dev, 669 (input->dma->cbuf << 11) | (input->dma->coff >> 7), 670 DMA_BUFFER_ACK(input->dma)); 671 } 672 return count; 673 } 674 675 /****************************************************************************/ 676 /****************************************************************************/ 677 678 static ssize_t ts_write(struct file *file, const __user char *buf, 679 size_t count, loff_t *ppos) 680 { 681 struct dvb_device *dvbdev = file->private_data; 682 struct ddb_output *output = dvbdev->priv; 683 struct ddb *dev = output->port->dev; 684 size_t left = count; 685 int stat; 686 687 if (!dev->has_dma) 688 return -EINVAL; 689 while (left) { 690 if (ddb_output_free(output) < 188) { 691 if (file->f_flags & O_NONBLOCK) 692 break; 693 if (wait_event_interruptible( 694 output->dma->wq, 695 ddb_output_free(output) >= 188) < 0) 696 break; 697 } 698 stat = ddb_output_write(output, buf, left); 699 if (stat < 0) 700 return stat; 701 buf += stat; 702 left -= stat; 703 } 704 return (left == count) ? -EAGAIN : (count - left); 705 } 706 707 static ssize_t ts_read(struct file *file, __user char *buf, 708 size_t count, loff_t *ppos) 709 { 710 struct dvb_device *dvbdev = file->private_data; 711 struct ddb_output *output = dvbdev->priv; 712 struct ddb_input *input = output->port->input[0]; 713 struct ddb *dev = output->port->dev; 714 size_t left = count; 715 int stat; 716 717 if (!dev->has_dma) 718 return -EINVAL; 719 while (left) { 720 if (ddb_input_avail(input) < 188) { 721 if (file->f_flags & O_NONBLOCK) 722 break; 723 if (wait_event_interruptible( 724 input->dma->wq, 725 ddb_input_avail(input) >= 188) < 0) 726 break; 727 } 728 stat = ddb_input_read(input, buf, left); 729 if (stat < 0) 730 return stat; 731 left -= stat; 732 buf += stat; 733 } 734 return (count && (left == count)) ? -EAGAIN : (count - left); 735 } 736 737 static __poll_t ts_poll(struct file *file, poll_table *wait) 738 { 739 struct dvb_device *dvbdev = file->private_data; 740 struct ddb_output *output = dvbdev->priv; 741 struct ddb_input *input = output->port->input[0]; 742 743 __poll_t mask = 0; 744 745 poll_wait(file, &input->dma->wq, wait); 746 poll_wait(file, &output->dma->wq, wait); 747 if (ddb_input_avail(input) >= 188) 748 mask |= EPOLLIN | EPOLLRDNORM; 749 if (ddb_output_free(output) >= 188) 750 mask |= EPOLLOUT | EPOLLWRNORM; 751 return mask; 752 } 753 754 static int ts_release(struct inode *inode, struct file *file) 755 { 756 struct dvb_device *dvbdev = file->private_data; 757 struct ddb_output *output = NULL; 758 struct ddb_input *input = NULL; 759 760 if (dvbdev) { 761 output = dvbdev->priv; 762 input = output->port->input[0]; 763 } 764 765 if ((file->f_flags & O_ACCMODE) == O_RDONLY) { 766 if (!input) 767 return -EINVAL; 768 ddb_input_stop(input); 769 } else if ((file->f_flags & O_ACCMODE) == O_WRONLY) { 770 if (!output) 771 return -EINVAL; 772 ddb_output_stop(output); 773 } 774 return dvb_generic_release(inode, file); 775 } 776 777 static int ts_open(struct inode *inode, struct file *file) 778 { 779 int err; 780 struct dvb_device *dvbdev = file->private_data; 781 struct ddb_output *output = NULL; 782 struct ddb_input *input = NULL; 783 784 if (dvbdev) { 785 output = dvbdev->priv; 786 input = output->port->input[0]; 787 } 788 789 if ((file->f_flags & O_ACCMODE) == O_RDONLY) { 790 if (!input) 791 return -EINVAL; 792 if (input->redo || input->redi) 793 return -EBUSY; 794 } else if ((file->f_flags & O_ACCMODE) == O_WRONLY) { 795 if (!output) 796 return -EINVAL; 797 } else { 798 return -EINVAL; 799 } 800 801 err = dvb_generic_open(inode, file); 802 if (err < 0) 803 return err; 804 if ((file->f_flags & O_ACCMODE) == O_RDONLY) 805 ddb_input_start(input); 806 else if ((file->f_flags & O_ACCMODE) == O_WRONLY) 807 ddb_output_start(output); 808 return err; 809 } 810 811 static const struct file_operations ci_fops = { 812 .owner = THIS_MODULE, 813 .read = ts_read, 814 .write = ts_write, 815 .open = ts_open, 816 .release = ts_release, 817 .poll = ts_poll, 818 .mmap = NULL, 819 }; 820 821 static struct dvb_device dvbdev_ci = { 822 .priv = NULL, 823 .readers = 1, 824 .writers = 1, 825 .users = 2, 826 .fops = &ci_fops, 827 }; 828 829 /****************************************************************************/ 830 /****************************************************************************/ 831 832 static int locked_gate_ctrl(struct dvb_frontend *fe, int enable) 833 { 834 struct ddb_input *input = fe->sec_priv; 835 struct ddb_port *port = input->port; 836 struct ddb_dvb *dvb = &port->dvb[input->nr & 1]; 837 int status; 838 839 if (enable) { 840 mutex_lock(&port->i2c_gate_lock); 841 status = dvb->i2c_gate_ctrl(fe, 1); 842 } else { 843 status = dvb->i2c_gate_ctrl(fe, 0); 844 mutex_unlock(&port->i2c_gate_lock); 845 } 846 return status; 847 } 848 849 static int demod_attach_drxk(struct ddb_input *input) 850 { 851 struct i2c_adapter *i2c = &input->port->i2c->adap; 852 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 853 struct device *dev = input->port->dev->dev; 854 struct drxk_config config; 855 856 memset(&config, 0, sizeof(config)); 857 config.adr = 0x29 + (input->nr & 1); 858 config.microcode_name = "drxk_a3.mc"; 859 860 dvb->fe = dvb_attach(drxk_attach, &config, i2c); 861 if (!dvb->fe) { 862 dev_err(dev, "No DRXK found!\n"); 863 return -ENODEV; 864 } 865 dvb->fe->sec_priv = input; 866 dvb->i2c_gate_ctrl = dvb->fe->ops.i2c_gate_ctrl; 867 dvb->fe->ops.i2c_gate_ctrl = locked_gate_ctrl; 868 return 0; 869 } 870 871 static int tuner_attach_tda18271(struct ddb_input *input) 872 { 873 struct i2c_adapter *i2c = &input->port->i2c->adap; 874 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 875 struct device *dev = input->port->dev->dev; 876 struct dvb_frontend *fe; 877 878 if (dvb->fe->ops.i2c_gate_ctrl) 879 dvb->fe->ops.i2c_gate_ctrl(dvb->fe, 1); 880 fe = dvb_attach(tda18271c2dd_attach, dvb->fe, i2c, 0x60); 881 if (dvb->fe->ops.i2c_gate_ctrl) 882 dvb->fe->ops.i2c_gate_ctrl(dvb->fe, 0); 883 if (!fe) { 884 dev_err(dev, "No TDA18271 found!\n"); 885 return -ENODEV; 886 } 887 return 0; 888 } 889 890 /******************************************************************************/ 891 /******************************************************************************/ 892 /******************************************************************************/ 893 894 static struct stv0367_config ddb_stv0367_config[] = { 895 { 896 .demod_address = 0x1f, 897 .xtal = 27000000, 898 .if_khz = 0, 899 .if_iq_mode = FE_TER_NORMAL_IF_TUNER, 900 .ts_mode = STV0367_SERIAL_PUNCT_CLOCK, 901 .clk_pol = STV0367_CLOCKPOLARITY_DEFAULT, 902 }, { 903 .demod_address = 0x1e, 904 .xtal = 27000000, 905 .if_khz = 0, 906 .if_iq_mode = FE_TER_NORMAL_IF_TUNER, 907 .ts_mode = STV0367_SERIAL_PUNCT_CLOCK, 908 .clk_pol = STV0367_CLOCKPOLARITY_DEFAULT, 909 }, 910 }; 911 912 static int demod_attach_stv0367(struct ddb_input *input) 913 { 914 struct i2c_adapter *i2c = &input->port->i2c->adap; 915 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 916 struct device *dev = input->port->dev->dev; 917 918 /* attach frontend */ 919 dvb->fe = dvb_attach(stv0367ddb_attach, 920 &ddb_stv0367_config[(input->nr & 1)], i2c); 921 922 if (!dvb->fe) { 923 dev_err(dev, "No stv0367 found!\n"); 924 return -ENODEV; 925 } 926 dvb->fe->sec_priv = input; 927 dvb->i2c_gate_ctrl = dvb->fe->ops.i2c_gate_ctrl; 928 dvb->fe->ops.i2c_gate_ctrl = locked_gate_ctrl; 929 return 0; 930 } 931 932 static int tuner_tda18212_ping(struct ddb_input *input, unsigned short adr) 933 { 934 struct i2c_adapter *adapter = &input->port->i2c->adap; 935 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 936 struct device *dev = input->port->dev->dev; 937 u8 tda_id[2]; 938 u8 subaddr = 0x00; 939 940 dev_dbg(dev, "stv0367-tda18212 tuner ping\n"); 941 if (dvb->fe->ops.i2c_gate_ctrl) 942 dvb->fe->ops.i2c_gate_ctrl(dvb->fe, 1); 943 944 if (i2c_read_regs(adapter, adr, subaddr, tda_id, sizeof(tda_id)) < 0) 945 dev_dbg(dev, "tda18212 ping 1 fail\n"); 946 if (i2c_read_regs(adapter, adr, subaddr, tda_id, sizeof(tda_id)) < 0) 947 dev_warn(dev, "tda18212 ping failed, expect problems\n"); 948 949 if (dvb->fe->ops.i2c_gate_ctrl) 950 dvb->fe->ops.i2c_gate_ctrl(dvb->fe, 0); 951 952 return 0; 953 } 954 955 static int demod_attach_cxd28xx(struct ddb_input *input, int par, int osc24) 956 { 957 struct i2c_adapter *i2c = &input->port->i2c->adap; 958 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 959 struct device *dev = input->port->dev->dev; 960 struct cxd2841er_config cfg; 961 962 /* the cxd2841er driver expects 8bit/shifted I2C addresses */ 963 cfg.i2c_addr = ((input->nr & 1) ? 0x6d : 0x6c) << 1; 964 965 cfg.xtal = osc24 ? SONY_XTAL_24000 : SONY_XTAL_20500; 966 cfg.flags = CXD2841ER_AUTO_IFHZ | CXD2841ER_EARLY_TUNE | 967 CXD2841ER_NO_WAIT_LOCK | CXD2841ER_NO_AGCNEG | 968 CXD2841ER_TSBITS; 969 970 if (!par) 971 cfg.flags |= CXD2841ER_TS_SERIAL; 972 973 /* attach frontend */ 974 dvb->fe = dvb_attach(cxd2841er_attach_t_c, &cfg, i2c); 975 976 if (!dvb->fe) { 977 dev_err(dev, "No cxd2837/38/43/54 found!\n"); 978 return -ENODEV; 979 } 980 dvb->fe->sec_priv = input; 981 dvb->i2c_gate_ctrl = dvb->fe->ops.i2c_gate_ctrl; 982 dvb->fe->ops.i2c_gate_ctrl = locked_gate_ctrl; 983 return 0; 984 } 985 986 static int tuner_attach_tda18212(struct ddb_input *input, u32 porttype) 987 { 988 struct i2c_adapter *adapter = &input->port->i2c->adap; 989 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 990 struct device *dev = input->port->dev->dev; 991 struct i2c_client *client; 992 struct tda18212_config config = { 993 .fe = dvb->fe, 994 .if_dvbt_6 = 3550, 995 .if_dvbt_7 = 3700, 996 .if_dvbt_8 = 4150, 997 .if_dvbt2_6 = 3250, 998 .if_dvbt2_7 = 4000, 999 .if_dvbt2_8 = 4000, 1000 .if_dvbc = 5000, 1001 }; 1002 struct i2c_board_info board_info = { 1003 .type = "tda18212", 1004 .platform_data = &config, 1005 }; 1006 1007 if (input->nr & 1) 1008 board_info.addr = 0x63; 1009 else 1010 board_info.addr = 0x60; 1011 1012 /* due to a hardware quirk with the I2C gate on the stv0367+tda18212 1013 * combo, the tda18212 must be probed by reading it's id _twice_ when 1014 * cold started, or it very likely will fail. 1015 */ 1016 if (porttype == DDB_TUNER_DVBCT_ST) 1017 tuner_tda18212_ping(input, board_info.addr); 1018 1019 request_module(board_info.type); 1020 1021 /* perform tuner init/attach */ 1022 client = i2c_new_device(adapter, &board_info); 1023 if (!client || !client->dev.driver) 1024 goto err; 1025 1026 if (!try_module_get(client->dev.driver->owner)) { 1027 i2c_unregister_device(client); 1028 goto err; 1029 } 1030 1031 dvb->i2c_client[0] = client; 1032 1033 return 0; 1034 err: 1035 dev_err(dev, "TDA18212 tuner not found. Device is not fully operational.\n"); 1036 return -ENODEV; 1037 } 1038 1039 /****************************************************************************/ 1040 /****************************************************************************/ 1041 /****************************************************************************/ 1042 1043 static struct stv090x_config stv0900 = { 1044 .device = STV0900, 1045 .demod_mode = STV090x_DUAL, 1046 .clk_mode = STV090x_CLK_EXT, 1047 1048 .xtal = 27000000, 1049 .address = 0x69, 1050 1051 .ts1_mode = STV090x_TSMODE_SERIAL_PUNCTURED, 1052 .ts2_mode = STV090x_TSMODE_SERIAL_PUNCTURED, 1053 1054 .ts1_tei = 1, 1055 .ts2_tei = 1, 1056 1057 .repeater_level = STV090x_RPTLEVEL_16, 1058 1059 .adc1_range = STV090x_ADC_1Vpp, 1060 .adc2_range = STV090x_ADC_1Vpp, 1061 1062 .diseqc_envelope_mode = true, 1063 }; 1064 1065 static struct stv090x_config stv0900_aa = { 1066 .device = STV0900, 1067 .demod_mode = STV090x_DUAL, 1068 .clk_mode = STV090x_CLK_EXT, 1069 1070 .xtal = 27000000, 1071 .address = 0x68, 1072 1073 .ts1_mode = STV090x_TSMODE_SERIAL_PUNCTURED, 1074 .ts2_mode = STV090x_TSMODE_SERIAL_PUNCTURED, 1075 1076 .ts1_tei = 1, 1077 .ts2_tei = 1, 1078 1079 .repeater_level = STV090x_RPTLEVEL_16, 1080 1081 .adc1_range = STV090x_ADC_1Vpp, 1082 .adc2_range = STV090x_ADC_1Vpp, 1083 1084 .diseqc_envelope_mode = true, 1085 }; 1086 1087 static struct stv6110x_config stv6110a = { 1088 .addr = 0x60, 1089 .refclk = 27000000, 1090 .clk_div = 1, 1091 }; 1092 1093 static struct stv6110x_config stv6110b = { 1094 .addr = 0x63, 1095 .refclk = 27000000, 1096 .clk_div = 1, 1097 }; 1098 1099 static int demod_attach_stv0900(struct ddb_input *input, int type) 1100 { 1101 struct i2c_adapter *i2c = &input->port->i2c->adap; 1102 struct stv090x_config *feconf = type ? &stv0900_aa : &stv0900; 1103 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 1104 struct device *dev = input->port->dev->dev; 1105 1106 dvb->fe = dvb_attach(stv090x_attach, feconf, i2c, 1107 (input->nr & 1) ? STV090x_DEMODULATOR_1 1108 : STV090x_DEMODULATOR_0); 1109 if (!dvb->fe) { 1110 dev_err(dev, "No STV0900 found!\n"); 1111 return -ENODEV; 1112 } 1113 if (!dvb_attach(lnbh24_attach, dvb->fe, i2c, 0, 1114 0, (input->nr & 1) ? 1115 (0x09 - type) : (0x0b - type))) { 1116 dev_err(dev, "No LNBH24 found!\n"); 1117 dvb_frontend_detach(dvb->fe); 1118 return -ENODEV; 1119 } 1120 return 0; 1121 } 1122 1123 static int tuner_attach_stv6110(struct ddb_input *input, int type) 1124 { 1125 struct i2c_adapter *i2c = &input->port->i2c->adap; 1126 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 1127 struct device *dev = input->port->dev->dev; 1128 struct stv090x_config *feconf = type ? &stv0900_aa : &stv0900; 1129 struct stv6110x_config *tunerconf = (input->nr & 1) ? 1130 &stv6110b : &stv6110a; 1131 const struct stv6110x_devctl *ctl; 1132 1133 ctl = dvb_attach(stv6110x_attach, dvb->fe, tunerconf, i2c); 1134 if (!ctl) { 1135 dev_err(dev, "No STV6110X found!\n"); 1136 return -ENODEV; 1137 } 1138 dev_info(dev, "attach tuner input %d adr %02x\n", 1139 input->nr, tunerconf->addr); 1140 1141 feconf->tuner_init = ctl->tuner_init; 1142 feconf->tuner_sleep = ctl->tuner_sleep; 1143 feconf->tuner_set_mode = ctl->tuner_set_mode; 1144 feconf->tuner_set_frequency = ctl->tuner_set_frequency; 1145 feconf->tuner_get_frequency = ctl->tuner_get_frequency; 1146 feconf->tuner_set_bandwidth = ctl->tuner_set_bandwidth; 1147 feconf->tuner_get_bandwidth = ctl->tuner_get_bandwidth; 1148 feconf->tuner_set_bbgain = ctl->tuner_set_bbgain; 1149 feconf->tuner_get_bbgain = ctl->tuner_get_bbgain; 1150 feconf->tuner_set_refclk = ctl->tuner_set_refclk; 1151 feconf->tuner_get_status = ctl->tuner_get_status; 1152 1153 return 0; 1154 } 1155 1156 static const struct stv0910_cfg stv0910_p = { 1157 .adr = 0x68, 1158 .parallel = 1, 1159 .rptlvl = 4, 1160 .clk = 30000000, 1161 }; 1162 1163 static const struct lnbh25_config lnbh25_cfg = { 1164 .i2c_address = 0x0c << 1, 1165 .data2_config = LNBH25_TEN 1166 }; 1167 1168 static int demod_attach_stv0910(struct ddb_input *input, int type) 1169 { 1170 struct i2c_adapter *i2c = &input->port->i2c->adap; 1171 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 1172 struct device *dev = input->port->dev->dev; 1173 struct stv0910_cfg cfg = stv0910_p; 1174 struct lnbh25_config lnbcfg = lnbh25_cfg; 1175 1176 if (stv0910_single) 1177 cfg.single = 1; 1178 1179 if (type) 1180 cfg.parallel = 2; 1181 dvb->fe = dvb_attach(stv0910_attach, i2c, &cfg, (input->nr & 1)); 1182 if (!dvb->fe) { 1183 cfg.adr = 0x6c; 1184 dvb->fe = dvb_attach(stv0910_attach, i2c, 1185 &cfg, (input->nr & 1)); 1186 } 1187 if (!dvb->fe) { 1188 dev_err(dev, "No STV0910 found!\n"); 1189 return -ENODEV; 1190 } 1191 1192 /* attach lnbh25 - leftshift by one as the lnbh25 driver expects 8bit 1193 * i2c addresses 1194 */ 1195 lnbcfg.i2c_address = (((input->nr & 1) ? 0x0d : 0x0c) << 1); 1196 if (!dvb_attach(lnbh25_attach, dvb->fe, &lnbcfg, i2c)) { 1197 lnbcfg.i2c_address = (((input->nr & 1) ? 0x09 : 0x08) << 1); 1198 if (!dvb_attach(lnbh25_attach, dvb->fe, &lnbcfg, i2c)) { 1199 dev_err(dev, "No LNBH25 found!\n"); 1200 dvb_frontend_detach(dvb->fe); 1201 return -ENODEV; 1202 } 1203 } 1204 1205 return 0; 1206 } 1207 1208 static int tuner_attach_stv6111(struct ddb_input *input, int type) 1209 { 1210 struct i2c_adapter *i2c = &input->port->i2c->adap; 1211 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 1212 struct device *dev = input->port->dev->dev; 1213 struct dvb_frontend *fe; 1214 u8 adr = (type ? 0 : 4) + ((input->nr & 1) ? 0x63 : 0x60); 1215 1216 fe = dvb_attach(stv6111_attach, dvb->fe, i2c, adr); 1217 if (!fe) { 1218 fe = dvb_attach(stv6111_attach, dvb->fe, i2c, adr & ~4); 1219 if (!fe) { 1220 dev_err(dev, "No STV6111 found at 0x%02x!\n", adr); 1221 return -ENODEV; 1222 } 1223 } 1224 return 0; 1225 } 1226 1227 static int start_feed(struct dvb_demux_feed *dvbdmxfeed) 1228 { 1229 struct dvb_demux *dvbdmx = dvbdmxfeed->demux; 1230 struct ddb_input *input = dvbdmx->priv; 1231 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 1232 1233 if (!dvb->users) 1234 ddb_input_start_all(input); 1235 1236 return ++dvb->users; 1237 } 1238 1239 static int stop_feed(struct dvb_demux_feed *dvbdmxfeed) 1240 { 1241 struct dvb_demux *dvbdmx = dvbdmxfeed->demux; 1242 struct ddb_input *input = dvbdmx->priv; 1243 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 1244 1245 if (--dvb->users) 1246 return dvb->users; 1247 1248 ddb_input_stop_all(input); 1249 return 0; 1250 } 1251 1252 static void dvb_input_detach(struct ddb_input *input) 1253 { 1254 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 1255 struct dvb_demux *dvbdemux = &dvb->demux; 1256 struct i2c_client *client; 1257 1258 switch (dvb->attached) { 1259 case 0x31: 1260 if (dvb->fe2) 1261 dvb_unregister_frontend(dvb->fe2); 1262 if (dvb->fe) 1263 dvb_unregister_frontend(dvb->fe); 1264 /* fallthrough */ 1265 case 0x30: 1266 client = dvb->i2c_client[0]; 1267 if (client) { 1268 module_put(client->dev.driver->owner); 1269 i2c_unregister_device(client); 1270 dvb->i2c_client[0] = NULL; 1271 client = NULL; 1272 } 1273 1274 if (dvb->fe2) 1275 dvb_frontend_detach(dvb->fe2); 1276 if (dvb->fe) 1277 dvb_frontend_detach(dvb->fe); 1278 dvb->fe = NULL; 1279 dvb->fe2 = NULL; 1280 /* fallthrough */ 1281 case 0x20: 1282 dvb_net_release(&dvb->dvbnet); 1283 /* fallthrough */ 1284 case 0x12: 1285 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, 1286 &dvb->hw_frontend); 1287 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, 1288 &dvb->mem_frontend); 1289 /* fallthrough */ 1290 case 0x11: 1291 dvb_dmxdev_release(&dvb->dmxdev); 1292 /* fallthrough */ 1293 case 0x10: 1294 dvb_dmx_release(&dvb->demux); 1295 /* fallthrough */ 1296 case 0x01: 1297 break; 1298 } 1299 dvb->attached = 0x00; 1300 } 1301 1302 static int dvb_register_adapters(struct ddb *dev) 1303 { 1304 int i, ret = 0; 1305 struct ddb_port *port; 1306 struct dvb_adapter *adap; 1307 1308 if (adapter_alloc == 3) { 1309 port = &dev->port[0]; 1310 adap = port->dvb[0].adap; 1311 ret = dvb_register_adapter(adap, "DDBridge", THIS_MODULE, 1312 port->dev->dev, 1313 adapter_nr); 1314 if (ret < 0) 1315 return ret; 1316 port->dvb[0].adap_registered = 1; 1317 for (i = 0; i < dev->port_num; i++) { 1318 port = &dev->port[i]; 1319 port->dvb[0].adap = adap; 1320 port->dvb[1].adap = adap; 1321 } 1322 return 0; 1323 } 1324 1325 for (i = 0; i < dev->port_num; i++) { 1326 port = &dev->port[i]; 1327 switch (port->class) { 1328 case DDB_PORT_TUNER: 1329 adap = port->dvb[0].adap; 1330 ret = dvb_register_adapter(adap, "DDBridge", 1331 THIS_MODULE, 1332 port->dev->dev, 1333 adapter_nr); 1334 if (ret < 0) 1335 return ret; 1336 port->dvb[0].adap_registered = 1; 1337 1338 if (adapter_alloc > 0) { 1339 port->dvb[1].adap = port->dvb[0].adap; 1340 break; 1341 } 1342 adap = port->dvb[1].adap; 1343 ret = dvb_register_adapter(adap, "DDBridge", 1344 THIS_MODULE, 1345 port->dev->dev, 1346 adapter_nr); 1347 if (ret < 0) 1348 return ret; 1349 port->dvb[1].adap_registered = 1; 1350 break; 1351 1352 case DDB_PORT_CI: 1353 case DDB_PORT_LOOP: 1354 adap = port->dvb[0].adap; 1355 ret = dvb_register_adapter(adap, "DDBridge", 1356 THIS_MODULE, 1357 port->dev->dev, 1358 adapter_nr); 1359 if (ret < 0) 1360 return ret; 1361 port->dvb[0].adap_registered = 1; 1362 break; 1363 default: 1364 if (adapter_alloc < 2) 1365 break; 1366 adap = port->dvb[0].adap; 1367 ret = dvb_register_adapter(adap, "DDBridge", 1368 THIS_MODULE, 1369 port->dev->dev, 1370 adapter_nr); 1371 if (ret < 0) 1372 return ret; 1373 port->dvb[0].adap_registered = 1; 1374 break; 1375 } 1376 } 1377 return ret; 1378 } 1379 1380 static void dvb_unregister_adapters(struct ddb *dev) 1381 { 1382 int i; 1383 struct ddb_port *port; 1384 struct ddb_dvb *dvb; 1385 1386 for (i = 0; i < dev->link[0].info->port_num; i++) { 1387 port = &dev->port[i]; 1388 1389 dvb = &port->dvb[0]; 1390 if (dvb->adap_registered) 1391 dvb_unregister_adapter(dvb->adap); 1392 dvb->adap_registered = 0; 1393 1394 dvb = &port->dvb[1]; 1395 if (dvb->adap_registered) 1396 dvb_unregister_adapter(dvb->adap); 1397 dvb->adap_registered = 0; 1398 } 1399 } 1400 1401 static int dvb_input_attach(struct ddb_input *input) 1402 { 1403 int ret = 0; 1404 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 1405 struct ddb_port *port = input->port; 1406 struct dvb_adapter *adap = dvb->adap; 1407 struct dvb_demux *dvbdemux = &dvb->demux; 1408 int par = 0, osc24 = 0; 1409 1410 dvb->attached = 0x01; 1411 1412 dvbdemux->priv = input; 1413 dvbdemux->dmx.capabilities = DMX_TS_FILTERING | 1414 DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING; 1415 dvbdemux->start_feed = start_feed; 1416 dvbdemux->stop_feed = stop_feed; 1417 dvbdemux->filternum = 256; 1418 dvbdemux->feednum = 256; 1419 ret = dvb_dmx_init(dvbdemux); 1420 if (ret < 0) 1421 return ret; 1422 dvb->attached = 0x10; 1423 1424 dvb->dmxdev.filternum = 256; 1425 dvb->dmxdev.demux = &dvbdemux->dmx; 1426 ret = dvb_dmxdev_init(&dvb->dmxdev, adap); 1427 if (ret < 0) 1428 goto err_detach; 1429 dvb->attached = 0x11; 1430 1431 dvb->mem_frontend.source = DMX_MEMORY_FE; 1432 dvb->demux.dmx.add_frontend(&dvb->demux.dmx, &dvb->mem_frontend); 1433 dvb->hw_frontend.source = DMX_FRONTEND_0; 1434 dvb->demux.dmx.add_frontend(&dvb->demux.dmx, &dvb->hw_frontend); 1435 ret = dvbdemux->dmx.connect_frontend(&dvbdemux->dmx, &dvb->hw_frontend); 1436 if (ret < 0) 1437 goto err_detach; 1438 dvb->attached = 0x12; 1439 1440 ret = dvb_net_init(adap, &dvb->dvbnet, dvb->dmxdev.demux); 1441 if (ret < 0) 1442 goto err_detach; 1443 dvb->attached = 0x20; 1444 1445 dvb->fe = NULL; 1446 dvb->fe2 = NULL; 1447 switch (port->type) { 1448 case DDB_TUNER_MXL5XX: 1449 if (ddb_fe_attach_mxl5xx(input) < 0) 1450 goto err_detach; 1451 break; 1452 case DDB_TUNER_DVBS_ST: 1453 if (demod_attach_stv0900(input, 0) < 0) 1454 goto err_detach; 1455 if (tuner_attach_stv6110(input, 0) < 0) 1456 goto err_tuner; 1457 break; 1458 case DDB_TUNER_DVBS_ST_AA: 1459 if (demod_attach_stv0900(input, 1) < 0) 1460 goto err_detach; 1461 if (tuner_attach_stv6110(input, 1) < 0) 1462 goto err_tuner; 1463 break; 1464 case DDB_TUNER_DVBS_STV0910: 1465 if (demod_attach_stv0910(input, 0) < 0) 1466 goto err_detach; 1467 if (tuner_attach_stv6111(input, 0) < 0) 1468 goto err_tuner; 1469 break; 1470 case DDB_TUNER_DVBS_STV0910_PR: 1471 if (demod_attach_stv0910(input, 1) < 0) 1472 goto err_detach; 1473 if (tuner_attach_stv6111(input, 1) < 0) 1474 goto err_tuner; 1475 break; 1476 case DDB_TUNER_DVBS_STV0910_P: 1477 if (demod_attach_stv0910(input, 0) < 0) 1478 goto err_detach; 1479 if (tuner_attach_stv6111(input, 1) < 0) 1480 goto err_tuner; 1481 break; 1482 case DDB_TUNER_DVBCT_TR: 1483 if (demod_attach_drxk(input) < 0) 1484 goto err_detach; 1485 if (tuner_attach_tda18271(input) < 0) 1486 goto err_tuner; 1487 break; 1488 case DDB_TUNER_DVBCT_ST: 1489 if (demod_attach_stv0367(input) < 0) 1490 goto err_detach; 1491 if (tuner_attach_tda18212(input, port->type) < 0) 1492 goto err_tuner; 1493 break; 1494 case DDB_TUNER_DVBC2T2I_SONY_P: 1495 if (input->port->dev->link[input->port->lnr].info->ts_quirks & 1496 TS_QUIRK_ALT_OSC) 1497 osc24 = 0; 1498 else 1499 osc24 = 1; 1500 /* fall-through */ 1501 case DDB_TUNER_DVBCT2_SONY_P: 1502 case DDB_TUNER_DVBC2T2_SONY_P: 1503 case DDB_TUNER_ISDBT_SONY_P: 1504 if (input->port->dev->link[input->port->lnr].info->ts_quirks 1505 & TS_QUIRK_SERIAL) 1506 par = 0; 1507 else 1508 par = 1; 1509 if (demod_attach_cxd28xx(input, par, osc24) < 0) 1510 goto err_detach; 1511 if (tuner_attach_tda18212(input, port->type) < 0) 1512 goto err_tuner; 1513 break; 1514 case DDB_TUNER_DVBC2T2I_SONY: 1515 osc24 = 1; 1516 /* fall-through */ 1517 case DDB_TUNER_DVBCT2_SONY: 1518 case DDB_TUNER_DVBC2T2_SONY: 1519 case DDB_TUNER_ISDBT_SONY: 1520 if (demod_attach_cxd28xx(input, 0, osc24) < 0) 1521 goto err_detach; 1522 if (tuner_attach_tda18212(input, port->type) < 0) 1523 goto err_tuner; 1524 break; 1525 default: 1526 return 0; 1527 } 1528 dvb->attached = 0x30; 1529 1530 if (dvb->fe) { 1531 if (dvb_register_frontend(adap, dvb->fe) < 0) 1532 goto err_detach; 1533 1534 if (dvb->fe2) { 1535 if (dvb_register_frontend(adap, dvb->fe2) < 0) { 1536 dvb_unregister_frontend(dvb->fe); 1537 goto err_detach; 1538 } 1539 dvb->fe2->tuner_priv = dvb->fe->tuner_priv; 1540 memcpy(&dvb->fe2->ops.tuner_ops, 1541 &dvb->fe->ops.tuner_ops, 1542 sizeof(struct dvb_tuner_ops)); 1543 } 1544 } 1545 1546 dvb->attached = 0x31; 1547 return 0; 1548 1549 err_tuner: 1550 dev_err(port->dev->dev, "tuner attach failed!\n"); 1551 1552 if (dvb->fe2) 1553 dvb_frontend_detach(dvb->fe2); 1554 if (dvb->fe) 1555 dvb_frontend_detach(dvb->fe); 1556 err_detach: 1557 dvb_input_detach(input); 1558 1559 /* return error from ret if set */ 1560 if (ret < 0) 1561 return ret; 1562 1563 return -ENODEV; 1564 } 1565 1566 static int port_has_encti(struct ddb_port *port) 1567 { 1568 struct device *dev = port->dev->dev; 1569 u8 val; 1570 int ret = i2c_read_reg(&port->i2c->adap, 0x20, 0, &val); 1571 1572 if (!ret) 1573 dev_info(dev, "[0x20]=0x%02x\n", val); 1574 return ret ? 0 : 1; 1575 } 1576 1577 static int port_has_cxd(struct ddb_port *port, u8 *type) 1578 { 1579 u8 val; 1580 u8 probe[4] = { 0xe0, 0x00, 0x00, 0x00 }, data[4]; 1581 struct i2c_msg msgs[2] = {{ .addr = 0x40, .flags = 0, 1582 .buf = probe, .len = 4 }, 1583 { .addr = 0x40, .flags = I2C_M_RD, 1584 .buf = data, .len = 4 } }; 1585 val = i2c_transfer(&port->i2c->adap, msgs, 2); 1586 if (val != 2) 1587 return 0; 1588 1589 if (data[0] == 0x02 && data[1] == 0x2b && data[3] == 0x43) 1590 *type = 2; 1591 else 1592 *type = 1; 1593 return 1; 1594 } 1595 1596 static int port_has_xo2(struct ddb_port *port, u8 *type, u8 *id) 1597 { 1598 u8 probe[1] = { 0x00 }, data[4]; 1599 1600 if (i2c_io(&port->i2c->adap, 0x10, probe, 1, data, 4)) 1601 return 0; 1602 if (data[0] == 'D' && data[1] == 'F') { 1603 *id = data[2]; 1604 *type = 1; 1605 return 1; 1606 } 1607 if (data[0] == 'C' && data[1] == 'I') { 1608 *id = data[2]; 1609 *type = 2; 1610 return 1; 1611 } 1612 return 0; 1613 } 1614 1615 static int port_has_stv0900(struct ddb_port *port) 1616 { 1617 u8 val; 1618 1619 if (i2c_read_reg16(&port->i2c->adap, 0x69, 0xf100, &val) < 0) 1620 return 0; 1621 return 1; 1622 } 1623 1624 static int port_has_stv0900_aa(struct ddb_port *port, u8 *id) 1625 { 1626 if (i2c_read_reg16(&port->i2c->adap, 0x68, 0xf100, id) < 0) 1627 return 0; 1628 return 1; 1629 } 1630 1631 static int port_has_drxks(struct ddb_port *port) 1632 { 1633 u8 val; 1634 1635 if (i2c_read(&port->i2c->adap, 0x29, &val) < 0) 1636 return 0; 1637 if (i2c_read(&port->i2c->adap, 0x2a, &val) < 0) 1638 return 0; 1639 return 1; 1640 } 1641 1642 static int port_has_stv0367(struct ddb_port *port) 1643 { 1644 u8 val; 1645 1646 if (i2c_read_reg16(&port->i2c->adap, 0x1e, 0xf000, &val) < 0) 1647 return 0; 1648 if (val != 0x60) 1649 return 0; 1650 if (i2c_read_reg16(&port->i2c->adap, 0x1f, 0xf000, &val) < 0) 1651 return 0; 1652 if (val != 0x60) 1653 return 0; 1654 return 1; 1655 } 1656 1657 static int init_xo2(struct ddb_port *port) 1658 { 1659 struct i2c_adapter *i2c = &port->i2c->adap; 1660 struct ddb *dev = port->dev; 1661 u8 val, data[2]; 1662 int res; 1663 1664 res = i2c_read_regs(i2c, 0x10, 0x04, data, 2); 1665 if (res < 0) 1666 return res; 1667 1668 if (data[0] != 0x01) { 1669 dev_info(dev->dev, "Port %d: invalid XO2\n", port->nr); 1670 return -1; 1671 } 1672 1673 i2c_read_reg(i2c, 0x10, 0x08, &val); 1674 if (val != 0) { 1675 i2c_write_reg(i2c, 0x10, 0x08, 0x00); 1676 msleep(100); 1677 } 1678 /* Enable tuner power, disable pll, reset demods */ 1679 i2c_write_reg(i2c, 0x10, 0x08, 0x04); 1680 usleep_range(2000, 3000); 1681 /* Release demod resets */ 1682 i2c_write_reg(i2c, 0x10, 0x08, 0x07); 1683 1684 /* speed: 0=55,1=75,2=90,3=104 MBit/s */ 1685 i2c_write_reg(i2c, 0x10, 0x09, xo2_speed); 1686 1687 if (dev->link[port->lnr].info->con_clock) { 1688 dev_info(dev->dev, "Setting continuous clock for XO2\n"); 1689 i2c_write_reg(i2c, 0x10, 0x0a, 0x03); 1690 i2c_write_reg(i2c, 0x10, 0x0b, 0x03); 1691 } else { 1692 i2c_write_reg(i2c, 0x10, 0x0a, 0x01); 1693 i2c_write_reg(i2c, 0x10, 0x0b, 0x01); 1694 } 1695 1696 usleep_range(2000, 3000); 1697 /* Start XO2 PLL */ 1698 i2c_write_reg(i2c, 0x10, 0x08, 0x87); 1699 1700 return 0; 1701 } 1702 1703 static int init_xo2_ci(struct ddb_port *port) 1704 { 1705 struct i2c_adapter *i2c = &port->i2c->adap; 1706 struct ddb *dev = port->dev; 1707 u8 val, data[2]; 1708 int res; 1709 1710 res = i2c_read_regs(i2c, 0x10, 0x04, data, 2); 1711 if (res < 0) 1712 return res; 1713 1714 if (data[0] > 1) { 1715 dev_info(dev->dev, "Port %d: invalid XO2 CI %02x\n", 1716 port->nr, data[0]); 1717 return -1; 1718 } 1719 dev_info(dev->dev, "Port %d: DuoFlex CI %u.%u\n", 1720 port->nr, data[0], data[1]); 1721 1722 i2c_read_reg(i2c, 0x10, 0x08, &val); 1723 if (val != 0) { 1724 i2c_write_reg(i2c, 0x10, 0x08, 0x00); 1725 msleep(100); 1726 } 1727 /* Enable both CI */ 1728 i2c_write_reg(i2c, 0x10, 0x08, 3); 1729 usleep_range(2000, 3000); 1730 1731 /* speed: 0=55,1=75,2=90,3=104 MBit/s */ 1732 i2c_write_reg(i2c, 0x10, 0x09, 1); 1733 1734 i2c_write_reg(i2c, 0x10, 0x08, 0x83); 1735 usleep_range(2000, 3000); 1736 1737 if (dev->link[port->lnr].info->con_clock) { 1738 dev_info(dev->dev, "Setting continuous clock for DuoFlex CI\n"); 1739 i2c_write_reg(i2c, 0x10, 0x0a, 0x03); 1740 i2c_write_reg(i2c, 0x10, 0x0b, 0x03); 1741 } else { 1742 i2c_write_reg(i2c, 0x10, 0x0a, 0x01); 1743 i2c_write_reg(i2c, 0x10, 0x0b, 0x01); 1744 } 1745 return 0; 1746 } 1747 1748 static int port_has_cxd28xx(struct ddb_port *port, u8 *id) 1749 { 1750 struct i2c_adapter *i2c = &port->i2c->adap; 1751 int status; 1752 1753 status = i2c_write_reg(&port->i2c->adap, 0x6e, 0, 0); 1754 if (status) 1755 return 0; 1756 status = i2c_read_reg(i2c, 0x6e, 0xfd, id); 1757 if (status) 1758 return 0; 1759 return 1; 1760 } 1761 1762 static char *xo2names[] = { 1763 "DUAL DVB-S2", "DUAL DVB-C/T/T2", 1764 "DUAL DVB-ISDBT", "DUAL DVB-C/C2/T/T2", 1765 "DUAL ATSC", "DUAL DVB-C/C2/T/T2,ISDB-T", 1766 "", "" 1767 }; 1768 1769 static char *xo2types[] = { 1770 "DVBS_ST", "DVBCT2_SONY", 1771 "ISDBT_SONY", "DVBC2T2_SONY", 1772 "ATSC_ST", "DVBC2T2I_SONY" 1773 }; 1774 1775 static void ddb_port_probe(struct ddb_port *port) 1776 { 1777 struct ddb *dev = port->dev; 1778 u32 l = port->lnr; 1779 u8 id, type; 1780 1781 port->name = "NO MODULE"; 1782 port->type_name = "NONE"; 1783 port->class = DDB_PORT_NONE; 1784 1785 /* Handle missing ports and ports without I2C */ 1786 1787 if (port->nr == ts_loop) { 1788 port->name = "TS LOOP"; 1789 port->class = DDB_PORT_LOOP; 1790 return; 1791 } 1792 1793 if (port->nr == 1 && dev->link[l].info->type == DDB_OCTOPUS_CI && 1794 dev->link[l].info->i2c_mask == 1) { 1795 port->name = "NO TAB"; 1796 port->class = DDB_PORT_NONE; 1797 return; 1798 } 1799 1800 if (dev->link[l].info->type == DDB_OCTOPUS_MAX) { 1801 port->name = "DUAL DVB-S2 MAX"; 1802 port->type_name = "MXL5XX"; 1803 port->class = DDB_PORT_TUNER; 1804 port->type = DDB_TUNER_MXL5XX; 1805 if (port->i2c) 1806 ddbwritel(dev, I2C_SPEED_400, 1807 port->i2c->regs + I2C_TIMING); 1808 return; 1809 } 1810 1811 if (port->nr > 1 && dev->link[l].info->type == DDB_OCTOPUS_CI) { 1812 port->name = "CI internal"; 1813 port->type_name = "INTERNAL"; 1814 port->class = DDB_PORT_CI; 1815 port->type = DDB_CI_INTERNAL; 1816 } 1817 1818 if (!port->i2c) 1819 return; 1820 1821 /* Probe ports with I2C */ 1822 1823 if (port_has_cxd(port, &id)) { 1824 if (id == 1) { 1825 port->name = "CI"; 1826 port->type_name = "CXD2099"; 1827 port->class = DDB_PORT_CI; 1828 port->type = DDB_CI_EXTERNAL_SONY; 1829 ddbwritel(dev, I2C_SPEED_400, 1830 port->i2c->regs + I2C_TIMING); 1831 } else { 1832 dev_info(dev->dev, "Port %d: Uninitialized DuoFlex\n", 1833 port->nr); 1834 return; 1835 } 1836 } else if (port_has_xo2(port, &type, &id)) { 1837 ddbwritel(dev, I2C_SPEED_400, port->i2c->regs + I2C_TIMING); 1838 /*dev_info(dev->dev, "XO2 ID %02x\n", id);*/ 1839 if (type == 2) { 1840 port->name = "DuoFlex CI"; 1841 port->class = DDB_PORT_CI; 1842 port->type = DDB_CI_EXTERNAL_XO2; 1843 port->type_name = "CI_XO2"; 1844 init_xo2_ci(port); 1845 return; 1846 } 1847 id >>= 2; 1848 if (id > 5) { 1849 port->name = "unknown XO2 DuoFlex"; 1850 port->type_name = "UNKNOWN"; 1851 } else { 1852 port->name = xo2names[id]; 1853 port->class = DDB_PORT_TUNER; 1854 port->type = DDB_TUNER_XO2 + id; 1855 port->type_name = xo2types[id]; 1856 init_xo2(port); 1857 } 1858 } else if (port_has_cxd28xx(port, &id)) { 1859 switch (id) { 1860 case 0xa4: 1861 port->name = "DUAL DVB-C2T2 CXD2843"; 1862 port->type = DDB_TUNER_DVBC2T2_SONY_P; 1863 port->type_name = "DVBC2T2_SONY"; 1864 break; 1865 case 0xb1: 1866 port->name = "DUAL DVB-CT2 CXD2837"; 1867 port->type = DDB_TUNER_DVBCT2_SONY_P; 1868 port->type_name = "DVBCT2_SONY"; 1869 break; 1870 case 0xb0: 1871 port->name = "DUAL ISDB-T CXD2838"; 1872 port->type = DDB_TUNER_ISDBT_SONY_P; 1873 port->type_name = "ISDBT_SONY"; 1874 break; 1875 case 0xc1: 1876 port->name = "DUAL DVB-C2T2 ISDB-T CXD2854"; 1877 port->type = DDB_TUNER_DVBC2T2I_SONY_P; 1878 port->type_name = "DVBC2T2I_ISDBT_SONY"; 1879 break; 1880 default: 1881 return; 1882 } 1883 port->class = DDB_PORT_TUNER; 1884 ddbwritel(dev, I2C_SPEED_400, port->i2c->regs + I2C_TIMING); 1885 } else if (port_has_stv0900(port)) { 1886 port->name = "DUAL DVB-S2"; 1887 port->class = DDB_PORT_TUNER; 1888 port->type = DDB_TUNER_DVBS_ST; 1889 port->type_name = "DVBS_ST"; 1890 ddbwritel(dev, I2C_SPEED_100, port->i2c->regs + I2C_TIMING); 1891 } else if (port_has_stv0900_aa(port, &id)) { 1892 port->name = "DUAL DVB-S2"; 1893 port->class = DDB_PORT_TUNER; 1894 if (id == 0x51) { 1895 if (port->nr == 0 && 1896 dev->link[l].info->ts_quirks & TS_QUIRK_REVERSED) 1897 port->type = DDB_TUNER_DVBS_STV0910_PR; 1898 else 1899 port->type = DDB_TUNER_DVBS_STV0910_P; 1900 port->type_name = "DVBS_ST_0910"; 1901 } else { 1902 port->type = DDB_TUNER_DVBS_ST_AA; 1903 port->type_name = "DVBS_ST_AA"; 1904 } 1905 ddbwritel(dev, I2C_SPEED_100, port->i2c->regs + I2C_TIMING); 1906 } else if (port_has_drxks(port)) { 1907 port->name = "DUAL DVB-C/T"; 1908 port->class = DDB_PORT_TUNER; 1909 port->type = DDB_TUNER_DVBCT_TR; 1910 port->type_name = "DVBCT_TR"; 1911 ddbwritel(dev, I2C_SPEED_400, port->i2c->regs + I2C_TIMING); 1912 } else if (port_has_stv0367(port)) { 1913 port->name = "DUAL DVB-C/T"; 1914 port->class = DDB_PORT_TUNER; 1915 port->type = DDB_TUNER_DVBCT_ST; 1916 port->type_name = "DVBCT_ST"; 1917 ddbwritel(dev, I2C_SPEED_100, port->i2c->regs + I2C_TIMING); 1918 } else if (port_has_encti(port)) { 1919 port->name = "ENCTI"; 1920 port->class = DDB_PORT_LOOP; 1921 } 1922 } 1923 1924 /****************************************************************************/ 1925 /****************************************************************************/ 1926 /****************************************************************************/ 1927 1928 static int ddb_port_attach(struct ddb_port *port) 1929 { 1930 int ret = 0; 1931 1932 switch (port->class) { 1933 case DDB_PORT_TUNER: 1934 ret = dvb_input_attach(port->input[0]); 1935 if (ret < 0) 1936 break; 1937 ret = dvb_input_attach(port->input[1]); 1938 if (ret < 0) { 1939 dvb_input_detach(port->input[0]); 1940 break; 1941 } 1942 port->input[0]->redi = port->input[0]; 1943 port->input[1]->redi = port->input[1]; 1944 break; 1945 case DDB_PORT_CI: 1946 ret = ddb_ci_attach(port, ci_bitrate); 1947 if (ret < 0) 1948 break; 1949 /* fall-through */ 1950 case DDB_PORT_LOOP: 1951 ret = dvb_register_device(port->dvb[0].adap, 1952 &port->dvb[0].dev, 1953 &dvbdev_ci, (void *)port->output, 1954 DVB_DEVICE_SEC, 0); 1955 break; 1956 default: 1957 break; 1958 } 1959 if (ret < 0) 1960 dev_err(port->dev->dev, "port_attach on port %d failed\n", 1961 port->nr); 1962 return ret; 1963 } 1964 1965 int ddb_ports_attach(struct ddb *dev) 1966 { 1967 int i, numports, err_ports = 0, ret = 0; 1968 struct ddb_port *port; 1969 1970 if (dev->port_num) { 1971 ret = dvb_register_adapters(dev); 1972 if (ret < 0) { 1973 dev_err(dev->dev, "Registering adapters failed. Check DVB_MAX_ADAPTERS in config.\n"); 1974 return ret; 1975 } 1976 } 1977 1978 numports = dev->port_num; 1979 1980 for (i = 0; i < dev->port_num; i++) { 1981 port = &dev->port[i]; 1982 if (port->class != DDB_PORT_NONE) { 1983 ret = ddb_port_attach(port); 1984 if (ret) 1985 err_ports++; 1986 } else { 1987 numports--; 1988 } 1989 } 1990 1991 if (err_ports) { 1992 if (err_ports == numports) { 1993 dev_err(dev->dev, "All connected ports failed to initialise!\n"); 1994 return -ENODEV; 1995 } 1996 1997 dev_warn(dev->dev, "%d of %d connected ports failed to initialise!\n", 1998 err_ports, numports); 1999 } 2000 2001 return 0; 2002 } 2003 2004 void ddb_ports_detach(struct ddb *dev) 2005 { 2006 int i; 2007 struct ddb_port *port; 2008 2009 for (i = 0; i < dev->port_num; i++) { 2010 port = &dev->port[i]; 2011 2012 switch (port->class) { 2013 case DDB_PORT_TUNER: 2014 dvb_input_detach(port->input[1]); 2015 dvb_input_detach(port->input[0]); 2016 break; 2017 case DDB_PORT_CI: 2018 case DDB_PORT_LOOP: 2019 ddb_ci_detach(port); 2020 break; 2021 } 2022 } 2023 dvb_unregister_adapters(dev); 2024 } 2025 2026 /* Copy input DMA pointers to output DMA and ACK. */ 2027 2028 static void input_write_output(struct ddb_input *input, 2029 struct ddb_output *output) 2030 { 2031 ddbwritel(output->port->dev, 2032 input->dma->stat, DMA_BUFFER_ACK(output->dma)); 2033 output->dma->cbuf = (input->dma->stat >> 11) & 0x1f; 2034 output->dma->coff = (input->dma->stat & 0x7ff) << 7; 2035 } 2036 2037 static void output_ack_input(struct ddb_output *output, 2038 struct ddb_input *input) 2039 { 2040 ddbwritel(input->port->dev, 2041 output->dma->stat, DMA_BUFFER_ACK(input->dma)); 2042 } 2043 2044 static void input_write_dvb(struct ddb_input *input, 2045 struct ddb_input *input2) 2046 { 2047 struct ddb_dvb *dvb = &input2->port->dvb[input2->nr & 1]; 2048 struct ddb_dma *dma, *dma2; 2049 struct ddb *dev = input->port->dev; 2050 int ack = 1; 2051 2052 dma = input->dma; 2053 dma2 = input->dma; 2054 /* 2055 * if there also is an output connected, do not ACK. 2056 * input_write_output will ACK. 2057 */ 2058 if (input->redo) { 2059 dma2 = input->redo->dma; 2060 ack = 0; 2061 } 2062 while (dma->cbuf != ((dma->stat >> 11) & 0x1f) || 2063 (4 & dma->ctrl)) { 2064 if (4 & dma->ctrl) { 2065 /* dev_err(dev->dev, "Overflow dma %d\n", dma->nr); */ 2066 ack = 1; 2067 } 2068 if (alt_dma) 2069 dma_sync_single_for_cpu(dev->dev, dma2->pbuf[dma->cbuf], 2070 dma2->size, DMA_FROM_DEVICE); 2071 dvb_dmx_swfilter_packets(&dvb->demux, 2072 dma2->vbuf[dma->cbuf], 2073 dma2->size / 188); 2074 dma->cbuf = (dma->cbuf + 1) % dma2->num; 2075 if (ack) 2076 ddbwritel(dev, (dma->cbuf << 11), 2077 DMA_BUFFER_ACK(dma)); 2078 dma->stat = safe_ddbreadl(dev, DMA_BUFFER_CURRENT(dma)); 2079 dma->ctrl = safe_ddbreadl(dev, DMA_BUFFER_CONTROL(dma)); 2080 } 2081 } 2082 2083 static void input_work(struct work_struct *work) 2084 { 2085 struct ddb_dma *dma = container_of(work, struct ddb_dma, work); 2086 struct ddb_input *input = (struct ddb_input *)dma->io; 2087 struct ddb *dev = input->port->dev; 2088 unsigned long flags; 2089 2090 spin_lock_irqsave(&dma->lock, flags); 2091 if (!dma->running) { 2092 spin_unlock_irqrestore(&dma->lock, flags); 2093 return; 2094 } 2095 dma->stat = ddbreadl(dev, DMA_BUFFER_CURRENT(dma)); 2096 dma->ctrl = ddbreadl(dev, DMA_BUFFER_CONTROL(dma)); 2097 2098 if (input->redi) 2099 input_write_dvb(input, input->redi); 2100 if (input->redo) 2101 input_write_output(input, input->redo); 2102 wake_up(&dma->wq); 2103 spin_unlock_irqrestore(&dma->lock, flags); 2104 } 2105 2106 static void input_handler(unsigned long data) 2107 { 2108 struct ddb_input *input = (struct ddb_input *)data; 2109 struct ddb_dma *dma = input->dma; 2110 2111 /* 2112 * If there is no input connected, input_tasklet() will 2113 * just copy pointers and ACK. So, there is no need to go 2114 * through the tasklet scheduler. 2115 */ 2116 if (input->redi) 2117 queue_work(ddb_wq, &dma->work); 2118 else 2119 input_work(&dma->work); 2120 } 2121 2122 static void output_handler(unsigned long data) 2123 { 2124 struct ddb_output *output = (struct ddb_output *)data; 2125 struct ddb_dma *dma = output->dma; 2126 struct ddb *dev = output->port->dev; 2127 2128 spin_lock(&dma->lock); 2129 if (!dma->running) { 2130 spin_unlock(&dma->lock); 2131 return; 2132 } 2133 dma->stat = ddbreadl(dev, DMA_BUFFER_CURRENT(dma)); 2134 dma->ctrl = ddbreadl(dev, DMA_BUFFER_CONTROL(dma)); 2135 if (output->redi) 2136 output_ack_input(output, output->redi); 2137 wake_up(&dma->wq); 2138 spin_unlock(&dma->lock); 2139 } 2140 2141 /****************************************************************************/ 2142 /****************************************************************************/ 2143 2144 static const struct ddb_regmap *io_regmap(struct ddb_io *io, int link) 2145 { 2146 const struct ddb_info *info; 2147 2148 if (link) 2149 info = io->port->dev->link[io->port->lnr].info; 2150 else 2151 info = io->port->dev->link[0].info; 2152 2153 if (!info) 2154 return NULL; 2155 2156 return info->regmap; 2157 } 2158 2159 static void ddb_dma_init(struct ddb_io *io, int nr, int out) 2160 { 2161 struct ddb_dma *dma; 2162 const struct ddb_regmap *rm = io_regmap(io, 0); 2163 2164 dma = out ? &io->port->dev->odma[nr] : &io->port->dev->idma[nr]; 2165 io->dma = dma; 2166 dma->io = io; 2167 2168 spin_lock_init(&dma->lock); 2169 init_waitqueue_head(&dma->wq); 2170 if (out) { 2171 dma->regs = rm->odma->base + rm->odma->size * nr; 2172 dma->bufregs = rm->odma_buf->base + rm->odma_buf->size * nr; 2173 dma->num = OUTPUT_DMA_BUFS; 2174 dma->size = OUTPUT_DMA_SIZE; 2175 dma->div = OUTPUT_DMA_IRQ_DIV; 2176 } else { 2177 INIT_WORK(&dma->work, input_work); 2178 dma->regs = rm->idma->base + rm->idma->size * nr; 2179 dma->bufregs = rm->idma_buf->base + rm->idma_buf->size * nr; 2180 dma->num = INPUT_DMA_BUFS; 2181 dma->size = INPUT_DMA_SIZE; 2182 dma->div = INPUT_DMA_IRQ_DIV; 2183 } 2184 ddbwritel(io->port->dev, 0, DMA_BUFFER_ACK(dma)); 2185 dev_dbg(io->port->dev->dev, "init link %u, io %u, dma %u, dmaregs %08x bufregs %08x\n", 2186 io->port->lnr, io->nr, nr, dma->regs, dma->bufregs); 2187 } 2188 2189 static void ddb_input_init(struct ddb_port *port, int nr, int pnr, int anr) 2190 { 2191 struct ddb *dev = port->dev; 2192 struct ddb_input *input = &dev->input[anr]; 2193 const struct ddb_regmap *rm; 2194 2195 port->input[pnr] = input; 2196 input->nr = nr; 2197 input->port = port; 2198 rm = io_regmap(input, 1); 2199 input->regs = DDB_LINK_TAG(port->lnr) | 2200 (rm->input->base + rm->input->size * nr); 2201 dev_dbg(dev->dev, "init link %u, input %u, regs %08x\n", 2202 port->lnr, nr, input->regs); 2203 2204 if (dev->has_dma) { 2205 const struct ddb_regmap *rm0 = io_regmap(input, 0); 2206 u32 base = rm0->irq_base_idma; 2207 u32 dma_nr = nr; 2208 2209 if (port->lnr) 2210 dma_nr += 32 + (port->lnr - 1) * 8; 2211 2212 dev_dbg(dev->dev, "init link %u, input %u, handler %u\n", 2213 port->lnr, nr, dma_nr + base); 2214 2215 dev->handler[0][dma_nr + base] = input_handler; 2216 dev->handler_data[0][dma_nr + base] = (unsigned long)input; 2217 ddb_dma_init(input, dma_nr, 0); 2218 } 2219 } 2220 2221 static void ddb_output_init(struct ddb_port *port, int nr) 2222 { 2223 struct ddb *dev = port->dev; 2224 struct ddb_output *output = &dev->output[nr]; 2225 const struct ddb_regmap *rm; 2226 2227 port->output = output; 2228 output->nr = nr; 2229 output->port = port; 2230 rm = io_regmap(output, 1); 2231 output->regs = DDB_LINK_TAG(port->lnr) | 2232 (rm->output->base + rm->output->size * nr); 2233 2234 dev_dbg(dev->dev, "init link %u, output %u, regs %08x\n", 2235 port->lnr, nr, output->regs); 2236 2237 if (dev->has_dma) { 2238 const struct ddb_regmap *rm0 = io_regmap(output, 0); 2239 u32 base = rm0->irq_base_odma; 2240 2241 dev->handler[0][nr + base] = output_handler; 2242 dev->handler_data[0][nr + base] = (unsigned long)output; 2243 ddb_dma_init(output, nr, 1); 2244 } 2245 } 2246 2247 static int ddb_port_match_i2c(struct ddb_port *port) 2248 { 2249 struct ddb *dev = port->dev; 2250 u32 i; 2251 2252 for (i = 0; i < dev->i2c_num; i++) { 2253 if (dev->i2c[i].link == port->lnr && 2254 dev->i2c[i].nr == port->nr) { 2255 port->i2c = &dev->i2c[i]; 2256 return 1; 2257 } 2258 } 2259 return 0; 2260 } 2261 2262 static int ddb_port_match_link_i2c(struct ddb_port *port) 2263 { 2264 struct ddb *dev = port->dev; 2265 u32 i; 2266 2267 for (i = 0; i < dev->i2c_num; i++) { 2268 if (dev->i2c[i].link == port->lnr) { 2269 port->i2c = &dev->i2c[i]; 2270 return 1; 2271 } 2272 } 2273 return 0; 2274 } 2275 2276 void ddb_ports_init(struct ddb *dev) 2277 { 2278 u32 i, l, p; 2279 struct ddb_port *port; 2280 const struct ddb_info *info; 2281 const struct ddb_regmap *rm; 2282 2283 for (p = l = 0; l < DDB_MAX_LINK; l++) { 2284 info = dev->link[l].info; 2285 if (!info) 2286 continue; 2287 rm = info->regmap; 2288 if (!rm) 2289 continue; 2290 for (i = 0; i < info->port_num; i++, p++) { 2291 port = &dev->port[p]; 2292 port->dev = dev; 2293 port->nr = i; 2294 port->lnr = l; 2295 port->pnr = p; 2296 port->gap = 0xffffffff; 2297 port->obr = ci_bitrate; 2298 mutex_init(&port->i2c_gate_lock); 2299 2300 if (!ddb_port_match_i2c(port)) { 2301 if (info->type == DDB_OCTOPUS_MAX) 2302 ddb_port_match_link_i2c(port); 2303 } 2304 2305 ddb_port_probe(port); 2306 2307 port->dvb[0].adap = &dev->adap[2 * p]; 2308 port->dvb[1].adap = &dev->adap[2 * p + 1]; 2309 2310 if (port->class == DDB_PORT_NONE && i && p && 2311 dev->port[p - 1].type == DDB_CI_EXTERNAL_XO2) { 2312 port->class = DDB_PORT_CI; 2313 port->type = DDB_CI_EXTERNAL_XO2_B; 2314 port->name = "DuoFlex CI_B"; 2315 port->i2c = dev->port[p - 1].i2c; 2316 } 2317 2318 dev_info(dev->dev, "Port %u: Link %u, Link Port %u (TAB %u): %s\n", 2319 port->pnr, port->lnr, port->nr, port->nr + 1, 2320 port->name); 2321 2322 if (port->class == DDB_PORT_CI && 2323 port->type == DDB_CI_EXTERNAL_XO2) { 2324 ddb_input_init(port, 2 * i, 0, 2 * i); 2325 ddb_output_init(port, i); 2326 continue; 2327 } 2328 2329 if (port->class == DDB_PORT_CI && 2330 port->type == DDB_CI_EXTERNAL_XO2_B) { 2331 ddb_input_init(port, 2 * i - 1, 0, 2 * i - 1); 2332 ddb_output_init(port, i); 2333 continue; 2334 } 2335 2336 if (port->class == DDB_PORT_NONE) 2337 continue; 2338 2339 switch (dev->link[l].info->type) { 2340 case DDB_OCTOPUS_CI: 2341 if (i >= 2) { 2342 ddb_input_init(port, 2 + i, 0, 2 + i); 2343 ddb_input_init(port, 4 + i, 1, 4 + i); 2344 ddb_output_init(port, i); 2345 break; 2346 } /* fallthrough */ 2347 case DDB_OCTOPUS: 2348 ddb_input_init(port, 2 * i, 0, 2 * i); 2349 ddb_input_init(port, 2 * i + 1, 1, 2 * i + 1); 2350 ddb_output_init(port, i); 2351 break; 2352 case DDB_OCTOPUS_MAX: 2353 case DDB_OCTOPUS_MAX_CT: 2354 ddb_input_init(port, 2 * i, 0, 2 * p); 2355 ddb_input_init(port, 2 * i + 1, 1, 2 * p + 1); 2356 break; 2357 default: 2358 break; 2359 } 2360 } 2361 } 2362 dev->port_num = p; 2363 } 2364 2365 void ddb_ports_release(struct ddb *dev) 2366 { 2367 int i; 2368 struct ddb_port *port; 2369 2370 for (i = 0; i < dev->port_num; i++) { 2371 port = &dev->port[i]; 2372 if (port->input[0] && port->input[0]->dma) 2373 cancel_work_sync(&port->input[0]->dma->work); 2374 if (port->input[1] && port->input[1]->dma) 2375 cancel_work_sync(&port->input[1]->dma->work); 2376 if (port->output && port->output->dma) 2377 cancel_work_sync(&port->output->dma->work); 2378 } 2379 } 2380 2381 /****************************************************************************/ 2382 /****************************************************************************/ 2383 /****************************************************************************/ 2384 2385 #define IRQ_HANDLE(_nr) \ 2386 do { if ((s & (1UL << ((_nr) & 0x1f))) && dev->handler[0][_nr]) \ 2387 dev->handler[0][_nr](dev->handler_data[0][_nr]); } \ 2388 while (0) 2389 2390 static void irq_handle_msg(struct ddb *dev, u32 s) 2391 { 2392 dev->i2c_irq++; 2393 IRQ_HANDLE(0); 2394 IRQ_HANDLE(1); 2395 IRQ_HANDLE(2); 2396 IRQ_HANDLE(3); 2397 } 2398 2399 static void irq_handle_io(struct ddb *dev, u32 s) 2400 { 2401 dev->ts_irq++; 2402 if ((s & 0x000000f0)) { 2403 IRQ_HANDLE(4); 2404 IRQ_HANDLE(5); 2405 IRQ_HANDLE(6); 2406 IRQ_HANDLE(7); 2407 } 2408 if ((s & 0x0000ff00)) { 2409 IRQ_HANDLE(8); 2410 IRQ_HANDLE(9); 2411 IRQ_HANDLE(10); 2412 IRQ_HANDLE(11); 2413 IRQ_HANDLE(12); 2414 IRQ_HANDLE(13); 2415 IRQ_HANDLE(14); 2416 IRQ_HANDLE(15); 2417 } 2418 if ((s & 0x00ff0000)) { 2419 IRQ_HANDLE(16); 2420 IRQ_HANDLE(17); 2421 IRQ_HANDLE(18); 2422 IRQ_HANDLE(19); 2423 IRQ_HANDLE(20); 2424 IRQ_HANDLE(21); 2425 IRQ_HANDLE(22); 2426 IRQ_HANDLE(23); 2427 } 2428 if ((s & 0xff000000)) { 2429 IRQ_HANDLE(24); 2430 IRQ_HANDLE(25); 2431 IRQ_HANDLE(26); 2432 IRQ_HANDLE(27); 2433 IRQ_HANDLE(28); 2434 IRQ_HANDLE(29); 2435 IRQ_HANDLE(30); 2436 IRQ_HANDLE(31); 2437 } 2438 } 2439 2440 irqreturn_t ddb_irq_handler0(int irq, void *dev_id) 2441 { 2442 struct ddb *dev = (struct ddb *)dev_id; 2443 u32 s = ddbreadl(dev, INTERRUPT_STATUS); 2444 2445 do { 2446 if (s & 0x80000000) 2447 return IRQ_NONE; 2448 if (!(s & 0xfffff00)) 2449 return IRQ_NONE; 2450 ddbwritel(dev, s & 0xfffff00, INTERRUPT_ACK); 2451 irq_handle_io(dev, s); 2452 } while ((s = ddbreadl(dev, INTERRUPT_STATUS))); 2453 2454 return IRQ_HANDLED; 2455 } 2456 2457 irqreturn_t ddb_irq_handler1(int irq, void *dev_id) 2458 { 2459 struct ddb *dev = (struct ddb *)dev_id; 2460 u32 s = ddbreadl(dev, INTERRUPT_STATUS); 2461 2462 do { 2463 if (s & 0x80000000) 2464 return IRQ_NONE; 2465 if (!(s & 0x0000f)) 2466 return IRQ_NONE; 2467 ddbwritel(dev, s & 0x0000f, INTERRUPT_ACK); 2468 irq_handle_msg(dev, s); 2469 } while ((s = ddbreadl(dev, INTERRUPT_STATUS))); 2470 2471 return IRQ_HANDLED; 2472 } 2473 2474 irqreturn_t ddb_irq_handler(int irq, void *dev_id) 2475 { 2476 struct ddb *dev = (struct ddb *)dev_id; 2477 u32 s = ddbreadl(dev, INTERRUPT_STATUS); 2478 int ret = IRQ_HANDLED; 2479 2480 if (!s) 2481 return IRQ_NONE; 2482 do { 2483 if (s & 0x80000000) 2484 return IRQ_NONE; 2485 ddbwritel(dev, s, INTERRUPT_ACK); 2486 2487 if (s & 0x0000000f) 2488 irq_handle_msg(dev, s); 2489 if (s & 0x0fffff00) 2490 irq_handle_io(dev, s); 2491 } while ((s = ddbreadl(dev, INTERRUPT_STATUS))); 2492 2493 return ret; 2494 } 2495 2496 /****************************************************************************/ 2497 /****************************************************************************/ 2498 /****************************************************************************/ 2499 2500 static int reg_wait(struct ddb *dev, u32 reg, u32 bit) 2501 { 2502 u32 count = 0; 2503 2504 while (safe_ddbreadl(dev, reg) & bit) { 2505 ndelay(10); 2506 if (++count == 100) 2507 return -1; 2508 } 2509 return 0; 2510 } 2511 2512 static int flashio(struct ddb *dev, u32 lnr, u8 *wbuf, u32 wlen, u8 *rbuf, 2513 u32 rlen) 2514 { 2515 u32 data, shift; 2516 u32 tag = DDB_LINK_TAG(lnr); 2517 struct ddb_link *link = &dev->link[lnr]; 2518 2519 mutex_lock(&link->flash_mutex); 2520 if (wlen > 4) 2521 ddbwritel(dev, 1, tag | SPI_CONTROL); 2522 while (wlen > 4) { 2523 /* FIXME: check for big-endian */ 2524 data = swab32(*(u32 *)wbuf); 2525 wbuf += 4; 2526 wlen -= 4; 2527 ddbwritel(dev, data, tag | SPI_DATA); 2528 if (reg_wait(dev, tag | SPI_CONTROL, 4)) 2529 goto fail; 2530 } 2531 if (rlen) 2532 ddbwritel(dev, 0x0001 | ((wlen << (8 + 3)) & 0x1f00), 2533 tag | SPI_CONTROL); 2534 else 2535 ddbwritel(dev, 0x0003 | ((wlen << (8 + 3)) & 0x1f00), 2536 tag | SPI_CONTROL); 2537 2538 data = 0; 2539 shift = ((4 - wlen) * 8); 2540 while (wlen) { 2541 data <<= 8; 2542 data |= *wbuf; 2543 wlen--; 2544 wbuf++; 2545 } 2546 if (shift) 2547 data <<= shift; 2548 ddbwritel(dev, data, tag | SPI_DATA); 2549 if (reg_wait(dev, tag | SPI_CONTROL, 4)) 2550 goto fail; 2551 2552 if (!rlen) { 2553 ddbwritel(dev, 0, tag | SPI_CONTROL); 2554 goto exit; 2555 } 2556 if (rlen > 4) 2557 ddbwritel(dev, 1, tag | SPI_CONTROL); 2558 2559 while (rlen > 4) { 2560 ddbwritel(dev, 0xffffffff, tag | SPI_DATA); 2561 if (reg_wait(dev, tag | SPI_CONTROL, 4)) 2562 goto fail; 2563 data = ddbreadl(dev, tag | SPI_DATA); 2564 *(u32 *)rbuf = swab32(data); 2565 rbuf += 4; 2566 rlen -= 4; 2567 } 2568 ddbwritel(dev, 0x0003 | ((rlen << (8 + 3)) & 0x1F00), 2569 tag | SPI_CONTROL); 2570 ddbwritel(dev, 0xffffffff, tag | SPI_DATA); 2571 if (reg_wait(dev, tag | SPI_CONTROL, 4)) 2572 goto fail; 2573 2574 data = ddbreadl(dev, tag | SPI_DATA); 2575 ddbwritel(dev, 0, tag | SPI_CONTROL); 2576 2577 if (rlen < 4) 2578 data <<= ((4 - rlen) * 8); 2579 2580 while (rlen > 0) { 2581 *rbuf = ((data >> 24) & 0xff); 2582 data <<= 8; 2583 rbuf++; 2584 rlen--; 2585 } 2586 exit: 2587 mutex_unlock(&link->flash_mutex); 2588 return 0; 2589 fail: 2590 mutex_unlock(&link->flash_mutex); 2591 return -1; 2592 } 2593 2594 int ddbridge_flashread(struct ddb *dev, u32 link, u8 *buf, u32 addr, u32 len) 2595 { 2596 u8 cmd[4] = {0x03, (addr >> 16) & 0xff, 2597 (addr >> 8) & 0xff, addr & 0xff}; 2598 2599 return flashio(dev, link, cmd, 4, buf, len); 2600 } 2601 2602 /* 2603 * TODO/FIXME: add/implement IOCTLs from upstream driver 2604 */ 2605 2606 #define DDB_NAME "ddbridge" 2607 2608 static u32 ddb_num; 2609 static int ddb_major; 2610 static DEFINE_MUTEX(ddb_mutex); 2611 2612 static int ddb_release(struct inode *inode, struct file *file) 2613 { 2614 struct ddb *dev = file->private_data; 2615 2616 dev->ddb_dev_users--; 2617 return 0; 2618 } 2619 2620 static int ddb_open(struct inode *inode, struct file *file) 2621 { 2622 struct ddb *dev = ddbs[iminor(inode)]; 2623 2624 if (dev->ddb_dev_users) 2625 return -EBUSY; 2626 dev->ddb_dev_users++; 2627 file->private_data = dev; 2628 return 0; 2629 } 2630 2631 static long ddb_ioctl(struct file *file, unsigned int cmd, unsigned long arg) 2632 { 2633 struct ddb *dev = file->private_data; 2634 2635 dev_warn(dev->dev, "DDB IOCTLs unsupported (cmd: %d, arg: %lu)\n", 2636 cmd, arg); 2637 2638 return -ENOTTY; 2639 } 2640 2641 static const struct file_operations ddb_fops = { 2642 .unlocked_ioctl = ddb_ioctl, 2643 .open = ddb_open, 2644 .release = ddb_release, 2645 }; 2646 2647 static char *ddb_devnode(struct device *device, umode_t *mode) 2648 { 2649 struct ddb *dev = dev_get_drvdata(device); 2650 2651 return kasprintf(GFP_KERNEL, "ddbridge/card%d", dev->nr); 2652 } 2653 2654 #define __ATTR_MRO(_name, _show) { \ 2655 .attr = { .name = __stringify(_name), .mode = 0444 }, \ 2656 .show = _show, \ 2657 } 2658 2659 #define __ATTR_MWO(_name, _store) { \ 2660 .attr = { .name = __stringify(_name), .mode = 0222 }, \ 2661 .store = _store, \ 2662 } 2663 2664 static ssize_t ports_show(struct device *device, 2665 struct device_attribute *attr, char *buf) 2666 { 2667 struct ddb *dev = dev_get_drvdata(device); 2668 2669 return sprintf(buf, "%d\n", dev->port_num); 2670 } 2671 2672 static ssize_t ts_irq_show(struct device *device, 2673 struct device_attribute *attr, char *buf) 2674 { 2675 struct ddb *dev = dev_get_drvdata(device); 2676 2677 return sprintf(buf, "%d\n", dev->ts_irq); 2678 } 2679 2680 static ssize_t i2c_irq_show(struct device *device, 2681 struct device_attribute *attr, char *buf) 2682 { 2683 struct ddb *dev = dev_get_drvdata(device); 2684 2685 return sprintf(buf, "%d\n", dev->i2c_irq); 2686 } 2687 2688 static ssize_t fan_show(struct device *device, 2689 struct device_attribute *attr, char *buf) 2690 { 2691 struct ddb *dev = dev_get_drvdata(device); 2692 u32 val; 2693 2694 val = ddbreadl(dev, GPIO_OUTPUT) & 1; 2695 return sprintf(buf, "%d\n", val); 2696 } 2697 2698 static ssize_t fan_store(struct device *device, struct device_attribute *d, 2699 const char *buf, size_t count) 2700 { 2701 struct ddb *dev = dev_get_drvdata(device); 2702 u32 val; 2703 2704 if (sscanf(buf, "%u\n", &val) != 1) 2705 return -EINVAL; 2706 ddbwritel(dev, 1, GPIO_DIRECTION); 2707 ddbwritel(dev, val & 1, GPIO_OUTPUT); 2708 return count; 2709 } 2710 2711 static ssize_t fanspeed_show(struct device *device, 2712 struct device_attribute *attr, char *buf) 2713 { 2714 struct ddb *dev = dev_get_drvdata(device); 2715 int num = attr->attr.name[8] - 0x30; 2716 struct ddb_link *link = &dev->link[num]; 2717 u32 spd; 2718 2719 spd = ddblreadl(link, TEMPMON_FANCONTROL) & 0xff; 2720 return sprintf(buf, "%u\n", spd * 100); 2721 } 2722 2723 static ssize_t temp_show(struct device *device, 2724 struct device_attribute *attr, char *buf) 2725 { 2726 struct ddb *dev = dev_get_drvdata(device); 2727 struct ddb_link *link = &dev->link[0]; 2728 struct i2c_adapter *adap; 2729 int temp, temp2; 2730 u8 tmp[2]; 2731 2732 if (!link->info->temp_num) 2733 return sprintf(buf, "no sensor\n"); 2734 adap = &dev->i2c[link->info->temp_bus].adap; 2735 if (i2c_read_regs(adap, 0x48, 0, tmp, 2) < 0) 2736 return sprintf(buf, "read_error\n"); 2737 temp = (tmp[0] << 3) | (tmp[1] >> 5); 2738 temp *= 125; 2739 if (link->info->temp_num == 2) { 2740 if (i2c_read_regs(adap, 0x49, 0, tmp, 2) < 0) 2741 return sprintf(buf, "read_error\n"); 2742 temp2 = (tmp[0] << 3) | (tmp[1] >> 5); 2743 temp2 *= 125; 2744 return sprintf(buf, "%d %d\n", temp, temp2); 2745 } 2746 return sprintf(buf, "%d\n", temp); 2747 } 2748 2749 static ssize_t ctemp_show(struct device *device, 2750 struct device_attribute *attr, char *buf) 2751 { 2752 struct ddb *dev = dev_get_drvdata(device); 2753 struct i2c_adapter *adap; 2754 int temp; 2755 u8 tmp[2]; 2756 int num = attr->attr.name[4] - 0x30; 2757 2758 adap = &dev->i2c[num].adap; 2759 if (!adap) 2760 return 0; 2761 if (i2c_read_regs(adap, 0x49, 0, tmp, 2) < 0) 2762 if (i2c_read_regs(adap, 0x4d, 0, tmp, 2) < 0) 2763 return sprintf(buf, "no sensor\n"); 2764 temp = tmp[0] * 1000; 2765 return sprintf(buf, "%d\n", temp); 2766 } 2767 2768 static ssize_t led_show(struct device *device, 2769 struct device_attribute *attr, char *buf) 2770 { 2771 struct ddb *dev = dev_get_drvdata(device); 2772 int num = attr->attr.name[3] - 0x30; 2773 2774 return sprintf(buf, "%d\n", dev->leds & (1 << num) ? 1 : 0); 2775 } 2776 2777 static void ddb_set_led(struct ddb *dev, int num, int val) 2778 { 2779 if (!dev->link[0].info->led_num) 2780 return; 2781 switch (dev->port[num].class) { 2782 case DDB_PORT_TUNER: 2783 switch (dev->port[num].type) { 2784 case DDB_TUNER_DVBS_ST: 2785 i2c_write_reg16(&dev->i2c[num].adap, 2786 0x69, 0xf14c, val ? 2 : 0); 2787 break; 2788 case DDB_TUNER_DVBCT_ST: 2789 i2c_write_reg16(&dev->i2c[num].adap, 2790 0x1f, 0xf00e, 0); 2791 i2c_write_reg16(&dev->i2c[num].adap, 2792 0x1f, 0xf00f, val ? 1 : 0); 2793 break; 2794 case DDB_TUNER_XO2 ... DDB_TUNER_DVBC2T2I_SONY: 2795 { 2796 u8 v; 2797 2798 i2c_read_reg(&dev->i2c[num].adap, 0x10, 0x08, &v); 2799 v = (v & ~0x10) | (val ? 0x10 : 0); 2800 i2c_write_reg(&dev->i2c[num].adap, 0x10, 0x08, v); 2801 break; 2802 } 2803 default: 2804 break; 2805 } 2806 break; 2807 } 2808 } 2809 2810 static ssize_t led_store(struct device *device, 2811 struct device_attribute *attr, 2812 const char *buf, size_t count) 2813 { 2814 struct ddb *dev = dev_get_drvdata(device); 2815 int num = attr->attr.name[3] - 0x30; 2816 u32 val; 2817 2818 if (sscanf(buf, "%u\n", &val) != 1) 2819 return -EINVAL; 2820 if (val) 2821 dev->leds |= (1 << num); 2822 else 2823 dev->leds &= ~(1 << num); 2824 ddb_set_led(dev, num, val); 2825 return count; 2826 } 2827 2828 static ssize_t snr_show(struct device *device, 2829 struct device_attribute *attr, char *buf) 2830 { 2831 struct ddb *dev = dev_get_drvdata(device); 2832 char snr[32]; 2833 int num = attr->attr.name[3] - 0x30; 2834 2835 if (dev->port[num].type >= DDB_TUNER_XO2) { 2836 if (i2c_read_regs(&dev->i2c[num].adap, 0x10, 0x10, snr, 16) < 0) 2837 return sprintf(buf, "NO SNR\n"); 2838 snr[16] = 0; 2839 } else { 2840 /* serial number at 0x100-0x11f */ 2841 if (i2c_read_regs16(&dev->i2c[num].adap, 2842 0x57, 0x100, snr, 32) < 0) 2843 if (i2c_read_regs16(&dev->i2c[num].adap, 2844 0x50, 0x100, snr, 32) < 0) 2845 return sprintf(buf, "NO SNR\n"); 2846 snr[31] = 0; /* in case it is not terminated on EEPROM */ 2847 } 2848 return sprintf(buf, "%s\n", snr); 2849 } 2850 2851 static ssize_t bsnr_show(struct device *device, 2852 struct device_attribute *attr, char *buf) 2853 { 2854 struct ddb *dev = dev_get_drvdata(device); 2855 char snr[16]; 2856 2857 ddbridge_flashread(dev, 0, snr, 0x10, 15); 2858 snr[15] = 0; /* in case it is not terminated on EEPROM */ 2859 return sprintf(buf, "%s\n", snr); 2860 } 2861 2862 static ssize_t bpsnr_show(struct device *device, 2863 struct device_attribute *attr, char *buf) 2864 { 2865 struct ddb *dev = dev_get_drvdata(device); 2866 unsigned char snr[32]; 2867 2868 if (!dev->i2c_num) 2869 return 0; 2870 2871 if (i2c_read_regs16(&dev->i2c[0].adap, 2872 0x50, 0x0000, snr, 32) < 0 || 2873 snr[0] == 0xff) 2874 return sprintf(buf, "NO SNR\n"); 2875 snr[31] = 0; /* in case it is not terminated on EEPROM */ 2876 return sprintf(buf, "%s\n", snr); 2877 } 2878 2879 static ssize_t redirect_show(struct device *device, 2880 struct device_attribute *attr, char *buf) 2881 { 2882 return 0; 2883 } 2884 2885 static ssize_t redirect_store(struct device *device, 2886 struct device_attribute *attr, 2887 const char *buf, size_t count) 2888 { 2889 unsigned int i, p; 2890 int res; 2891 2892 if (sscanf(buf, "%x %x\n", &i, &p) != 2) 2893 return -EINVAL; 2894 res = ddb_redirect(i, p); 2895 if (res < 0) 2896 return res; 2897 dev_info(device, "redirect: %02x, %02x\n", i, p); 2898 return count; 2899 } 2900 2901 static ssize_t gap_show(struct device *device, 2902 struct device_attribute *attr, char *buf) 2903 { 2904 struct ddb *dev = dev_get_drvdata(device); 2905 int num = attr->attr.name[3] - 0x30; 2906 2907 return sprintf(buf, "%d\n", dev->port[num].gap); 2908 } 2909 2910 static ssize_t gap_store(struct device *device, struct device_attribute *attr, 2911 const char *buf, size_t count) 2912 { 2913 struct ddb *dev = dev_get_drvdata(device); 2914 int num = attr->attr.name[3] - 0x30; 2915 unsigned int val; 2916 2917 if (sscanf(buf, "%u\n", &val) != 1) 2918 return -EINVAL; 2919 if (val > 128) 2920 return -EINVAL; 2921 if (val == 128) 2922 val = 0xffffffff; 2923 dev->port[num].gap = val; 2924 return count; 2925 } 2926 2927 static ssize_t version_show(struct device *device, 2928 struct device_attribute *attr, char *buf) 2929 { 2930 struct ddb *dev = dev_get_drvdata(device); 2931 2932 return sprintf(buf, "%08x %08x\n", 2933 dev->link[0].ids.hwid, dev->link[0].ids.regmapid); 2934 } 2935 2936 static ssize_t hwid_show(struct device *device, 2937 struct device_attribute *attr, char *buf) 2938 { 2939 struct ddb *dev = dev_get_drvdata(device); 2940 2941 return sprintf(buf, "0x%08X\n", dev->link[0].ids.hwid); 2942 } 2943 2944 static ssize_t regmap_show(struct device *device, 2945 struct device_attribute *attr, char *buf) 2946 { 2947 struct ddb *dev = dev_get_drvdata(device); 2948 2949 return sprintf(buf, "0x%08X\n", dev->link[0].ids.regmapid); 2950 } 2951 2952 static ssize_t fmode_show(struct device *device, 2953 struct device_attribute *attr, char *buf) 2954 { 2955 int num = attr->attr.name[5] - 0x30; 2956 struct ddb *dev = dev_get_drvdata(device); 2957 2958 return sprintf(buf, "%u\n", dev->link[num].lnb.fmode); 2959 } 2960 2961 static ssize_t devid_show(struct device *device, 2962 struct device_attribute *attr, char *buf) 2963 { 2964 int num = attr->attr.name[5] - 0x30; 2965 struct ddb *dev = dev_get_drvdata(device); 2966 2967 return sprintf(buf, "%08x\n", dev->link[num].ids.devid); 2968 } 2969 2970 static ssize_t fmode_store(struct device *device, struct device_attribute *attr, 2971 const char *buf, size_t count) 2972 { 2973 struct ddb *dev = dev_get_drvdata(device); 2974 int num = attr->attr.name[5] - 0x30; 2975 unsigned int val; 2976 2977 if (sscanf(buf, "%u\n", &val) != 1) 2978 return -EINVAL; 2979 if (val > 3) 2980 return -EINVAL; 2981 ddb_lnb_init_fmode(dev, &dev->link[num], val); 2982 return count; 2983 } 2984 2985 static struct device_attribute ddb_attrs[] = { 2986 __ATTR_RO(version), 2987 __ATTR_RO(ports), 2988 __ATTR_RO(ts_irq), 2989 __ATTR_RO(i2c_irq), 2990 __ATTR(gap0, 0664, gap_show, gap_store), 2991 __ATTR(gap1, 0664, gap_show, gap_store), 2992 __ATTR(gap2, 0664, gap_show, gap_store), 2993 __ATTR(gap3, 0664, gap_show, gap_store), 2994 __ATTR(fmode0, 0664, fmode_show, fmode_store), 2995 __ATTR(fmode1, 0664, fmode_show, fmode_store), 2996 __ATTR(fmode2, 0664, fmode_show, fmode_store), 2997 __ATTR(fmode3, 0664, fmode_show, fmode_store), 2998 __ATTR_MRO(devid0, devid_show), 2999 __ATTR_MRO(devid1, devid_show), 3000 __ATTR_MRO(devid2, devid_show), 3001 __ATTR_MRO(devid3, devid_show), 3002 __ATTR_RO(hwid), 3003 __ATTR_RO(regmap), 3004 __ATTR(redirect, 0664, redirect_show, redirect_store), 3005 __ATTR_MRO(snr, bsnr_show), 3006 __ATTR_RO(bpsnr), 3007 __ATTR_NULL, 3008 }; 3009 3010 static struct device_attribute ddb_attrs_temp[] = { 3011 __ATTR_RO(temp), 3012 }; 3013 3014 static struct device_attribute ddb_attrs_fan[] = { 3015 __ATTR(fan, 0664, fan_show, fan_store), 3016 }; 3017 3018 static struct device_attribute ddb_attrs_snr[] = { 3019 __ATTR_MRO(snr0, snr_show), 3020 __ATTR_MRO(snr1, snr_show), 3021 __ATTR_MRO(snr2, snr_show), 3022 __ATTR_MRO(snr3, snr_show), 3023 }; 3024 3025 static struct device_attribute ddb_attrs_ctemp[] = { 3026 __ATTR_MRO(temp0, ctemp_show), 3027 __ATTR_MRO(temp1, ctemp_show), 3028 __ATTR_MRO(temp2, ctemp_show), 3029 __ATTR_MRO(temp3, ctemp_show), 3030 }; 3031 3032 static struct device_attribute ddb_attrs_led[] = { 3033 __ATTR(led0, 0664, led_show, led_store), 3034 __ATTR(led1, 0664, led_show, led_store), 3035 __ATTR(led2, 0664, led_show, led_store), 3036 __ATTR(led3, 0664, led_show, led_store), 3037 }; 3038 3039 static struct device_attribute ddb_attrs_fanspeed[] = { 3040 __ATTR_MRO(fanspeed0, fanspeed_show), 3041 __ATTR_MRO(fanspeed1, fanspeed_show), 3042 __ATTR_MRO(fanspeed2, fanspeed_show), 3043 __ATTR_MRO(fanspeed3, fanspeed_show), 3044 }; 3045 3046 static struct class ddb_class = { 3047 .name = "ddbridge", 3048 .owner = THIS_MODULE, 3049 .devnode = ddb_devnode, 3050 }; 3051 3052 int ddb_class_create(void) 3053 { 3054 ddb_major = register_chrdev(0, DDB_NAME, &ddb_fops); 3055 if (ddb_major < 0) 3056 return ddb_major; 3057 if (class_register(&ddb_class) < 0) 3058 return -1; 3059 return 0; 3060 } 3061 3062 void ddb_class_destroy(void) 3063 { 3064 class_unregister(&ddb_class); 3065 unregister_chrdev(ddb_major, DDB_NAME); 3066 } 3067 3068 static void ddb_device_attrs_del(struct ddb *dev) 3069 { 3070 int i; 3071 3072 for (i = 0; i < 4; i++) 3073 if (dev->link[i].info && dev->link[i].info->tempmon_irq) 3074 device_remove_file(dev->ddb_dev, 3075 &ddb_attrs_fanspeed[i]); 3076 for (i = 0; i < dev->link[0].info->temp_num; i++) 3077 device_remove_file(dev->ddb_dev, &ddb_attrs_temp[i]); 3078 for (i = 0; i < dev->link[0].info->fan_num; i++) 3079 device_remove_file(dev->ddb_dev, &ddb_attrs_fan[i]); 3080 for (i = 0; i < dev->i2c_num && i < 4; i++) { 3081 if (dev->link[0].info->led_num) 3082 device_remove_file(dev->ddb_dev, &ddb_attrs_led[i]); 3083 device_remove_file(dev->ddb_dev, &ddb_attrs_snr[i]); 3084 device_remove_file(dev->ddb_dev, &ddb_attrs_ctemp[i]); 3085 } 3086 for (i = 0; ddb_attrs[i].attr.name; i++) 3087 device_remove_file(dev->ddb_dev, &ddb_attrs[i]); 3088 } 3089 3090 static int ddb_device_attrs_add(struct ddb *dev) 3091 { 3092 int i; 3093 3094 for (i = 0; ddb_attrs[i].attr.name; i++) 3095 if (device_create_file(dev->ddb_dev, &ddb_attrs[i])) 3096 goto fail; 3097 for (i = 0; i < dev->link[0].info->temp_num; i++) 3098 if (device_create_file(dev->ddb_dev, &ddb_attrs_temp[i])) 3099 goto fail; 3100 for (i = 0; i < dev->link[0].info->fan_num; i++) 3101 if (device_create_file(dev->ddb_dev, &ddb_attrs_fan[i])) 3102 goto fail; 3103 for (i = 0; (i < dev->i2c_num) && (i < 4); i++) { 3104 if (device_create_file(dev->ddb_dev, &ddb_attrs_snr[i])) 3105 goto fail; 3106 if (device_create_file(dev->ddb_dev, &ddb_attrs_ctemp[i])) 3107 goto fail; 3108 if (dev->link[0].info->led_num) 3109 if (device_create_file(dev->ddb_dev, 3110 &ddb_attrs_led[i])) 3111 goto fail; 3112 } 3113 for (i = 0; i < 4; i++) 3114 if (dev->link[i].info && dev->link[i].info->tempmon_irq) 3115 if (device_create_file(dev->ddb_dev, 3116 &ddb_attrs_fanspeed[i])) 3117 goto fail; 3118 return 0; 3119 fail: 3120 return -1; 3121 } 3122 3123 int ddb_device_create(struct ddb *dev) 3124 { 3125 int res = 0; 3126 3127 if (ddb_num == DDB_MAX_ADAPTER) 3128 return -ENOMEM; 3129 mutex_lock(&ddb_mutex); 3130 dev->nr = ddb_num; 3131 ddbs[dev->nr] = dev; 3132 dev->ddb_dev = device_create(&ddb_class, dev->dev, 3133 MKDEV(ddb_major, dev->nr), 3134 dev, "ddbridge%d", dev->nr); 3135 if (IS_ERR(dev->ddb_dev)) { 3136 res = PTR_ERR(dev->ddb_dev); 3137 dev_info(dev->dev, "Could not create ddbridge%d\n", dev->nr); 3138 goto fail; 3139 } 3140 res = ddb_device_attrs_add(dev); 3141 if (res) { 3142 ddb_device_attrs_del(dev); 3143 device_destroy(&ddb_class, MKDEV(ddb_major, dev->nr)); 3144 ddbs[dev->nr] = NULL; 3145 dev->ddb_dev = ERR_PTR(-ENODEV); 3146 } else { 3147 ddb_num++; 3148 } 3149 fail: 3150 mutex_unlock(&ddb_mutex); 3151 return res; 3152 } 3153 3154 void ddb_device_destroy(struct ddb *dev) 3155 { 3156 if (IS_ERR(dev->ddb_dev)) 3157 return; 3158 ddb_device_attrs_del(dev); 3159 device_destroy(&ddb_class, MKDEV(ddb_major, dev->nr)); 3160 } 3161 3162 /****************************************************************************/ 3163 /****************************************************************************/ 3164 /****************************************************************************/ 3165 3166 static void tempmon_setfan(struct ddb_link *link) 3167 { 3168 u32 temp, temp2, pwm; 3169 3170 if ((ddblreadl(link, TEMPMON_CONTROL) & 3171 TEMPMON_CONTROL_OVERTEMP) != 0) { 3172 dev_info(link->dev->dev, "Over temperature condition\n"); 3173 link->overtemperature_error = 1; 3174 } 3175 temp = (ddblreadl(link, TEMPMON_SENSOR0) >> 8) & 0xFF; 3176 if (temp & 0x80) 3177 temp = 0; 3178 temp2 = (ddblreadl(link, TEMPMON_SENSOR1) >> 8) & 0xFF; 3179 if (temp2 & 0x80) 3180 temp2 = 0; 3181 if (temp2 > temp) 3182 temp = temp2; 3183 3184 pwm = (ddblreadl(link, TEMPMON_FANCONTROL) >> 8) & 0x0F; 3185 if (pwm > 10) 3186 pwm = 10; 3187 3188 if (temp >= link->temp_tab[pwm]) { 3189 while (pwm < 10 && temp >= link->temp_tab[pwm + 1]) 3190 pwm += 1; 3191 } else { 3192 while (pwm > 1 && temp < link->temp_tab[pwm - 2]) 3193 pwm -= 1; 3194 } 3195 ddblwritel(link, (pwm << 8), TEMPMON_FANCONTROL); 3196 } 3197 3198 static void temp_handler(unsigned long data) 3199 { 3200 struct ddb_link *link = (struct ddb_link *)data; 3201 3202 spin_lock(&link->temp_lock); 3203 tempmon_setfan(link); 3204 spin_unlock(&link->temp_lock); 3205 } 3206 3207 static int tempmon_init(struct ddb_link *link, int first_time) 3208 { 3209 struct ddb *dev = link->dev; 3210 int status = 0; 3211 u32 l = link->nr; 3212 3213 spin_lock_irq(&link->temp_lock); 3214 if (first_time) { 3215 static u8 temperature_table[11] = { 3216 30, 35, 40, 45, 50, 55, 60, 65, 70, 75, 80 }; 3217 3218 memcpy(link->temp_tab, temperature_table, 3219 sizeof(temperature_table)); 3220 } 3221 dev->handler[l][link->info->tempmon_irq] = temp_handler; 3222 dev->handler_data[l][link->info->tempmon_irq] = (unsigned long)link; 3223 ddblwritel(link, (TEMPMON_CONTROL_OVERTEMP | TEMPMON_CONTROL_AUTOSCAN | 3224 TEMPMON_CONTROL_INTENABLE), 3225 TEMPMON_CONTROL); 3226 ddblwritel(link, (3 << 8), TEMPMON_FANCONTROL); 3227 3228 link->overtemperature_error = 3229 ((ddblreadl(link, TEMPMON_CONTROL) & 3230 TEMPMON_CONTROL_OVERTEMP) != 0); 3231 if (link->overtemperature_error) { 3232 dev_info(link->dev->dev, "Over temperature condition\n"); 3233 status = -1; 3234 } 3235 tempmon_setfan(link); 3236 spin_unlock_irq(&link->temp_lock); 3237 return status; 3238 } 3239 3240 static int ddb_init_tempmon(struct ddb_link *link) 3241 { 3242 const struct ddb_info *info = link->info; 3243 3244 if (!info->tempmon_irq) 3245 return 0; 3246 if (info->type == DDB_OCTOPUS_MAX_CT) 3247 if (link->ids.regmapid < 0x00010002) 3248 return 0; 3249 spin_lock_init(&link->temp_lock); 3250 dev_dbg(link->dev->dev, "init_tempmon\n"); 3251 return tempmon_init(link, 1); 3252 } 3253 3254 /****************************************************************************/ 3255 /****************************************************************************/ 3256 /****************************************************************************/ 3257 3258 static int ddb_init_boards(struct ddb *dev) 3259 { 3260 const struct ddb_info *info; 3261 struct ddb_link *link; 3262 u32 l; 3263 3264 for (l = 0; l < DDB_MAX_LINK; l++) { 3265 link = &dev->link[l]; 3266 info = link->info; 3267 3268 if (!info) 3269 continue; 3270 if (info->board_control) { 3271 ddbwritel(dev, 0, DDB_LINK_TAG(l) | BOARD_CONTROL); 3272 msleep(100); 3273 ddbwritel(dev, info->board_control_2, 3274 DDB_LINK_TAG(l) | BOARD_CONTROL); 3275 usleep_range(2000, 3000); 3276 ddbwritel(dev, 3277 info->board_control_2 | info->board_control, 3278 DDB_LINK_TAG(l) | BOARD_CONTROL); 3279 usleep_range(2000, 3000); 3280 } 3281 ddb_init_tempmon(link); 3282 } 3283 return 0; 3284 } 3285 3286 int ddb_init(struct ddb *dev) 3287 { 3288 mutex_init(&dev->link[0].lnb.lock); 3289 mutex_init(&dev->link[0].flash_mutex); 3290 if (no_init) { 3291 ddb_device_create(dev); 3292 return 0; 3293 } 3294 3295 ddb_init_boards(dev); 3296 3297 if (ddb_i2c_init(dev) < 0) 3298 goto fail1; 3299 ddb_ports_init(dev); 3300 if (ddb_buffers_alloc(dev) < 0) { 3301 dev_info(dev->dev, "Could not allocate buffer memory\n"); 3302 goto fail2; 3303 } 3304 if (ddb_ports_attach(dev) < 0) 3305 goto fail3; 3306 3307 ddb_device_create(dev); 3308 3309 if (dev->link[0].info->fan_num) { 3310 ddbwritel(dev, 1, GPIO_DIRECTION); 3311 ddbwritel(dev, 1, GPIO_OUTPUT); 3312 } 3313 return 0; 3314 3315 fail3: 3316 dev_err(dev->dev, "fail3\n"); 3317 ddb_ports_detach(dev); 3318 ddb_buffers_free(dev); 3319 fail2: 3320 dev_err(dev->dev, "fail2\n"); 3321 ddb_ports_release(dev); 3322 ddb_i2c_release(dev); 3323 fail1: 3324 dev_err(dev->dev, "fail1\n"); 3325 return -1; 3326 } 3327 3328 void ddb_unmap(struct ddb *dev) 3329 { 3330 if (dev->regs) 3331 iounmap(dev->regs); 3332 vfree(dev); 3333 } 3334