1 /* 2 * ddbridge-core.c: Digital Devices bridge core functions 3 * 4 * Copyright (C) 2010-2017 Digital Devices GmbH 5 * Marcus Metzler <mocm@metzlerbros.de> 6 * Ralph Metzler <rjkm@metzlerbros.de> 7 * 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License 11 * version 2 only, as published by the Free Software Foundation. 12 * 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * To obtain the license, point your browser to 20 * http://www.gnu.org/copyleft/gpl.html 21 */ 22 23 #include <linux/module.h> 24 #include <linux/init.h> 25 #include <linux/interrupt.h> 26 #include <linux/delay.h> 27 #include <linux/slab.h> 28 #include <linux/poll.h> 29 #include <linux/io.h> 30 #include <linux/pci.h> 31 #include <linux/pci_ids.h> 32 #include <linux/timer.h> 33 #include <linux/i2c.h> 34 #include <linux/swab.h> 35 #include <linux/vmalloc.h> 36 37 #include "ddbridge.h" 38 #include "ddbridge-i2c.h" 39 #include "ddbridge-regs.h" 40 #include "ddbridge-max.h" 41 #include "ddbridge-ci.h" 42 #include "ddbridge-io.h" 43 44 #include "tda18271c2dd.h" 45 #include "stv6110x.h" 46 #include "stv090x.h" 47 #include "lnbh24.h" 48 #include "drxk.h" 49 #include "stv0367.h" 50 #include "stv0367_priv.h" 51 #include "cxd2841er.h" 52 #include "tda18212.h" 53 #include "stv0910.h" 54 #include "stv6111.h" 55 #include "lnbh25.h" 56 #include "cxd2099.h" 57 #include "dvb_dummy_fe.h" 58 59 /****************************************************************************/ 60 61 #define DDB_MAX_ADAPTER 64 62 63 /****************************************************************************/ 64 65 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr); 66 67 static int adapter_alloc; 68 module_param(adapter_alloc, int, 0444); 69 MODULE_PARM_DESC(adapter_alloc, 70 "0-one adapter per io, 1-one per tab with io, 2-one per tab, 3-one for all"); 71 72 static int ci_bitrate = 70000; 73 module_param(ci_bitrate, int, 0444); 74 MODULE_PARM_DESC(ci_bitrate, " Bitrate in KHz for output to CI."); 75 76 static int ts_loop = -1; 77 module_param(ts_loop, int, 0444); 78 MODULE_PARM_DESC(ts_loop, "TS in/out test loop on port ts_loop"); 79 80 static int xo2_speed = 2; 81 module_param(xo2_speed, int, 0444); 82 MODULE_PARM_DESC(xo2_speed, "default transfer speed for xo2 based duoflex, 0=55,1=75,2=90,3=104 MBit/s, default=2, use attribute to change for individual cards"); 83 84 #ifdef __arm__ 85 static int alt_dma = 1; 86 #else 87 static int alt_dma; 88 #endif 89 module_param(alt_dma, int, 0444); 90 MODULE_PARM_DESC(alt_dma, "use alternative DMA buffer handling"); 91 92 static int no_init; 93 module_param(no_init, int, 0444); 94 MODULE_PARM_DESC(no_init, "do not initialize most devices"); 95 96 static int stv0910_single; 97 module_param(stv0910_single, int, 0444); 98 MODULE_PARM_DESC(stv0910_single, "use stv0910 cards as single demods"); 99 100 static int dma_buf_num = 8; 101 module_param(dma_buf_num, int, 0444); 102 MODULE_PARM_DESC(dma_buf_num, "Number of DMA buffers, possible values: 8-32"); 103 104 static int dma_buf_size = 21; 105 module_param(dma_buf_size, int, 0444); 106 MODULE_PARM_DESC(dma_buf_size, 107 "DMA buffer size as multiple of 128*47, possible values: 1-43"); 108 109 static int dummy_tuner; 110 module_param(dummy_tuner, int, 0444); 111 MODULE_PARM_DESC(dummy_tuner, 112 "attach dummy tuner to port 0 on Octopus V3 or Octopus Mini cards"); 113 114 /****************************************************************************/ 115 116 static DEFINE_MUTEX(redirect_lock); 117 118 static struct workqueue_struct *ddb_wq; 119 120 static struct ddb *ddbs[DDB_MAX_ADAPTER]; 121 122 /****************************************************************************/ 123 /****************************************************************************/ 124 /****************************************************************************/ 125 126 struct ddb_irq *ddb_irq_set(struct ddb *dev, u32 link, u32 nr, 127 void (*handler)(void *), void *data) 128 { 129 struct ddb_irq *irq = &dev->link[link].irq[nr]; 130 131 irq->handler = handler; 132 irq->data = data; 133 return irq; 134 } 135 136 static void ddb_set_dma_table(struct ddb_io *io) 137 { 138 struct ddb *dev = io->port->dev; 139 struct ddb_dma *dma = io->dma; 140 u32 i; 141 u64 mem; 142 143 if (!dma) 144 return; 145 for (i = 0; i < dma->num; i++) { 146 mem = dma->pbuf[i]; 147 ddbwritel(dev, mem & 0xffffffff, dma->bufregs + i * 8); 148 ddbwritel(dev, mem >> 32, dma->bufregs + i * 8 + 4); 149 } 150 dma->bufval = ((dma->div & 0x0f) << 16) | 151 ((dma->num & 0x1f) << 11) | 152 ((dma->size >> 7) & 0x7ff); 153 } 154 155 static void ddb_set_dma_tables(struct ddb *dev) 156 { 157 u32 i; 158 159 for (i = 0; i < DDB_MAX_PORT; i++) { 160 if (dev->port[i].input[0]) 161 ddb_set_dma_table(dev->port[i].input[0]); 162 if (dev->port[i].input[1]) 163 ddb_set_dma_table(dev->port[i].input[1]); 164 if (dev->port[i].output) 165 ddb_set_dma_table(dev->port[i].output); 166 } 167 } 168 169 /****************************************************************************/ 170 /****************************************************************************/ 171 /****************************************************************************/ 172 173 static void ddb_redirect_dma(struct ddb *dev, 174 struct ddb_dma *sdma, 175 struct ddb_dma *ddma) 176 { 177 u32 i, base; 178 u64 mem; 179 180 sdma->bufval = ddma->bufval; 181 base = sdma->bufregs; 182 for (i = 0; i < ddma->num; i++) { 183 mem = ddma->pbuf[i]; 184 ddbwritel(dev, mem & 0xffffffff, base + i * 8); 185 ddbwritel(dev, mem >> 32, base + i * 8 + 4); 186 } 187 } 188 189 static int ddb_unredirect(struct ddb_port *port) 190 { 191 struct ddb_input *oredi, *iredi = NULL; 192 struct ddb_output *iredo = NULL; 193 194 /* dev_info(port->dev->dev, 195 * "unredirect %d.%d\n", port->dev->nr, port->nr); 196 */ 197 mutex_lock(&redirect_lock); 198 if (port->output->dma->running) { 199 mutex_unlock(&redirect_lock); 200 return -EBUSY; 201 } 202 oredi = port->output->redi; 203 if (!oredi) 204 goto done; 205 if (port->input[0]) { 206 iredi = port->input[0]->redi; 207 iredo = port->input[0]->redo; 208 209 if (iredo) { 210 iredo->port->output->redi = oredi; 211 if (iredo->port->input[0]) { 212 iredo->port->input[0]->redi = iredi; 213 ddb_redirect_dma(oredi->port->dev, 214 oredi->dma, iredo->dma); 215 } 216 port->input[0]->redo = NULL; 217 ddb_set_dma_table(port->input[0]); 218 } 219 oredi->redi = iredi; 220 port->input[0]->redi = NULL; 221 } 222 oredi->redo = NULL; 223 port->output->redi = NULL; 224 225 ddb_set_dma_table(oredi); 226 done: 227 mutex_unlock(&redirect_lock); 228 return 0; 229 } 230 231 static int ddb_redirect(u32 i, u32 p) 232 { 233 struct ddb *idev = ddbs[(i >> 4) & 0x3f]; 234 struct ddb_input *input, *input2; 235 struct ddb *pdev = ddbs[(p >> 4) & 0x3f]; 236 struct ddb_port *port; 237 238 if (!idev || !pdev) 239 return -EINVAL; 240 if (!idev->has_dma || !pdev->has_dma) 241 return -EINVAL; 242 243 port = &pdev->port[p & 0x0f]; 244 if (!port->output) 245 return -EINVAL; 246 if (ddb_unredirect(port)) 247 return -EBUSY; 248 249 if (i == 8) 250 return 0; 251 252 input = &idev->input[i & 7]; 253 if (!input) 254 return -EINVAL; 255 256 mutex_lock(&redirect_lock); 257 if (port->output->dma->running || input->dma->running) { 258 mutex_unlock(&redirect_lock); 259 return -EBUSY; 260 } 261 input2 = port->input[0]; 262 if (input2) { 263 if (input->redi) { 264 input2->redi = input->redi; 265 input->redi = NULL; 266 } else { 267 input2->redi = input; 268 } 269 } 270 input->redo = port->output; 271 port->output->redi = input; 272 273 ddb_redirect_dma(input->port->dev, input->dma, port->output->dma); 274 mutex_unlock(&redirect_lock); 275 return 0; 276 } 277 278 /****************************************************************************/ 279 /****************************************************************************/ 280 /****************************************************************************/ 281 282 static void dma_free(struct pci_dev *pdev, struct ddb_dma *dma, int dir) 283 { 284 int i; 285 286 if (!dma) 287 return; 288 for (i = 0; i < dma->num; i++) { 289 if (dma->vbuf[i]) { 290 if (alt_dma) { 291 dma_unmap_single(&pdev->dev, dma->pbuf[i], 292 dma->size, 293 dir ? DMA_TO_DEVICE : 294 DMA_FROM_DEVICE); 295 kfree(dma->vbuf[i]); 296 dma->vbuf[i] = NULL; 297 } else { 298 dma_free_coherent(&pdev->dev, dma->size, 299 dma->vbuf[i], dma->pbuf[i]); 300 } 301 302 dma->vbuf[i] = NULL; 303 } 304 } 305 } 306 307 static int dma_alloc(struct pci_dev *pdev, struct ddb_dma *dma, int dir) 308 { 309 int i; 310 311 if (!dma) 312 return 0; 313 for (i = 0; i < dma->num; i++) { 314 if (alt_dma) { 315 dma->vbuf[i] = kmalloc(dma->size, __GFP_RETRY_MAYFAIL); 316 if (!dma->vbuf[i]) 317 return -ENOMEM; 318 dma->pbuf[i] = dma_map_single(&pdev->dev, 319 dma->vbuf[i], 320 dma->size, 321 dir ? DMA_TO_DEVICE : 322 DMA_FROM_DEVICE); 323 if (dma_mapping_error(&pdev->dev, dma->pbuf[i])) { 324 kfree(dma->vbuf[i]); 325 dma->vbuf[i] = NULL; 326 return -ENOMEM; 327 } 328 } else { 329 dma->vbuf[i] = dma_alloc_coherent(&pdev->dev, 330 dma->size, 331 &dma->pbuf[i], 332 GFP_KERNEL); 333 if (!dma->vbuf[i]) 334 return -ENOMEM; 335 } 336 } 337 return 0; 338 } 339 340 int ddb_buffers_alloc(struct ddb *dev) 341 { 342 int i; 343 struct ddb_port *port; 344 345 for (i = 0; i < dev->port_num; i++) { 346 port = &dev->port[i]; 347 switch (port->class) { 348 case DDB_PORT_TUNER: 349 if (port->input[0]->dma) 350 if (dma_alloc(dev->pdev, port->input[0]->dma, 0) 351 < 0) 352 return -1; 353 if (port->input[1]->dma) 354 if (dma_alloc(dev->pdev, port->input[1]->dma, 0) 355 < 0) 356 return -1; 357 break; 358 case DDB_PORT_CI: 359 case DDB_PORT_LOOP: 360 if (port->input[0]->dma) 361 if (dma_alloc(dev->pdev, port->input[0]->dma, 0) 362 < 0) 363 return -1; 364 if (port->output->dma) 365 if (dma_alloc(dev->pdev, port->output->dma, 1) 366 < 0) 367 return -1; 368 break; 369 default: 370 break; 371 } 372 } 373 ddb_set_dma_tables(dev); 374 return 0; 375 } 376 377 void ddb_buffers_free(struct ddb *dev) 378 { 379 int i; 380 struct ddb_port *port; 381 382 for (i = 0; i < dev->port_num; i++) { 383 port = &dev->port[i]; 384 385 if (port->input[0] && port->input[0]->dma) 386 dma_free(dev->pdev, port->input[0]->dma, 0); 387 if (port->input[1] && port->input[1]->dma) 388 dma_free(dev->pdev, port->input[1]->dma, 0); 389 if (port->output && port->output->dma) 390 dma_free(dev->pdev, port->output->dma, 1); 391 } 392 } 393 394 static void calc_con(struct ddb_output *output, u32 *con, u32 *con2, u32 flags) 395 { 396 struct ddb *dev = output->port->dev; 397 u32 bitrate = output->port->obr, max_bitrate = 72000; 398 u32 gap = 4, nco = 0; 399 400 *con = 0x1c; 401 if (output->port->gap != 0xffffffff) { 402 flags |= 1; 403 gap = output->port->gap; 404 max_bitrate = 0; 405 } 406 if (dev->link[0].info->type == DDB_OCTOPUS_CI && output->port->nr > 1) { 407 *con = 0x10c; 408 if (dev->link[0].ids.regmapid >= 0x10003 && !(flags & 1)) { 409 if (!(flags & 2)) { 410 /* NCO */ 411 max_bitrate = 0; 412 gap = 0; 413 if (bitrate != 72000) { 414 if (bitrate >= 96000) { 415 *con |= 0x800; 416 } else { 417 *con |= 0x1000; 418 nco = (bitrate * 8192 + 71999) 419 / 72000; 420 } 421 } 422 } else { 423 /* Divider and gap */ 424 *con |= 0x1810; 425 if (bitrate <= 64000) { 426 max_bitrate = 64000; 427 nco = 8; 428 } else if (bitrate <= 72000) { 429 max_bitrate = 72000; 430 nco = 7; 431 } else { 432 max_bitrate = 96000; 433 nco = 5; 434 } 435 } 436 } else { 437 if (bitrate > 72000) { 438 *con |= 0x810; /* 96 MBit/s and gap */ 439 max_bitrate = 96000; 440 } 441 *con |= 0x10; /* enable gap */ 442 } 443 } 444 if (max_bitrate > 0) { 445 if (bitrate > max_bitrate) 446 bitrate = max_bitrate; 447 if (bitrate < 31000) 448 bitrate = 31000; 449 gap = ((max_bitrate - bitrate) * 94) / bitrate; 450 if (gap < 2) 451 *con &= ~0x10; /* Disable gap */ 452 else 453 gap -= 2; 454 if (gap > 127) 455 gap = 127; 456 } 457 458 *con2 = (nco << 16) | gap; 459 } 460 461 static void ddb_output_start(struct ddb_output *output) 462 { 463 struct ddb *dev = output->port->dev; 464 u32 con = 0x11c, con2 = 0; 465 466 spin_lock_irq(&output->dma->lock); 467 output->dma->cbuf = 0; 468 output->dma->coff = 0; 469 output->dma->stat = 0; 470 ddbwritel(dev, 0, DMA_BUFFER_CONTROL(output->dma)); 471 472 if (output->port->input[0]->port->class == DDB_PORT_LOOP) 473 con = (1UL << 13) | 0x14; 474 else 475 calc_con(output, &con, &con2, 0); 476 477 ddbwritel(dev, 0, TS_CONTROL(output)); 478 ddbwritel(dev, 2, TS_CONTROL(output)); 479 ddbwritel(dev, 0, TS_CONTROL(output)); 480 ddbwritel(dev, con, TS_CONTROL(output)); 481 ddbwritel(dev, con2, TS_CONTROL2(output)); 482 483 ddbwritel(dev, output->dma->bufval, 484 DMA_BUFFER_SIZE(output->dma)); 485 ddbwritel(dev, 0, DMA_BUFFER_ACK(output->dma)); 486 ddbwritel(dev, 1, DMA_BASE_READ); 487 ddbwritel(dev, 7, DMA_BUFFER_CONTROL(output->dma)); 488 489 ddbwritel(dev, con | 1, TS_CONTROL(output)); 490 491 output->dma->running = 1; 492 spin_unlock_irq(&output->dma->lock); 493 } 494 495 static void ddb_output_stop(struct ddb_output *output) 496 { 497 struct ddb *dev = output->port->dev; 498 499 spin_lock_irq(&output->dma->lock); 500 501 ddbwritel(dev, 0, TS_CONTROL(output)); 502 503 ddbwritel(dev, 0, DMA_BUFFER_CONTROL(output->dma)); 504 output->dma->running = 0; 505 spin_unlock_irq(&output->dma->lock); 506 } 507 508 static void ddb_input_stop(struct ddb_input *input) 509 { 510 struct ddb *dev = input->port->dev; 511 u32 tag = DDB_LINK_TAG(input->port->lnr); 512 513 spin_lock_irq(&input->dma->lock); 514 515 ddbwritel(dev, 0, tag | TS_CONTROL(input)); 516 517 ddbwritel(dev, 0, DMA_BUFFER_CONTROL(input->dma)); 518 input->dma->running = 0; 519 spin_unlock_irq(&input->dma->lock); 520 } 521 522 static void ddb_input_start(struct ddb_input *input) 523 { 524 struct ddb *dev = input->port->dev; 525 526 spin_lock_irq(&input->dma->lock); 527 input->dma->cbuf = 0; 528 input->dma->coff = 0; 529 input->dma->stat = 0; 530 ddbwritel(dev, 0, DMA_BUFFER_CONTROL(input->dma)); 531 532 ddbwritel(dev, 0, TS_CONTROL(input)); 533 ddbwritel(dev, 2, TS_CONTROL(input)); 534 ddbwritel(dev, 0, TS_CONTROL(input)); 535 536 ddbwritel(dev, input->dma->bufval, 537 DMA_BUFFER_SIZE(input->dma)); 538 ddbwritel(dev, 0, DMA_BUFFER_ACK(input->dma)); 539 ddbwritel(dev, 1, DMA_BASE_WRITE); 540 ddbwritel(dev, 3, DMA_BUFFER_CONTROL(input->dma)); 541 542 ddbwritel(dev, 0x09, TS_CONTROL(input)); 543 544 if (input->port->type == DDB_TUNER_DUMMY) 545 ddbwritel(dev, 0x000fff01, TS_CONTROL2(input)); 546 547 input->dma->running = 1; 548 spin_unlock_irq(&input->dma->lock); 549 } 550 551 static void ddb_input_start_all(struct ddb_input *input) 552 { 553 struct ddb_input *i = input; 554 struct ddb_output *o; 555 556 mutex_lock(&redirect_lock); 557 while (i && (o = i->redo)) { 558 ddb_output_start(o); 559 i = o->port->input[0]; 560 if (i) 561 ddb_input_start(i); 562 } 563 ddb_input_start(input); 564 mutex_unlock(&redirect_lock); 565 } 566 567 static void ddb_input_stop_all(struct ddb_input *input) 568 { 569 struct ddb_input *i = input; 570 struct ddb_output *o; 571 572 mutex_lock(&redirect_lock); 573 ddb_input_stop(input); 574 while (i && (o = i->redo)) { 575 ddb_output_stop(o); 576 i = o->port->input[0]; 577 if (i) 578 ddb_input_stop(i); 579 } 580 mutex_unlock(&redirect_lock); 581 } 582 583 static u32 ddb_output_free(struct ddb_output *output) 584 { 585 u32 idx, off, stat = output->dma->stat; 586 s32 diff; 587 588 idx = (stat >> 11) & 0x1f; 589 off = (stat & 0x7ff) << 7; 590 591 if (output->dma->cbuf != idx) { 592 if ((((output->dma->cbuf + 1) % output->dma->num) == idx) && 593 (output->dma->size - output->dma->coff <= (2 * 188))) 594 return 0; 595 return 188; 596 } 597 diff = off - output->dma->coff; 598 if (diff <= 0 || diff > (2 * 188)) 599 return 188; 600 return 0; 601 } 602 603 static ssize_t ddb_output_write(struct ddb_output *output, 604 const __user u8 *buf, size_t count) 605 { 606 struct ddb *dev = output->port->dev; 607 u32 idx, off, stat = output->dma->stat; 608 u32 left = count, len; 609 610 idx = (stat >> 11) & 0x1f; 611 off = (stat & 0x7ff) << 7; 612 613 while (left) { 614 len = output->dma->size - output->dma->coff; 615 if ((((output->dma->cbuf + 1) % output->dma->num) == idx) && 616 off == 0) { 617 if (len <= 188) 618 break; 619 len -= 188; 620 } 621 if (output->dma->cbuf == idx) { 622 if (off > output->dma->coff) { 623 len = off - output->dma->coff; 624 len -= (len % 188); 625 if (len <= 188) 626 break; 627 len -= 188; 628 } 629 } 630 if (len > left) 631 len = left; 632 if (copy_from_user(output->dma->vbuf[output->dma->cbuf] + 633 output->dma->coff, 634 buf, len)) 635 return -EIO; 636 if (alt_dma) 637 dma_sync_single_for_device( 638 dev->dev, 639 output->dma->pbuf[output->dma->cbuf], 640 output->dma->size, DMA_TO_DEVICE); 641 left -= len; 642 buf += len; 643 output->dma->coff += len; 644 if (output->dma->coff == output->dma->size) { 645 output->dma->coff = 0; 646 output->dma->cbuf = ((output->dma->cbuf + 1) % 647 output->dma->num); 648 } 649 ddbwritel(dev, 650 (output->dma->cbuf << 11) | 651 (output->dma->coff >> 7), 652 DMA_BUFFER_ACK(output->dma)); 653 } 654 return count - left; 655 } 656 657 static u32 ddb_input_avail(struct ddb_input *input) 658 { 659 struct ddb *dev = input->port->dev; 660 u32 idx, off, stat = input->dma->stat; 661 u32 ctrl = ddbreadl(dev, DMA_BUFFER_CONTROL(input->dma)); 662 663 idx = (stat >> 11) & 0x1f; 664 off = (stat & 0x7ff) << 7; 665 666 if (ctrl & 4) { 667 dev_err(dev->dev, "IA %d %d %08x\n", idx, off, ctrl); 668 ddbwritel(dev, stat, DMA_BUFFER_ACK(input->dma)); 669 return 0; 670 } 671 if (input->dma->cbuf != idx) 672 return 188; 673 return 0; 674 } 675 676 static ssize_t ddb_input_read(struct ddb_input *input, 677 __user u8 *buf, size_t count) 678 { 679 struct ddb *dev = input->port->dev; 680 u32 left = count; 681 u32 idx, free, stat = input->dma->stat; 682 int ret; 683 684 idx = (stat >> 11) & 0x1f; 685 686 while (left) { 687 if (input->dma->cbuf == idx) 688 return count - left; 689 free = input->dma->size - input->dma->coff; 690 if (free > left) 691 free = left; 692 if (alt_dma) 693 dma_sync_single_for_cpu( 694 dev->dev, 695 input->dma->pbuf[input->dma->cbuf], 696 input->dma->size, DMA_FROM_DEVICE); 697 ret = copy_to_user(buf, input->dma->vbuf[input->dma->cbuf] + 698 input->dma->coff, free); 699 if (ret) 700 return -EFAULT; 701 input->dma->coff += free; 702 if (input->dma->coff == input->dma->size) { 703 input->dma->coff = 0; 704 input->dma->cbuf = (input->dma->cbuf + 1) % 705 input->dma->num; 706 } 707 left -= free; 708 buf += free; 709 ddbwritel(dev, 710 (input->dma->cbuf << 11) | (input->dma->coff >> 7), 711 DMA_BUFFER_ACK(input->dma)); 712 } 713 return count; 714 } 715 716 /****************************************************************************/ 717 /****************************************************************************/ 718 719 static ssize_t ts_write(struct file *file, const __user char *buf, 720 size_t count, loff_t *ppos) 721 { 722 struct dvb_device *dvbdev = file->private_data; 723 struct ddb_output *output = dvbdev->priv; 724 struct ddb *dev = output->port->dev; 725 size_t left = count; 726 int stat; 727 728 if (!dev->has_dma) 729 return -EINVAL; 730 while (left) { 731 if (ddb_output_free(output) < 188) { 732 if (file->f_flags & O_NONBLOCK) 733 break; 734 if (wait_event_interruptible( 735 output->dma->wq, 736 ddb_output_free(output) >= 188) < 0) 737 break; 738 } 739 stat = ddb_output_write(output, buf, left); 740 if (stat < 0) 741 return stat; 742 buf += stat; 743 left -= stat; 744 } 745 return (left == count) ? -EAGAIN : (count - left); 746 } 747 748 static ssize_t ts_read(struct file *file, __user char *buf, 749 size_t count, loff_t *ppos) 750 { 751 struct dvb_device *dvbdev = file->private_data; 752 struct ddb_output *output = dvbdev->priv; 753 struct ddb_input *input = output->port->input[0]; 754 struct ddb *dev = output->port->dev; 755 size_t left = count; 756 int stat; 757 758 if (!dev->has_dma) 759 return -EINVAL; 760 while (left) { 761 if (ddb_input_avail(input) < 188) { 762 if (file->f_flags & O_NONBLOCK) 763 break; 764 if (wait_event_interruptible( 765 input->dma->wq, 766 ddb_input_avail(input) >= 188) < 0) 767 break; 768 } 769 stat = ddb_input_read(input, buf, left); 770 if (stat < 0) 771 return stat; 772 left -= stat; 773 buf += stat; 774 } 775 return (count && (left == count)) ? -EAGAIN : (count - left); 776 } 777 778 static __poll_t ts_poll(struct file *file, poll_table *wait) 779 { 780 struct dvb_device *dvbdev = file->private_data; 781 struct ddb_output *output = dvbdev->priv; 782 struct ddb_input *input = output->port->input[0]; 783 784 __poll_t mask = 0; 785 786 poll_wait(file, &input->dma->wq, wait); 787 poll_wait(file, &output->dma->wq, wait); 788 if (ddb_input_avail(input) >= 188) 789 mask |= EPOLLIN | EPOLLRDNORM; 790 if (ddb_output_free(output) >= 188) 791 mask |= EPOLLOUT | EPOLLWRNORM; 792 return mask; 793 } 794 795 static int ts_release(struct inode *inode, struct file *file) 796 { 797 struct dvb_device *dvbdev = file->private_data; 798 struct ddb_output *output = NULL; 799 struct ddb_input *input = NULL; 800 801 if (dvbdev) { 802 output = dvbdev->priv; 803 input = output->port->input[0]; 804 } 805 806 if ((file->f_flags & O_ACCMODE) == O_RDONLY) { 807 if (!input) 808 return -EINVAL; 809 ddb_input_stop(input); 810 } else if ((file->f_flags & O_ACCMODE) == O_WRONLY) { 811 if (!output) 812 return -EINVAL; 813 ddb_output_stop(output); 814 } 815 return dvb_generic_release(inode, file); 816 } 817 818 static int ts_open(struct inode *inode, struct file *file) 819 { 820 int err; 821 struct dvb_device *dvbdev = file->private_data; 822 struct ddb_output *output = NULL; 823 struct ddb_input *input = NULL; 824 825 if (dvbdev) { 826 output = dvbdev->priv; 827 input = output->port->input[0]; 828 } 829 830 if ((file->f_flags & O_ACCMODE) == O_RDONLY) { 831 if (!input) 832 return -EINVAL; 833 if (input->redo || input->redi) 834 return -EBUSY; 835 } else if ((file->f_flags & O_ACCMODE) == O_WRONLY) { 836 if (!output) 837 return -EINVAL; 838 } else { 839 return -EINVAL; 840 } 841 842 err = dvb_generic_open(inode, file); 843 if (err < 0) 844 return err; 845 if ((file->f_flags & O_ACCMODE) == O_RDONLY) 846 ddb_input_start(input); 847 else if ((file->f_flags & O_ACCMODE) == O_WRONLY) 848 ddb_output_start(output); 849 return err; 850 } 851 852 static const struct file_operations ci_fops = { 853 .owner = THIS_MODULE, 854 .read = ts_read, 855 .write = ts_write, 856 .open = ts_open, 857 .release = ts_release, 858 .poll = ts_poll, 859 .mmap = NULL, 860 }; 861 862 static struct dvb_device dvbdev_ci = { 863 .priv = NULL, 864 .readers = 1, 865 .writers = 1, 866 .users = 2, 867 .fops = &ci_fops, 868 }; 869 870 /****************************************************************************/ 871 /****************************************************************************/ 872 873 static int locked_gate_ctrl(struct dvb_frontend *fe, int enable) 874 { 875 struct ddb_input *input = fe->sec_priv; 876 struct ddb_port *port = input->port; 877 struct ddb_dvb *dvb = &port->dvb[input->nr & 1]; 878 int status; 879 880 if (enable) { 881 mutex_lock(&port->i2c_gate_lock); 882 status = dvb->i2c_gate_ctrl(fe, 1); 883 } else { 884 status = dvb->i2c_gate_ctrl(fe, 0); 885 mutex_unlock(&port->i2c_gate_lock); 886 } 887 return status; 888 } 889 890 static int demod_attach_drxk(struct ddb_input *input) 891 { 892 struct i2c_adapter *i2c = &input->port->i2c->adap; 893 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 894 struct device *dev = input->port->dev->dev; 895 struct drxk_config config; 896 897 memset(&config, 0, sizeof(config)); 898 config.adr = 0x29 + (input->nr & 1); 899 config.microcode_name = "drxk_a3.mc"; 900 901 dvb->fe = dvb_attach(drxk_attach, &config, i2c); 902 if (!dvb->fe) { 903 dev_err(dev, "No DRXK found!\n"); 904 return -ENODEV; 905 } 906 dvb->fe->sec_priv = input; 907 dvb->i2c_gate_ctrl = dvb->fe->ops.i2c_gate_ctrl; 908 dvb->fe->ops.i2c_gate_ctrl = locked_gate_ctrl; 909 return 0; 910 } 911 912 static int tuner_attach_tda18271(struct ddb_input *input) 913 { 914 struct i2c_adapter *i2c = &input->port->i2c->adap; 915 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 916 struct device *dev = input->port->dev->dev; 917 struct dvb_frontend *fe; 918 919 if (dvb->fe->ops.i2c_gate_ctrl) 920 dvb->fe->ops.i2c_gate_ctrl(dvb->fe, 1); 921 fe = dvb_attach(tda18271c2dd_attach, dvb->fe, i2c, 0x60); 922 if (dvb->fe->ops.i2c_gate_ctrl) 923 dvb->fe->ops.i2c_gate_ctrl(dvb->fe, 0); 924 if (!fe) { 925 dev_err(dev, "No TDA18271 found!\n"); 926 return -ENODEV; 927 } 928 return 0; 929 } 930 931 /******************************************************************************/ 932 /******************************************************************************/ 933 /******************************************************************************/ 934 935 static struct stv0367_config ddb_stv0367_config[] = { 936 { 937 .demod_address = 0x1f, 938 .xtal = 27000000, 939 .if_khz = 0, 940 .if_iq_mode = FE_TER_NORMAL_IF_TUNER, 941 .ts_mode = STV0367_SERIAL_PUNCT_CLOCK, 942 .clk_pol = STV0367_CLOCKPOLARITY_DEFAULT, 943 }, { 944 .demod_address = 0x1e, 945 .xtal = 27000000, 946 .if_khz = 0, 947 .if_iq_mode = FE_TER_NORMAL_IF_TUNER, 948 .ts_mode = STV0367_SERIAL_PUNCT_CLOCK, 949 .clk_pol = STV0367_CLOCKPOLARITY_DEFAULT, 950 }, 951 }; 952 953 static int demod_attach_stv0367(struct ddb_input *input) 954 { 955 struct i2c_adapter *i2c = &input->port->i2c->adap; 956 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 957 struct device *dev = input->port->dev->dev; 958 959 /* attach frontend */ 960 dvb->fe = dvb_attach(stv0367ddb_attach, 961 &ddb_stv0367_config[(input->nr & 1)], i2c); 962 963 if (!dvb->fe) { 964 dev_err(dev, "No stv0367 found!\n"); 965 return -ENODEV; 966 } 967 dvb->fe->sec_priv = input; 968 dvb->i2c_gate_ctrl = dvb->fe->ops.i2c_gate_ctrl; 969 dvb->fe->ops.i2c_gate_ctrl = locked_gate_ctrl; 970 return 0; 971 } 972 973 static int tuner_tda18212_ping(struct ddb_input *input, unsigned short adr) 974 { 975 struct i2c_adapter *adapter = &input->port->i2c->adap; 976 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 977 struct device *dev = input->port->dev->dev; 978 u8 tda_id[2]; 979 u8 subaddr = 0x00; 980 981 dev_dbg(dev, "stv0367-tda18212 tuner ping\n"); 982 if (dvb->fe->ops.i2c_gate_ctrl) 983 dvb->fe->ops.i2c_gate_ctrl(dvb->fe, 1); 984 985 if (i2c_read_regs(adapter, adr, subaddr, tda_id, sizeof(tda_id)) < 0) 986 dev_dbg(dev, "tda18212 ping 1 fail\n"); 987 if (i2c_read_regs(adapter, adr, subaddr, tda_id, sizeof(tda_id)) < 0) 988 dev_warn(dev, "tda18212 ping failed, expect problems\n"); 989 990 if (dvb->fe->ops.i2c_gate_ctrl) 991 dvb->fe->ops.i2c_gate_ctrl(dvb->fe, 0); 992 993 return 0; 994 } 995 996 static int demod_attach_cxd28xx(struct ddb_input *input, int par, int osc24) 997 { 998 struct i2c_adapter *i2c = &input->port->i2c->adap; 999 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 1000 struct device *dev = input->port->dev->dev; 1001 struct cxd2841er_config cfg; 1002 1003 /* the cxd2841er driver expects 8bit/shifted I2C addresses */ 1004 cfg.i2c_addr = ((input->nr & 1) ? 0x6d : 0x6c) << 1; 1005 1006 cfg.xtal = osc24 ? SONY_XTAL_24000 : SONY_XTAL_20500; 1007 cfg.flags = CXD2841ER_AUTO_IFHZ | CXD2841ER_EARLY_TUNE | 1008 CXD2841ER_NO_WAIT_LOCK | CXD2841ER_NO_AGCNEG | 1009 CXD2841ER_TSBITS; 1010 1011 if (!par) 1012 cfg.flags |= CXD2841ER_TS_SERIAL; 1013 1014 /* attach frontend */ 1015 dvb->fe = dvb_attach(cxd2841er_attach_t_c, &cfg, i2c); 1016 1017 if (!dvb->fe) { 1018 dev_err(dev, "No cxd2837/38/43/54 found!\n"); 1019 return -ENODEV; 1020 } 1021 dvb->fe->sec_priv = input; 1022 dvb->i2c_gate_ctrl = dvb->fe->ops.i2c_gate_ctrl; 1023 dvb->fe->ops.i2c_gate_ctrl = locked_gate_ctrl; 1024 return 0; 1025 } 1026 1027 static int tuner_attach_tda18212(struct ddb_input *input, u32 porttype) 1028 { 1029 struct i2c_adapter *adapter = &input->port->i2c->adap; 1030 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 1031 struct device *dev = input->port->dev->dev; 1032 struct i2c_client *client; 1033 struct tda18212_config config = { 1034 .fe = dvb->fe, 1035 .if_dvbt_6 = 3550, 1036 .if_dvbt_7 = 3700, 1037 .if_dvbt_8 = 4150, 1038 .if_dvbt2_6 = 3250, 1039 .if_dvbt2_7 = 4000, 1040 .if_dvbt2_8 = 4000, 1041 .if_dvbc = 5000, 1042 }; 1043 u8 addr = (input->nr & 1) ? 0x63 : 0x60; 1044 1045 /* due to a hardware quirk with the I2C gate on the stv0367+tda18212 1046 * combo, the tda18212 must be probed by reading it's id _twice_ when 1047 * cold started, or it very likely will fail. 1048 */ 1049 if (porttype == DDB_TUNER_DVBCT_ST) 1050 tuner_tda18212_ping(input, addr); 1051 1052 /* perform tuner probe/init/attach */ 1053 client = dvb_module_probe("tda18212", NULL, adapter, addr, &config); 1054 if (!client) 1055 goto err; 1056 1057 dvb->i2c_client[0] = client; 1058 return 0; 1059 err: 1060 dev_err(dev, "TDA18212 tuner not found. Device is not fully operational.\n"); 1061 return -ENODEV; 1062 } 1063 1064 /****************************************************************************/ 1065 /****************************************************************************/ 1066 /****************************************************************************/ 1067 1068 static struct stv090x_config stv0900 = { 1069 .device = STV0900, 1070 .demod_mode = STV090x_DUAL, 1071 .clk_mode = STV090x_CLK_EXT, 1072 1073 .xtal = 27000000, 1074 .address = 0x69, 1075 1076 .ts1_mode = STV090x_TSMODE_SERIAL_PUNCTURED, 1077 .ts2_mode = STV090x_TSMODE_SERIAL_PUNCTURED, 1078 1079 .ts1_tei = 1, 1080 .ts2_tei = 1, 1081 1082 .repeater_level = STV090x_RPTLEVEL_16, 1083 1084 .adc1_range = STV090x_ADC_1Vpp, 1085 .adc2_range = STV090x_ADC_1Vpp, 1086 1087 .diseqc_envelope_mode = true, 1088 }; 1089 1090 static struct stv090x_config stv0900_aa = { 1091 .device = STV0900, 1092 .demod_mode = STV090x_DUAL, 1093 .clk_mode = STV090x_CLK_EXT, 1094 1095 .xtal = 27000000, 1096 .address = 0x68, 1097 1098 .ts1_mode = STV090x_TSMODE_SERIAL_PUNCTURED, 1099 .ts2_mode = STV090x_TSMODE_SERIAL_PUNCTURED, 1100 1101 .ts1_tei = 1, 1102 .ts2_tei = 1, 1103 1104 .repeater_level = STV090x_RPTLEVEL_16, 1105 1106 .adc1_range = STV090x_ADC_1Vpp, 1107 .adc2_range = STV090x_ADC_1Vpp, 1108 1109 .diseqc_envelope_mode = true, 1110 }; 1111 1112 static struct stv6110x_config stv6110a = { 1113 .addr = 0x60, 1114 .refclk = 27000000, 1115 .clk_div = 1, 1116 }; 1117 1118 static struct stv6110x_config stv6110b = { 1119 .addr = 0x63, 1120 .refclk = 27000000, 1121 .clk_div = 1, 1122 }; 1123 1124 static int demod_attach_stv0900(struct ddb_input *input, int type) 1125 { 1126 struct i2c_adapter *i2c = &input->port->i2c->adap; 1127 struct stv090x_config *feconf = type ? &stv0900_aa : &stv0900; 1128 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 1129 struct device *dev = input->port->dev->dev; 1130 1131 dvb->fe = dvb_attach(stv090x_attach, feconf, i2c, 1132 (input->nr & 1) ? STV090x_DEMODULATOR_1 1133 : STV090x_DEMODULATOR_0); 1134 if (!dvb->fe) { 1135 dev_err(dev, "No STV0900 found!\n"); 1136 return -ENODEV; 1137 } 1138 if (!dvb_attach(lnbh24_attach, dvb->fe, i2c, 0, 1139 0, (input->nr & 1) ? 1140 (0x09 - type) : (0x0b - type))) { 1141 dev_err(dev, "No LNBH24 found!\n"); 1142 dvb_frontend_detach(dvb->fe); 1143 return -ENODEV; 1144 } 1145 return 0; 1146 } 1147 1148 static int tuner_attach_stv6110(struct ddb_input *input, int type) 1149 { 1150 struct i2c_adapter *i2c = &input->port->i2c->adap; 1151 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 1152 struct device *dev = input->port->dev->dev; 1153 struct stv090x_config *feconf = type ? &stv0900_aa : &stv0900; 1154 struct stv6110x_config *tunerconf = (input->nr & 1) ? 1155 &stv6110b : &stv6110a; 1156 const struct stv6110x_devctl *ctl; 1157 1158 ctl = dvb_attach(stv6110x_attach, dvb->fe, tunerconf, i2c); 1159 if (!ctl) { 1160 dev_err(dev, "No STV6110X found!\n"); 1161 return -ENODEV; 1162 } 1163 dev_info(dev, "attach tuner input %d adr %02x\n", 1164 input->nr, tunerconf->addr); 1165 1166 feconf->tuner_init = ctl->tuner_init; 1167 feconf->tuner_sleep = ctl->tuner_sleep; 1168 feconf->tuner_set_mode = ctl->tuner_set_mode; 1169 feconf->tuner_set_frequency = ctl->tuner_set_frequency; 1170 feconf->tuner_get_frequency = ctl->tuner_get_frequency; 1171 feconf->tuner_set_bandwidth = ctl->tuner_set_bandwidth; 1172 feconf->tuner_get_bandwidth = ctl->tuner_get_bandwidth; 1173 feconf->tuner_set_bbgain = ctl->tuner_set_bbgain; 1174 feconf->tuner_get_bbgain = ctl->tuner_get_bbgain; 1175 feconf->tuner_set_refclk = ctl->tuner_set_refclk; 1176 feconf->tuner_get_status = ctl->tuner_get_status; 1177 1178 return 0; 1179 } 1180 1181 static const struct stv0910_cfg stv0910_p = { 1182 .adr = 0x68, 1183 .parallel = 1, 1184 .rptlvl = 4, 1185 .clk = 30000000, 1186 }; 1187 1188 static const struct lnbh25_config lnbh25_cfg = { 1189 .i2c_address = 0x0c << 1, 1190 .data2_config = LNBH25_TEN 1191 }; 1192 1193 static int demod_attach_stv0910(struct ddb_input *input, int type) 1194 { 1195 struct i2c_adapter *i2c = &input->port->i2c->adap; 1196 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 1197 struct device *dev = input->port->dev->dev; 1198 struct stv0910_cfg cfg = stv0910_p; 1199 struct lnbh25_config lnbcfg = lnbh25_cfg; 1200 1201 if (stv0910_single) 1202 cfg.single = 1; 1203 1204 if (type) 1205 cfg.parallel = 2; 1206 dvb->fe = dvb_attach(stv0910_attach, i2c, &cfg, (input->nr & 1)); 1207 if (!dvb->fe) { 1208 cfg.adr = 0x6c; 1209 dvb->fe = dvb_attach(stv0910_attach, i2c, 1210 &cfg, (input->nr & 1)); 1211 } 1212 if (!dvb->fe) { 1213 dev_err(dev, "No STV0910 found!\n"); 1214 return -ENODEV; 1215 } 1216 1217 /* attach lnbh25 - leftshift by one as the lnbh25 driver expects 8bit 1218 * i2c addresses 1219 */ 1220 lnbcfg.i2c_address = (((input->nr & 1) ? 0x0d : 0x0c) << 1); 1221 if (!dvb_attach(lnbh25_attach, dvb->fe, &lnbcfg, i2c)) { 1222 lnbcfg.i2c_address = (((input->nr & 1) ? 0x09 : 0x08) << 1); 1223 if (!dvb_attach(lnbh25_attach, dvb->fe, &lnbcfg, i2c)) { 1224 dev_err(dev, "No LNBH25 found!\n"); 1225 dvb_frontend_detach(dvb->fe); 1226 return -ENODEV; 1227 } 1228 } 1229 1230 return 0; 1231 } 1232 1233 static int tuner_attach_stv6111(struct ddb_input *input, int type) 1234 { 1235 struct i2c_adapter *i2c = &input->port->i2c->adap; 1236 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 1237 struct device *dev = input->port->dev->dev; 1238 struct dvb_frontend *fe; 1239 u8 adr = (type ? 0 : 4) + ((input->nr & 1) ? 0x63 : 0x60); 1240 1241 fe = dvb_attach(stv6111_attach, dvb->fe, i2c, adr); 1242 if (!fe) { 1243 fe = dvb_attach(stv6111_attach, dvb->fe, i2c, adr & ~4); 1244 if (!fe) { 1245 dev_err(dev, "No STV6111 found at 0x%02x!\n", adr); 1246 return -ENODEV; 1247 } 1248 } 1249 return 0; 1250 } 1251 1252 static int demod_attach_dummy(struct ddb_input *input) 1253 { 1254 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 1255 struct device *dev = input->port->dev->dev; 1256 1257 dvb->fe = dvb_attach(dvb_dummy_fe_qam_attach); 1258 if (!dvb->fe) { 1259 dev_err(dev, "QAM dummy attach failed!\n"); 1260 return -ENODEV; 1261 } 1262 1263 return 0; 1264 } 1265 1266 static int start_feed(struct dvb_demux_feed *dvbdmxfeed) 1267 { 1268 struct dvb_demux *dvbdmx = dvbdmxfeed->demux; 1269 struct ddb_input *input = dvbdmx->priv; 1270 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 1271 1272 if (!dvb->users) 1273 ddb_input_start_all(input); 1274 1275 return ++dvb->users; 1276 } 1277 1278 static int stop_feed(struct dvb_demux_feed *dvbdmxfeed) 1279 { 1280 struct dvb_demux *dvbdmx = dvbdmxfeed->demux; 1281 struct ddb_input *input = dvbdmx->priv; 1282 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 1283 1284 if (--dvb->users) 1285 return dvb->users; 1286 1287 ddb_input_stop_all(input); 1288 return 0; 1289 } 1290 1291 static void dvb_input_detach(struct ddb_input *input) 1292 { 1293 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 1294 struct dvb_demux *dvbdemux = &dvb->demux; 1295 1296 switch (dvb->attached) { 1297 case 0x31: 1298 if (dvb->fe2) 1299 dvb_unregister_frontend(dvb->fe2); 1300 if (dvb->fe) 1301 dvb_unregister_frontend(dvb->fe); 1302 /* fallthrough */ 1303 case 0x30: 1304 dvb_module_release(dvb->i2c_client[0]); 1305 dvb->i2c_client[0] = NULL; 1306 1307 if (dvb->fe2) 1308 dvb_frontend_detach(dvb->fe2); 1309 if (dvb->fe) 1310 dvb_frontend_detach(dvb->fe); 1311 dvb->fe = NULL; 1312 dvb->fe2 = NULL; 1313 /* fallthrough */ 1314 case 0x20: 1315 dvb_net_release(&dvb->dvbnet); 1316 /* fallthrough */ 1317 case 0x12: 1318 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, 1319 &dvb->hw_frontend); 1320 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, 1321 &dvb->mem_frontend); 1322 /* fallthrough */ 1323 case 0x11: 1324 dvb_dmxdev_release(&dvb->dmxdev); 1325 /* fallthrough */ 1326 case 0x10: 1327 dvb_dmx_release(&dvb->demux); 1328 /* fallthrough */ 1329 case 0x01: 1330 break; 1331 } 1332 dvb->attached = 0x00; 1333 } 1334 1335 static int dvb_register_adapters(struct ddb *dev) 1336 { 1337 int i, ret = 0; 1338 struct ddb_port *port; 1339 struct dvb_adapter *adap; 1340 1341 if (adapter_alloc == 3) { 1342 port = &dev->port[0]; 1343 adap = port->dvb[0].adap; 1344 ret = dvb_register_adapter(adap, "DDBridge", THIS_MODULE, 1345 port->dev->dev, 1346 adapter_nr); 1347 if (ret < 0) 1348 return ret; 1349 port->dvb[0].adap_registered = 1; 1350 for (i = 0; i < dev->port_num; i++) { 1351 port = &dev->port[i]; 1352 port->dvb[0].adap = adap; 1353 port->dvb[1].adap = adap; 1354 } 1355 return 0; 1356 } 1357 1358 for (i = 0; i < dev->port_num; i++) { 1359 port = &dev->port[i]; 1360 switch (port->class) { 1361 case DDB_PORT_TUNER: 1362 adap = port->dvb[0].adap; 1363 ret = dvb_register_adapter(adap, "DDBridge", 1364 THIS_MODULE, 1365 port->dev->dev, 1366 adapter_nr); 1367 if (ret < 0) 1368 return ret; 1369 port->dvb[0].adap_registered = 1; 1370 1371 if (adapter_alloc > 0) { 1372 port->dvb[1].adap = port->dvb[0].adap; 1373 break; 1374 } 1375 adap = port->dvb[1].adap; 1376 ret = dvb_register_adapter(adap, "DDBridge", 1377 THIS_MODULE, 1378 port->dev->dev, 1379 adapter_nr); 1380 if (ret < 0) 1381 return ret; 1382 port->dvb[1].adap_registered = 1; 1383 break; 1384 1385 case DDB_PORT_CI: 1386 case DDB_PORT_LOOP: 1387 adap = port->dvb[0].adap; 1388 ret = dvb_register_adapter(adap, "DDBridge", 1389 THIS_MODULE, 1390 port->dev->dev, 1391 adapter_nr); 1392 if (ret < 0) 1393 return ret; 1394 port->dvb[0].adap_registered = 1; 1395 break; 1396 default: 1397 if (adapter_alloc < 2) 1398 break; 1399 adap = port->dvb[0].adap; 1400 ret = dvb_register_adapter(adap, "DDBridge", 1401 THIS_MODULE, 1402 port->dev->dev, 1403 adapter_nr); 1404 if (ret < 0) 1405 return ret; 1406 port->dvb[0].adap_registered = 1; 1407 break; 1408 } 1409 } 1410 return ret; 1411 } 1412 1413 static void dvb_unregister_adapters(struct ddb *dev) 1414 { 1415 int i; 1416 struct ddb_port *port; 1417 struct ddb_dvb *dvb; 1418 1419 for (i = 0; i < dev->link[0].info->port_num; i++) { 1420 port = &dev->port[i]; 1421 1422 dvb = &port->dvb[0]; 1423 if (dvb->adap_registered) 1424 dvb_unregister_adapter(dvb->adap); 1425 dvb->adap_registered = 0; 1426 1427 dvb = &port->dvb[1]; 1428 if (dvb->adap_registered) 1429 dvb_unregister_adapter(dvb->adap); 1430 dvb->adap_registered = 0; 1431 } 1432 } 1433 1434 static int dvb_input_attach(struct ddb_input *input) 1435 { 1436 int ret = 0; 1437 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 1438 struct ddb_port *port = input->port; 1439 struct dvb_adapter *adap = dvb->adap; 1440 struct dvb_demux *dvbdemux = &dvb->demux; 1441 int par = 0, osc24 = 0; 1442 1443 dvb->attached = 0x01; 1444 1445 dvbdemux->priv = input; 1446 dvbdemux->dmx.capabilities = DMX_TS_FILTERING | 1447 DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING; 1448 dvbdemux->start_feed = start_feed; 1449 dvbdemux->stop_feed = stop_feed; 1450 dvbdemux->filternum = 256; 1451 dvbdemux->feednum = 256; 1452 ret = dvb_dmx_init(dvbdemux); 1453 if (ret < 0) 1454 return ret; 1455 dvb->attached = 0x10; 1456 1457 dvb->dmxdev.filternum = 256; 1458 dvb->dmxdev.demux = &dvbdemux->dmx; 1459 ret = dvb_dmxdev_init(&dvb->dmxdev, adap); 1460 if (ret < 0) 1461 goto err_detach; 1462 dvb->attached = 0x11; 1463 1464 dvb->mem_frontend.source = DMX_MEMORY_FE; 1465 dvb->demux.dmx.add_frontend(&dvb->demux.dmx, &dvb->mem_frontend); 1466 dvb->hw_frontend.source = DMX_FRONTEND_0; 1467 dvb->demux.dmx.add_frontend(&dvb->demux.dmx, &dvb->hw_frontend); 1468 ret = dvbdemux->dmx.connect_frontend(&dvbdemux->dmx, &dvb->hw_frontend); 1469 if (ret < 0) 1470 goto err_detach; 1471 dvb->attached = 0x12; 1472 1473 ret = dvb_net_init(adap, &dvb->dvbnet, dvb->dmxdev.demux); 1474 if (ret < 0) 1475 goto err_detach; 1476 dvb->attached = 0x20; 1477 1478 dvb->fe = NULL; 1479 dvb->fe2 = NULL; 1480 switch (port->type) { 1481 case DDB_TUNER_MXL5XX: 1482 if (ddb_fe_attach_mxl5xx(input) < 0) 1483 goto err_detach; 1484 break; 1485 case DDB_TUNER_DVBS_ST: 1486 if (demod_attach_stv0900(input, 0) < 0) 1487 goto err_detach; 1488 if (tuner_attach_stv6110(input, 0) < 0) 1489 goto err_tuner; 1490 break; 1491 case DDB_TUNER_DVBS_ST_AA: 1492 if (demod_attach_stv0900(input, 1) < 0) 1493 goto err_detach; 1494 if (tuner_attach_stv6110(input, 1) < 0) 1495 goto err_tuner; 1496 break; 1497 case DDB_TUNER_DVBS_STV0910: 1498 if (demod_attach_stv0910(input, 0) < 0) 1499 goto err_detach; 1500 if (tuner_attach_stv6111(input, 0) < 0) 1501 goto err_tuner; 1502 break; 1503 case DDB_TUNER_DVBS_STV0910_PR: 1504 if (demod_attach_stv0910(input, 1) < 0) 1505 goto err_detach; 1506 if (tuner_attach_stv6111(input, 1) < 0) 1507 goto err_tuner; 1508 break; 1509 case DDB_TUNER_DVBS_STV0910_P: 1510 if (demod_attach_stv0910(input, 0) < 0) 1511 goto err_detach; 1512 if (tuner_attach_stv6111(input, 1) < 0) 1513 goto err_tuner; 1514 break; 1515 case DDB_TUNER_DVBCT_TR: 1516 if (demod_attach_drxk(input) < 0) 1517 goto err_detach; 1518 if (tuner_attach_tda18271(input) < 0) 1519 goto err_tuner; 1520 break; 1521 case DDB_TUNER_DVBCT_ST: 1522 if (demod_attach_stv0367(input) < 0) 1523 goto err_detach; 1524 if (tuner_attach_tda18212(input, port->type) < 0) 1525 goto err_tuner; 1526 break; 1527 case DDB_TUNER_DVBC2T2I_SONY_P: 1528 if (input->port->dev->link[input->port->lnr].info->ts_quirks & 1529 TS_QUIRK_ALT_OSC) 1530 osc24 = 0; 1531 else 1532 osc24 = 1; 1533 /* fall-through */ 1534 case DDB_TUNER_DVBCT2_SONY_P: 1535 case DDB_TUNER_DVBC2T2_SONY_P: 1536 case DDB_TUNER_ISDBT_SONY_P: 1537 if (input->port->dev->link[input->port->lnr].info->ts_quirks 1538 & TS_QUIRK_SERIAL) 1539 par = 0; 1540 else 1541 par = 1; 1542 if (demod_attach_cxd28xx(input, par, osc24) < 0) 1543 goto err_detach; 1544 if (tuner_attach_tda18212(input, port->type) < 0) 1545 goto err_tuner; 1546 break; 1547 case DDB_TUNER_DVBC2T2I_SONY: 1548 osc24 = 1; 1549 /* fall-through */ 1550 case DDB_TUNER_DVBCT2_SONY: 1551 case DDB_TUNER_DVBC2T2_SONY: 1552 case DDB_TUNER_ISDBT_SONY: 1553 if (demod_attach_cxd28xx(input, 0, osc24) < 0) 1554 goto err_detach; 1555 if (tuner_attach_tda18212(input, port->type) < 0) 1556 goto err_tuner; 1557 break; 1558 case DDB_TUNER_DUMMY: 1559 if (demod_attach_dummy(input) < 0) 1560 goto err_detach; 1561 break; 1562 case DDB_TUNER_MCI: 1563 if (ddb_fe_attach_mci(input) < 0) 1564 goto err_detach; 1565 break; 1566 default: 1567 return 0; 1568 } 1569 dvb->attached = 0x30; 1570 1571 if (dvb->fe) { 1572 if (dvb_register_frontend(adap, dvb->fe) < 0) 1573 goto err_detach; 1574 1575 if (dvb->fe2) { 1576 if (dvb_register_frontend(adap, dvb->fe2) < 0) { 1577 dvb_unregister_frontend(dvb->fe); 1578 goto err_detach; 1579 } 1580 dvb->fe2->tuner_priv = dvb->fe->tuner_priv; 1581 memcpy(&dvb->fe2->ops.tuner_ops, 1582 &dvb->fe->ops.tuner_ops, 1583 sizeof(struct dvb_tuner_ops)); 1584 } 1585 } 1586 1587 dvb->attached = 0x31; 1588 return 0; 1589 1590 err_tuner: 1591 dev_err(port->dev->dev, "tuner attach failed!\n"); 1592 1593 if (dvb->fe2) 1594 dvb_frontend_detach(dvb->fe2); 1595 if (dvb->fe) 1596 dvb_frontend_detach(dvb->fe); 1597 err_detach: 1598 dvb_input_detach(input); 1599 1600 /* return error from ret if set */ 1601 if (ret < 0) 1602 return ret; 1603 1604 return -ENODEV; 1605 } 1606 1607 static int port_has_encti(struct ddb_port *port) 1608 { 1609 struct device *dev = port->dev->dev; 1610 u8 val; 1611 int ret = i2c_read_reg(&port->i2c->adap, 0x20, 0, &val); 1612 1613 if (!ret) 1614 dev_info(dev, "[0x20]=0x%02x\n", val); 1615 return ret ? 0 : 1; 1616 } 1617 1618 static int port_has_cxd(struct ddb_port *port, u8 *type) 1619 { 1620 u8 val; 1621 u8 probe[4] = { 0xe0, 0x00, 0x00, 0x00 }, data[4]; 1622 struct i2c_msg msgs[2] = {{ .addr = 0x40, .flags = 0, 1623 .buf = probe, .len = 4 }, 1624 { .addr = 0x40, .flags = I2C_M_RD, 1625 .buf = data, .len = 4 } }; 1626 val = i2c_transfer(&port->i2c->adap, msgs, 2); 1627 if (val != 2) 1628 return 0; 1629 1630 if (data[0] == 0x02 && data[1] == 0x2b && data[3] == 0x43) 1631 *type = 2; 1632 else 1633 *type = 1; 1634 return 1; 1635 } 1636 1637 static int port_has_xo2(struct ddb_port *port, u8 *type, u8 *id) 1638 { 1639 u8 probe[1] = { 0x00 }, data[4]; 1640 1641 if (i2c_io(&port->i2c->adap, 0x10, probe, 1, data, 4)) 1642 return 0; 1643 if (data[0] == 'D' && data[1] == 'F') { 1644 *id = data[2]; 1645 *type = 1; 1646 return 1; 1647 } 1648 if (data[0] == 'C' && data[1] == 'I') { 1649 *id = data[2]; 1650 *type = 2; 1651 return 1; 1652 } 1653 return 0; 1654 } 1655 1656 static int port_has_stv0900(struct ddb_port *port) 1657 { 1658 u8 val; 1659 1660 if (i2c_read_reg16(&port->i2c->adap, 0x69, 0xf100, &val) < 0) 1661 return 0; 1662 return 1; 1663 } 1664 1665 static int port_has_stv0900_aa(struct ddb_port *port, u8 *id) 1666 { 1667 if (i2c_read_reg16(&port->i2c->adap, 0x68, 0xf100, id) < 0) 1668 return 0; 1669 return 1; 1670 } 1671 1672 static int port_has_drxks(struct ddb_port *port) 1673 { 1674 u8 val; 1675 1676 if (i2c_read(&port->i2c->adap, 0x29, &val) < 0) 1677 return 0; 1678 if (i2c_read(&port->i2c->adap, 0x2a, &val) < 0) 1679 return 0; 1680 return 1; 1681 } 1682 1683 static int port_has_stv0367(struct ddb_port *port) 1684 { 1685 u8 val; 1686 1687 if (i2c_read_reg16(&port->i2c->adap, 0x1e, 0xf000, &val) < 0) 1688 return 0; 1689 if (val != 0x60) 1690 return 0; 1691 if (i2c_read_reg16(&port->i2c->adap, 0x1f, 0xf000, &val) < 0) 1692 return 0; 1693 if (val != 0x60) 1694 return 0; 1695 return 1; 1696 } 1697 1698 static int init_xo2(struct ddb_port *port) 1699 { 1700 struct i2c_adapter *i2c = &port->i2c->adap; 1701 struct ddb *dev = port->dev; 1702 u8 val, data[2]; 1703 int res; 1704 1705 res = i2c_read_regs(i2c, 0x10, 0x04, data, 2); 1706 if (res < 0) 1707 return res; 1708 1709 if (data[0] != 0x01) { 1710 dev_info(dev->dev, "Port %d: invalid XO2\n", port->nr); 1711 return -1; 1712 } 1713 1714 i2c_read_reg(i2c, 0x10, 0x08, &val); 1715 if (val != 0) { 1716 i2c_write_reg(i2c, 0x10, 0x08, 0x00); 1717 msleep(100); 1718 } 1719 /* Enable tuner power, disable pll, reset demods */ 1720 i2c_write_reg(i2c, 0x10, 0x08, 0x04); 1721 usleep_range(2000, 3000); 1722 /* Release demod resets */ 1723 i2c_write_reg(i2c, 0x10, 0x08, 0x07); 1724 1725 /* speed: 0=55,1=75,2=90,3=104 MBit/s */ 1726 i2c_write_reg(i2c, 0x10, 0x09, xo2_speed); 1727 1728 if (dev->link[port->lnr].info->con_clock) { 1729 dev_info(dev->dev, "Setting continuous clock for XO2\n"); 1730 i2c_write_reg(i2c, 0x10, 0x0a, 0x03); 1731 i2c_write_reg(i2c, 0x10, 0x0b, 0x03); 1732 } else { 1733 i2c_write_reg(i2c, 0x10, 0x0a, 0x01); 1734 i2c_write_reg(i2c, 0x10, 0x0b, 0x01); 1735 } 1736 1737 usleep_range(2000, 3000); 1738 /* Start XO2 PLL */ 1739 i2c_write_reg(i2c, 0x10, 0x08, 0x87); 1740 1741 return 0; 1742 } 1743 1744 static int init_xo2_ci(struct ddb_port *port) 1745 { 1746 struct i2c_adapter *i2c = &port->i2c->adap; 1747 struct ddb *dev = port->dev; 1748 u8 val, data[2]; 1749 int res; 1750 1751 res = i2c_read_regs(i2c, 0x10, 0x04, data, 2); 1752 if (res < 0) 1753 return res; 1754 1755 if (data[0] > 1) { 1756 dev_info(dev->dev, "Port %d: invalid XO2 CI %02x\n", 1757 port->nr, data[0]); 1758 return -1; 1759 } 1760 dev_info(dev->dev, "Port %d: DuoFlex CI %u.%u\n", 1761 port->nr, data[0], data[1]); 1762 1763 i2c_read_reg(i2c, 0x10, 0x08, &val); 1764 if (val != 0) { 1765 i2c_write_reg(i2c, 0x10, 0x08, 0x00); 1766 msleep(100); 1767 } 1768 /* Enable both CI */ 1769 i2c_write_reg(i2c, 0x10, 0x08, 3); 1770 usleep_range(2000, 3000); 1771 1772 /* speed: 0=55,1=75,2=90,3=104 MBit/s */ 1773 i2c_write_reg(i2c, 0x10, 0x09, 1); 1774 1775 i2c_write_reg(i2c, 0x10, 0x08, 0x83); 1776 usleep_range(2000, 3000); 1777 1778 if (dev->link[port->lnr].info->con_clock) { 1779 dev_info(dev->dev, "Setting continuous clock for DuoFlex CI\n"); 1780 i2c_write_reg(i2c, 0x10, 0x0a, 0x03); 1781 i2c_write_reg(i2c, 0x10, 0x0b, 0x03); 1782 } else { 1783 i2c_write_reg(i2c, 0x10, 0x0a, 0x01); 1784 i2c_write_reg(i2c, 0x10, 0x0b, 0x01); 1785 } 1786 return 0; 1787 } 1788 1789 static int port_has_cxd28xx(struct ddb_port *port, u8 *id) 1790 { 1791 struct i2c_adapter *i2c = &port->i2c->adap; 1792 int status; 1793 1794 status = i2c_write_reg(&port->i2c->adap, 0x6e, 0, 0); 1795 if (status) 1796 return 0; 1797 status = i2c_read_reg(i2c, 0x6e, 0xfd, id); 1798 if (status) 1799 return 0; 1800 return 1; 1801 } 1802 1803 static char *xo2names[] = { 1804 "DUAL DVB-S2", "DUAL DVB-C/T/T2", 1805 "DUAL DVB-ISDBT", "DUAL DVB-C/C2/T/T2", 1806 "DUAL ATSC", "DUAL DVB-C/C2/T/T2,ISDB-T", 1807 "", "" 1808 }; 1809 1810 static char *xo2types[] = { 1811 "DVBS_ST", "DVBCT2_SONY", 1812 "ISDBT_SONY", "DVBC2T2_SONY", 1813 "ATSC_ST", "DVBC2T2I_SONY" 1814 }; 1815 1816 static void ddb_port_probe(struct ddb_port *port) 1817 { 1818 struct ddb *dev = port->dev; 1819 u32 l = port->lnr; 1820 u8 id, type; 1821 1822 port->name = "NO MODULE"; 1823 port->type_name = "NONE"; 1824 port->class = DDB_PORT_NONE; 1825 1826 /* Handle missing ports and ports without I2C */ 1827 1828 if (dummy_tuner && !port->nr && 1829 dev->link[0].ids.device == 0x0005) { 1830 port->name = "DUMMY"; 1831 port->class = DDB_PORT_TUNER; 1832 port->type = DDB_TUNER_DUMMY; 1833 port->type_name = "DUMMY"; 1834 return; 1835 } 1836 1837 if (port->nr == ts_loop) { 1838 port->name = "TS LOOP"; 1839 port->class = DDB_PORT_LOOP; 1840 return; 1841 } 1842 1843 if (port->nr == 1 && dev->link[l].info->type == DDB_OCTOPUS_CI && 1844 dev->link[l].info->i2c_mask == 1) { 1845 port->name = "NO TAB"; 1846 port->class = DDB_PORT_NONE; 1847 return; 1848 } 1849 1850 if (dev->link[l].info->type == DDB_OCTOPUS_MAX) { 1851 port->name = "DUAL DVB-S2 MAX"; 1852 port->type_name = "MXL5XX"; 1853 port->class = DDB_PORT_TUNER; 1854 port->type = DDB_TUNER_MXL5XX; 1855 if (port->i2c) 1856 ddbwritel(dev, I2C_SPEED_400, 1857 port->i2c->regs + I2C_TIMING); 1858 return; 1859 } 1860 1861 if (dev->link[l].info->type == DDB_OCTOPUS_MCI) { 1862 if (port->nr >= dev->link[l].info->mci) 1863 return; 1864 port->name = "DUAL MCI"; 1865 port->type_name = "MCI"; 1866 port->class = DDB_PORT_TUNER; 1867 port->type = DDB_TUNER_MCI; 1868 return; 1869 } 1870 1871 if (port->nr > 1 && dev->link[l].info->type == DDB_OCTOPUS_CI) { 1872 port->name = "CI internal"; 1873 port->type_name = "INTERNAL"; 1874 port->class = DDB_PORT_CI; 1875 port->type = DDB_CI_INTERNAL; 1876 } 1877 1878 if (!port->i2c) 1879 return; 1880 1881 /* Probe ports with I2C */ 1882 1883 if (port_has_cxd(port, &id)) { 1884 if (id == 1) { 1885 port->name = "CI"; 1886 port->type_name = "CXD2099"; 1887 port->class = DDB_PORT_CI; 1888 port->type = DDB_CI_EXTERNAL_SONY; 1889 ddbwritel(dev, I2C_SPEED_400, 1890 port->i2c->regs + I2C_TIMING); 1891 } else { 1892 dev_info(dev->dev, "Port %d: Uninitialized DuoFlex\n", 1893 port->nr); 1894 return; 1895 } 1896 } else if (port_has_xo2(port, &type, &id)) { 1897 ddbwritel(dev, I2C_SPEED_400, port->i2c->regs + I2C_TIMING); 1898 /*dev_info(dev->dev, "XO2 ID %02x\n", id);*/ 1899 if (type == 2) { 1900 port->name = "DuoFlex CI"; 1901 port->class = DDB_PORT_CI; 1902 port->type = DDB_CI_EXTERNAL_XO2; 1903 port->type_name = "CI_XO2"; 1904 init_xo2_ci(port); 1905 return; 1906 } 1907 id >>= 2; 1908 if (id > 5) { 1909 port->name = "unknown XO2 DuoFlex"; 1910 port->type_name = "UNKNOWN"; 1911 } else { 1912 port->name = xo2names[id]; 1913 port->class = DDB_PORT_TUNER; 1914 port->type = DDB_TUNER_XO2 + id; 1915 port->type_name = xo2types[id]; 1916 init_xo2(port); 1917 } 1918 } else if (port_has_cxd28xx(port, &id)) { 1919 switch (id) { 1920 case 0xa4: 1921 port->name = "DUAL DVB-C2T2 CXD2843"; 1922 port->type = DDB_TUNER_DVBC2T2_SONY_P; 1923 port->type_name = "DVBC2T2_SONY"; 1924 break; 1925 case 0xb1: 1926 port->name = "DUAL DVB-CT2 CXD2837"; 1927 port->type = DDB_TUNER_DVBCT2_SONY_P; 1928 port->type_name = "DVBCT2_SONY"; 1929 break; 1930 case 0xb0: 1931 port->name = "DUAL ISDB-T CXD2838"; 1932 port->type = DDB_TUNER_ISDBT_SONY_P; 1933 port->type_name = "ISDBT_SONY"; 1934 break; 1935 case 0xc1: 1936 port->name = "DUAL DVB-C2T2 ISDB-T CXD2854"; 1937 port->type = DDB_TUNER_DVBC2T2I_SONY_P; 1938 port->type_name = "DVBC2T2I_ISDBT_SONY"; 1939 break; 1940 default: 1941 return; 1942 } 1943 port->class = DDB_PORT_TUNER; 1944 ddbwritel(dev, I2C_SPEED_400, port->i2c->regs + I2C_TIMING); 1945 } else if (port_has_stv0900(port)) { 1946 port->name = "DUAL DVB-S2"; 1947 port->class = DDB_PORT_TUNER; 1948 port->type = DDB_TUNER_DVBS_ST; 1949 port->type_name = "DVBS_ST"; 1950 ddbwritel(dev, I2C_SPEED_100, port->i2c->regs + I2C_TIMING); 1951 } else if (port_has_stv0900_aa(port, &id)) { 1952 port->name = "DUAL DVB-S2"; 1953 port->class = DDB_PORT_TUNER; 1954 if (id == 0x51) { 1955 if (port->nr == 0 && 1956 dev->link[l].info->ts_quirks & TS_QUIRK_REVERSED) 1957 port->type = DDB_TUNER_DVBS_STV0910_PR; 1958 else 1959 port->type = DDB_TUNER_DVBS_STV0910_P; 1960 port->type_name = "DVBS_ST_0910"; 1961 } else { 1962 port->type = DDB_TUNER_DVBS_ST_AA; 1963 port->type_name = "DVBS_ST_AA"; 1964 } 1965 ddbwritel(dev, I2C_SPEED_100, port->i2c->regs + I2C_TIMING); 1966 } else if (port_has_drxks(port)) { 1967 port->name = "DUAL DVB-C/T"; 1968 port->class = DDB_PORT_TUNER; 1969 port->type = DDB_TUNER_DVBCT_TR; 1970 port->type_name = "DVBCT_TR"; 1971 ddbwritel(dev, I2C_SPEED_400, port->i2c->regs + I2C_TIMING); 1972 } else if (port_has_stv0367(port)) { 1973 port->name = "DUAL DVB-C/T"; 1974 port->class = DDB_PORT_TUNER; 1975 port->type = DDB_TUNER_DVBCT_ST; 1976 port->type_name = "DVBCT_ST"; 1977 ddbwritel(dev, I2C_SPEED_100, port->i2c->regs + I2C_TIMING); 1978 } else if (port_has_encti(port)) { 1979 port->name = "ENCTI"; 1980 port->class = DDB_PORT_LOOP; 1981 } 1982 } 1983 1984 /****************************************************************************/ 1985 /****************************************************************************/ 1986 /****************************************************************************/ 1987 1988 static int ddb_port_attach(struct ddb_port *port) 1989 { 1990 int ret = 0; 1991 1992 switch (port->class) { 1993 case DDB_PORT_TUNER: 1994 ret = dvb_input_attach(port->input[0]); 1995 if (ret < 0) 1996 break; 1997 ret = dvb_input_attach(port->input[1]); 1998 if (ret < 0) { 1999 dvb_input_detach(port->input[0]); 2000 break; 2001 } 2002 port->input[0]->redi = port->input[0]; 2003 port->input[1]->redi = port->input[1]; 2004 break; 2005 case DDB_PORT_CI: 2006 ret = ddb_ci_attach(port, ci_bitrate); 2007 if (ret < 0) 2008 break; 2009 /* fall-through */ 2010 case DDB_PORT_LOOP: 2011 ret = dvb_register_device(port->dvb[0].adap, 2012 &port->dvb[0].dev, 2013 &dvbdev_ci, (void *)port->output, 2014 DVB_DEVICE_SEC, 0); 2015 break; 2016 default: 2017 break; 2018 } 2019 if (ret < 0) 2020 dev_err(port->dev->dev, "port_attach on port %d failed\n", 2021 port->nr); 2022 return ret; 2023 } 2024 2025 int ddb_ports_attach(struct ddb *dev) 2026 { 2027 int i, numports, err_ports = 0, ret = 0; 2028 struct ddb_port *port; 2029 2030 if (dev->port_num) { 2031 ret = dvb_register_adapters(dev); 2032 if (ret < 0) { 2033 dev_err(dev->dev, "Registering adapters failed. Check DVB_MAX_ADAPTERS in config.\n"); 2034 return ret; 2035 } 2036 } 2037 2038 numports = dev->port_num; 2039 2040 for (i = 0; i < dev->port_num; i++) { 2041 port = &dev->port[i]; 2042 if (port->class != DDB_PORT_NONE) { 2043 ret = ddb_port_attach(port); 2044 if (ret) 2045 err_ports++; 2046 } else { 2047 numports--; 2048 } 2049 } 2050 2051 if (err_ports) { 2052 if (err_ports == numports) { 2053 dev_err(dev->dev, "All connected ports failed to initialise!\n"); 2054 return -ENODEV; 2055 } 2056 2057 dev_warn(dev->dev, "%d of %d connected ports failed to initialise!\n", 2058 err_ports, numports); 2059 } 2060 2061 return 0; 2062 } 2063 2064 void ddb_ports_detach(struct ddb *dev) 2065 { 2066 int i; 2067 struct ddb_port *port; 2068 2069 for (i = 0; i < dev->port_num; i++) { 2070 port = &dev->port[i]; 2071 2072 switch (port->class) { 2073 case DDB_PORT_TUNER: 2074 dvb_input_detach(port->input[1]); 2075 dvb_input_detach(port->input[0]); 2076 break; 2077 case DDB_PORT_CI: 2078 case DDB_PORT_LOOP: 2079 ddb_ci_detach(port); 2080 break; 2081 } 2082 } 2083 dvb_unregister_adapters(dev); 2084 } 2085 2086 /* Copy input DMA pointers to output DMA and ACK. */ 2087 2088 static void input_write_output(struct ddb_input *input, 2089 struct ddb_output *output) 2090 { 2091 ddbwritel(output->port->dev, 2092 input->dma->stat, DMA_BUFFER_ACK(output->dma)); 2093 output->dma->cbuf = (input->dma->stat >> 11) & 0x1f; 2094 output->dma->coff = (input->dma->stat & 0x7ff) << 7; 2095 } 2096 2097 static void output_ack_input(struct ddb_output *output, 2098 struct ddb_input *input) 2099 { 2100 ddbwritel(input->port->dev, 2101 output->dma->stat, DMA_BUFFER_ACK(input->dma)); 2102 } 2103 2104 static void input_write_dvb(struct ddb_input *input, 2105 struct ddb_input *input2) 2106 { 2107 struct ddb_dvb *dvb = &input2->port->dvb[input2->nr & 1]; 2108 struct ddb_dma *dma, *dma2; 2109 struct ddb *dev = input->port->dev; 2110 int ack = 1; 2111 2112 dma = input->dma; 2113 dma2 = input->dma; 2114 /* 2115 * if there also is an output connected, do not ACK. 2116 * input_write_output will ACK. 2117 */ 2118 if (input->redo) { 2119 dma2 = input->redo->dma; 2120 ack = 0; 2121 } 2122 while (dma->cbuf != ((dma->stat >> 11) & 0x1f) || 2123 (4 & dma->ctrl)) { 2124 if (4 & dma->ctrl) { 2125 /* dev_err(dev->dev, "Overflow dma %d\n", dma->nr); */ 2126 ack = 1; 2127 } 2128 if (alt_dma) 2129 dma_sync_single_for_cpu(dev->dev, dma2->pbuf[dma->cbuf], 2130 dma2->size, DMA_FROM_DEVICE); 2131 dvb_dmx_swfilter_packets(&dvb->demux, 2132 dma2->vbuf[dma->cbuf], 2133 dma2->size / 188); 2134 dma->cbuf = (dma->cbuf + 1) % dma2->num; 2135 if (ack) 2136 ddbwritel(dev, (dma->cbuf << 11), 2137 DMA_BUFFER_ACK(dma)); 2138 dma->stat = safe_ddbreadl(dev, DMA_BUFFER_CURRENT(dma)); 2139 dma->ctrl = safe_ddbreadl(dev, DMA_BUFFER_CONTROL(dma)); 2140 } 2141 } 2142 2143 static void input_work(struct work_struct *work) 2144 { 2145 struct ddb_dma *dma = container_of(work, struct ddb_dma, work); 2146 struct ddb_input *input = (struct ddb_input *)dma->io; 2147 struct ddb *dev = input->port->dev; 2148 unsigned long flags; 2149 2150 spin_lock_irqsave(&dma->lock, flags); 2151 if (!dma->running) { 2152 spin_unlock_irqrestore(&dma->lock, flags); 2153 return; 2154 } 2155 dma->stat = ddbreadl(dev, DMA_BUFFER_CURRENT(dma)); 2156 dma->ctrl = ddbreadl(dev, DMA_BUFFER_CONTROL(dma)); 2157 2158 if (input->redi) 2159 input_write_dvb(input, input->redi); 2160 if (input->redo) 2161 input_write_output(input, input->redo); 2162 wake_up(&dma->wq); 2163 spin_unlock_irqrestore(&dma->lock, flags); 2164 } 2165 2166 static void input_handler(void *data) 2167 { 2168 struct ddb_input *input = (struct ddb_input *)data; 2169 struct ddb_dma *dma = input->dma; 2170 2171 queue_work(ddb_wq, &dma->work); 2172 } 2173 2174 static void output_work(struct work_struct *work) 2175 { 2176 struct ddb_dma *dma = container_of(work, struct ddb_dma, work); 2177 struct ddb_output *output = (struct ddb_output *)dma->io; 2178 struct ddb *dev = output->port->dev; 2179 unsigned long flags; 2180 2181 spin_lock_irqsave(&dma->lock, flags); 2182 if (!dma->running) 2183 goto unlock_exit; 2184 dma->stat = ddbreadl(dev, DMA_BUFFER_CURRENT(dma)); 2185 dma->ctrl = ddbreadl(dev, DMA_BUFFER_CONTROL(dma)); 2186 if (output->redi) 2187 output_ack_input(output, output->redi); 2188 wake_up(&dma->wq); 2189 unlock_exit: 2190 spin_unlock_irqrestore(&dma->lock, flags); 2191 } 2192 2193 static void output_handler(void *data) 2194 { 2195 struct ddb_output *output = (struct ddb_output *)data; 2196 struct ddb_dma *dma = output->dma; 2197 2198 queue_work(ddb_wq, &dma->work); 2199 } 2200 2201 /****************************************************************************/ 2202 /****************************************************************************/ 2203 2204 static const struct ddb_regmap *io_regmap(struct ddb_io *io, int link) 2205 { 2206 const struct ddb_info *info; 2207 2208 if (link) 2209 info = io->port->dev->link[io->port->lnr].info; 2210 else 2211 info = io->port->dev->link[0].info; 2212 2213 if (!info) 2214 return NULL; 2215 2216 return info->regmap; 2217 } 2218 2219 static void ddb_dma_init(struct ddb_io *io, int nr, int out) 2220 { 2221 struct ddb_dma *dma; 2222 const struct ddb_regmap *rm = io_regmap(io, 0); 2223 2224 dma = out ? &io->port->dev->odma[nr] : &io->port->dev->idma[nr]; 2225 io->dma = dma; 2226 dma->io = io; 2227 2228 spin_lock_init(&dma->lock); 2229 init_waitqueue_head(&dma->wq); 2230 if (out) { 2231 INIT_WORK(&dma->work, output_work); 2232 dma->regs = rm->odma->base + rm->odma->size * nr; 2233 dma->bufregs = rm->odma_buf->base + rm->odma_buf->size * nr; 2234 dma->num = dma_buf_num; 2235 dma->size = dma_buf_size * 128 * 47; 2236 dma->div = 1; 2237 } else { 2238 INIT_WORK(&dma->work, input_work); 2239 dma->regs = rm->idma->base + rm->idma->size * nr; 2240 dma->bufregs = rm->idma_buf->base + rm->idma_buf->size * nr; 2241 dma->num = dma_buf_num; 2242 dma->size = dma_buf_size * 128 * 47; 2243 dma->div = 1; 2244 } 2245 ddbwritel(io->port->dev, 0, DMA_BUFFER_ACK(dma)); 2246 dev_dbg(io->port->dev->dev, "init link %u, io %u, dma %u, dmaregs %08x bufregs %08x\n", 2247 io->port->lnr, io->nr, nr, dma->regs, dma->bufregs); 2248 } 2249 2250 static void ddb_input_init(struct ddb_port *port, int nr, int pnr, int anr) 2251 { 2252 struct ddb *dev = port->dev; 2253 struct ddb_input *input = &dev->input[anr]; 2254 const struct ddb_regmap *rm; 2255 2256 port->input[pnr] = input; 2257 input->nr = nr; 2258 input->port = port; 2259 rm = io_regmap(input, 1); 2260 input->regs = DDB_LINK_TAG(port->lnr) | 2261 (rm->input->base + rm->input->size * nr); 2262 dev_dbg(dev->dev, "init link %u, input %u, regs %08x\n", 2263 port->lnr, nr, input->regs); 2264 2265 if (dev->has_dma) { 2266 const struct ddb_regmap *rm0 = io_regmap(input, 0); 2267 u32 base = rm0->irq_base_idma; 2268 u32 dma_nr = nr; 2269 2270 if (port->lnr) 2271 dma_nr += 32 + (port->lnr - 1) * 8; 2272 2273 dev_dbg(dev->dev, "init link %u, input %u, handler %u\n", 2274 port->lnr, nr, dma_nr + base); 2275 2276 ddb_irq_set(dev, 0, dma_nr + base, &input_handler, input); 2277 ddb_dma_init(input, dma_nr, 0); 2278 } 2279 } 2280 2281 static void ddb_output_init(struct ddb_port *port, int nr) 2282 { 2283 struct ddb *dev = port->dev; 2284 struct ddb_output *output = &dev->output[nr]; 2285 const struct ddb_regmap *rm; 2286 2287 port->output = output; 2288 output->nr = nr; 2289 output->port = port; 2290 rm = io_regmap(output, 1); 2291 output->regs = DDB_LINK_TAG(port->lnr) | 2292 (rm->output->base + rm->output->size * nr); 2293 2294 dev_dbg(dev->dev, "init link %u, output %u, regs %08x\n", 2295 port->lnr, nr, output->regs); 2296 2297 if (dev->has_dma) { 2298 const struct ddb_regmap *rm0 = io_regmap(output, 0); 2299 u32 base = rm0->irq_base_odma; 2300 2301 ddb_irq_set(dev, 0, nr + base, &output_handler, output); 2302 ddb_dma_init(output, nr, 1); 2303 } 2304 } 2305 2306 static int ddb_port_match_i2c(struct ddb_port *port) 2307 { 2308 struct ddb *dev = port->dev; 2309 u32 i; 2310 2311 for (i = 0; i < dev->i2c_num; i++) { 2312 if (dev->i2c[i].link == port->lnr && 2313 dev->i2c[i].nr == port->nr) { 2314 port->i2c = &dev->i2c[i]; 2315 return 1; 2316 } 2317 } 2318 return 0; 2319 } 2320 2321 static int ddb_port_match_link_i2c(struct ddb_port *port) 2322 { 2323 struct ddb *dev = port->dev; 2324 u32 i; 2325 2326 for (i = 0; i < dev->i2c_num; i++) { 2327 if (dev->i2c[i].link == port->lnr) { 2328 port->i2c = &dev->i2c[i]; 2329 return 1; 2330 } 2331 } 2332 return 0; 2333 } 2334 2335 void ddb_ports_init(struct ddb *dev) 2336 { 2337 u32 i, l, p; 2338 struct ddb_port *port; 2339 const struct ddb_info *info; 2340 const struct ddb_regmap *rm; 2341 2342 for (p = l = 0; l < DDB_MAX_LINK; l++) { 2343 info = dev->link[l].info; 2344 if (!info) 2345 continue; 2346 rm = info->regmap; 2347 if (!rm) 2348 continue; 2349 for (i = 0; i < info->port_num; i++, p++) { 2350 port = &dev->port[p]; 2351 port->dev = dev; 2352 port->nr = i; 2353 port->lnr = l; 2354 port->pnr = p; 2355 port->gap = 0xffffffff; 2356 port->obr = ci_bitrate; 2357 mutex_init(&port->i2c_gate_lock); 2358 2359 if (!ddb_port_match_i2c(port)) { 2360 if (info->type == DDB_OCTOPUS_MAX) 2361 ddb_port_match_link_i2c(port); 2362 } 2363 2364 ddb_port_probe(port); 2365 2366 port->dvb[0].adap = &dev->adap[2 * p]; 2367 port->dvb[1].adap = &dev->adap[2 * p + 1]; 2368 2369 if (port->class == DDB_PORT_NONE && i && p && 2370 dev->port[p - 1].type == DDB_CI_EXTERNAL_XO2) { 2371 port->class = DDB_PORT_CI; 2372 port->type = DDB_CI_EXTERNAL_XO2_B; 2373 port->name = "DuoFlex CI_B"; 2374 port->i2c = dev->port[p - 1].i2c; 2375 } 2376 2377 dev_info(dev->dev, "Port %u: Link %u, Link Port %u (TAB %u): %s\n", 2378 port->pnr, port->lnr, port->nr, port->nr + 1, 2379 port->name); 2380 2381 if (port->class == DDB_PORT_CI && 2382 port->type == DDB_CI_EXTERNAL_XO2) { 2383 ddb_input_init(port, 2 * i, 0, 2 * i); 2384 ddb_output_init(port, i); 2385 continue; 2386 } 2387 2388 if (port->class == DDB_PORT_CI && 2389 port->type == DDB_CI_EXTERNAL_XO2_B) { 2390 ddb_input_init(port, 2 * i - 1, 0, 2 * i - 1); 2391 ddb_output_init(port, i); 2392 continue; 2393 } 2394 2395 if (port->class == DDB_PORT_NONE) 2396 continue; 2397 2398 switch (dev->link[l].info->type) { 2399 case DDB_OCTOPUS_CI: 2400 if (i >= 2) { 2401 ddb_input_init(port, 2 + i, 0, 2 + i); 2402 ddb_input_init(port, 4 + i, 1, 4 + i); 2403 ddb_output_init(port, i); 2404 break; 2405 } /* fallthrough */ 2406 case DDB_OCTOPUS: 2407 ddb_input_init(port, 2 * i, 0, 2 * i); 2408 ddb_input_init(port, 2 * i + 1, 1, 2 * i + 1); 2409 ddb_output_init(port, i); 2410 break; 2411 case DDB_OCTOPUS_MAX: 2412 case DDB_OCTOPUS_MAX_CT: 2413 case DDB_OCTOPUS_MCI: 2414 ddb_input_init(port, 2 * i, 0, 2 * p); 2415 ddb_input_init(port, 2 * i + 1, 1, 2 * p + 1); 2416 break; 2417 default: 2418 break; 2419 } 2420 } 2421 } 2422 dev->port_num = p; 2423 } 2424 2425 void ddb_ports_release(struct ddb *dev) 2426 { 2427 int i; 2428 struct ddb_port *port; 2429 2430 for (i = 0; i < dev->port_num; i++) { 2431 port = &dev->port[i]; 2432 if (port->input[0] && port->input[0]->dma) 2433 cancel_work_sync(&port->input[0]->dma->work); 2434 if (port->input[1] && port->input[1]->dma) 2435 cancel_work_sync(&port->input[1]->dma->work); 2436 if (port->output && port->output->dma) 2437 cancel_work_sync(&port->output->dma->work); 2438 } 2439 } 2440 2441 /****************************************************************************/ 2442 /****************************************************************************/ 2443 /****************************************************************************/ 2444 2445 #define IRQ_HANDLE(_nr) \ 2446 do { if ((s & (1UL << ((_nr) & 0x1f))) && \ 2447 dev->link[0].irq[_nr].handler) \ 2448 dev->link[0].irq[_nr].handler(dev->link[0].irq[_nr].data); } \ 2449 while (0) 2450 2451 #define IRQ_HANDLE_NIBBLE(_shift) { \ 2452 if (s & (0x0000000f << ((_shift) & 0x1f))) { \ 2453 IRQ_HANDLE(0 + (_shift)); \ 2454 IRQ_HANDLE(1 + (_shift)); \ 2455 IRQ_HANDLE(2 + (_shift)); \ 2456 IRQ_HANDLE(3 + (_shift)); \ 2457 } \ 2458 } 2459 2460 #define IRQ_HANDLE_BYTE(_shift) { \ 2461 if (s & (0x000000ff << ((_shift) & 0x1f))) { \ 2462 IRQ_HANDLE(0 + (_shift)); \ 2463 IRQ_HANDLE(1 + (_shift)); \ 2464 IRQ_HANDLE(2 + (_shift)); \ 2465 IRQ_HANDLE(3 + (_shift)); \ 2466 IRQ_HANDLE(4 + (_shift)); \ 2467 IRQ_HANDLE(5 + (_shift)); \ 2468 IRQ_HANDLE(6 + (_shift)); \ 2469 IRQ_HANDLE(7 + (_shift)); \ 2470 } \ 2471 } 2472 2473 static void irq_handle_msg(struct ddb *dev, u32 s) 2474 { 2475 dev->i2c_irq++; 2476 IRQ_HANDLE_NIBBLE(0); 2477 } 2478 2479 static void irq_handle_io(struct ddb *dev, u32 s) 2480 { 2481 dev->ts_irq++; 2482 IRQ_HANDLE_NIBBLE(4); 2483 IRQ_HANDLE_BYTE(8); 2484 IRQ_HANDLE_BYTE(16); 2485 IRQ_HANDLE_BYTE(24); 2486 } 2487 2488 irqreturn_t ddb_irq_handler0(int irq, void *dev_id) 2489 { 2490 struct ddb *dev = (struct ddb *)dev_id; 2491 u32 mask = 0x8fffff00; 2492 u32 s = mask & ddbreadl(dev, INTERRUPT_STATUS); 2493 2494 if (!s) 2495 return IRQ_NONE; 2496 do { 2497 if (s & 0x80000000) 2498 return IRQ_NONE; 2499 ddbwritel(dev, s, INTERRUPT_ACK); 2500 irq_handle_io(dev, s); 2501 } while ((s = mask & ddbreadl(dev, INTERRUPT_STATUS))); 2502 2503 return IRQ_HANDLED; 2504 } 2505 2506 irqreturn_t ddb_irq_handler1(int irq, void *dev_id) 2507 { 2508 struct ddb *dev = (struct ddb *)dev_id; 2509 u32 mask = 0x8000000f; 2510 u32 s = mask & ddbreadl(dev, INTERRUPT_STATUS); 2511 2512 if (!s) 2513 return IRQ_NONE; 2514 do { 2515 if (s & 0x80000000) 2516 return IRQ_NONE; 2517 ddbwritel(dev, s, INTERRUPT_ACK); 2518 irq_handle_msg(dev, s); 2519 } while ((s = mask & ddbreadl(dev, INTERRUPT_STATUS))); 2520 2521 return IRQ_HANDLED; 2522 } 2523 2524 irqreturn_t ddb_irq_handler(int irq, void *dev_id) 2525 { 2526 struct ddb *dev = (struct ddb *)dev_id; 2527 u32 s = ddbreadl(dev, INTERRUPT_STATUS); 2528 int ret = IRQ_HANDLED; 2529 2530 if (!s) 2531 return IRQ_NONE; 2532 do { 2533 if (s & 0x80000000) 2534 return IRQ_NONE; 2535 ddbwritel(dev, s, INTERRUPT_ACK); 2536 2537 if (s & 0x0000000f) 2538 irq_handle_msg(dev, s); 2539 if (s & 0x0fffff00) 2540 irq_handle_io(dev, s); 2541 } while ((s = ddbreadl(dev, INTERRUPT_STATUS))); 2542 2543 return ret; 2544 } 2545 2546 /****************************************************************************/ 2547 /****************************************************************************/ 2548 /****************************************************************************/ 2549 2550 static int reg_wait(struct ddb *dev, u32 reg, u32 bit) 2551 { 2552 u32 count = 0; 2553 2554 while (safe_ddbreadl(dev, reg) & bit) { 2555 ndelay(10); 2556 if (++count == 100) 2557 return -1; 2558 } 2559 return 0; 2560 } 2561 2562 static int flashio(struct ddb *dev, u32 lnr, u8 *wbuf, u32 wlen, u8 *rbuf, 2563 u32 rlen) 2564 { 2565 u32 data, shift; 2566 u32 tag = DDB_LINK_TAG(lnr); 2567 struct ddb_link *link = &dev->link[lnr]; 2568 2569 mutex_lock(&link->flash_mutex); 2570 if (wlen > 4) 2571 ddbwritel(dev, 1, tag | SPI_CONTROL); 2572 while (wlen > 4) { 2573 /* FIXME: check for big-endian */ 2574 data = swab32(*(u32 *)wbuf); 2575 wbuf += 4; 2576 wlen -= 4; 2577 ddbwritel(dev, data, tag | SPI_DATA); 2578 if (reg_wait(dev, tag | SPI_CONTROL, 4)) 2579 goto fail; 2580 } 2581 if (rlen) 2582 ddbwritel(dev, 0x0001 | ((wlen << (8 + 3)) & 0x1f00), 2583 tag | SPI_CONTROL); 2584 else 2585 ddbwritel(dev, 0x0003 | ((wlen << (8 + 3)) & 0x1f00), 2586 tag | SPI_CONTROL); 2587 2588 data = 0; 2589 shift = ((4 - wlen) * 8); 2590 while (wlen) { 2591 data <<= 8; 2592 data |= *wbuf; 2593 wlen--; 2594 wbuf++; 2595 } 2596 if (shift) 2597 data <<= shift; 2598 ddbwritel(dev, data, tag | SPI_DATA); 2599 if (reg_wait(dev, tag | SPI_CONTROL, 4)) 2600 goto fail; 2601 2602 if (!rlen) { 2603 ddbwritel(dev, 0, tag | SPI_CONTROL); 2604 goto exit; 2605 } 2606 if (rlen > 4) 2607 ddbwritel(dev, 1, tag | SPI_CONTROL); 2608 2609 while (rlen > 4) { 2610 ddbwritel(dev, 0xffffffff, tag | SPI_DATA); 2611 if (reg_wait(dev, tag | SPI_CONTROL, 4)) 2612 goto fail; 2613 data = ddbreadl(dev, tag | SPI_DATA); 2614 *(u32 *)rbuf = swab32(data); 2615 rbuf += 4; 2616 rlen -= 4; 2617 } 2618 ddbwritel(dev, 0x0003 | ((rlen << (8 + 3)) & 0x1F00), 2619 tag | SPI_CONTROL); 2620 ddbwritel(dev, 0xffffffff, tag | SPI_DATA); 2621 if (reg_wait(dev, tag | SPI_CONTROL, 4)) 2622 goto fail; 2623 2624 data = ddbreadl(dev, tag | SPI_DATA); 2625 ddbwritel(dev, 0, tag | SPI_CONTROL); 2626 2627 if (rlen < 4) 2628 data <<= ((4 - rlen) * 8); 2629 2630 while (rlen > 0) { 2631 *rbuf = ((data >> 24) & 0xff); 2632 data <<= 8; 2633 rbuf++; 2634 rlen--; 2635 } 2636 exit: 2637 mutex_unlock(&link->flash_mutex); 2638 return 0; 2639 fail: 2640 mutex_unlock(&link->flash_mutex); 2641 return -1; 2642 } 2643 2644 int ddbridge_flashread(struct ddb *dev, u32 link, u8 *buf, u32 addr, u32 len) 2645 { 2646 u8 cmd[4] = {0x03, (addr >> 16) & 0xff, 2647 (addr >> 8) & 0xff, addr & 0xff}; 2648 2649 return flashio(dev, link, cmd, 4, buf, len); 2650 } 2651 2652 /* 2653 * TODO/FIXME: add/implement IOCTLs from upstream driver 2654 */ 2655 2656 #define DDB_NAME "ddbridge" 2657 2658 static u32 ddb_num; 2659 static int ddb_major; 2660 static DEFINE_MUTEX(ddb_mutex); 2661 2662 static int ddb_release(struct inode *inode, struct file *file) 2663 { 2664 struct ddb *dev = file->private_data; 2665 2666 dev->ddb_dev_users--; 2667 return 0; 2668 } 2669 2670 static int ddb_open(struct inode *inode, struct file *file) 2671 { 2672 struct ddb *dev = ddbs[iminor(inode)]; 2673 2674 if (dev->ddb_dev_users) 2675 return -EBUSY; 2676 dev->ddb_dev_users++; 2677 file->private_data = dev; 2678 return 0; 2679 } 2680 2681 static long ddb_ioctl(struct file *file, unsigned int cmd, unsigned long arg) 2682 { 2683 struct ddb *dev = file->private_data; 2684 2685 dev_warn(dev->dev, "DDB IOCTLs unsupported (cmd: %d, arg: %lu)\n", 2686 cmd, arg); 2687 2688 return -ENOTTY; 2689 } 2690 2691 static const struct file_operations ddb_fops = { 2692 .unlocked_ioctl = ddb_ioctl, 2693 .open = ddb_open, 2694 .release = ddb_release, 2695 }; 2696 2697 static char *ddb_devnode(struct device *device, umode_t *mode) 2698 { 2699 struct ddb *dev = dev_get_drvdata(device); 2700 2701 return kasprintf(GFP_KERNEL, "ddbridge/card%d", dev->nr); 2702 } 2703 2704 #define __ATTR_MRO(_name, _show) { \ 2705 .attr = { .name = __stringify(_name), .mode = 0444 }, \ 2706 .show = _show, \ 2707 } 2708 2709 #define __ATTR_MWO(_name, _store) { \ 2710 .attr = { .name = __stringify(_name), .mode = 0222 }, \ 2711 .store = _store, \ 2712 } 2713 2714 static ssize_t ports_show(struct device *device, 2715 struct device_attribute *attr, char *buf) 2716 { 2717 struct ddb *dev = dev_get_drvdata(device); 2718 2719 return sprintf(buf, "%d\n", dev->port_num); 2720 } 2721 2722 static ssize_t ts_irq_show(struct device *device, 2723 struct device_attribute *attr, char *buf) 2724 { 2725 struct ddb *dev = dev_get_drvdata(device); 2726 2727 return sprintf(buf, "%d\n", dev->ts_irq); 2728 } 2729 2730 static ssize_t i2c_irq_show(struct device *device, 2731 struct device_attribute *attr, char *buf) 2732 { 2733 struct ddb *dev = dev_get_drvdata(device); 2734 2735 return sprintf(buf, "%d\n", dev->i2c_irq); 2736 } 2737 2738 static ssize_t fan_show(struct device *device, 2739 struct device_attribute *attr, char *buf) 2740 { 2741 struct ddb *dev = dev_get_drvdata(device); 2742 u32 val; 2743 2744 val = ddbreadl(dev, GPIO_OUTPUT) & 1; 2745 return sprintf(buf, "%d\n", val); 2746 } 2747 2748 static ssize_t fan_store(struct device *device, struct device_attribute *d, 2749 const char *buf, size_t count) 2750 { 2751 struct ddb *dev = dev_get_drvdata(device); 2752 u32 val; 2753 2754 if (sscanf(buf, "%u\n", &val) != 1) 2755 return -EINVAL; 2756 ddbwritel(dev, 1, GPIO_DIRECTION); 2757 ddbwritel(dev, val & 1, GPIO_OUTPUT); 2758 return count; 2759 } 2760 2761 static ssize_t fanspeed_show(struct device *device, 2762 struct device_attribute *attr, char *buf) 2763 { 2764 struct ddb *dev = dev_get_drvdata(device); 2765 int num = attr->attr.name[8] - 0x30; 2766 struct ddb_link *link = &dev->link[num]; 2767 u32 spd; 2768 2769 spd = ddblreadl(link, TEMPMON_FANCONTROL) & 0xff; 2770 return sprintf(buf, "%u\n", spd * 100); 2771 } 2772 2773 static ssize_t temp_show(struct device *device, 2774 struct device_attribute *attr, char *buf) 2775 { 2776 struct ddb *dev = dev_get_drvdata(device); 2777 struct ddb_link *link = &dev->link[0]; 2778 struct i2c_adapter *adap; 2779 int temp, temp2; 2780 u8 tmp[2]; 2781 2782 if (!link->info->temp_num) 2783 return sprintf(buf, "no sensor\n"); 2784 adap = &dev->i2c[link->info->temp_bus].adap; 2785 if (i2c_read_regs(adap, 0x48, 0, tmp, 2) < 0) 2786 return sprintf(buf, "read_error\n"); 2787 temp = (tmp[0] << 3) | (tmp[1] >> 5); 2788 temp *= 125; 2789 if (link->info->temp_num == 2) { 2790 if (i2c_read_regs(adap, 0x49, 0, tmp, 2) < 0) 2791 return sprintf(buf, "read_error\n"); 2792 temp2 = (tmp[0] << 3) | (tmp[1] >> 5); 2793 temp2 *= 125; 2794 return sprintf(buf, "%d %d\n", temp, temp2); 2795 } 2796 return sprintf(buf, "%d\n", temp); 2797 } 2798 2799 static ssize_t ctemp_show(struct device *device, 2800 struct device_attribute *attr, char *buf) 2801 { 2802 struct ddb *dev = dev_get_drvdata(device); 2803 struct i2c_adapter *adap; 2804 int temp; 2805 u8 tmp[2]; 2806 int num = attr->attr.name[4] - 0x30; 2807 2808 adap = &dev->i2c[num].adap; 2809 if (!adap) 2810 return 0; 2811 if (i2c_read_regs(adap, 0x49, 0, tmp, 2) < 0) 2812 if (i2c_read_regs(adap, 0x4d, 0, tmp, 2) < 0) 2813 return sprintf(buf, "no sensor\n"); 2814 temp = tmp[0] * 1000; 2815 return sprintf(buf, "%d\n", temp); 2816 } 2817 2818 static ssize_t led_show(struct device *device, 2819 struct device_attribute *attr, char *buf) 2820 { 2821 struct ddb *dev = dev_get_drvdata(device); 2822 int num = attr->attr.name[3] - 0x30; 2823 2824 return sprintf(buf, "%d\n", dev->leds & (1 << num) ? 1 : 0); 2825 } 2826 2827 static void ddb_set_led(struct ddb *dev, int num, int val) 2828 { 2829 if (!dev->link[0].info->led_num) 2830 return; 2831 switch (dev->port[num].class) { 2832 case DDB_PORT_TUNER: 2833 switch (dev->port[num].type) { 2834 case DDB_TUNER_DVBS_ST: 2835 i2c_write_reg16(&dev->i2c[num].adap, 2836 0x69, 0xf14c, val ? 2 : 0); 2837 break; 2838 case DDB_TUNER_DVBCT_ST: 2839 i2c_write_reg16(&dev->i2c[num].adap, 2840 0x1f, 0xf00e, 0); 2841 i2c_write_reg16(&dev->i2c[num].adap, 2842 0x1f, 0xf00f, val ? 1 : 0); 2843 break; 2844 case DDB_TUNER_XO2 ... DDB_TUNER_DVBC2T2I_SONY: 2845 { 2846 u8 v; 2847 2848 i2c_read_reg(&dev->i2c[num].adap, 0x10, 0x08, &v); 2849 v = (v & ~0x10) | (val ? 0x10 : 0); 2850 i2c_write_reg(&dev->i2c[num].adap, 0x10, 0x08, v); 2851 break; 2852 } 2853 default: 2854 break; 2855 } 2856 break; 2857 } 2858 } 2859 2860 static ssize_t led_store(struct device *device, 2861 struct device_attribute *attr, 2862 const char *buf, size_t count) 2863 { 2864 struct ddb *dev = dev_get_drvdata(device); 2865 int num = attr->attr.name[3] - 0x30; 2866 u32 val; 2867 2868 if (sscanf(buf, "%u\n", &val) != 1) 2869 return -EINVAL; 2870 if (val) 2871 dev->leds |= (1 << num); 2872 else 2873 dev->leds &= ~(1 << num); 2874 ddb_set_led(dev, num, val); 2875 return count; 2876 } 2877 2878 static ssize_t snr_show(struct device *device, 2879 struct device_attribute *attr, char *buf) 2880 { 2881 struct ddb *dev = dev_get_drvdata(device); 2882 char snr[32]; 2883 int num = attr->attr.name[3] - 0x30; 2884 2885 if (dev->port[num].type >= DDB_TUNER_XO2) { 2886 if (i2c_read_regs(&dev->i2c[num].adap, 0x10, 0x10, snr, 16) < 0) 2887 return sprintf(buf, "NO SNR\n"); 2888 snr[16] = 0; 2889 } else { 2890 /* serial number at 0x100-0x11f */ 2891 if (i2c_read_regs16(&dev->i2c[num].adap, 2892 0x57, 0x100, snr, 32) < 0) 2893 if (i2c_read_regs16(&dev->i2c[num].adap, 2894 0x50, 0x100, snr, 32) < 0) 2895 return sprintf(buf, "NO SNR\n"); 2896 snr[31] = 0; /* in case it is not terminated on EEPROM */ 2897 } 2898 return sprintf(buf, "%s\n", snr); 2899 } 2900 2901 static ssize_t bsnr_show(struct device *device, 2902 struct device_attribute *attr, char *buf) 2903 { 2904 struct ddb *dev = dev_get_drvdata(device); 2905 char snr[16]; 2906 2907 ddbridge_flashread(dev, 0, snr, 0x10, 15); 2908 snr[15] = 0; /* in case it is not terminated on EEPROM */ 2909 return sprintf(buf, "%s\n", snr); 2910 } 2911 2912 static ssize_t bpsnr_show(struct device *device, 2913 struct device_attribute *attr, char *buf) 2914 { 2915 struct ddb *dev = dev_get_drvdata(device); 2916 unsigned char snr[32]; 2917 2918 if (!dev->i2c_num) 2919 return 0; 2920 2921 if (i2c_read_regs16(&dev->i2c[0].adap, 2922 0x50, 0x0000, snr, 32) < 0 || 2923 snr[0] == 0xff) 2924 return sprintf(buf, "NO SNR\n"); 2925 snr[31] = 0; /* in case it is not terminated on EEPROM */ 2926 return sprintf(buf, "%s\n", snr); 2927 } 2928 2929 static ssize_t redirect_show(struct device *device, 2930 struct device_attribute *attr, char *buf) 2931 { 2932 return 0; 2933 } 2934 2935 static ssize_t redirect_store(struct device *device, 2936 struct device_attribute *attr, 2937 const char *buf, size_t count) 2938 { 2939 unsigned int i, p; 2940 int res; 2941 2942 if (sscanf(buf, "%x %x\n", &i, &p) != 2) 2943 return -EINVAL; 2944 res = ddb_redirect(i, p); 2945 if (res < 0) 2946 return res; 2947 dev_info(device, "redirect: %02x, %02x\n", i, p); 2948 return count; 2949 } 2950 2951 static ssize_t gap_show(struct device *device, 2952 struct device_attribute *attr, char *buf) 2953 { 2954 struct ddb *dev = dev_get_drvdata(device); 2955 int num = attr->attr.name[3] - 0x30; 2956 2957 return sprintf(buf, "%d\n", dev->port[num].gap); 2958 } 2959 2960 static ssize_t gap_store(struct device *device, struct device_attribute *attr, 2961 const char *buf, size_t count) 2962 { 2963 struct ddb *dev = dev_get_drvdata(device); 2964 int num = attr->attr.name[3] - 0x30; 2965 unsigned int val; 2966 2967 if (sscanf(buf, "%u\n", &val) != 1) 2968 return -EINVAL; 2969 if (val > 128) 2970 return -EINVAL; 2971 if (val == 128) 2972 val = 0xffffffff; 2973 dev->port[num].gap = val; 2974 return count; 2975 } 2976 2977 static ssize_t version_show(struct device *device, 2978 struct device_attribute *attr, char *buf) 2979 { 2980 struct ddb *dev = dev_get_drvdata(device); 2981 2982 return sprintf(buf, "%08x %08x\n", 2983 dev->link[0].ids.hwid, dev->link[0].ids.regmapid); 2984 } 2985 2986 static ssize_t hwid_show(struct device *device, 2987 struct device_attribute *attr, char *buf) 2988 { 2989 struct ddb *dev = dev_get_drvdata(device); 2990 2991 return sprintf(buf, "0x%08X\n", dev->link[0].ids.hwid); 2992 } 2993 2994 static ssize_t regmap_show(struct device *device, 2995 struct device_attribute *attr, char *buf) 2996 { 2997 struct ddb *dev = dev_get_drvdata(device); 2998 2999 return sprintf(buf, "0x%08X\n", dev->link[0].ids.regmapid); 3000 } 3001 3002 static ssize_t fmode_show(struct device *device, 3003 struct device_attribute *attr, char *buf) 3004 { 3005 int num = attr->attr.name[5] - 0x30; 3006 struct ddb *dev = dev_get_drvdata(device); 3007 3008 return sprintf(buf, "%u\n", dev->link[num].lnb.fmode); 3009 } 3010 3011 static ssize_t devid_show(struct device *device, 3012 struct device_attribute *attr, char *buf) 3013 { 3014 int num = attr->attr.name[5] - 0x30; 3015 struct ddb *dev = dev_get_drvdata(device); 3016 3017 return sprintf(buf, "%08x\n", dev->link[num].ids.devid); 3018 } 3019 3020 static ssize_t fmode_store(struct device *device, struct device_attribute *attr, 3021 const char *buf, size_t count) 3022 { 3023 struct ddb *dev = dev_get_drvdata(device); 3024 int num = attr->attr.name[5] - 0x30; 3025 unsigned int val; 3026 3027 if (sscanf(buf, "%u\n", &val) != 1) 3028 return -EINVAL; 3029 if (val > 3) 3030 return -EINVAL; 3031 ddb_lnb_init_fmode(dev, &dev->link[num], val); 3032 return count; 3033 } 3034 3035 static struct device_attribute ddb_attrs[] = { 3036 __ATTR_RO(version), 3037 __ATTR_RO(ports), 3038 __ATTR_RO(ts_irq), 3039 __ATTR_RO(i2c_irq), 3040 __ATTR(gap0, 0664, gap_show, gap_store), 3041 __ATTR(gap1, 0664, gap_show, gap_store), 3042 __ATTR(gap2, 0664, gap_show, gap_store), 3043 __ATTR(gap3, 0664, gap_show, gap_store), 3044 __ATTR(fmode0, 0664, fmode_show, fmode_store), 3045 __ATTR(fmode1, 0664, fmode_show, fmode_store), 3046 __ATTR(fmode2, 0664, fmode_show, fmode_store), 3047 __ATTR(fmode3, 0664, fmode_show, fmode_store), 3048 __ATTR_MRO(devid0, devid_show), 3049 __ATTR_MRO(devid1, devid_show), 3050 __ATTR_MRO(devid2, devid_show), 3051 __ATTR_MRO(devid3, devid_show), 3052 __ATTR_RO(hwid), 3053 __ATTR_RO(regmap), 3054 __ATTR(redirect, 0664, redirect_show, redirect_store), 3055 __ATTR_MRO(snr, bsnr_show), 3056 __ATTR_RO(bpsnr), 3057 __ATTR_NULL, 3058 }; 3059 3060 static struct device_attribute ddb_attrs_temp[] = { 3061 __ATTR_RO(temp), 3062 }; 3063 3064 static struct device_attribute ddb_attrs_fan[] = { 3065 __ATTR(fan, 0664, fan_show, fan_store), 3066 }; 3067 3068 static struct device_attribute ddb_attrs_snr[] = { 3069 __ATTR_MRO(snr0, snr_show), 3070 __ATTR_MRO(snr1, snr_show), 3071 __ATTR_MRO(snr2, snr_show), 3072 __ATTR_MRO(snr3, snr_show), 3073 }; 3074 3075 static struct device_attribute ddb_attrs_ctemp[] = { 3076 __ATTR_MRO(temp0, ctemp_show), 3077 __ATTR_MRO(temp1, ctemp_show), 3078 __ATTR_MRO(temp2, ctemp_show), 3079 __ATTR_MRO(temp3, ctemp_show), 3080 }; 3081 3082 static struct device_attribute ddb_attrs_led[] = { 3083 __ATTR(led0, 0664, led_show, led_store), 3084 __ATTR(led1, 0664, led_show, led_store), 3085 __ATTR(led2, 0664, led_show, led_store), 3086 __ATTR(led3, 0664, led_show, led_store), 3087 }; 3088 3089 static struct device_attribute ddb_attrs_fanspeed[] = { 3090 __ATTR_MRO(fanspeed0, fanspeed_show), 3091 __ATTR_MRO(fanspeed1, fanspeed_show), 3092 __ATTR_MRO(fanspeed2, fanspeed_show), 3093 __ATTR_MRO(fanspeed3, fanspeed_show), 3094 }; 3095 3096 static struct class ddb_class = { 3097 .name = "ddbridge", 3098 .owner = THIS_MODULE, 3099 .devnode = ddb_devnode, 3100 }; 3101 3102 static int ddb_class_create(void) 3103 { 3104 ddb_major = register_chrdev(0, DDB_NAME, &ddb_fops); 3105 if (ddb_major < 0) 3106 return ddb_major; 3107 if (class_register(&ddb_class) < 0) 3108 return -1; 3109 return 0; 3110 } 3111 3112 static void ddb_class_destroy(void) 3113 { 3114 class_unregister(&ddb_class); 3115 unregister_chrdev(ddb_major, DDB_NAME); 3116 } 3117 3118 static void ddb_device_attrs_del(struct ddb *dev) 3119 { 3120 int i; 3121 3122 for (i = 0; i < 4; i++) 3123 if (dev->link[i].info && dev->link[i].info->tempmon_irq) 3124 device_remove_file(dev->ddb_dev, 3125 &ddb_attrs_fanspeed[i]); 3126 for (i = 0; i < dev->link[0].info->temp_num; i++) 3127 device_remove_file(dev->ddb_dev, &ddb_attrs_temp[i]); 3128 for (i = 0; i < dev->link[0].info->fan_num; i++) 3129 device_remove_file(dev->ddb_dev, &ddb_attrs_fan[i]); 3130 for (i = 0; i < dev->i2c_num && i < 4; i++) { 3131 if (dev->link[0].info->led_num) 3132 device_remove_file(dev->ddb_dev, &ddb_attrs_led[i]); 3133 device_remove_file(dev->ddb_dev, &ddb_attrs_snr[i]); 3134 device_remove_file(dev->ddb_dev, &ddb_attrs_ctemp[i]); 3135 } 3136 for (i = 0; ddb_attrs[i].attr.name; i++) 3137 device_remove_file(dev->ddb_dev, &ddb_attrs[i]); 3138 } 3139 3140 static int ddb_device_attrs_add(struct ddb *dev) 3141 { 3142 int i; 3143 3144 for (i = 0; ddb_attrs[i].attr.name; i++) 3145 if (device_create_file(dev->ddb_dev, &ddb_attrs[i])) 3146 goto fail; 3147 for (i = 0; i < dev->link[0].info->temp_num; i++) 3148 if (device_create_file(dev->ddb_dev, &ddb_attrs_temp[i])) 3149 goto fail; 3150 for (i = 0; i < dev->link[0].info->fan_num; i++) 3151 if (device_create_file(dev->ddb_dev, &ddb_attrs_fan[i])) 3152 goto fail; 3153 for (i = 0; (i < dev->i2c_num) && (i < 4); i++) { 3154 if (device_create_file(dev->ddb_dev, &ddb_attrs_snr[i])) 3155 goto fail; 3156 if (device_create_file(dev->ddb_dev, &ddb_attrs_ctemp[i])) 3157 goto fail; 3158 if (dev->link[0].info->led_num) 3159 if (device_create_file(dev->ddb_dev, 3160 &ddb_attrs_led[i])) 3161 goto fail; 3162 } 3163 for (i = 0; i < 4; i++) 3164 if (dev->link[i].info && dev->link[i].info->tempmon_irq) 3165 if (device_create_file(dev->ddb_dev, 3166 &ddb_attrs_fanspeed[i])) 3167 goto fail; 3168 return 0; 3169 fail: 3170 return -1; 3171 } 3172 3173 int ddb_device_create(struct ddb *dev) 3174 { 3175 int res = 0; 3176 3177 if (ddb_num == DDB_MAX_ADAPTER) 3178 return -ENOMEM; 3179 mutex_lock(&ddb_mutex); 3180 dev->nr = ddb_num; 3181 ddbs[dev->nr] = dev; 3182 dev->ddb_dev = device_create(&ddb_class, dev->dev, 3183 MKDEV(ddb_major, dev->nr), 3184 dev, "ddbridge%d", dev->nr); 3185 if (IS_ERR(dev->ddb_dev)) { 3186 res = PTR_ERR(dev->ddb_dev); 3187 dev_info(dev->dev, "Could not create ddbridge%d\n", dev->nr); 3188 goto fail; 3189 } 3190 res = ddb_device_attrs_add(dev); 3191 if (res) { 3192 ddb_device_attrs_del(dev); 3193 device_destroy(&ddb_class, MKDEV(ddb_major, dev->nr)); 3194 ddbs[dev->nr] = NULL; 3195 dev->ddb_dev = ERR_PTR(-ENODEV); 3196 } else { 3197 ddb_num++; 3198 } 3199 fail: 3200 mutex_unlock(&ddb_mutex); 3201 return res; 3202 } 3203 3204 void ddb_device_destroy(struct ddb *dev) 3205 { 3206 if (IS_ERR(dev->ddb_dev)) 3207 return; 3208 ddb_device_attrs_del(dev); 3209 device_destroy(&ddb_class, MKDEV(ddb_major, dev->nr)); 3210 } 3211 3212 /****************************************************************************/ 3213 /****************************************************************************/ 3214 /****************************************************************************/ 3215 3216 static void tempmon_setfan(struct ddb_link *link) 3217 { 3218 u32 temp, temp2, pwm; 3219 3220 if ((ddblreadl(link, TEMPMON_CONTROL) & 3221 TEMPMON_CONTROL_OVERTEMP) != 0) { 3222 dev_info(link->dev->dev, "Over temperature condition\n"); 3223 link->overtemperature_error = 1; 3224 } 3225 temp = (ddblreadl(link, TEMPMON_SENSOR0) >> 8) & 0xFF; 3226 if (temp & 0x80) 3227 temp = 0; 3228 temp2 = (ddblreadl(link, TEMPMON_SENSOR1) >> 8) & 0xFF; 3229 if (temp2 & 0x80) 3230 temp2 = 0; 3231 if (temp2 > temp) 3232 temp = temp2; 3233 3234 pwm = (ddblreadl(link, TEMPMON_FANCONTROL) >> 8) & 0x0F; 3235 if (pwm > 10) 3236 pwm = 10; 3237 3238 if (temp >= link->temp_tab[pwm]) { 3239 while (pwm < 10 && temp >= link->temp_tab[pwm + 1]) 3240 pwm += 1; 3241 } else { 3242 while (pwm > 1 && temp < link->temp_tab[pwm - 2]) 3243 pwm -= 1; 3244 } 3245 ddblwritel(link, (pwm << 8), TEMPMON_FANCONTROL); 3246 } 3247 3248 static void temp_handler(void *data) 3249 { 3250 struct ddb_link *link = (struct ddb_link *)data; 3251 3252 spin_lock(&link->temp_lock); 3253 tempmon_setfan(link); 3254 spin_unlock(&link->temp_lock); 3255 } 3256 3257 static int tempmon_init(struct ddb_link *link, int first_time) 3258 { 3259 struct ddb *dev = link->dev; 3260 int status = 0; 3261 u32 l = link->nr; 3262 3263 spin_lock_irq(&link->temp_lock); 3264 if (first_time) { 3265 static u8 temperature_table[11] = { 3266 30, 35, 40, 45, 50, 55, 60, 65, 70, 75, 80 }; 3267 3268 memcpy(link->temp_tab, temperature_table, 3269 sizeof(temperature_table)); 3270 } 3271 ddb_irq_set(dev, l, link->info->tempmon_irq, temp_handler, link); 3272 ddblwritel(link, (TEMPMON_CONTROL_OVERTEMP | TEMPMON_CONTROL_AUTOSCAN | 3273 TEMPMON_CONTROL_INTENABLE), 3274 TEMPMON_CONTROL); 3275 ddblwritel(link, (3 << 8), TEMPMON_FANCONTROL); 3276 3277 link->overtemperature_error = 3278 ((ddblreadl(link, TEMPMON_CONTROL) & 3279 TEMPMON_CONTROL_OVERTEMP) != 0); 3280 if (link->overtemperature_error) { 3281 dev_info(link->dev->dev, "Over temperature condition\n"); 3282 status = -1; 3283 } 3284 tempmon_setfan(link); 3285 spin_unlock_irq(&link->temp_lock); 3286 return status; 3287 } 3288 3289 static int ddb_init_tempmon(struct ddb_link *link) 3290 { 3291 const struct ddb_info *info = link->info; 3292 3293 if (!info->tempmon_irq) 3294 return 0; 3295 if (info->type == DDB_OCTOPUS_MAX_CT) 3296 if (link->ids.regmapid < 0x00010002) 3297 return 0; 3298 spin_lock_init(&link->temp_lock); 3299 dev_dbg(link->dev->dev, "init_tempmon\n"); 3300 return tempmon_init(link, 1); 3301 } 3302 3303 /****************************************************************************/ 3304 /****************************************************************************/ 3305 /****************************************************************************/ 3306 3307 static int ddb_init_boards(struct ddb *dev) 3308 { 3309 const struct ddb_info *info; 3310 struct ddb_link *link; 3311 u32 l; 3312 3313 for (l = 0; l < DDB_MAX_LINK; l++) { 3314 link = &dev->link[l]; 3315 info = link->info; 3316 3317 if (!info) 3318 continue; 3319 if (info->board_control) { 3320 ddbwritel(dev, 0, DDB_LINK_TAG(l) | BOARD_CONTROL); 3321 msleep(100); 3322 ddbwritel(dev, info->board_control_2, 3323 DDB_LINK_TAG(l) | BOARD_CONTROL); 3324 usleep_range(2000, 3000); 3325 ddbwritel(dev, 3326 info->board_control_2 | info->board_control, 3327 DDB_LINK_TAG(l) | BOARD_CONTROL); 3328 usleep_range(2000, 3000); 3329 } 3330 ddb_init_tempmon(link); 3331 } 3332 return 0; 3333 } 3334 3335 int ddb_init(struct ddb *dev) 3336 { 3337 mutex_init(&dev->link[0].lnb.lock); 3338 mutex_init(&dev->link[0].flash_mutex); 3339 if (no_init) { 3340 ddb_device_create(dev); 3341 return 0; 3342 } 3343 3344 ddb_init_boards(dev); 3345 3346 if (ddb_i2c_init(dev) < 0) 3347 goto fail1; 3348 ddb_ports_init(dev); 3349 if (ddb_buffers_alloc(dev) < 0) { 3350 dev_info(dev->dev, "Could not allocate buffer memory\n"); 3351 goto fail2; 3352 } 3353 if (ddb_ports_attach(dev) < 0) 3354 goto fail3; 3355 3356 ddb_device_create(dev); 3357 3358 if (dev->link[0].info->fan_num) { 3359 ddbwritel(dev, 1, GPIO_DIRECTION); 3360 ddbwritel(dev, 1, GPIO_OUTPUT); 3361 } 3362 return 0; 3363 3364 fail3: 3365 dev_err(dev->dev, "fail3\n"); 3366 ddb_ports_detach(dev); 3367 ddb_buffers_free(dev); 3368 fail2: 3369 dev_err(dev->dev, "fail2\n"); 3370 ddb_ports_release(dev); 3371 ddb_i2c_release(dev); 3372 fail1: 3373 dev_err(dev->dev, "fail1\n"); 3374 return -1; 3375 } 3376 3377 void ddb_unmap(struct ddb *dev) 3378 { 3379 if (dev->regs) 3380 iounmap(dev->regs); 3381 vfree(dev); 3382 } 3383 3384 int ddb_exit_ddbridge(int stage, int error) 3385 { 3386 switch (stage) { 3387 default: 3388 case 2: 3389 destroy_workqueue(ddb_wq); 3390 /* fall-through */ 3391 case 1: 3392 ddb_class_destroy(); 3393 break; 3394 } 3395 3396 return error; 3397 } 3398 3399 int ddb_init_ddbridge(void) 3400 { 3401 if (dma_buf_num < 8) 3402 dma_buf_num = 8; 3403 if (dma_buf_num > 32) 3404 dma_buf_num = 32; 3405 if (dma_buf_size < 1) 3406 dma_buf_size = 1; 3407 if (dma_buf_size > 43) 3408 dma_buf_size = 43; 3409 3410 if (ddb_class_create() < 0) 3411 return -1; 3412 ddb_wq = alloc_workqueue("ddbridge", 0, 0); 3413 if (!ddb_wq) 3414 return ddb_exit_ddbridge(1, -1); 3415 3416 return 0; 3417 } 3418