1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * ddbridge-core.c: Digital Devices bridge core functions 4 * 5 * Copyright (C) 2010-2017 Digital Devices GmbH 6 * Marcus Metzler <mocm@metzlerbros.de> 7 * Ralph Metzler <rjkm@metzlerbros.de> 8 */ 9 10 #include <linux/module.h> 11 #include <linux/init.h> 12 #include <linux/interrupt.h> 13 #include <linux/delay.h> 14 #include <linux/slab.h> 15 #include <linux/poll.h> 16 #include <linux/io.h> 17 #include <linux/pci.h> 18 #include <linux/pci_ids.h> 19 #include <linux/timer.h> 20 #include <linux/i2c.h> 21 #include <linux/swab.h> 22 #include <linux/vmalloc.h> 23 24 #include "ddbridge.h" 25 #include "ddbridge-i2c.h" 26 #include "ddbridge-regs.h" 27 #include "ddbridge-max.h" 28 #include "ddbridge-ci.h" 29 #include "ddbridge-io.h" 30 31 #include "tda18271c2dd.h" 32 #include "stv6110x.h" 33 #include "stv090x.h" 34 #include "lnbh24.h" 35 #include "drxk.h" 36 #include "stv0367.h" 37 #include "stv0367_priv.h" 38 #include "cxd2841er.h" 39 #include "tda18212.h" 40 #include "stv0910.h" 41 #include "stv6111.h" 42 #include "lnbh25.h" 43 #include "cxd2099.h" 44 #include "ddbridge-dummy-fe.h" 45 46 /****************************************************************************/ 47 48 #define DDB_MAX_ADAPTER 64 49 50 /****************************************************************************/ 51 52 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr); 53 54 static int adapter_alloc; 55 module_param(adapter_alloc, int, 0444); 56 MODULE_PARM_DESC(adapter_alloc, 57 "0-one adapter per io, 1-one per tab with io, 2-one per tab, 3-one for all"); 58 59 static int ci_bitrate = 70000; 60 module_param(ci_bitrate, int, 0444); 61 MODULE_PARM_DESC(ci_bitrate, " Bitrate in KHz for output to CI."); 62 63 static int ts_loop = -1; 64 module_param(ts_loop, int, 0444); 65 MODULE_PARM_DESC(ts_loop, "TS in/out test loop on port ts_loop"); 66 67 static int xo2_speed = 2; 68 module_param(xo2_speed, int, 0444); 69 MODULE_PARM_DESC(xo2_speed, "default transfer speed for xo2 based duoflex, 0=55,1=75,2=90,3=104 MBit/s, default=2, use attribute to change for individual cards"); 70 71 #ifdef __arm__ 72 static int alt_dma = 1; 73 #else 74 static int alt_dma; 75 #endif 76 module_param(alt_dma, int, 0444); 77 MODULE_PARM_DESC(alt_dma, "use alternative DMA buffer handling"); 78 79 static int no_init; 80 module_param(no_init, int, 0444); 81 MODULE_PARM_DESC(no_init, "do not initialize most devices"); 82 83 static int stv0910_single; 84 module_param(stv0910_single, int, 0444); 85 MODULE_PARM_DESC(stv0910_single, "use stv0910 cards as single demods"); 86 87 static int dma_buf_num = 8; 88 module_param(dma_buf_num, int, 0444); 89 MODULE_PARM_DESC(dma_buf_num, "Number of DMA buffers, possible values: 8-32"); 90 91 static int dma_buf_size = 21; 92 module_param(dma_buf_size, int, 0444); 93 MODULE_PARM_DESC(dma_buf_size, 94 "DMA buffer size as multiple of 128*47, possible values: 1-43"); 95 96 static int dummy_tuner; 97 module_param(dummy_tuner, int, 0444); 98 MODULE_PARM_DESC(dummy_tuner, 99 "attach dummy tuner to port 0 on Octopus V3 or Octopus Mini cards"); 100 101 /****************************************************************************/ 102 103 static DEFINE_MUTEX(redirect_lock); 104 105 static struct workqueue_struct *ddb_wq; 106 107 static struct ddb *ddbs[DDB_MAX_ADAPTER]; 108 109 /****************************************************************************/ 110 /****************************************************************************/ 111 /****************************************************************************/ 112 113 struct ddb_irq *ddb_irq_set(struct ddb *dev, u32 link, u32 nr, 114 void (*handler)(void *), void *data) 115 { 116 struct ddb_irq *irq = &dev->link[link].irq[nr]; 117 118 irq->handler = handler; 119 irq->data = data; 120 return irq; 121 } 122 123 static void ddb_set_dma_table(struct ddb_io *io) 124 { 125 struct ddb *dev = io->port->dev; 126 struct ddb_dma *dma = io->dma; 127 u32 i; 128 u64 mem; 129 130 if (!dma) 131 return; 132 for (i = 0; i < dma->num; i++) { 133 mem = dma->pbuf[i]; 134 ddbwritel(dev, mem & 0xffffffff, dma->bufregs + i * 8); 135 ddbwritel(dev, mem >> 32, dma->bufregs + i * 8 + 4); 136 } 137 dma->bufval = ((dma->div & 0x0f) << 16) | 138 ((dma->num & 0x1f) << 11) | 139 ((dma->size >> 7) & 0x7ff); 140 } 141 142 static void ddb_set_dma_tables(struct ddb *dev) 143 { 144 u32 i; 145 146 for (i = 0; i < DDB_MAX_PORT; i++) { 147 if (dev->port[i].input[0]) 148 ddb_set_dma_table(dev->port[i].input[0]); 149 if (dev->port[i].input[1]) 150 ddb_set_dma_table(dev->port[i].input[1]); 151 if (dev->port[i].output) 152 ddb_set_dma_table(dev->port[i].output); 153 } 154 } 155 156 /****************************************************************************/ 157 /****************************************************************************/ 158 /****************************************************************************/ 159 160 static void ddb_redirect_dma(struct ddb *dev, 161 struct ddb_dma *sdma, 162 struct ddb_dma *ddma) 163 { 164 u32 i, base; 165 u64 mem; 166 167 sdma->bufval = ddma->bufval; 168 base = sdma->bufregs; 169 for (i = 0; i < ddma->num; i++) { 170 mem = ddma->pbuf[i]; 171 ddbwritel(dev, mem & 0xffffffff, base + i * 8); 172 ddbwritel(dev, mem >> 32, base + i * 8 + 4); 173 } 174 } 175 176 static int ddb_unredirect(struct ddb_port *port) 177 { 178 struct ddb_input *oredi, *iredi = NULL; 179 struct ddb_output *iredo = NULL; 180 181 /* dev_info(port->dev->dev, 182 * "unredirect %d.%d\n", port->dev->nr, port->nr); 183 */ 184 mutex_lock(&redirect_lock); 185 if (port->output->dma->running) { 186 mutex_unlock(&redirect_lock); 187 return -EBUSY; 188 } 189 oredi = port->output->redi; 190 if (!oredi) 191 goto done; 192 if (port->input[0]) { 193 iredi = port->input[0]->redi; 194 iredo = port->input[0]->redo; 195 196 if (iredo) { 197 iredo->port->output->redi = oredi; 198 if (iredo->port->input[0]) { 199 iredo->port->input[0]->redi = iredi; 200 ddb_redirect_dma(oredi->port->dev, 201 oredi->dma, iredo->dma); 202 } 203 port->input[0]->redo = NULL; 204 ddb_set_dma_table(port->input[0]); 205 } 206 oredi->redi = iredi; 207 port->input[0]->redi = NULL; 208 } 209 oredi->redo = NULL; 210 port->output->redi = NULL; 211 212 ddb_set_dma_table(oredi); 213 done: 214 mutex_unlock(&redirect_lock); 215 return 0; 216 } 217 218 static int ddb_redirect(u32 i, u32 p) 219 { 220 struct ddb *idev = ddbs[(i >> 4) & 0x3f]; 221 struct ddb_input *input, *input2; 222 struct ddb *pdev = ddbs[(p >> 4) & 0x3f]; 223 struct ddb_port *port; 224 225 if (!idev || !pdev) 226 return -EINVAL; 227 if (!idev->has_dma || !pdev->has_dma) 228 return -EINVAL; 229 230 port = &pdev->port[p & 0x0f]; 231 if (!port->output) 232 return -EINVAL; 233 if (ddb_unredirect(port)) 234 return -EBUSY; 235 236 if (i == 8) 237 return 0; 238 239 input = &idev->input[i & 7]; 240 if (!input) 241 return -EINVAL; 242 243 mutex_lock(&redirect_lock); 244 if (port->output->dma->running || input->dma->running) { 245 mutex_unlock(&redirect_lock); 246 return -EBUSY; 247 } 248 input2 = port->input[0]; 249 if (input2) { 250 if (input->redi) { 251 input2->redi = input->redi; 252 input->redi = NULL; 253 } else { 254 input2->redi = input; 255 } 256 } 257 input->redo = port->output; 258 port->output->redi = input; 259 260 ddb_redirect_dma(input->port->dev, input->dma, port->output->dma); 261 mutex_unlock(&redirect_lock); 262 return 0; 263 } 264 265 /****************************************************************************/ 266 /****************************************************************************/ 267 /****************************************************************************/ 268 269 static void dma_free(struct pci_dev *pdev, struct ddb_dma *dma, int dir) 270 { 271 int i; 272 273 if (!dma) 274 return; 275 for (i = 0; i < dma->num; i++) { 276 if (dma->vbuf[i]) { 277 if (alt_dma) { 278 dma_unmap_single(&pdev->dev, dma->pbuf[i], 279 dma->size, 280 dir ? DMA_TO_DEVICE : 281 DMA_FROM_DEVICE); 282 kfree(dma->vbuf[i]); 283 dma->vbuf[i] = NULL; 284 } else { 285 dma_free_coherent(&pdev->dev, dma->size, 286 dma->vbuf[i], dma->pbuf[i]); 287 } 288 289 dma->vbuf[i] = NULL; 290 } 291 } 292 } 293 294 static int dma_alloc(struct pci_dev *pdev, struct ddb_dma *dma, int dir) 295 { 296 int i; 297 298 if (!dma) 299 return 0; 300 for (i = 0; i < dma->num; i++) { 301 if (alt_dma) { 302 dma->vbuf[i] = kmalloc(dma->size, __GFP_RETRY_MAYFAIL); 303 if (!dma->vbuf[i]) 304 return -ENOMEM; 305 dma->pbuf[i] = dma_map_single(&pdev->dev, 306 dma->vbuf[i], 307 dma->size, 308 dir ? DMA_TO_DEVICE : 309 DMA_FROM_DEVICE); 310 if (dma_mapping_error(&pdev->dev, dma->pbuf[i])) { 311 kfree(dma->vbuf[i]); 312 dma->vbuf[i] = NULL; 313 return -ENOMEM; 314 } 315 } else { 316 dma->vbuf[i] = dma_alloc_coherent(&pdev->dev, 317 dma->size, 318 &dma->pbuf[i], 319 GFP_KERNEL); 320 if (!dma->vbuf[i]) 321 return -ENOMEM; 322 } 323 } 324 return 0; 325 } 326 327 int ddb_buffers_alloc(struct ddb *dev) 328 { 329 int i; 330 struct ddb_port *port; 331 332 for (i = 0; i < dev->port_num; i++) { 333 port = &dev->port[i]; 334 switch (port->class) { 335 case DDB_PORT_TUNER: 336 if (port->input[0]->dma) 337 if (dma_alloc(dev->pdev, port->input[0]->dma, 0) 338 < 0) 339 return -1; 340 if (port->input[1]->dma) 341 if (dma_alloc(dev->pdev, port->input[1]->dma, 0) 342 < 0) 343 return -1; 344 break; 345 case DDB_PORT_CI: 346 case DDB_PORT_LOOP: 347 if (port->input[0]->dma) 348 if (dma_alloc(dev->pdev, port->input[0]->dma, 0) 349 < 0) 350 return -1; 351 if (port->output->dma) 352 if (dma_alloc(dev->pdev, port->output->dma, 1) 353 < 0) 354 return -1; 355 break; 356 default: 357 break; 358 } 359 } 360 ddb_set_dma_tables(dev); 361 return 0; 362 } 363 364 void ddb_buffers_free(struct ddb *dev) 365 { 366 int i; 367 struct ddb_port *port; 368 369 for (i = 0; i < dev->port_num; i++) { 370 port = &dev->port[i]; 371 372 if (port->input[0] && port->input[0]->dma) 373 dma_free(dev->pdev, port->input[0]->dma, 0); 374 if (port->input[1] && port->input[1]->dma) 375 dma_free(dev->pdev, port->input[1]->dma, 0); 376 if (port->output && port->output->dma) 377 dma_free(dev->pdev, port->output->dma, 1); 378 } 379 } 380 381 static void calc_con(struct ddb_output *output, u32 *con, u32 *con2, u32 flags) 382 { 383 struct ddb *dev = output->port->dev; 384 u32 bitrate = output->port->obr, max_bitrate = 72000; 385 u32 gap = 4, nco = 0; 386 387 *con = 0x1c; 388 if (output->port->gap != 0xffffffff) { 389 flags |= 1; 390 gap = output->port->gap; 391 max_bitrate = 0; 392 } 393 if (dev->link[0].info->type == DDB_OCTOPUS_CI && output->port->nr > 1) { 394 *con = 0x10c; 395 if (dev->link[0].ids.regmapid >= 0x10003 && !(flags & 1)) { 396 if (!(flags & 2)) { 397 /* NCO */ 398 max_bitrate = 0; 399 gap = 0; 400 if (bitrate != 72000) { 401 if (bitrate >= 96000) { 402 *con |= 0x800; 403 } else { 404 *con |= 0x1000; 405 nco = (bitrate * 8192 + 71999) 406 / 72000; 407 } 408 } 409 } else { 410 /* Divider and gap */ 411 *con |= 0x1810; 412 if (bitrate <= 64000) { 413 max_bitrate = 64000; 414 nco = 8; 415 } else if (bitrate <= 72000) { 416 max_bitrate = 72000; 417 nco = 7; 418 } else { 419 max_bitrate = 96000; 420 nco = 5; 421 } 422 } 423 } else { 424 if (bitrate > 72000) { 425 *con |= 0x810; /* 96 MBit/s and gap */ 426 max_bitrate = 96000; 427 } 428 *con |= 0x10; /* enable gap */ 429 } 430 } 431 if (max_bitrate > 0) { 432 if (bitrate > max_bitrate) 433 bitrate = max_bitrate; 434 if (bitrate < 31000) 435 bitrate = 31000; 436 gap = ((max_bitrate - bitrate) * 94) / bitrate; 437 if (gap < 2) 438 *con &= ~0x10; /* Disable gap */ 439 else 440 gap -= 2; 441 if (gap > 127) 442 gap = 127; 443 } 444 445 *con2 = (nco << 16) | gap; 446 } 447 448 static void ddb_output_start(struct ddb_output *output) 449 { 450 struct ddb *dev = output->port->dev; 451 u32 con = 0x11c, con2 = 0; 452 453 spin_lock_irq(&output->dma->lock); 454 output->dma->cbuf = 0; 455 output->dma->coff = 0; 456 output->dma->stat = 0; 457 ddbwritel(dev, 0, DMA_BUFFER_CONTROL(output->dma)); 458 459 if (output->port->input[0]->port->class == DDB_PORT_LOOP) 460 con = (1UL << 13) | 0x14; 461 else 462 calc_con(output, &con, &con2, 0); 463 464 ddbwritel(dev, 0, TS_CONTROL(output)); 465 ddbwritel(dev, 2, TS_CONTROL(output)); 466 ddbwritel(dev, 0, TS_CONTROL(output)); 467 ddbwritel(dev, con, TS_CONTROL(output)); 468 ddbwritel(dev, con2, TS_CONTROL2(output)); 469 470 ddbwritel(dev, output->dma->bufval, 471 DMA_BUFFER_SIZE(output->dma)); 472 ddbwritel(dev, 0, DMA_BUFFER_ACK(output->dma)); 473 ddbwritel(dev, 1, DMA_BASE_READ); 474 ddbwritel(dev, 7, DMA_BUFFER_CONTROL(output->dma)); 475 476 ddbwritel(dev, con | 1, TS_CONTROL(output)); 477 478 output->dma->running = 1; 479 spin_unlock_irq(&output->dma->lock); 480 } 481 482 static void ddb_output_stop(struct ddb_output *output) 483 { 484 struct ddb *dev = output->port->dev; 485 486 spin_lock_irq(&output->dma->lock); 487 488 ddbwritel(dev, 0, TS_CONTROL(output)); 489 490 ddbwritel(dev, 0, DMA_BUFFER_CONTROL(output->dma)); 491 output->dma->running = 0; 492 spin_unlock_irq(&output->dma->lock); 493 } 494 495 static void ddb_input_stop(struct ddb_input *input) 496 { 497 struct ddb *dev = input->port->dev; 498 u32 tag = DDB_LINK_TAG(input->port->lnr); 499 500 spin_lock_irq(&input->dma->lock); 501 502 ddbwritel(dev, 0, tag | TS_CONTROL(input)); 503 504 ddbwritel(dev, 0, DMA_BUFFER_CONTROL(input->dma)); 505 input->dma->running = 0; 506 spin_unlock_irq(&input->dma->lock); 507 } 508 509 static void ddb_input_start(struct ddb_input *input) 510 { 511 struct ddb *dev = input->port->dev; 512 513 spin_lock_irq(&input->dma->lock); 514 input->dma->cbuf = 0; 515 input->dma->coff = 0; 516 input->dma->stat = 0; 517 ddbwritel(dev, 0, DMA_BUFFER_CONTROL(input->dma)); 518 519 ddbwritel(dev, 0, TS_CONTROL(input)); 520 ddbwritel(dev, 2, TS_CONTROL(input)); 521 ddbwritel(dev, 0, TS_CONTROL(input)); 522 523 ddbwritel(dev, input->dma->bufval, 524 DMA_BUFFER_SIZE(input->dma)); 525 ddbwritel(dev, 0, DMA_BUFFER_ACK(input->dma)); 526 ddbwritel(dev, 1, DMA_BASE_WRITE); 527 ddbwritel(dev, 3, DMA_BUFFER_CONTROL(input->dma)); 528 529 ddbwritel(dev, 0x09, TS_CONTROL(input)); 530 531 if (input->port->type == DDB_TUNER_DUMMY) 532 ddbwritel(dev, 0x000fff01, TS_CONTROL2(input)); 533 534 input->dma->running = 1; 535 spin_unlock_irq(&input->dma->lock); 536 } 537 538 static void ddb_input_start_all(struct ddb_input *input) 539 { 540 struct ddb_input *i = input; 541 struct ddb_output *o; 542 543 mutex_lock(&redirect_lock); 544 while (i && (o = i->redo)) { 545 ddb_output_start(o); 546 i = o->port->input[0]; 547 if (i) 548 ddb_input_start(i); 549 } 550 ddb_input_start(input); 551 mutex_unlock(&redirect_lock); 552 } 553 554 static void ddb_input_stop_all(struct ddb_input *input) 555 { 556 struct ddb_input *i = input; 557 struct ddb_output *o; 558 559 mutex_lock(&redirect_lock); 560 ddb_input_stop(input); 561 while (i && (o = i->redo)) { 562 ddb_output_stop(o); 563 i = o->port->input[0]; 564 if (i) 565 ddb_input_stop(i); 566 } 567 mutex_unlock(&redirect_lock); 568 } 569 570 static u32 ddb_output_free(struct ddb_output *output) 571 { 572 u32 idx, off, stat = output->dma->stat; 573 s32 diff; 574 575 idx = (stat >> 11) & 0x1f; 576 off = (stat & 0x7ff) << 7; 577 578 if (output->dma->cbuf != idx) { 579 if ((((output->dma->cbuf + 1) % output->dma->num) == idx) && 580 (output->dma->size - output->dma->coff <= (2 * 188))) 581 return 0; 582 return 188; 583 } 584 diff = off - output->dma->coff; 585 if (diff <= 0 || diff > (2 * 188)) 586 return 188; 587 return 0; 588 } 589 590 static ssize_t ddb_output_write(struct ddb_output *output, 591 const __user u8 *buf, size_t count) 592 { 593 struct ddb *dev = output->port->dev; 594 u32 idx, off, stat = output->dma->stat; 595 u32 left = count, len; 596 597 idx = (stat >> 11) & 0x1f; 598 off = (stat & 0x7ff) << 7; 599 600 while (left) { 601 len = output->dma->size - output->dma->coff; 602 if ((((output->dma->cbuf + 1) % output->dma->num) == idx) && 603 off == 0) { 604 if (len <= 188) 605 break; 606 len -= 188; 607 } 608 if (output->dma->cbuf == idx) { 609 if (off > output->dma->coff) { 610 len = off - output->dma->coff; 611 len -= (len % 188); 612 if (len <= 188) 613 break; 614 len -= 188; 615 } 616 } 617 if (len > left) 618 len = left; 619 if (copy_from_user(output->dma->vbuf[output->dma->cbuf] + 620 output->dma->coff, 621 buf, len)) 622 return -EIO; 623 if (alt_dma) 624 dma_sync_single_for_device( 625 dev->dev, 626 output->dma->pbuf[output->dma->cbuf], 627 output->dma->size, DMA_TO_DEVICE); 628 left -= len; 629 buf += len; 630 output->dma->coff += len; 631 if (output->dma->coff == output->dma->size) { 632 output->dma->coff = 0; 633 output->dma->cbuf = ((output->dma->cbuf + 1) % 634 output->dma->num); 635 } 636 ddbwritel(dev, 637 (output->dma->cbuf << 11) | 638 (output->dma->coff >> 7), 639 DMA_BUFFER_ACK(output->dma)); 640 } 641 return count - left; 642 } 643 644 static u32 ddb_input_avail(struct ddb_input *input) 645 { 646 struct ddb *dev = input->port->dev; 647 u32 idx, off, stat = input->dma->stat; 648 u32 ctrl = ddbreadl(dev, DMA_BUFFER_CONTROL(input->dma)); 649 650 idx = (stat >> 11) & 0x1f; 651 off = (stat & 0x7ff) << 7; 652 653 if (ctrl & 4) { 654 dev_err(dev->dev, "IA %d %d %08x\n", idx, off, ctrl); 655 ddbwritel(dev, stat, DMA_BUFFER_ACK(input->dma)); 656 return 0; 657 } 658 if (input->dma->cbuf != idx) 659 return 188; 660 return 0; 661 } 662 663 static ssize_t ddb_input_read(struct ddb_input *input, 664 __user u8 *buf, size_t count) 665 { 666 struct ddb *dev = input->port->dev; 667 u32 left = count; 668 u32 idx, free, stat = input->dma->stat; 669 int ret; 670 671 idx = (stat >> 11) & 0x1f; 672 673 while (left) { 674 if (input->dma->cbuf == idx) 675 return count - left; 676 free = input->dma->size - input->dma->coff; 677 if (free > left) 678 free = left; 679 if (alt_dma) 680 dma_sync_single_for_cpu( 681 dev->dev, 682 input->dma->pbuf[input->dma->cbuf], 683 input->dma->size, DMA_FROM_DEVICE); 684 ret = copy_to_user(buf, input->dma->vbuf[input->dma->cbuf] + 685 input->dma->coff, free); 686 if (ret) 687 return -EFAULT; 688 input->dma->coff += free; 689 if (input->dma->coff == input->dma->size) { 690 input->dma->coff = 0; 691 input->dma->cbuf = (input->dma->cbuf + 1) % 692 input->dma->num; 693 } 694 left -= free; 695 buf += free; 696 ddbwritel(dev, 697 (input->dma->cbuf << 11) | (input->dma->coff >> 7), 698 DMA_BUFFER_ACK(input->dma)); 699 } 700 return count; 701 } 702 703 /****************************************************************************/ 704 /****************************************************************************/ 705 706 static ssize_t ts_write(struct file *file, const __user char *buf, 707 size_t count, loff_t *ppos) 708 { 709 struct dvb_device *dvbdev = file->private_data; 710 struct ddb_output *output = dvbdev->priv; 711 struct ddb *dev = output->port->dev; 712 size_t left = count; 713 int stat; 714 715 if (!dev->has_dma) 716 return -EINVAL; 717 while (left) { 718 if (ddb_output_free(output) < 188) { 719 if (file->f_flags & O_NONBLOCK) 720 break; 721 if (wait_event_interruptible( 722 output->dma->wq, 723 ddb_output_free(output) >= 188) < 0) 724 break; 725 } 726 stat = ddb_output_write(output, buf, left); 727 if (stat < 0) 728 return stat; 729 buf += stat; 730 left -= stat; 731 } 732 return (left == count) ? -EAGAIN : (count - left); 733 } 734 735 static ssize_t ts_read(struct file *file, __user char *buf, 736 size_t count, loff_t *ppos) 737 { 738 struct dvb_device *dvbdev = file->private_data; 739 struct ddb_output *output = dvbdev->priv; 740 struct ddb_input *input = output->port->input[0]; 741 struct ddb *dev = output->port->dev; 742 size_t left = count; 743 int stat; 744 745 if (!dev->has_dma) 746 return -EINVAL; 747 while (left) { 748 if (ddb_input_avail(input) < 188) { 749 if (file->f_flags & O_NONBLOCK) 750 break; 751 if (wait_event_interruptible( 752 input->dma->wq, 753 ddb_input_avail(input) >= 188) < 0) 754 break; 755 } 756 stat = ddb_input_read(input, buf, left); 757 if (stat < 0) 758 return stat; 759 left -= stat; 760 buf += stat; 761 } 762 return (count && (left == count)) ? -EAGAIN : (count - left); 763 } 764 765 static __poll_t ts_poll(struct file *file, poll_table *wait) 766 { 767 struct dvb_device *dvbdev = file->private_data; 768 struct ddb_output *output = dvbdev->priv; 769 struct ddb_input *input = output->port->input[0]; 770 771 __poll_t mask = 0; 772 773 poll_wait(file, &input->dma->wq, wait); 774 poll_wait(file, &output->dma->wq, wait); 775 if (ddb_input_avail(input) >= 188) 776 mask |= EPOLLIN | EPOLLRDNORM; 777 if (ddb_output_free(output) >= 188) 778 mask |= EPOLLOUT | EPOLLWRNORM; 779 return mask; 780 } 781 782 static int ts_release(struct inode *inode, struct file *file) 783 { 784 struct dvb_device *dvbdev = file->private_data; 785 struct ddb_output *output = NULL; 786 struct ddb_input *input = NULL; 787 788 if (dvbdev) { 789 output = dvbdev->priv; 790 input = output->port->input[0]; 791 } 792 793 if ((file->f_flags & O_ACCMODE) == O_RDONLY) { 794 if (!input) 795 return -EINVAL; 796 ddb_input_stop(input); 797 } else if ((file->f_flags & O_ACCMODE) == O_WRONLY) { 798 if (!output) 799 return -EINVAL; 800 ddb_output_stop(output); 801 } 802 return dvb_generic_release(inode, file); 803 } 804 805 static int ts_open(struct inode *inode, struct file *file) 806 { 807 int err; 808 struct dvb_device *dvbdev = file->private_data; 809 struct ddb_output *output = NULL; 810 struct ddb_input *input = NULL; 811 812 if (dvbdev) { 813 output = dvbdev->priv; 814 input = output->port->input[0]; 815 } 816 817 if ((file->f_flags & O_ACCMODE) == O_RDONLY) { 818 if (!input) 819 return -EINVAL; 820 if (input->redo || input->redi) 821 return -EBUSY; 822 } else if ((file->f_flags & O_ACCMODE) == O_WRONLY) { 823 if (!output) 824 return -EINVAL; 825 } else { 826 return -EINVAL; 827 } 828 829 err = dvb_generic_open(inode, file); 830 if (err < 0) 831 return err; 832 if ((file->f_flags & O_ACCMODE) == O_RDONLY) 833 ddb_input_start(input); 834 else if ((file->f_flags & O_ACCMODE) == O_WRONLY) 835 ddb_output_start(output); 836 return err; 837 } 838 839 static const struct file_operations ci_fops = { 840 .owner = THIS_MODULE, 841 .read = ts_read, 842 .write = ts_write, 843 .open = ts_open, 844 .release = ts_release, 845 .poll = ts_poll, 846 .mmap = NULL, 847 }; 848 849 static struct dvb_device dvbdev_ci = { 850 .priv = NULL, 851 .readers = 1, 852 .writers = 1, 853 .users = 2, 854 .fops = &ci_fops, 855 }; 856 857 /****************************************************************************/ 858 /****************************************************************************/ 859 860 static int locked_gate_ctrl(struct dvb_frontend *fe, int enable) 861 { 862 struct ddb_input *input = fe->sec_priv; 863 struct ddb_port *port = input->port; 864 struct ddb_dvb *dvb = &port->dvb[input->nr & 1]; 865 int status; 866 867 if (enable) { 868 mutex_lock(&port->i2c_gate_lock); 869 status = dvb->i2c_gate_ctrl(fe, 1); 870 } else { 871 status = dvb->i2c_gate_ctrl(fe, 0); 872 mutex_unlock(&port->i2c_gate_lock); 873 } 874 return status; 875 } 876 877 static int demod_attach_drxk(struct ddb_input *input) 878 { 879 struct i2c_adapter *i2c = &input->port->i2c->adap; 880 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 881 struct device *dev = input->port->dev->dev; 882 struct drxk_config config; 883 884 memset(&config, 0, sizeof(config)); 885 config.adr = 0x29 + (input->nr & 1); 886 config.microcode_name = "drxk_a3.mc"; 887 888 dvb->fe = dvb_attach(drxk_attach, &config, i2c); 889 if (!dvb->fe) { 890 dev_err(dev, "No DRXK found!\n"); 891 return -ENODEV; 892 } 893 dvb->fe->sec_priv = input; 894 dvb->i2c_gate_ctrl = dvb->fe->ops.i2c_gate_ctrl; 895 dvb->fe->ops.i2c_gate_ctrl = locked_gate_ctrl; 896 return 0; 897 } 898 899 static int tuner_attach_tda18271(struct ddb_input *input) 900 { 901 struct i2c_adapter *i2c = &input->port->i2c->adap; 902 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 903 struct device *dev = input->port->dev->dev; 904 struct dvb_frontend *fe; 905 906 if (dvb->fe->ops.i2c_gate_ctrl) 907 dvb->fe->ops.i2c_gate_ctrl(dvb->fe, 1); 908 fe = dvb_attach(tda18271c2dd_attach, dvb->fe, i2c, 0x60); 909 if (dvb->fe->ops.i2c_gate_ctrl) 910 dvb->fe->ops.i2c_gate_ctrl(dvb->fe, 0); 911 if (!fe) { 912 dev_err(dev, "No TDA18271 found!\n"); 913 return -ENODEV; 914 } 915 return 0; 916 } 917 918 /******************************************************************************/ 919 /******************************************************************************/ 920 /******************************************************************************/ 921 922 static struct stv0367_config ddb_stv0367_config[] = { 923 { 924 .demod_address = 0x1f, 925 .xtal = 27000000, 926 .if_khz = 0, 927 .if_iq_mode = FE_TER_NORMAL_IF_TUNER, 928 .ts_mode = STV0367_SERIAL_PUNCT_CLOCK, 929 .clk_pol = STV0367_CLOCKPOLARITY_DEFAULT, 930 }, { 931 .demod_address = 0x1e, 932 .xtal = 27000000, 933 .if_khz = 0, 934 .if_iq_mode = FE_TER_NORMAL_IF_TUNER, 935 .ts_mode = STV0367_SERIAL_PUNCT_CLOCK, 936 .clk_pol = STV0367_CLOCKPOLARITY_DEFAULT, 937 }, 938 }; 939 940 static int demod_attach_stv0367(struct ddb_input *input) 941 { 942 struct i2c_adapter *i2c = &input->port->i2c->adap; 943 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 944 struct device *dev = input->port->dev->dev; 945 946 /* attach frontend */ 947 dvb->fe = dvb_attach(stv0367ddb_attach, 948 &ddb_stv0367_config[(input->nr & 1)], i2c); 949 950 if (!dvb->fe) { 951 dev_err(dev, "No stv0367 found!\n"); 952 return -ENODEV; 953 } 954 dvb->fe->sec_priv = input; 955 dvb->i2c_gate_ctrl = dvb->fe->ops.i2c_gate_ctrl; 956 dvb->fe->ops.i2c_gate_ctrl = locked_gate_ctrl; 957 return 0; 958 } 959 960 static int tuner_tda18212_ping(struct ddb_input *input, unsigned short adr) 961 { 962 struct i2c_adapter *adapter = &input->port->i2c->adap; 963 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 964 struct device *dev = input->port->dev->dev; 965 u8 tda_id[2]; 966 u8 subaddr = 0x00; 967 968 dev_dbg(dev, "stv0367-tda18212 tuner ping\n"); 969 if (dvb->fe->ops.i2c_gate_ctrl) 970 dvb->fe->ops.i2c_gate_ctrl(dvb->fe, 1); 971 972 if (i2c_read_regs(adapter, adr, subaddr, tda_id, sizeof(tda_id)) < 0) 973 dev_dbg(dev, "tda18212 ping 1 fail\n"); 974 if (i2c_read_regs(adapter, adr, subaddr, tda_id, sizeof(tda_id)) < 0) 975 dev_warn(dev, "tda18212 ping failed, expect problems\n"); 976 977 if (dvb->fe->ops.i2c_gate_ctrl) 978 dvb->fe->ops.i2c_gate_ctrl(dvb->fe, 0); 979 980 return 0; 981 } 982 983 static int demod_attach_cxd28xx(struct ddb_input *input, int par, int osc24) 984 { 985 struct i2c_adapter *i2c = &input->port->i2c->adap; 986 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 987 struct device *dev = input->port->dev->dev; 988 struct cxd2841er_config cfg; 989 990 /* the cxd2841er driver expects 8bit/shifted I2C addresses */ 991 cfg.i2c_addr = ((input->nr & 1) ? 0x6d : 0x6c) << 1; 992 993 cfg.xtal = osc24 ? SONY_XTAL_24000 : SONY_XTAL_20500; 994 cfg.flags = CXD2841ER_AUTO_IFHZ | CXD2841ER_EARLY_TUNE | 995 CXD2841ER_NO_WAIT_LOCK | CXD2841ER_NO_AGCNEG | 996 CXD2841ER_TSBITS; 997 998 if (!par) 999 cfg.flags |= CXD2841ER_TS_SERIAL; 1000 1001 /* attach frontend */ 1002 dvb->fe = dvb_attach(cxd2841er_attach_t_c, &cfg, i2c); 1003 1004 if (!dvb->fe) { 1005 dev_err(dev, "No cxd2837/38/43/54 found!\n"); 1006 return -ENODEV; 1007 } 1008 dvb->fe->sec_priv = input; 1009 dvb->i2c_gate_ctrl = dvb->fe->ops.i2c_gate_ctrl; 1010 dvb->fe->ops.i2c_gate_ctrl = locked_gate_ctrl; 1011 return 0; 1012 } 1013 1014 static int tuner_attach_tda18212(struct ddb_input *input, u32 porttype) 1015 { 1016 struct i2c_adapter *adapter = &input->port->i2c->adap; 1017 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 1018 struct device *dev = input->port->dev->dev; 1019 struct i2c_client *client; 1020 struct tda18212_config config = { 1021 .fe = dvb->fe, 1022 .if_dvbt_6 = 3550, 1023 .if_dvbt_7 = 3700, 1024 .if_dvbt_8 = 4150, 1025 .if_dvbt2_6 = 3250, 1026 .if_dvbt2_7 = 4000, 1027 .if_dvbt2_8 = 4000, 1028 .if_dvbc = 5000, 1029 }; 1030 u8 addr = (input->nr & 1) ? 0x63 : 0x60; 1031 1032 /* due to a hardware quirk with the I2C gate on the stv0367+tda18212 1033 * combo, the tda18212 must be probed by reading it's id _twice_ when 1034 * cold started, or it very likely will fail. 1035 */ 1036 if (porttype == DDB_TUNER_DVBCT_ST) 1037 tuner_tda18212_ping(input, addr); 1038 1039 /* perform tuner probe/init/attach */ 1040 client = dvb_module_probe("tda18212", NULL, adapter, addr, &config); 1041 if (!client) 1042 goto err; 1043 1044 dvb->i2c_client[0] = client; 1045 return 0; 1046 err: 1047 dev_err(dev, "TDA18212 tuner not found. Device is not fully operational.\n"); 1048 return -ENODEV; 1049 } 1050 1051 /****************************************************************************/ 1052 /****************************************************************************/ 1053 /****************************************************************************/ 1054 1055 static struct stv090x_config stv0900 = { 1056 .device = STV0900, 1057 .demod_mode = STV090x_DUAL, 1058 .clk_mode = STV090x_CLK_EXT, 1059 1060 .xtal = 27000000, 1061 .address = 0x69, 1062 1063 .ts1_mode = STV090x_TSMODE_SERIAL_PUNCTURED, 1064 .ts2_mode = STV090x_TSMODE_SERIAL_PUNCTURED, 1065 1066 .ts1_tei = 1, 1067 .ts2_tei = 1, 1068 1069 .repeater_level = STV090x_RPTLEVEL_16, 1070 1071 .adc1_range = STV090x_ADC_1Vpp, 1072 .adc2_range = STV090x_ADC_1Vpp, 1073 1074 .diseqc_envelope_mode = true, 1075 }; 1076 1077 static struct stv090x_config stv0900_aa = { 1078 .device = STV0900, 1079 .demod_mode = STV090x_DUAL, 1080 .clk_mode = STV090x_CLK_EXT, 1081 1082 .xtal = 27000000, 1083 .address = 0x68, 1084 1085 .ts1_mode = STV090x_TSMODE_SERIAL_PUNCTURED, 1086 .ts2_mode = STV090x_TSMODE_SERIAL_PUNCTURED, 1087 1088 .ts1_tei = 1, 1089 .ts2_tei = 1, 1090 1091 .repeater_level = STV090x_RPTLEVEL_16, 1092 1093 .adc1_range = STV090x_ADC_1Vpp, 1094 .adc2_range = STV090x_ADC_1Vpp, 1095 1096 .diseqc_envelope_mode = true, 1097 }; 1098 1099 static struct stv6110x_config stv6110a = { 1100 .addr = 0x60, 1101 .refclk = 27000000, 1102 .clk_div = 1, 1103 }; 1104 1105 static struct stv6110x_config stv6110b = { 1106 .addr = 0x63, 1107 .refclk = 27000000, 1108 .clk_div = 1, 1109 }; 1110 1111 static int demod_attach_stv0900(struct ddb_input *input, int type) 1112 { 1113 struct i2c_adapter *i2c = &input->port->i2c->adap; 1114 struct stv090x_config *feconf = type ? &stv0900_aa : &stv0900; 1115 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 1116 struct device *dev = input->port->dev->dev; 1117 1118 dvb->fe = dvb_attach(stv090x_attach, feconf, i2c, 1119 (input->nr & 1) ? STV090x_DEMODULATOR_1 1120 : STV090x_DEMODULATOR_0); 1121 if (!dvb->fe) { 1122 dev_err(dev, "No STV0900 found!\n"); 1123 return -ENODEV; 1124 } 1125 if (!dvb_attach(lnbh24_attach, dvb->fe, i2c, 0, 1126 0, (input->nr & 1) ? 1127 (0x09 - type) : (0x0b - type))) { 1128 dev_err(dev, "No LNBH24 found!\n"); 1129 dvb_frontend_detach(dvb->fe); 1130 return -ENODEV; 1131 } 1132 return 0; 1133 } 1134 1135 static int tuner_attach_stv6110(struct ddb_input *input, int type) 1136 { 1137 struct i2c_adapter *i2c = &input->port->i2c->adap; 1138 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 1139 struct device *dev = input->port->dev->dev; 1140 struct stv090x_config *feconf = type ? &stv0900_aa : &stv0900; 1141 struct stv6110x_config *tunerconf = (input->nr & 1) ? 1142 &stv6110b : &stv6110a; 1143 const struct stv6110x_devctl *ctl; 1144 1145 ctl = dvb_attach(stv6110x_attach, dvb->fe, tunerconf, i2c); 1146 if (!ctl) { 1147 dev_err(dev, "No STV6110X found!\n"); 1148 return -ENODEV; 1149 } 1150 dev_info(dev, "attach tuner input %d adr %02x\n", 1151 input->nr, tunerconf->addr); 1152 1153 feconf->tuner_init = ctl->tuner_init; 1154 feconf->tuner_sleep = ctl->tuner_sleep; 1155 feconf->tuner_set_mode = ctl->tuner_set_mode; 1156 feconf->tuner_set_frequency = ctl->tuner_set_frequency; 1157 feconf->tuner_get_frequency = ctl->tuner_get_frequency; 1158 feconf->tuner_set_bandwidth = ctl->tuner_set_bandwidth; 1159 feconf->tuner_get_bandwidth = ctl->tuner_get_bandwidth; 1160 feconf->tuner_set_bbgain = ctl->tuner_set_bbgain; 1161 feconf->tuner_get_bbgain = ctl->tuner_get_bbgain; 1162 feconf->tuner_set_refclk = ctl->tuner_set_refclk; 1163 feconf->tuner_get_status = ctl->tuner_get_status; 1164 1165 return 0; 1166 } 1167 1168 static const struct stv0910_cfg stv0910_p = { 1169 .adr = 0x68, 1170 .parallel = 1, 1171 .rptlvl = 4, 1172 .clk = 30000000, 1173 .tsspeed = 0x28, 1174 }; 1175 1176 static const struct lnbh25_config lnbh25_cfg = { 1177 .i2c_address = 0x0c << 1, 1178 .data2_config = LNBH25_TEN 1179 }; 1180 1181 static int has_lnbh25(struct i2c_adapter *i2c, u8 adr) 1182 { 1183 u8 val; 1184 1185 return i2c_read_reg(i2c, adr, 0, &val) ? 0 : 1; 1186 } 1187 1188 static int demod_attach_stv0910(struct ddb_input *input, int type, int tsfast) 1189 { 1190 struct i2c_adapter *i2c = &input->port->i2c->adap; 1191 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 1192 struct device *dev = input->port->dev->dev; 1193 struct stv0910_cfg cfg = stv0910_p; 1194 struct lnbh25_config lnbcfg = lnbh25_cfg; 1195 1196 if (stv0910_single) 1197 cfg.single = 1; 1198 1199 if (type) 1200 cfg.parallel = 2; 1201 1202 if (tsfast) { 1203 dev_info(dev, "Enabling stv0910 higher speed TS\n"); 1204 cfg.tsspeed = 0x10; 1205 } 1206 1207 dvb->fe = dvb_attach(stv0910_attach, i2c, &cfg, (input->nr & 1)); 1208 if (!dvb->fe) { 1209 cfg.adr = 0x6c; 1210 dvb->fe = dvb_attach(stv0910_attach, i2c, 1211 &cfg, (input->nr & 1)); 1212 } 1213 if (!dvb->fe) { 1214 dev_err(dev, "No STV0910 found!\n"); 1215 return -ENODEV; 1216 } 1217 1218 /* attach lnbh25 - leftshift by one as the lnbh25 driver expects 8bit 1219 * i2c addresses 1220 */ 1221 if (has_lnbh25(i2c, 0x0d)) 1222 lnbcfg.i2c_address = (((input->nr & 1) ? 0x0d : 0x0c) << 1); 1223 else 1224 lnbcfg.i2c_address = (((input->nr & 1) ? 0x09 : 0x08) << 1); 1225 1226 if (!dvb_attach(lnbh25_attach, dvb->fe, &lnbcfg, i2c)) { 1227 dev_err(dev, "No LNBH25 found!\n"); 1228 dvb_frontend_detach(dvb->fe); 1229 return -ENODEV; 1230 } 1231 1232 return 0; 1233 } 1234 1235 static int tuner_attach_stv6111(struct ddb_input *input, int type) 1236 { 1237 struct i2c_adapter *i2c = &input->port->i2c->adap; 1238 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 1239 struct device *dev = input->port->dev->dev; 1240 struct dvb_frontend *fe; 1241 u8 adr = (type ? 0 : 4) + ((input->nr & 1) ? 0x63 : 0x60); 1242 1243 fe = dvb_attach(stv6111_attach, dvb->fe, i2c, adr); 1244 if (!fe) { 1245 fe = dvb_attach(stv6111_attach, dvb->fe, i2c, adr & ~4); 1246 if (!fe) { 1247 dev_err(dev, "No STV6111 found at 0x%02x!\n", adr); 1248 return -ENODEV; 1249 } 1250 } 1251 return 0; 1252 } 1253 1254 static int demod_attach_dummy(struct ddb_input *input) 1255 { 1256 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 1257 struct device *dev = input->port->dev->dev; 1258 1259 dvb->fe = dvb_attach(ddbridge_dummy_fe_qam_attach); 1260 if (!dvb->fe) { 1261 dev_err(dev, "QAM dummy attach failed!\n"); 1262 return -ENODEV; 1263 } 1264 1265 return 0; 1266 } 1267 1268 static int start_feed(struct dvb_demux_feed *dvbdmxfeed) 1269 { 1270 struct dvb_demux *dvbdmx = dvbdmxfeed->demux; 1271 struct ddb_input *input = dvbdmx->priv; 1272 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 1273 1274 if (!dvb->users) 1275 ddb_input_start_all(input); 1276 1277 return ++dvb->users; 1278 } 1279 1280 static int stop_feed(struct dvb_demux_feed *dvbdmxfeed) 1281 { 1282 struct dvb_demux *dvbdmx = dvbdmxfeed->demux; 1283 struct ddb_input *input = dvbdmx->priv; 1284 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 1285 1286 if (--dvb->users) 1287 return dvb->users; 1288 1289 ddb_input_stop_all(input); 1290 return 0; 1291 } 1292 1293 static void dvb_input_detach(struct ddb_input *input) 1294 { 1295 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 1296 struct dvb_demux *dvbdemux = &dvb->demux; 1297 1298 switch (dvb->attached) { 1299 case 0x31: 1300 if (dvb->fe2) 1301 dvb_unregister_frontend(dvb->fe2); 1302 if (dvb->fe) 1303 dvb_unregister_frontend(dvb->fe); 1304 fallthrough; 1305 case 0x30: 1306 dvb_module_release(dvb->i2c_client[0]); 1307 dvb->i2c_client[0] = NULL; 1308 1309 if (dvb->fe2) 1310 dvb_frontend_detach(dvb->fe2); 1311 if (dvb->fe) 1312 dvb_frontend_detach(dvb->fe); 1313 dvb->fe = NULL; 1314 dvb->fe2 = NULL; 1315 fallthrough; 1316 case 0x20: 1317 dvb_net_release(&dvb->dvbnet); 1318 fallthrough; 1319 case 0x12: 1320 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, 1321 &dvb->hw_frontend); 1322 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, 1323 &dvb->mem_frontend); 1324 fallthrough; 1325 case 0x11: 1326 dvb_dmxdev_release(&dvb->dmxdev); 1327 fallthrough; 1328 case 0x10: 1329 dvb_dmx_release(&dvb->demux); 1330 fallthrough; 1331 case 0x01: 1332 break; 1333 } 1334 dvb->attached = 0x00; 1335 } 1336 1337 static int dvb_register_adapters(struct ddb *dev) 1338 { 1339 int i, ret = 0; 1340 struct ddb_port *port; 1341 struct dvb_adapter *adap; 1342 1343 if (adapter_alloc == 3) { 1344 port = &dev->port[0]; 1345 adap = port->dvb[0].adap; 1346 ret = dvb_register_adapter(adap, "DDBridge", THIS_MODULE, 1347 port->dev->dev, 1348 adapter_nr); 1349 if (ret < 0) 1350 return ret; 1351 port->dvb[0].adap_registered = 1; 1352 for (i = 0; i < dev->port_num; i++) { 1353 port = &dev->port[i]; 1354 port->dvb[0].adap = adap; 1355 port->dvb[1].adap = adap; 1356 } 1357 return 0; 1358 } 1359 1360 for (i = 0; i < dev->port_num; i++) { 1361 port = &dev->port[i]; 1362 switch (port->class) { 1363 case DDB_PORT_TUNER: 1364 adap = port->dvb[0].adap; 1365 ret = dvb_register_adapter(adap, "DDBridge", 1366 THIS_MODULE, 1367 port->dev->dev, 1368 adapter_nr); 1369 if (ret < 0) 1370 return ret; 1371 port->dvb[0].adap_registered = 1; 1372 1373 if (adapter_alloc > 0) { 1374 port->dvb[1].adap = port->dvb[0].adap; 1375 break; 1376 } 1377 adap = port->dvb[1].adap; 1378 ret = dvb_register_adapter(adap, "DDBridge", 1379 THIS_MODULE, 1380 port->dev->dev, 1381 adapter_nr); 1382 if (ret < 0) 1383 return ret; 1384 port->dvb[1].adap_registered = 1; 1385 break; 1386 1387 case DDB_PORT_CI: 1388 case DDB_PORT_LOOP: 1389 adap = port->dvb[0].adap; 1390 ret = dvb_register_adapter(adap, "DDBridge", 1391 THIS_MODULE, 1392 port->dev->dev, 1393 adapter_nr); 1394 if (ret < 0) 1395 return ret; 1396 port->dvb[0].adap_registered = 1; 1397 break; 1398 default: 1399 if (adapter_alloc < 2) 1400 break; 1401 adap = port->dvb[0].adap; 1402 ret = dvb_register_adapter(adap, "DDBridge", 1403 THIS_MODULE, 1404 port->dev->dev, 1405 adapter_nr); 1406 if (ret < 0) 1407 return ret; 1408 port->dvb[0].adap_registered = 1; 1409 break; 1410 } 1411 } 1412 return ret; 1413 } 1414 1415 static void dvb_unregister_adapters(struct ddb *dev) 1416 { 1417 int i; 1418 struct ddb_port *port; 1419 struct ddb_dvb *dvb; 1420 1421 for (i = 0; i < dev->link[0].info->port_num; i++) { 1422 port = &dev->port[i]; 1423 1424 dvb = &port->dvb[0]; 1425 if (dvb->adap_registered) 1426 dvb_unregister_adapter(dvb->adap); 1427 dvb->adap_registered = 0; 1428 1429 dvb = &port->dvb[1]; 1430 if (dvb->adap_registered) 1431 dvb_unregister_adapter(dvb->adap); 1432 dvb->adap_registered = 0; 1433 } 1434 } 1435 1436 static int dvb_input_attach(struct ddb_input *input) 1437 { 1438 int ret = 0; 1439 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 1440 struct ddb_port *port = input->port; 1441 struct dvb_adapter *adap = dvb->adap; 1442 struct dvb_demux *dvbdemux = &dvb->demux; 1443 struct ddb_ids *devids = &input->port->dev->link[input->port->lnr].ids; 1444 int par = 0, osc24 = 0, tsfast = 0; 1445 1446 /* 1447 * Determine if bridges with stv0910 demods can run with fast TS and 1448 * thus support high bandwidth transponders. 1449 * STV0910_PR and STV0910_P tuner types covers all relevant bridges, 1450 * namely the CineS2 V7(A) and the Octopus CI S2 Pro/Advanced. All 1451 * DuoFlex S2 V4(A) have type=DDB_TUNER_DVBS_STV0910 without any suffix 1452 * and are limited by the serial link to the bridge, thus won't work 1453 * in fast TS mode. 1454 */ 1455 if (port->nr == 0 && 1456 (port->type == DDB_TUNER_DVBS_STV0910_PR || 1457 port->type == DDB_TUNER_DVBS_STV0910_P)) { 1458 /* fast TS on port 0 requires FPGA version >= 1.7 */ 1459 if ((devids->hwid & 0x00ffffff) >= 0x00010007) 1460 tsfast = 1; 1461 } 1462 1463 dvb->attached = 0x01; 1464 1465 dvbdemux->priv = input; 1466 dvbdemux->dmx.capabilities = DMX_TS_FILTERING | 1467 DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING; 1468 dvbdemux->start_feed = start_feed; 1469 dvbdemux->stop_feed = stop_feed; 1470 dvbdemux->filternum = 256; 1471 dvbdemux->feednum = 256; 1472 ret = dvb_dmx_init(dvbdemux); 1473 if (ret < 0) 1474 return ret; 1475 dvb->attached = 0x10; 1476 1477 dvb->dmxdev.filternum = 256; 1478 dvb->dmxdev.demux = &dvbdemux->dmx; 1479 ret = dvb_dmxdev_init(&dvb->dmxdev, adap); 1480 if (ret < 0) 1481 goto err_detach; 1482 dvb->attached = 0x11; 1483 1484 dvb->mem_frontend.source = DMX_MEMORY_FE; 1485 dvb->demux.dmx.add_frontend(&dvb->demux.dmx, &dvb->mem_frontend); 1486 dvb->hw_frontend.source = DMX_FRONTEND_0; 1487 dvb->demux.dmx.add_frontend(&dvb->demux.dmx, &dvb->hw_frontend); 1488 ret = dvbdemux->dmx.connect_frontend(&dvbdemux->dmx, &dvb->hw_frontend); 1489 if (ret < 0) 1490 goto err_detach; 1491 dvb->attached = 0x12; 1492 1493 ret = dvb_net_init(adap, &dvb->dvbnet, dvb->dmxdev.demux); 1494 if (ret < 0) 1495 goto err_detach; 1496 dvb->attached = 0x20; 1497 1498 dvb->fe = NULL; 1499 dvb->fe2 = NULL; 1500 switch (port->type) { 1501 case DDB_TUNER_MXL5XX: 1502 if (ddb_fe_attach_mxl5xx(input) < 0) 1503 goto err_detach; 1504 break; 1505 case DDB_TUNER_DVBS_ST: 1506 if (demod_attach_stv0900(input, 0) < 0) 1507 goto err_detach; 1508 if (tuner_attach_stv6110(input, 0) < 0) 1509 goto err_tuner; 1510 break; 1511 case DDB_TUNER_DVBS_ST_AA: 1512 if (demod_attach_stv0900(input, 1) < 0) 1513 goto err_detach; 1514 if (tuner_attach_stv6110(input, 1) < 0) 1515 goto err_tuner; 1516 break; 1517 case DDB_TUNER_DVBS_STV0910: 1518 if (demod_attach_stv0910(input, 0, tsfast) < 0) 1519 goto err_detach; 1520 if (tuner_attach_stv6111(input, 0) < 0) 1521 goto err_tuner; 1522 break; 1523 case DDB_TUNER_DVBS_STV0910_PR: 1524 if (demod_attach_stv0910(input, 1, tsfast) < 0) 1525 goto err_detach; 1526 if (tuner_attach_stv6111(input, 1) < 0) 1527 goto err_tuner; 1528 break; 1529 case DDB_TUNER_DVBS_STV0910_P: 1530 if (demod_attach_stv0910(input, 0, tsfast) < 0) 1531 goto err_detach; 1532 if (tuner_attach_stv6111(input, 1) < 0) 1533 goto err_tuner; 1534 break; 1535 case DDB_TUNER_DVBCT_TR: 1536 if (demod_attach_drxk(input) < 0) 1537 goto err_detach; 1538 if (tuner_attach_tda18271(input) < 0) 1539 goto err_tuner; 1540 break; 1541 case DDB_TUNER_DVBCT_ST: 1542 if (demod_attach_stv0367(input) < 0) 1543 goto err_detach; 1544 if (tuner_attach_tda18212(input, port->type) < 0) 1545 goto err_tuner; 1546 break; 1547 case DDB_TUNER_DVBC2T2I_SONY_P: 1548 if (input->port->dev->link[input->port->lnr].info->ts_quirks & 1549 TS_QUIRK_ALT_OSC) 1550 osc24 = 0; 1551 else 1552 osc24 = 1; 1553 fallthrough; 1554 case DDB_TUNER_DVBCT2_SONY_P: 1555 case DDB_TUNER_DVBC2T2_SONY_P: 1556 case DDB_TUNER_ISDBT_SONY_P: 1557 if (input->port->dev->link[input->port->lnr].info->ts_quirks 1558 & TS_QUIRK_SERIAL) 1559 par = 0; 1560 else 1561 par = 1; 1562 if (demod_attach_cxd28xx(input, par, osc24) < 0) 1563 goto err_detach; 1564 if (tuner_attach_tda18212(input, port->type) < 0) 1565 goto err_tuner; 1566 break; 1567 case DDB_TUNER_DVBC2T2I_SONY: 1568 osc24 = 1; 1569 fallthrough; 1570 case DDB_TUNER_DVBCT2_SONY: 1571 case DDB_TUNER_DVBC2T2_SONY: 1572 case DDB_TUNER_ISDBT_SONY: 1573 if (demod_attach_cxd28xx(input, 0, osc24) < 0) 1574 goto err_detach; 1575 if (tuner_attach_tda18212(input, port->type) < 0) 1576 goto err_tuner; 1577 break; 1578 case DDB_TUNER_DUMMY: 1579 if (demod_attach_dummy(input) < 0) 1580 goto err_detach; 1581 break; 1582 case DDB_TUNER_MCI_SX8: 1583 if (ddb_fe_attach_mci(input, port->type) < 0) 1584 goto err_detach; 1585 break; 1586 default: 1587 return 0; 1588 } 1589 dvb->attached = 0x30; 1590 1591 if (dvb->fe) { 1592 if (dvb_register_frontend(adap, dvb->fe) < 0) 1593 goto err_detach; 1594 1595 if (dvb->fe2) { 1596 if (dvb_register_frontend(adap, dvb->fe2) < 0) { 1597 dvb_unregister_frontend(dvb->fe); 1598 goto err_detach; 1599 } 1600 dvb->fe2->tuner_priv = dvb->fe->tuner_priv; 1601 memcpy(&dvb->fe2->ops.tuner_ops, 1602 &dvb->fe->ops.tuner_ops, 1603 sizeof(struct dvb_tuner_ops)); 1604 } 1605 } 1606 1607 dvb->attached = 0x31; 1608 return 0; 1609 1610 err_tuner: 1611 dev_err(port->dev->dev, "tuner attach failed!\n"); 1612 1613 if (dvb->fe2) 1614 dvb_frontend_detach(dvb->fe2); 1615 if (dvb->fe) 1616 dvb_frontend_detach(dvb->fe); 1617 err_detach: 1618 dvb_input_detach(input); 1619 1620 /* return error from ret if set */ 1621 if (ret < 0) 1622 return ret; 1623 1624 return -ENODEV; 1625 } 1626 1627 static int port_has_encti(struct ddb_port *port) 1628 { 1629 struct device *dev = port->dev->dev; 1630 u8 val; 1631 int ret = i2c_read_reg(&port->i2c->adap, 0x20, 0, &val); 1632 1633 if (!ret) 1634 dev_info(dev, "[0x20]=0x%02x\n", val); 1635 return ret ? 0 : 1; 1636 } 1637 1638 static int port_has_cxd(struct ddb_port *port, u8 *type) 1639 { 1640 u8 val; 1641 u8 probe[4] = { 0xe0, 0x00, 0x00, 0x00 }, data[4]; 1642 struct i2c_msg msgs[2] = {{ .addr = 0x40, .flags = 0, 1643 .buf = probe, .len = 4 }, 1644 { .addr = 0x40, .flags = I2C_M_RD, 1645 .buf = data, .len = 4 } }; 1646 val = i2c_transfer(&port->i2c->adap, msgs, 2); 1647 if (val != 2) 1648 return 0; 1649 1650 if (data[0] == 0x02 && data[1] == 0x2b && data[3] == 0x43) 1651 *type = 2; 1652 else 1653 *type = 1; 1654 return 1; 1655 } 1656 1657 static int port_has_xo2(struct ddb_port *port, u8 *type, u8 *id) 1658 { 1659 u8 probe[1] = { 0x00 }, data[4]; 1660 1661 if (i2c_io(&port->i2c->adap, 0x10, probe, 1, data, 4)) 1662 return 0; 1663 if (data[0] == 'D' && data[1] == 'F') { 1664 *id = data[2]; 1665 *type = 1; 1666 return 1; 1667 } 1668 if (data[0] == 'C' && data[1] == 'I') { 1669 *id = data[2]; 1670 *type = 2; 1671 return 1; 1672 } 1673 return 0; 1674 } 1675 1676 static int port_has_stv0900(struct ddb_port *port) 1677 { 1678 u8 val; 1679 1680 if (i2c_read_reg16(&port->i2c->adap, 0x69, 0xf100, &val) < 0) 1681 return 0; 1682 return 1; 1683 } 1684 1685 static int port_has_stv0900_aa(struct ddb_port *port, u8 *id) 1686 { 1687 if (i2c_read_reg16(&port->i2c->adap, 0x68, 0xf100, id) < 0) 1688 return 0; 1689 return 1; 1690 } 1691 1692 static int port_has_drxks(struct ddb_port *port) 1693 { 1694 u8 val; 1695 1696 if (i2c_read(&port->i2c->adap, 0x29, &val) < 0) 1697 return 0; 1698 if (i2c_read(&port->i2c->adap, 0x2a, &val) < 0) 1699 return 0; 1700 return 1; 1701 } 1702 1703 static int port_has_stv0367(struct ddb_port *port) 1704 { 1705 u8 val; 1706 1707 if (i2c_read_reg16(&port->i2c->adap, 0x1e, 0xf000, &val) < 0) 1708 return 0; 1709 if (val != 0x60) 1710 return 0; 1711 if (i2c_read_reg16(&port->i2c->adap, 0x1f, 0xf000, &val) < 0) 1712 return 0; 1713 if (val != 0x60) 1714 return 0; 1715 return 1; 1716 } 1717 1718 static int init_xo2(struct ddb_port *port) 1719 { 1720 struct i2c_adapter *i2c = &port->i2c->adap; 1721 struct ddb *dev = port->dev; 1722 u8 val, data[2]; 1723 int res; 1724 1725 res = i2c_read_regs(i2c, 0x10, 0x04, data, 2); 1726 if (res < 0) 1727 return res; 1728 1729 if (data[0] != 0x01) { 1730 dev_info(dev->dev, "Port %d: invalid XO2\n", port->nr); 1731 return -1; 1732 } 1733 1734 i2c_read_reg(i2c, 0x10, 0x08, &val); 1735 if (val != 0) { 1736 i2c_write_reg(i2c, 0x10, 0x08, 0x00); 1737 msleep(100); 1738 } 1739 /* Enable tuner power, disable pll, reset demods */ 1740 i2c_write_reg(i2c, 0x10, 0x08, 0x04); 1741 usleep_range(2000, 3000); 1742 /* Release demod resets */ 1743 i2c_write_reg(i2c, 0x10, 0x08, 0x07); 1744 1745 /* speed: 0=55,1=75,2=90,3=104 MBit/s */ 1746 i2c_write_reg(i2c, 0x10, 0x09, xo2_speed); 1747 1748 if (dev->link[port->lnr].info->con_clock) { 1749 dev_info(dev->dev, "Setting continuous clock for XO2\n"); 1750 i2c_write_reg(i2c, 0x10, 0x0a, 0x03); 1751 i2c_write_reg(i2c, 0x10, 0x0b, 0x03); 1752 } else { 1753 i2c_write_reg(i2c, 0x10, 0x0a, 0x01); 1754 i2c_write_reg(i2c, 0x10, 0x0b, 0x01); 1755 } 1756 1757 usleep_range(2000, 3000); 1758 /* Start XO2 PLL */ 1759 i2c_write_reg(i2c, 0x10, 0x08, 0x87); 1760 1761 return 0; 1762 } 1763 1764 static int init_xo2_ci(struct ddb_port *port) 1765 { 1766 struct i2c_adapter *i2c = &port->i2c->adap; 1767 struct ddb *dev = port->dev; 1768 u8 val, data[2]; 1769 int res; 1770 1771 res = i2c_read_regs(i2c, 0x10, 0x04, data, 2); 1772 if (res < 0) 1773 return res; 1774 1775 if (data[0] > 1) { 1776 dev_info(dev->dev, "Port %d: invalid XO2 CI %02x\n", 1777 port->nr, data[0]); 1778 return -1; 1779 } 1780 dev_info(dev->dev, "Port %d: DuoFlex CI %u.%u\n", 1781 port->nr, data[0], data[1]); 1782 1783 i2c_read_reg(i2c, 0x10, 0x08, &val); 1784 if (val != 0) { 1785 i2c_write_reg(i2c, 0x10, 0x08, 0x00); 1786 msleep(100); 1787 } 1788 /* Enable both CI */ 1789 i2c_write_reg(i2c, 0x10, 0x08, 3); 1790 usleep_range(2000, 3000); 1791 1792 /* speed: 0=55,1=75,2=90,3=104 MBit/s */ 1793 i2c_write_reg(i2c, 0x10, 0x09, 1); 1794 1795 i2c_write_reg(i2c, 0x10, 0x08, 0x83); 1796 usleep_range(2000, 3000); 1797 1798 if (dev->link[port->lnr].info->con_clock) { 1799 dev_info(dev->dev, "Setting continuous clock for DuoFlex CI\n"); 1800 i2c_write_reg(i2c, 0x10, 0x0a, 0x03); 1801 i2c_write_reg(i2c, 0x10, 0x0b, 0x03); 1802 } else { 1803 i2c_write_reg(i2c, 0x10, 0x0a, 0x01); 1804 i2c_write_reg(i2c, 0x10, 0x0b, 0x01); 1805 } 1806 return 0; 1807 } 1808 1809 static int port_has_cxd28xx(struct ddb_port *port, u8 *id) 1810 { 1811 struct i2c_adapter *i2c = &port->i2c->adap; 1812 int status; 1813 1814 status = i2c_write_reg(&port->i2c->adap, 0x6e, 0, 0); 1815 if (status) 1816 return 0; 1817 status = i2c_read_reg(i2c, 0x6e, 0xfd, id); 1818 if (status) 1819 return 0; 1820 return 1; 1821 } 1822 1823 static char *xo2names[] = { 1824 "DUAL DVB-S2", "DUAL DVB-C/T/T2", 1825 "DUAL DVB-ISDBT", "DUAL DVB-C/C2/T/T2", 1826 "DUAL ATSC", "DUAL DVB-C/C2/T/T2,ISDB-T", 1827 "", "" 1828 }; 1829 1830 static char *xo2types[] = { 1831 "DVBS_ST", "DVBCT2_SONY", 1832 "ISDBT_SONY", "DVBC2T2_SONY", 1833 "ATSC_ST", "DVBC2T2I_SONY" 1834 }; 1835 1836 static void ddb_port_probe(struct ddb_port *port) 1837 { 1838 struct ddb *dev = port->dev; 1839 u32 l = port->lnr; 1840 struct ddb_link *link = &dev->link[l]; 1841 u8 id, type; 1842 1843 port->name = "NO MODULE"; 1844 port->type_name = "NONE"; 1845 port->class = DDB_PORT_NONE; 1846 1847 /* Handle missing ports and ports without I2C */ 1848 1849 if (dummy_tuner && !port->nr && 1850 link->ids.device == 0x0005) { 1851 port->name = "DUMMY"; 1852 port->class = DDB_PORT_TUNER; 1853 port->type = DDB_TUNER_DUMMY; 1854 port->type_name = "DUMMY"; 1855 return; 1856 } 1857 1858 if (port->nr == ts_loop) { 1859 port->name = "TS LOOP"; 1860 port->class = DDB_PORT_LOOP; 1861 return; 1862 } 1863 1864 if (port->nr == 1 && link->info->type == DDB_OCTOPUS_CI && 1865 link->info->i2c_mask == 1) { 1866 port->name = "NO TAB"; 1867 port->class = DDB_PORT_NONE; 1868 return; 1869 } 1870 1871 if (link->info->type == DDB_OCTOPUS_MAX) { 1872 port->name = "DUAL DVB-S2 MAX"; 1873 port->type_name = "MXL5XX"; 1874 port->class = DDB_PORT_TUNER; 1875 port->type = DDB_TUNER_MXL5XX; 1876 if (port->i2c) 1877 ddbwritel(dev, I2C_SPEED_400, 1878 port->i2c->regs + I2C_TIMING); 1879 return; 1880 } 1881 1882 if (link->info->type == DDB_OCTOPUS_MCI) { 1883 if (port->nr >= link->info->mci_ports) 1884 return; 1885 port->name = "DUAL MCI"; 1886 port->type_name = "MCI"; 1887 port->class = DDB_PORT_TUNER; 1888 port->type = DDB_TUNER_MCI + link->info->mci_type; 1889 return; 1890 } 1891 1892 if (port->nr > 1 && link->info->type == DDB_OCTOPUS_CI) { 1893 port->name = "CI internal"; 1894 port->type_name = "INTERNAL"; 1895 port->class = DDB_PORT_CI; 1896 port->type = DDB_CI_INTERNAL; 1897 } 1898 1899 if (!port->i2c) 1900 return; 1901 1902 /* Probe ports with I2C */ 1903 1904 if (port_has_cxd(port, &id)) { 1905 if (id == 1) { 1906 port->name = "CI"; 1907 port->type_name = "CXD2099"; 1908 port->class = DDB_PORT_CI; 1909 port->type = DDB_CI_EXTERNAL_SONY; 1910 ddbwritel(dev, I2C_SPEED_400, 1911 port->i2c->regs + I2C_TIMING); 1912 } else { 1913 dev_info(dev->dev, "Port %d: Uninitialized DuoFlex\n", 1914 port->nr); 1915 return; 1916 } 1917 } else if (port_has_xo2(port, &type, &id)) { 1918 ddbwritel(dev, I2C_SPEED_400, port->i2c->regs + I2C_TIMING); 1919 /*dev_info(dev->dev, "XO2 ID %02x\n", id);*/ 1920 if (type == 2) { 1921 port->name = "DuoFlex CI"; 1922 port->class = DDB_PORT_CI; 1923 port->type = DDB_CI_EXTERNAL_XO2; 1924 port->type_name = "CI_XO2"; 1925 init_xo2_ci(port); 1926 return; 1927 } 1928 id >>= 2; 1929 if (id > 5) { 1930 port->name = "unknown XO2 DuoFlex"; 1931 port->type_name = "UNKNOWN"; 1932 } else { 1933 port->name = xo2names[id]; 1934 port->class = DDB_PORT_TUNER; 1935 port->type = DDB_TUNER_XO2 + id; 1936 port->type_name = xo2types[id]; 1937 init_xo2(port); 1938 } 1939 } else if (port_has_cxd28xx(port, &id)) { 1940 switch (id) { 1941 case 0xa4: 1942 port->name = "DUAL DVB-C2T2 CXD2843"; 1943 port->type = DDB_TUNER_DVBC2T2_SONY_P; 1944 port->type_name = "DVBC2T2_SONY"; 1945 break; 1946 case 0xb1: 1947 port->name = "DUAL DVB-CT2 CXD2837"; 1948 port->type = DDB_TUNER_DVBCT2_SONY_P; 1949 port->type_name = "DVBCT2_SONY"; 1950 break; 1951 case 0xb0: 1952 port->name = "DUAL ISDB-T CXD2838"; 1953 port->type = DDB_TUNER_ISDBT_SONY_P; 1954 port->type_name = "ISDBT_SONY"; 1955 break; 1956 case 0xc1: 1957 port->name = "DUAL DVB-C2T2 ISDB-T CXD2854"; 1958 port->type = DDB_TUNER_DVBC2T2I_SONY_P; 1959 port->type_name = "DVBC2T2I_ISDBT_SONY"; 1960 break; 1961 default: 1962 return; 1963 } 1964 port->class = DDB_PORT_TUNER; 1965 ddbwritel(dev, I2C_SPEED_400, port->i2c->regs + I2C_TIMING); 1966 } else if (port_has_stv0900(port)) { 1967 port->name = "DUAL DVB-S2"; 1968 port->class = DDB_PORT_TUNER; 1969 port->type = DDB_TUNER_DVBS_ST; 1970 port->type_name = "DVBS_ST"; 1971 ddbwritel(dev, I2C_SPEED_100, port->i2c->regs + I2C_TIMING); 1972 } else if (port_has_stv0900_aa(port, &id)) { 1973 port->name = "DUAL DVB-S2"; 1974 port->class = DDB_PORT_TUNER; 1975 if (id == 0x51) { 1976 if (port->nr == 0 && 1977 link->info->ts_quirks & TS_QUIRK_REVERSED) 1978 port->type = DDB_TUNER_DVBS_STV0910_PR; 1979 else 1980 port->type = DDB_TUNER_DVBS_STV0910_P; 1981 port->type_name = "DVBS_ST_0910"; 1982 } else { 1983 port->type = DDB_TUNER_DVBS_ST_AA; 1984 port->type_name = "DVBS_ST_AA"; 1985 } 1986 ddbwritel(dev, I2C_SPEED_100, port->i2c->regs + I2C_TIMING); 1987 } else if (port_has_drxks(port)) { 1988 port->name = "DUAL DVB-C/T"; 1989 port->class = DDB_PORT_TUNER; 1990 port->type = DDB_TUNER_DVBCT_TR; 1991 port->type_name = "DVBCT_TR"; 1992 ddbwritel(dev, I2C_SPEED_400, port->i2c->regs + I2C_TIMING); 1993 } else if (port_has_stv0367(port)) { 1994 port->name = "DUAL DVB-C/T"; 1995 port->class = DDB_PORT_TUNER; 1996 port->type = DDB_TUNER_DVBCT_ST; 1997 port->type_name = "DVBCT_ST"; 1998 ddbwritel(dev, I2C_SPEED_100, port->i2c->regs + I2C_TIMING); 1999 } else if (port_has_encti(port)) { 2000 port->name = "ENCTI"; 2001 port->class = DDB_PORT_LOOP; 2002 } 2003 } 2004 2005 /****************************************************************************/ 2006 /****************************************************************************/ 2007 /****************************************************************************/ 2008 2009 static int ddb_port_attach(struct ddb_port *port) 2010 { 2011 int ret = 0; 2012 2013 switch (port->class) { 2014 case DDB_PORT_TUNER: 2015 ret = dvb_input_attach(port->input[0]); 2016 if (ret < 0) 2017 break; 2018 ret = dvb_input_attach(port->input[1]); 2019 if (ret < 0) { 2020 dvb_input_detach(port->input[0]); 2021 break; 2022 } 2023 port->input[0]->redi = port->input[0]; 2024 port->input[1]->redi = port->input[1]; 2025 break; 2026 case DDB_PORT_CI: 2027 ret = ddb_ci_attach(port, ci_bitrate); 2028 if (ret < 0) 2029 break; 2030 fallthrough; 2031 case DDB_PORT_LOOP: 2032 ret = dvb_register_device(port->dvb[0].adap, 2033 &port->dvb[0].dev, 2034 &dvbdev_ci, (void *)port->output, 2035 DVB_DEVICE_SEC, 0); 2036 break; 2037 default: 2038 break; 2039 } 2040 if (ret < 0) 2041 dev_err(port->dev->dev, "port_attach on port %d failed\n", 2042 port->nr); 2043 return ret; 2044 } 2045 2046 int ddb_ports_attach(struct ddb *dev) 2047 { 2048 int i, numports, err_ports = 0, ret = 0; 2049 struct ddb_port *port; 2050 2051 if (dev->port_num) { 2052 ret = dvb_register_adapters(dev); 2053 if (ret < 0) { 2054 dev_err(dev->dev, "Registering adapters failed. Check DVB_MAX_ADAPTERS in config.\n"); 2055 return ret; 2056 } 2057 } 2058 2059 numports = dev->port_num; 2060 2061 for (i = 0; i < dev->port_num; i++) { 2062 port = &dev->port[i]; 2063 if (port->class != DDB_PORT_NONE) { 2064 ret = ddb_port_attach(port); 2065 if (ret) 2066 err_ports++; 2067 } else { 2068 numports--; 2069 } 2070 } 2071 2072 if (err_ports) { 2073 if (err_ports == numports) { 2074 dev_err(dev->dev, "All connected ports failed to initialise!\n"); 2075 return -ENODEV; 2076 } 2077 2078 dev_warn(dev->dev, "%d of %d connected ports failed to initialise!\n", 2079 err_ports, numports); 2080 } 2081 2082 return 0; 2083 } 2084 2085 void ddb_ports_detach(struct ddb *dev) 2086 { 2087 int i; 2088 struct ddb_port *port; 2089 2090 for (i = 0; i < dev->port_num; i++) { 2091 port = &dev->port[i]; 2092 2093 switch (port->class) { 2094 case DDB_PORT_TUNER: 2095 dvb_input_detach(port->input[1]); 2096 dvb_input_detach(port->input[0]); 2097 break; 2098 case DDB_PORT_CI: 2099 case DDB_PORT_LOOP: 2100 ddb_ci_detach(port); 2101 break; 2102 } 2103 } 2104 dvb_unregister_adapters(dev); 2105 } 2106 2107 /* Copy input DMA pointers to output DMA and ACK. */ 2108 2109 static void input_write_output(struct ddb_input *input, 2110 struct ddb_output *output) 2111 { 2112 ddbwritel(output->port->dev, 2113 input->dma->stat, DMA_BUFFER_ACK(output->dma)); 2114 output->dma->cbuf = (input->dma->stat >> 11) & 0x1f; 2115 output->dma->coff = (input->dma->stat & 0x7ff) << 7; 2116 } 2117 2118 static void output_ack_input(struct ddb_output *output, 2119 struct ddb_input *input) 2120 { 2121 ddbwritel(input->port->dev, 2122 output->dma->stat, DMA_BUFFER_ACK(input->dma)); 2123 } 2124 2125 static void input_write_dvb(struct ddb_input *input, 2126 struct ddb_input *input2) 2127 { 2128 struct ddb_dvb *dvb = &input2->port->dvb[input2->nr & 1]; 2129 struct ddb_dma *dma, *dma2; 2130 struct ddb *dev = input->port->dev; 2131 int ack = 1; 2132 2133 dma = input->dma; 2134 dma2 = input->dma; 2135 /* 2136 * if there also is an output connected, do not ACK. 2137 * input_write_output will ACK. 2138 */ 2139 if (input->redo) { 2140 dma2 = input->redo->dma; 2141 ack = 0; 2142 } 2143 while (dma->cbuf != ((dma->stat >> 11) & 0x1f) || 2144 (4 & dma->ctrl)) { 2145 if (4 & dma->ctrl) { 2146 /* dev_err(dev->dev, "Overflow dma %d\n", dma->nr); */ 2147 ack = 1; 2148 } 2149 if (alt_dma) 2150 dma_sync_single_for_cpu(dev->dev, dma2->pbuf[dma->cbuf], 2151 dma2->size, DMA_FROM_DEVICE); 2152 dvb_dmx_swfilter_packets(&dvb->demux, 2153 dma2->vbuf[dma->cbuf], 2154 dma2->size / 188); 2155 dma->cbuf = (dma->cbuf + 1) % dma2->num; 2156 if (ack) 2157 ddbwritel(dev, (dma->cbuf << 11), 2158 DMA_BUFFER_ACK(dma)); 2159 dma->stat = safe_ddbreadl(dev, DMA_BUFFER_CURRENT(dma)); 2160 dma->ctrl = safe_ddbreadl(dev, DMA_BUFFER_CONTROL(dma)); 2161 } 2162 } 2163 2164 static void input_work(struct work_struct *work) 2165 { 2166 struct ddb_dma *dma = container_of(work, struct ddb_dma, work); 2167 struct ddb_input *input = (struct ddb_input *)dma->io; 2168 struct ddb *dev = input->port->dev; 2169 unsigned long flags; 2170 2171 spin_lock_irqsave(&dma->lock, flags); 2172 if (!dma->running) { 2173 spin_unlock_irqrestore(&dma->lock, flags); 2174 return; 2175 } 2176 dma->stat = ddbreadl(dev, DMA_BUFFER_CURRENT(dma)); 2177 dma->ctrl = ddbreadl(dev, DMA_BUFFER_CONTROL(dma)); 2178 2179 if (input->redi) 2180 input_write_dvb(input, input->redi); 2181 if (input->redo) 2182 input_write_output(input, input->redo); 2183 wake_up(&dma->wq); 2184 spin_unlock_irqrestore(&dma->lock, flags); 2185 } 2186 2187 static void input_handler(void *data) 2188 { 2189 struct ddb_input *input = (struct ddb_input *)data; 2190 struct ddb_dma *dma = input->dma; 2191 2192 queue_work(ddb_wq, &dma->work); 2193 } 2194 2195 static void output_work(struct work_struct *work) 2196 { 2197 struct ddb_dma *dma = container_of(work, struct ddb_dma, work); 2198 struct ddb_output *output = (struct ddb_output *)dma->io; 2199 struct ddb *dev = output->port->dev; 2200 unsigned long flags; 2201 2202 spin_lock_irqsave(&dma->lock, flags); 2203 if (!dma->running) 2204 goto unlock_exit; 2205 dma->stat = ddbreadl(dev, DMA_BUFFER_CURRENT(dma)); 2206 dma->ctrl = ddbreadl(dev, DMA_BUFFER_CONTROL(dma)); 2207 if (output->redi) 2208 output_ack_input(output, output->redi); 2209 wake_up(&dma->wq); 2210 unlock_exit: 2211 spin_unlock_irqrestore(&dma->lock, flags); 2212 } 2213 2214 static void output_handler(void *data) 2215 { 2216 struct ddb_output *output = (struct ddb_output *)data; 2217 struct ddb_dma *dma = output->dma; 2218 2219 queue_work(ddb_wq, &dma->work); 2220 } 2221 2222 /****************************************************************************/ 2223 /****************************************************************************/ 2224 2225 static const struct ddb_regmap *io_regmap(struct ddb_io *io, int link) 2226 { 2227 const struct ddb_info *info; 2228 2229 if (link) 2230 info = io->port->dev->link[io->port->lnr].info; 2231 else 2232 info = io->port->dev->link[0].info; 2233 2234 if (!info) 2235 return NULL; 2236 2237 return info->regmap; 2238 } 2239 2240 static void ddb_dma_init(struct ddb_io *io, int nr, int out) 2241 { 2242 struct ddb_dma *dma; 2243 const struct ddb_regmap *rm = io_regmap(io, 0); 2244 2245 dma = out ? &io->port->dev->odma[nr] : &io->port->dev->idma[nr]; 2246 io->dma = dma; 2247 dma->io = io; 2248 2249 spin_lock_init(&dma->lock); 2250 init_waitqueue_head(&dma->wq); 2251 if (out) { 2252 INIT_WORK(&dma->work, output_work); 2253 dma->regs = rm->odma->base + rm->odma->size * nr; 2254 dma->bufregs = rm->odma_buf->base + rm->odma_buf->size * nr; 2255 dma->num = dma_buf_num; 2256 dma->size = dma_buf_size * 128 * 47; 2257 dma->div = 1; 2258 } else { 2259 INIT_WORK(&dma->work, input_work); 2260 dma->regs = rm->idma->base + rm->idma->size * nr; 2261 dma->bufregs = rm->idma_buf->base + rm->idma_buf->size * nr; 2262 dma->num = dma_buf_num; 2263 dma->size = dma_buf_size * 128 * 47; 2264 dma->div = 1; 2265 } 2266 ddbwritel(io->port->dev, 0, DMA_BUFFER_ACK(dma)); 2267 dev_dbg(io->port->dev->dev, "init link %u, io %u, dma %u, dmaregs %08x bufregs %08x\n", 2268 io->port->lnr, io->nr, nr, dma->regs, dma->bufregs); 2269 } 2270 2271 static void ddb_input_init(struct ddb_port *port, int nr, int pnr, int anr) 2272 { 2273 struct ddb *dev = port->dev; 2274 struct ddb_input *input = &dev->input[anr]; 2275 const struct ddb_regmap *rm; 2276 2277 port->input[pnr] = input; 2278 input->nr = nr; 2279 input->port = port; 2280 rm = io_regmap(input, 1); 2281 input->regs = DDB_LINK_TAG(port->lnr) | 2282 (rm->input->base + rm->input->size * nr); 2283 dev_dbg(dev->dev, "init link %u, input %u, regs %08x\n", 2284 port->lnr, nr, input->regs); 2285 2286 if (dev->has_dma) { 2287 const struct ddb_regmap *rm0 = io_regmap(input, 0); 2288 u32 base = rm0->irq_base_idma; 2289 u32 dma_nr = nr; 2290 2291 if (port->lnr) 2292 dma_nr += 32 + (port->lnr - 1) * 8; 2293 2294 dev_dbg(dev->dev, "init link %u, input %u, handler %u\n", 2295 port->lnr, nr, dma_nr + base); 2296 2297 ddb_irq_set(dev, 0, dma_nr + base, &input_handler, input); 2298 ddb_dma_init(input, dma_nr, 0); 2299 } 2300 } 2301 2302 static void ddb_output_init(struct ddb_port *port, int nr) 2303 { 2304 struct ddb *dev = port->dev; 2305 struct ddb_output *output = &dev->output[nr]; 2306 const struct ddb_regmap *rm; 2307 2308 port->output = output; 2309 output->nr = nr; 2310 output->port = port; 2311 rm = io_regmap(output, 1); 2312 output->regs = DDB_LINK_TAG(port->lnr) | 2313 (rm->output->base + rm->output->size * nr); 2314 2315 dev_dbg(dev->dev, "init link %u, output %u, regs %08x\n", 2316 port->lnr, nr, output->regs); 2317 2318 if (dev->has_dma) { 2319 const struct ddb_regmap *rm0 = io_regmap(output, 0); 2320 u32 base = rm0->irq_base_odma; 2321 2322 ddb_irq_set(dev, 0, nr + base, &output_handler, output); 2323 ddb_dma_init(output, nr, 1); 2324 } 2325 } 2326 2327 static int ddb_port_match_i2c(struct ddb_port *port) 2328 { 2329 struct ddb *dev = port->dev; 2330 u32 i; 2331 2332 for (i = 0; i < dev->i2c_num; i++) { 2333 if (dev->i2c[i].link == port->lnr && 2334 dev->i2c[i].nr == port->nr) { 2335 port->i2c = &dev->i2c[i]; 2336 return 1; 2337 } 2338 } 2339 return 0; 2340 } 2341 2342 static int ddb_port_match_link_i2c(struct ddb_port *port) 2343 { 2344 struct ddb *dev = port->dev; 2345 u32 i; 2346 2347 for (i = 0; i < dev->i2c_num; i++) { 2348 if (dev->i2c[i].link == port->lnr) { 2349 port->i2c = &dev->i2c[i]; 2350 return 1; 2351 } 2352 } 2353 return 0; 2354 } 2355 2356 void ddb_ports_init(struct ddb *dev) 2357 { 2358 u32 i, l, p; 2359 struct ddb_port *port; 2360 const struct ddb_info *info; 2361 const struct ddb_regmap *rm; 2362 2363 for (p = l = 0; l < DDB_MAX_LINK; l++) { 2364 info = dev->link[l].info; 2365 if (!info) 2366 continue; 2367 rm = info->regmap; 2368 if (!rm) 2369 continue; 2370 for (i = 0; i < info->port_num; i++, p++) { 2371 port = &dev->port[p]; 2372 port->dev = dev; 2373 port->nr = i; 2374 port->lnr = l; 2375 port->pnr = p; 2376 port->gap = 0xffffffff; 2377 port->obr = ci_bitrate; 2378 mutex_init(&port->i2c_gate_lock); 2379 2380 if (!ddb_port_match_i2c(port)) { 2381 if (info->type == DDB_OCTOPUS_MAX) 2382 ddb_port_match_link_i2c(port); 2383 } 2384 2385 ddb_port_probe(port); 2386 2387 port->dvb[0].adap = &dev->adap[2 * p]; 2388 port->dvb[1].adap = &dev->adap[2 * p + 1]; 2389 2390 if (port->class == DDB_PORT_NONE && i && p && 2391 dev->port[p - 1].type == DDB_CI_EXTERNAL_XO2) { 2392 port->class = DDB_PORT_CI; 2393 port->type = DDB_CI_EXTERNAL_XO2_B; 2394 port->name = "DuoFlex CI_B"; 2395 port->i2c = dev->port[p - 1].i2c; 2396 } 2397 2398 dev_info(dev->dev, "Port %u: Link %u, Link Port %u (TAB %u): %s\n", 2399 port->pnr, port->lnr, port->nr, port->nr + 1, 2400 port->name); 2401 2402 if (port->class == DDB_PORT_CI && 2403 port->type == DDB_CI_EXTERNAL_XO2) { 2404 ddb_input_init(port, 2 * i, 0, 2 * i); 2405 ddb_output_init(port, i); 2406 continue; 2407 } 2408 2409 if (port->class == DDB_PORT_CI && 2410 port->type == DDB_CI_EXTERNAL_XO2_B) { 2411 ddb_input_init(port, 2 * i - 1, 0, 2 * i - 1); 2412 ddb_output_init(port, i); 2413 continue; 2414 } 2415 2416 if (port->class == DDB_PORT_NONE) 2417 continue; 2418 2419 switch (dev->link[l].info->type) { 2420 case DDB_OCTOPUS_CI: 2421 if (i >= 2) { 2422 ddb_input_init(port, 2 + i, 0, 2 + i); 2423 ddb_input_init(port, 4 + i, 1, 4 + i); 2424 ddb_output_init(port, i); 2425 break; 2426 } 2427 fallthrough; 2428 case DDB_OCTOPUS: 2429 ddb_input_init(port, 2 * i, 0, 2 * i); 2430 ddb_input_init(port, 2 * i + 1, 1, 2 * i + 1); 2431 ddb_output_init(port, i); 2432 break; 2433 case DDB_OCTOPUS_MAX: 2434 case DDB_OCTOPUS_MAX_CT: 2435 case DDB_OCTOPUS_MCI: 2436 ddb_input_init(port, 2 * i, 0, 2 * p); 2437 ddb_input_init(port, 2 * i + 1, 1, 2 * p + 1); 2438 break; 2439 default: 2440 break; 2441 } 2442 } 2443 } 2444 dev->port_num = p; 2445 } 2446 2447 void ddb_ports_release(struct ddb *dev) 2448 { 2449 int i; 2450 struct ddb_port *port; 2451 2452 for (i = 0; i < dev->port_num; i++) { 2453 port = &dev->port[i]; 2454 if (port->input[0] && port->input[0]->dma) 2455 cancel_work_sync(&port->input[0]->dma->work); 2456 if (port->input[1] && port->input[1]->dma) 2457 cancel_work_sync(&port->input[1]->dma->work); 2458 if (port->output && port->output->dma) 2459 cancel_work_sync(&port->output->dma->work); 2460 } 2461 } 2462 2463 /****************************************************************************/ 2464 /****************************************************************************/ 2465 /****************************************************************************/ 2466 2467 #define IRQ_HANDLE(_nr) \ 2468 do { if ((s & (1UL << ((_nr) & 0x1f))) && \ 2469 dev->link[0].irq[_nr].handler) \ 2470 dev->link[0].irq[_nr].handler(dev->link[0].irq[_nr].data); } \ 2471 while (0) 2472 2473 #define IRQ_HANDLE_NIBBLE(_shift) { \ 2474 if (s & (0x0000000f << ((_shift) & 0x1f))) { \ 2475 IRQ_HANDLE(0 + (_shift)); \ 2476 IRQ_HANDLE(1 + (_shift)); \ 2477 IRQ_HANDLE(2 + (_shift)); \ 2478 IRQ_HANDLE(3 + (_shift)); \ 2479 } \ 2480 } 2481 2482 #define IRQ_HANDLE_BYTE(_shift) { \ 2483 if (s & (0x000000ff << ((_shift) & 0x1f))) { \ 2484 IRQ_HANDLE(0 + (_shift)); \ 2485 IRQ_HANDLE(1 + (_shift)); \ 2486 IRQ_HANDLE(2 + (_shift)); \ 2487 IRQ_HANDLE(3 + (_shift)); \ 2488 IRQ_HANDLE(4 + (_shift)); \ 2489 IRQ_HANDLE(5 + (_shift)); \ 2490 IRQ_HANDLE(6 + (_shift)); \ 2491 IRQ_HANDLE(7 + (_shift)); \ 2492 } \ 2493 } 2494 2495 static void irq_handle_msg(struct ddb *dev, u32 s) 2496 { 2497 dev->i2c_irq++; 2498 IRQ_HANDLE_NIBBLE(0); 2499 } 2500 2501 static void irq_handle_io(struct ddb *dev, u32 s) 2502 { 2503 dev->ts_irq++; 2504 IRQ_HANDLE_NIBBLE(4); 2505 IRQ_HANDLE_BYTE(8); 2506 IRQ_HANDLE_BYTE(16); 2507 IRQ_HANDLE_BYTE(24); 2508 } 2509 2510 irqreturn_t ddb_irq_handler0(int irq, void *dev_id) 2511 { 2512 struct ddb *dev = (struct ddb *)dev_id; 2513 u32 mask = 0x8fffff00; 2514 u32 s = mask & ddbreadl(dev, INTERRUPT_STATUS); 2515 2516 if (!s) 2517 return IRQ_NONE; 2518 do { 2519 if (s & 0x80000000) 2520 return IRQ_NONE; 2521 ddbwritel(dev, s, INTERRUPT_ACK); 2522 irq_handle_io(dev, s); 2523 } while ((s = mask & ddbreadl(dev, INTERRUPT_STATUS))); 2524 2525 return IRQ_HANDLED; 2526 } 2527 2528 irqreturn_t ddb_irq_handler1(int irq, void *dev_id) 2529 { 2530 struct ddb *dev = (struct ddb *)dev_id; 2531 u32 mask = 0x8000000f; 2532 u32 s = mask & ddbreadl(dev, INTERRUPT_STATUS); 2533 2534 if (!s) 2535 return IRQ_NONE; 2536 do { 2537 if (s & 0x80000000) 2538 return IRQ_NONE; 2539 ddbwritel(dev, s, INTERRUPT_ACK); 2540 irq_handle_msg(dev, s); 2541 } while ((s = mask & ddbreadl(dev, INTERRUPT_STATUS))); 2542 2543 return IRQ_HANDLED; 2544 } 2545 2546 irqreturn_t ddb_irq_handler(int irq, void *dev_id) 2547 { 2548 struct ddb *dev = (struct ddb *)dev_id; 2549 u32 s = ddbreadl(dev, INTERRUPT_STATUS); 2550 int ret = IRQ_HANDLED; 2551 2552 if (!s) 2553 return IRQ_NONE; 2554 do { 2555 if (s & 0x80000000) 2556 return IRQ_NONE; 2557 ddbwritel(dev, s, INTERRUPT_ACK); 2558 2559 if (s & 0x0000000f) 2560 irq_handle_msg(dev, s); 2561 if (s & 0x0fffff00) 2562 irq_handle_io(dev, s); 2563 } while ((s = ddbreadl(dev, INTERRUPT_STATUS))); 2564 2565 return ret; 2566 } 2567 2568 /****************************************************************************/ 2569 /****************************************************************************/ 2570 /****************************************************************************/ 2571 2572 static int reg_wait(struct ddb *dev, u32 reg, u32 bit) 2573 { 2574 u32 count = 0; 2575 2576 while (safe_ddbreadl(dev, reg) & bit) { 2577 ndelay(10); 2578 if (++count == 100) 2579 return -1; 2580 } 2581 return 0; 2582 } 2583 2584 static int flashio(struct ddb *dev, u32 lnr, u8 *wbuf, u32 wlen, u8 *rbuf, 2585 u32 rlen) 2586 { 2587 u32 data, shift; 2588 u32 tag = DDB_LINK_TAG(lnr); 2589 struct ddb_link *link = &dev->link[lnr]; 2590 2591 mutex_lock(&link->flash_mutex); 2592 if (wlen > 4) 2593 ddbwritel(dev, 1, tag | SPI_CONTROL); 2594 while (wlen > 4) { 2595 /* FIXME: check for big-endian */ 2596 data = swab32(*(u32 *)wbuf); 2597 wbuf += 4; 2598 wlen -= 4; 2599 ddbwritel(dev, data, tag | SPI_DATA); 2600 if (reg_wait(dev, tag | SPI_CONTROL, 4)) 2601 goto fail; 2602 } 2603 if (rlen) 2604 ddbwritel(dev, 0x0001 | ((wlen << (8 + 3)) & 0x1f00), 2605 tag | SPI_CONTROL); 2606 else 2607 ddbwritel(dev, 0x0003 | ((wlen << (8 + 3)) & 0x1f00), 2608 tag | SPI_CONTROL); 2609 2610 data = 0; 2611 shift = ((4 - wlen) * 8); 2612 while (wlen) { 2613 data <<= 8; 2614 data |= *wbuf; 2615 wlen--; 2616 wbuf++; 2617 } 2618 if (shift) 2619 data <<= shift; 2620 ddbwritel(dev, data, tag | SPI_DATA); 2621 if (reg_wait(dev, tag | SPI_CONTROL, 4)) 2622 goto fail; 2623 2624 if (!rlen) { 2625 ddbwritel(dev, 0, tag | SPI_CONTROL); 2626 goto exit; 2627 } 2628 if (rlen > 4) 2629 ddbwritel(dev, 1, tag | SPI_CONTROL); 2630 2631 while (rlen > 4) { 2632 ddbwritel(dev, 0xffffffff, tag | SPI_DATA); 2633 if (reg_wait(dev, tag | SPI_CONTROL, 4)) 2634 goto fail; 2635 data = ddbreadl(dev, tag | SPI_DATA); 2636 *(u32 *)rbuf = swab32(data); 2637 rbuf += 4; 2638 rlen -= 4; 2639 } 2640 ddbwritel(dev, 0x0003 | ((rlen << (8 + 3)) & 0x1F00), 2641 tag | SPI_CONTROL); 2642 ddbwritel(dev, 0xffffffff, tag | SPI_DATA); 2643 if (reg_wait(dev, tag | SPI_CONTROL, 4)) 2644 goto fail; 2645 2646 data = ddbreadl(dev, tag | SPI_DATA); 2647 ddbwritel(dev, 0, tag | SPI_CONTROL); 2648 2649 if (rlen < 4) 2650 data <<= ((4 - rlen) * 8); 2651 2652 while (rlen > 0) { 2653 *rbuf = ((data >> 24) & 0xff); 2654 data <<= 8; 2655 rbuf++; 2656 rlen--; 2657 } 2658 exit: 2659 mutex_unlock(&link->flash_mutex); 2660 return 0; 2661 fail: 2662 mutex_unlock(&link->flash_mutex); 2663 return -1; 2664 } 2665 2666 int ddbridge_flashread(struct ddb *dev, u32 link, u8 *buf, u32 addr, u32 len) 2667 { 2668 u8 cmd[4] = {0x03, (addr >> 16) & 0xff, 2669 (addr >> 8) & 0xff, addr & 0xff}; 2670 2671 return flashio(dev, link, cmd, 4, buf, len); 2672 } 2673 2674 /* 2675 * TODO/FIXME: add/implement IOCTLs from upstream driver 2676 */ 2677 2678 #define DDB_NAME "ddbridge" 2679 2680 static u32 ddb_num; 2681 static int ddb_major; 2682 static DEFINE_MUTEX(ddb_mutex); 2683 2684 static int ddb_release(struct inode *inode, struct file *file) 2685 { 2686 struct ddb *dev = file->private_data; 2687 2688 dev->ddb_dev_users--; 2689 return 0; 2690 } 2691 2692 static int ddb_open(struct inode *inode, struct file *file) 2693 { 2694 struct ddb *dev = ddbs[iminor(inode)]; 2695 2696 if (dev->ddb_dev_users) 2697 return -EBUSY; 2698 dev->ddb_dev_users++; 2699 file->private_data = dev; 2700 return 0; 2701 } 2702 2703 static long ddb_ioctl(struct file *file, unsigned int cmd, unsigned long arg) 2704 { 2705 struct ddb *dev = file->private_data; 2706 2707 dev_warn(dev->dev, "DDB IOCTLs unsupported (cmd: %d, arg: %lu)\n", 2708 cmd, arg); 2709 2710 return -ENOTTY; 2711 } 2712 2713 static const struct file_operations ddb_fops = { 2714 .unlocked_ioctl = ddb_ioctl, 2715 .open = ddb_open, 2716 .release = ddb_release, 2717 }; 2718 2719 static char *ddb_devnode(struct device *device, umode_t *mode) 2720 { 2721 struct ddb *dev = dev_get_drvdata(device); 2722 2723 return kasprintf(GFP_KERNEL, "ddbridge/card%d", dev->nr); 2724 } 2725 2726 #define __ATTR_MRO(_name, _show) { \ 2727 .attr = { .name = __stringify(_name), .mode = 0444 }, \ 2728 .show = _show, \ 2729 } 2730 2731 #define __ATTR_MWO(_name, _store) { \ 2732 .attr = { .name = __stringify(_name), .mode = 0222 }, \ 2733 .store = _store, \ 2734 } 2735 2736 static ssize_t ports_show(struct device *device, 2737 struct device_attribute *attr, char *buf) 2738 { 2739 struct ddb *dev = dev_get_drvdata(device); 2740 2741 return sprintf(buf, "%d\n", dev->port_num); 2742 } 2743 2744 static ssize_t ts_irq_show(struct device *device, 2745 struct device_attribute *attr, char *buf) 2746 { 2747 struct ddb *dev = dev_get_drvdata(device); 2748 2749 return sprintf(buf, "%d\n", dev->ts_irq); 2750 } 2751 2752 static ssize_t i2c_irq_show(struct device *device, 2753 struct device_attribute *attr, char *buf) 2754 { 2755 struct ddb *dev = dev_get_drvdata(device); 2756 2757 return sprintf(buf, "%d\n", dev->i2c_irq); 2758 } 2759 2760 static ssize_t fan_show(struct device *device, 2761 struct device_attribute *attr, char *buf) 2762 { 2763 struct ddb *dev = dev_get_drvdata(device); 2764 u32 val; 2765 2766 val = ddbreadl(dev, GPIO_OUTPUT) & 1; 2767 return sprintf(buf, "%d\n", val); 2768 } 2769 2770 static ssize_t fan_store(struct device *device, struct device_attribute *d, 2771 const char *buf, size_t count) 2772 { 2773 struct ddb *dev = dev_get_drvdata(device); 2774 u32 val; 2775 2776 if (sscanf(buf, "%u\n", &val) != 1) 2777 return -EINVAL; 2778 ddbwritel(dev, 1, GPIO_DIRECTION); 2779 ddbwritel(dev, val & 1, GPIO_OUTPUT); 2780 return count; 2781 } 2782 2783 static ssize_t fanspeed_show(struct device *device, 2784 struct device_attribute *attr, char *buf) 2785 { 2786 struct ddb *dev = dev_get_drvdata(device); 2787 int num = attr->attr.name[8] - 0x30; 2788 struct ddb_link *link = &dev->link[num]; 2789 u32 spd; 2790 2791 spd = ddblreadl(link, TEMPMON_FANCONTROL) & 0xff; 2792 return sprintf(buf, "%u\n", spd * 100); 2793 } 2794 2795 static ssize_t temp_show(struct device *device, 2796 struct device_attribute *attr, char *buf) 2797 { 2798 struct ddb *dev = dev_get_drvdata(device); 2799 struct ddb_link *link = &dev->link[0]; 2800 struct i2c_adapter *adap; 2801 int temp, temp2; 2802 u8 tmp[2]; 2803 2804 if (!link->info->temp_num) 2805 return sprintf(buf, "no sensor\n"); 2806 adap = &dev->i2c[link->info->temp_bus].adap; 2807 if (i2c_read_regs(adap, 0x48, 0, tmp, 2) < 0) 2808 return sprintf(buf, "read_error\n"); 2809 temp = (tmp[0] << 3) | (tmp[1] >> 5); 2810 temp *= 125; 2811 if (link->info->temp_num == 2) { 2812 if (i2c_read_regs(adap, 0x49, 0, tmp, 2) < 0) 2813 return sprintf(buf, "read_error\n"); 2814 temp2 = (tmp[0] << 3) | (tmp[1] >> 5); 2815 temp2 *= 125; 2816 return sprintf(buf, "%d %d\n", temp, temp2); 2817 } 2818 return sprintf(buf, "%d\n", temp); 2819 } 2820 2821 static ssize_t ctemp_show(struct device *device, 2822 struct device_attribute *attr, char *buf) 2823 { 2824 struct ddb *dev = dev_get_drvdata(device); 2825 struct i2c_adapter *adap; 2826 int temp; 2827 u8 tmp[2]; 2828 int num = attr->attr.name[4] - 0x30; 2829 2830 adap = &dev->i2c[num].adap; 2831 if (!adap) 2832 return 0; 2833 if (i2c_read_regs(adap, 0x49, 0, tmp, 2) < 0) 2834 if (i2c_read_regs(adap, 0x4d, 0, tmp, 2) < 0) 2835 return sprintf(buf, "no sensor\n"); 2836 temp = tmp[0] * 1000; 2837 return sprintf(buf, "%d\n", temp); 2838 } 2839 2840 static ssize_t led_show(struct device *device, 2841 struct device_attribute *attr, char *buf) 2842 { 2843 struct ddb *dev = dev_get_drvdata(device); 2844 int num = attr->attr.name[3] - 0x30; 2845 2846 return sprintf(buf, "%d\n", dev->leds & (1 << num) ? 1 : 0); 2847 } 2848 2849 static void ddb_set_led(struct ddb *dev, int num, int val) 2850 { 2851 if (!dev->link[0].info->led_num) 2852 return; 2853 switch (dev->port[num].class) { 2854 case DDB_PORT_TUNER: 2855 switch (dev->port[num].type) { 2856 case DDB_TUNER_DVBS_ST: 2857 i2c_write_reg16(&dev->i2c[num].adap, 2858 0x69, 0xf14c, val ? 2 : 0); 2859 break; 2860 case DDB_TUNER_DVBCT_ST: 2861 i2c_write_reg16(&dev->i2c[num].adap, 2862 0x1f, 0xf00e, 0); 2863 i2c_write_reg16(&dev->i2c[num].adap, 2864 0x1f, 0xf00f, val ? 1 : 0); 2865 break; 2866 case DDB_TUNER_XO2 ... DDB_TUNER_DVBC2T2I_SONY: 2867 { 2868 u8 v; 2869 2870 i2c_read_reg(&dev->i2c[num].adap, 0x10, 0x08, &v); 2871 v = (v & ~0x10) | (val ? 0x10 : 0); 2872 i2c_write_reg(&dev->i2c[num].adap, 0x10, 0x08, v); 2873 break; 2874 } 2875 default: 2876 break; 2877 } 2878 break; 2879 } 2880 } 2881 2882 static ssize_t led_store(struct device *device, 2883 struct device_attribute *attr, 2884 const char *buf, size_t count) 2885 { 2886 struct ddb *dev = dev_get_drvdata(device); 2887 int num = attr->attr.name[3] - 0x30; 2888 u32 val; 2889 2890 if (sscanf(buf, "%u\n", &val) != 1) 2891 return -EINVAL; 2892 if (val) 2893 dev->leds |= (1 << num); 2894 else 2895 dev->leds &= ~(1 << num); 2896 ddb_set_led(dev, num, val); 2897 return count; 2898 } 2899 2900 static ssize_t snr_show(struct device *device, 2901 struct device_attribute *attr, char *buf) 2902 { 2903 struct ddb *dev = dev_get_drvdata(device); 2904 char snr[32]; 2905 int num = attr->attr.name[3] - 0x30; 2906 2907 if (dev->port[num].type >= DDB_TUNER_XO2) { 2908 if (i2c_read_regs(&dev->i2c[num].adap, 0x10, 0x10, snr, 16) < 0) 2909 return sprintf(buf, "NO SNR\n"); 2910 snr[16] = 0; 2911 } else { 2912 /* serial number at 0x100-0x11f */ 2913 if (i2c_read_regs16(&dev->i2c[num].adap, 2914 0x57, 0x100, snr, 32) < 0) 2915 if (i2c_read_regs16(&dev->i2c[num].adap, 2916 0x50, 0x100, snr, 32) < 0) 2917 return sprintf(buf, "NO SNR\n"); 2918 snr[31] = 0; /* in case it is not terminated on EEPROM */ 2919 } 2920 return sprintf(buf, "%s\n", snr); 2921 } 2922 2923 static ssize_t bsnr_show(struct device *device, 2924 struct device_attribute *attr, char *buf) 2925 { 2926 struct ddb *dev = dev_get_drvdata(device); 2927 char snr[16]; 2928 2929 ddbridge_flashread(dev, 0, snr, 0x10, 15); 2930 snr[15] = 0; /* in case it is not terminated on EEPROM */ 2931 return sprintf(buf, "%s\n", snr); 2932 } 2933 2934 static ssize_t bpsnr_show(struct device *device, 2935 struct device_attribute *attr, char *buf) 2936 { 2937 struct ddb *dev = dev_get_drvdata(device); 2938 unsigned char snr[32]; 2939 2940 if (!dev->i2c_num) 2941 return 0; 2942 2943 if (i2c_read_regs16(&dev->i2c[0].adap, 2944 0x50, 0x0000, snr, 32) < 0 || 2945 snr[0] == 0xff) 2946 return sprintf(buf, "NO SNR\n"); 2947 snr[31] = 0; /* in case it is not terminated on EEPROM */ 2948 return sprintf(buf, "%s\n", snr); 2949 } 2950 2951 static ssize_t redirect_show(struct device *device, 2952 struct device_attribute *attr, char *buf) 2953 { 2954 return 0; 2955 } 2956 2957 static ssize_t redirect_store(struct device *device, 2958 struct device_attribute *attr, 2959 const char *buf, size_t count) 2960 { 2961 unsigned int i, p; 2962 int res; 2963 2964 if (sscanf(buf, "%x %x\n", &i, &p) != 2) 2965 return -EINVAL; 2966 res = ddb_redirect(i, p); 2967 if (res < 0) 2968 return res; 2969 dev_info(device, "redirect: %02x, %02x\n", i, p); 2970 return count; 2971 } 2972 2973 static ssize_t gap_show(struct device *device, 2974 struct device_attribute *attr, char *buf) 2975 { 2976 struct ddb *dev = dev_get_drvdata(device); 2977 int num = attr->attr.name[3] - 0x30; 2978 2979 return sprintf(buf, "%d\n", dev->port[num].gap); 2980 } 2981 2982 static ssize_t gap_store(struct device *device, struct device_attribute *attr, 2983 const char *buf, size_t count) 2984 { 2985 struct ddb *dev = dev_get_drvdata(device); 2986 int num = attr->attr.name[3] - 0x30; 2987 unsigned int val; 2988 2989 if (sscanf(buf, "%u\n", &val) != 1) 2990 return -EINVAL; 2991 if (val > 128) 2992 return -EINVAL; 2993 if (val == 128) 2994 val = 0xffffffff; 2995 dev->port[num].gap = val; 2996 return count; 2997 } 2998 2999 static ssize_t version_show(struct device *device, 3000 struct device_attribute *attr, char *buf) 3001 { 3002 struct ddb *dev = dev_get_drvdata(device); 3003 3004 return sprintf(buf, "%08x %08x\n", 3005 dev->link[0].ids.hwid, dev->link[0].ids.regmapid); 3006 } 3007 3008 static ssize_t hwid_show(struct device *device, 3009 struct device_attribute *attr, char *buf) 3010 { 3011 struct ddb *dev = dev_get_drvdata(device); 3012 3013 return sprintf(buf, "0x%08X\n", dev->link[0].ids.hwid); 3014 } 3015 3016 static ssize_t regmap_show(struct device *device, 3017 struct device_attribute *attr, char *buf) 3018 { 3019 struct ddb *dev = dev_get_drvdata(device); 3020 3021 return sprintf(buf, "0x%08X\n", dev->link[0].ids.regmapid); 3022 } 3023 3024 static ssize_t fmode_show(struct device *device, 3025 struct device_attribute *attr, char *buf) 3026 { 3027 int num = attr->attr.name[5] - 0x30; 3028 struct ddb *dev = dev_get_drvdata(device); 3029 3030 return sprintf(buf, "%u\n", dev->link[num].lnb.fmode); 3031 } 3032 3033 static ssize_t devid_show(struct device *device, 3034 struct device_attribute *attr, char *buf) 3035 { 3036 int num = attr->attr.name[5] - 0x30; 3037 struct ddb *dev = dev_get_drvdata(device); 3038 3039 return sprintf(buf, "%08x\n", dev->link[num].ids.devid); 3040 } 3041 3042 static ssize_t fmode_store(struct device *device, struct device_attribute *attr, 3043 const char *buf, size_t count) 3044 { 3045 struct ddb *dev = dev_get_drvdata(device); 3046 int num = attr->attr.name[5] - 0x30; 3047 unsigned int val; 3048 3049 if (sscanf(buf, "%u\n", &val) != 1) 3050 return -EINVAL; 3051 if (val > 3) 3052 return -EINVAL; 3053 ddb_lnb_init_fmode(dev, &dev->link[num], val); 3054 return count; 3055 } 3056 3057 static struct device_attribute ddb_attrs[] = { 3058 __ATTR_RO(version), 3059 __ATTR_RO(ports), 3060 __ATTR_RO(ts_irq), 3061 __ATTR_RO(i2c_irq), 3062 __ATTR(gap0, 0664, gap_show, gap_store), 3063 __ATTR(gap1, 0664, gap_show, gap_store), 3064 __ATTR(gap2, 0664, gap_show, gap_store), 3065 __ATTR(gap3, 0664, gap_show, gap_store), 3066 __ATTR(fmode0, 0664, fmode_show, fmode_store), 3067 __ATTR(fmode1, 0664, fmode_show, fmode_store), 3068 __ATTR(fmode2, 0664, fmode_show, fmode_store), 3069 __ATTR(fmode3, 0664, fmode_show, fmode_store), 3070 __ATTR_MRO(devid0, devid_show), 3071 __ATTR_MRO(devid1, devid_show), 3072 __ATTR_MRO(devid2, devid_show), 3073 __ATTR_MRO(devid3, devid_show), 3074 __ATTR_RO(hwid), 3075 __ATTR_RO(regmap), 3076 __ATTR(redirect, 0664, redirect_show, redirect_store), 3077 __ATTR_MRO(snr, bsnr_show), 3078 __ATTR_RO(bpsnr), 3079 __ATTR_NULL, 3080 }; 3081 3082 static struct device_attribute ddb_attrs_temp[] = { 3083 __ATTR_RO(temp), 3084 }; 3085 3086 static struct device_attribute ddb_attrs_fan[] = { 3087 __ATTR(fan, 0664, fan_show, fan_store), 3088 }; 3089 3090 static struct device_attribute ddb_attrs_snr[] = { 3091 __ATTR_MRO(snr0, snr_show), 3092 __ATTR_MRO(snr1, snr_show), 3093 __ATTR_MRO(snr2, snr_show), 3094 __ATTR_MRO(snr3, snr_show), 3095 }; 3096 3097 static struct device_attribute ddb_attrs_ctemp[] = { 3098 __ATTR_MRO(temp0, ctemp_show), 3099 __ATTR_MRO(temp1, ctemp_show), 3100 __ATTR_MRO(temp2, ctemp_show), 3101 __ATTR_MRO(temp3, ctemp_show), 3102 }; 3103 3104 static struct device_attribute ddb_attrs_led[] = { 3105 __ATTR(led0, 0664, led_show, led_store), 3106 __ATTR(led1, 0664, led_show, led_store), 3107 __ATTR(led2, 0664, led_show, led_store), 3108 __ATTR(led3, 0664, led_show, led_store), 3109 }; 3110 3111 static struct device_attribute ddb_attrs_fanspeed[] = { 3112 __ATTR_MRO(fanspeed0, fanspeed_show), 3113 __ATTR_MRO(fanspeed1, fanspeed_show), 3114 __ATTR_MRO(fanspeed2, fanspeed_show), 3115 __ATTR_MRO(fanspeed3, fanspeed_show), 3116 }; 3117 3118 static struct class ddb_class = { 3119 .name = "ddbridge", 3120 .owner = THIS_MODULE, 3121 .devnode = ddb_devnode, 3122 }; 3123 3124 static int ddb_class_create(void) 3125 { 3126 ddb_major = register_chrdev(0, DDB_NAME, &ddb_fops); 3127 if (ddb_major < 0) 3128 return ddb_major; 3129 if (class_register(&ddb_class) < 0) 3130 return -1; 3131 return 0; 3132 } 3133 3134 static void ddb_class_destroy(void) 3135 { 3136 class_unregister(&ddb_class); 3137 unregister_chrdev(ddb_major, DDB_NAME); 3138 } 3139 3140 static void ddb_device_attrs_del(struct ddb *dev) 3141 { 3142 int i; 3143 3144 for (i = 0; i < 4; i++) 3145 if (dev->link[i].info && dev->link[i].info->tempmon_irq) 3146 device_remove_file(dev->ddb_dev, 3147 &ddb_attrs_fanspeed[i]); 3148 for (i = 0; i < dev->link[0].info->temp_num; i++) 3149 device_remove_file(dev->ddb_dev, &ddb_attrs_temp[i]); 3150 for (i = 0; i < dev->link[0].info->fan_num; i++) 3151 device_remove_file(dev->ddb_dev, &ddb_attrs_fan[i]); 3152 for (i = 0; i < dev->i2c_num && i < 4; i++) { 3153 if (dev->link[0].info->led_num) 3154 device_remove_file(dev->ddb_dev, &ddb_attrs_led[i]); 3155 device_remove_file(dev->ddb_dev, &ddb_attrs_snr[i]); 3156 device_remove_file(dev->ddb_dev, &ddb_attrs_ctemp[i]); 3157 } 3158 for (i = 0; ddb_attrs[i].attr.name; i++) 3159 device_remove_file(dev->ddb_dev, &ddb_attrs[i]); 3160 } 3161 3162 static int ddb_device_attrs_add(struct ddb *dev) 3163 { 3164 int i; 3165 3166 for (i = 0; ddb_attrs[i].attr.name; i++) 3167 if (device_create_file(dev->ddb_dev, &ddb_attrs[i])) 3168 goto fail; 3169 for (i = 0; i < dev->link[0].info->temp_num; i++) 3170 if (device_create_file(dev->ddb_dev, &ddb_attrs_temp[i])) 3171 goto fail; 3172 for (i = 0; i < dev->link[0].info->fan_num; i++) 3173 if (device_create_file(dev->ddb_dev, &ddb_attrs_fan[i])) 3174 goto fail; 3175 for (i = 0; (i < dev->i2c_num) && (i < 4); i++) { 3176 if (device_create_file(dev->ddb_dev, &ddb_attrs_snr[i])) 3177 goto fail; 3178 if (device_create_file(dev->ddb_dev, &ddb_attrs_ctemp[i])) 3179 goto fail; 3180 if (dev->link[0].info->led_num) 3181 if (device_create_file(dev->ddb_dev, 3182 &ddb_attrs_led[i])) 3183 goto fail; 3184 } 3185 for (i = 0; i < 4; i++) 3186 if (dev->link[i].info && dev->link[i].info->tempmon_irq) 3187 if (device_create_file(dev->ddb_dev, 3188 &ddb_attrs_fanspeed[i])) 3189 goto fail; 3190 return 0; 3191 fail: 3192 return -1; 3193 } 3194 3195 int ddb_device_create(struct ddb *dev) 3196 { 3197 int res = 0; 3198 3199 if (ddb_num == DDB_MAX_ADAPTER) 3200 return -ENOMEM; 3201 mutex_lock(&ddb_mutex); 3202 dev->nr = ddb_num; 3203 ddbs[dev->nr] = dev; 3204 dev->ddb_dev = device_create(&ddb_class, dev->dev, 3205 MKDEV(ddb_major, dev->nr), 3206 dev, "ddbridge%d", dev->nr); 3207 if (IS_ERR(dev->ddb_dev)) { 3208 res = PTR_ERR(dev->ddb_dev); 3209 dev_info(dev->dev, "Could not create ddbridge%d\n", dev->nr); 3210 goto fail; 3211 } 3212 res = ddb_device_attrs_add(dev); 3213 if (res) { 3214 ddb_device_attrs_del(dev); 3215 device_destroy(&ddb_class, MKDEV(ddb_major, dev->nr)); 3216 ddbs[dev->nr] = NULL; 3217 dev->ddb_dev = ERR_PTR(-ENODEV); 3218 } else { 3219 ddb_num++; 3220 } 3221 fail: 3222 mutex_unlock(&ddb_mutex); 3223 return res; 3224 } 3225 3226 void ddb_device_destroy(struct ddb *dev) 3227 { 3228 if (IS_ERR(dev->ddb_dev)) 3229 return; 3230 ddb_device_attrs_del(dev); 3231 device_destroy(&ddb_class, MKDEV(ddb_major, dev->nr)); 3232 } 3233 3234 /****************************************************************************/ 3235 /****************************************************************************/ 3236 /****************************************************************************/ 3237 3238 static void tempmon_setfan(struct ddb_link *link) 3239 { 3240 u32 temp, temp2, pwm; 3241 3242 if ((ddblreadl(link, TEMPMON_CONTROL) & 3243 TEMPMON_CONTROL_OVERTEMP) != 0) { 3244 dev_info(link->dev->dev, "Over temperature condition\n"); 3245 link->overtemperature_error = 1; 3246 } 3247 temp = (ddblreadl(link, TEMPMON_SENSOR0) >> 8) & 0xFF; 3248 if (temp & 0x80) 3249 temp = 0; 3250 temp2 = (ddblreadl(link, TEMPMON_SENSOR1) >> 8) & 0xFF; 3251 if (temp2 & 0x80) 3252 temp2 = 0; 3253 if (temp2 > temp) 3254 temp = temp2; 3255 3256 pwm = (ddblreadl(link, TEMPMON_FANCONTROL) >> 8) & 0x0F; 3257 if (pwm > 10) 3258 pwm = 10; 3259 3260 if (temp >= link->temp_tab[pwm]) { 3261 while (pwm < 10 && temp >= link->temp_tab[pwm + 1]) 3262 pwm += 1; 3263 } else { 3264 while (pwm > 1 && temp < link->temp_tab[pwm - 2]) 3265 pwm -= 1; 3266 } 3267 ddblwritel(link, (pwm << 8), TEMPMON_FANCONTROL); 3268 } 3269 3270 static void temp_handler(void *data) 3271 { 3272 struct ddb_link *link = (struct ddb_link *)data; 3273 3274 spin_lock(&link->temp_lock); 3275 tempmon_setfan(link); 3276 spin_unlock(&link->temp_lock); 3277 } 3278 3279 static int tempmon_init(struct ddb_link *link, int first_time) 3280 { 3281 struct ddb *dev = link->dev; 3282 int status = 0; 3283 u32 l = link->nr; 3284 3285 spin_lock_irq(&link->temp_lock); 3286 if (first_time) { 3287 static u8 temperature_table[11] = { 3288 30, 35, 40, 45, 50, 55, 60, 65, 70, 75, 80 }; 3289 3290 memcpy(link->temp_tab, temperature_table, 3291 sizeof(temperature_table)); 3292 } 3293 ddb_irq_set(dev, l, link->info->tempmon_irq, temp_handler, link); 3294 ddblwritel(link, (TEMPMON_CONTROL_OVERTEMP | TEMPMON_CONTROL_AUTOSCAN | 3295 TEMPMON_CONTROL_INTENABLE), 3296 TEMPMON_CONTROL); 3297 ddblwritel(link, (3 << 8), TEMPMON_FANCONTROL); 3298 3299 link->overtemperature_error = 3300 ((ddblreadl(link, TEMPMON_CONTROL) & 3301 TEMPMON_CONTROL_OVERTEMP) != 0); 3302 if (link->overtemperature_error) { 3303 dev_info(link->dev->dev, "Over temperature condition\n"); 3304 status = -1; 3305 } 3306 tempmon_setfan(link); 3307 spin_unlock_irq(&link->temp_lock); 3308 return status; 3309 } 3310 3311 static int ddb_init_tempmon(struct ddb_link *link) 3312 { 3313 const struct ddb_info *info = link->info; 3314 3315 if (!info->tempmon_irq) 3316 return 0; 3317 if (info->type == DDB_OCTOPUS_MAX_CT) 3318 if (link->ids.regmapid < 0x00010002) 3319 return 0; 3320 spin_lock_init(&link->temp_lock); 3321 dev_dbg(link->dev->dev, "init_tempmon\n"); 3322 return tempmon_init(link, 1); 3323 } 3324 3325 /****************************************************************************/ 3326 /****************************************************************************/ 3327 /****************************************************************************/ 3328 3329 static int ddb_init_boards(struct ddb *dev) 3330 { 3331 const struct ddb_info *info; 3332 struct ddb_link *link; 3333 u32 l; 3334 3335 for (l = 0; l < DDB_MAX_LINK; l++) { 3336 link = &dev->link[l]; 3337 info = link->info; 3338 3339 if (!info) 3340 continue; 3341 if (info->board_control) { 3342 ddbwritel(dev, 0, DDB_LINK_TAG(l) | BOARD_CONTROL); 3343 msleep(100); 3344 ddbwritel(dev, info->board_control_2, 3345 DDB_LINK_TAG(l) | BOARD_CONTROL); 3346 usleep_range(2000, 3000); 3347 ddbwritel(dev, 3348 info->board_control_2 | info->board_control, 3349 DDB_LINK_TAG(l) | BOARD_CONTROL); 3350 usleep_range(2000, 3000); 3351 } 3352 ddb_init_tempmon(link); 3353 } 3354 return 0; 3355 } 3356 3357 int ddb_init(struct ddb *dev) 3358 { 3359 mutex_init(&dev->link[0].lnb.lock); 3360 mutex_init(&dev->link[0].flash_mutex); 3361 if (no_init) { 3362 ddb_device_create(dev); 3363 return 0; 3364 } 3365 3366 ddb_init_boards(dev); 3367 3368 if (ddb_i2c_init(dev) < 0) 3369 goto fail1; 3370 ddb_ports_init(dev); 3371 if (ddb_buffers_alloc(dev) < 0) { 3372 dev_info(dev->dev, "Could not allocate buffer memory\n"); 3373 goto fail2; 3374 } 3375 if (ddb_ports_attach(dev) < 0) 3376 goto fail3; 3377 3378 ddb_device_create(dev); 3379 3380 if (dev->link[0].info->fan_num) { 3381 ddbwritel(dev, 1, GPIO_DIRECTION); 3382 ddbwritel(dev, 1, GPIO_OUTPUT); 3383 } 3384 return 0; 3385 3386 fail3: 3387 dev_err(dev->dev, "fail3\n"); 3388 ddb_ports_detach(dev); 3389 ddb_buffers_free(dev); 3390 fail2: 3391 dev_err(dev->dev, "fail2\n"); 3392 ddb_ports_release(dev); 3393 ddb_i2c_release(dev); 3394 fail1: 3395 dev_err(dev->dev, "fail1\n"); 3396 return -1; 3397 } 3398 3399 void ddb_unmap(struct ddb *dev) 3400 { 3401 if (dev->regs) 3402 iounmap(dev->regs); 3403 vfree(dev); 3404 } 3405 3406 int ddb_exit_ddbridge(int stage, int error) 3407 { 3408 switch (stage) { 3409 default: 3410 case 2: 3411 destroy_workqueue(ddb_wq); 3412 fallthrough; 3413 case 1: 3414 ddb_class_destroy(); 3415 break; 3416 } 3417 3418 return error; 3419 } 3420 3421 int ddb_init_ddbridge(void) 3422 { 3423 if (dma_buf_num < 8) 3424 dma_buf_num = 8; 3425 if (dma_buf_num > 32) 3426 dma_buf_num = 32; 3427 if (dma_buf_size < 1) 3428 dma_buf_size = 1; 3429 if (dma_buf_size > 43) 3430 dma_buf_size = 43; 3431 3432 if (ddb_class_create() < 0) 3433 return -1; 3434 ddb_wq = alloc_workqueue("ddbridge", 0, 0); 3435 if (!ddb_wq) 3436 return ddb_exit_ddbridge(1, -1); 3437 3438 return 0; 3439 } 3440