1 /* 2 * ddbridge-core.c: Digital Devices bridge core functions 3 * 4 * Copyright (C) 2010-2017 Digital Devices GmbH 5 * Marcus Metzler <mocm@metzlerbros.de> 6 * Ralph Metzler <rjkm@metzlerbros.de> 7 * 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License 11 * version 2 only, as published by the Free Software Foundation. 12 * 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * To obtain the license, point your browser to 20 * http://www.gnu.org/copyleft/gpl.html 21 */ 22 23 #include <linux/module.h> 24 #include <linux/init.h> 25 #include <linux/interrupt.h> 26 #include <linux/delay.h> 27 #include <linux/slab.h> 28 #include <linux/poll.h> 29 #include <linux/io.h> 30 #include <linux/pci.h> 31 #include <linux/pci_ids.h> 32 #include <linux/timer.h> 33 #include <linux/i2c.h> 34 #include <linux/swab.h> 35 #include <linux/vmalloc.h> 36 37 #include "ddbridge.h" 38 #include "ddbridge-i2c.h" 39 #include "ddbridge-regs.h" 40 #include "ddbridge-max.h" 41 #include "ddbridge-ci.h" 42 #include "ddbridge-io.h" 43 44 #include "tda18271c2dd.h" 45 #include "stv6110x.h" 46 #include "stv090x.h" 47 #include "lnbh24.h" 48 #include "drxk.h" 49 #include "stv0367.h" 50 #include "stv0367_priv.h" 51 #include "cxd2841er.h" 52 #include "tda18212.h" 53 #include "stv0910.h" 54 #include "stv6111.h" 55 #include "lnbh25.h" 56 #include "cxd2099.h" 57 58 /****************************************************************************/ 59 60 #define DDB_MAX_ADAPTER 64 61 62 /****************************************************************************/ 63 64 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr); 65 66 static int adapter_alloc; 67 module_param(adapter_alloc, int, 0444); 68 MODULE_PARM_DESC(adapter_alloc, 69 "0-one adapter per io, 1-one per tab with io, 2-one per tab, 3-one for all"); 70 71 /****************************************************************************/ 72 73 static DEFINE_MUTEX(redirect_lock); 74 75 struct workqueue_struct *ddb_wq; 76 77 static struct ddb *ddbs[DDB_MAX_ADAPTER]; 78 79 /****************************************************************************/ 80 /****************************************************************************/ 81 /****************************************************************************/ 82 83 static void ddb_set_dma_table(struct ddb_io *io) 84 { 85 struct ddb *dev = io->port->dev; 86 struct ddb_dma *dma = io->dma; 87 u32 i; 88 u64 mem; 89 90 if (!dma) 91 return; 92 for (i = 0; i < dma->num; i++) { 93 mem = dma->pbuf[i]; 94 ddbwritel(dev, mem & 0xffffffff, dma->bufregs + i * 8); 95 ddbwritel(dev, mem >> 32, dma->bufregs + i * 8 + 4); 96 } 97 dma->bufval = ((dma->div & 0x0f) << 16) | 98 ((dma->num & 0x1f) << 11) | 99 ((dma->size >> 7) & 0x7ff); 100 } 101 102 static void ddb_set_dma_tables(struct ddb *dev) 103 { 104 u32 i; 105 106 for (i = 0; i < DDB_MAX_PORT; i++) { 107 if (dev->port[i].input[0]) 108 ddb_set_dma_table(dev->port[i].input[0]); 109 if (dev->port[i].input[1]) 110 ddb_set_dma_table(dev->port[i].input[1]); 111 if (dev->port[i].output) 112 ddb_set_dma_table(dev->port[i].output); 113 } 114 } 115 116 /****************************************************************************/ 117 /****************************************************************************/ 118 /****************************************************************************/ 119 120 static void ddb_redirect_dma(struct ddb *dev, 121 struct ddb_dma *sdma, 122 struct ddb_dma *ddma) 123 { 124 u32 i, base; 125 u64 mem; 126 127 sdma->bufval = ddma->bufval; 128 base = sdma->bufregs; 129 for (i = 0; i < ddma->num; i++) { 130 mem = ddma->pbuf[i]; 131 ddbwritel(dev, mem & 0xffffffff, base + i * 8); 132 ddbwritel(dev, mem >> 32, base + i * 8 + 4); 133 } 134 } 135 136 static int ddb_unredirect(struct ddb_port *port) 137 { 138 struct ddb_input *oredi, *iredi = NULL; 139 struct ddb_output *iredo = NULL; 140 141 /* dev_info(port->dev->dev, 142 * "unredirect %d.%d\n", port->dev->nr, port->nr); 143 */ 144 mutex_lock(&redirect_lock); 145 if (port->output->dma->running) { 146 mutex_unlock(&redirect_lock); 147 return -EBUSY; 148 } 149 oredi = port->output->redi; 150 if (!oredi) 151 goto done; 152 if (port->input[0]) { 153 iredi = port->input[0]->redi; 154 iredo = port->input[0]->redo; 155 156 if (iredo) { 157 iredo->port->output->redi = oredi; 158 if (iredo->port->input[0]) { 159 iredo->port->input[0]->redi = iredi; 160 ddb_redirect_dma(oredi->port->dev, 161 oredi->dma, iredo->dma); 162 } 163 port->input[0]->redo = NULL; 164 ddb_set_dma_table(port->input[0]); 165 } 166 oredi->redi = iredi; 167 port->input[0]->redi = NULL; 168 } 169 oredi->redo = NULL; 170 port->output->redi = NULL; 171 172 ddb_set_dma_table(oredi); 173 done: 174 mutex_unlock(&redirect_lock); 175 return 0; 176 } 177 178 static int ddb_redirect(u32 i, u32 p) 179 { 180 struct ddb *idev = ddbs[(i >> 4) & 0x3f]; 181 struct ddb_input *input, *input2; 182 struct ddb *pdev = ddbs[(p >> 4) & 0x3f]; 183 struct ddb_port *port; 184 185 if (!idev || !pdev) 186 return -EINVAL; 187 if (!idev->has_dma || !pdev->has_dma) 188 return -EINVAL; 189 190 port = &pdev->port[p & 0x0f]; 191 if (!port->output) 192 return -EINVAL; 193 if (ddb_unredirect(port)) 194 return -EBUSY; 195 196 if (i == 8) 197 return 0; 198 199 input = &idev->input[i & 7]; 200 if (!input) 201 return -EINVAL; 202 203 mutex_lock(&redirect_lock); 204 if (port->output->dma->running || input->dma->running) { 205 mutex_unlock(&redirect_lock); 206 return -EBUSY; 207 } 208 input2 = port->input[0]; 209 if (input2) { 210 if (input->redi) { 211 input2->redi = input->redi; 212 input->redi = NULL; 213 } else { 214 input2->redi = input; 215 } 216 } 217 input->redo = port->output; 218 port->output->redi = input; 219 220 ddb_redirect_dma(input->port->dev, input->dma, port->output->dma); 221 mutex_unlock(&redirect_lock); 222 return 0; 223 } 224 225 /****************************************************************************/ 226 /****************************************************************************/ 227 /****************************************************************************/ 228 229 static void dma_free(struct pci_dev *pdev, struct ddb_dma *dma, int dir) 230 { 231 int i; 232 233 if (!dma) 234 return; 235 for (i = 0; i < dma->num; i++) { 236 if (dma->vbuf[i]) { 237 if (alt_dma) { 238 dma_unmap_single(&pdev->dev, dma->pbuf[i], 239 dma->size, 240 dir ? DMA_TO_DEVICE : 241 DMA_FROM_DEVICE); 242 kfree(dma->vbuf[i]); 243 dma->vbuf[i] = NULL; 244 } else { 245 dma_free_coherent(&pdev->dev, dma->size, 246 dma->vbuf[i], dma->pbuf[i]); 247 } 248 249 dma->vbuf[i] = NULL; 250 } 251 } 252 } 253 254 static int dma_alloc(struct pci_dev *pdev, struct ddb_dma *dma, int dir) 255 { 256 int i; 257 258 if (!dma) 259 return 0; 260 for (i = 0; i < dma->num; i++) { 261 if (alt_dma) { 262 dma->vbuf[i] = kmalloc(dma->size, __GFP_RETRY_MAYFAIL); 263 if (!dma->vbuf[i]) 264 return -ENOMEM; 265 dma->pbuf[i] = dma_map_single(&pdev->dev, 266 dma->vbuf[i], 267 dma->size, 268 dir ? DMA_TO_DEVICE : 269 DMA_FROM_DEVICE); 270 if (dma_mapping_error(&pdev->dev, dma->pbuf[i])) { 271 kfree(dma->vbuf[i]); 272 dma->vbuf[i] = NULL; 273 return -ENOMEM; 274 } 275 } else { 276 dma->vbuf[i] = dma_alloc_coherent(&pdev->dev, 277 dma->size, 278 &dma->pbuf[i], 279 GFP_KERNEL); 280 if (!dma->vbuf[i]) 281 return -ENOMEM; 282 } 283 } 284 return 0; 285 } 286 287 int ddb_buffers_alloc(struct ddb *dev) 288 { 289 int i; 290 struct ddb_port *port; 291 292 for (i = 0; i < dev->port_num; i++) { 293 port = &dev->port[i]; 294 switch (port->class) { 295 case DDB_PORT_TUNER: 296 if (port->input[0]->dma) 297 if (dma_alloc(dev->pdev, port->input[0]->dma, 0) 298 < 0) 299 return -1; 300 if (port->input[1]->dma) 301 if (dma_alloc(dev->pdev, port->input[1]->dma, 0) 302 < 0) 303 return -1; 304 break; 305 case DDB_PORT_CI: 306 case DDB_PORT_LOOP: 307 if (port->input[0]->dma) 308 if (dma_alloc(dev->pdev, port->input[0]->dma, 0) 309 < 0) 310 return -1; 311 if (port->output->dma) 312 if (dma_alloc(dev->pdev, port->output->dma, 1) 313 < 0) 314 return -1; 315 break; 316 default: 317 break; 318 } 319 } 320 ddb_set_dma_tables(dev); 321 return 0; 322 } 323 324 void ddb_buffers_free(struct ddb *dev) 325 { 326 int i; 327 struct ddb_port *port; 328 329 for (i = 0; i < dev->port_num; i++) { 330 port = &dev->port[i]; 331 332 if (port->input[0] && port->input[0]->dma) 333 dma_free(dev->pdev, port->input[0]->dma, 0); 334 if (port->input[1] && port->input[1]->dma) 335 dma_free(dev->pdev, port->input[1]->dma, 0); 336 if (port->output && port->output->dma) 337 dma_free(dev->pdev, port->output->dma, 1); 338 } 339 } 340 341 static void calc_con(struct ddb_output *output, u32 *con, u32 *con2, u32 flags) 342 { 343 struct ddb *dev = output->port->dev; 344 u32 bitrate = output->port->obr, max_bitrate = 72000; 345 u32 gap = 4, nco = 0; 346 347 *con = 0x1c; 348 if (output->port->gap != 0xffffffff) { 349 flags |= 1; 350 gap = output->port->gap; 351 max_bitrate = 0; 352 } 353 if (dev->link[0].info->type == DDB_OCTOPUS_CI && output->port->nr > 1) { 354 *con = 0x10c; 355 if (dev->link[0].ids.regmapid >= 0x10003 && !(flags & 1)) { 356 if (!(flags & 2)) { 357 /* NCO */ 358 max_bitrate = 0; 359 gap = 0; 360 if (bitrate != 72000) { 361 if (bitrate >= 96000) { 362 *con |= 0x800; 363 } else { 364 *con |= 0x1000; 365 nco = (bitrate * 8192 + 71999) 366 / 72000; 367 } 368 } 369 } else { 370 /* Divider and gap */ 371 *con |= 0x1810; 372 if (bitrate <= 64000) { 373 max_bitrate = 64000; 374 nco = 8; 375 } else if (bitrate <= 72000) { 376 max_bitrate = 72000; 377 nco = 7; 378 } else { 379 max_bitrate = 96000; 380 nco = 5; 381 } 382 } 383 } else { 384 if (bitrate > 72000) { 385 *con |= 0x810; /* 96 MBit/s and gap */ 386 max_bitrate = 96000; 387 } 388 *con |= 0x10; /* enable gap */ 389 } 390 } 391 if (max_bitrate > 0) { 392 if (bitrate > max_bitrate) 393 bitrate = max_bitrate; 394 if (bitrate < 31000) 395 bitrate = 31000; 396 gap = ((max_bitrate - bitrate) * 94) / bitrate; 397 if (gap < 2) 398 *con &= ~0x10; /* Disable gap */ 399 else 400 gap -= 2; 401 if (gap > 127) 402 gap = 127; 403 } 404 405 *con2 = (nco << 16) | gap; 406 } 407 408 static void ddb_output_start(struct ddb_output *output) 409 { 410 struct ddb *dev = output->port->dev; 411 u32 con = 0x11c, con2 = 0; 412 413 if (output->dma) { 414 spin_lock_irq(&output->dma->lock); 415 output->dma->cbuf = 0; 416 output->dma->coff = 0; 417 output->dma->stat = 0; 418 ddbwritel(dev, 0, DMA_BUFFER_CONTROL(output->dma)); 419 } 420 421 if (output->port->input[0]->port->class == DDB_PORT_LOOP) 422 con = (1UL << 13) | 0x14; 423 else 424 calc_con(output, &con, &con2, 0); 425 426 ddbwritel(dev, 0, TS_CONTROL(output)); 427 ddbwritel(dev, 2, TS_CONTROL(output)); 428 ddbwritel(dev, 0, TS_CONTROL(output)); 429 ddbwritel(dev, con, TS_CONTROL(output)); 430 ddbwritel(dev, con2, TS_CONTROL2(output)); 431 432 if (output->dma) { 433 ddbwritel(dev, output->dma->bufval, 434 DMA_BUFFER_SIZE(output->dma)); 435 ddbwritel(dev, 0, DMA_BUFFER_ACK(output->dma)); 436 ddbwritel(dev, 1, DMA_BASE_READ); 437 ddbwritel(dev, 7, DMA_BUFFER_CONTROL(output->dma)); 438 } 439 440 ddbwritel(dev, con | 1, TS_CONTROL(output)); 441 442 if (output->dma) { 443 output->dma->running = 1; 444 spin_unlock_irq(&output->dma->lock); 445 } 446 } 447 448 static void ddb_output_stop(struct ddb_output *output) 449 { 450 struct ddb *dev = output->port->dev; 451 452 if (output->dma) 453 spin_lock_irq(&output->dma->lock); 454 455 ddbwritel(dev, 0, TS_CONTROL(output)); 456 457 if (output->dma) { 458 ddbwritel(dev, 0, DMA_BUFFER_CONTROL(output->dma)); 459 output->dma->running = 0; 460 spin_unlock_irq(&output->dma->lock); 461 } 462 } 463 464 static void ddb_input_stop(struct ddb_input *input) 465 { 466 struct ddb *dev = input->port->dev; 467 u32 tag = DDB_LINK_TAG(input->port->lnr); 468 469 if (input->dma) 470 spin_lock_irq(&input->dma->lock); 471 ddbwritel(dev, 0, tag | TS_CONTROL(input)); 472 if (input->dma) { 473 ddbwritel(dev, 0, DMA_BUFFER_CONTROL(input->dma)); 474 input->dma->running = 0; 475 spin_unlock_irq(&input->dma->lock); 476 } 477 } 478 479 static void ddb_input_start(struct ddb_input *input) 480 { 481 struct ddb *dev = input->port->dev; 482 483 if (input->dma) { 484 spin_lock_irq(&input->dma->lock); 485 input->dma->cbuf = 0; 486 input->dma->coff = 0; 487 input->dma->stat = 0; 488 ddbwritel(dev, 0, DMA_BUFFER_CONTROL(input->dma)); 489 } 490 ddbwritel(dev, 0, TS_CONTROL(input)); 491 ddbwritel(dev, 2, TS_CONTROL(input)); 492 ddbwritel(dev, 0, TS_CONTROL(input)); 493 494 if (input->dma) { 495 ddbwritel(dev, input->dma->bufval, 496 DMA_BUFFER_SIZE(input->dma)); 497 ddbwritel(dev, 0, DMA_BUFFER_ACK(input->dma)); 498 ddbwritel(dev, 1, DMA_BASE_WRITE); 499 ddbwritel(dev, 3, DMA_BUFFER_CONTROL(input->dma)); 500 } 501 502 ddbwritel(dev, 0x09, TS_CONTROL(input)); 503 504 if (input->dma) { 505 input->dma->running = 1; 506 spin_unlock_irq(&input->dma->lock); 507 } 508 } 509 510 static void ddb_input_start_all(struct ddb_input *input) 511 { 512 struct ddb_input *i = input; 513 struct ddb_output *o; 514 515 mutex_lock(&redirect_lock); 516 while (i && (o = i->redo)) { 517 ddb_output_start(o); 518 i = o->port->input[0]; 519 if (i) 520 ddb_input_start(i); 521 } 522 ddb_input_start(input); 523 mutex_unlock(&redirect_lock); 524 } 525 526 static void ddb_input_stop_all(struct ddb_input *input) 527 { 528 struct ddb_input *i = input; 529 struct ddb_output *o; 530 531 mutex_lock(&redirect_lock); 532 ddb_input_stop(input); 533 while (i && (o = i->redo)) { 534 ddb_output_stop(o); 535 i = o->port->input[0]; 536 if (i) 537 ddb_input_stop(i); 538 } 539 mutex_unlock(&redirect_lock); 540 } 541 542 static u32 ddb_output_free(struct ddb_output *output) 543 { 544 u32 idx, off, stat = output->dma->stat; 545 s32 diff; 546 547 idx = (stat >> 11) & 0x1f; 548 off = (stat & 0x7ff) << 7; 549 550 if (output->dma->cbuf != idx) { 551 if ((((output->dma->cbuf + 1) % output->dma->num) == idx) && 552 (output->dma->size - output->dma->coff <= 188)) 553 return 0; 554 return 188; 555 } 556 diff = off - output->dma->coff; 557 if (diff <= 0 || diff > 188) 558 return 188; 559 return 0; 560 } 561 562 static ssize_t ddb_output_write(struct ddb_output *output, 563 const __user u8 *buf, size_t count) 564 { 565 struct ddb *dev = output->port->dev; 566 u32 idx, off, stat = output->dma->stat; 567 u32 left = count, len; 568 569 idx = (stat >> 11) & 0x1f; 570 off = (stat & 0x7ff) << 7; 571 572 while (left) { 573 len = output->dma->size - output->dma->coff; 574 if ((((output->dma->cbuf + 1) % output->dma->num) == idx) && 575 off == 0) { 576 if (len <= 188) 577 break; 578 len -= 188; 579 } 580 if (output->dma->cbuf == idx) { 581 if (off > output->dma->coff) { 582 len = off - output->dma->coff; 583 len -= (len % 188); 584 if (len <= 188) 585 break; 586 len -= 188; 587 } 588 } 589 if (len > left) 590 len = left; 591 if (copy_from_user(output->dma->vbuf[output->dma->cbuf] + 592 output->dma->coff, 593 buf, len)) 594 return -EIO; 595 if (alt_dma) 596 dma_sync_single_for_device( 597 dev->dev, 598 output->dma->pbuf[output->dma->cbuf], 599 output->dma->size, DMA_TO_DEVICE); 600 left -= len; 601 buf += len; 602 output->dma->coff += len; 603 if (output->dma->coff == output->dma->size) { 604 output->dma->coff = 0; 605 output->dma->cbuf = ((output->dma->cbuf + 1) % 606 output->dma->num); 607 } 608 ddbwritel(dev, 609 (output->dma->cbuf << 11) | 610 (output->dma->coff >> 7), 611 DMA_BUFFER_ACK(output->dma)); 612 } 613 return count - left; 614 } 615 616 static u32 ddb_input_avail(struct ddb_input *input) 617 { 618 struct ddb *dev = input->port->dev; 619 u32 idx, off, stat = input->dma->stat; 620 u32 ctrl = ddbreadl(dev, DMA_BUFFER_CONTROL(input->dma)); 621 622 idx = (stat >> 11) & 0x1f; 623 off = (stat & 0x7ff) << 7; 624 625 if (ctrl & 4) { 626 dev_err(dev->dev, "IA %d %d %08x\n", idx, off, ctrl); 627 ddbwritel(dev, stat, DMA_BUFFER_ACK(input->dma)); 628 return 0; 629 } 630 if (input->dma->cbuf != idx) 631 return 188; 632 return 0; 633 } 634 635 static ssize_t ddb_input_read(struct ddb_input *input, 636 __user u8 *buf, size_t count) 637 { 638 struct ddb *dev = input->port->dev; 639 u32 left = count; 640 u32 idx, free, stat = input->dma->stat; 641 int ret; 642 643 idx = (stat >> 11) & 0x1f; 644 645 while (left) { 646 if (input->dma->cbuf == idx) 647 return count - left; 648 free = input->dma->size - input->dma->coff; 649 if (free > left) 650 free = left; 651 if (alt_dma) 652 dma_sync_single_for_cpu( 653 dev->dev, 654 input->dma->pbuf[input->dma->cbuf], 655 input->dma->size, DMA_FROM_DEVICE); 656 ret = copy_to_user(buf, input->dma->vbuf[input->dma->cbuf] + 657 input->dma->coff, free); 658 if (ret) 659 return -EFAULT; 660 input->dma->coff += free; 661 if (input->dma->coff == input->dma->size) { 662 input->dma->coff = 0; 663 input->dma->cbuf = (input->dma->cbuf + 1) % 664 input->dma->num; 665 } 666 left -= free; 667 buf += free; 668 ddbwritel(dev, 669 (input->dma->cbuf << 11) | (input->dma->coff >> 7), 670 DMA_BUFFER_ACK(input->dma)); 671 } 672 return count; 673 } 674 675 /****************************************************************************/ 676 /****************************************************************************/ 677 678 static ssize_t ts_write(struct file *file, const __user char *buf, 679 size_t count, loff_t *ppos) 680 { 681 struct dvb_device *dvbdev = file->private_data; 682 struct ddb_output *output = dvbdev->priv; 683 struct ddb *dev = output->port->dev; 684 size_t left = count; 685 int stat; 686 687 if (!dev->has_dma) 688 return -EINVAL; 689 while (left) { 690 if (ddb_output_free(output) < 188) { 691 if (file->f_flags & O_NONBLOCK) 692 break; 693 if (wait_event_interruptible( 694 output->dma->wq, 695 ddb_output_free(output) >= 188) < 0) 696 break; 697 } 698 stat = ddb_output_write(output, buf, left); 699 if (stat < 0) 700 return stat; 701 buf += stat; 702 left -= stat; 703 } 704 return (left == count) ? -EAGAIN : (count - left); 705 } 706 707 static ssize_t ts_read(struct file *file, __user char *buf, 708 size_t count, loff_t *ppos) 709 { 710 struct dvb_device *dvbdev = file->private_data; 711 struct ddb_output *output = dvbdev->priv; 712 struct ddb_input *input = output->port->input[0]; 713 struct ddb *dev = output->port->dev; 714 size_t left = count; 715 int stat; 716 717 if (!dev->has_dma) 718 return -EINVAL; 719 while (left) { 720 if (ddb_input_avail(input) < 188) { 721 if (file->f_flags & O_NONBLOCK) 722 break; 723 if (wait_event_interruptible( 724 input->dma->wq, 725 ddb_input_avail(input) >= 188) < 0) 726 break; 727 } 728 stat = ddb_input_read(input, buf, left); 729 if (stat < 0) 730 return stat; 731 left -= stat; 732 buf += stat; 733 } 734 return (count && (left == count)) ? -EAGAIN : (count - left); 735 } 736 737 static __poll_t ts_poll(struct file *file, poll_table *wait) 738 { 739 struct dvb_device *dvbdev = file->private_data; 740 struct ddb_output *output = dvbdev->priv; 741 struct ddb_input *input = output->port->input[0]; 742 743 __poll_t mask = 0; 744 745 poll_wait(file, &input->dma->wq, wait); 746 poll_wait(file, &output->dma->wq, wait); 747 if (ddb_input_avail(input) >= 188) 748 mask |= EPOLLIN | EPOLLRDNORM; 749 if (ddb_output_free(output) >= 188) 750 mask |= EPOLLOUT | EPOLLWRNORM; 751 return mask; 752 } 753 754 static int ts_release(struct inode *inode, struct file *file) 755 { 756 struct dvb_device *dvbdev = file->private_data; 757 struct ddb_output *output = NULL; 758 struct ddb_input *input = NULL; 759 760 if (dvbdev) { 761 output = dvbdev->priv; 762 input = output->port->input[0]; 763 } 764 765 if ((file->f_flags & O_ACCMODE) == O_RDONLY) { 766 if (!input) 767 return -EINVAL; 768 ddb_input_stop(input); 769 } else if ((file->f_flags & O_ACCMODE) == O_WRONLY) { 770 if (!output) 771 return -EINVAL; 772 ddb_output_stop(output); 773 } 774 return dvb_generic_release(inode, file); 775 } 776 777 static int ts_open(struct inode *inode, struct file *file) 778 { 779 int err; 780 struct dvb_device *dvbdev = file->private_data; 781 struct ddb_output *output = NULL; 782 struct ddb_input *input = NULL; 783 784 if (dvbdev) { 785 output = dvbdev->priv; 786 input = output->port->input[0]; 787 } 788 789 if ((file->f_flags & O_ACCMODE) == O_RDONLY) { 790 if (!input) 791 return -EINVAL; 792 if (input->redo || input->redi) 793 return -EBUSY; 794 } else if ((file->f_flags & O_ACCMODE) == O_WRONLY) { 795 if (!output) 796 return -EINVAL; 797 } else { 798 return -EINVAL; 799 } 800 801 err = dvb_generic_open(inode, file); 802 if (err < 0) 803 return err; 804 if ((file->f_flags & O_ACCMODE) == O_RDONLY) 805 ddb_input_start(input); 806 else if ((file->f_flags & O_ACCMODE) == O_WRONLY) 807 ddb_output_start(output); 808 return err; 809 } 810 811 static const struct file_operations ci_fops = { 812 .owner = THIS_MODULE, 813 .read = ts_read, 814 .write = ts_write, 815 .open = ts_open, 816 .release = ts_release, 817 .poll = ts_poll, 818 .mmap = NULL, 819 }; 820 821 static struct dvb_device dvbdev_ci = { 822 .priv = NULL, 823 .readers = 1, 824 .writers = 1, 825 .users = 2, 826 .fops = &ci_fops, 827 }; 828 829 /****************************************************************************/ 830 /****************************************************************************/ 831 832 static int locked_gate_ctrl(struct dvb_frontend *fe, int enable) 833 { 834 struct ddb_input *input = fe->sec_priv; 835 struct ddb_port *port = input->port; 836 struct ddb_dvb *dvb = &port->dvb[input->nr & 1]; 837 int status; 838 839 if (enable) { 840 mutex_lock(&port->i2c_gate_lock); 841 status = dvb->i2c_gate_ctrl(fe, 1); 842 } else { 843 status = dvb->i2c_gate_ctrl(fe, 0); 844 mutex_unlock(&port->i2c_gate_lock); 845 } 846 return status; 847 } 848 849 static int demod_attach_drxk(struct ddb_input *input) 850 { 851 struct i2c_adapter *i2c = &input->port->i2c->adap; 852 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 853 struct device *dev = input->port->dev->dev; 854 struct drxk_config config; 855 856 memset(&config, 0, sizeof(config)); 857 config.adr = 0x29 + (input->nr & 1); 858 config.microcode_name = "drxk_a3.mc"; 859 860 dvb->fe = dvb_attach(drxk_attach, &config, i2c); 861 if (!dvb->fe) { 862 dev_err(dev, "No DRXK found!\n"); 863 return -ENODEV; 864 } 865 dvb->fe->sec_priv = input; 866 dvb->i2c_gate_ctrl = dvb->fe->ops.i2c_gate_ctrl; 867 dvb->fe->ops.i2c_gate_ctrl = locked_gate_ctrl; 868 return 0; 869 } 870 871 static int tuner_attach_tda18271(struct ddb_input *input) 872 { 873 struct i2c_adapter *i2c = &input->port->i2c->adap; 874 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 875 struct device *dev = input->port->dev->dev; 876 struct dvb_frontend *fe; 877 878 if (dvb->fe->ops.i2c_gate_ctrl) 879 dvb->fe->ops.i2c_gate_ctrl(dvb->fe, 1); 880 fe = dvb_attach(tda18271c2dd_attach, dvb->fe, i2c, 0x60); 881 if (dvb->fe->ops.i2c_gate_ctrl) 882 dvb->fe->ops.i2c_gate_ctrl(dvb->fe, 0); 883 if (!fe) { 884 dev_err(dev, "No TDA18271 found!\n"); 885 return -ENODEV; 886 } 887 return 0; 888 } 889 890 /******************************************************************************/ 891 /******************************************************************************/ 892 /******************************************************************************/ 893 894 static struct stv0367_config ddb_stv0367_config[] = { 895 { 896 .demod_address = 0x1f, 897 .xtal = 27000000, 898 .if_khz = 0, 899 .if_iq_mode = FE_TER_NORMAL_IF_TUNER, 900 .ts_mode = STV0367_SERIAL_PUNCT_CLOCK, 901 .clk_pol = STV0367_CLOCKPOLARITY_DEFAULT, 902 }, { 903 .demod_address = 0x1e, 904 .xtal = 27000000, 905 .if_khz = 0, 906 .if_iq_mode = FE_TER_NORMAL_IF_TUNER, 907 .ts_mode = STV0367_SERIAL_PUNCT_CLOCK, 908 .clk_pol = STV0367_CLOCKPOLARITY_DEFAULT, 909 }, 910 }; 911 912 static int demod_attach_stv0367(struct ddb_input *input) 913 { 914 struct i2c_adapter *i2c = &input->port->i2c->adap; 915 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 916 struct device *dev = input->port->dev->dev; 917 918 /* attach frontend */ 919 dvb->fe = dvb_attach(stv0367ddb_attach, 920 &ddb_stv0367_config[(input->nr & 1)], i2c); 921 922 if (!dvb->fe) { 923 dev_err(dev, "No stv0367 found!\n"); 924 return -ENODEV; 925 } 926 dvb->fe->sec_priv = input; 927 dvb->i2c_gate_ctrl = dvb->fe->ops.i2c_gate_ctrl; 928 dvb->fe->ops.i2c_gate_ctrl = locked_gate_ctrl; 929 return 0; 930 } 931 932 static int tuner_tda18212_ping(struct ddb_input *input, unsigned short adr) 933 { 934 struct i2c_adapter *adapter = &input->port->i2c->adap; 935 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 936 struct device *dev = input->port->dev->dev; 937 u8 tda_id[2]; 938 u8 subaddr = 0x00; 939 940 dev_dbg(dev, "stv0367-tda18212 tuner ping\n"); 941 if (dvb->fe->ops.i2c_gate_ctrl) 942 dvb->fe->ops.i2c_gate_ctrl(dvb->fe, 1); 943 944 if (i2c_read_regs(adapter, adr, subaddr, tda_id, sizeof(tda_id)) < 0) 945 dev_dbg(dev, "tda18212 ping 1 fail\n"); 946 if (i2c_read_regs(adapter, adr, subaddr, tda_id, sizeof(tda_id)) < 0) 947 dev_warn(dev, "tda18212 ping failed, expect problems\n"); 948 949 if (dvb->fe->ops.i2c_gate_ctrl) 950 dvb->fe->ops.i2c_gate_ctrl(dvb->fe, 0); 951 952 return 0; 953 } 954 955 static int demod_attach_cxd28xx(struct ddb_input *input, int par, int osc24) 956 { 957 struct i2c_adapter *i2c = &input->port->i2c->adap; 958 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 959 struct device *dev = input->port->dev->dev; 960 struct cxd2841er_config cfg; 961 962 /* the cxd2841er driver expects 8bit/shifted I2C addresses */ 963 cfg.i2c_addr = ((input->nr & 1) ? 0x6d : 0x6c) << 1; 964 965 cfg.xtal = osc24 ? SONY_XTAL_24000 : SONY_XTAL_20500; 966 cfg.flags = CXD2841ER_AUTO_IFHZ | CXD2841ER_EARLY_TUNE | 967 CXD2841ER_NO_WAIT_LOCK | CXD2841ER_NO_AGCNEG | 968 CXD2841ER_TSBITS; 969 970 if (!par) 971 cfg.flags |= CXD2841ER_TS_SERIAL; 972 973 /* attach frontend */ 974 dvb->fe = dvb_attach(cxd2841er_attach_t_c, &cfg, i2c); 975 976 if (!dvb->fe) { 977 dev_err(dev, "No cxd2837/38/43/54 found!\n"); 978 return -ENODEV; 979 } 980 dvb->fe->sec_priv = input; 981 dvb->i2c_gate_ctrl = dvb->fe->ops.i2c_gate_ctrl; 982 dvb->fe->ops.i2c_gate_ctrl = locked_gate_ctrl; 983 return 0; 984 } 985 986 static int tuner_attach_tda18212(struct ddb_input *input, u32 porttype) 987 { 988 struct i2c_adapter *adapter = &input->port->i2c->adap; 989 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 990 struct device *dev = input->port->dev->dev; 991 struct i2c_client *client; 992 struct tda18212_config config = { 993 .fe = dvb->fe, 994 .if_dvbt_6 = 3550, 995 .if_dvbt_7 = 3700, 996 .if_dvbt_8 = 4150, 997 .if_dvbt2_6 = 3250, 998 .if_dvbt2_7 = 4000, 999 .if_dvbt2_8 = 4000, 1000 .if_dvbc = 5000, 1001 }; 1002 u8 addr = (input->nr & 1) ? 0x63 : 0x60; 1003 1004 /* due to a hardware quirk with the I2C gate on the stv0367+tda18212 1005 * combo, the tda18212 must be probed by reading it's id _twice_ when 1006 * cold started, or it very likely will fail. 1007 */ 1008 if (porttype == DDB_TUNER_DVBCT_ST) 1009 tuner_tda18212_ping(input, addr); 1010 1011 /* perform tuner probe/init/attach */ 1012 client = dvb_module_probe("tda18212", NULL, adapter, addr, &config); 1013 if (!client) 1014 goto err; 1015 1016 dvb->i2c_client[0] = client; 1017 return 0; 1018 err: 1019 dev_err(dev, "TDA18212 tuner not found. Device is not fully operational.\n"); 1020 return -ENODEV; 1021 } 1022 1023 /****************************************************************************/ 1024 /****************************************************************************/ 1025 /****************************************************************************/ 1026 1027 static struct stv090x_config stv0900 = { 1028 .device = STV0900, 1029 .demod_mode = STV090x_DUAL, 1030 .clk_mode = STV090x_CLK_EXT, 1031 1032 .xtal = 27000000, 1033 .address = 0x69, 1034 1035 .ts1_mode = STV090x_TSMODE_SERIAL_PUNCTURED, 1036 .ts2_mode = STV090x_TSMODE_SERIAL_PUNCTURED, 1037 1038 .ts1_tei = 1, 1039 .ts2_tei = 1, 1040 1041 .repeater_level = STV090x_RPTLEVEL_16, 1042 1043 .adc1_range = STV090x_ADC_1Vpp, 1044 .adc2_range = STV090x_ADC_1Vpp, 1045 1046 .diseqc_envelope_mode = true, 1047 }; 1048 1049 static struct stv090x_config stv0900_aa = { 1050 .device = STV0900, 1051 .demod_mode = STV090x_DUAL, 1052 .clk_mode = STV090x_CLK_EXT, 1053 1054 .xtal = 27000000, 1055 .address = 0x68, 1056 1057 .ts1_mode = STV090x_TSMODE_SERIAL_PUNCTURED, 1058 .ts2_mode = STV090x_TSMODE_SERIAL_PUNCTURED, 1059 1060 .ts1_tei = 1, 1061 .ts2_tei = 1, 1062 1063 .repeater_level = STV090x_RPTLEVEL_16, 1064 1065 .adc1_range = STV090x_ADC_1Vpp, 1066 .adc2_range = STV090x_ADC_1Vpp, 1067 1068 .diseqc_envelope_mode = true, 1069 }; 1070 1071 static struct stv6110x_config stv6110a = { 1072 .addr = 0x60, 1073 .refclk = 27000000, 1074 .clk_div = 1, 1075 }; 1076 1077 static struct stv6110x_config stv6110b = { 1078 .addr = 0x63, 1079 .refclk = 27000000, 1080 .clk_div = 1, 1081 }; 1082 1083 static int demod_attach_stv0900(struct ddb_input *input, int type) 1084 { 1085 struct i2c_adapter *i2c = &input->port->i2c->adap; 1086 struct stv090x_config *feconf = type ? &stv0900_aa : &stv0900; 1087 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 1088 struct device *dev = input->port->dev->dev; 1089 1090 dvb->fe = dvb_attach(stv090x_attach, feconf, i2c, 1091 (input->nr & 1) ? STV090x_DEMODULATOR_1 1092 : STV090x_DEMODULATOR_0); 1093 if (!dvb->fe) { 1094 dev_err(dev, "No STV0900 found!\n"); 1095 return -ENODEV; 1096 } 1097 if (!dvb_attach(lnbh24_attach, dvb->fe, i2c, 0, 1098 0, (input->nr & 1) ? 1099 (0x09 - type) : (0x0b - type))) { 1100 dev_err(dev, "No LNBH24 found!\n"); 1101 dvb_frontend_detach(dvb->fe); 1102 return -ENODEV; 1103 } 1104 return 0; 1105 } 1106 1107 static int tuner_attach_stv6110(struct ddb_input *input, int type) 1108 { 1109 struct i2c_adapter *i2c = &input->port->i2c->adap; 1110 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 1111 struct device *dev = input->port->dev->dev; 1112 struct stv090x_config *feconf = type ? &stv0900_aa : &stv0900; 1113 struct stv6110x_config *tunerconf = (input->nr & 1) ? 1114 &stv6110b : &stv6110a; 1115 const struct stv6110x_devctl *ctl; 1116 1117 ctl = dvb_attach(stv6110x_attach, dvb->fe, tunerconf, i2c); 1118 if (!ctl) { 1119 dev_err(dev, "No STV6110X found!\n"); 1120 return -ENODEV; 1121 } 1122 dev_info(dev, "attach tuner input %d adr %02x\n", 1123 input->nr, tunerconf->addr); 1124 1125 feconf->tuner_init = ctl->tuner_init; 1126 feconf->tuner_sleep = ctl->tuner_sleep; 1127 feconf->tuner_set_mode = ctl->tuner_set_mode; 1128 feconf->tuner_set_frequency = ctl->tuner_set_frequency; 1129 feconf->tuner_get_frequency = ctl->tuner_get_frequency; 1130 feconf->tuner_set_bandwidth = ctl->tuner_set_bandwidth; 1131 feconf->tuner_get_bandwidth = ctl->tuner_get_bandwidth; 1132 feconf->tuner_set_bbgain = ctl->tuner_set_bbgain; 1133 feconf->tuner_get_bbgain = ctl->tuner_get_bbgain; 1134 feconf->tuner_set_refclk = ctl->tuner_set_refclk; 1135 feconf->tuner_get_status = ctl->tuner_get_status; 1136 1137 return 0; 1138 } 1139 1140 static const struct stv0910_cfg stv0910_p = { 1141 .adr = 0x68, 1142 .parallel = 1, 1143 .rptlvl = 4, 1144 .clk = 30000000, 1145 }; 1146 1147 static const struct lnbh25_config lnbh25_cfg = { 1148 .i2c_address = 0x0c << 1, 1149 .data2_config = LNBH25_TEN 1150 }; 1151 1152 static int demod_attach_stv0910(struct ddb_input *input, int type) 1153 { 1154 struct i2c_adapter *i2c = &input->port->i2c->adap; 1155 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 1156 struct device *dev = input->port->dev->dev; 1157 struct stv0910_cfg cfg = stv0910_p; 1158 struct lnbh25_config lnbcfg = lnbh25_cfg; 1159 1160 if (stv0910_single) 1161 cfg.single = 1; 1162 1163 if (type) 1164 cfg.parallel = 2; 1165 dvb->fe = dvb_attach(stv0910_attach, i2c, &cfg, (input->nr & 1)); 1166 if (!dvb->fe) { 1167 cfg.adr = 0x6c; 1168 dvb->fe = dvb_attach(stv0910_attach, i2c, 1169 &cfg, (input->nr & 1)); 1170 } 1171 if (!dvb->fe) { 1172 dev_err(dev, "No STV0910 found!\n"); 1173 return -ENODEV; 1174 } 1175 1176 /* attach lnbh25 - leftshift by one as the lnbh25 driver expects 8bit 1177 * i2c addresses 1178 */ 1179 lnbcfg.i2c_address = (((input->nr & 1) ? 0x0d : 0x0c) << 1); 1180 if (!dvb_attach(lnbh25_attach, dvb->fe, &lnbcfg, i2c)) { 1181 lnbcfg.i2c_address = (((input->nr & 1) ? 0x09 : 0x08) << 1); 1182 if (!dvb_attach(lnbh25_attach, dvb->fe, &lnbcfg, i2c)) { 1183 dev_err(dev, "No LNBH25 found!\n"); 1184 dvb_frontend_detach(dvb->fe); 1185 return -ENODEV; 1186 } 1187 } 1188 1189 return 0; 1190 } 1191 1192 static int tuner_attach_stv6111(struct ddb_input *input, int type) 1193 { 1194 struct i2c_adapter *i2c = &input->port->i2c->adap; 1195 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 1196 struct device *dev = input->port->dev->dev; 1197 struct dvb_frontend *fe; 1198 u8 adr = (type ? 0 : 4) + ((input->nr & 1) ? 0x63 : 0x60); 1199 1200 fe = dvb_attach(stv6111_attach, dvb->fe, i2c, adr); 1201 if (!fe) { 1202 fe = dvb_attach(stv6111_attach, dvb->fe, i2c, adr & ~4); 1203 if (!fe) { 1204 dev_err(dev, "No STV6111 found at 0x%02x!\n", adr); 1205 return -ENODEV; 1206 } 1207 } 1208 return 0; 1209 } 1210 1211 static int start_feed(struct dvb_demux_feed *dvbdmxfeed) 1212 { 1213 struct dvb_demux *dvbdmx = dvbdmxfeed->demux; 1214 struct ddb_input *input = dvbdmx->priv; 1215 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 1216 1217 if (!dvb->users) 1218 ddb_input_start_all(input); 1219 1220 return ++dvb->users; 1221 } 1222 1223 static int stop_feed(struct dvb_demux_feed *dvbdmxfeed) 1224 { 1225 struct dvb_demux *dvbdmx = dvbdmxfeed->demux; 1226 struct ddb_input *input = dvbdmx->priv; 1227 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 1228 1229 if (--dvb->users) 1230 return dvb->users; 1231 1232 ddb_input_stop_all(input); 1233 return 0; 1234 } 1235 1236 static void dvb_input_detach(struct ddb_input *input) 1237 { 1238 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 1239 struct dvb_demux *dvbdemux = &dvb->demux; 1240 1241 switch (dvb->attached) { 1242 case 0x31: 1243 if (dvb->fe2) 1244 dvb_unregister_frontend(dvb->fe2); 1245 if (dvb->fe) 1246 dvb_unregister_frontend(dvb->fe); 1247 /* fallthrough */ 1248 case 0x30: 1249 dvb_module_release(dvb->i2c_client[0]); 1250 dvb->i2c_client[0] = NULL; 1251 1252 if (dvb->fe2) 1253 dvb_frontend_detach(dvb->fe2); 1254 if (dvb->fe) 1255 dvb_frontend_detach(dvb->fe); 1256 dvb->fe = NULL; 1257 dvb->fe2 = NULL; 1258 /* fallthrough */ 1259 case 0x20: 1260 dvb_net_release(&dvb->dvbnet); 1261 /* fallthrough */ 1262 case 0x12: 1263 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, 1264 &dvb->hw_frontend); 1265 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, 1266 &dvb->mem_frontend); 1267 /* fallthrough */ 1268 case 0x11: 1269 dvb_dmxdev_release(&dvb->dmxdev); 1270 /* fallthrough */ 1271 case 0x10: 1272 dvb_dmx_release(&dvb->demux); 1273 /* fallthrough */ 1274 case 0x01: 1275 break; 1276 } 1277 dvb->attached = 0x00; 1278 } 1279 1280 static int dvb_register_adapters(struct ddb *dev) 1281 { 1282 int i, ret = 0; 1283 struct ddb_port *port; 1284 struct dvb_adapter *adap; 1285 1286 if (adapter_alloc == 3) { 1287 port = &dev->port[0]; 1288 adap = port->dvb[0].adap; 1289 ret = dvb_register_adapter(adap, "DDBridge", THIS_MODULE, 1290 port->dev->dev, 1291 adapter_nr); 1292 if (ret < 0) 1293 return ret; 1294 port->dvb[0].adap_registered = 1; 1295 for (i = 0; i < dev->port_num; i++) { 1296 port = &dev->port[i]; 1297 port->dvb[0].adap = adap; 1298 port->dvb[1].adap = adap; 1299 } 1300 return 0; 1301 } 1302 1303 for (i = 0; i < dev->port_num; i++) { 1304 port = &dev->port[i]; 1305 switch (port->class) { 1306 case DDB_PORT_TUNER: 1307 adap = port->dvb[0].adap; 1308 ret = dvb_register_adapter(adap, "DDBridge", 1309 THIS_MODULE, 1310 port->dev->dev, 1311 adapter_nr); 1312 if (ret < 0) 1313 return ret; 1314 port->dvb[0].adap_registered = 1; 1315 1316 if (adapter_alloc > 0) { 1317 port->dvb[1].adap = port->dvb[0].adap; 1318 break; 1319 } 1320 adap = port->dvb[1].adap; 1321 ret = dvb_register_adapter(adap, "DDBridge", 1322 THIS_MODULE, 1323 port->dev->dev, 1324 adapter_nr); 1325 if (ret < 0) 1326 return ret; 1327 port->dvb[1].adap_registered = 1; 1328 break; 1329 1330 case DDB_PORT_CI: 1331 case DDB_PORT_LOOP: 1332 adap = port->dvb[0].adap; 1333 ret = dvb_register_adapter(adap, "DDBridge", 1334 THIS_MODULE, 1335 port->dev->dev, 1336 adapter_nr); 1337 if (ret < 0) 1338 return ret; 1339 port->dvb[0].adap_registered = 1; 1340 break; 1341 default: 1342 if (adapter_alloc < 2) 1343 break; 1344 adap = port->dvb[0].adap; 1345 ret = dvb_register_adapter(adap, "DDBridge", 1346 THIS_MODULE, 1347 port->dev->dev, 1348 adapter_nr); 1349 if (ret < 0) 1350 return ret; 1351 port->dvb[0].adap_registered = 1; 1352 break; 1353 } 1354 } 1355 return ret; 1356 } 1357 1358 static void dvb_unregister_adapters(struct ddb *dev) 1359 { 1360 int i; 1361 struct ddb_port *port; 1362 struct ddb_dvb *dvb; 1363 1364 for (i = 0; i < dev->link[0].info->port_num; i++) { 1365 port = &dev->port[i]; 1366 1367 dvb = &port->dvb[0]; 1368 if (dvb->adap_registered) 1369 dvb_unregister_adapter(dvb->adap); 1370 dvb->adap_registered = 0; 1371 1372 dvb = &port->dvb[1]; 1373 if (dvb->adap_registered) 1374 dvb_unregister_adapter(dvb->adap); 1375 dvb->adap_registered = 0; 1376 } 1377 } 1378 1379 static int dvb_input_attach(struct ddb_input *input) 1380 { 1381 int ret = 0; 1382 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1]; 1383 struct ddb_port *port = input->port; 1384 struct dvb_adapter *adap = dvb->adap; 1385 struct dvb_demux *dvbdemux = &dvb->demux; 1386 int par = 0, osc24 = 0; 1387 1388 dvb->attached = 0x01; 1389 1390 dvbdemux->priv = input; 1391 dvbdemux->dmx.capabilities = DMX_TS_FILTERING | 1392 DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING; 1393 dvbdemux->start_feed = start_feed; 1394 dvbdemux->stop_feed = stop_feed; 1395 dvbdemux->filternum = 256; 1396 dvbdemux->feednum = 256; 1397 ret = dvb_dmx_init(dvbdemux); 1398 if (ret < 0) 1399 return ret; 1400 dvb->attached = 0x10; 1401 1402 dvb->dmxdev.filternum = 256; 1403 dvb->dmxdev.demux = &dvbdemux->dmx; 1404 ret = dvb_dmxdev_init(&dvb->dmxdev, adap); 1405 if (ret < 0) 1406 goto err_detach; 1407 dvb->attached = 0x11; 1408 1409 dvb->mem_frontend.source = DMX_MEMORY_FE; 1410 dvb->demux.dmx.add_frontend(&dvb->demux.dmx, &dvb->mem_frontend); 1411 dvb->hw_frontend.source = DMX_FRONTEND_0; 1412 dvb->demux.dmx.add_frontend(&dvb->demux.dmx, &dvb->hw_frontend); 1413 ret = dvbdemux->dmx.connect_frontend(&dvbdemux->dmx, &dvb->hw_frontend); 1414 if (ret < 0) 1415 goto err_detach; 1416 dvb->attached = 0x12; 1417 1418 ret = dvb_net_init(adap, &dvb->dvbnet, dvb->dmxdev.demux); 1419 if (ret < 0) 1420 goto err_detach; 1421 dvb->attached = 0x20; 1422 1423 dvb->fe = NULL; 1424 dvb->fe2 = NULL; 1425 switch (port->type) { 1426 case DDB_TUNER_MXL5XX: 1427 if (ddb_fe_attach_mxl5xx(input) < 0) 1428 goto err_detach; 1429 break; 1430 case DDB_TUNER_DVBS_ST: 1431 if (demod_attach_stv0900(input, 0) < 0) 1432 goto err_detach; 1433 if (tuner_attach_stv6110(input, 0) < 0) 1434 goto err_tuner; 1435 break; 1436 case DDB_TUNER_DVBS_ST_AA: 1437 if (demod_attach_stv0900(input, 1) < 0) 1438 goto err_detach; 1439 if (tuner_attach_stv6110(input, 1) < 0) 1440 goto err_tuner; 1441 break; 1442 case DDB_TUNER_DVBS_STV0910: 1443 if (demod_attach_stv0910(input, 0) < 0) 1444 goto err_detach; 1445 if (tuner_attach_stv6111(input, 0) < 0) 1446 goto err_tuner; 1447 break; 1448 case DDB_TUNER_DVBS_STV0910_PR: 1449 if (demod_attach_stv0910(input, 1) < 0) 1450 goto err_detach; 1451 if (tuner_attach_stv6111(input, 1) < 0) 1452 goto err_tuner; 1453 break; 1454 case DDB_TUNER_DVBS_STV0910_P: 1455 if (demod_attach_stv0910(input, 0) < 0) 1456 goto err_detach; 1457 if (tuner_attach_stv6111(input, 1) < 0) 1458 goto err_tuner; 1459 break; 1460 case DDB_TUNER_DVBCT_TR: 1461 if (demod_attach_drxk(input) < 0) 1462 goto err_detach; 1463 if (tuner_attach_tda18271(input) < 0) 1464 goto err_tuner; 1465 break; 1466 case DDB_TUNER_DVBCT_ST: 1467 if (demod_attach_stv0367(input) < 0) 1468 goto err_detach; 1469 if (tuner_attach_tda18212(input, port->type) < 0) 1470 goto err_tuner; 1471 break; 1472 case DDB_TUNER_DVBC2T2I_SONY_P: 1473 if (input->port->dev->link[input->port->lnr].info->ts_quirks & 1474 TS_QUIRK_ALT_OSC) 1475 osc24 = 0; 1476 else 1477 osc24 = 1; 1478 /* fall-through */ 1479 case DDB_TUNER_DVBCT2_SONY_P: 1480 case DDB_TUNER_DVBC2T2_SONY_P: 1481 case DDB_TUNER_ISDBT_SONY_P: 1482 if (input->port->dev->link[input->port->lnr].info->ts_quirks 1483 & TS_QUIRK_SERIAL) 1484 par = 0; 1485 else 1486 par = 1; 1487 if (demod_attach_cxd28xx(input, par, osc24) < 0) 1488 goto err_detach; 1489 if (tuner_attach_tda18212(input, port->type) < 0) 1490 goto err_tuner; 1491 break; 1492 case DDB_TUNER_DVBC2T2I_SONY: 1493 osc24 = 1; 1494 /* fall-through */ 1495 case DDB_TUNER_DVBCT2_SONY: 1496 case DDB_TUNER_DVBC2T2_SONY: 1497 case DDB_TUNER_ISDBT_SONY: 1498 if (demod_attach_cxd28xx(input, 0, osc24) < 0) 1499 goto err_detach; 1500 if (tuner_attach_tda18212(input, port->type) < 0) 1501 goto err_tuner; 1502 break; 1503 default: 1504 return 0; 1505 } 1506 dvb->attached = 0x30; 1507 1508 if (dvb->fe) { 1509 if (dvb_register_frontend(adap, dvb->fe) < 0) 1510 goto err_detach; 1511 1512 if (dvb->fe2) { 1513 if (dvb_register_frontend(adap, dvb->fe2) < 0) { 1514 dvb_unregister_frontend(dvb->fe); 1515 goto err_detach; 1516 } 1517 dvb->fe2->tuner_priv = dvb->fe->tuner_priv; 1518 memcpy(&dvb->fe2->ops.tuner_ops, 1519 &dvb->fe->ops.tuner_ops, 1520 sizeof(struct dvb_tuner_ops)); 1521 } 1522 } 1523 1524 dvb->attached = 0x31; 1525 return 0; 1526 1527 err_tuner: 1528 dev_err(port->dev->dev, "tuner attach failed!\n"); 1529 1530 if (dvb->fe2) 1531 dvb_frontend_detach(dvb->fe2); 1532 if (dvb->fe) 1533 dvb_frontend_detach(dvb->fe); 1534 err_detach: 1535 dvb_input_detach(input); 1536 1537 /* return error from ret if set */ 1538 if (ret < 0) 1539 return ret; 1540 1541 return -ENODEV; 1542 } 1543 1544 static int port_has_encti(struct ddb_port *port) 1545 { 1546 struct device *dev = port->dev->dev; 1547 u8 val; 1548 int ret = i2c_read_reg(&port->i2c->adap, 0x20, 0, &val); 1549 1550 if (!ret) 1551 dev_info(dev, "[0x20]=0x%02x\n", val); 1552 return ret ? 0 : 1; 1553 } 1554 1555 static int port_has_cxd(struct ddb_port *port, u8 *type) 1556 { 1557 u8 val; 1558 u8 probe[4] = { 0xe0, 0x00, 0x00, 0x00 }, data[4]; 1559 struct i2c_msg msgs[2] = {{ .addr = 0x40, .flags = 0, 1560 .buf = probe, .len = 4 }, 1561 { .addr = 0x40, .flags = I2C_M_RD, 1562 .buf = data, .len = 4 } }; 1563 val = i2c_transfer(&port->i2c->adap, msgs, 2); 1564 if (val != 2) 1565 return 0; 1566 1567 if (data[0] == 0x02 && data[1] == 0x2b && data[3] == 0x43) 1568 *type = 2; 1569 else 1570 *type = 1; 1571 return 1; 1572 } 1573 1574 static int port_has_xo2(struct ddb_port *port, u8 *type, u8 *id) 1575 { 1576 u8 probe[1] = { 0x00 }, data[4]; 1577 1578 if (i2c_io(&port->i2c->adap, 0x10, probe, 1, data, 4)) 1579 return 0; 1580 if (data[0] == 'D' && data[1] == 'F') { 1581 *id = data[2]; 1582 *type = 1; 1583 return 1; 1584 } 1585 if (data[0] == 'C' && data[1] == 'I') { 1586 *id = data[2]; 1587 *type = 2; 1588 return 1; 1589 } 1590 return 0; 1591 } 1592 1593 static int port_has_stv0900(struct ddb_port *port) 1594 { 1595 u8 val; 1596 1597 if (i2c_read_reg16(&port->i2c->adap, 0x69, 0xf100, &val) < 0) 1598 return 0; 1599 return 1; 1600 } 1601 1602 static int port_has_stv0900_aa(struct ddb_port *port, u8 *id) 1603 { 1604 if (i2c_read_reg16(&port->i2c->adap, 0x68, 0xf100, id) < 0) 1605 return 0; 1606 return 1; 1607 } 1608 1609 static int port_has_drxks(struct ddb_port *port) 1610 { 1611 u8 val; 1612 1613 if (i2c_read(&port->i2c->adap, 0x29, &val) < 0) 1614 return 0; 1615 if (i2c_read(&port->i2c->adap, 0x2a, &val) < 0) 1616 return 0; 1617 return 1; 1618 } 1619 1620 static int port_has_stv0367(struct ddb_port *port) 1621 { 1622 u8 val; 1623 1624 if (i2c_read_reg16(&port->i2c->adap, 0x1e, 0xf000, &val) < 0) 1625 return 0; 1626 if (val != 0x60) 1627 return 0; 1628 if (i2c_read_reg16(&port->i2c->adap, 0x1f, 0xf000, &val) < 0) 1629 return 0; 1630 if (val != 0x60) 1631 return 0; 1632 return 1; 1633 } 1634 1635 static int init_xo2(struct ddb_port *port) 1636 { 1637 struct i2c_adapter *i2c = &port->i2c->adap; 1638 struct ddb *dev = port->dev; 1639 u8 val, data[2]; 1640 int res; 1641 1642 res = i2c_read_regs(i2c, 0x10, 0x04, data, 2); 1643 if (res < 0) 1644 return res; 1645 1646 if (data[0] != 0x01) { 1647 dev_info(dev->dev, "Port %d: invalid XO2\n", port->nr); 1648 return -1; 1649 } 1650 1651 i2c_read_reg(i2c, 0x10, 0x08, &val); 1652 if (val != 0) { 1653 i2c_write_reg(i2c, 0x10, 0x08, 0x00); 1654 msleep(100); 1655 } 1656 /* Enable tuner power, disable pll, reset demods */ 1657 i2c_write_reg(i2c, 0x10, 0x08, 0x04); 1658 usleep_range(2000, 3000); 1659 /* Release demod resets */ 1660 i2c_write_reg(i2c, 0x10, 0x08, 0x07); 1661 1662 /* speed: 0=55,1=75,2=90,3=104 MBit/s */ 1663 i2c_write_reg(i2c, 0x10, 0x09, xo2_speed); 1664 1665 if (dev->link[port->lnr].info->con_clock) { 1666 dev_info(dev->dev, "Setting continuous clock for XO2\n"); 1667 i2c_write_reg(i2c, 0x10, 0x0a, 0x03); 1668 i2c_write_reg(i2c, 0x10, 0x0b, 0x03); 1669 } else { 1670 i2c_write_reg(i2c, 0x10, 0x0a, 0x01); 1671 i2c_write_reg(i2c, 0x10, 0x0b, 0x01); 1672 } 1673 1674 usleep_range(2000, 3000); 1675 /* Start XO2 PLL */ 1676 i2c_write_reg(i2c, 0x10, 0x08, 0x87); 1677 1678 return 0; 1679 } 1680 1681 static int init_xo2_ci(struct ddb_port *port) 1682 { 1683 struct i2c_adapter *i2c = &port->i2c->adap; 1684 struct ddb *dev = port->dev; 1685 u8 val, data[2]; 1686 int res; 1687 1688 res = i2c_read_regs(i2c, 0x10, 0x04, data, 2); 1689 if (res < 0) 1690 return res; 1691 1692 if (data[0] > 1) { 1693 dev_info(dev->dev, "Port %d: invalid XO2 CI %02x\n", 1694 port->nr, data[0]); 1695 return -1; 1696 } 1697 dev_info(dev->dev, "Port %d: DuoFlex CI %u.%u\n", 1698 port->nr, data[0], data[1]); 1699 1700 i2c_read_reg(i2c, 0x10, 0x08, &val); 1701 if (val != 0) { 1702 i2c_write_reg(i2c, 0x10, 0x08, 0x00); 1703 msleep(100); 1704 } 1705 /* Enable both CI */ 1706 i2c_write_reg(i2c, 0x10, 0x08, 3); 1707 usleep_range(2000, 3000); 1708 1709 /* speed: 0=55,1=75,2=90,3=104 MBit/s */ 1710 i2c_write_reg(i2c, 0x10, 0x09, 1); 1711 1712 i2c_write_reg(i2c, 0x10, 0x08, 0x83); 1713 usleep_range(2000, 3000); 1714 1715 if (dev->link[port->lnr].info->con_clock) { 1716 dev_info(dev->dev, "Setting continuous clock for DuoFlex CI\n"); 1717 i2c_write_reg(i2c, 0x10, 0x0a, 0x03); 1718 i2c_write_reg(i2c, 0x10, 0x0b, 0x03); 1719 } else { 1720 i2c_write_reg(i2c, 0x10, 0x0a, 0x01); 1721 i2c_write_reg(i2c, 0x10, 0x0b, 0x01); 1722 } 1723 return 0; 1724 } 1725 1726 static int port_has_cxd28xx(struct ddb_port *port, u8 *id) 1727 { 1728 struct i2c_adapter *i2c = &port->i2c->adap; 1729 int status; 1730 1731 status = i2c_write_reg(&port->i2c->adap, 0x6e, 0, 0); 1732 if (status) 1733 return 0; 1734 status = i2c_read_reg(i2c, 0x6e, 0xfd, id); 1735 if (status) 1736 return 0; 1737 return 1; 1738 } 1739 1740 static char *xo2names[] = { 1741 "DUAL DVB-S2", "DUAL DVB-C/T/T2", 1742 "DUAL DVB-ISDBT", "DUAL DVB-C/C2/T/T2", 1743 "DUAL ATSC", "DUAL DVB-C/C2/T/T2,ISDB-T", 1744 "", "" 1745 }; 1746 1747 static char *xo2types[] = { 1748 "DVBS_ST", "DVBCT2_SONY", 1749 "ISDBT_SONY", "DVBC2T2_SONY", 1750 "ATSC_ST", "DVBC2T2I_SONY" 1751 }; 1752 1753 static void ddb_port_probe(struct ddb_port *port) 1754 { 1755 struct ddb *dev = port->dev; 1756 u32 l = port->lnr; 1757 u8 id, type; 1758 1759 port->name = "NO MODULE"; 1760 port->type_name = "NONE"; 1761 port->class = DDB_PORT_NONE; 1762 1763 /* Handle missing ports and ports without I2C */ 1764 1765 if (port->nr == ts_loop) { 1766 port->name = "TS LOOP"; 1767 port->class = DDB_PORT_LOOP; 1768 return; 1769 } 1770 1771 if (port->nr == 1 && dev->link[l].info->type == DDB_OCTOPUS_CI && 1772 dev->link[l].info->i2c_mask == 1) { 1773 port->name = "NO TAB"; 1774 port->class = DDB_PORT_NONE; 1775 return; 1776 } 1777 1778 if (dev->link[l].info->type == DDB_OCTOPUS_MAX) { 1779 port->name = "DUAL DVB-S2 MAX"; 1780 port->type_name = "MXL5XX"; 1781 port->class = DDB_PORT_TUNER; 1782 port->type = DDB_TUNER_MXL5XX; 1783 if (port->i2c) 1784 ddbwritel(dev, I2C_SPEED_400, 1785 port->i2c->regs + I2C_TIMING); 1786 return; 1787 } 1788 1789 if (port->nr > 1 && dev->link[l].info->type == DDB_OCTOPUS_CI) { 1790 port->name = "CI internal"; 1791 port->type_name = "INTERNAL"; 1792 port->class = DDB_PORT_CI; 1793 port->type = DDB_CI_INTERNAL; 1794 } 1795 1796 if (!port->i2c) 1797 return; 1798 1799 /* Probe ports with I2C */ 1800 1801 if (port_has_cxd(port, &id)) { 1802 if (id == 1) { 1803 port->name = "CI"; 1804 port->type_name = "CXD2099"; 1805 port->class = DDB_PORT_CI; 1806 port->type = DDB_CI_EXTERNAL_SONY; 1807 ddbwritel(dev, I2C_SPEED_400, 1808 port->i2c->regs + I2C_TIMING); 1809 } else { 1810 dev_info(dev->dev, "Port %d: Uninitialized DuoFlex\n", 1811 port->nr); 1812 return; 1813 } 1814 } else if (port_has_xo2(port, &type, &id)) { 1815 ddbwritel(dev, I2C_SPEED_400, port->i2c->regs + I2C_TIMING); 1816 /*dev_info(dev->dev, "XO2 ID %02x\n", id);*/ 1817 if (type == 2) { 1818 port->name = "DuoFlex CI"; 1819 port->class = DDB_PORT_CI; 1820 port->type = DDB_CI_EXTERNAL_XO2; 1821 port->type_name = "CI_XO2"; 1822 init_xo2_ci(port); 1823 return; 1824 } 1825 id >>= 2; 1826 if (id > 5) { 1827 port->name = "unknown XO2 DuoFlex"; 1828 port->type_name = "UNKNOWN"; 1829 } else { 1830 port->name = xo2names[id]; 1831 port->class = DDB_PORT_TUNER; 1832 port->type = DDB_TUNER_XO2 + id; 1833 port->type_name = xo2types[id]; 1834 init_xo2(port); 1835 } 1836 } else if (port_has_cxd28xx(port, &id)) { 1837 switch (id) { 1838 case 0xa4: 1839 port->name = "DUAL DVB-C2T2 CXD2843"; 1840 port->type = DDB_TUNER_DVBC2T2_SONY_P; 1841 port->type_name = "DVBC2T2_SONY"; 1842 break; 1843 case 0xb1: 1844 port->name = "DUAL DVB-CT2 CXD2837"; 1845 port->type = DDB_TUNER_DVBCT2_SONY_P; 1846 port->type_name = "DVBCT2_SONY"; 1847 break; 1848 case 0xb0: 1849 port->name = "DUAL ISDB-T CXD2838"; 1850 port->type = DDB_TUNER_ISDBT_SONY_P; 1851 port->type_name = "ISDBT_SONY"; 1852 break; 1853 case 0xc1: 1854 port->name = "DUAL DVB-C2T2 ISDB-T CXD2854"; 1855 port->type = DDB_TUNER_DVBC2T2I_SONY_P; 1856 port->type_name = "DVBC2T2I_ISDBT_SONY"; 1857 break; 1858 default: 1859 return; 1860 } 1861 port->class = DDB_PORT_TUNER; 1862 ddbwritel(dev, I2C_SPEED_400, port->i2c->regs + I2C_TIMING); 1863 } else if (port_has_stv0900(port)) { 1864 port->name = "DUAL DVB-S2"; 1865 port->class = DDB_PORT_TUNER; 1866 port->type = DDB_TUNER_DVBS_ST; 1867 port->type_name = "DVBS_ST"; 1868 ddbwritel(dev, I2C_SPEED_100, port->i2c->regs + I2C_TIMING); 1869 } else if (port_has_stv0900_aa(port, &id)) { 1870 port->name = "DUAL DVB-S2"; 1871 port->class = DDB_PORT_TUNER; 1872 if (id == 0x51) { 1873 if (port->nr == 0 && 1874 dev->link[l].info->ts_quirks & TS_QUIRK_REVERSED) 1875 port->type = DDB_TUNER_DVBS_STV0910_PR; 1876 else 1877 port->type = DDB_TUNER_DVBS_STV0910_P; 1878 port->type_name = "DVBS_ST_0910"; 1879 } else { 1880 port->type = DDB_TUNER_DVBS_ST_AA; 1881 port->type_name = "DVBS_ST_AA"; 1882 } 1883 ddbwritel(dev, I2C_SPEED_100, port->i2c->regs + I2C_TIMING); 1884 } else if (port_has_drxks(port)) { 1885 port->name = "DUAL DVB-C/T"; 1886 port->class = DDB_PORT_TUNER; 1887 port->type = DDB_TUNER_DVBCT_TR; 1888 port->type_name = "DVBCT_TR"; 1889 ddbwritel(dev, I2C_SPEED_400, port->i2c->regs + I2C_TIMING); 1890 } else if (port_has_stv0367(port)) { 1891 port->name = "DUAL DVB-C/T"; 1892 port->class = DDB_PORT_TUNER; 1893 port->type = DDB_TUNER_DVBCT_ST; 1894 port->type_name = "DVBCT_ST"; 1895 ddbwritel(dev, I2C_SPEED_100, port->i2c->regs + I2C_TIMING); 1896 } else if (port_has_encti(port)) { 1897 port->name = "ENCTI"; 1898 port->class = DDB_PORT_LOOP; 1899 } 1900 } 1901 1902 /****************************************************************************/ 1903 /****************************************************************************/ 1904 /****************************************************************************/ 1905 1906 static int ddb_port_attach(struct ddb_port *port) 1907 { 1908 int ret = 0; 1909 1910 switch (port->class) { 1911 case DDB_PORT_TUNER: 1912 ret = dvb_input_attach(port->input[0]); 1913 if (ret < 0) 1914 break; 1915 ret = dvb_input_attach(port->input[1]); 1916 if (ret < 0) { 1917 dvb_input_detach(port->input[0]); 1918 break; 1919 } 1920 port->input[0]->redi = port->input[0]; 1921 port->input[1]->redi = port->input[1]; 1922 break; 1923 case DDB_PORT_CI: 1924 ret = ddb_ci_attach(port, ci_bitrate); 1925 if (ret < 0) 1926 break; 1927 /* fall-through */ 1928 case DDB_PORT_LOOP: 1929 ret = dvb_register_device(port->dvb[0].adap, 1930 &port->dvb[0].dev, 1931 &dvbdev_ci, (void *)port->output, 1932 DVB_DEVICE_SEC, 0); 1933 break; 1934 default: 1935 break; 1936 } 1937 if (ret < 0) 1938 dev_err(port->dev->dev, "port_attach on port %d failed\n", 1939 port->nr); 1940 return ret; 1941 } 1942 1943 int ddb_ports_attach(struct ddb *dev) 1944 { 1945 int i, numports, err_ports = 0, ret = 0; 1946 struct ddb_port *port; 1947 1948 if (dev->port_num) { 1949 ret = dvb_register_adapters(dev); 1950 if (ret < 0) { 1951 dev_err(dev->dev, "Registering adapters failed. Check DVB_MAX_ADAPTERS in config.\n"); 1952 return ret; 1953 } 1954 } 1955 1956 numports = dev->port_num; 1957 1958 for (i = 0; i < dev->port_num; i++) { 1959 port = &dev->port[i]; 1960 if (port->class != DDB_PORT_NONE) { 1961 ret = ddb_port_attach(port); 1962 if (ret) 1963 err_ports++; 1964 } else { 1965 numports--; 1966 } 1967 } 1968 1969 if (err_ports) { 1970 if (err_ports == numports) { 1971 dev_err(dev->dev, "All connected ports failed to initialise!\n"); 1972 return -ENODEV; 1973 } 1974 1975 dev_warn(dev->dev, "%d of %d connected ports failed to initialise!\n", 1976 err_ports, numports); 1977 } 1978 1979 return 0; 1980 } 1981 1982 void ddb_ports_detach(struct ddb *dev) 1983 { 1984 int i; 1985 struct ddb_port *port; 1986 1987 for (i = 0; i < dev->port_num; i++) { 1988 port = &dev->port[i]; 1989 1990 switch (port->class) { 1991 case DDB_PORT_TUNER: 1992 dvb_input_detach(port->input[1]); 1993 dvb_input_detach(port->input[0]); 1994 break; 1995 case DDB_PORT_CI: 1996 case DDB_PORT_LOOP: 1997 ddb_ci_detach(port); 1998 break; 1999 } 2000 } 2001 dvb_unregister_adapters(dev); 2002 } 2003 2004 /* Copy input DMA pointers to output DMA and ACK. */ 2005 2006 static void input_write_output(struct ddb_input *input, 2007 struct ddb_output *output) 2008 { 2009 ddbwritel(output->port->dev, 2010 input->dma->stat, DMA_BUFFER_ACK(output->dma)); 2011 output->dma->cbuf = (input->dma->stat >> 11) & 0x1f; 2012 output->dma->coff = (input->dma->stat & 0x7ff) << 7; 2013 } 2014 2015 static void output_ack_input(struct ddb_output *output, 2016 struct ddb_input *input) 2017 { 2018 ddbwritel(input->port->dev, 2019 output->dma->stat, DMA_BUFFER_ACK(input->dma)); 2020 } 2021 2022 static void input_write_dvb(struct ddb_input *input, 2023 struct ddb_input *input2) 2024 { 2025 struct ddb_dvb *dvb = &input2->port->dvb[input2->nr & 1]; 2026 struct ddb_dma *dma, *dma2; 2027 struct ddb *dev = input->port->dev; 2028 int ack = 1; 2029 2030 dma = input->dma; 2031 dma2 = input->dma; 2032 /* 2033 * if there also is an output connected, do not ACK. 2034 * input_write_output will ACK. 2035 */ 2036 if (input->redo) { 2037 dma2 = input->redo->dma; 2038 ack = 0; 2039 } 2040 while (dma->cbuf != ((dma->stat >> 11) & 0x1f) || 2041 (4 & dma->ctrl)) { 2042 if (4 & dma->ctrl) { 2043 /* dev_err(dev->dev, "Overflow dma %d\n", dma->nr); */ 2044 ack = 1; 2045 } 2046 if (alt_dma) 2047 dma_sync_single_for_cpu(dev->dev, dma2->pbuf[dma->cbuf], 2048 dma2->size, DMA_FROM_DEVICE); 2049 dvb_dmx_swfilter_packets(&dvb->demux, 2050 dma2->vbuf[dma->cbuf], 2051 dma2->size / 188); 2052 dma->cbuf = (dma->cbuf + 1) % dma2->num; 2053 if (ack) 2054 ddbwritel(dev, (dma->cbuf << 11), 2055 DMA_BUFFER_ACK(dma)); 2056 dma->stat = safe_ddbreadl(dev, DMA_BUFFER_CURRENT(dma)); 2057 dma->ctrl = safe_ddbreadl(dev, DMA_BUFFER_CONTROL(dma)); 2058 } 2059 } 2060 2061 static void input_work(struct work_struct *work) 2062 { 2063 struct ddb_dma *dma = container_of(work, struct ddb_dma, work); 2064 struct ddb_input *input = (struct ddb_input *)dma->io; 2065 struct ddb *dev = input->port->dev; 2066 unsigned long flags; 2067 2068 spin_lock_irqsave(&dma->lock, flags); 2069 if (!dma->running) { 2070 spin_unlock_irqrestore(&dma->lock, flags); 2071 return; 2072 } 2073 dma->stat = ddbreadl(dev, DMA_BUFFER_CURRENT(dma)); 2074 dma->ctrl = ddbreadl(dev, DMA_BUFFER_CONTROL(dma)); 2075 2076 if (input->redi) 2077 input_write_dvb(input, input->redi); 2078 if (input->redo) 2079 input_write_output(input, input->redo); 2080 wake_up(&dma->wq); 2081 spin_unlock_irqrestore(&dma->lock, flags); 2082 } 2083 2084 static void input_handler(unsigned long data) 2085 { 2086 struct ddb_input *input = (struct ddb_input *)data; 2087 struct ddb_dma *dma = input->dma; 2088 2089 /* 2090 * If there is no input connected, input_tasklet() will 2091 * just copy pointers and ACK. So, there is no need to go 2092 * through the tasklet scheduler. 2093 */ 2094 if (input->redi) 2095 queue_work(ddb_wq, &dma->work); 2096 else 2097 input_work(&dma->work); 2098 } 2099 2100 static void output_handler(unsigned long data) 2101 { 2102 struct ddb_output *output = (struct ddb_output *)data; 2103 struct ddb_dma *dma = output->dma; 2104 struct ddb *dev = output->port->dev; 2105 2106 spin_lock(&dma->lock); 2107 if (!dma->running) { 2108 spin_unlock(&dma->lock); 2109 return; 2110 } 2111 dma->stat = ddbreadl(dev, DMA_BUFFER_CURRENT(dma)); 2112 dma->ctrl = ddbreadl(dev, DMA_BUFFER_CONTROL(dma)); 2113 if (output->redi) 2114 output_ack_input(output, output->redi); 2115 wake_up(&dma->wq); 2116 spin_unlock(&dma->lock); 2117 } 2118 2119 /****************************************************************************/ 2120 /****************************************************************************/ 2121 2122 static const struct ddb_regmap *io_regmap(struct ddb_io *io, int link) 2123 { 2124 const struct ddb_info *info; 2125 2126 if (link) 2127 info = io->port->dev->link[io->port->lnr].info; 2128 else 2129 info = io->port->dev->link[0].info; 2130 2131 if (!info) 2132 return NULL; 2133 2134 return info->regmap; 2135 } 2136 2137 static void ddb_dma_init(struct ddb_io *io, int nr, int out) 2138 { 2139 struct ddb_dma *dma; 2140 const struct ddb_regmap *rm = io_regmap(io, 0); 2141 2142 dma = out ? &io->port->dev->odma[nr] : &io->port->dev->idma[nr]; 2143 io->dma = dma; 2144 dma->io = io; 2145 2146 spin_lock_init(&dma->lock); 2147 init_waitqueue_head(&dma->wq); 2148 if (out) { 2149 dma->regs = rm->odma->base + rm->odma->size * nr; 2150 dma->bufregs = rm->odma_buf->base + rm->odma_buf->size * nr; 2151 dma->num = OUTPUT_DMA_BUFS; 2152 dma->size = OUTPUT_DMA_SIZE; 2153 dma->div = OUTPUT_DMA_IRQ_DIV; 2154 } else { 2155 INIT_WORK(&dma->work, input_work); 2156 dma->regs = rm->idma->base + rm->idma->size * nr; 2157 dma->bufregs = rm->idma_buf->base + rm->idma_buf->size * nr; 2158 dma->num = INPUT_DMA_BUFS; 2159 dma->size = INPUT_DMA_SIZE; 2160 dma->div = INPUT_DMA_IRQ_DIV; 2161 } 2162 ddbwritel(io->port->dev, 0, DMA_BUFFER_ACK(dma)); 2163 dev_dbg(io->port->dev->dev, "init link %u, io %u, dma %u, dmaregs %08x bufregs %08x\n", 2164 io->port->lnr, io->nr, nr, dma->regs, dma->bufregs); 2165 } 2166 2167 static void ddb_input_init(struct ddb_port *port, int nr, int pnr, int anr) 2168 { 2169 struct ddb *dev = port->dev; 2170 struct ddb_input *input = &dev->input[anr]; 2171 const struct ddb_regmap *rm; 2172 2173 port->input[pnr] = input; 2174 input->nr = nr; 2175 input->port = port; 2176 rm = io_regmap(input, 1); 2177 input->regs = DDB_LINK_TAG(port->lnr) | 2178 (rm->input->base + rm->input->size * nr); 2179 dev_dbg(dev->dev, "init link %u, input %u, regs %08x\n", 2180 port->lnr, nr, input->regs); 2181 2182 if (dev->has_dma) { 2183 const struct ddb_regmap *rm0 = io_regmap(input, 0); 2184 u32 base = rm0->irq_base_idma; 2185 u32 dma_nr = nr; 2186 2187 if (port->lnr) 2188 dma_nr += 32 + (port->lnr - 1) * 8; 2189 2190 dev_dbg(dev->dev, "init link %u, input %u, handler %u\n", 2191 port->lnr, nr, dma_nr + base); 2192 2193 dev->handler[0][dma_nr + base] = input_handler; 2194 dev->handler_data[0][dma_nr + base] = (unsigned long)input; 2195 ddb_dma_init(input, dma_nr, 0); 2196 } 2197 } 2198 2199 static void ddb_output_init(struct ddb_port *port, int nr) 2200 { 2201 struct ddb *dev = port->dev; 2202 struct ddb_output *output = &dev->output[nr]; 2203 const struct ddb_regmap *rm; 2204 2205 port->output = output; 2206 output->nr = nr; 2207 output->port = port; 2208 rm = io_regmap(output, 1); 2209 output->regs = DDB_LINK_TAG(port->lnr) | 2210 (rm->output->base + rm->output->size * nr); 2211 2212 dev_dbg(dev->dev, "init link %u, output %u, regs %08x\n", 2213 port->lnr, nr, output->regs); 2214 2215 if (dev->has_dma) { 2216 const struct ddb_regmap *rm0 = io_regmap(output, 0); 2217 u32 base = rm0->irq_base_odma; 2218 2219 dev->handler[0][nr + base] = output_handler; 2220 dev->handler_data[0][nr + base] = (unsigned long)output; 2221 ddb_dma_init(output, nr, 1); 2222 } 2223 } 2224 2225 static int ddb_port_match_i2c(struct ddb_port *port) 2226 { 2227 struct ddb *dev = port->dev; 2228 u32 i; 2229 2230 for (i = 0; i < dev->i2c_num; i++) { 2231 if (dev->i2c[i].link == port->lnr && 2232 dev->i2c[i].nr == port->nr) { 2233 port->i2c = &dev->i2c[i]; 2234 return 1; 2235 } 2236 } 2237 return 0; 2238 } 2239 2240 static int ddb_port_match_link_i2c(struct ddb_port *port) 2241 { 2242 struct ddb *dev = port->dev; 2243 u32 i; 2244 2245 for (i = 0; i < dev->i2c_num; i++) { 2246 if (dev->i2c[i].link == port->lnr) { 2247 port->i2c = &dev->i2c[i]; 2248 return 1; 2249 } 2250 } 2251 return 0; 2252 } 2253 2254 void ddb_ports_init(struct ddb *dev) 2255 { 2256 u32 i, l, p; 2257 struct ddb_port *port; 2258 const struct ddb_info *info; 2259 const struct ddb_regmap *rm; 2260 2261 for (p = l = 0; l < DDB_MAX_LINK; l++) { 2262 info = dev->link[l].info; 2263 if (!info) 2264 continue; 2265 rm = info->regmap; 2266 if (!rm) 2267 continue; 2268 for (i = 0; i < info->port_num; i++, p++) { 2269 port = &dev->port[p]; 2270 port->dev = dev; 2271 port->nr = i; 2272 port->lnr = l; 2273 port->pnr = p; 2274 port->gap = 0xffffffff; 2275 port->obr = ci_bitrate; 2276 mutex_init(&port->i2c_gate_lock); 2277 2278 if (!ddb_port_match_i2c(port)) { 2279 if (info->type == DDB_OCTOPUS_MAX) 2280 ddb_port_match_link_i2c(port); 2281 } 2282 2283 ddb_port_probe(port); 2284 2285 port->dvb[0].adap = &dev->adap[2 * p]; 2286 port->dvb[1].adap = &dev->adap[2 * p + 1]; 2287 2288 if (port->class == DDB_PORT_NONE && i && p && 2289 dev->port[p - 1].type == DDB_CI_EXTERNAL_XO2) { 2290 port->class = DDB_PORT_CI; 2291 port->type = DDB_CI_EXTERNAL_XO2_B; 2292 port->name = "DuoFlex CI_B"; 2293 port->i2c = dev->port[p - 1].i2c; 2294 } 2295 2296 dev_info(dev->dev, "Port %u: Link %u, Link Port %u (TAB %u): %s\n", 2297 port->pnr, port->lnr, port->nr, port->nr + 1, 2298 port->name); 2299 2300 if (port->class == DDB_PORT_CI && 2301 port->type == DDB_CI_EXTERNAL_XO2) { 2302 ddb_input_init(port, 2 * i, 0, 2 * i); 2303 ddb_output_init(port, i); 2304 continue; 2305 } 2306 2307 if (port->class == DDB_PORT_CI && 2308 port->type == DDB_CI_EXTERNAL_XO2_B) { 2309 ddb_input_init(port, 2 * i - 1, 0, 2 * i - 1); 2310 ddb_output_init(port, i); 2311 continue; 2312 } 2313 2314 if (port->class == DDB_PORT_NONE) 2315 continue; 2316 2317 switch (dev->link[l].info->type) { 2318 case DDB_OCTOPUS_CI: 2319 if (i >= 2) { 2320 ddb_input_init(port, 2 + i, 0, 2 + i); 2321 ddb_input_init(port, 4 + i, 1, 4 + i); 2322 ddb_output_init(port, i); 2323 break; 2324 } /* fallthrough */ 2325 case DDB_OCTOPUS: 2326 ddb_input_init(port, 2 * i, 0, 2 * i); 2327 ddb_input_init(port, 2 * i + 1, 1, 2 * i + 1); 2328 ddb_output_init(port, i); 2329 break; 2330 case DDB_OCTOPUS_MAX: 2331 case DDB_OCTOPUS_MAX_CT: 2332 ddb_input_init(port, 2 * i, 0, 2 * p); 2333 ddb_input_init(port, 2 * i + 1, 1, 2 * p + 1); 2334 break; 2335 default: 2336 break; 2337 } 2338 } 2339 } 2340 dev->port_num = p; 2341 } 2342 2343 void ddb_ports_release(struct ddb *dev) 2344 { 2345 int i; 2346 struct ddb_port *port; 2347 2348 for (i = 0; i < dev->port_num; i++) { 2349 port = &dev->port[i]; 2350 if (port->input[0] && port->input[0]->dma) 2351 cancel_work_sync(&port->input[0]->dma->work); 2352 if (port->input[1] && port->input[1]->dma) 2353 cancel_work_sync(&port->input[1]->dma->work); 2354 if (port->output && port->output->dma) 2355 cancel_work_sync(&port->output->dma->work); 2356 } 2357 } 2358 2359 /****************************************************************************/ 2360 /****************************************************************************/ 2361 /****************************************************************************/ 2362 2363 #define IRQ_HANDLE(_nr) \ 2364 do { if ((s & (1UL << ((_nr) & 0x1f))) && dev->handler[0][_nr]) \ 2365 dev->handler[0][_nr](dev->handler_data[0][_nr]); } \ 2366 while (0) 2367 2368 static void irq_handle_msg(struct ddb *dev, u32 s) 2369 { 2370 dev->i2c_irq++; 2371 IRQ_HANDLE(0); 2372 IRQ_HANDLE(1); 2373 IRQ_HANDLE(2); 2374 IRQ_HANDLE(3); 2375 } 2376 2377 static void irq_handle_io(struct ddb *dev, u32 s) 2378 { 2379 dev->ts_irq++; 2380 if ((s & 0x000000f0)) { 2381 IRQ_HANDLE(4); 2382 IRQ_HANDLE(5); 2383 IRQ_HANDLE(6); 2384 IRQ_HANDLE(7); 2385 } 2386 if ((s & 0x0000ff00)) { 2387 IRQ_HANDLE(8); 2388 IRQ_HANDLE(9); 2389 IRQ_HANDLE(10); 2390 IRQ_HANDLE(11); 2391 IRQ_HANDLE(12); 2392 IRQ_HANDLE(13); 2393 IRQ_HANDLE(14); 2394 IRQ_HANDLE(15); 2395 } 2396 if ((s & 0x00ff0000)) { 2397 IRQ_HANDLE(16); 2398 IRQ_HANDLE(17); 2399 IRQ_HANDLE(18); 2400 IRQ_HANDLE(19); 2401 IRQ_HANDLE(20); 2402 IRQ_HANDLE(21); 2403 IRQ_HANDLE(22); 2404 IRQ_HANDLE(23); 2405 } 2406 if ((s & 0xff000000)) { 2407 IRQ_HANDLE(24); 2408 IRQ_HANDLE(25); 2409 IRQ_HANDLE(26); 2410 IRQ_HANDLE(27); 2411 IRQ_HANDLE(28); 2412 IRQ_HANDLE(29); 2413 IRQ_HANDLE(30); 2414 IRQ_HANDLE(31); 2415 } 2416 } 2417 2418 irqreturn_t ddb_irq_handler0(int irq, void *dev_id) 2419 { 2420 struct ddb *dev = (struct ddb *)dev_id; 2421 u32 s = ddbreadl(dev, INTERRUPT_STATUS); 2422 2423 do { 2424 if (s & 0x80000000) 2425 return IRQ_NONE; 2426 if (!(s & 0xfffff00)) 2427 return IRQ_NONE; 2428 ddbwritel(dev, s & 0xfffff00, INTERRUPT_ACK); 2429 irq_handle_io(dev, s); 2430 } while ((s = ddbreadl(dev, INTERRUPT_STATUS))); 2431 2432 return IRQ_HANDLED; 2433 } 2434 2435 irqreturn_t ddb_irq_handler1(int irq, void *dev_id) 2436 { 2437 struct ddb *dev = (struct ddb *)dev_id; 2438 u32 s = ddbreadl(dev, INTERRUPT_STATUS); 2439 2440 do { 2441 if (s & 0x80000000) 2442 return IRQ_NONE; 2443 if (!(s & 0x0000f)) 2444 return IRQ_NONE; 2445 ddbwritel(dev, s & 0x0000f, INTERRUPT_ACK); 2446 irq_handle_msg(dev, s); 2447 } while ((s = ddbreadl(dev, INTERRUPT_STATUS))); 2448 2449 return IRQ_HANDLED; 2450 } 2451 2452 irqreturn_t ddb_irq_handler(int irq, void *dev_id) 2453 { 2454 struct ddb *dev = (struct ddb *)dev_id; 2455 u32 s = ddbreadl(dev, INTERRUPT_STATUS); 2456 int ret = IRQ_HANDLED; 2457 2458 if (!s) 2459 return IRQ_NONE; 2460 do { 2461 if (s & 0x80000000) 2462 return IRQ_NONE; 2463 ddbwritel(dev, s, INTERRUPT_ACK); 2464 2465 if (s & 0x0000000f) 2466 irq_handle_msg(dev, s); 2467 if (s & 0x0fffff00) 2468 irq_handle_io(dev, s); 2469 } while ((s = ddbreadl(dev, INTERRUPT_STATUS))); 2470 2471 return ret; 2472 } 2473 2474 /****************************************************************************/ 2475 /****************************************************************************/ 2476 /****************************************************************************/ 2477 2478 static int reg_wait(struct ddb *dev, u32 reg, u32 bit) 2479 { 2480 u32 count = 0; 2481 2482 while (safe_ddbreadl(dev, reg) & bit) { 2483 ndelay(10); 2484 if (++count == 100) 2485 return -1; 2486 } 2487 return 0; 2488 } 2489 2490 static int flashio(struct ddb *dev, u32 lnr, u8 *wbuf, u32 wlen, u8 *rbuf, 2491 u32 rlen) 2492 { 2493 u32 data, shift; 2494 u32 tag = DDB_LINK_TAG(lnr); 2495 struct ddb_link *link = &dev->link[lnr]; 2496 2497 mutex_lock(&link->flash_mutex); 2498 if (wlen > 4) 2499 ddbwritel(dev, 1, tag | SPI_CONTROL); 2500 while (wlen > 4) { 2501 /* FIXME: check for big-endian */ 2502 data = swab32(*(u32 *)wbuf); 2503 wbuf += 4; 2504 wlen -= 4; 2505 ddbwritel(dev, data, tag | SPI_DATA); 2506 if (reg_wait(dev, tag | SPI_CONTROL, 4)) 2507 goto fail; 2508 } 2509 if (rlen) 2510 ddbwritel(dev, 0x0001 | ((wlen << (8 + 3)) & 0x1f00), 2511 tag | SPI_CONTROL); 2512 else 2513 ddbwritel(dev, 0x0003 | ((wlen << (8 + 3)) & 0x1f00), 2514 tag | SPI_CONTROL); 2515 2516 data = 0; 2517 shift = ((4 - wlen) * 8); 2518 while (wlen) { 2519 data <<= 8; 2520 data |= *wbuf; 2521 wlen--; 2522 wbuf++; 2523 } 2524 if (shift) 2525 data <<= shift; 2526 ddbwritel(dev, data, tag | SPI_DATA); 2527 if (reg_wait(dev, tag | SPI_CONTROL, 4)) 2528 goto fail; 2529 2530 if (!rlen) { 2531 ddbwritel(dev, 0, tag | SPI_CONTROL); 2532 goto exit; 2533 } 2534 if (rlen > 4) 2535 ddbwritel(dev, 1, tag | SPI_CONTROL); 2536 2537 while (rlen > 4) { 2538 ddbwritel(dev, 0xffffffff, tag | SPI_DATA); 2539 if (reg_wait(dev, tag | SPI_CONTROL, 4)) 2540 goto fail; 2541 data = ddbreadl(dev, tag | SPI_DATA); 2542 *(u32 *)rbuf = swab32(data); 2543 rbuf += 4; 2544 rlen -= 4; 2545 } 2546 ddbwritel(dev, 0x0003 | ((rlen << (8 + 3)) & 0x1F00), 2547 tag | SPI_CONTROL); 2548 ddbwritel(dev, 0xffffffff, tag | SPI_DATA); 2549 if (reg_wait(dev, tag | SPI_CONTROL, 4)) 2550 goto fail; 2551 2552 data = ddbreadl(dev, tag | SPI_DATA); 2553 ddbwritel(dev, 0, tag | SPI_CONTROL); 2554 2555 if (rlen < 4) 2556 data <<= ((4 - rlen) * 8); 2557 2558 while (rlen > 0) { 2559 *rbuf = ((data >> 24) & 0xff); 2560 data <<= 8; 2561 rbuf++; 2562 rlen--; 2563 } 2564 exit: 2565 mutex_unlock(&link->flash_mutex); 2566 return 0; 2567 fail: 2568 mutex_unlock(&link->flash_mutex); 2569 return -1; 2570 } 2571 2572 int ddbridge_flashread(struct ddb *dev, u32 link, u8 *buf, u32 addr, u32 len) 2573 { 2574 u8 cmd[4] = {0x03, (addr >> 16) & 0xff, 2575 (addr >> 8) & 0xff, addr & 0xff}; 2576 2577 return flashio(dev, link, cmd, 4, buf, len); 2578 } 2579 2580 /* 2581 * TODO/FIXME: add/implement IOCTLs from upstream driver 2582 */ 2583 2584 #define DDB_NAME "ddbridge" 2585 2586 static u32 ddb_num; 2587 static int ddb_major; 2588 static DEFINE_MUTEX(ddb_mutex); 2589 2590 static int ddb_release(struct inode *inode, struct file *file) 2591 { 2592 struct ddb *dev = file->private_data; 2593 2594 dev->ddb_dev_users--; 2595 return 0; 2596 } 2597 2598 static int ddb_open(struct inode *inode, struct file *file) 2599 { 2600 struct ddb *dev = ddbs[iminor(inode)]; 2601 2602 if (dev->ddb_dev_users) 2603 return -EBUSY; 2604 dev->ddb_dev_users++; 2605 file->private_data = dev; 2606 return 0; 2607 } 2608 2609 static long ddb_ioctl(struct file *file, unsigned int cmd, unsigned long arg) 2610 { 2611 struct ddb *dev = file->private_data; 2612 2613 dev_warn(dev->dev, "DDB IOCTLs unsupported (cmd: %d, arg: %lu)\n", 2614 cmd, arg); 2615 2616 return -ENOTTY; 2617 } 2618 2619 static const struct file_operations ddb_fops = { 2620 .unlocked_ioctl = ddb_ioctl, 2621 .open = ddb_open, 2622 .release = ddb_release, 2623 }; 2624 2625 static char *ddb_devnode(struct device *device, umode_t *mode) 2626 { 2627 struct ddb *dev = dev_get_drvdata(device); 2628 2629 return kasprintf(GFP_KERNEL, "ddbridge/card%d", dev->nr); 2630 } 2631 2632 #define __ATTR_MRO(_name, _show) { \ 2633 .attr = { .name = __stringify(_name), .mode = 0444 }, \ 2634 .show = _show, \ 2635 } 2636 2637 #define __ATTR_MWO(_name, _store) { \ 2638 .attr = { .name = __stringify(_name), .mode = 0222 }, \ 2639 .store = _store, \ 2640 } 2641 2642 static ssize_t ports_show(struct device *device, 2643 struct device_attribute *attr, char *buf) 2644 { 2645 struct ddb *dev = dev_get_drvdata(device); 2646 2647 return sprintf(buf, "%d\n", dev->port_num); 2648 } 2649 2650 static ssize_t ts_irq_show(struct device *device, 2651 struct device_attribute *attr, char *buf) 2652 { 2653 struct ddb *dev = dev_get_drvdata(device); 2654 2655 return sprintf(buf, "%d\n", dev->ts_irq); 2656 } 2657 2658 static ssize_t i2c_irq_show(struct device *device, 2659 struct device_attribute *attr, char *buf) 2660 { 2661 struct ddb *dev = dev_get_drvdata(device); 2662 2663 return sprintf(buf, "%d\n", dev->i2c_irq); 2664 } 2665 2666 static ssize_t fan_show(struct device *device, 2667 struct device_attribute *attr, char *buf) 2668 { 2669 struct ddb *dev = dev_get_drvdata(device); 2670 u32 val; 2671 2672 val = ddbreadl(dev, GPIO_OUTPUT) & 1; 2673 return sprintf(buf, "%d\n", val); 2674 } 2675 2676 static ssize_t fan_store(struct device *device, struct device_attribute *d, 2677 const char *buf, size_t count) 2678 { 2679 struct ddb *dev = dev_get_drvdata(device); 2680 u32 val; 2681 2682 if (sscanf(buf, "%u\n", &val) != 1) 2683 return -EINVAL; 2684 ddbwritel(dev, 1, GPIO_DIRECTION); 2685 ddbwritel(dev, val & 1, GPIO_OUTPUT); 2686 return count; 2687 } 2688 2689 static ssize_t fanspeed_show(struct device *device, 2690 struct device_attribute *attr, char *buf) 2691 { 2692 struct ddb *dev = dev_get_drvdata(device); 2693 int num = attr->attr.name[8] - 0x30; 2694 struct ddb_link *link = &dev->link[num]; 2695 u32 spd; 2696 2697 spd = ddblreadl(link, TEMPMON_FANCONTROL) & 0xff; 2698 return sprintf(buf, "%u\n", spd * 100); 2699 } 2700 2701 static ssize_t temp_show(struct device *device, 2702 struct device_attribute *attr, char *buf) 2703 { 2704 struct ddb *dev = dev_get_drvdata(device); 2705 struct ddb_link *link = &dev->link[0]; 2706 struct i2c_adapter *adap; 2707 int temp, temp2; 2708 u8 tmp[2]; 2709 2710 if (!link->info->temp_num) 2711 return sprintf(buf, "no sensor\n"); 2712 adap = &dev->i2c[link->info->temp_bus].adap; 2713 if (i2c_read_regs(adap, 0x48, 0, tmp, 2) < 0) 2714 return sprintf(buf, "read_error\n"); 2715 temp = (tmp[0] << 3) | (tmp[1] >> 5); 2716 temp *= 125; 2717 if (link->info->temp_num == 2) { 2718 if (i2c_read_regs(adap, 0x49, 0, tmp, 2) < 0) 2719 return sprintf(buf, "read_error\n"); 2720 temp2 = (tmp[0] << 3) | (tmp[1] >> 5); 2721 temp2 *= 125; 2722 return sprintf(buf, "%d %d\n", temp, temp2); 2723 } 2724 return sprintf(buf, "%d\n", temp); 2725 } 2726 2727 static ssize_t ctemp_show(struct device *device, 2728 struct device_attribute *attr, char *buf) 2729 { 2730 struct ddb *dev = dev_get_drvdata(device); 2731 struct i2c_adapter *adap; 2732 int temp; 2733 u8 tmp[2]; 2734 int num = attr->attr.name[4] - 0x30; 2735 2736 adap = &dev->i2c[num].adap; 2737 if (!adap) 2738 return 0; 2739 if (i2c_read_regs(adap, 0x49, 0, tmp, 2) < 0) 2740 if (i2c_read_regs(adap, 0x4d, 0, tmp, 2) < 0) 2741 return sprintf(buf, "no sensor\n"); 2742 temp = tmp[0] * 1000; 2743 return sprintf(buf, "%d\n", temp); 2744 } 2745 2746 static ssize_t led_show(struct device *device, 2747 struct device_attribute *attr, char *buf) 2748 { 2749 struct ddb *dev = dev_get_drvdata(device); 2750 int num = attr->attr.name[3] - 0x30; 2751 2752 return sprintf(buf, "%d\n", dev->leds & (1 << num) ? 1 : 0); 2753 } 2754 2755 static void ddb_set_led(struct ddb *dev, int num, int val) 2756 { 2757 if (!dev->link[0].info->led_num) 2758 return; 2759 switch (dev->port[num].class) { 2760 case DDB_PORT_TUNER: 2761 switch (dev->port[num].type) { 2762 case DDB_TUNER_DVBS_ST: 2763 i2c_write_reg16(&dev->i2c[num].adap, 2764 0x69, 0xf14c, val ? 2 : 0); 2765 break; 2766 case DDB_TUNER_DVBCT_ST: 2767 i2c_write_reg16(&dev->i2c[num].adap, 2768 0x1f, 0xf00e, 0); 2769 i2c_write_reg16(&dev->i2c[num].adap, 2770 0x1f, 0xf00f, val ? 1 : 0); 2771 break; 2772 case DDB_TUNER_XO2 ... DDB_TUNER_DVBC2T2I_SONY: 2773 { 2774 u8 v; 2775 2776 i2c_read_reg(&dev->i2c[num].adap, 0x10, 0x08, &v); 2777 v = (v & ~0x10) | (val ? 0x10 : 0); 2778 i2c_write_reg(&dev->i2c[num].adap, 0x10, 0x08, v); 2779 break; 2780 } 2781 default: 2782 break; 2783 } 2784 break; 2785 } 2786 } 2787 2788 static ssize_t led_store(struct device *device, 2789 struct device_attribute *attr, 2790 const char *buf, size_t count) 2791 { 2792 struct ddb *dev = dev_get_drvdata(device); 2793 int num = attr->attr.name[3] - 0x30; 2794 u32 val; 2795 2796 if (sscanf(buf, "%u\n", &val) != 1) 2797 return -EINVAL; 2798 if (val) 2799 dev->leds |= (1 << num); 2800 else 2801 dev->leds &= ~(1 << num); 2802 ddb_set_led(dev, num, val); 2803 return count; 2804 } 2805 2806 static ssize_t snr_show(struct device *device, 2807 struct device_attribute *attr, char *buf) 2808 { 2809 struct ddb *dev = dev_get_drvdata(device); 2810 char snr[32]; 2811 int num = attr->attr.name[3] - 0x30; 2812 2813 if (dev->port[num].type >= DDB_TUNER_XO2) { 2814 if (i2c_read_regs(&dev->i2c[num].adap, 0x10, 0x10, snr, 16) < 0) 2815 return sprintf(buf, "NO SNR\n"); 2816 snr[16] = 0; 2817 } else { 2818 /* serial number at 0x100-0x11f */ 2819 if (i2c_read_regs16(&dev->i2c[num].adap, 2820 0x57, 0x100, snr, 32) < 0) 2821 if (i2c_read_regs16(&dev->i2c[num].adap, 2822 0x50, 0x100, snr, 32) < 0) 2823 return sprintf(buf, "NO SNR\n"); 2824 snr[31] = 0; /* in case it is not terminated on EEPROM */ 2825 } 2826 return sprintf(buf, "%s\n", snr); 2827 } 2828 2829 static ssize_t bsnr_show(struct device *device, 2830 struct device_attribute *attr, char *buf) 2831 { 2832 struct ddb *dev = dev_get_drvdata(device); 2833 char snr[16]; 2834 2835 ddbridge_flashread(dev, 0, snr, 0x10, 15); 2836 snr[15] = 0; /* in case it is not terminated on EEPROM */ 2837 return sprintf(buf, "%s\n", snr); 2838 } 2839 2840 static ssize_t bpsnr_show(struct device *device, 2841 struct device_attribute *attr, char *buf) 2842 { 2843 struct ddb *dev = dev_get_drvdata(device); 2844 unsigned char snr[32]; 2845 2846 if (!dev->i2c_num) 2847 return 0; 2848 2849 if (i2c_read_regs16(&dev->i2c[0].adap, 2850 0x50, 0x0000, snr, 32) < 0 || 2851 snr[0] == 0xff) 2852 return sprintf(buf, "NO SNR\n"); 2853 snr[31] = 0; /* in case it is not terminated on EEPROM */ 2854 return sprintf(buf, "%s\n", snr); 2855 } 2856 2857 static ssize_t redirect_show(struct device *device, 2858 struct device_attribute *attr, char *buf) 2859 { 2860 return 0; 2861 } 2862 2863 static ssize_t redirect_store(struct device *device, 2864 struct device_attribute *attr, 2865 const char *buf, size_t count) 2866 { 2867 unsigned int i, p; 2868 int res; 2869 2870 if (sscanf(buf, "%x %x\n", &i, &p) != 2) 2871 return -EINVAL; 2872 res = ddb_redirect(i, p); 2873 if (res < 0) 2874 return res; 2875 dev_info(device, "redirect: %02x, %02x\n", i, p); 2876 return count; 2877 } 2878 2879 static ssize_t gap_show(struct device *device, 2880 struct device_attribute *attr, char *buf) 2881 { 2882 struct ddb *dev = dev_get_drvdata(device); 2883 int num = attr->attr.name[3] - 0x30; 2884 2885 return sprintf(buf, "%d\n", dev->port[num].gap); 2886 } 2887 2888 static ssize_t gap_store(struct device *device, struct device_attribute *attr, 2889 const char *buf, size_t count) 2890 { 2891 struct ddb *dev = dev_get_drvdata(device); 2892 int num = attr->attr.name[3] - 0x30; 2893 unsigned int val; 2894 2895 if (sscanf(buf, "%u\n", &val) != 1) 2896 return -EINVAL; 2897 if (val > 128) 2898 return -EINVAL; 2899 if (val == 128) 2900 val = 0xffffffff; 2901 dev->port[num].gap = val; 2902 return count; 2903 } 2904 2905 static ssize_t version_show(struct device *device, 2906 struct device_attribute *attr, char *buf) 2907 { 2908 struct ddb *dev = dev_get_drvdata(device); 2909 2910 return sprintf(buf, "%08x %08x\n", 2911 dev->link[0].ids.hwid, dev->link[0].ids.regmapid); 2912 } 2913 2914 static ssize_t hwid_show(struct device *device, 2915 struct device_attribute *attr, char *buf) 2916 { 2917 struct ddb *dev = dev_get_drvdata(device); 2918 2919 return sprintf(buf, "0x%08X\n", dev->link[0].ids.hwid); 2920 } 2921 2922 static ssize_t regmap_show(struct device *device, 2923 struct device_attribute *attr, char *buf) 2924 { 2925 struct ddb *dev = dev_get_drvdata(device); 2926 2927 return sprintf(buf, "0x%08X\n", dev->link[0].ids.regmapid); 2928 } 2929 2930 static ssize_t fmode_show(struct device *device, 2931 struct device_attribute *attr, char *buf) 2932 { 2933 int num = attr->attr.name[5] - 0x30; 2934 struct ddb *dev = dev_get_drvdata(device); 2935 2936 return sprintf(buf, "%u\n", dev->link[num].lnb.fmode); 2937 } 2938 2939 static ssize_t devid_show(struct device *device, 2940 struct device_attribute *attr, char *buf) 2941 { 2942 int num = attr->attr.name[5] - 0x30; 2943 struct ddb *dev = dev_get_drvdata(device); 2944 2945 return sprintf(buf, "%08x\n", dev->link[num].ids.devid); 2946 } 2947 2948 static ssize_t fmode_store(struct device *device, struct device_attribute *attr, 2949 const char *buf, size_t count) 2950 { 2951 struct ddb *dev = dev_get_drvdata(device); 2952 int num = attr->attr.name[5] - 0x30; 2953 unsigned int val; 2954 2955 if (sscanf(buf, "%u\n", &val) != 1) 2956 return -EINVAL; 2957 if (val > 3) 2958 return -EINVAL; 2959 ddb_lnb_init_fmode(dev, &dev->link[num], val); 2960 return count; 2961 } 2962 2963 static struct device_attribute ddb_attrs[] = { 2964 __ATTR_RO(version), 2965 __ATTR_RO(ports), 2966 __ATTR_RO(ts_irq), 2967 __ATTR_RO(i2c_irq), 2968 __ATTR(gap0, 0664, gap_show, gap_store), 2969 __ATTR(gap1, 0664, gap_show, gap_store), 2970 __ATTR(gap2, 0664, gap_show, gap_store), 2971 __ATTR(gap3, 0664, gap_show, gap_store), 2972 __ATTR(fmode0, 0664, fmode_show, fmode_store), 2973 __ATTR(fmode1, 0664, fmode_show, fmode_store), 2974 __ATTR(fmode2, 0664, fmode_show, fmode_store), 2975 __ATTR(fmode3, 0664, fmode_show, fmode_store), 2976 __ATTR_MRO(devid0, devid_show), 2977 __ATTR_MRO(devid1, devid_show), 2978 __ATTR_MRO(devid2, devid_show), 2979 __ATTR_MRO(devid3, devid_show), 2980 __ATTR_RO(hwid), 2981 __ATTR_RO(regmap), 2982 __ATTR(redirect, 0664, redirect_show, redirect_store), 2983 __ATTR_MRO(snr, bsnr_show), 2984 __ATTR_RO(bpsnr), 2985 __ATTR_NULL, 2986 }; 2987 2988 static struct device_attribute ddb_attrs_temp[] = { 2989 __ATTR_RO(temp), 2990 }; 2991 2992 static struct device_attribute ddb_attrs_fan[] = { 2993 __ATTR(fan, 0664, fan_show, fan_store), 2994 }; 2995 2996 static struct device_attribute ddb_attrs_snr[] = { 2997 __ATTR_MRO(snr0, snr_show), 2998 __ATTR_MRO(snr1, snr_show), 2999 __ATTR_MRO(snr2, snr_show), 3000 __ATTR_MRO(snr3, snr_show), 3001 }; 3002 3003 static struct device_attribute ddb_attrs_ctemp[] = { 3004 __ATTR_MRO(temp0, ctemp_show), 3005 __ATTR_MRO(temp1, ctemp_show), 3006 __ATTR_MRO(temp2, ctemp_show), 3007 __ATTR_MRO(temp3, ctemp_show), 3008 }; 3009 3010 static struct device_attribute ddb_attrs_led[] = { 3011 __ATTR(led0, 0664, led_show, led_store), 3012 __ATTR(led1, 0664, led_show, led_store), 3013 __ATTR(led2, 0664, led_show, led_store), 3014 __ATTR(led3, 0664, led_show, led_store), 3015 }; 3016 3017 static struct device_attribute ddb_attrs_fanspeed[] = { 3018 __ATTR_MRO(fanspeed0, fanspeed_show), 3019 __ATTR_MRO(fanspeed1, fanspeed_show), 3020 __ATTR_MRO(fanspeed2, fanspeed_show), 3021 __ATTR_MRO(fanspeed3, fanspeed_show), 3022 }; 3023 3024 static struct class ddb_class = { 3025 .name = "ddbridge", 3026 .owner = THIS_MODULE, 3027 .devnode = ddb_devnode, 3028 }; 3029 3030 int ddb_class_create(void) 3031 { 3032 ddb_major = register_chrdev(0, DDB_NAME, &ddb_fops); 3033 if (ddb_major < 0) 3034 return ddb_major; 3035 if (class_register(&ddb_class) < 0) 3036 return -1; 3037 return 0; 3038 } 3039 3040 void ddb_class_destroy(void) 3041 { 3042 class_unregister(&ddb_class); 3043 unregister_chrdev(ddb_major, DDB_NAME); 3044 } 3045 3046 static void ddb_device_attrs_del(struct ddb *dev) 3047 { 3048 int i; 3049 3050 for (i = 0; i < 4; i++) 3051 if (dev->link[i].info && dev->link[i].info->tempmon_irq) 3052 device_remove_file(dev->ddb_dev, 3053 &ddb_attrs_fanspeed[i]); 3054 for (i = 0; i < dev->link[0].info->temp_num; i++) 3055 device_remove_file(dev->ddb_dev, &ddb_attrs_temp[i]); 3056 for (i = 0; i < dev->link[0].info->fan_num; i++) 3057 device_remove_file(dev->ddb_dev, &ddb_attrs_fan[i]); 3058 for (i = 0; i < dev->i2c_num && i < 4; i++) { 3059 if (dev->link[0].info->led_num) 3060 device_remove_file(dev->ddb_dev, &ddb_attrs_led[i]); 3061 device_remove_file(dev->ddb_dev, &ddb_attrs_snr[i]); 3062 device_remove_file(dev->ddb_dev, &ddb_attrs_ctemp[i]); 3063 } 3064 for (i = 0; ddb_attrs[i].attr.name; i++) 3065 device_remove_file(dev->ddb_dev, &ddb_attrs[i]); 3066 } 3067 3068 static int ddb_device_attrs_add(struct ddb *dev) 3069 { 3070 int i; 3071 3072 for (i = 0; ddb_attrs[i].attr.name; i++) 3073 if (device_create_file(dev->ddb_dev, &ddb_attrs[i])) 3074 goto fail; 3075 for (i = 0; i < dev->link[0].info->temp_num; i++) 3076 if (device_create_file(dev->ddb_dev, &ddb_attrs_temp[i])) 3077 goto fail; 3078 for (i = 0; i < dev->link[0].info->fan_num; i++) 3079 if (device_create_file(dev->ddb_dev, &ddb_attrs_fan[i])) 3080 goto fail; 3081 for (i = 0; (i < dev->i2c_num) && (i < 4); i++) { 3082 if (device_create_file(dev->ddb_dev, &ddb_attrs_snr[i])) 3083 goto fail; 3084 if (device_create_file(dev->ddb_dev, &ddb_attrs_ctemp[i])) 3085 goto fail; 3086 if (dev->link[0].info->led_num) 3087 if (device_create_file(dev->ddb_dev, 3088 &ddb_attrs_led[i])) 3089 goto fail; 3090 } 3091 for (i = 0; i < 4; i++) 3092 if (dev->link[i].info && dev->link[i].info->tempmon_irq) 3093 if (device_create_file(dev->ddb_dev, 3094 &ddb_attrs_fanspeed[i])) 3095 goto fail; 3096 return 0; 3097 fail: 3098 return -1; 3099 } 3100 3101 int ddb_device_create(struct ddb *dev) 3102 { 3103 int res = 0; 3104 3105 if (ddb_num == DDB_MAX_ADAPTER) 3106 return -ENOMEM; 3107 mutex_lock(&ddb_mutex); 3108 dev->nr = ddb_num; 3109 ddbs[dev->nr] = dev; 3110 dev->ddb_dev = device_create(&ddb_class, dev->dev, 3111 MKDEV(ddb_major, dev->nr), 3112 dev, "ddbridge%d", dev->nr); 3113 if (IS_ERR(dev->ddb_dev)) { 3114 res = PTR_ERR(dev->ddb_dev); 3115 dev_info(dev->dev, "Could not create ddbridge%d\n", dev->nr); 3116 goto fail; 3117 } 3118 res = ddb_device_attrs_add(dev); 3119 if (res) { 3120 ddb_device_attrs_del(dev); 3121 device_destroy(&ddb_class, MKDEV(ddb_major, dev->nr)); 3122 ddbs[dev->nr] = NULL; 3123 dev->ddb_dev = ERR_PTR(-ENODEV); 3124 } else { 3125 ddb_num++; 3126 } 3127 fail: 3128 mutex_unlock(&ddb_mutex); 3129 return res; 3130 } 3131 3132 void ddb_device_destroy(struct ddb *dev) 3133 { 3134 if (IS_ERR(dev->ddb_dev)) 3135 return; 3136 ddb_device_attrs_del(dev); 3137 device_destroy(&ddb_class, MKDEV(ddb_major, dev->nr)); 3138 } 3139 3140 /****************************************************************************/ 3141 /****************************************************************************/ 3142 /****************************************************************************/ 3143 3144 static void tempmon_setfan(struct ddb_link *link) 3145 { 3146 u32 temp, temp2, pwm; 3147 3148 if ((ddblreadl(link, TEMPMON_CONTROL) & 3149 TEMPMON_CONTROL_OVERTEMP) != 0) { 3150 dev_info(link->dev->dev, "Over temperature condition\n"); 3151 link->overtemperature_error = 1; 3152 } 3153 temp = (ddblreadl(link, TEMPMON_SENSOR0) >> 8) & 0xFF; 3154 if (temp & 0x80) 3155 temp = 0; 3156 temp2 = (ddblreadl(link, TEMPMON_SENSOR1) >> 8) & 0xFF; 3157 if (temp2 & 0x80) 3158 temp2 = 0; 3159 if (temp2 > temp) 3160 temp = temp2; 3161 3162 pwm = (ddblreadl(link, TEMPMON_FANCONTROL) >> 8) & 0x0F; 3163 if (pwm > 10) 3164 pwm = 10; 3165 3166 if (temp >= link->temp_tab[pwm]) { 3167 while (pwm < 10 && temp >= link->temp_tab[pwm + 1]) 3168 pwm += 1; 3169 } else { 3170 while (pwm > 1 && temp < link->temp_tab[pwm - 2]) 3171 pwm -= 1; 3172 } 3173 ddblwritel(link, (pwm << 8), TEMPMON_FANCONTROL); 3174 } 3175 3176 static void temp_handler(unsigned long data) 3177 { 3178 struct ddb_link *link = (struct ddb_link *)data; 3179 3180 spin_lock(&link->temp_lock); 3181 tempmon_setfan(link); 3182 spin_unlock(&link->temp_lock); 3183 } 3184 3185 static int tempmon_init(struct ddb_link *link, int first_time) 3186 { 3187 struct ddb *dev = link->dev; 3188 int status = 0; 3189 u32 l = link->nr; 3190 3191 spin_lock_irq(&link->temp_lock); 3192 if (first_time) { 3193 static u8 temperature_table[11] = { 3194 30, 35, 40, 45, 50, 55, 60, 65, 70, 75, 80 }; 3195 3196 memcpy(link->temp_tab, temperature_table, 3197 sizeof(temperature_table)); 3198 } 3199 dev->handler[l][link->info->tempmon_irq] = temp_handler; 3200 dev->handler_data[l][link->info->tempmon_irq] = (unsigned long)link; 3201 ddblwritel(link, (TEMPMON_CONTROL_OVERTEMP | TEMPMON_CONTROL_AUTOSCAN | 3202 TEMPMON_CONTROL_INTENABLE), 3203 TEMPMON_CONTROL); 3204 ddblwritel(link, (3 << 8), TEMPMON_FANCONTROL); 3205 3206 link->overtemperature_error = 3207 ((ddblreadl(link, TEMPMON_CONTROL) & 3208 TEMPMON_CONTROL_OVERTEMP) != 0); 3209 if (link->overtemperature_error) { 3210 dev_info(link->dev->dev, "Over temperature condition\n"); 3211 status = -1; 3212 } 3213 tempmon_setfan(link); 3214 spin_unlock_irq(&link->temp_lock); 3215 return status; 3216 } 3217 3218 static int ddb_init_tempmon(struct ddb_link *link) 3219 { 3220 const struct ddb_info *info = link->info; 3221 3222 if (!info->tempmon_irq) 3223 return 0; 3224 if (info->type == DDB_OCTOPUS_MAX_CT) 3225 if (link->ids.regmapid < 0x00010002) 3226 return 0; 3227 spin_lock_init(&link->temp_lock); 3228 dev_dbg(link->dev->dev, "init_tempmon\n"); 3229 return tempmon_init(link, 1); 3230 } 3231 3232 /****************************************************************************/ 3233 /****************************************************************************/ 3234 /****************************************************************************/ 3235 3236 static int ddb_init_boards(struct ddb *dev) 3237 { 3238 const struct ddb_info *info; 3239 struct ddb_link *link; 3240 u32 l; 3241 3242 for (l = 0; l < DDB_MAX_LINK; l++) { 3243 link = &dev->link[l]; 3244 info = link->info; 3245 3246 if (!info) 3247 continue; 3248 if (info->board_control) { 3249 ddbwritel(dev, 0, DDB_LINK_TAG(l) | BOARD_CONTROL); 3250 msleep(100); 3251 ddbwritel(dev, info->board_control_2, 3252 DDB_LINK_TAG(l) | BOARD_CONTROL); 3253 usleep_range(2000, 3000); 3254 ddbwritel(dev, 3255 info->board_control_2 | info->board_control, 3256 DDB_LINK_TAG(l) | BOARD_CONTROL); 3257 usleep_range(2000, 3000); 3258 } 3259 ddb_init_tempmon(link); 3260 } 3261 return 0; 3262 } 3263 3264 int ddb_init(struct ddb *dev) 3265 { 3266 mutex_init(&dev->link[0].lnb.lock); 3267 mutex_init(&dev->link[0].flash_mutex); 3268 if (no_init) { 3269 ddb_device_create(dev); 3270 return 0; 3271 } 3272 3273 ddb_init_boards(dev); 3274 3275 if (ddb_i2c_init(dev) < 0) 3276 goto fail1; 3277 ddb_ports_init(dev); 3278 if (ddb_buffers_alloc(dev) < 0) { 3279 dev_info(dev->dev, "Could not allocate buffer memory\n"); 3280 goto fail2; 3281 } 3282 if (ddb_ports_attach(dev) < 0) 3283 goto fail3; 3284 3285 ddb_device_create(dev); 3286 3287 if (dev->link[0].info->fan_num) { 3288 ddbwritel(dev, 1, GPIO_DIRECTION); 3289 ddbwritel(dev, 1, GPIO_OUTPUT); 3290 } 3291 return 0; 3292 3293 fail3: 3294 dev_err(dev->dev, "fail3\n"); 3295 ddb_ports_detach(dev); 3296 ddb_buffers_free(dev); 3297 fail2: 3298 dev_err(dev->dev, "fail2\n"); 3299 ddb_ports_release(dev); 3300 ddb_i2c_release(dev); 3301 fail1: 3302 dev_err(dev->dev, "fail1\n"); 3303 return -1; 3304 } 3305 3306 void ddb_unmap(struct ddb *dev) 3307 { 3308 if (dev->regs) 3309 iounmap(dev->regs); 3310 vfree(dev); 3311 } 3312