1 /* 2 * 3 * device driver for Conexant 2388x based TV cards 4 * video4linux video interface 5 * 6 * (c) 2003-04 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs] 7 * 8 * (c) 2005-2006 Mauro Carvalho Chehab <mchehab@infradead.org> 9 * - Multituner support 10 * - video_ioctl2 conversion 11 * - PAL/M fixes 12 * 13 * This program is free software; you can redistribute it and/or modify 14 * it under the terms of the GNU General Public License as published by 15 * the Free Software Foundation; either version 2 of the License, or 16 * (at your option) any later version. 17 * 18 * This program is distributed in the hope that it will be useful, 19 * but WITHOUT ANY WARRANTY; without even the implied warranty of 20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 21 * GNU General Public License for more details. 22 */ 23 24 #include "cx88.h" 25 26 #include <linux/init.h> 27 #include <linux/list.h> 28 #include <linux/module.h> 29 #include <linux/kmod.h> 30 #include <linux/kernel.h> 31 #include <linux/slab.h> 32 #include <linux/interrupt.h> 33 #include <linux/dma-mapping.h> 34 #include <linux/delay.h> 35 #include <linux/kthread.h> 36 #include <asm/div64.h> 37 38 #include <media/v4l2-common.h> 39 #include <media/v4l2-ioctl.h> 40 #include <media/v4l2-event.h> 41 #include <media/i2c/wm8775.h> 42 43 MODULE_DESCRIPTION("v4l2 driver module for cx2388x based TV cards"); 44 MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]"); 45 MODULE_LICENSE("GPL"); 46 MODULE_VERSION(CX88_VERSION); 47 48 /* ------------------------------------------------------------------ */ 49 50 static unsigned int video_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET }; 51 static unsigned int vbi_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET }; 52 static unsigned int radio_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET }; 53 54 module_param_array(video_nr, int, NULL, 0444); 55 module_param_array(vbi_nr, int, NULL, 0444); 56 module_param_array(radio_nr, int, NULL, 0444); 57 58 MODULE_PARM_DESC(video_nr, "video device numbers"); 59 MODULE_PARM_DESC(vbi_nr, "vbi device numbers"); 60 MODULE_PARM_DESC(radio_nr, "radio device numbers"); 61 62 static unsigned int video_debug; 63 module_param(video_debug, int, 0644); 64 MODULE_PARM_DESC(video_debug, "enable debug messages [video]"); 65 66 static unsigned int irq_debug; 67 module_param(irq_debug, int, 0644); 68 MODULE_PARM_DESC(irq_debug, "enable debug messages [IRQ handler]"); 69 70 #define dprintk(level, fmt, arg...) do { \ 71 if (video_debug >= level) \ 72 printk(KERN_DEBUG pr_fmt("%s: video:" fmt), \ 73 __func__, ##arg); \ 74 } while (0) 75 76 77 /* ------------------------------------------------------------------- */ 78 /* static data */ 79 80 static const struct cx8800_fmt formats[] = { 81 { 82 .name = "8 bpp, gray", 83 .fourcc = V4L2_PIX_FMT_GREY, 84 .cxformat = ColorFormatY8, 85 .depth = 8, 86 .flags = FORMAT_FLAGS_PACKED, 87 }, { 88 .name = "15 bpp RGB, le", 89 .fourcc = V4L2_PIX_FMT_RGB555, 90 .cxformat = ColorFormatRGB15, 91 .depth = 16, 92 .flags = FORMAT_FLAGS_PACKED, 93 }, { 94 .name = "15 bpp RGB, be", 95 .fourcc = V4L2_PIX_FMT_RGB555X, 96 .cxformat = ColorFormatRGB15 | ColorFormatBSWAP, 97 .depth = 16, 98 .flags = FORMAT_FLAGS_PACKED, 99 }, { 100 .name = "16 bpp RGB, le", 101 .fourcc = V4L2_PIX_FMT_RGB565, 102 .cxformat = ColorFormatRGB16, 103 .depth = 16, 104 .flags = FORMAT_FLAGS_PACKED, 105 }, { 106 .name = "16 bpp RGB, be", 107 .fourcc = V4L2_PIX_FMT_RGB565X, 108 .cxformat = ColorFormatRGB16 | ColorFormatBSWAP, 109 .depth = 16, 110 .flags = FORMAT_FLAGS_PACKED, 111 }, { 112 .name = "24 bpp RGB, le", 113 .fourcc = V4L2_PIX_FMT_BGR24, 114 .cxformat = ColorFormatRGB24, 115 .depth = 24, 116 .flags = FORMAT_FLAGS_PACKED, 117 }, { 118 .name = "32 bpp RGB, le", 119 .fourcc = V4L2_PIX_FMT_BGR32, 120 .cxformat = ColorFormatRGB32, 121 .depth = 32, 122 .flags = FORMAT_FLAGS_PACKED, 123 }, { 124 .name = "32 bpp RGB, be", 125 .fourcc = V4L2_PIX_FMT_RGB32, 126 .cxformat = ColorFormatRGB32 | ColorFormatBSWAP | ColorFormatWSWAP, 127 .depth = 32, 128 .flags = FORMAT_FLAGS_PACKED, 129 }, { 130 .name = "4:2:2, packed, YUYV", 131 .fourcc = V4L2_PIX_FMT_YUYV, 132 .cxformat = ColorFormatYUY2, 133 .depth = 16, 134 .flags = FORMAT_FLAGS_PACKED, 135 }, { 136 .name = "4:2:2, packed, UYVY", 137 .fourcc = V4L2_PIX_FMT_UYVY, 138 .cxformat = ColorFormatYUY2 | ColorFormatBSWAP, 139 .depth = 16, 140 .flags = FORMAT_FLAGS_PACKED, 141 }, 142 }; 143 144 static const struct cx8800_fmt *format_by_fourcc(unsigned int fourcc) 145 { 146 unsigned int i; 147 148 for (i = 0; i < ARRAY_SIZE(formats); i++) 149 if (formats[i].fourcc == fourcc) 150 return formats+i; 151 return NULL; 152 } 153 154 /* ------------------------------------------------------------------- */ 155 156 struct cx88_ctrl { 157 /* control information */ 158 u32 id; 159 s32 minimum; 160 s32 maximum; 161 u32 step; 162 s32 default_value; 163 164 /* control register information */ 165 u32 off; 166 u32 reg; 167 u32 sreg; 168 u32 mask; 169 u32 shift; 170 }; 171 172 static const struct cx88_ctrl cx8800_vid_ctls[] = { 173 /* --- video --- */ 174 { 175 .id = V4L2_CID_BRIGHTNESS, 176 .minimum = 0x00, 177 .maximum = 0xff, 178 .step = 1, 179 .default_value = 0x7f, 180 .off = 128, 181 .reg = MO_CONTR_BRIGHT, 182 .mask = 0x00ff, 183 .shift = 0, 184 }, { 185 .id = V4L2_CID_CONTRAST, 186 .minimum = 0, 187 .maximum = 0xff, 188 .step = 1, 189 .default_value = 0x3f, 190 .off = 0, 191 .reg = MO_CONTR_BRIGHT, 192 .mask = 0xff00, 193 .shift = 8, 194 }, { 195 .id = V4L2_CID_HUE, 196 .minimum = 0, 197 .maximum = 0xff, 198 .step = 1, 199 .default_value = 0x7f, 200 .off = 128, 201 .reg = MO_HUE, 202 .mask = 0x00ff, 203 .shift = 0, 204 }, { 205 /* strictly, this only describes only U saturation. 206 * V saturation is handled specially through code. 207 */ 208 .id = V4L2_CID_SATURATION, 209 .minimum = 0, 210 .maximum = 0xff, 211 .step = 1, 212 .default_value = 0x7f, 213 .off = 0, 214 .reg = MO_UV_SATURATION, 215 .mask = 0x00ff, 216 .shift = 0, 217 }, { 218 .id = V4L2_CID_SHARPNESS, 219 .minimum = 0, 220 .maximum = 4, 221 .step = 1, 222 .default_value = 0x0, 223 .off = 0, 224 /* NOTE: the value is converted and written to both even 225 and odd registers in the code */ 226 .reg = MO_FILTER_ODD, 227 .mask = 7 << 7, 228 .shift = 7, 229 }, { 230 .id = V4L2_CID_CHROMA_AGC, 231 .minimum = 0, 232 .maximum = 1, 233 .default_value = 0x1, 234 .reg = MO_INPUT_FORMAT, 235 .mask = 1 << 10, 236 .shift = 10, 237 }, { 238 .id = V4L2_CID_COLOR_KILLER, 239 .minimum = 0, 240 .maximum = 1, 241 .default_value = 0x1, 242 .reg = MO_INPUT_FORMAT, 243 .mask = 1 << 9, 244 .shift = 9, 245 }, { 246 .id = V4L2_CID_BAND_STOP_FILTER, 247 .minimum = 0, 248 .maximum = 1, 249 .step = 1, 250 .default_value = 0x0, 251 .off = 0, 252 .reg = MO_HTOTAL, 253 .mask = 3 << 11, 254 .shift = 11, 255 } 256 }; 257 258 static const struct cx88_ctrl cx8800_aud_ctls[] = { 259 { 260 /* --- audio --- */ 261 .id = V4L2_CID_AUDIO_MUTE, 262 .minimum = 0, 263 .maximum = 1, 264 .default_value = 1, 265 .reg = AUD_VOL_CTL, 266 .sreg = SHADOW_AUD_VOL_CTL, 267 .mask = (1 << 6), 268 .shift = 6, 269 }, { 270 .id = V4L2_CID_AUDIO_VOLUME, 271 .minimum = 0, 272 .maximum = 0x3f, 273 .step = 1, 274 .default_value = 0x3f, 275 .reg = AUD_VOL_CTL, 276 .sreg = SHADOW_AUD_VOL_CTL, 277 .mask = 0x3f, 278 .shift = 0, 279 }, { 280 .id = V4L2_CID_AUDIO_BALANCE, 281 .minimum = 0, 282 .maximum = 0x7f, 283 .step = 1, 284 .default_value = 0x40, 285 .reg = AUD_BAL_CTL, 286 .sreg = SHADOW_AUD_BAL_CTL, 287 .mask = 0x7f, 288 .shift = 0, 289 } 290 }; 291 292 enum { 293 CX8800_VID_CTLS = ARRAY_SIZE(cx8800_vid_ctls), 294 CX8800_AUD_CTLS = ARRAY_SIZE(cx8800_aud_ctls), 295 }; 296 297 /* ------------------------------------------------------------------ */ 298 299 int cx88_video_mux(struct cx88_core *core, unsigned int input) 300 { 301 /* struct cx88_core *core = dev->core; */ 302 303 dprintk(1, "video_mux: %d [vmux=%d,gpio=0x%x,0x%x,0x%x,0x%x]\n", 304 input, INPUT(input).vmux, 305 INPUT(input).gpio0, INPUT(input).gpio1, 306 INPUT(input).gpio2, INPUT(input).gpio3); 307 core->input = input; 308 cx_andor(MO_INPUT_FORMAT, 0x03 << 14, INPUT(input).vmux << 14); 309 cx_write(MO_GP3_IO, INPUT(input).gpio3); 310 cx_write(MO_GP0_IO, INPUT(input).gpio0); 311 cx_write(MO_GP1_IO, INPUT(input).gpio1); 312 cx_write(MO_GP2_IO, INPUT(input).gpio2); 313 314 switch (INPUT(input).type) { 315 case CX88_VMUX_SVIDEO: 316 cx_set(MO_AFECFG_IO, 0x00000001); 317 cx_set(MO_INPUT_FORMAT, 0x00010010); 318 cx_set(MO_FILTER_EVEN, 0x00002020); 319 cx_set(MO_FILTER_ODD, 0x00002020); 320 break; 321 default: 322 cx_clear(MO_AFECFG_IO, 0x00000001); 323 cx_clear(MO_INPUT_FORMAT, 0x00010010); 324 cx_clear(MO_FILTER_EVEN, 0x00002020); 325 cx_clear(MO_FILTER_ODD, 0x00002020); 326 break; 327 } 328 329 /* if there are audioroutes defined, we have an external 330 ADC to deal with audio */ 331 if (INPUT(input).audioroute) { 332 /* The wm8775 module has the "2" route hardwired into 333 the initialization. Some boards may use different 334 routes for different inputs. HVR-1300 surely does */ 335 if (core->sd_wm8775) { 336 call_all(core, audio, s_routing, 337 INPUT(input).audioroute, 0, 0); 338 } 339 /* cx2388's C-ADC is connected to the tuner only. 340 When used with S-Video, that ADC is busy dealing with 341 chroma, so an external must be used for baseband audio */ 342 if (INPUT(input).type != CX88_VMUX_TELEVISION && 343 INPUT(input).type != CX88_VMUX_CABLE) { 344 /* "I2S ADC mode" */ 345 core->tvaudio = WW_I2SADC; 346 cx88_set_tvaudio(core); 347 } else { 348 /* Normal mode */ 349 cx_write(AUD_I2SCNTL, 0x0); 350 cx_clear(AUD_CTL, EN_I2SIN_ENABLE); 351 } 352 } 353 354 return 0; 355 } 356 EXPORT_SYMBOL(cx88_video_mux); 357 358 /* ------------------------------------------------------------------ */ 359 360 static int start_video_dma(struct cx8800_dev *dev, 361 struct cx88_dmaqueue *q, 362 struct cx88_buffer *buf) 363 { 364 struct cx88_core *core = dev->core; 365 366 /* setup fifo + format */ 367 cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH21], 368 buf->bpl, buf->risc.dma); 369 cx88_set_scale(core, core->width, core->height, core->field); 370 cx_write(MO_COLOR_CTRL, dev->fmt->cxformat | ColorFormatGamma); 371 372 /* reset counter */ 373 cx_write(MO_VIDY_GPCNTRL, GP_COUNT_CONTROL_RESET); 374 q->count = 0; 375 376 /* enable irqs */ 377 cx_set(MO_PCI_INTMSK, core->pci_irqmask | PCI_INT_VIDINT); 378 379 /* Enables corresponding bits at PCI_INT_STAT: 380 bits 0 to 4: video, audio, transport stream, VIP, Host 381 bit 7: timer 382 bits 8 and 9: DMA complete for: SRC, DST 383 bits 10 and 11: BERR signal asserted for RISC: RD, WR 384 bits 12 to 15: BERR signal asserted for: BRDG, SRC, DST, IPB 385 */ 386 cx_set(MO_VID_INTMSK, 0x0f0011); 387 388 /* enable capture */ 389 cx_set(VID_CAPTURE_CONTROL, 0x06); 390 391 /* start dma */ 392 cx_set(MO_DEV_CNTRL2, (1<<5)); 393 cx_set(MO_VID_DMACNTRL, 0x11); /* Planar Y and packed FIFO and RISC enable */ 394 395 return 0; 396 } 397 398 #ifdef CONFIG_PM 399 static int stop_video_dma(struct cx8800_dev *dev) 400 { 401 struct cx88_core *core = dev->core; 402 403 /* stop dma */ 404 cx_clear(MO_VID_DMACNTRL, 0x11); 405 406 /* disable capture */ 407 cx_clear(VID_CAPTURE_CONTROL, 0x06); 408 409 /* disable irqs */ 410 cx_clear(MO_PCI_INTMSK, PCI_INT_VIDINT); 411 cx_clear(MO_VID_INTMSK, 0x0f0011); 412 return 0; 413 } 414 415 static int restart_video_queue(struct cx8800_dev *dev, 416 struct cx88_dmaqueue *q) 417 { 418 struct cx88_buffer *buf; 419 420 if (!list_empty(&q->active)) { 421 buf = list_entry(q->active.next, struct cx88_buffer, list); 422 dprintk(2, "restart_queue [%p/%d]: restart dma\n", 423 buf, buf->vb.vb2_buf.index); 424 start_video_dma(dev, q, buf); 425 } 426 return 0; 427 } 428 #endif 429 430 /* ------------------------------------------------------------------ */ 431 432 static int queue_setup(struct vb2_queue *q, 433 unsigned int *num_buffers, unsigned int *num_planes, 434 unsigned int sizes[], struct device *alloc_devs[]) 435 { 436 struct cx8800_dev *dev = q->drv_priv; 437 struct cx88_core *core = dev->core; 438 439 *num_planes = 1; 440 sizes[0] = (dev->fmt->depth * core->width * core->height) >> 3; 441 return 0; 442 } 443 444 static int buffer_prepare(struct vb2_buffer *vb) 445 { 446 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); 447 struct cx8800_dev *dev = vb->vb2_queue->drv_priv; 448 struct cx88_core *core = dev->core; 449 struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb); 450 struct sg_table *sgt = vb2_dma_sg_plane_desc(vb, 0); 451 452 buf->bpl = core->width * dev->fmt->depth >> 3; 453 454 if (vb2_plane_size(vb, 0) < core->height * buf->bpl) 455 return -EINVAL; 456 vb2_set_plane_payload(vb, 0, core->height * buf->bpl); 457 458 switch (core->field) { 459 case V4L2_FIELD_TOP: 460 cx88_risc_buffer(dev->pci, &buf->risc, 461 sgt->sgl, 0, UNSET, 462 buf->bpl, 0, core->height); 463 break; 464 case V4L2_FIELD_BOTTOM: 465 cx88_risc_buffer(dev->pci, &buf->risc, 466 sgt->sgl, UNSET, 0, 467 buf->bpl, 0, core->height); 468 break; 469 case V4L2_FIELD_SEQ_TB: 470 cx88_risc_buffer(dev->pci, &buf->risc, 471 sgt->sgl, 472 0, buf->bpl * (core->height >> 1), 473 buf->bpl, 0, 474 core->height >> 1); 475 break; 476 case V4L2_FIELD_SEQ_BT: 477 cx88_risc_buffer(dev->pci, &buf->risc, 478 sgt->sgl, 479 buf->bpl * (core->height >> 1), 0, 480 buf->bpl, 0, 481 core->height >> 1); 482 break; 483 case V4L2_FIELD_INTERLACED: 484 default: 485 cx88_risc_buffer(dev->pci, &buf->risc, 486 sgt->sgl, 0, buf->bpl, 487 buf->bpl, buf->bpl, 488 core->height >> 1); 489 break; 490 } 491 dprintk(2, "[%p/%d] buffer_prepare - %dx%d %dbpp \"%s\" - dma=0x%08lx\n", 492 buf, buf->vb.vb2_buf.index, 493 core->width, core->height, dev->fmt->depth, dev->fmt->name, 494 (unsigned long)buf->risc.dma); 495 return 0; 496 } 497 498 static void buffer_finish(struct vb2_buffer *vb) 499 { 500 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); 501 struct cx8800_dev *dev = vb->vb2_queue->drv_priv; 502 struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb); 503 struct cx88_riscmem *risc = &buf->risc; 504 505 if (risc->cpu) 506 pci_free_consistent(dev->pci, risc->size, risc->cpu, risc->dma); 507 memset(risc, 0, sizeof(*risc)); 508 } 509 510 static void buffer_queue(struct vb2_buffer *vb) 511 { 512 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); 513 struct cx8800_dev *dev = vb->vb2_queue->drv_priv; 514 struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb); 515 struct cx88_buffer *prev; 516 struct cx88_dmaqueue *q = &dev->vidq; 517 518 /* add jump to start */ 519 buf->risc.cpu[1] = cpu_to_le32(buf->risc.dma + 8); 520 buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_CNT_INC); 521 buf->risc.jmp[1] = cpu_to_le32(buf->risc.dma + 8); 522 523 if (list_empty(&q->active)) { 524 list_add_tail(&buf->list, &q->active); 525 dprintk(2, "[%p/%d] buffer_queue - first active\n", 526 buf, buf->vb.vb2_buf.index); 527 528 } else { 529 buf->risc.cpu[0] |= cpu_to_le32(RISC_IRQ1); 530 prev = list_entry(q->active.prev, struct cx88_buffer, list); 531 list_add_tail(&buf->list, &q->active); 532 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma); 533 dprintk(2, "[%p/%d] buffer_queue - append to active\n", 534 buf, buf->vb.vb2_buf.index); 535 } 536 } 537 538 static int start_streaming(struct vb2_queue *q, unsigned int count) 539 { 540 struct cx8800_dev *dev = q->drv_priv; 541 struct cx88_dmaqueue *dmaq = &dev->vidq; 542 struct cx88_buffer *buf = list_entry(dmaq->active.next, 543 struct cx88_buffer, list); 544 545 start_video_dma(dev, dmaq, buf); 546 return 0; 547 } 548 549 static void stop_streaming(struct vb2_queue *q) 550 { 551 struct cx8800_dev *dev = q->drv_priv; 552 struct cx88_core *core = dev->core; 553 struct cx88_dmaqueue *dmaq = &dev->vidq; 554 unsigned long flags; 555 556 cx_clear(MO_VID_DMACNTRL, 0x11); 557 cx_clear(VID_CAPTURE_CONTROL, 0x06); 558 spin_lock_irqsave(&dev->slock, flags); 559 while (!list_empty(&dmaq->active)) { 560 struct cx88_buffer *buf = list_entry(dmaq->active.next, 561 struct cx88_buffer, list); 562 563 list_del(&buf->list); 564 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR); 565 } 566 spin_unlock_irqrestore(&dev->slock, flags); 567 } 568 569 static const struct vb2_ops cx8800_video_qops = { 570 .queue_setup = queue_setup, 571 .buf_prepare = buffer_prepare, 572 .buf_finish = buffer_finish, 573 .buf_queue = buffer_queue, 574 .wait_prepare = vb2_ops_wait_prepare, 575 .wait_finish = vb2_ops_wait_finish, 576 .start_streaming = start_streaming, 577 .stop_streaming = stop_streaming, 578 }; 579 580 /* ------------------------------------------------------------------ */ 581 582 static int radio_open(struct file *file) 583 { 584 struct cx8800_dev *dev = video_drvdata(file); 585 struct cx88_core *core = dev->core; 586 int ret = v4l2_fh_open(file); 587 588 if (ret) 589 return ret; 590 591 cx_write(MO_GP3_IO, core->board.radio.gpio3); 592 cx_write(MO_GP0_IO, core->board.radio.gpio0); 593 cx_write(MO_GP1_IO, core->board.radio.gpio1); 594 cx_write(MO_GP2_IO, core->board.radio.gpio2); 595 if (core->board.radio.audioroute) { 596 if (core->sd_wm8775) { 597 call_all(core, audio, s_routing, 598 core->board.radio.audioroute, 0, 0); 599 } 600 /* "I2S ADC mode" */ 601 core->tvaudio = WW_I2SADC; 602 cx88_set_tvaudio(core); 603 } else { 604 /* FM Mode */ 605 core->tvaudio = WW_FM; 606 cx88_set_tvaudio(core); 607 cx88_set_stereo(core, V4L2_TUNER_MODE_STEREO, 1); 608 } 609 call_all(core, tuner, s_radio); 610 return 0; 611 } 612 613 /* ------------------------------------------------------------------ */ 614 /* VIDEO CTRL IOCTLS */ 615 616 static int cx8800_s_vid_ctrl(struct v4l2_ctrl *ctrl) 617 { 618 struct cx88_core *core = 619 container_of(ctrl->handler, struct cx88_core, video_hdl); 620 const struct cx88_ctrl *cc = ctrl->priv; 621 u32 value, mask; 622 623 mask = cc->mask; 624 switch (ctrl->id) { 625 case V4L2_CID_SATURATION: 626 /* special v_sat handling */ 627 628 value = ((ctrl->val - cc->off) << cc->shift) & cc->mask; 629 630 if (core->tvnorm & V4L2_STD_SECAM) { 631 /* For SECAM, both U and V sat should be equal */ 632 value = value << 8 | value; 633 } else { 634 /* Keeps U Saturation proportional to V Sat */ 635 value = (value * 0x5a) / 0x7f << 8 | value; 636 } 637 mask = 0xffff; 638 break; 639 case V4L2_CID_SHARPNESS: 640 /* 0b000, 0b100, 0b101, 0b110, or 0b111 */ 641 value = (ctrl->val < 1 ? 0 : ((ctrl->val + 3) << 7)); 642 /* needs to be set for both fields */ 643 cx_andor(MO_FILTER_EVEN, mask, value); 644 break; 645 case V4L2_CID_CHROMA_AGC: 646 value = ((ctrl->val - cc->off) << cc->shift) & cc->mask; 647 break; 648 default: 649 value = ((ctrl->val - cc->off) << cc->shift) & cc->mask; 650 break; 651 } 652 dprintk(1, "set_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n", 653 ctrl->id, ctrl->name, ctrl->val, cc->reg, value, 654 mask, cc->sreg ? " [shadowed]" : ""); 655 if (cc->sreg) 656 cx_sandor(cc->sreg, cc->reg, mask, value); 657 else 658 cx_andor(cc->reg, mask, value); 659 return 0; 660 } 661 662 static int cx8800_s_aud_ctrl(struct v4l2_ctrl *ctrl) 663 { 664 struct cx88_core *core = 665 container_of(ctrl->handler, struct cx88_core, audio_hdl); 666 const struct cx88_ctrl *cc = ctrl->priv; 667 u32 value, mask; 668 669 /* Pass changes onto any WM8775 */ 670 if (core->sd_wm8775) { 671 switch (ctrl->id) { 672 case V4L2_CID_AUDIO_MUTE: 673 wm8775_s_ctrl(core, ctrl->id, ctrl->val); 674 break; 675 case V4L2_CID_AUDIO_VOLUME: 676 wm8775_s_ctrl(core, ctrl->id, (ctrl->val) ? 677 (0x90 + ctrl->val) << 8 : 0); 678 break; 679 case V4L2_CID_AUDIO_BALANCE: 680 wm8775_s_ctrl(core, ctrl->id, ctrl->val << 9); 681 break; 682 default: 683 break; 684 } 685 } 686 687 mask = cc->mask; 688 switch (ctrl->id) { 689 case V4L2_CID_AUDIO_BALANCE: 690 value = (ctrl->val < 0x40) ? (0x7f - ctrl->val) : (ctrl->val - 0x40); 691 break; 692 case V4L2_CID_AUDIO_VOLUME: 693 value = 0x3f - (ctrl->val & 0x3f); 694 break; 695 default: 696 value = ((ctrl->val - cc->off) << cc->shift) & cc->mask; 697 break; 698 } 699 dprintk(1, "set_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n", 700 ctrl->id, ctrl->name, ctrl->val, cc->reg, value, 701 mask, cc->sreg ? " [shadowed]" : ""); 702 if (cc->sreg) 703 cx_sandor(cc->sreg, cc->reg, mask, value); 704 else 705 cx_andor(cc->reg, mask, value); 706 return 0; 707 } 708 709 /* ------------------------------------------------------------------ */ 710 /* VIDEO IOCTLS */ 711 712 static int vidioc_g_fmt_vid_cap(struct file *file, void *priv, 713 struct v4l2_format *f) 714 { 715 struct cx8800_dev *dev = video_drvdata(file); 716 struct cx88_core *core = dev->core; 717 718 f->fmt.pix.width = core->width; 719 f->fmt.pix.height = core->height; 720 f->fmt.pix.field = core->field; 721 f->fmt.pix.pixelformat = dev->fmt->fourcc; 722 f->fmt.pix.bytesperline = 723 (f->fmt.pix.width * dev->fmt->depth) >> 3; 724 f->fmt.pix.sizeimage = 725 f->fmt.pix.height * f->fmt.pix.bytesperline; 726 f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M; 727 return 0; 728 } 729 730 static int vidioc_try_fmt_vid_cap(struct file *file, void *priv, 731 struct v4l2_format *f) 732 { 733 struct cx8800_dev *dev = video_drvdata(file); 734 struct cx88_core *core = dev->core; 735 const struct cx8800_fmt *fmt; 736 enum v4l2_field field; 737 unsigned int maxw, maxh; 738 739 fmt = format_by_fourcc(f->fmt.pix.pixelformat); 740 if (fmt == NULL) 741 return -EINVAL; 742 743 maxw = norm_maxw(core->tvnorm); 744 maxh = norm_maxh(core->tvnorm); 745 746 field = f->fmt.pix.field; 747 748 switch (field) { 749 case V4L2_FIELD_TOP: 750 case V4L2_FIELD_BOTTOM: 751 case V4L2_FIELD_INTERLACED: 752 case V4L2_FIELD_SEQ_BT: 753 case V4L2_FIELD_SEQ_TB: 754 break; 755 default: 756 field = (f->fmt.pix.height > maxh / 2) 757 ? V4L2_FIELD_INTERLACED 758 : V4L2_FIELD_BOTTOM; 759 break; 760 } 761 if (V4L2_FIELD_HAS_T_OR_B(field)) 762 maxh /= 2; 763 764 v4l_bound_align_image(&f->fmt.pix.width, 48, maxw, 2, 765 &f->fmt.pix.height, 32, maxh, 0, 0); 766 f->fmt.pix.field = field; 767 f->fmt.pix.bytesperline = 768 (f->fmt.pix.width * fmt->depth) >> 3; 769 f->fmt.pix.sizeimage = 770 f->fmt.pix.height * f->fmt.pix.bytesperline; 771 f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M; 772 773 return 0; 774 } 775 776 static int vidioc_s_fmt_vid_cap(struct file *file, void *priv, 777 struct v4l2_format *f) 778 { 779 struct cx8800_dev *dev = video_drvdata(file); 780 struct cx88_core *core = dev->core; 781 int err = vidioc_try_fmt_vid_cap(file, priv, f); 782 783 if (err != 0) 784 return err; 785 if (vb2_is_busy(&dev->vb2_vidq) || vb2_is_busy(&dev->vb2_vbiq)) 786 return -EBUSY; 787 if (core->dvbdev && vb2_is_busy(&core->dvbdev->vb2_mpegq)) 788 return -EBUSY; 789 dev->fmt = format_by_fourcc(f->fmt.pix.pixelformat); 790 core->width = f->fmt.pix.width; 791 core->height = f->fmt.pix.height; 792 core->field = f->fmt.pix.field; 793 return 0; 794 } 795 796 void cx88_querycap(struct file *file, struct cx88_core *core, 797 struct v4l2_capability *cap) 798 { 799 struct video_device *vdev = video_devdata(file); 800 801 strlcpy(cap->card, core->board.name, sizeof(cap->card)); 802 cap->device_caps = V4L2_CAP_READWRITE | V4L2_CAP_STREAMING; 803 if (core->board.tuner_type != UNSET) 804 cap->device_caps |= V4L2_CAP_TUNER; 805 switch (vdev->vfl_type) { 806 case VFL_TYPE_RADIO: 807 cap->device_caps = V4L2_CAP_RADIO | V4L2_CAP_TUNER; 808 break; 809 case VFL_TYPE_GRABBER: 810 cap->device_caps |= V4L2_CAP_VIDEO_CAPTURE; 811 break; 812 case VFL_TYPE_VBI: 813 cap->device_caps |= V4L2_CAP_VBI_CAPTURE; 814 break; 815 } 816 cap->capabilities = cap->device_caps | V4L2_CAP_VIDEO_CAPTURE | 817 V4L2_CAP_VBI_CAPTURE | V4L2_CAP_DEVICE_CAPS; 818 if (core->board.radio.type == CX88_RADIO) 819 cap->capabilities |= V4L2_CAP_RADIO; 820 } 821 EXPORT_SYMBOL(cx88_querycap); 822 823 static int vidioc_querycap(struct file *file, void *priv, 824 struct v4l2_capability *cap) 825 { 826 struct cx8800_dev *dev = video_drvdata(file); 827 struct cx88_core *core = dev->core; 828 829 strcpy(cap->driver, "cx8800"); 830 sprintf(cap->bus_info, "PCI:%s", pci_name(dev->pci)); 831 cx88_querycap(file, core, cap); 832 return 0; 833 } 834 835 static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv, 836 struct v4l2_fmtdesc *f) 837 { 838 if (unlikely(f->index >= ARRAY_SIZE(formats))) 839 return -EINVAL; 840 841 strlcpy(f->description, formats[f->index].name, sizeof(f->description)); 842 f->pixelformat = formats[f->index].fourcc; 843 844 return 0; 845 } 846 847 static int vidioc_g_std(struct file *file, void *priv, v4l2_std_id *tvnorm) 848 { 849 struct cx8800_dev *dev = video_drvdata(file); 850 struct cx88_core *core = dev->core; 851 852 *tvnorm = core->tvnorm; 853 return 0; 854 } 855 856 static int vidioc_s_std(struct file *file, void *priv, v4l2_std_id tvnorms) 857 { 858 struct cx8800_dev *dev = video_drvdata(file); 859 struct cx88_core *core = dev->core; 860 861 return cx88_set_tvnorm(core, tvnorms); 862 } 863 864 /* only one input in this sample driver */ 865 int cx88_enum_input(struct cx88_core *core, struct v4l2_input *i) 866 { 867 static const char * const iname[] = { 868 [CX88_VMUX_COMPOSITE1] = "Composite1", 869 [CX88_VMUX_COMPOSITE2] = "Composite2", 870 [CX88_VMUX_COMPOSITE3] = "Composite3", 871 [CX88_VMUX_COMPOSITE4] = "Composite4", 872 [CX88_VMUX_SVIDEO] = "S-Video", 873 [CX88_VMUX_TELEVISION] = "Television", 874 [CX88_VMUX_CABLE] = "Cable TV", 875 [CX88_VMUX_DVB] = "DVB", 876 [CX88_VMUX_DEBUG] = "for debug only", 877 }; 878 unsigned int n = i->index; 879 880 if (n >= 4) 881 return -EINVAL; 882 if (0 == INPUT(n).type) 883 return -EINVAL; 884 i->type = V4L2_INPUT_TYPE_CAMERA; 885 strcpy(i->name, iname[INPUT(n).type]); 886 if ((CX88_VMUX_TELEVISION == INPUT(n).type) || 887 (CX88_VMUX_CABLE == INPUT(n).type)) { 888 i->type = V4L2_INPUT_TYPE_TUNER; 889 } 890 i->std = CX88_NORMS; 891 return 0; 892 } 893 EXPORT_SYMBOL(cx88_enum_input); 894 895 static int vidioc_enum_input(struct file *file, void *priv, 896 struct v4l2_input *i) 897 { 898 struct cx8800_dev *dev = video_drvdata(file); 899 struct cx88_core *core = dev->core; 900 901 return cx88_enum_input(core, i); 902 } 903 904 static int vidioc_g_input(struct file *file, void *priv, unsigned int *i) 905 { 906 struct cx8800_dev *dev = video_drvdata(file); 907 struct cx88_core *core = dev->core; 908 909 *i = core->input; 910 return 0; 911 } 912 913 static int vidioc_s_input(struct file *file, void *priv, unsigned int i) 914 { 915 struct cx8800_dev *dev = video_drvdata(file); 916 struct cx88_core *core = dev->core; 917 918 if (i >= 4) 919 return -EINVAL; 920 if (0 == INPUT(i).type) 921 return -EINVAL; 922 923 cx88_newstation(core); 924 cx88_video_mux(core, i); 925 return 0; 926 } 927 928 static int vidioc_g_tuner(struct file *file, void *priv, 929 struct v4l2_tuner *t) 930 { 931 struct cx8800_dev *dev = video_drvdata(file); 932 struct cx88_core *core = dev->core; 933 u32 reg; 934 935 if (unlikely(core->board.tuner_type == UNSET)) 936 return -EINVAL; 937 if (t->index != 0) 938 return -EINVAL; 939 940 strcpy(t->name, "Television"); 941 t->capability = V4L2_TUNER_CAP_NORM; 942 t->rangehigh = 0xffffffffUL; 943 call_all(core, tuner, g_tuner, t); 944 945 cx88_get_stereo(core, t); 946 reg = cx_read(MO_DEVICE_STATUS); 947 t->signal = (reg & (1<<5)) ? 0xffff : 0x0000; 948 return 0; 949 } 950 951 static int vidioc_s_tuner(struct file *file, void *priv, 952 const struct v4l2_tuner *t) 953 { 954 struct cx8800_dev *dev = video_drvdata(file); 955 struct cx88_core *core = dev->core; 956 957 if (core->board.tuner_type == UNSET) 958 return -EINVAL; 959 if (t->index != 0) 960 return -EINVAL; 961 962 cx88_set_stereo(core, t->audmode, 1); 963 return 0; 964 } 965 966 static int vidioc_g_frequency(struct file *file, void *priv, 967 struct v4l2_frequency *f) 968 { 969 struct cx8800_dev *dev = video_drvdata(file); 970 struct cx88_core *core = dev->core; 971 972 if (unlikely(core->board.tuner_type == UNSET)) 973 return -EINVAL; 974 if (f->tuner) 975 return -EINVAL; 976 977 f->frequency = core->freq; 978 979 call_all(core, tuner, g_frequency, f); 980 981 return 0; 982 } 983 984 int cx88_set_freq(struct cx88_core *core, 985 const struct v4l2_frequency *f) 986 { 987 struct v4l2_frequency new_freq = *f; 988 989 if (unlikely(core->board.tuner_type == UNSET)) 990 return -EINVAL; 991 if (unlikely(f->tuner != 0)) 992 return -EINVAL; 993 994 cx88_newstation(core); 995 call_all(core, tuner, s_frequency, f); 996 call_all(core, tuner, g_frequency, &new_freq); 997 core->freq = new_freq.frequency; 998 999 /* When changing channels it is required to reset TVAUDIO */ 1000 usleep_range(10000, 20000); 1001 cx88_set_tvaudio(core); 1002 1003 return 0; 1004 } 1005 EXPORT_SYMBOL(cx88_set_freq); 1006 1007 static int vidioc_s_frequency(struct file *file, void *priv, 1008 const struct v4l2_frequency *f) 1009 { 1010 struct cx8800_dev *dev = video_drvdata(file); 1011 struct cx88_core *core = dev->core; 1012 1013 return cx88_set_freq(core, f); 1014 } 1015 1016 #ifdef CONFIG_VIDEO_ADV_DEBUG 1017 static int vidioc_g_register(struct file *file, void *fh, 1018 struct v4l2_dbg_register *reg) 1019 { 1020 struct cx8800_dev *dev = video_drvdata(file); 1021 struct cx88_core *core = dev->core; 1022 1023 /* cx2388x has a 24-bit register space */ 1024 reg->val = cx_read(reg->reg & 0xfffffc); 1025 reg->size = 4; 1026 return 0; 1027 } 1028 1029 static int vidioc_s_register(struct file *file, void *fh, 1030 const struct v4l2_dbg_register *reg) 1031 { 1032 struct cx8800_dev *dev = video_drvdata(file); 1033 struct cx88_core *core = dev->core; 1034 1035 cx_write(reg->reg & 0xfffffc, reg->val); 1036 return 0; 1037 } 1038 #endif 1039 1040 /* ----------------------------------------------------------- */ 1041 /* RADIO ESPECIFIC IOCTLS */ 1042 /* ----------------------------------------------------------- */ 1043 1044 static int radio_g_tuner(struct file *file, void *priv, 1045 struct v4l2_tuner *t) 1046 { 1047 struct cx8800_dev *dev = video_drvdata(file); 1048 struct cx88_core *core = dev->core; 1049 1050 if (unlikely(t->index > 0)) 1051 return -EINVAL; 1052 1053 strcpy(t->name, "Radio"); 1054 1055 call_all(core, tuner, g_tuner, t); 1056 return 0; 1057 } 1058 1059 static int radio_s_tuner(struct file *file, void *priv, 1060 const struct v4l2_tuner *t) 1061 { 1062 struct cx8800_dev *dev = video_drvdata(file); 1063 struct cx88_core *core = dev->core; 1064 1065 if (t->index != 0) 1066 return -EINVAL; 1067 1068 call_all(core, tuner, s_tuner, t); 1069 return 0; 1070 } 1071 1072 /* ----------------------------------------------------------- */ 1073 1074 static const char *cx88_vid_irqs[32] = { 1075 "y_risci1", "u_risci1", "v_risci1", "vbi_risc1", 1076 "y_risci2", "u_risci2", "v_risci2", "vbi_risc2", 1077 "y_oflow", "u_oflow", "v_oflow", "vbi_oflow", 1078 "y_sync", "u_sync", "v_sync", "vbi_sync", 1079 "opc_err", "par_err", "rip_err", "pci_abort", 1080 }; 1081 1082 static void cx8800_vid_irq(struct cx8800_dev *dev) 1083 { 1084 struct cx88_core *core = dev->core; 1085 u32 status, mask, count; 1086 1087 status = cx_read(MO_VID_INTSTAT); 1088 mask = cx_read(MO_VID_INTMSK); 1089 if (0 == (status & mask)) 1090 return; 1091 cx_write(MO_VID_INTSTAT, status); 1092 if (irq_debug || (status & mask & ~0xff)) 1093 cx88_print_irqbits("irq vid", 1094 cx88_vid_irqs, ARRAY_SIZE(cx88_vid_irqs), 1095 status, mask); 1096 1097 /* risc op code error */ 1098 if (status & (1 << 16)) { 1099 pr_warn("video risc op code error\n"); 1100 cx_clear(MO_VID_DMACNTRL, 0x11); 1101 cx_clear(VID_CAPTURE_CONTROL, 0x06); 1102 cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]); 1103 } 1104 1105 /* risc1 y */ 1106 if (status & 0x01) { 1107 spin_lock(&dev->slock); 1108 count = cx_read(MO_VIDY_GPCNT); 1109 cx88_wakeup(core, &dev->vidq, count); 1110 spin_unlock(&dev->slock); 1111 } 1112 1113 /* risc1 vbi */ 1114 if (status & 0x08) { 1115 spin_lock(&dev->slock); 1116 count = cx_read(MO_VBI_GPCNT); 1117 cx88_wakeup(core, &dev->vbiq, count); 1118 spin_unlock(&dev->slock); 1119 } 1120 } 1121 1122 static irqreturn_t cx8800_irq(int irq, void *dev_id) 1123 { 1124 struct cx8800_dev *dev = dev_id; 1125 struct cx88_core *core = dev->core; 1126 u32 status; 1127 int loop, handled = 0; 1128 1129 for (loop = 0; loop < 10; loop++) { 1130 status = cx_read(MO_PCI_INTSTAT) & 1131 (core->pci_irqmask | PCI_INT_VIDINT); 1132 if (status == 0) 1133 goto out; 1134 cx_write(MO_PCI_INTSTAT, status); 1135 handled = 1; 1136 1137 if (status & core->pci_irqmask) 1138 cx88_core_irq(core, status); 1139 if (status & PCI_INT_VIDINT) 1140 cx8800_vid_irq(dev); 1141 } 1142 if (loop == 10) { 1143 pr_warn("irq loop -- clearing mask\n"); 1144 cx_write(MO_PCI_INTMSK, 0); 1145 } 1146 1147 out: 1148 return IRQ_RETVAL(handled); 1149 } 1150 1151 /* ----------------------------------------------------------- */ 1152 /* exported stuff */ 1153 1154 static const struct v4l2_file_operations video_fops = { 1155 1156 .owner = THIS_MODULE, 1157 .open = v4l2_fh_open, 1158 .release = vb2_fop_release, 1159 .read = vb2_fop_read, 1160 .poll = vb2_fop_poll, 1161 .mmap = vb2_fop_mmap, 1162 .unlocked_ioctl = video_ioctl2, 1163 }; 1164 1165 static const struct v4l2_ioctl_ops video_ioctl_ops = { 1166 .vidioc_querycap = vidioc_querycap, 1167 .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap, 1168 .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap, 1169 .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap, 1170 .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap, 1171 .vidioc_reqbufs = vb2_ioctl_reqbufs, 1172 .vidioc_querybuf = vb2_ioctl_querybuf, 1173 .vidioc_qbuf = vb2_ioctl_qbuf, 1174 .vidioc_dqbuf = vb2_ioctl_dqbuf, 1175 .vidioc_g_std = vidioc_g_std, 1176 .vidioc_s_std = vidioc_s_std, 1177 .vidioc_enum_input = vidioc_enum_input, 1178 .vidioc_g_input = vidioc_g_input, 1179 .vidioc_s_input = vidioc_s_input, 1180 .vidioc_streamon = vb2_ioctl_streamon, 1181 .vidioc_streamoff = vb2_ioctl_streamoff, 1182 .vidioc_g_tuner = vidioc_g_tuner, 1183 .vidioc_s_tuner = vidioc_s_tuner, 1184 .vidioc_g_frequency = vidioc_g_frequency, 1185 .vidioc_s_frequency = vidioc_s_frequency, 1186 .vidioc_subscribe_event = v4l2_ctrl_subscribe_event, 1187 .vidioc_unsubscribe_event = v4l2_event_unsubscribe, 1188 #ifdef CONFIG_VIDEO_ADV_DEBUG 1189 .vidioc_g_register = vidioc_g_register, 1190 .vidioc_s_register = vidioc_s_register, 1191 #endif 1192 }; 1193 1194 static const struct video_device cx8800_video_template = { 1195 .name = "cx8800-video", 1196 .fops = &video_fops, 1197 .ioctl_ops = &video_ioctl_ops, 1198 .tvnorms = CX88_NORMS, 1199 }; 1200 1201 static const struct v4l2_ioctl_ops vbi_ioctl_ops = { 1202 .vidioc_querycap = vidioc_querycap, 1203 .vidioc_g_fmt_vbi_cap = cx8800_vbi_fmt, 1204 .vidioc_try_fmt_vbi_cap = cx8800_vbi_fmt, 1205 .vidioc_s_fmt_vbi_cap = cx8800_vbi_fmt, 1206 .vidioc_reqbufs = vb2_ioctl_reqbufs, 1207 .vidioc_querybuf = vb2_ioctl_querybuf, 1208 .vidioc_qbuf = vb2_ioctl_qbuf, 1209 .vidioc_dqbuf = vb2_ioctl_dqbuf, 1210 .vidioc_g_std = vidioc_g_std, 1211 .vidioc_s_std = vidioc_s_std, 1212 .vidioc_enum_input = vidioc_enum_input, 1213 .vidioc_g_input = vidioc_g_input, 1214 .vidioc_s_input = vidioc_s_input, 1215 .vidioc_streamon = vb2_ioctl_streamon, 1216 .vidioc_streamoff = vb2_ioctl_streamoff, 1217 .vidioc_g_tuner = vidioc_g_tuner, 1218 .vidioc_s_tuner = vidioc_s_tuner, 1219 .vidioc_g_frequency = vidioc_g_frequency, 1220 .vidioc_s_frequency = vidioc_s_frequency, 1221 #ifdef CONFIG_VIDEO_ADV_DEBUG 1222 .vidioc_g_register = vidioc_g_register, 1223 .vidioc_s_register = vidioc_s_register, 1224 #endif 1225 }; 1226 1227 static const struct video_device cx8800_vbi_template = { 1228 .name = "cx8800-vbi", 1229 .fops = &video_fops, 1230 .ioctl_ops = &vbi_ioctl_ops, 1231 .tvnorms = CX88_NORMS, 1232 }; 1233 1234 static const struct v4l2_file_operations radio_fops = { 1235 1236 .owner = THIS_MODULE, 1237 .open = radio_open, 1238 .poll = v4l2_ctrl_poll, 1239 .release = v4l2_fh_release, 1240 .unlocked_ioctl = video_ioctl2, 1241 }; 1242 1243 static const struct v4l2_ioctl_ops radio_ioctl_ops = { 1244 .vidioc_querycap = vidioc_querycap, 1245 .vidioc_g_tuner = radio_g_tuner, 1246 .vidioc_s_tuner = radio_s_tuner, 1247 .vidioc_g_frequency = vidioc_g_frequency, 1248 .vidioc_s_frequency = vidioc_s_frequency, 1249 .vidioc_subscribe_event = v4l2_ctrl_subscribe_event, 1250 .vidioc_unsubscribe_event = v4l2_event_unsubscribe, 1251 #ifdef CONFIG_VIDEO_ADV_DEBUG 1252 .vidioc_g_register = vidioc_g_register, 1253 .vidioc_s_register = vidioc_s_register, 1254 #endif 1255 }; 1256 1257 static const struct video_device cx8800_radio_template = { 1258 .name = "cx8800-radio", 1259 .fops = &radio_fops, 1260 .ioctl_ops = &radio_ioctl_ops, 1261 }; 1262 1263 static const struct v4l2_ctrl_ops cx8800_ctrl_vid_ops = { 1264 .s_ctrl = cx8800_s_vid_ctrl, 1265 }; 1266 1267 static const struct v4l2_ctrl_ops cx8800_ctrl_aud_ops = { 1268 .s_ctrl = cx8800_s_aud_ctrl, 1269 }; 1270 1271 /* ----------------------------------------------------------- */ 1272 1273 static void cx8800_unregister_video(struct cx8800_dev *dev) 1274 { 1275 video_unregister_device(&dev->radio_dev); 1276 video_unregister_device(&dev->vbi_dev); 1277 video_unregister_device(&dev->video_dev); 1278 } 1279 1280 static int cx8800_initdev(struct pci_dev *pci_dev, 1281 const struct pci_device_id *pci_id) 1282 { 1283 struct cx8800_dev *dev; 1284 struct cx88_core *core; 1285 struct vb2_queue *q; 1286 int err; 1287 int i; 1288 1289 dev = kzalloc(sizeof(*dev), GFP_KERNEL); 1290 if (dev == NULL) 1291 return -ENOMEM; 1292 1293 /* pci init */ 1294 dev->pci = pci_dev; 1295 if (pci_enable_device(pci_dev)) { 1296 err = -EIO; 1297 goto fail_free; 1298 } 1299 core = cx88_core_get(dev->pci); 1300 if (core == NULL) { 1301 err = -EINVAL; 1302 goto fail_free; 1303 } 1304 dev->core = core; 1305 1306 /* print pci info */ 1307 dev->pci_rev = pci_dev->revision; 1308 pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &dev->pci_lat); 1309 pr_info("found at %s, rev: %d, irq: %d, latency: %d, mmio: 0x%llx\n", 1310 pci_name(pci_dev), dev->pci_rev, pci_dev->irq, 1311 dev->pci_lat, 1312 (unsigned long long)pci_resource_start(pci_dev, 0)); 1313 1314 pci_set_master(pci_dev); 1315 err = pci_set_dma_mask(pci_dev, DMA_BIT_MASK(32)); 1316 if (err) { 1317 pr_err("Oops: no 32bit PCI DMA ???\n"); 1318 goto fail_core; 1319 } 1320 1321 /* initialize driver struct */ 1322 spin_lock_init(&dev->slock); 1323 1324 /* init video dma queues */ 1325 INIT_LIST_HEAD(&dev->vidq.active); 1326 1327 /* init vbi dma queues */ 1328 INIT_LIST_HEAD(&dev->vbiq.active); 1329 1330 /* get irq */ 1331 err = request_irq(pci_dev->irq, cx8800_irq, 1332 IRQF_SHARED, core->name, dev); 1333 if (err < 0) { 1334 pr_err("can't get IRQ %d\n", pci_dev->irq); 1335 goto fail_core; 1336 } 1337 cx_set(MO_PCI_INTMSK, core->pci_irqmask); 1338 1339 for (i = 0; i < CX8800_AUD_CTLS; i++) { 1340 const struct cx88_ctrl *cc = &cx8800_aud_ctls[i]; 1341 struct v4l2_ctrl *vc; 1342 1343 vc = v4l2_ctrl_new_std(&core->audio_hdl, &cx8800_ctrl_aud_ops, 1344 cc->id, cc->minimum, cc->maximum, cc->step, cc->default_value); 1345 if (vc == NULL) { 1346 err = core->audio_hdl.error; 1347 goto fail_core; 1348 } 1349 vc->priv = (void *)cc; 1350 } 1351 1352 for (i = 0; i < CX8800_VID_CTLS; i++) { 1353 const struct cx88_ctrl *cc = &cx8800_vid_ctls[i]; 1354 struct v4l2_ctrl *vc; 1355 1356 vc = v4l2_ctrl_new_std(&core->video_hdl, &cx8800_ctrl_vid_ops, 1357 cc->id, cc->minimum, cc->maximum, cc->step, cc->default_value); 1358 if (vc == NULL) { 1359 err = core->video_hdl.error; 1360 goto fail_core; 1361 } 1362 vc->priv = (void *)cc; 1363 if (vc->id == V4L2_CID_CHROMA_AGC) 1364 core->chroma_agc = vc; 1365 } 1366 v4l2_ctrl_add_handler(&core->video_hdl, &core->audio_hdl, NULL); 1367 1368 /* load and configure helper modules */ 1369 1370 if (core->board.audio_chip == CX88_AUDIO_WM8775) { 1371 struct i2c_board_info wm8775_info = { 1372 .type = "wm8775", 1373 .addr = 0x36 >> 1, 1374 .platform_data = &core->wm8775_data, 1375 }; 1376 struct v4l2_subdev *sd; 1377 1378 if (core->boardnr == CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1) 1379 core->wm8775_data.is_nova_s = true; 1380 else 1381 core->wm8775_data.is_nova_s = false; 1382 1383 sd = v4l2_i2c_new_subdev_board(&core->v4l2_dev, &core->i2c_adap, 1384 &wm8775_info, NULL); 1385 if (sd != NULL) { 1386 core->sd_wm8775 = sd; 1387 sd->grp_id = WM8775_GID; 1388 } 1389 } 1390 1391 if (core->board.audio_chip == CX88_AUDIO_TVAUDIO) { 1392 /* This probes for a tda9874 as is used on some 1393 Pixelview Ultra boards. */ 1394 v4l2_i2c_new_subdev(&core->v4l2_dev, &core->i2c_adap, 1395 "tvaudio", 0, I2C_ADDRS(0xb0 >> 1)); 1396 } 1397 1398 switch (core->boardnr) { 1399 case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD: 1400 case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD: { 1401 static const struct i2c_board_info rtc_info = { 1402 I2C_BOARD_INFO("isl1208", 0x6f) 1403 }; 1404 1405 request_module("rtc-isl1208"); 1406 core->i2c_rtc = i2c_new_device(&core->i2c_adap, &rtc_info); 1407 } 1408 /* break intentionally omitted */ 1409 case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO: 1410 request_module("ir-kbd-i2c"); 1411 } 1412 1413 /* Sets device info at pci_dev */ 1414 pci_set_drvdata(pci_dev, dev); 1415 1416 dev->fmt = format_by_fourcc(V4L2_PIX_FMT_BGR24); 1417 1418 /* Maintain a reference so cx88-blackbird can query the 8800 device. */ 1419 core->v4ldev = dev; 1420 1421 /* initial device configuration */ 1422 mutex_lock(&core->lock); 1423 cx88_set_tvnorm(core, core->tvnorm); 1424 v4l2_ctrl_handler_setup(&core->video_hdl); 1425 v4l2_ctrl_handler_setup(&core->audio_hdl); 1426 cx88_video_mux(core, 0); 1427 1428 q = &dev->vb2_vidq; 1429 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; 1430 q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ; 1431 q->gfp_flags = GFP_DMA32; 1432 q->min_buffers_needed = 2; 1433 q->drv_priv = dev; 1434 q->buf_struct_size = sizeof(struct cx88_buffer); 1435 q->ops = &cx8800_video_qops; 1436 q->mem_ops = &vb2_dma_sg_memops; 1437 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; 1438 q->lock = &core->lock; 1439 q->dev = &dev->pci->dev; 1440 1441 err = vb2_queue_init(q); 1442 if (err < 0) 1443 goto fail_unreg; 1444 1445 q = &dev->vb2_vbiq; 1446 q->type = V4L2_BUF_TYPE_VBI_CAPTURE; 1447 q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ; 1448 q->gfp_flags = GFP_DMA32; 1449 q->min_buffers_needed = 2; 1450 q->drv_priv = dev; 1451 q->buf_struct_size = sizeof(struct cx88_buffer); 1452 q->ops = &cx8800_vbi_qops; 1453 q->mem_ops = &vb2_dma_sg_memops; 1454 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; 1455 q->lock = &core->lock; 1456 q->dev = &dev->pci->dev; 1457 1458 err = vb2_queue_init(q); 1459 if (err < 0) 1460 goto fail_unreg; 1461 1462 /* register v4l devices */ 1463 cx88_vdev_init(core, dev->pci, &dev->video_dev, 1464 &cx8800_video_template, "video"); 1465 video_set_drvdata(&dev->video_dev, dev); 1466 dev->video_dev.ctrl_handler = &core->video_hdl; 1467 dev->video_dev.queue = &dev->vb2_vidq; 1468 err = video_register_device(&dev->video_dev, VFL_TYPE_GRABBER, 1469 video_nr[core->nr]); 1470 if (err < 0) { 1471 pr_err("can't register video device\n"); 1472 goto fail_unreg; 1473 } 1474 pr_info("registered device %s [v4l2]\n", 1475 video_device_node_name(&dev->video_dev)); 1476 1477 cx88_vdev_init(core, dev->pci, &dev->vbi_dev, 1478 &cx8800_vbi_template, "vbi"); 1479 video_set_drvdata(&dev->vbi_dev, dev); 1480 dev->vbi_dev.queue = &dev->vb2_vbiq; 1481 err = video_register_device(&dev->vbi_dev, VFL_TYPE_VBI, 1482 vbi_nr[core->nr]); 1483 if (err < 0) { 1484 pr_err("can't register vbi device\n"); 1485 goto fail_unreg; 1486 } 1487 pr_info("registered device %s\n", 1488 video_device_node_name(&dev->vbi_dev)); 1489 1490 if (core->board.radio.type == CX88_RADIO) { 1491 cx88_vdev_init(core, dev->pci, &dev->radio_dev, 1492 &cx8800_radio_template, "radio"); 1493 video_set_drvdata(&dev->radio_dev, dev); 1494 dev->radio_dev.ctrl_handler = &core->audio_hdl; 1495 err = video_register_device(&dev->radio_dev, VFL_TYPE_RADIO, 1496 radio_nr[core->nr]); 1497 if (err < 0) { 1498 pr_err("can't register radio device\n"); 1499 goto fail_unreg; 1500 } 1501 pr_info("registered device %s\n", 1502 video_device_node_name(&dev->radio_dev)); 1503 } 1504 1505 /* start tvaudio thread */ 1506 if (core->board.tuner_type != UNSET) { 1507 core->kthread = kthread_run(cx88_audio_thread, core, "cx88 tvaudio"); 1508 if (IS_ERR(core->kthread)) { 1509 err = PTR_ERR(core->kthread); 1510 pr_err("failed to create cx88 audio thread, err=%d\n", 1511 err); 1512 } 1513 } 1514 mutex_unlock(&core->lock); 1515 1516 return 0; 1517 1518 fail_unreg: 1519 cx8800_unregister_video(dev); 1520 free_irq(pci_dev->irq, dev); 1521 mutex_unlock(&core->lock); 1522 fail_core: 1523 core->v4ldev = NULL; 1524 cx88_core_put(core, dev->pci); 1525 fail_free: 1526 kfree(dev); 1527 return err; 1528 } 1529 1530 static void cx8800_finidev(struct pci_dev *pci_dev) 1531 { 1532 struct cx8800_dev *dev = pci_get_drvdata(pci_dev); 1533 struct cx88_core *core = dev->core; 1534 1535 /* stop thread */ 1536 if (core->kthread) { 1537 kthread_stop(core->kthread); 1538 core->kthread = NULL; 1539 } 1540 1541 if (core->ir) 1542 cx88_ir_stop(core); 1543 1544 cx88_shutdown(core); /* FIXME */ 1545 1546 /* unregister stuff */ 1547 1548 free_irq(pci_dev->irq, dev); 1549 cx8800_unregister_video(dev); 1550 pci_disable_device(pci_dev); 1551 1552 core->v4ldev = NULL; 1553 1554 /* free memory */ 1555 cx88_core_put(core, dev->pci); 1556 kfree(dev); 1557 } 1558 1559 #ifdef CONFIG_PM 1560 static int cx8800_suspend(struct pci_dev *pci_dev, pm_message_t state) 1561 { 1562 struct cx8800_dev *dev = pci_get_drvdata(pci_dev); 1563 struct cx88_core *core = dev->core; 1564 unsigned long flags; 1565 1566 /* stop video+vbi capture */ 1567 spin_lock_irqsave(&dev->slock, flags); 1568 if (!list_empty(&dev->vidq.active)) { 1569 pr_info("suspend video\n"); 1570 stop_video_dma(dev); 1571 } 1572 if (!list_empty(&dev->vbiq.active)) { 1573 pr_info("suspend vbi\n"); 1574 cx8800_stop_vbi_dma(dev); 1575 } 1576 spin_unlock_irqrestore(&dev->slock, flags); 1577 1578 if (core->ir) 1579 cx88_ir_stop(core); 1580 /* FIXME -- shutdown device */ 1581 cx88_shutdown(core); 1582 1583 pci_save_state(pci_dev); 1584 if (pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state)) != 0) { 1585 pci_disable_device(pci_dev); 1586 dev->state.disabled = 1; 1587 } 1588 return 0; 1589 } 1590 1591 static int cx8800_resume(struct pci_dev *pci_dev) 1592 { 1593 struct cx8800_dev *dev = pci_get_drvdata(pci_dev); 1594 struct cx88_core *core = dev->core; 1595 unsigned long flags; 1596 int err; 1597 1598 if (dev->state.disabled) { 1599 err = pci_enable_device(pci_dev); 1600 if (err) { 1601 pr_err("can't enable device\n"); 1602 return err; 1603 } 1604 1605 dev->state.disabled = 0; 1606 } 1607 err = pci_set_power_state(pci_dev, PCI_D0); 1608 if (err) { 1609 pr_err("can't set power state\n"); 1610 pci_disable_device(pci_dev); 1611 dev->state.disabled = 1; 1612 1613 return err; 1614 } 1615 pci_restore_state(pci_dev); 1616 1617 /* FIXME: re-initialize hardware */ 1618 cx88_reset(core); 1619 if (core->ir) 1620 cx88_ir_start(core); 1621 1622 cx_set(MO_PCI_INTMSK, core->pci_irqmask); 1623 1624 /* restart video+vbi capture */ 1625 spin_lock_irqsave(&dev->slock, flags); 1626 if (!list_empty(&dev->vidq.active)) { 1627 pr_info("resume video\n"); 1628 restart_video_queue(dev, &dev->vidq); 1629 } 1630 if (!list_empty(&dev->vbiq.active)) { 1631 pr_info("resume vbi\n"); 1632 cx8800_restart_vbi_queue(dev, &dev->vbiq); 1633 } 1634 spin_unlock_irqrestore(&dev->slock, flags); 1635 1636 return 0; 1637 } 1638 #endif 1639 1640 /* ----------------------------------------------------------- */ 1641 1642 static const struct pci_device_id cx8800_pci_tbl[] = { 1643 { 1644 .vendor = 0x14f1, 1645 .device = 0x8800, 1646 .subvendor = PCI_ANY_ID, 1647 .subdevice = PCI_ANY_ID, 1648 }, { 1649 /* --- end of list --- */ 1650 } 1651 }; 1652 MODULE_DEVICE_TABLE(pci, cx8800_pci_tbl); 1653 1654 static struct pci_driver cx8800_pci_driver = { 1655 .name = "cx8800", 1656 .id_table = cx8800_pci_tbl, 1657 .probe = cx8800_initdev, 1658 .remove = cx8800_finidev, 1659 #ifdef CONFIG_PM 1660 .suspend = cx8800_suspend, 1661 .resume = cx8800_resume, 1662 #endif 1663 }; 1664 1665 module_pci_driver(cx8800_pci_driver); 1666