1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  *
4  * device driver for Conexant 2388x based TV cards
5  * video4linux video interface
6  *
7  * (c) 2003-04 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
8  *
9  * (c) 2005-2006 Mauro Carvalho Chehab <mchehab@kernel.org>
10  *	- Multituner support
11  *	- video_ioctl2 conversion
12  *	- PAL/M fixes
13  */
14 
15 #include "cx88.h"
16 
17 #include <linux/init.h>
18 #include <linux/list.h>
19 #include <linux/module.h>
20 #include <linux/kmod.h>
21 #include <linux/kernel.h>
22 #include <linux/slab.h>
23 #include <linux/interrupt.h>
24 #include <linux/dma-mapping.h>
25 #include <linux/delay.h>
26 #include <linux/kthread.h>
27 #include <asm/div64.h>
28 
29 #include <media/v4l2-common.h>
30 #include <media/v4l2-ioctl.h>
31 #include <media/v4l2-event.h>
32 #include <media/i2c/wm8775.h>
33 
34 MODULE_DESCRIPTION("v4l2 driver module for cx2388x based TV cards");
35 MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
36 MODULE_LICENSE("GPL v2");
37 MODULE_VERSION(CX88_VERSION);
38 
39 /* ------------------------------------------------------------------ */
40 
41 static unsigned int video_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
42 static unsigned int vbi_nr[]   = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
43 static unsigned int radio_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
44 
45 module_param_array(video_nr, int, NULL, 0444);
46 module_param_array(vbi_nr,   int, NULL, 0444);
47 module_param_array(radio_nr, int, NULL, 0444);
48 
49 MODULE_PARM_DESC(video_nr, "video device numbers");
50 MODULE_PARM_DESC(vbi_nr, "vbi device numbers");
51 MODULE_PARM_DESC(radio_nr, "radio device numbers");
52 
53 static unsigned int video_debug;
54 module_param(video_debug, int, 0644);
55 MODULE_PARM_DESC(video_debug, "enable debug messages [video]");
56 
57 static unsigned int irq_debug;
58 module_param(irq_debug, int, 0644);
59 MODULE_PARM_DESC(irq_debug, "enable debug messages [IRQ handler]");
60 
61 #define dprintk(level, fmt, arg...) do {			\
62 	if (video_debug >= level)				\
63 		printk(KERN_DEBUG pr_fmt("%s: video:" fmt),	\
64 			__func__, ##arg);			\
65 } while (0)
66 
67 /* ------------------------------------------------------------------- */
68 /* static data                                                         */
69 
70 static const struct cx8800_fmt formats[] = {
71 	{
72 		.fourcc   = V4L2_PIX_FMT_GREY,
73 		.cxformat = ColorFormatY8,
74 		.depth    = 8,
75 		.flags    = FORMAT_FLAGS_PACKED,
76 	}, {
77 		.fourcc   = V4L2_PIX_FMT_RGB555,
78 		.cxformat = ColorFormatRGB15,
79 		.depth    = 16,
80 		.flags    = FORMAT_FLAGS_PACKED,
81 	}, {
82 		.fourcc   = V4L2_PIX_FMT_RGB555X,
83 		.cxformat = ColorFormatRGB15 | ColorFormatBSWAP,
84 		.depth    = 16,
85 		.flags    = FORMAT_FLAGS_PACKED,
86 	}, {
87 		.fourcc   = V4L2_PIX_FMT_RGB565,
88 		.cxformat = ColorFormatRGB16,
89 		.depth    = 16,
90 		.flags    = FORMAT_FLAGS_PACKED,
91 	}, {
92 		.fourcc   = V4L2_PIX_FMT_RGB565X,
93 		.cxformat = ColorFormatRGB16 | ColorFormatBSWAP,
94 		.depth    = 16,
95 		.flags    = FORMAT_FLAGS_PACKED,
96 	}, {
97 		.fourcc   = V4L2_PIX_FMT_BGR24,
98 		.cxformat = ColorFormatRGB24,
99 		.depth    = 24,
100 		.flags    = FORMAT_FLAGS_PACKED,
101 	}, {
102 		.fourcc   = V4L2_PIX_FMT_BGR32,
103 		.cxformat = ColorFormatRGB32,
104 		.depth    = 32,
105 		.flags    = FORMAT_FLAGS_PACKED,
106 	}, {
107 		.fourcc   = V4L2_PIX_FMT_RGB32,
108 		.cxformat = ColorFormatRGB32 | ColorFormatBSWAP |
109 			    ColorFormatWSWAP,
110 		.depth    = 32,
111 		.flags    = FORMAT_FLAGS_PACKED,
112 	}, {
113 		.fourcc   = V4L2_PIX_FMT_YUYV,
114 		.cxformat = ColorFormatYUY2,
115 		.depth    = 16,
116 		.flags    = FORMAT_FLAGS_PACKED,
117 	}, {
118 		.fourcc   = V4L2_PIX_FMT_UYVY,
119 		.cxformat = ColorFormatYUY2 | ColorFormatBSWAP,
120 		.depth    = 16,
121 		.flags    = FORMAT_FLAGS_PACKED,
122 	},
123 };
124 
125 static const struct cx8800_fmt *format_by_fourcc(unsigned int fourcc)
126 {
127 	unsigned int i;
128 
129 	for (i = 0; i < ARRAY_SIZE(formats); i++)
130 		if (formats[i].fourcc == fourcc)
131 			return formats + i;
132 	return NULL;
133 }
134 
135 /* ------------------------------------------------------------------- */
136 
137 struct cx88_ctrl {
138 	/* control information */
139 	u32 id;
140 	s32 minimum;
141 	s32 maximum;
142 	u32 step;
143 	s32 default_value;
144 
145 	/* control register information */
146 	u32 off;
147 	u32 reg;
148 	u32 sreg;
149 	u32 mask;
150 	u32 shift;
151 };
152 
153 static const struct cx88_ctrl cx8800_vid_ctls[] = {
154 	/* --- video --- */
155 	{
156 		.id            = V4L2_CID_BRIGHTNESS,
157 		.minimum       = 0x00,
158 		.maximum       = 0xff,
159 		.step          = 1,
160 		.default_value = 0x7f,
161 		.off           = 128,
162 		.reg           = MO_CONTR_BRIGHT,
163 		.mask          = 0x00ff,
164 		.shift         = 0,
165 	}, {
166 		.id            = V4L2_CID_CONTRAST,
167 		.minimum       = 0,
168 		.maximum       = 0xff,
169 		.step          = 1,
170 		.default_value = 0x3f,
171 		.off           = 0,
172 		.reg           = MO_CONTR_BRIGHT,
173 		.mask          = 0xff00,
174 		.shift         = 8,
175 	}, {
176 		.id            = V4L2_CID_HUE,
177 		.minimum       = 0,
178 		.maximum       = 0xff,
179 		.step          = 1,
180 		.default_value = 0x7f,
181 		.off           = 128,
182 		.reg           = MO_HUE,
183 		.mask          = 0x00ff,
184 		.shift         = 0,
185 	}, {
186 		/* strictly, this only describes only U saturation.
187 		 * V saturation is handled specially through code.
188 		 */
189 		.id            = V4L2_CID_SATURATION,
190 		.minimum       = 0,
191 		.maximum       = 0xff,
192 		.step          = 1,
193 		.default_value = 0x7f,
194 		.off           = 0,
195 		.reg           = MO_UV_SATURATION,
196 		.mask          = 0x00ff,
197 		.shift         = 0,
198 	}, {
199 		.id            = V4L2_CID_SHARPNESS,
200 		.minimum       = 0,
201 		.maximum       = 4,
202 		.step          = 1,
203 		.default_value = 0x0,
204 		.off           = 0,
205 		/*
206 		 * NOTE: the value is converted and written to both even
207 		 * and odd registers in the code
208 		 */
209 		.reg           = MO_FILTER_ODD,
210 		.mask          = 7 << 7,
211 		.shift         = 7,
212 	}, {
213 		.id            = V4L2_CID_CHROMA_AGC,
214 		.minimum       = 0,
215 		.maximum       = 1,
216 		.default_value = 0x1,
217 		.reg           = MO_INPUT_FORMAT,
218 		.mask          = 1 << 10,
219 		.shift         = 10,
220 	}, {
221 		.id            = V4L2_CID_COLOR_KILLER,
222 		.minimum       = 0,
223 		.maximum       = 1,
224 		.default_value = 0x1,
225 		.reg           = MO_INPUT_FORMAT,
226 		.mask          = 1 << 9,
227 		.shift         = 9,
228 	}, {
229 		.id            = V4L2_CID_BAND_STOP_FILTER,
230 		.minimum       = 0,
231 		.maximum       = 1,
232 		.step          = 1,
233 		.default_value = 0x0,
234 		.off           = 0,
235 		.reg           = MO_HTOTAL,
236 		.mask          = 3 << 11,
237 		.shift         = 11,
238 	}
239 };
240 
241 static const struct cx88_ctrl cx8800_aud_ctls[] = {
242 	{
243 		/* --- audio --- */
244 		.id            = V4L2_CID_AUDIO_MUTE,
245 		.minimum       = 0,
246 		.maximum       = 1,
247 		.default_value = 1,
248 		.reg           = AUD_VOL_CTL,
249 		.sreg          = SHADOW_AUD_VOL_CTL,
250 		.mask          = (1 << 6),
251 		.shift         = 6,
252 	}, {
253 		.id            = V4L2_CID_AUDIO_VOLUME,
254 		.minimum       = 0,
255 		.maximum       = 0x3f,
256 		.step          = 1,
257 		.default_value = 0x3f,
258 		.reg           = AUD_VOL_CTL,
259 		.sreg          = SHADOW_AUD_VOL_CTL,
260 		.mask          = 0x3f,
261 		.shift         = 0,
262 	}, {
263 		.id            = V4L2_CID_AUDIO_BALANCE,
264 		.minimum       = 0,
265 		.maximum       = 0x7f,
266 		.step          = 1,
267 		.default_value = 0x40,
268 		.reg           = AUD_BAL_CTL,
269 		.sreg          = SHADOW_AUD_BAL_CTL,
270 		.mask          = 0x7f,
271 		.shift         = 0,
272 	}
273 };
274 
275 enum {
276 	CX8800_VID_CTLS = ARRAY_SIZE(cx8800_vid_ctls),
277 	CX8800_AUD_CTLS = ARRAY_SIZE(cx8800_aud_ctls),
278 };
279 
280 /* ------------------------------------------------------------------ */
281 
282 int cx88_video_mux(struct cx88_core *core, unsigned int input)
283 {
284 	/* struct cx88_core *core = dev->core; */
285 
286 	dprintk(1, "video_mux: %d [vmux=%d,gpio=0x%x,0x%x,0x%x,0x%x]\n",
287 		input, INPUT(input).vmux,
288 		INPUT(input).gpio0, INPUT(input).gpio1,
289 		INPUT(input).gpio2, INPUT(input).gpio3);
290 	core->input = input;
291 	cx_andor(MO_INPUT_FORMAT, 0x03 << 14, INPUT(input).vmux << 14);
292 	cx_write(MO_GP3_IO, INPUT(input).gpio3);
293 	cx_write(MO_GP0_IO, INPUT(input).gpio0);
294 	cx_write(MO_GP1_IO, INPUT(input).gpio1);
295 	cx_write(MO_GP2_IO, INPUT(input).gpio2);
296 
297 	switch (INPUT(input).type) {
298 	case CX88_VMUX_SVIDEO:
299 		cx_set(MO_AFECFG_IO,    0x00000001);
300 		cx_set(MO_INPUT_FORMAT, 0x00010010);
301 		cx_set(MO_FILTER_EVEN,  0x00002020);
302 		cx_set(MO_FILTER_ODD,   0x00002020);
303 		break;
304 	default:
305 		cx_clear(MO_AFECFG_IO,    0x00000001);
306 		cx_clear(MO_INPUT_FORMAT, 0x00010010);
307 		cx_clear(MO_FILTER_EVEN,  0x00002020);
308 		cx_clear(MO_FILTER_ODD,   0x00002020);
309 		break;
310 	}
311 
312 	/*
313 	 * if there are audioroutes defined, we have an external
314 	 * ADC to deal with audio
315 	 */
316 	if (INPUT(input).audioroute) {
317 		/*
318 		 * The wm8775 module has the "2" route hardwired into
319 		 * the initialization. Some boards may use different
320 		 * routes for different inputs. HVR-1300 surely does
321 		 */
322 		if (core->sd_wm8775) {
323 			call_all(core, audio, s_routing,
324 				 INPUT(input).audioroute, 0, 0);
325 		}
326 		/*
327 		 * cx2388's C-ADC is connected to the tuner only.
328 		 * When used with S-Video, that ADC is busy dealing with
329 		 * chroma, so an external must be used for baseband audio
330 		 */
331 		if (INPUT(input).type != CX88_VMUX_TELEVISION &&
332 		    INPUT(input).type != CX88_VMUX_CABLE) {
333 			/* "I2S ADC mode" */
334 			core->tvaudio = WW_I2SADC;
335 			cx88_set_tvaudio(core);
336 		} else {
337 			/* Normal mode */
338 			cx_write(AUD_I2SCNTL, 0x0);
339 			cx_clear(AUD_CTL, EN_I2SIN_ENABLE);
340 		}
341 	}
342 
343 	return 0;
344 }
345 EXPORT_SYMBOL(cx88_video_mux);
346 
347 /* ------------------------------------------------------------------ */
348 
349 static int start_video_dma(struct cx8800_dev    *dev,
350 			   struct cx88_dmaqueue *q,
351 			   struct cx88_buffer   *buf)
352 {
353 	struct cx88_core *core = dev->core;
354 
355 	/* setup fifo + format */
356 	cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH21],
357 				buf->bpl, buf->risc.dma);
358 	cx88_set_scale(core, core->width, core->height, core->field);
359 	cx_write(MO_COLOR_CTRL, dev->fmt->cxformat | ColorFormatGamma);
360 
361 	/* reset counter */
362 	cx_write(MO_VIDY_GPCNTRL, GP_COUNT_CONTROL_RESET);
363 	q->count = 0;
364 
365 	/* enable irqs */
366 	cx_set(MO_PCI_INTMSK, core->pci_irqmask | PCI_INT_VIDINT);
367 
368 	/*
369 	 * Enables corresponding bits at PCI_INT_STAT:
370 	 *	bits 0 to 4: video, audio, transport stream, VIP, Host
371 	 *	bit 7: timer
372 	 *	bits 8 and 9: DMA complete for: SRC, DST
373 	 *	bits 10 and 11: BERR signal asserted for RISC: RD, WR
374 	 *	bits 12 to 15: BERR signal asserted for: BRDG, SRC, DST, IPB
375 	 */
376 	cx_set(MO_VID_INTMSK, 0x0f0011);
377 
378 	/* enable capture */
379 	cx_set(VID_CAPTURE_CONTROL, 0x06);
380 
381 	/* start dma */
382 	cx_set(MO_DEV_CNTRL2, (1 << 5));
383 	cx_set(MO_VID_DMACNTRL, 0x11); /* Planar Y and packed FIFO and RISC enable */
384 
385 	return 0;
386 }
387 
388 #ifdef CONFIG_PM
389 static int stop_video_dma(struct cx8800_dev    *dev)
390 {
391 	struct cx88_core *core = dev->core;
392 
393 	/* stop dma */
394 	cx_clear(MO_VID_DMACNTRL, 0x11);
395 
396 	/* disable capture */
397 	cx_clear(VID_CAPTURE_CONTROL, 0x06);
398 
399 	/* disable irqs */
400 	cx_clear(MO_PCI_INTMSK, PCI_INT_VIDINT);
401 	cx_clear(MO_VID_INTMSK, 0x0f0011);
402 	return 0;
403 }
404 
405 static int restart_video_queue(struct cx8800_dev    *dev,
406 			       struct cx88_dmaqueue *q)
407 {
408 	struct cx88_buffer *buf;
409 
410 	if (!list_empty(&q->active)) {
411 		buf = list_entry(q->active.next, struct cx88_buffer, list);
412 		dprintk(2, "restart_queue [%p/%d]: restart dma\n",
413 			buf, buf->vb.vb2_buf.index);
414 		start_video_dma(dev, q, buf);
415 	}
416 	return 0;
417 }
418 #endif
419 
420 /* ------------------------------------------------------------------ */
421 
422 static int queue_setup(struct vb2_queue *q,
423 		       unsigned int *num_buffers, unsigned int *num_planes,
424 		       unsigned int sizes[], struct device *alloc_devs[])
425 {
426 	struct cx8800_dev *dev = q->drv_priv;
427 	struct cx88_core *core = dev->core;
428 
429 	*num_planes = 1;
430 	sizes[0] = (dev->fmt->depth * core->width * core->height) >> 3;
431 	return 0;
432 }
433 
434 static int buffer_prepare(struct vb2_buffer *vb)
435 {
436 	struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
437 	struct cx8800_dev *dev = vb->vb2_queue->drv_priv;
438 	struct cx88_core *core = dev->core;
439 	struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
440 	struct sg_table *sgt = vb2_dma_sg_plane_desc(vb, 0);
441 
442 	buf->bpl = core->width * dev->fmt->depth >> 3;
443 
444 	if (vb2_plane_size(vb, 0) < core->height * buf->bpl)
445 		return -EINVAL;
446 	vb2_set_plane_payload(vb, 0, core->height * buf->bpl);
447 
448 	switch (core->field) {
449 	case V4L2_FIELD_TOP:
450 		cx88_risc_buffer(dev->pci, &buf->risc,
451 				 sgt->sgl, 0, UNSET,
452 				 buf->bpl, 0, core->height);
453 		break;
454 	case V4L2_FIELD_BOTTOM:
455 		cx88_risc_buffer(dev->pci, &buf->risc,
456 				 sgt->sgl, UNSET, 0,
457 				 buf->bpl, 0, core->height);
458 		break;
459 	case V4L2_FIELD_SEQ_TB:
460 		cx88_risc_buffer(dev->pci, &buf->risc,
461 				 sgt->sgl,
462 				 0, buf->bpl * (core->height >> 1),
463 				 buf->bpl, 0,
464 				 core->height >> 1);
465 		break;
466 	case V4L2_FIELD_SEQ_BT:
467 		cx88_risc_buffer(dev->pci, &buf->risc,
468 				 sgt->sgl,
469 				 buf->bpl * (core->height >> 1), 0,
470 				 buf->bpl, 0,
471 				 core->height >> 1);
472 		break;
473 	case V4L2_FIELD_INTERLACED:
474 	default:
475 		cx88_risc_buffer(dev->pci, &buf->risc,
476 				 sgt->sgl, 0, buf->bpl,
477 				 buf->bpl, buf->bpl,
478 				 core->height >> 1);
479 		break;
480 	}
481 	dprintk(2,
482 		"[%p/%d] %s - %dx%d %dbpp 0x%08x - dma=0x%08lx\n",
483 		buf, buf->vb.vb2_buf.index, __func__,
484 		core->width, core->height, dev->fmt->depth, dev->fmt->fourcc,
485 		(unsigned long)buf->risc.dma);
486 	return 0;
487 }
488 
489 static void buffer_finish(struct vb2_buffer *vb)
490 {
491 	struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
492 	struct cx8800_dev *dev = vb->vb2_queue->drv_priv;
493 	struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
494 	struct cx88_riscmem *risc = &buf->risc;
495 
496 	if (risc->cpu)
497 		pci_free_consistent(dev->pci, risc->size, risc->cpu, risc->dma);
498 	memset(risc, 0, sizeof(*risc));
499 }
500 
501 static void buffer_queue(struct vb2_buffer *vb)
502 {
503 	struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
504 	struct cx8800_dev *dev = vb->vb2_queue->drv_priv;
505 	struct cx88_buffer    *buf = container_of(vbuf, struct cx88_buffer, vb);
506 	struct cx88_buffer    *prev;
507 	struct cx88_dmaqueue  *q    = &dev->vidq;
508 
509 	/* add jump to start */
510 	buf->risc.cpu[1] = cpu_to_le32(buf->risc.dma + 8);
511 	buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_CNT_INC);
512 	buf->risc.jmp[1] = cpu_to_le32(buf->risc.dma + 8);
513 
514 	if (list_empty(&q->active)) {
515 		list_add_tail(&buf->list, &q->active);
516 		dprintk(2, "[%p/%d] buffer_queue - first active\n",
517 			buf, buf->vb.vb2_buf.index);
518 
519 	} else {
520 		buf->risc.cpu[0] |= cpu_to_le32(RISC_IRQ1);
521 		prev = list_entry(q->active.prev, struct cx88_buffer, list);
522 		list_add_tail(&buf->list, &q->active);
523 		prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
524 		dprintk(2, "[%p/%d] buffer_queue - append to active\n",
525 			buf, buf->vb.vb2_buf.index);
526 	}
527 }
528 
529 static int start_streaming(struct vb2_queue *q, unsigned int count)
530 {
531 	struct cx8800_dev *dev = q->drv_priv;
532 	struct cx88_dmaqueue *dmaq = &dev->vidq;
533 	struct cx88_buffer *buf = list_entry(dmaq->active.next,
534 			struct cx88_buffer, list);
535 
536 	start_video_dma(dev, dmaq, buf);
537 	return 0;
538 }
539 
540 static void stop_streaming(struct vb2_queue *q)
541 {
542 	struct cx8800_dev *dev = q->drv_priv;
543 	struct cx88_core *core = dev->core;
544 	struct cx88_dmaqueue *dmaq = &dev->vidq;
545 	unsigned long flags;
546 
547 	cx_clear(MO_VID_DMACNTRL, 0x11);
548 	cx_clear(VID_CAPTURE_CONTROL, 0x06);
549 	spin_lock_irqsave(&dev->slock, flags);
550 	while (!list_empty(&dmaq->active)) {
551 		struct cx88_buffer *buf = list_entry(dmaq->active.next,
552 			struct cx88_buffer, list);
553 
554 		list_del(&buf->list);
555 		vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
556 	}
557 	spin_unlock_irqrestore(&dev->slock, flags);
558 }
559 
560 static const struct vb2_ops cx8800_video_qops = {
561 	.queue_setup    = queue_setup,
562 	.buf_prepare  = buffer_prepare,
563 	.buf_finish = buffer_finish,
564 	.buf_queue    = buffer_queue,
565 	.wait_prepare = vb2_ops_wait_prepare,
566 	.wait_finish = vb2_ops_wait_finish,
567 	.start_streaming = start_streaming,
568 	.stop_streaming = stop_streaming,
569 };
570 
571 /* ------------------------------------------------------------------ */
572 
573 static int radio_open(struct file *file)
574 {
575 	struct cx8800_dev *dev = video_drvdata(file);
576 	struct cx88_core *core = dev->core;
577 	int ret = v4l2_fh_open(file);
578 
579 	if (ret)
580 		return ret;
581 
582 	cx_write(MO_GP3_IO, core->board.radio.gpio3);
583 	cx_write(MO_GP0_IO, core->board.radio.gpio0);
584 	cx_write(MO_GP1_IO, core->board.radio.gpio1);
585 	cx_write(MO_GP2_IO, core->board.radio.gpio2);
586 	if (core->board.radio.audioroute) {
587 		if (core->sd_wm8775) {
588 			call_all(core, audio, s_routing,
589 				 core->board.radio.audioroute, 0, 0);
590 		}
591 		/* "I2S ADC mode" */
592 		core->tvaudio = WW_I2SADC;
593 		cx88_set_tvaudio(core);
594 	} else {
595 		/* FM Mode */
596 		core->tvaudio = WW_FM;
597 		cx88_set_tvaudio(core);
598 		cx88_set_stereo(core, V4L2_TUNER_MODE_STEREO, 1);
599 	}
600 	call_all(core, tuner, s_radio);
601 	return 0;
602 }
603 
604 /* ------------------------------------------------------------------ */
605 /* VIDEO CTRL IOCTLS                                                  */
606 
607 static int cx8800_s_vid_ctrl(struct v4l2_ctrl *ctrl)
608 {
609 	struct cx88_core *core =
610 		container_of(ctrl->handler, struct cx88_core, video_hdl);
611 	const struct cx88_ctrl *cc = ctrl->priv;
612 	u32 value, mask;
613 
614 	mask = cc->mask;
615 	switch (ctrl->id) {
616 	case V4L2_CID_SATURATION:
617 		/* special v_sat handling */
618 
619 		value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
620 
621 		if (core->tvnorm & V4L2_STD_SECAM) {
622 			/* For SECAM, both U and V sat should be equal */
623 			value = value << 8 | value;
624 		} else {
625 			/* Keeps U Saturation proportional to V Sat */
626 			value = (value * 0x5a) / 0x7f << 8 | value;
627 		}
628 		mask = 0xffff;
629 		break;
630 	case V4L2_CID_SHARPNESS:
631 		/* 0b000, 0b100, 0b101, 0b110, or 0b111 */
632 		value = (ctrl->val < 1 ? 0 : ((ctrl->val + 3) << 7));
633 		/* needs to be set for both fields */
634 		cx_andor(MO_FILTER_EVEN, mask, value);
635 		break;
636 	case V4L2_CID_CHROMA_AGC:
637 		value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
638 		break;
639 	default:
640 		value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
641 		break;
642 	}
643 	dprintk(1,
644 		"set_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
645 		ctrl->id, ctrl->name, ctrl->val, cc->reg, value,
646 		mask, cc->sreg ? " [shadowed]" : "");
647 	if (cc->sreg)
648 		cx_sandor(cc->sreg, cc->reg, mask, value);
649 	else
650 		cx_andor(cc->reg, mask, value);
651 	return 0;
652 }
653 
654 static int cx8800_s_aud_ctrl(struct v4l2_ctrl *ctrl)
655 {
656 	struct cx88_core *core =
657 		container_of(ctrl->handler, struct cx88_core, audio_hdl);
658 	const struct cx88_ctrl *cc = ctrl->priv;
659 	u32 value, mask;
660 
661 	/* Pass changes onto any WM8775 */
662 	if (core->sd_wm8775) {
663 		switch (ctrl->id) {
664 		case V4L2_CID_AUDIO_MUTE:
665 			wm8775_s_ctrl(core, ctrl->id, ctrl->val);
666 			break;
667 		case V4L2_CID_AUDIO_VOLUME:
668 			wm8775_s_ctrl(core, ctrl->id, (ctrl->val) ?
669 						(0x90 + ctrl->val) << 8 : 0);
670 			break;
671 		case V4L2_CID_AUDIO_BALANCE:
672 			wm8775_s_ctrl(core, ctrl->id, ctrl->val << 9);
673 			break;
674 		default:
675 			break;
676 		}
677 	}
678 
679 	mask = cc->mask;
680 	switch (ctrl->id) {
681 	case V4L2_CID_AUDIO_BALANCE:
682 		value = (ctrl->val < 0x40) ?
683 			(0x7f - ctrl->val) : (ctrl->val - 0x40);
684 		break;
685 	case V4L2_CID_AUDIO_VOLUME:
686 		value = 0x3f - (ctrl->val & 0x3f);
687 		break;
688 	default:
689 		value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
690 		break;
691 	}
692 	dprintk(1,
693 		"set_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
694 		ctrl->id, ctrl->name, ctrl->val, cc->reg, value,
695 		mask, cc->sreg ? " [shadowed]" : "");
696 	if (cc->sreg)
697 		cx_sandor(cc->sreg, cc->reg, mask, value);
698 	else
699 		cx_andor(cc->reg, mask, value);
700 	return 0;
701 }
702 
703 /* ------------------------------------------------------------------ */
704 /* VIDEO IOCTLS                                                       */
705 
706 static int vidioc_g_fmt_vid_cap(struct file *file, void *priv,
707 				struct v4l2_format *f)
708 {
709 	struct cx8800_dev *dev = video_drvdata(file);
710 	struct cx88_core *core = dev->core;
711 
712 	f->fmt.pix.width        = core->width;
713 	f->fmt.pix.height       = core->height;
714 	f->fmt.pix.field        = core->field;
715 	f->fmt.pix.pixelformat  = dev->fmt->fourcc;
716 	f->fmt.pix.bytesperline =
717 		(f->fmt.pix.width * dev->fmt->depth) >> 3;
718 	f->fmt.pix.sizeimage =
719 		f->fmt.pix.height * f->fmt.pix.bytesperline;
720 	f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
721 	return 0;
722 }
723 
724 static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
725 				  struct v4l2_format *f)
726 {
727 	struct cx8800_dev *dev = video_drvdata(file);
728 	struct cx88_core *core = dev->core;
729 	const struct cx8800_fmt *fmt;
730 	enum v4l2_field   field;
731 	unsigned int      maxw, maxh;
732 
733 	fmt = format_by_fourcc(f->fmt.pix.pixelformat);
734 	if (!fmt)
735 		return -EINVAL;
736 
737 	maxw = norm_maxw(core->tvnorm);
738 	maxh = norm_maxh(core->tvnorm);
739 
740 	field = f->fmt.pix.field;
741 
742 	switch (field) {
743 	case V4L2_FIELD_TOP:
744 	case V4L2_FIELD_BOTTOM:
745 	case V4L2_FIELD_INTERLACED:
746 	case V4L2_FIELD_SEQ_BT:
747 	case V4L2_FIELD_SEQ_TB:
748 		break;
749 	default:
750 		field = (f->fmt.pix.height > maxh / 2)
751 			? V4L2_FIELD_INTERLACED
752 			: V4L2_FIELD_BOTTOM;
753 		break;
754 	}
755 	if (V4L2_FIELD_HAS_T_OR_B(field))
756 		maxh /= 2;
757 
758 	v4l_bound_align_image(&f->fmt.pix.width, 48, maxw, 2,
759 			      &f->fmt.pix.height, 32, maxh, 0, 0);
760 	f->fmt.pix.field = field;
761 	f->fmt.pix.bytesperline =
762 		(f->fmt.pix.width * fmt->depth) >> 3;
763 	f->fmt.pix.sizeimage =
764 		f->fmt.pix.height * f->fmt.pix.bytesperline;
765 	f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
766 
767 	return 0;
768 }
769 
770 static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
771 				struct v4l2_format *f)
772 {
773 	struct cx8800_dev *dev = video_drvdata(file);
774 	struct cx88_core *core = dev->core;
775 	int err = vidioc_try_fmt_vid_cap(file, priv, f);
776 
777 	if (err != 0)
778 		return err;
779 	if (vb2_is_busy(&dev->vb2_vidq) || vb2_is_busy(&dev->vb2_vbiq))
780 		return -EBUSY;
781 	if (core->dvbdev && vb2_is_busy(&core->dvbdev->vb2_mpegq))
782 		return -EBUSY;
783 	dev->fmt = format_by_fourcc(f->fmt.pix.pixelformat);
784 	core->width = f->fmt.pix.width;
785 	core->height = f->fmt.pix.height;
786 	core->field = f->fmt.pix.field;
787 	return 0;
788 }
789 
790 int cx88_querycap(struct file *file, struct cx88_core *core,
791 		  struct v4l2_capability *cap)
792 {
793 	strscpy(cap->card, core->board.name, sizeof(cap->card));
794 	cap->capabilities = V4L2_CAP_READWRITE | V4L2_CAP_STREAMING |
795 			    V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_VBI_CAPTURE |
796 			    V4L2_CAP_DEVICE_CAPS;
797 	if (core->board.tuner_type != UNSET)
798 		cap->capabilities |= V4L2_CAP_TUNER;
799 	if (core->board.radio.type == CX88_RADIO)
800 		cap->capabilities |= V4L2_CAP_RADIO;
801 	return 0;
802 }
803 EXPORT_SYMBOL(cx88_querycap);
804 
805 static int vidioc_querycap(struct file *file, void  *priv,
806 			   struct v4l2_capability *cap)
807 {
808 	struct cx8800_dev *dev = video_drvdata(file);
809 	struct cx88_core *core = dev->core;
810 
811 	strscpy(cap->driver, "cx8800", sizeof(cap->driver));
812 	sprintf(cap->bus_info, "PCI:%s", pci_name(dev->pci));
813 	return cx88_querycap(file, core, cap);
814 }
815 
816 static int vidioc_enum_fmt_vid_cap(struct file *file, void  *priv,
817 				   struct v4l2_fmtdesc *f)
818 {
819 	if (unlikely(f->index >= ARRAY_SIZE(formats)))
820 		return -EINVAL;
821 
822 	f->pixelformat = formats[f->index].fourcc;
823 
824 	return 0;
825 }
826 
827 static int vidioc_g_std(struct file *file, void *priv, v4l2_std_id *tvnorm)
828 {
829 	struct cx8800_dev *dev = video_drvdata(file);
830 	struct cx88_core *core = dev->core;
831 
832 	*tvnorm = core->tvnorm;
833 	return 0;
834 }
835 
836 static int vidioc_s_std(struct file *file, void *priv, v4l2_std_id tvnorms)
837 {
838 	struct cx8800_dev *dev = video_drvdata(file);
839 	struct cx88_core *core = dev->core;
840 
841 	return cx88_set_tvnorm(core, tvnorms);
842 }
843 
844 /* only one input in this sample driver */
845 int cx88_enum_input(struct cx88_core  *core, struct v4l2_input *i)
846 {
847 	static const char * const iname[] = {
848 		[CX88_VMUX_COMPOSITE1] = "Composite1",
849 		[CX88_VMUX_COMPOSITE2] = "Composite2",
850 		[CX88_VMUX_COMPOSITE3] = "Composite3",
851 		[CX88_VMUX_COMPOSITE4] = "Composite4",
852 		[CX88_VMUX_SVIDEO] = "S-Video",
853 		[CX88_VMUX_TELEVISION] = "Television",
854 		[CX88_VMUX_CABLE] = "Cable TV",
855 		[CX88_VMUX_DVB] = "DVB",
856 		[CX88_VMUX_DEBUG] = "for debug only",
857 	};
858 	unsigned int n = i->index;
859 
860 	if (n >= 4)
861 		return -EINVAL;
862 	if (!INPUT(n).type)
863 		return -EINVAL;
864 	i->type  = V4L2_INPUT_TYPE_CAMERA;
865 	strscpy(i->name, iname[INPUT(n).type], sizeof(i->name));
866 	if ((INPUT(n).type == CX88_VMUX_TELEVISION) ||
867 	    (INPUT(n).type == CX88_VMUX_CABLE))
868 		i->type = V4L2_INPUT_TYPE_TUNER;
869 
870 	i->std = CX88_NORMS;
871 	return 0;
872 }
873 EXPORT_SYMBOL(cx88_enum_input);
874 
875 static int vidioc_enum_input(struct file *file, void *priv,
876 			     struct v4l2_input *i)
877 {
878 	struct cx8800_dev *dev = video_drvdata(file);
879 	struct cx88_core *core = dev->core;
880 
881 	return cx88_enum_input(core, i);
882 }
883 
884 static int vidioc_g_input(struct file *file, void *priv, unsigned int *i)
885 {
886 	struct cx8800_dev *dev = video_drvdata(file);
887 	struct cx88_core *core = dev->core;
888 
889 	*i = core->input;
890 	return 0;
891 }
892 
893 static int vidioc_s_input(struct file *file, void *priv, unsigned int i)
894 {
895 	struct cx8800_dev *dev = video_drvdata(file);
896 	struct cx88_core *core = dev->core;
897 
898 	if (i >= 4)
899 		return -EINVAL;
900 	if (!INPUT(i).type)
901 		return -EINVAL;
902 
903 	cx88_newstation(core);
904 	cx88_video_mux(core, i);
905 	return 0;
906 }
907 
908 static int vidioc_g_tuner(struct file *file, void *priv,
909 			  struct v4l2_tuner *t)
910 {
911 	struct cx8800_dev *dev = video_drvdata(file);
912 	struct cx88_core *core = dev->core;
913 	u32 reg;
914 
915 	if (unlikely(core->board.tuner_type == UNSET))
916 		return -EINVAL;
917 	if (t->index != 0)
918 		return -EINVAL;
919 
920 	strscpy(t->name, "Television", sizeof(t->name));
921 	t->capability = V4L2_TUNER_CAP_NORM;
922 	t->rangehigh  = 0xffffffffUL;
923 	call_all(core, tuner, g_tuner, t);
924 
925 	cx88_get_stereo(core, t);
926 	reg = cx_read(MO_DEVICE_STATUS);
927 	t->signal = (reg & (1 << 5)) ? 0xffff : 0x0000;
928 	return 0;
929 }
930 
931 static int vidioc_s_tuner(struct file *file, void *priv,
932 			  const struct v4l2_tuner *t)
933 {
934 	struct cx8800_dev *dev = video_drvdata(file);
935 	struct cx88_core *core = dev->core;
936 
937 	if (core->board.tuner_type == UNSET)
938 		return -EINVAL;
939 	if (t->index != 0)
940 		return -EINVAL;
941 
942 	cx88_set_stereo(core, t->audmode, 1);
943 	return 0;
944 }
945 
946 static int vidioc_g_frequency(struct file *file, void *priv,
947 			      struct v4l2_frequency *f)
948 {
949 	struct cx8800_dev *dev = video_drvdata(file);
950 	struct cx88_core *core = dev->core;
951 
952 	if (unlikely(core->board.tuner_type == UNSET))
953 		return -EINVAL;
954 	if (f->tuner)
955 		return -EINVAL;
956 
957 	f->frequency = core->freq;
958 
959 	call_all(core, tuner, g_frequency, f);
960 
961 	return 0;
962 }
963 
964 int cx88_set_freq(struct cx88_core  *core,
965 		  const struct v4l2_frequency *f)
966 {
967 	struct v4l2_frequency new_freq = *f;
968 
969 	if (unlikely(core->board.tuner_type == UNSET))
970 		return -EINVAL;
971 	if (unlikely(f->tuner != 0))
972 		return -EINVAL;
973 
974 	cx88_newstation(core);
975 	call_all(core, tuner, s_frequency, f);
976 	call_all(core, tuner, g_frequency, &new_freq);
977 	core->freq = new_freq.frequency;
978 
979 	/* When changing channels it is required to reset TVAUDIO */
980 	usleep_range(10000, 20000);
981 	cx88_set_tvaudio(core);
982 
983 	return 0;
984 }
985 EXPORT_SYMBOL(cx88_set_freq);
986 
987 static int vidioc_s_frequency(struct file *file, void *priv,
988 			      const struct v4l2_frequency *f)
989 {
990 	struct cx8800_dev *dev = video_drvdata(file);
991 	struct cx88_core *core = dev->core;
992 
993 	return cx88_set_freq(core, f);
994 }
995 
996 #ifdef CONFIG_VIDEO_ADV_DEBUG
997 static int vidioc_g_register(struct file *file, void *fh,
998 			     struct v4l2_dbg_register *reg)
999 {
1000 	struct cx8800_dev *dev = video_drvdata(file);
1001 	struct cx88_core *core = dev->core;
1002 
1003 	/* cx2388x has a 24-bit register space */
1004 	reg->val = cx_read(reg->reg & 0xfffffc);
1005 	reg->size = 4;
1006 	return 0;
1007 }
1008 
1009 static int vidioc_s_register(struct file *file, void *fh,
1010 			     const struct v4l2_dbg_register *reg)
1011 {
1012 	struct cx8800_dev *dev = video_drvdata(file);
1013 	struct cx88_core *core = dev->core;
1014 
1015 	cx_write(reg->reg & 0xfffffc, reg->val);
1016 	return 0;
1017 }
1018 #endif
1019 
1020 /* ----------------------------------------------------------- */
1021 /* RADIO ESPECIFIC IOCTLS                                      */
1022 /* ----------------------------------------------------------- */
1023 
1024 static int radio_g_tuner(struct file *file, void *priv,
1025 			 struct v4l2_tuner *t)
1026 {
1027 	struct cx8800_dev *dev = video_drvdata(file);
1028 	struct cx88_core *core = dev->core;
1029 
1030 	if (unlikely(t->index > 0))
1031 		return -EINVAL;
1032 
1033 	strscpy(t->name, "Radio", sizeof(t->name));
1034 
1035 	call_all(core, tuner, g_tuner, t);
1036 	return 0;
1037 }
1038 
1039 static int radio_s_tuner(struct file *file, void *priv,
1040 			 const struct v4l2_tuner *t)
1041 {
1042 	struct cx8800_dev *dev = video_drvdata(file);
1043 	struct cx88_core *core = dev->core;
1044 
1045 	if (t->index != 0)
1046 		return -EINVAL;
1047 
1048 	call_all(core, tuner, s_tuner, t);
1049 	return 0;
1050 }
1051 
1052 /* ----------------------------------------------------------- */
1053 
1054 static const char *cx88_vid_irqs[32] = {
1055 	"y_risci1", "u_risci1", "v_risci1", "vbi_risc1",
1056 	"y_risci2", "u_risci2", "v_risci2", "vbi_risc2",
1057 	"y_oflow",  "u_oflow",  "v_oflow",  "vbi_oflow",
1058 	"y_sync",   "u_sync",   "v_sync",   "vbi_sync",
1059 	"opc_err",  "par_err",  "rip_err",  "pci_abort",
1060 };
1061 
1062 static void cx8800_vid_irq(struct cx8800_dev *dev)
1063 {
1064 	struct cx88_core *core = dev->core;
1065 	u32 status, mask, count;
1066 
1067 	status = cx_read(MO_VID_INTSTAT);
1068 	mask   = cx_read(MO_VID_INTMSK);
1069 	if (0 == (status & mask))
1070 		return;
1071 	cx_write(MO_VID_INTSTAT, status);
1072 	if (irq_debug  ||  (status & mask & ~0xff))
1073 		cx88_print_irqbits("irq vid",
1074 				   cx88_vid_irqs, ARRAY_SIZE(cx88_vid_irqs),
1075 				   status, mask);
1076 
1077 	/* risc op code error */
1078 	if (status & (1 << 16)) {
1079 		pr_warn("video risc op code error\n");
1080 		cx_clear(MO_VID_DMACNTRL, 0x11);
1081 		cx_clear(VID_CAPTURE_CONTROL, 0x06);
1082 		cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
1083 	}
1084 
1085 	/* risc1 y */
1086 	if (status & 0x01) {
1087 		spin_lock(&dev->slock);
1088 		count = cx_read(MO_VIDY_GPCNT);
1089 		cx88_wakeup(core, &dev->vidq, count);
1090 		spin_unlock(&dev->slock);
1091 	}
1092 
1093 	/* risc1 vbi */
1094 	if (status & 0x08) {
1095 		spin_lock(&dev->slock);
1096 		count = cx_read(MO_VBI_GPCNT);
1097 		cx88_wakeup(core, &dev->vbiq, count);
1098 		spin_unlock(&dev->slock);
1099 	}
1100 }
1101 
1102 static irqreturn_t cx8800_irq(int irq, void *dev_id)
1103 {
1104 	struct cx8800_dev *dev = dev_id;
1105 	struct cx88_core *core = dev->core;
1106 	u32 status;
1107 	int loop, handled = 0;
1108 
1109 	for (loop = 0; loop < 10; loop++) {
1110 		status = cx_read(MO_PCI_INTSTAT) &
1111 			(core->pci_irqmask | PCI_INT_VIDINT);
1112 		if (status == 0)
1113 			goto out;
1114 		cx_write(MO_PCI_INTSTAT, status);
1115 		handled = 1;
1116 
1117 		if (status & core->pci_irqmask)
1118 			cx88_core_irq(core, status);
1119 		if (status & PCI_INT_VIDINT)
1120 			cx8800_vid_irq(dev);
1121 	}
1122 	if (loop == 10) {
1123 		pr_warn("irq loop -- clearing mask\n");
1124 		cx_write(MO_PCI_INTMSK, 0);
1125 	}
1126 
1127  out:
1128 	return IRQ_RETVAL(handled);
1129 }
1130 
1131 /* ----------------------------------------------------------- */
1132 /* exported stuff                                              */
1133 
1134 static const struct v4l2_file_operations video_fops = {
1135 	.owner	       = THIS_MODULE,
1136 	.open	       = v4l2_fh_open,
1137 	.release       = vb2_fop_release,
1138 	.read	       = vb2_fop_read,
1139 	.poll          = vb2_fop_poll,
1140 	.mmap	       = vb2_fop_mmap,
1141 	.unlocked_ioctl = video_ioctl2,
1142 };
1143 
1144 static const struct v4l2_ioctl_ops video_ioctl_ops = {
1145 	.vidioc_querycap      = vidioc_querycap,
1146 	.vidioc_enum_fmt_vid_cap  = vidioc_enum_fmt_vid_cap,
1147 	.vidioc_g_fmt_vid_cap     = vidioc_g_fmt_vid_cap,
1148 	.vidioc_try_fmt_vid_cap   = vidioc_try_fmt_vid_cap,
1149 	.vidioc_s_fmt_vid_cap     = vidioc_s_fmt_vid_cap,
1150 	.vidioc_reqbufs       = vb2_ioctl_reqbufs,
1151 	.vidioc_querybuf      = vb2_ioctl_querybuf,
1152 	.vidioc_qbuf          = vb2_ioctl_qbuf,
1153 	.vidioc_dqbuf         = vb2_ioctl_dqbuf,
1154 	.vidioc_g_std         = vidioc_g_std,
1155 	.vidioc_s_std         = vidioc_s_std,
1156 	.vidioc_enum_input    = vidioc_enum_input,
1157 	.vidioc_g_input       = vidioc_g_input,
1158 	.vidioc_s_input       = vidioc_s_input,
1159 	.vidioc_streamon      = vb2_ioctl_streamon,
1160 	.vidioc_streamoff     = vb2_ioctl_streamoff,
1161 	.vidioc_g_tuner       = vidioc_g_tuner,
1162 	.vidioc_s_tuner       = vidioc_s_tuner,
1163 	.vidioc_g_frequency   = vidioc_g_frequency,
1164 	.vidioc_s_frequency   = vidioc_s_frequency,
1165 	.vidioc_subscribe_event      = v4l2_ctrl_subscribe_event,
1166 	.vidioc_unsubscribe_event    = v4l2_event_unsubscribe,
1167 #ifdef CONFIG_VIDEO_ADV_DEBUG
1168 	.vidioc_g_register    = vidioc_g_register,
1169 	.vidioc_s_register    = vidioc_s_register,
1170 #endif
1171 };
1172 
1173 static const struct video_device cx8800_video_template = {
1174 	.name                 = "cx8800-video",
1175 	.fops                 = &video_fops,
1176 	.ioctl_ops	      = &video_ioctl_ops,
1177 	.tvnorms              = CX88_NORMS,
1178 };
1179 
1180 static const struct v4l2_ioctl_ops vbi_ioctl_ops = {
1181 	.vidioc_querycap      = vidioc_querycap,
1182 	.vidioc_g_fmt_vbi_cap     = cx8800_vbi_fmt,
1183 	.vidioc_try_fmt_vbi_cap   = cx8800_vbi_fmt,
1184 	.vidioc_s_fmt_vbi_cap     = cx8800_vbi_fmt,
1185 	.vidioc_reqbufs       = vb2_ioctl_reqbufs,
1186 	.vidioc_querybuf      = vb2_ioctl_querybuf,
1187 	.vidioc_qbuf          = vb2_ioctl_qbuf,
1188 	.vidioc_dqbuf         = vb2_ioctl_dqbuf,
1189 	.vidioc_g_std         = vidioc_g_std,
1190 	.vidioc_s_std         = vidioc_s_std,
1191 	.vidioc_enum_input    = vidioc_enum_input,
1192 	.vidioc_g_input       = vidioc_g_input,
1193 	.vidioc_s_input       = vidioc_s_input,
1194 	.vidioc_streamon      = vb2_ioctl_streamon,
1195 	.vidioc_streamoff     = vb2_ioctl_streamoff,
1196 	.vidioc_g_tuner       = vidioc_g_tuner,
1197 	.vidioc_s_tuner       = vidioc_s_tuner,
1198 	.vidioc_g_frequency   = vidioc_g_frequency,
1199 	.vidioc_s_frequency   = vidioc_s_frequency,
1200 #ifdef CONFIG_VIDEO_ADV_DEBUG
1201 	.vidioc_g_register    = vidioc_g_register,
1202 	.vidioc_s_register    = vidioc_s_register,
1203 #endif
1204 };
1205 
1206 static const struct video_device cx8800_vbi_template = {
1207 	.name                 = "cx8800-vbi",
1208 	.fops                 = &video_fops,
1209 	.ioctl_ops	      = &vbi_ioctl_ops,
1210 	.tvnorms              = CX88_NORMS,
1211 };
1212 
1213 static const struct v4l2_file_operations radio_fops = {
1214 	.owner         = THIS_MODULE,
1215 	.open          = radio_open,
1216 	.poll          = v4l2_ctrl_poll,
1217 	.release       = v4l2_fh_release,
1218 	.unlocked_ioctl = video_ioctl2,
1219 };
1220 
1221 static const struct v4l2_ioctl_ops radio_ioctl_ops = {
1222 	.vidioc_querycap      = vidioc_querycap,
1223 	.vidioc_g_tuner       = radio_g_tuner,
1224 	.vidioc_s_tuner       = radio_s_tuner,
1225 	.vidioc_g_frequency   = vidioc_g_frequency,
1226 	.vidioc_s_frequency   = vidioc_s_frequency,
1227 	.vidioc_subscribe_event      = v4l2_ctrl_subscribe_event,
1228 	.vidioc_unsubscribe_event    = v4l2_event_unsubscribe,
1229 #ifdef CONFIG_VIDEO_ADV_DEBUG
1230 	.vidioc_g_register    = vidioc_g_register,
1231 	.vidioc_s_register    = vidioc_s_register,
1232 #endif
1233 };
1234 
1235 static const struct video_device cx8800_radio_template = {
1236 	.name                 = "cx8800-radio",
1237 	.fops                 = &radio_fops,
1238 	.ioctl_ops	      = &radio_ioctl_ops,
1239 };
1240 
1241 static const struct v4l2_ctrl_ops cx8800_ctrl_vid_ops = {
1242 	.s_ctrl = cx8800_s_vid_ctrl,
1243 };
1244 
1245 static const struct v4l2_ctrl_ops cx8800_ctrl_aud_ops = {
1246 	.s_ctrl = cx8800_s_aud_ctrl,
1247 };
1248 
1249 /* ----------------------------------------------------------- */
1250 
1251 static void cx8800_unregister_video(struct cx8800_dev *dev)
1252 {
1253 	video_unregister_device(&dev->radio_dev);
1254 	video_unregister_device(&dev->vbi_dev);
1255 	video_unregister_device(&dev->video_dev);
1256 }
1257 
1258 static int cx8800_initdev(struct pci_dev *pci_dev,
1259 			  const struct pci_device_id *pci_id)
1260 {
1261 	struct cx8800_dev *dev;
1262 	struct cx88_core *core;
1263 	struct vb2_queue *q;
1264 	int err;
1265 	int i;
1266 
1267 	dev = kzalloc(sizeof(*dev), GFP_KERNEL);
1268 	if (!dev)
1269 		return -ENOMEM;
1270 
1271 	/* pci init */
1272 	dev->pci = pci_dev;
1273 	if (pci_enable_device(pci_dev)) {
1274 		err = -EIO;
1275 		goto fail_free;
1276 	}
1277 	core = cx88_core_get(dev->pci);
1278 	if (!core) {
1279 		err = -EINVAL;
1280 		goto fail_free;
1281 	}
1282 	dev->core = core;
1283 
1284 	/* print pci info */
1285 	dev->pci_rev = pci_dev->revision;
1286 	pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER,  &dev->pci_lat);
1287 	pr_info("found at %s, rev: %d, irq: %d, latency: %d, mmio: 0x%llx\n",
1288 		pci_name(pci_dev), dev->pci_rev, pci_dev->irq,
1289 		dev->pci_lat,
1290 		(unsigned long long)pci_resource_start(pci_dev, 0));
1291 
1292 	pci_set_master(pci_dev);
1293 	err = pci_set_dma_mask(pci_dev, DMA_BIT_MASK(32));
1294 	if (err) {
1295 		pr_err("Oops: no 32bit PCI DMA ???\n");
1296 		goto fail_core;
1297 	}
1298 
1299 	/* initialize driver struct */
1300 	spin_lock_init(&dev->slock);
1301 
1302 	/* init video dma queues */
1303 	INIT_LIST_HEAD(&dev->vidq.active);
1304 
1305 	/* init vbi dma queues */
1306 	INIT_LIST_HEAD(&dev->vbiq.active);
1307 
1308 	/* get irq */
1309 	err = request_irq(pci_dev->irq, cx8800_irq,
1310 			  IRQF_SHARED, core->name, dev);
1311 	if (err < 0) {
1312 		pr_err("can't get IRQ %d\n", pci_dev->irq);
1313 		goto fail_core;
1314 	}
1315 	cx_set(MO_PCI_INTMSK, core->pci_irqmask);
1316 
1317 	for (i = 0; i < CX8800_AUD_CTLS; i++) {
1318 		const struct cx88_ctrl *cc = &cx8800_aud_ctls[i];
1319 		struct v4l2_ctrl *vc;
1320 
1321 		vc = v4l2_ctrl_new_std(&core->audio_hdl, &cx8800_ctrl_aud_ops,
1322 				       cc->id, cc->minimum, cc->maximum,
1323 				       cc->step, cc->default_value);
1324 		if (!vc) {
1325 			err = core->audio_hdl.error;
1326 			goto fail_core;
1327 		}
1328 		vc->priv = (void *)cc;
1329 	}
1330 
1331 	for (i = 0; i < CX8800_VID_CTLS; i++) {
1332 		const struct cx88_ctrl *cc = &cx8800_vid_ctls[i];
1333 		struct v4l2_ctrl *vc;
1334 
1335 		vc = v4l2_ctrl_new_std(&core->video_hdl, &cx8800_ctrl_vid_ops,
1336 				       cc->id, cc->minimum, cc->maximum,
1337 				       cc->step, cc->default_value);
1338 		if (!vc) {
1339 			err = core->video_hdl.error;
1340 			goto fail_core;
1341 		}
1342 		vc->priv = (void *)cc;
1343 		if (vc->id == V4L2_CID_CHROMA_AGC)
1344 			core->chroma_agc = vc;
1345 	}
1346 	v4l2_ctrl_add_handler(&core->video_hdl, &core->audio_hdl, NULL, false);
1347 
1348 	/* load and configure helper modules */
1349 
1350 	if (core->board.audio_chip == CX88_AUDIO_WM8775) {
1351 		struct i2c_board_info wm8775_info = {
1352 			.type = "wm8775",
1353 			.addr = 0x36 >> 1,
1354 			.platform_data = &core->wm8775_data,
1355 		};
1356 		struct v4l2_subdev *sd;
1357 
1358 		if (core->boardnr == CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1)
1359 			core->wm8775_data.is_nova_s = true;
1360 		else
1361 			core->wm8775_data.is_nova_s = false;
1362 
1363 		sd = v4l2_i2c_new_subdev_board(&core->v4l2_dev, &core->i2c_adap,
1364 					       &wm8775_info, NULL);
1365 		if (sd) {
1366 			core->sd_wm8775 = sd;
1367 			sd->grp_id = WM8775_GID;
1368 		}
1369 	}
1370 
1371 	if (core->board.audio_chip == CX88_AUDIO_TVAUDIO) {
1372 		/*
1373 		 * This probes for a tda9874 as is used on some
1374 		 * Pixelview Ultra boards.
1375 		 */
1376 		v4l2_i2c_new_subdev(&core->v4l2_dev, &core->i2c_adap,
1377 				    "tvaudio", 0, I2C_ADDRS(0xb0 >> 1));
1378 	}
1379 
1380 	switch (core->boardnr) {
1381 	case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
1382 	case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD: {
1383 		static const struct i2c_board_info rtc_info = {
1384 			I2C_BOARD_INFO("isl1208", 0x6f)
1385 		};
1386 
1387 		request_module("rtc-isl1208");
1388 		core->i2c_rtc = i2c_new_device(&core->i2c_adap, &rtc_info);
1389 	}
1390 		/* fall-through */
1391 	case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
1392 		request_module("ir-kbd-i2c");
1393 	}
1394 
1395 	/* Sets device info at pci_dev */
1396 	pci_set_drvdata(pci_dev, dev);
1397 
1398 	dev->fmt = format_by_fourcc(V4L2_PIX_FMT_BGR24);
1399 
1400 	/* Maintain a reference so cx88-blackbird can query the 8800 device. */
1401 	core->v4ldev = dev;
1402 
1403 	/* initial device configuration */
1404 	mutex_lock(&core->lock);
1405 	cx88_set_tvnorm(core, V4L2_STD_NTSC_M);
1406 	v4l2_ctrl_handler_setup(&core->video_hdl);
1407 	v4l2_ctrl_handler_setup(&core->audio_hdl);
1408 	cx88_video_mux(core, 0);
1409 
1410 	q = &dev->vb2_vidq;
1411 	q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1412 	q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ;
1413 	q->gfp_flags = GFP_DMA32;
1414 	q->min_buffers_needed = 2;
1415 	q->drv_priv = dev;
1416 	q->buf_struct_size = sizeof(struct cx88_buffer);
1417 	q->ops = &cx8800_video_qops;
1418 	q->mem_ops = &vb2_dma_sg_memops;
1419 	q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1420 	q->lock = &core->lock;
1421 	q->dev = &dev->pci->dev;
1422 
1423 	err = vb2_queue_init(q);
1424 	if (err < 0)
1425 		goto fail_unreg;
1426 
1427 	q = &dev->vb2_vbiq;
1428 	q->type = V4L2_BUF_TYPE_VBI_CAPTURE;
1429 	q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ;
1430 	q->gfp_flags = GFP_DMA32;
1431 	q->min_buffers_needed = 2;
1432 	q->drv_priv = dev;
1433 	q->buf_struct_size = sizeof(struct cx88_buffer);
1434 	q->ops = &cx8800_vbi_qops;
1435 	q->mem_ops = &vb2_dma_sg_memops;
1436 	q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1437 	q->lock = &core->lock;
1438 	q->dev = &dev->pci->dev;
1439 
1440 	err = vb2_queue_init(q);
1441 	if (err < 0)
1442 		goto fail_unreg;
1443 
1444 	/* register v4l devices */
1445 	cx88_vdev_init(core, dev->pci, &dev->video_dev,
1446 		       &cx8800_video_template, "video");
1447 	video_set_drvdata(&dev->video_dev, dev);
1448 	dev->video_dev.ctrl_handler = &core->video_hdl;
1449 	dev->video_dev.queue = &dev->vb2_vidq;
1450 	dev->video_dev.device_caps = V4L2_CAP_READWRITE | V4L2_CAP_STREAMING |
1451 				     V4L2_CAP_VIDEO_CAPTURE;
1452 	if (core->board.tuner_type != UNSET)
1453 		dev->video_dev.device_caps |= V4L2_CAP_TUNER;
1454 	err = video_register_device(&dev->video_dev, VFL_TYPE_GRABBER,
1455 				    video_nr[core->nr]);
1456 	if (err < 0) {
1457 		pr_err("can't register video device\n");
1458 		goto fail_unreg;
1459 	}
1460 	pr_info("registered device %s [v4l2]\n",
1461 		video_device_node_name(&dev->video_dev));
1462 
1463 	cx88_vdev_init(core, dev->pci, &dev->vbi_dev,
1464 		       &cx8800_vbi_template, "vbi");
1465 	video_set_drvdata(&dev->vbi_dev, dev);
1466 	dev->vbi_dev.queue = &dev->vb2_vbiq;
1467 	dev->vbi_dev.device_caps = V4L2_CAP_READWRITE | V4L2_CAP_STREAMING |
1468 				   V4L2_CAP_VBI_CAPTURE;
1469 	if (core->board.tuner_type != UNSET)
1470 		dev->vbi_dev.device_caps |= V4L2_CAP_TUNER;
1471 	err = video_register_device(&dev->vbi_dev, VFL_TYPE_VBI,
1472 				    vbi_nr[core->nr]);
1473 	if (err < 0) {
1474 		pr_err("can't register vbi device\n");
1475 		goto fail_unreg;
1476 	}
1477 	pr_info("registered device %s\n",
1478 		video_device_node_name(&dev->vbi_dev));
1479 
1480 	if (core->board.radio.type == CX88_RADIO) {
1481 		cx88_vdev_init(core, dev->pci, &dev->radio_dev,
1482 			       &cx8800_radio_template, "radio");
1483 		video_set_drvdata(&dev->radio_dev, dev);
1484 		dev->radio_dev.ctrl_handler = &core->audio_hdl;
1485 		dev->radio_dev.device_caps = V4L2_CAP_RADIO | V4L2_CAP_TUNER;
1486 		err = video_register_device(&dev->radio_dev, VFL_TYPE_RADIO,
1487 					    radio_nr[core->nr]);
1488 		if (err < 0) {
1489 			pr_err("can't register radio device\n");
1490 			goto fail_unreg;
1491 		}
1492 		pr_info("registered device %s\n",
1493 			video_device_node_name(&dev->radio_dev));
1494 	}
1495 
1496 	/* start tvaudio thread */
1497 	if (core->board.tuner_type != UNSET) {
1498 		core->kthread = kthread_run(cx88_audio_thread,
1499 					    core, "cx88 tvaudio");
1500 		if (IS_ERR(core->kthread)) {
1501 			err = PTR_ERR(core->kthread);
1502 			pr_err("failed to create cx88 audio thread, err=%d\n",
1503 			       err);
1504 		}
1505 	}
1506 	mutex_unlock(&core->lock);
1507 
1508 	return 0;
1509 
1510 fail_unreg:
1511 	cx8800_unregister_video(dev);
1512 	free_irq(pci_dev->irq, dev);
1513 	mutex_unlock(&core->lock);
1514 fail_core:
1515 	core->v4ldev = NULL;
1516 	cx88_core_put(core, dev->pci);
1517 fail_free:
1518 	kfree(dev);
1519 	return err;
1520 }
1521 
1522 static void cx8800_finidev(struct pci_dev *pci_dev)
1523 {
1524 	struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
1525 	struct cx88_core *core = dev->core;
1526 
1527 	/* stop thread */
1528 	if (core->kthread) {
1529 		kthread_stop(core->kthread);
1530 		core->kthread = NULL;
1531 	}
1532 
1533 	if (core->ir)
1534 		cx88_ir_stop(core);
1535 
1536 	cx88_shutdown(core); /* FIXME */
1537 
1538 	/* unregister stuff */
1539 
1540 	free_irq(pci_dev->irq, dev);
1541 	cx8800_unregister_video(dev);
1542 	pci_disable_device(pci_dev);
1543 
1544 	core->v4ldev = NULL;
1545 
1546 	/* free memory */
1547 	cx88_core_put(core, dev->pci);
1548 	kfree(dev);
1549 }
1550 
1551 #ifdef CONFIG_PM
1552 static int cx8800_suspend(struct pci_dev *pci_dev, pm_message_t state)
1553 {
1554 	struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
1555 	struct cx88_core *core = dev->core;
1556 	unsigned long flags;
1557 
1558 	/* stop video+vbi capture */
1559 	spin_lock_irqsave(&dev->slock, flags);
1560 	if (!list_empty(&dev->vidq.active)) {
1561 		pr_info("suspend video\n");
1562 		stop_video_dma(dev);
1563 	}
1564 	if (!list_empty(&dev->vbiq.active)) {
1565 		pr_info("suspend vbi\n");
1566 		cx8800_stop_vbi_dma(dev);
1567 	}
1568 	spin_unlock_irqrestore(&dev->slock, flags);
1569 
1570 	if (core->ir)
1571 		cx88_ir_stop(core);
1572 	/* FIXME -- shutdown device */
1573 	cx88_shutdown(core);
1574 
1575 	pci_save_state(pci_dev);
1576 	if (pci_set_power_state(pci_dev,
1577 				pci_choose_state(pci_dev, state)) != 0) {
1578 		pci_disable_device(pci_dev);
1579 		dev->state.disabled = 1;
1580 	}
1581 	return 0;
1582 }
1583 
1584 static int cx8800_resume(struct pci_dev *pci_dev)
1585 {
1586 	struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
1587 	struct cx88_core *core = dev->core;
1588 	unsigned long flags;
1589 	int err;
1590 
1591 	if (dev->state.disabled) {
1592 		err = pci_enable_device(pci_dev);
1593 		if (err) {
1594 			pr_err("can't enable device\n");
1595 			return err;
1596 		}
1597 
1598 		dev->state.disabled = 0;
1599 	}
1600 	err = pci_set_power_state(pci_dev, PCI_D0);
1601 	if (err) {
1602 		pr_err("can't set power state\n");
1603 		pci_disable_device(pci_dev);
1604 		dev->state.disabled = 1;
1605 
1606 		return err;
1607 	}
1608 	pci_restore_state(pci_dev);
1609 
1610 	/* FIXME: re-initialize hardware */
1611 	cx88_reset(core);
1612 	if (core->ir)
1613 		cx88_ir_start(core);
1614 
1615 	cx_set(MO_PCI_INTMSK, core->pci_irqmask);
1616 
1617 	/* restart video+vbi capture */
1618 	spin_lock_irqsave(&dev->slock, flags);
1619 	if (!list_empty(&dev->vidq.active)) {
1620 		pr_info("resume video\n");
1621 		restart_video_queue(dev, &dev->vidq);
1622 	}
1623 	if (!list_empty(&dev->vbiq.active)) {
1624 		pr_info("resume vbi\n");
1625 		cx8800_restart_vbi_queue(dev, &dev->vbiq);
1626 	}
1627 	spin_unlock_irqrestore(&dev->slock, flags);
1628 
1629 	return 0;
1630 }
1631 #endif
1632 
1633 /* ----------------------------------------------------------- */
1634 
1635 static const struct pci_device_id cx8800_pci_tbl[] = {
1636 	{
1637 		.vendor       = 0x14f1,
1638 		.device       = 0x8800,
1639 		.subvendor    = PCI_ANY_ID,
1640 		.subdevice    = PCI_ANY_ID,
1641 	}, {
1642 		/* --- end of list --- */
1643 	}
1644 };
1645 MODULE_DEVICE_TABLE(pci, cx8800_pci_tbl);
1646 
1647 static struct pci_driver cx8800_pci_driver = {
1648 	.name     = "cx8800",
1649 	.id_table = cx8800_pci_tbl,
1650 	.probe    = cx8800_initdev,
1651 	.remove   = cx8800_finidev,
1652 #ifdef CONFIG_PM
1653 	.suspend  = cx8800_suspend,
1654 	.resume   = cx8800_resume,
1655 #endif
1656 };
1657 
1658 module_pci_driver(cx8800_pci_driver);
1659