1 /* 2 * 3 * device driver for Conexant 2388x based TV cards 4 * MPEG Transport Stream (DVB) routines 5 * 6 * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au> 7 * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs] 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 22 */ 23 24 #include <linux/module.h> 25 #include <linux/init.h> 26 #include <linux/device.h> 27 #include <linux/fs.h> 28 #include <linux/kthread.h> 29 #include <linux/file.h> 30 #include <linux/suspend.h> 31 32 #include "cx88.h" 33 #include "dvb-pll.h" 34 #include <media/v4l2-common.h> 35 36 #include "mt352.h" 37 #include "mt352_priv.h" 38 #include "cx88-vp3054-i2c.h" 39 #include "zl10353.h" 40 #include "cx22702.h" 41 #include "or51132.h" 42 #include "lgdt330x.h" 43 #include "s5h1409.h" 44 #include "xc4000.h" 45 #include "xc5000.h" 46 #include "nxt200x.h" 47 #include "cx24123.h" 48 #include "isl6421.h" 49 #include "tuner-simple.h" 50 #include "tda9887.h" 51 #include "s5h1411.h" 52 #include "stv0299.h" 53 #include "z0194a.h" 54 #include "stv0288.h" 55 #include "stb6000.h" 56 #include "cx24116.h" 57 #include "stv0900.h" 58 #include "stb6100.h" 59 #include "stb6100_proc.h" 60 #include "mb86a16.h" 61 #include "ts2020.h" 62 #include "ds3000.h" 63 64 MODULE_DESCRIPTION("driver for cx2388x based DVB cards"); 65 MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>"); 66 MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]"); 67 MODULE_LICENSE("GPL"); 68 MODULE_VERSION(CX88_VERSION); 69 70 static unsigned int debug; 71 module_param(debug, int, 0644); 72 MODULE_PARM_DESC(debug,"enable debug messages [dvb]"); 73 74 static unsigned int dvb_buf_tscnt = 32; 75 module_param(dvb_buf_tscnt, int, 0644); 76 MODULE_PARM_DESC(dvb_buf_tscnt, "DVB Buffer TS count [dvb]"); 77 78 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr); 79 80 #define dprintk(level,fmt, arg...) if (debug >= level) \ 81 printk(KERN_DEBUG "%s/2-dvb: " fmt, core->name, ## arg) 82 83 /* ------------------------------------------------------------------ */ 84 85 static int queue_setup(struct vb2_queue *q, 86 unsigned int *num_buffers, unsigned int *num_planes, 87 unsigned int sizes[], struct device *alloc_devs[]) 88 { 89 struct cx8802_dev *dev = q->drv_priv; 90 91 *num_planes = 1; 92 dev->ts_packet_size = 188 * 4; 93 dev->ts_packet_count = dvb_buf_tscnt; 94 sizes[0] = dev->ts_packet_size * dev->ts_packet_count; 95 *num_buffers = dvb_buf_tscnt; 96 return 0; 97 } 98 99 static int buffer_prepare(struct vb2_buffer *vb) 100 { 101 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); 102 struct cx8802_dev *dev = vb->vb2_queue->drv_priv; 103 struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb); 104 105 return cx8802_buf_prepare(vb->vb2_queue, dev, buf); 106 } 107 108 static void buffer_finish(struct vb2_buffer *vb) 109 { 110 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); 111 struct cx8802_dev *dev = vb->vb2_queue->drv_priv; 112 struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb); 113 struct cx88_riscmem *risc = &buf->risc; 114 115 if (risc->cpu) 116 pci_free_consistent(dev->pci, risc->size, risc->cpu, risc->dma); 117 memset(risc, 0, sizeof(*risc)); 118 } 119 120 static void buffer_queue(struct vb2_buffer *vb) 121 { 122 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); 123 struct cx8802_dev *dev = vb->vb2_queue->drv_priv; 124 struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb); 125 126 cx8802_buf_queue(dev, buf); 127 } 128 129 static int start_streaming(struct vb2_queue *q, unsigned int count) 130 { 131 struct cx8802_dev *dev = q->drv_priv; 132 struct cx88_dmaqueue *dmaq = &dev->mpegq; 133 struct cx88_buffer *buf; 134 135 buf = list_entry(dmaq->active.next, struct cx88_buffer, list); 136 cx8802_start_dma(dev, dmaq, buf); 137 return 0; 138 } 139 140 static void stop_streaming(struct vb2_queue *q) 141 { 142 struct cx8802_dev *dev = q->drv_priv; 143 struct cx88_dmaqueue *dmaq = &dev->mpegq; 144 unsigned long flags; 145 146 cx8802_cancel_buffers(dev); 147 148 spin_lock_irqsave(&dev->slock, flags); 149 while (!list_empty(&dmaq->active)) { 150 struct cx88_buffer *buf = list_entry(dmaq->active.next, 151 struct cx88_buffer, list); 152 153 list_del(&buf->list); 154 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR); 155 } 156 spin_unlock_irqrestore(&dev->slock, flags); 157 } 158 159 static const struct vb2_ops dvb_qops = { 160 .queue_setup = queue_setup, 161 .buf_prepare = buffer_prepare, 162 .buf_finish = buffer_finish, 163 .buf_queue = buffer_queue, 164 .wait_prepare = vb2_ops_wait_prepare, 165 .wait_finish = vb2_ops_wait_finish, 166 .start_streaming = start_streaming, 167 .stop_streaming = stop_streaming, 168 }; 169 170 /* ------------------------------------------------------------------ */ 171 172 static int cx88_dvb_bus_ctrl(struct dvb_frontend* fe, int acquire) 173 { 174 struct cx8802_dev *dev= fe->dvb->priv; 175 struct cx8802_driver *drv = NULL; 176 int ret = 0; 177 int fe_id; 178 179 fe_id = vb2_dvb_find_frontend(&dev->frontends, fe); 180 if (!fe_id) { 181 printk(KERN_ERR "%s() No frontend found\n", __func__); 182 return -EINVAL; 183 } 184 185 mutex_lock(&dev->core->lock); 186 drv = cx8802_get_driver(dev, CX88_MPEG_DVB); 187 if (drv) { 188 if (acquire){ 189 dev->frontends.active_fe_id = fe_id; 190 ret = drv->request_acquire(drv); 191 } else { 192 ret = drv->request_release(drv); 193 dev->frontends.active_fe_id = 0; 194 } 195 } 196 mutex_unlock(&dev->core->lock); 197 198 return ret; 199 } 200 201 static void cx88_dvb_gate_ctrl(struct cx88_core *core, int open) 202 { 203 struct vb2_dvb_frontends *f; 204 struct vb2_dvb_frontend *fe; 205 206 if (!core->dvbdev) 207 return; 208 209 f = &core->dvbdev->frontends; 210 211 if (!f) 212 return; 213 214 if (f->gate <= 1) /* undefined or fe0 */ 215 fe = vb2_dvb_get_frontend(f, 1); 216 else 217 fe = vb2_dvb_get_frontend(f, f->gate); 218 219 if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl) 220 fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open); 221 } 222 223 /* ------------------------------------------------------------------ */ 224 225 static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe) 226 { 227 static const u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 }; 228 static const u8 reset [] = { RESET, 0x80 }; 229 static const u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 }; 230 static const u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 }; 231 static const u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 }; 232 static const u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 }; 233 234 mt352_write(fe, clock_config, sizeof(clock_config)); 235 udelay(200); 236 mt352_write(fe, reset, sizeof(reset)); 237 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg)); 238 239 mt352_write(fe, agc_cfg, sizeof(agc_cfg)); 240 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg)); 241 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg)); 242 return 0; 243 } 244 245 static int dvico_dual_demod_init(struct dvb_frontend *fe) 246 { 247 static const u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 }; 248 static const u8 reset [] = { RESET, 0x80 }; 249 static const u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 }; 250 static const u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 }; 251 static const u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 }; 252 static const u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 }; 253 254 mt352_write(fe, clock_config, sizeof(clock_config)); 255 udelay(200); 256 mt352_write(fe, reset, sizeof(reset)); 257 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg)); 258 259 mt352_write(fe, agc_cfg, sizeof(agc_cfg)); 260 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg)); 261 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg)); 262 263 return 0; 264 } 265 266 static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe) 267 { 268 static const u8 clock_config [] = { 0x89, 0x38, 0x39 }; 269 static const u8 reset [] = { 0x50, 0x80 }; 270 static const u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 }; 271 static const u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF, 272 0x00, 0xFF, 0x00, 0x40, 0x40 }; 273 static const u8 dntv_extra[] = { 0xB5, 0x7A }; 274 static const u8 capt_range_cfg[] = { 0x75, 0x32 }; 275 276 mt352_write(fe, clock_config, sizeof(clock_config)); 277 udelay(2000); 278 mt352_write(fe, reset, sizeof(reset)); 279 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg)); 280 281 mt352_write(fe, agc_cfg, sizeof(agc_cfg)); 282 udelay(2000); 283 mt352_write(fe, dntv_extra, sizeof(dntv_extra)); 284 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg)); 285 286 return 0; 287 } 288 289 static const struct mt352_config dvico_fusionhdtv = { 290 .demod_address = 0x0f, 291 .demod_init = dvico_fusionhdtv_demod_init, 292 }; 293 294 static const struct mt352_config dntv_live_dvbt_config = { 295 .demod_address = 0x0f, 296 .demod_init = dntv_live_dvbt_demod_init, 297 }; 298 299 static const struct mt352_config dvico_fusionhdtv_dual = { 300 .demod_address = 0x0f, 301 .demod_init = dvico_dual_demod_init, 302 }; 303 304 static const struct zl10353_config cx88_terratec_cinergy_ht_pci_mkii_config = { 305 .demod_address = (0x1e >> 1), 306 .no_tuner = 1, 307 .if2 = 45600, 308 }; 309 310 static struct mb86a16_config twinhan_vp1027 = { 311 .demod_address = 0x08, 312 }; 313 314 #if IS_ENABLED(CONFIG_VIDEO_CX88_VP3054) 315 static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe) 316 { 317 static const u8 clock_config [] = { 0x89, 0x38, 0x38 }; 318 static const u8 reset [] = { 0x50, 0x80 }; 319 static const u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 }; 320 static const u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF, 321 0x00, 0xFF, 0x00, 0x40, 0x40 }; 322 static const u8 dntv_extra[] = { 0xB5, 0x7A }; 323 static const u8 capt_range_cfg[] = { 0x75, 0x32 }; 324 325 mt352_write(fe, clock_config, sizeof(clock_config)); 326 udelay(2000); 327 mt352_write(fe, reset, sizeof(reset)); 328 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg)); 329 330 mt352_write(fe, agc_cfg, sizeof(agc_cfg)); 331 udelay(2000); 332 mt352_write(fe, dntv_extra, sizeof(dntv_extra)); 333 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg)); 334 335 return 0; 336 } 337 338 static const struct mt352_config dntv_live_dvbt_pro_config = { 339 .demod_address = 0x0f, 340 .no_tuner = 1, 341 .demod_init = dntv_live_dvbt_pro_demod_init, 342 }; 343 #endif 344 345 static const struct zl10353_config dvico_fusionhdtv_hybrid = { 346 .demod_address = 0x0f, 347 .no_tuner = 1, 348 }; 349 350 static const struct zl10353_config dvico_fusionhdtv_xc3028 = { 351 .demod_address = 0x0f, 352 .if2 = 45600, 353 .no_tuner = 1, 354 }; 355 356 static const struct mt352_config dvico_fusionhdtv_mt352_xc3028 = { 357 .demod_address = 0x0f, 358 .if2 = 4560, 359 .no_tuner = 1, 360 .demod_init = dvico_fusionhdtv_demod_init, 361 }; 362 363 static const struct zl10353_config dvico_fusionhdtv_plus_v1_1 = { 364 .demod_address = 0x0f, 365 }; 366 367 static const struct cx22702_config connexant_refboard_config = { 368 .demod_address = 0x43, 369 .output_mode = CX22702_SERIAL_OUTPUT, 370 }; 371 372 static const struct cx22702_config hauppauge_hvr_config = { 373 .demod_address = 0x63, 374 .output_mode = CX22702_SERIAL_OUTPUT, 375 }; 376 377 static int or51132_set_ts_param(struct dvb_frontend* fe, int is_punctured) 378 { 379 struct cx8802_dev *dev= fe->dvb->priv; 380 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00; 381 return 0; 382 } 383 384 static const struct or51132_config pchdtv_hd3000 = { 385 .demod_address = 0x15, 386 .set_ts_params = or51132_set_ts_param, 387 }; 388 389 static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index) 390 { 391 struct cx8802_dev *dev= fe->dvb->priv; 392 struct cx88_core *core = dev->core; 393 394 dprintk(1, "%s: index = %d\n", __func__, index); 395 if (index == 0) 396 cx_clear(MO_GP0_IO, 8); 397 else 398 cx_set(MO_GP0_IO, 8); 399 return 0; 400 } 401 402 static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured) 403 { 404 struct cx8802_dev *dev= fe->dvb->priv; 405 if (is_punctured) 406 dev->ts_gen_cntrl |= 0x04; 407 else 408 dev->ts_gen_cntrl &= ~0x04; 409 return 0; 410 } 411 412 static struct lgdt330x_config fusionhdtv_3_gold = { 413 .demod_address = 0x0e, 414 .demod_chip = LGDT3302, 415 .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */ 416 .set_ts_params = lgdt330x_set_ts_param, 417 }; 418 419 static const struct lgdt330x_config fusionhdtv_5_gold = { 420 .demod_address = 0x0e, 421 .demod_chip = LGDT3303, 422 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */ 423 .set_ts_params = lgdt330x_set_ts_param, 424 }; 425 426 static const struct lgdt330x_config pchdtv_hd5500 = { 427 .demod_address = 0x59, 428 .demod_chip = LGDT3303, 429 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */ 430 .set_ts_params = lgdt330x_set_ts_param, 431 }; 432 433 static int nxt200x_set_ts_param(struct dvb_frontend* fe, int is_punctured) 434 { 435 struct cx8802_dev *dev= fe->dvb->priv; 436 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00; 437 return 0; 438 } 439 440 static const struct nxt200x_config ati_hdtvwonder = { 441 .demod_address = 0x0a, 442 .set_ts_params = nxt200x_set_ts_param, 443 }; 444 445 static int cx24123_set_ts_param(struct dvb_frontend* fe, 446 int is_punctured) 447 { 448 struct cx8802_dev *dev= fe->dvb->priv; 449 dev->ts_gen_cntrl = 0x02; 450 return 0; 451 } 452 453 static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe, 454 enum fe_sec_voltage voltage) 455 { 456 struct cx8802_dev *dev= fe->dvb->priv; 457 struct cx88_core *core = dev->core; 458 459 if (voltage == SEC_VOLTAGE_OFF) 460 cx_write(MO_GP0_IO, 0x000006fb); 461 else 462 cx_write(MO_GP0_IO, 0x000006f9); 463 464 if (core->prev_set_voltage) 465 return core->prev_set_voltage(fe, voltage); 466 return 0; 467 } 468 469 static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe, 470 enum fe_sec_voltage voltage) 471 { 472 struct cx8802_dev *dev= fe->dvb->priv; 473 struct cx88_core *core = dev->core; 474 475 if (voltage == SEC_VOLTAGE_OFF) { 476 dprintk(1,"LNB Voltage OFF\n"); 477 cx_write(MO_GP0_IO, 0x0000efff); 478 } 479 480 if (core->prev_set_voltage) 481 return core->prev_set_voltage(fe, voltage); 482 return 0; 483 } 484 485 static int tevii_dvbs_set_voltage(struct dvb_frontend *fe, 486 enum fe_sec_voltage voltage) 487 { 488 struct cx8802_dev *dev= fe->dvb->priv; 489 struct cx88_core *core = dev->core; 490 491 cx_set(MO_GP0_IO, 0x6040); 492 switch (voltage) { 493 case SEC_VOLTAGE_13: 494 cx_clear(MO_GP0_IO, 0x20); 495 break; 496 case SEC_VOLTAGE_18: 497 cx_set(MO_GP0_IO, 0x20); 498 break; 499 case SEC_VOLTAGE_OFF: 500 cx_clear(MO_GP0_IO, 0x20); 501 break; 502 } 503 504 if (core->prev_set_voltage) 505 return core->prev_set_voltage(fe, voltage); 506 return 0; 507 } 508 509 static int vp1027_set_voltage(struct dvb_frontend *fe, 510 enum fe_sec_voltage voltage) 511 { 512 struct cx8802_dev *dev = fe->dvb->priv; 513 struct cx88_core *core = dev->core; 514 515 switch (voltage) { 516 case SEC_VOLTAGE_13: 517 dprintk(1, "LNB SEC Voltage=13\n"); 518 cx_write(MO_GP0_IO, 0x00001220); 519 break; 520 case SEC_VOLTAGE_18: 521 dprintk(1, "LNB SEC Voltage=18\n"); 522 cx_write(MO_GP0_IO, 0x00001222); 523 break; 524 case SEC_VOLTAGE_OFF: 525 dprintk(1, "LNB Voltage OFF\n"); 526 cx_write(MO_GP0_IO, 0x00001230); 527 break; 528 } 529 530 if (core->prev_set_voltage) 531 return core->prev_set_voltage(fe, voltage); 532 return 0; 533 } 534 535 static const struct cx24123_config geniatech_dvbs_config = { 536 .demod_address = 0x55, 537 .set_ts_params = cx24123_set_ts_param, 538 }; 539 540 static const struct cx24123_config hauppauge_novas_config = { 541 .demod_address = 0x55, 542 .set_ts_params = cx24123_set_ts_param, 543 }; 544 545 static const struct cx24123_config kworld_dvbs_100_config = { 546 .demod_address = 0x15, 547 .set_ts_params = cx24123_set_ts_param, 548 .lnb_polarity = 1, 549 }; 550 551 static const struct s5h1409_config pinnacle_pctv_hd_800i_config = { 552 .demod_address = 0x32 >> 1, 553 .output_mode = S5H1409_PARALLEL_OUTPUT, 554 .gpio = S5H1409_GPIO_ON, 555 .qam_if = 44000, 556 .inversion = S5H1409_INVERSION_OFF, 557 .status_mode = S5H1409_DEMODLOCKING, 558 .mpeg_timing = S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK, 559 }; 560 561 static const struct s5h1409_config dvico_hdtv5_pci_nano_config = { 562 .demod_address = 0x32 >> 1, 563 .output_mode = S5H1409_SERIAL_OUTPUT, 564 .gpio = S5H1409_GPIO_OFF, 565 .inversion = S5H1409_INVERSION_OFF, 566 .status_mode = S5H1409_DEMODLOCKING, 567 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, 568 }; 569 570 static const struct s5h1409_config kworld_atsc_120_config = { 571 .demod_address = 0x32 >> 1, 572 .output_mode = S5H1409_SERIAL_OUTPUT, 573 .gpio = S5H1409_GPIO_OFF, 574 .inversion = S5H1409_INVERSION_OFF, 575 .status_mode = S5H1409_DEMODLOCKING, 576 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, 577 }; 578 579 static const struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = { 580 .i2c_address = 0x64, 581 .if_khz = 5380, 582 }; 583 584 static const struct zl10353_config cx88_pinnacle_hybrid_pctv = { 585 .demod_address = (0x1e >> 1), 586 .no_tuner = 1, 587 .if2 = 45600, 588 }; 589 590 static const struct zl10353_config cx88_geniatech_x8000_mt = { 591 .demod_address = (0x1e >> 1), 592 .no_tuner = 1, 593 .disable_i2c_gate_ctrl = 1, 594 }; 595 596 static const struct s5h1411_config dvico_fusionhdtv7_config = { 597 .output_mode = S5H1411_SERIAL_OUTPUT, 598 .gpio = S5H1411_GPIO_ON, 599 .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, 600 .qam_if = S5H1411_IF_44000, 601 .vsb_if = S5H1411_IF_44000, 602 .inversion = S5H1411_INVERSION_OFF, 603 .status_mode = S5H1411_DEMODLOCKING 604 }; 605 606 static const struct xc5000_config dvico_fusionhdtv7_tuner_config = { 607 .i2c_address = 0xc2 >> 1, 608 .if_khz = 5380, 609 }; 610 611 static int attach_xc3028(u8 addr, struct cx8802_dev *dev) 612 { 613 struct dvb_frontend *fe; 614 struct vb2_dvb_frontend *fe0 = NULL; 615 struct xc2028_ctrl ctl; 616 struct xc2028_config cfg = { 617 .i2c_adap = &dev->core->i2c_adap, 618 .i2c_addr = addr, 619 .ctrl = &ctl, 620 }; 621 622 /* Get the first frontend */ 623 fe0 = vb2_dvb_get_frontend(&dev->frontends, 1); 624 if (!fe0) 625 return -EINVAL; 626 627 if (!fe0->dvb.frontend) { 628 printk(KERN_ERR "%s/2: dvb frontend not attached. " 629 "Can't attach xc3028\n", 630 dev->core->name); 631 return -EINVAL; 632 } 633 634 /* 635 * Some xc3028 devices may be hidden by an I2C gate. This is known 636 * to happen with some s5h1409-based devices. 637 * Now that I2C gate is open, sets up xc3028 configuration 638 */ 639 cx88_setup_xc3028(dev->core, &ctl); 640 641 fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, &cfg); 642 if (!fe) { 643 printk(KERN_ERR "%s/2: xc3028 attach failed\n", 644 dev->core->name); 645 dvb_frontend_detach(fe0->dvb.frontend); 646 dvb_unregister_frontend(fe0->dvb.frontend); 647 fe0->dvb.frontend = NULL; 648 return -EINVAL; 649 } 650 651 printk(KERN_INFO "%s/2: xc3028 attached\n", 652 dev->core->name); 653 654 return 0; 655 } 656 657 static int attach_xc4000(struct cx8802_dev *dev, struct xc4000_config *cfg) 658 { 659 struct dvb_frontend *fe; 660 struct vb2_dvb_frontend *fe0 = NULL; 661 662 /* Get the first frontend */ 663 fe0 = vb2_dvb_get_frontend(&dev->frontends, 1); 664 if (!fe0) 665 return -EINVAL; 666 667 if (!fe0->dvb.frontend) { 668 printk(KERN_ERR "%s/2: dvb frontend not attached. " 669 "Can't attach xc4000\n", 670 dev->core->name); 671 return -EINVAL; 672 } 673 674 fe = dvb_attach(xc4000_attach, fe0->dvb.frontend, &dev->core->i2c_adap, 675 cfg); 676 if (!fe) { 677 printk(KERN_ERR "%s/2: xc4000 attach failed\n", 678 dev->core->name); 679 dvb_frontend_detach(fe0->dvb.frontend); 680 dvb_unregister_frontend(fe0->dvb.frontend); 681 fe0->dvb.frontend = NULL; 682 return -EINVAL; 683 } 684 685 printk(KERN_INFO "%s/2: xc4000 attached\n", dev->core->name); 686 687 return 0; 688 } 689 690 static int cx24116_set_ts_param(struct dvb_frontend *fe, 691 int is_punctured) 692 { 693 struct cx8802_dev *dev = fe->dvb->priv; 694 dev->ts_gen_cntrl = 0x2; 695 696 return 0; 697 } 698 699 static int stv0900_set_ts_param(struct dvb_frontend *fe, 700 int is_punctured) 701 { 702 struct cx8802_dev *dev = fe->dvb->priv; 703 dev->ts_gen_cntrl = 0; 704 705 return 0; 706 } 707 708 static int cx24116_reset_device(struct dvb_frontend *fe) 709 { 710 struct cx8802_dev *dev = fe->dvb->priv; 711 struct cx88_core *core = dev->core; 712 713 /* Reset the part */ 714 /* Put the cx24116 into reset */ 715 cx_write(MO_SRST_IO, 0); 716 msleep(10); 717 /* Take the cx24116 out of reset */ 718 cx_write(MO_SRST_IO, 1); 719 msleep(10); 720 721 return 0; 722 } 723 724 static const struct cx24116_config hauppauge_hvr4000_config = { 725 .demod_address = 0x05, 726 .set_ts_params = cx24116_set_ts_param, 727 .reset_device = cx24116_reset_device, 728 }; 729 730 static const struct cx24116_config tevii_s460_config = { 731 .demod_address = 0x55, 732 .set_ts_params = cx24116_set_ts_param, 733 .reset_device = cx24116_reset_device, 734 }; 735 736 static int ds3000_set_ts_param(struct dvb_frontend *fe, 737 int is_punctured) 738 { 739 struct cx8802_dev *dev = fe->dvb->priv; 740 dev->ts_gen_cntrl = 4; 741 742 return 0; 743 } 744 745 static struct ds3000_config tevii_ds3000_config = { 746 .demod_address = 0x68, 747 .set_ts_params = ds3000_set_ts_param, 748 }; 749 750 static struct ts2020_config tevii_ts2020_config = { 751 .tuner_address = 0x60, 752 .clk_out_div = 1, 753 }; 754 755 static const struct stv0900_config prof_7301_stv0900_config = { 756 .demod_address = 0x6a, 757 /* demod_mode = 0,*/ 758 .xtal = 27000000, 759 .clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */ 760 .diseqc_mode = 2,/* 2/3 PWM */ 761 .tun1_maddress = 0,/* 0x60 */ 762 .tun1_adc = 0,/* 2 Vpp */ 763 .path1_mode = 3, 764 .set_ts_params = stv0900_set_ts_param, 765 }; 766 767 static const struct stb6100_config prof_7301_stb6100_config = { 768 .tuner_address = 0x60, 769 .refclock = 27000000, 770 }; 771 772 static const struct stv0299_config tevii_tuner_sharp_config = { 773 .demod_address = 0x68, 774 .inittab = sharp_z0194a_inittab, 775 .mclk = 88000000UL, 776 .invert = 1, 777 .skip_reinit = 0, 778 .lock_output = 1, 779 .volt13_op0_op1 = STV0299_VOLT13_OP1, 780 .min_delay_ms = 100, 781 .set_symbol_rate = sharp_z0194a_set_symbol_rate, 782 .set_ts_params = cx24116_set_ts_param, 783 }; 784 785 static const struct stv0288_config tevii_tuner_earda_config = { 786 .demod_address = 0x68, 787 .min_delay_ms = 100, 788 .set_ts_params = cx24116_set_ts_param, 789 }; 790 791 static int cx8802_alloc_frontends(struct cx8802_dev *dev) 792 { 793 struct cx88_core *core = dev->core; 794 struct vb2_dvb_frontend *fe = NULL; 795 int i; 796 797 mutex_init(&dev->frontends.lock); 798 INIT_LIST_HEAD(&dev->frontends.felist); 799 800 if (!core->board.num_frontends) 801 return -ENODEV; 802 803 printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__, 804 core->board.num_frontends); 805 for (i = 1; i <= core->board.num_frontends; i++) { 806 fe = vb2_dvb_alloc_frontend(&dev->frontends, i); 807 if (!fe) { 808 printk(KERN_ERR "%s() failed to alloc\n", __func__); 809 vb2_dvb_dealloc_frontends(&dev->frontends); 810 return -ENOMEM; 811 } 812 } 813 return 0; 814 } 815 816 817 818 static const u8 samsung_smt_7020_inittab[] = { 819 0x01, 0x15, 820 0x02, 0x00, 821 0x03, 0x00, 822 0x04, 0x7D, 823 0x05, 0x0F, 824 0x06, 0x02, 825 0x07, 0x00, 826 0x08, 0x60, 827 828 0x0A, 0xC2, 829 0x0B, 0x00, 830 0x0C, 0x01, 831 0x0D, 0x81, 832 0x0E, 0x44, 833 0x0F, 0x09, 834 0x10, 0x3C, 835 0x11, 0x84, 836 0x12, 0xDA, 837 0x13, 0x99, 838 0x14, 0x8D, 839 0x15, 0xCE, 840 0x16, 0xE8, 841 0x17, 0x43, 842 0x18, 0x1C, 843 0x19, 0x1B, 844 0x1A, 0x1D, 845 846 0x1C, 0x12, 847 0x1D, 0x00, 848 0x1E, 0x00, 849 0x1F, 0x00, 850 0x20, 0x00, 851 0x21, 0x00, 852 0x22, 0x00, 853 0x23, 0x00, 854 855 0x28, 0x02, 856 0x29, 0x28, 857 0x2A, 0x14, 858 0x2B, 0x0F, 859 0x2C, 0x09, 860 0x2D, 0x05, 861 862 0x31, 0x1F, 863 0x32, 0x19, 864 0x33, 0xFC, 865 0x34, 0x13, 866 0xff, 0xff, 867 }; 868 869 870 static int samsung_smt_7020_tuner_set_params(struct dvb_frontend *fe) 871 { 872 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 873 struct cx8802_dev *dev = fe->dvb->priv; 874 u8 buf[4]; 875 u32 div; 876 struct i2c_msg msg = { 877 .addr = 0x61, 878 .flags = 0, 879 .buf = buf, 880 .len = sizeof(buf) }; 881 882 div = c->frequency / 125; 883 884 buf[0] = (div >> 8) & 0x7f; 885 buf[1] = div & 0xff; 886 buf[2] = 0x84; /* 0xC4 */ 887 buf[3] = 0x00; 888 889 if (c->frequency < 1500000) 890 buf[3] |= 0x10; 891 892 if (fe->ops.i2c_gate_ctrl) 893 fe->ops.i2c_gate_ctrl(fe, 1); 894 895 if (i2c_transfer(&dev->core->i2c_adap, &msg, 1) != 1) 896 return -EIO; 897 898 return 0; 899 } 900 901 static int samsung_smt_7020_set_tone(struct dvb_frontend *fe, 902 enum fe_sec_tone_mode tone) 903 { 904 struct cx8802_dev *dev = fe->dvb->priv; 905 struct cx88_core *core = dev->core; 906 907 cx_set(MO_GP0_IO, 0x0800); 908 909 switch (tone) { 910 case SEC_TONE_ON: 911 cx_set(MO_GP0_IO, 0x08); 912 break; 913 case SEC_TONE_OFF: 914 cx_clear(MO_GP0_IO, 0x08); 915 break; 916 default: 917 return -EINVAL; 918 } 919 920 return 0; 921 } 922 923 static int samsung_smt_7020_set_voltage(struct dvb_frontend *fe, 924 enum fe_sec_voltage voltage) 925 { 926 struct cx8802_dev *dev = fe->dvb->priv; 927 struct cx88_core *core = dev->core; 928 929 u8 data; 930 struct i2c_msg msg = { 931 .addr = 8, 932 .flags = 0, 933 .buf = &data, 934 .len = sizeof(data) }; 935 936 cx_set(MO_GP0_IO, 0x8000); 937 938 switch (voltage) { 939 case SEC_VOLTAGE_OFF: 940 break; 941 case SEC_VOLTAGE_13: 942 data = ISL6421_EN1 | ISL6421_LLC1; 943 cx_clear(MO_GP0_IO, 0x80); 944 break; 945 case SEC_VOLTAGE_18: 946 data = ISL6421_EN1 | ISL6421_LLC1 | ISL6421_VSEL1; 947 cx_clear(MO_GP0_IO, 0x80); 948 break; 949 default: 950 return -EINVAL; 951 } 952 953 return (i2c_transfer(&dev->core->i2c_adap, &msg, 1) == 1) ? 0 : -EIO; 954 } 955 956 static int samsung_smt_7020_stv0299_set_symbol_rate(struct dvb_frontend *fe, 957 u32 srate, u32 ratio) 958 { 959 u8 aclk = 0; 960 u8 bclk = 0; 961 962 if (srate < 1500000) { 963 aclk = 0xb7; 964 bclk = 0x47; 965 } else if (srate < 3000000) { 966 aclk = 0xb7; 967 bclk = 0x4b; 968 } else if (srate < 7000000) { 969 aclk = 0xb7; 970 bclk = 0x4f; 971 } else if (srate < 14000000) { 972 aclk = 0xb7; 973 bclk = 0x53; 974 } else if (srate < 30000000) { 975 aclk = 0xb6; 976 bclk = 0x53; 977 } else if (srate < 45000000) { 978 aclk = 0xb4; 979 bclk = 0x51; 980 } 981 982 stv0299_writereg(fe, 0x13, aclk); 983 stv0299_writereg(fe, 0x14, bclk); 984 stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff); 985 stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff); 986 stv0299_writereg(fe, 0x21, ratio & 0xf0); 987 988 return 0; 989 } 990 991 992 static const struct stv0299_config samsung_stv0299_config = { 993 .demod_address = 0x68, 994 .inittab = samsung_smt_7020_inittab, 995 .mclk = 88000000UL, 996 .invert = 0, 997 .skip_reinit = 0, 998 .lock_output = STV0299_LOCKOUTPUT_LK, 999 .volt13_op0_op1 = STV0299_VOLT13_OP1, 1000 .min_delay_ms = 100, 1001 .set_symbol_rate = samsung_smt_7020_stv0299_set_symbol_rate, 1002 }; 1003 1004 static int dvb_register(struct cx8802_dev *dev) 1005 { 1006 struct cx88_core *core = dev->core; 1007 struct vb2_dvb_frontend *fe0, *fe1 = NULL; 1008 int mfe_shared = 0; /* bus not shared by default */ 1009 int res = -EINVAL; 1010 1011 if (0 != core->i2c_rc) { 1012 printk(KERN_ERR "%s/2: no i2c-bus available, cannot attach dvb drivers\n", core->name); 1013 goto frontend_detach; 1014 } 1015 1016 /* Get the first frontend */ 1017 fe0 = vb2_dvb_get_frontend(&dev->frontends, 1); 1018 if (!fe0) 1019 goto frontend_detach; 1020 1021 /* multi-frontend gate control is undefined or defaults to fe0 */ 1022 dev->frontends.gate = 0; 1023 1024 /* Sets the gate control callback to be used by i2c command calls */ 1025 core->gate_ctrl = cx88_dvb_gate_ctrl; 1026 1027 /* init frontend(s) */ 1028 switch (core->boardnr) { 1029 case CX88_BOARD_HAUPPAUGE_DVB_T1: 1030 fe0->dvb.frontend = dvb_attach(cx22702_attach, 1031 &connexant_refboard_config, 1032 &core->i2c_adap); 1033 if (fe0->dvb.frontend != NULL) { 1034 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 1035 0x61, &core->i2c_adap, 1036 DVB_PLL_THOMSON_DTT759X)) 1037 goto frontend_detach; 1038 } 1039 break; 1040 case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1: 1041 case CX88_BOARD_CONEXANT_DVB_T1: 1042 case CX88_BOARD_KWORLD_DVB_T_CX22702: 1043 case CX88_BOARD_WINFAST_DTV1000: 1044 fe0->dvb.frontend = dvb_attach(cx22702_attach, 1045 &connexant_refboard_config, 1046 &core->i2c_adap); 1047 if (fe0->dvb.frontend != NULL) { 1048 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 1049 0x60, &core->i2c_adap, 1050 DVB_PLL_THOMSON_DTT7579)) 1051 goto frontend_detach; 1052 } 1053 break; 1054 case CX88_BOARD_WINFAST_DTV2000H: 1055 case CX88_BOARD_HAUPPAUGE_HVR1100: 1056 case CX88_BOARD_HAUPPAUGE_HVR1100LP: 1057 case CX88_BOARD_HAUPPAUGE_HVR1300: 1058 fe0->dvb.frontend = dvb_attach(cx22702_attach, 1059 &hauppauge_hvr_config, 1060 &core->i2c_adap); 1061 if (fe0->dvb.frontend != NULL) { 1062 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend, 1063 &core->i2c_adap, 0x61, 1064 TUNER_PHILIPS_FMD1216ME_MK3)) 1065 goto frontend_detach; 1066 } 1067 break; 1068 case CX88_BOARD_WINFAST_DTV2000H_J: 1069 fe0->dvb.frontend = dvb_attach(cx22702_attach, 1070 &hauppauge_hvr_config, 1071 &core->i2c_adap); 1072 if (fe0->dvb.frontend != NULL) { 1073 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend, 1074 &core->i2c_adap, 0x61, 1075 TUNER_PHILIPS_FMD1216MEX_MK3)) 1076 goto frontend_detach; 1077 } 1078 break; 1079 case CX88_BOARD_HAUPPAUGE_HVR3000: 1080 /* MFE frontend 1 */ 1081 mfe_shared = 1; 1082 dev->frontends.gate = 2; 1083 /* DVB-S init */ 1084 fe0->dvb.frontend = dvb_attach(cx24123_attach, 1085 &hauppauge_novas_config, 1086 &dev->core->i2c_adap); 1087 if (fe0->dvb.frontend) { 1088 if (!dvb_attach(isl6421_attach, 1089 fe0->dvb.frontend, 1090 &dev->core->i2c_adap, 1091 0x08, ISL6421_DCL, 0x00, false)) 1092 goto frontend_detach; 1093 } 1094 /* MFE frontend 2 */ 1095 fe1 = vb2_dvb_get_frontend(&dev->frontends, 2); 1096 if (!fe1) 1097 goto frontend_detach; 1098 /* DVB-T init */ 1099 fe1->dvb.frontend = dvb_attach(cx22702_attach, 1100 &hauppauge_hvr_config, 1101 &dev->core->i2c_adap); 1102 if (fe1->dvb.frontend) { 1103 fe1->dvb.frontend->id = 1; 1104 if (!dvb_attach(simple_tuner_attach, 1105 fe1->dvb.frontend, 1106 &dev->core->i2c_adap, 1107 0x61, TUNER_PHILIPS_FMD1216ME_MK3)) 1108 goto frontend_detach; 1109 } 1110 break; 1111 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS: 1112 fe0->dvb.frontend = dvb_attach(mt352_attach, 1113 &dvico_fusionhdtv, 1114 &core->i2c_adap); 1115 if (fe0->dvb.frontend != NULL) { 1116 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 1117 0x60, NULL, DVB_PLL_THOMSON_DTT7579)) 1118 goto frontend_detach; 1119 break; 1120 } 1121 /* ZL10353 replaces MT352 on later cards */ 1122 fe0->dvb.frontend = dvb_attach(zl10353_attach, 1123 &dvico_fusionhdtv_plus_v1_1, 1124 &core->i2c_adap); 1125 if (fe0->dvb.frontend != NULL) { 1126 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 1127 0x60, NULL, DVB_PLL_THOMSON_DTT7579)) 1128 goto frontend_detach; 1129 } 1130 break; 1131 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL: 1132 /* The tin box says DEE1601, but it seems to be DTT7579 1133 * compatible, with a slightly different MT352 AGC gain. */ 1134 fe0->dvb.frontend = dvb_attach(mt352_attach, 1135 &dvico_fusionhdtv_dual, 1136 &core->i2c_adap); 1137 if (fe0->dvb.frontend != NULL) { 1138 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 1139 0x61, NULL, DVB_PLL_THOMSON_DTT7579)) 1140 goto frontend_detach; 1141 break; 1142 } 1143 /* ZL10353 replaces MT352 on later cards */ 1144 fe0->dvb.frontend = dvb_attach(zl10353_attach, 1145 &dvico_fusionhdtv_plus_v1_1, 1146 &core->i2c_adap); 1147 if (fe0->dvb.frontend != NULL) { 1148 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 1149 0x61, NULL, DVB_PLL_THOMSON_DTT7579)) 1150 goto frontend_detach; 1151 } 1152 break; 1153 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1: 1154 fe0->dvb.frontend = dvb_attach(mt352_attach, 1155 &dvico_fusionhdtv, 1156 &core->i2c_adap); 1157 if (fe0->dvb.frontend != NULL) { 1158 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 1159 0x61, NULL, DVB_PLL_LG_Z201)) 1160 goto frontend_detach; 1161 } 1162 break; 1163 case CX88_BOARD_KWORLD_DVB_T: 1164 case CX88_BOARD_DNTV_LIVE_DVB_T: 1165 case CX88_BOARD_ADSTECH_DVB_T_PCI: 1166 fe0->dvb.frontend = dvb_attach(mt352_attach, 1167 &dntv_live_dvbt_config, 1168 &core->i2c_adap); 1169 if (fe0->dvb.frontend != NULL) { 1170 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 1171 0x61, NULL, DVB_PLL_UNKNOWN_1)) 1172 goto frontend_detach; 1173 } 1174 break; 1175 case CX88_BOARD_DNTV_LIVE_DVB_T_PRO: 1176 #if IS_ENABLED(CONFIG_VIDEO_CX88_VP3054) 1177 /* MT352 is on a secondary I2C bus made from some GPIO lines */ 1178 fe0->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config, 1179 &dev->vp3054->adap); 1180 if (fe0->dvb.frontend != NULL) { 1181 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend, 1182 &core->i2c_adap, 0x61, 1183 TUNER_PHILIPS_FMD1216ME_MK3)) 1184 goto frontend_detach; 1185 } 1186 #else 1187 printk(KERN_ERR "%s/2: built without vp3054 support\n", 1188 core->name); 1189 #endif 1190 break; 1191 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID: 1192 fe0->dvb.frontend = dvb_attach(zl10353_attach, 1193 &dvico_fusionhdtv_hybrid, 1194 &core->i2c_adap); 1195 if (fe0->dvb.frontend != NULL) { 1196 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend, 1197 &core->i2c_adap, 0x61, 1198 TUNER_THOMSON_FE6600)) 1199 goto frontend_detach; 1200 } 1201 break; 1202 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO: 1203 fe0->dvb.frontend = dvb_attach(zl10353_attach, 1204 &dvico_fusionhdtv_xc3028, 1205 &core->i2c_adap); 1206 if (fe0->dvb.frontend == NULL) 1207 fe0->dvb.frontend = dvb_attach(mt352_attach, 1208 &dvico_fusionhdtv_mt352_xc3028, 1209 &core->i2c_adap); 1210 /* 1211 * On this board, the demod provides the I2C bus pullup. 1212 * We must not permit gate_ctrl to be performed, or 1213 * the xc3028 cannot communicate on the bus. 1214 */ 1215 if (fe0->dvb.frontend) 1216 fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL; 1217 if (attach_xc3028(0x61, dev) < 0) 1218 goto frontend_detach; 1219 break; 1220 case CX88_BOARD_PCHDTV_HD3000: 1221 fe0->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000, 1222 &core->i2c_adap); 1223 if (fe0->dvb.frontend != NULL) { 1224 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend, 1225 &core->i2c_adap, 0x61, 1226 TUNER_THOMSON_DTT761X)) 1227 goto frontend_detach; 1228 } 1229 break; 1230 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q: 1231 dev->ts_gen_cntrl = 0x08; 1232 1233 /* Do a hardware reset of chip before using it. */ 1234 cx_clear(MO_GP0_IO, 1); 1235 mdelay(100); 1236 cx_set(MO_GP0_IO, 1); 1237 mdelay(200); 1238 1239 /* Select RF connector callback */ 1240 fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set; 1241 fe0->dvb.frontend = dvb_attach(lgdt330x_attach, 1242 &fusionhdtv_3_gold, 1243 &core->i2c_adap); 1244 if (fe0->dvb.frontend != NULL) { 1245 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend, 1246 &core->i2c_adap, 0x61, 1247 TUNER_MICROTUNE_4042FI5)) 1248 goto frontend_detach; 1249 } 1250 break; 1251 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T: 1252 dev->ts_gen_cntrl = 0x08; 1253 1254 /* Do a hardware reset of chip before using it. */ 1255 cx_clear(MO_GP0_IO, 1); 1256 mdelay(100); 1257 cx_set(MO_GP0_IO, 9); 1258 mdelay(200); 1259 fe0->dvb.frontend = dvb_attach(lgdt330x_attach, 1260 &fusionhdtv_3_gold, 1261 &core->i2c_adap); 1262 if (fe0->dvb.frontend != NULL) { 1263 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend, 1264 &core->i2c_adap, 0x61, 1265 TUNER_THOMSON_DTT761X)) 1266 goto frontend_detach; 1267 } 1268 break; 1269 case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD: 1270 dev->ts_gen_cntrl = 0x08; 1271 1272 /* Do a hardware reset of chip before using it. */ 1273 cx_clear(MO_GP0_IO, 1); 1274 mdelay(100); 1275 cx_set(MO_GP0_IO, 1); 1276 mdelay(200); 1277 fe0->dvb.frontend = dvb_attach(lgdt330x_attach, 1278 &fusionhdtv_5_gold, 1279 &core->i2c_adap); 1280 if (fe0->dvb.frontend != NULL) { 1281 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend, 1282 &core->i2c_adap, 0x61, 1283 TUNER_LG_TDVS_H06XF)) 1284 goto frontend_detach; 1285 if (!dvb_attach(tda9887_attach, fe0->dvb.frontend, 1286 &core->i2c_adap, 0x43)) 1287 goto frontend_detach; 1288 } 1289 break; 1290 case CX88_BOARD_PCHDTV_HD5500: 1291 dev->ts_gen_cntrl = 0x08; 1292 1293 /* Do a hardware reset of chip before using it. */ 1294 cx_clear(MO_GP0_IO, 1); 1295 mdelay(100); 1296 cx_set(MO_GP0_IO, 1); 1297 mdelay(200); 1298 fe0->dvb.frontend = dvb_attach(lgdt330x_attach, 1299 &pchdtv_hd5500, 1300 &core->i2c_adap); 1301 if (fe0->dvb.frontend != NULL) { 1302 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend, 1303 &core->i2c_adap, 0x61, 1304 TUNER_LG_TDVS_H06XF)) 1305 goto frontend_detach; 1306 if (!dvb_attach(tda9887_attach, fe0->dvb.frontend, 1307 &core->i2c_adap, 0x43)) 1308 goto frontend_detach; 1309 } 1310 break; 1311 case CX88_BOARD_ATI_HDTVWONDER: 1312 fe0->dvb.frontend = dvb_attach(nxt200x_attach, 1313 &ati_hdtvwonder, 1314 &core->i2c_adap); 1315 if (fe0->dvb.frontend != NULL) { 1316 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend, 1317 &core->i2c_adap, 0x61, 1318 TUNER_PHILIPS_TUV1236D)) 1319 goto frontend_detach; 1320 } 1321 break; 1322 case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1: 1323 case CX88_BOARD_HAUPPAUGE_NOVASE2_S1: 1324 fe0->dvb.frontend = dvb_attach(cx24123_attach, 1325 &hauppauge_novas_config, 1326 &core->i2c_adap); 1327 if (fe0->dvb.frontend) { 1328 bool override_tone; 1329 1330 if (core->model == 92001) 1331 override_tone = true; 1332 else 1333 override_tone = false; 1334 1335 if (!dvb_attach(isl6421_attach, fe0->dvb.frontend, 1336 &core->i2c_adap, 0x08, ISL6421_DCL, 0x00, 1337 override_tone)) 1338 goto frontend_detach; 1339 } 1340 break; 1341 case CX88_BOARD_KWORLD_DVBS_100: 1342 fe0->dvb.frontend = dvb_attach(cx24123_attach, 1343 &kworld_dvbs_100_config, 1344 &core->i2c_adap); 1345 if (fe0->dvb.frontend) { 1346 core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage; 1347 fe0->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage; 1348 } 1349 break; 1350 case CX88_BOARD_GENIATECH_DVBS: 1351 fe0->dvb.frontend = dvb_attach(cx24123_attach, 1352 &geniatech_dvbs_config, 1353 &core->i2c_adap); 1354 if (fe0->dvb.frontend) { 1355 core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage; 1356 fe0->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage; 1357 } 1358 break; 1359 case CX88_BOARD_PINNACLE_PCTV_HD_800i: 1360 fe0->dvb.frontend = dvb_attach(s5h1409_attach, 1361 &pinnacle_pctv_hd_800i_config, 1362 &core->i2c_adap); 1363 if (fe0->dvb.frontend != NULL) { 1364 if (!dvb_attach(xc5000_attach, fe0->dvb.frontend, 1365 &core->i2c_adap, 1366 &pinnacle_pctv_hd_800i_tuner_config)) 1367 goto frontend_detach; 1368 } 1369 break; 1370 case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO: 1371 fe0->dvb.frontend = dvb_attach(s5h1409_attach, 1372 &dvico_hdtv5_pci_nano_config, 1373 &core->i2c_adap); 1374 if (fe0->dvb.frontend != NULL) { 1375 struct dvb_frontend *fe; 1376 struct xc2028_config cfg = { 1377 .i2c_adap = &core->i2c_adap, 1378 .i2c_addr = 0x61, 1379 }; 1380 static struct xc2028_ctrl ctl = { 1381 .fname = XC2028_DEFAULT_FIRMWARE, 1382 .max_len = 64, 1383 .scode_table = XC3028_FE_OREN538, 1384 }; 1385 1386 fe = dvb_attach(xc2028_attach, 1387 fe0->dvb.frontend, &cfg); 1388 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL) 1389 fe->ops.tuner_ops.set_config(fe, &ctl); 1390 } 1391 break; 1392 case CX88_BOARD_PINNACLE_HYBRID_PCTV: 1393 case CX88_BOARD_WINFAST_DTV1800H: 1394 fe0->dvb.frontend = dvb_attach(zl10353_attach, 1395 &cx88_pinnacle_hybrid_pctv, 1396 &core->i2c_adap); 1397 if (fe0->dvb.frontend) { 1398 fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL; 1399 if (attach_xc3028(0x61, dev) < 0) 1400 goto frontend_detach; 1401 } 1402 break; 1403 case CX88_BOARD_WINFAST_DTV1800H_XC4000: 1404 case CX88_BOARD_WINFAST_DTV2000H_PLUS: 1405 fe0->dvb.frontend = dvb_attach(zl10353_attach, 1406 &cx88_pinnacle_hybrid_pctv, 1407 &core->i2c_adap); 1408 if (fe0->dvb.frontend) { 1409 struct xc4000_config cfg = { 1410 .i2c_address = 0x61, 1411 .default_pm = 0, 1412 .dvb_amplitude = 134, 1413 .set_smoothedcvbs = 1, 1414 .if_khz = 4560 1415 }; 1416 fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL; 1417 if (attach_xc4000(dev, &cfg) < 0) 1418 goto frontend_detach; 1419 } 1420 break; 1421 case CX88_BOARD_GENIATECH_X8000_MT: 1422 dev->ts_gen_cntrl = 0x00; 1423 1424 fe0->dvb.frontend = dvb_attach(zl10353_attach, 1425 &cx88_geniatech_x8000_mt, 1426 &core->i2c_adap); 1427 if (attach_xc3028(0x61, dev) < 0) 1428 goto frontend_detach; 1429 break; 1430 case CX88_BOARD_KWORLD_ATSC_120: 1431 fe0->dvb.frontend = dvb_attach(s5h1409_attach, 1432 &kworld_atsc_120_config, 1433 &core->i2c_adap); 1434 if (attach_xc3028(0x61, dev) < 0) 1435 goto frontend_detach; 1436 break; 1437 case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD: 1438 fe0->dvb.frontend = dvb_attach(s5h1411_attach, 1439 &dvico_fusionhdtv7_config, 1440 &core->i2c_adap); 1441 if (fe0->dvb.frontend != NULL) { 1442 if (!dvb_attach(xc5000_attach, fe0->dvb.frontend, 1443 &core->i2c_adap, 1444 &dvico_fusionhdtv7_tuner_config)) 1445 goto frontend_detach; 1446 } 1447 break; 1448 case CX88_BOARD_HAUPPAUGE_HVR4000: 1449 /* MFE frontend 1 */ 1450 mfe_shared = 1; 1451 dev->frontends.gate = 2; 1452 /* DVB-S/S2 Init */ 1453 fe0->dvb.frontend = dvb_attach(cx24116_attach, 1454 &hauppauge_hvr4000_config, 1455 &dev->core->i2c_adap); 1456 if (fe0->dvb.frontend) { 1457 if (!dvb_attach(isl6421_attach, 1458 fe0->dvb.frontend, 1459 &dev->core->i2c_adap, 1460 0x08, ISL6421_DCL, 0x00, false)) 1461 goto frontend_detach; 1462 } 1463 /* MFE frontend 2 */ 1464 fe1 = vb2_dvb_get_frontend(&dev->frontends, 2); 1465 if (!fe1) 1466 goto frontend_detach; 1467 /* DVB-T Init */ 1468 fe1->dvb.frontend = dvb_attach(cx22702_attach, 1469 &hauppauge_hvr_config, 1470 &dev->core->i2c_adap); 1471 if (fe1->dvb.frontend) { 1472 fe1->dvb.frontend->id = 1; 1473 if (!dvb_attach(simple_tuner_attach, 1474 fe1->dvb.frontend, 1475 &dev->core->i2c_adap, 1476 0x61, TUNER_PHILIPS_FMD1216ME_MK3)) 1477 goto frontend_detach; 1478 } 1479 break; 1480 case CX88_BOARD_HAUPPAUGE_HVR4000LITE: 1481 fe0->dvb.frontend = dvb_attach(cx24116_attach, 1482 &hauppauge_hvr4000_config, 1483 &dev->core->i2c_adap); 1484 if (fe0->dvb.frontend) { 1485 if (!dvb_attach(isl6421_attach, 1486 fe0->dvb.frontend, 1487 &dev->core->i2c_adap, 1488 0x08, ISL6421_DCL, 0x00, false)) 1489 goto frontend_detach; 1490 } 1491 break; 1492 case CX88_BOARD_PROF_6200: 1493 case CX88_BOARD_TBS_8910: 1494 case CX88_BOARD_TEVII_S420: 1495 fe0->dvb.frontend = dvb_attach(stv0299_attach, 1496 &tevii_tuner_sharp_config, 1497 &core->i2c_adap); 1498 if (fe0->dvb.frontend != NULL) { 1499 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x60, 1500 &core->i2c_adap, DVB_PLL_OPERA1)) 1501 goto frontend_detach; 1502 core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage; 1503 fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage; 1504 1505 } else { 1506 fe0->dvb.frontend = dvb_attach(stv0288_attach, 1507 &tevii_tuner_earda_config, 1508 &core->i2c_adap); 1509 if (fe0->dvb.frontend != NULL) { 1510 if (!dvb_attach(stb6000_attach, fe0->dvb.frontend, 0x61, 1511 &core->i2c_adap)) 1512 goto frontend_detach; 1513 core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage; 1514 fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage; 1515 } 1516 } 1517 break; 1518 case CX88_BOARD_TEVII_S460: 1519 fe0->dvb.frontend = dvb_attach(cx24116_attach, 1520 &tevii_s460_config, 1521 &core->i2c_adap); 1522 if (fe0->dvb.frontend != NULL) 1523 fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage; 1524 break; 1525 case CX88_BOARD_TEVII_S464: 1526 fe0->dvb.frontend = dvb_attach(ds3000_attach, 1527 &tevii_ds3000_config, 1528 &core->i2c_adap); 1529 if (fe0->dvb.frontend != NULL) { 1530 dvb_attach(ts2020_attach, fe0->dvb.frontend, 1531 &tevii_ts2020_config, &core->i2c_adap); 1532 fe0->dvb.frontend->ops.set_voltage = 1533 tevii_dvbs_set_voltage; 1534 } 1535 break; 1536 case CX88_BOARD_OMICOM_SS4_PCI: 1537 case CX88_BOARD_TBS_8920: 1538 case CX88_BOARD_PROF_7300: 1539 case CX88_BOARD_SATTRADE_ST4200: 1540 fe0->dvb.frontend = dvb_attach(cx24116_attach, 1541 &hauppauge_hvr4000_config, 1542 &core->i2c_adap); 1543 if (fe0->dvb.frontend != NULL) 1544 fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage; 1545 break; 1546 case CX88_BOARD_TERRATEC_CINERGY_HT_PCI_MKII: 1547 fe0->dvb.frontend = dvb_attach(zl10353_attach, 1548 &cx88_terratec_cinergy_ht_pci_mkii_config, 1549 &core->i2c_adap); 1550 if (fe0->dvb.frontend) { 1551 fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL; 1552 if (attach_xc3028(0x61, dev) < 0) 1553 goto frontend_detach; 1554 } 1555 break; 1556 case CX88_BOARD_PROF_7301:{ 1557 struct dvb_tuner_ops *tuner_ops = NULL; 1558 1559 fe0->dvb.frontend = dvb_attach(stv0900_attach, 1560 &prof_7301_stv0900_config, 1561 &core->i2c_adap, 0); 1562 if (fe0->dvb.frontend != NULL) { 1563 if (!dvb_attach(stb6100_attach, fe0->dvb.frontend, 1564 &prof_7301_stb6100_config, 1565 &core->i2c_adap)) 1566 goto frontend_detach; 1567 1568 tuner_ops = &fe0->dvb.frontend->ops.tuner_ops; 1569 tuner_ops->set_frequency = stb6100_set_freq; 1570 tuner_ops->get_frequency = stb6100_get_freq; 1571 tuner_ops->set_bandwidth = stb6100_set_bandw; 1572 tuner_ops->get_bandwidth = stb6100_get_bandw; 1573 1574 core->prev_set_voltage = 1575 fe0->dvb.frontend->ops.set_voltage; 1576 fe0->dvb.frontend->ops.set_voltage = 1577 tevii_dvbs_set_voltage; 1578 } 1579 break; 1580 } 1581 case CX88_BOARD_SAMSUNG_SMT_7020: 1582 dev->ts_gen_cntrl = 0x08; 1583 1584 cx_set(MO_GP0_IO, 0x0101); 1585 1586 cx_clear(MO_GP0_IO, 0x01); 1587 mdelay(100); 1588 cx_set(MO_GP0_IO, 0x01); 1589 mdelay(200); 1590 1591 fe0->dvb.frontend = dvb_attach(stv0299_attach, 1592 &samsung_stv0299_config, 1593 &dev->core->i2c_adap); 1594 if (fe0->dvb.frontend) { 1595 fe0->dvb.frontend->ops.tuner_ops.set_params = 1596 samsung_smt_7020_tuner_set_params; 1597 fe0->dvb.frontend->tuner_priv = 1598 &dev->core->i2c_adap; 1599 fe0->dvb.frontend->ops.set_voltage = 1600 samsung_smt_7020_set_voltage; 1601 fe0->dvb.frontend->ops.set_tone = 1602 samsung_smt_7020_set_tone; 1603 } 1604 1605 break; 1606 case CX88_BOARD_TWINHAN_VP1027_DVBS: 1607 dev->ts_gen_cntrl = 0x00; 1608 fe0->dvb.frontend = dvb_attach(mb86a16_attach, 1609 &twinhan_vp1027, 1610 &core->i2c_adap); 1611 if (fe0->dvb.frontend) { 1612 core->prev_set_voltage = 1613 fe0->dvb.frontend->ops.set_voltage; 1614 fe0->dvb.frontend->ops.set_voltage = 1615 vp1027_set_voltage; 1616 } 1617 break; 1618 1619 default: 1620 printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card isn't supported yet\n", 1621 core->name); 1622 break; 1623 } 1624 1625 if ( (NULL == fe0->dvb.frontend) || (fe1 && NULL == fe1->dvb.frontend) ) { 1626 printk(KERN_ERR 1627 "%s/2: frontend initialization failed\n", 1628 core->name); 1629 goto frontend_detach; 1630 } 1631 /* define general-purpose callback pointer */ 1632 fe0->dvb.frontend->callback = cx88_tuner_callback; 1633 1634 /* Ensure all frontends negotiate bus access */ 1635 fe0->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl; 1636 if (fe1) 1637 fe1->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl; 1638 1639 /* Put the analog decoder in standby to keep it quiet */ 1640 call_all(core, core, s_power, 0); 1641 1642 /* register everything */ 1643 res = vb2_dvb_register_bus(&dev->frontends, THIS_MODULE, dev, 1644 &dev->pci->dev, NULL, adapter_nr, 1645 mfe_shared); 1646 if (res) 1647 goto frontend_detach; 1648 return res; 1649 1650 frontend_detach: 1651 core->gate_ctrl = NULL; 1652 vb2_dvb_dealloc_frontends(&dev->frontends); 1653 return res; 1654 } 1655 1656 /* ----------------------------------------------------------- */ 1657 1658 /* CX8802 MPEG -> mini driver - We have been given the hardware */ 1659 static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv) 1660 { 1661 struct cx88_core *core = drv->core; 1662 int err = 0; 1663 dprintk( 1, "%s\n", __func__); 1664 1665 switch (core->boardnr) { 1666 case CX88_BOARD_HAUPPAUGE_HVR1300: 1667 /* We arrive here with either the cx23416 or the cx22702 1668 * on the bus. Take the bus from the cx23416 and enable the 1669 * cx22702 demod 1670 */ 1671 /* Toggle reset on cx22702 leaving i2c active */ 1672 cx_set(MO_GP0_IO, 0x00000080); 1673 udelay(1000); 1674 cx_clear(MO_GP0_IO, 0x00000080); 1675 udelay(50); 1676 cx_set(MO_GP0_IO, 0x00000080); 1677 udelay(1000); 1678 /* enable the cx22702 pins */ 1679 cx_clear(MO_GP0_IO, 0x00000004); 1680 udelay(1000); 1681 break; 1682 1683 case CX88_BOARD_HAUPPAUGE_HVR3000: 1684 case CX88_BOARD_HAUPPAUGE_HVR4000: 1685 /* Toggle reset on cx22702 leaving i2c active */ 1686 cx_set(MO_GP0_IO, 0x00000080); 1687 udelay(1000); 1688 cx_clear(MO_GP0_IO, 0x00000080); 1689 udelay(50); 1690 cx_set(MO_GP0_IO, 0x00000080); 1691 udelay(1000); 1692 switch (core->dvbdev->frontends.active_fe_id) { 1693 case 1: /* DVB-S/S2 Enabled */ 1694 /* tri-state the cx22702 pins */ 1695 cx_set(MO_GP0_IO, 0x00000004); 1696 /* Take the cx24116/cx24123 out of reset */ 1697 cx_write(MO_SRST_IO, 1); 1698 core->dvbdev->ts_gen_cntrl = 0x02; /* Parallel IO */ 1699 break; 1700 case 2: /* DVB-T Enabled */ 1701 /* Put the cx24116/cx24123 into reset */ 1702 cx_write(MO_SRST_IO, 0); 1703 /* enable the cx22702 pins */ 1704 cx_clear(MO_GP0_IO, 0x00000004); 1705 core->dvbdev->ts_gen_cntrl = 0x0c; /* Serial IO */ 1706 break; 1707 } 1708 udelay(1000); 1709 break; 1710 1711 case CX88_BOARD_WINFAST_DTV2000H_PLUS: 1712 /* set RF input to AIR for DVB-T (GPIO 16) */ 1713 cx_write(MO_GP2_IO, 0x0101); 1714 break; 1715 1716 default: 1717 err = -ENODEV; 1718 } 1719 return err; 1720 } 1721 1722 /* CX8802 MPEG -> mini driver - We no longer have the hardware */ 1723 static int cx8802_dvb_advise_release(struct cx8802_driver *drv) 1724 { 1725 struct cx88_core *core = drv->core; 1726 int err = 0; 1727 dprintk( 1, "%s\n", __func__); 1728 1729 switch (core->boardnr) { 1730 case CX88_BOARD_HAUPPAUGE_HVR1300: 1731 /* Do Nothing, leave the cx22702 on the bus. */ 1732 break; 1733 case CX88_BOARD_HAUPPAUGE_HVR3000: 1734 case CX88_BOARD_HAUPPAUGE_HVR4000: 1735 break; 1736 default: 1737 err = -ENODEV; 1738 } 1739 return err; 1740 } 1741 1742 static int cx8802_dvb_probe(struct cx8802_driver *drv) 1743 { 1744 struct cx88_core *core = drv->core; 1745 struct cx8802_dev *dev = drv->core->dvbdev; 1746 int err; 1747 struct vb2_dvb_frontend *fe; 1748 int i; 1749 1750 dprintk( 1, "%s\n", __func__); 1751 dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n", 1752 core->boardnr, 1753 core->name, 1754 core->pci_bus, 1755 core->pci_slot); 1756 1757 err = -ENODEV; 1758 if (!(core->board.mpeg & CX88_MPEG_DVB)) 1759 goto fail_core; 1760 1761 /* If vp3054 isn't enabled, a stub will just return 0 */ 1762 err = vp3054_i2c_probe(dev); 1763 if (0 != err) 1764 goto fail_core; 1765 1766 /* dvb stuff */ 1767 printk(KERN_INFO "%s/2: cx2388x based DVB/ATSC card\n", core->name); 1768 dev->ts_gen_cntrl = 0x0c; 1769 1770 err = cx8802_alloc_frontends(dev); 1771 if (err) 1772 goto fail_core; 1773 1774 err = -ENODEV; 1775 for (i = 1; i <= core->board.num_frontends; i++) { 1776 struct vb2_queue *q; 1777 1778 fe = vb2_dvb_get_frontend(&core->dvbdev->frontends, i); 1779 if (fe == NULL) { 1780 printk(KERN_ERR "%s() failed to get frontend(%d)\n", 1781 __func__, i); 1782 goto fail_probe; 1783 } 1784 q = &fe->dvb.dvbq; 1785 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; 1786 q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ; 1787 q->gfp_flags = GFP_DMA32; 1788 q->min_buffers_needed = 2; 1789 q->drv_priv = dev; 1790 q->buf_struct_size = sizeof(struct cx88_buffer); 1791 q->ops = &dvb_qops; 1792 q->mem_ops = &vb2_dma_sg_memops; 1793 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; 1794 q->lock = &core->lock; 1795 q->dev = &dev->pci->dev; 1796 1797 err = vb2_queue_init(q); 1798 if (err < 0) 1799 goto fail_probe; 1800 1801 /* init struct vb2_dvb */ 1802 fe->dvb.name = dev->core->name; 1803 } 1804 1805 err = dvb_register(dev); 1806 if (err) 1807 /* frontends/adapter de-allocated in dvb_register */ 1808 printk(KERN_ERR "%s/2: dvb_register failed (err = %d)\n", 1809 core->name, err); 1810 return err; 1811 fail_probe: 1812 vb2_dvb_dealloc_frontends(&core->dvbdev->frontends); 1813 fail_core: 1814 return err; 1815 } 1816 1817 static int cx8802_dvb_remove(struct cx8802_driver *drv) 1818 { 1819 struct cx88_core *core = drv->core; 1820 struct cx8802_dev *dev = drv->core->dvbdev; 1821 1822 dprintk( 1, "%s\n", __func__); 1823 1824 vb2_dvb_unregister_bus(&dev->frontends); 1825 1826 vp3054_i2c_remove(dev); 1827 1828 core->gate_ctrl = NULL; 1829 1830 return 0; 1831 } 1832 1833 static struct cx8802_driver cx8802_dvb_driver = { 1834 .type_id = CX88_MPEG_DVB, 1835 .hw_access = CX8802_DRVCTL_SHARED, 1836 .probe = cx8802_dvb_probe, 1837 .remove = cx8802_dvb_remove, 1838 .advise_acquire = cx8802_dvb_advise_acquire, 1839 .advise_release = cx8802_dvb_advise_release, 1840 }; 1841 1842 static int __init dvb_init(void) 1843 { 1844 printk(KERN_INFO "cx88/2: cx2388x dvb driver version %s loaded\n", 1845 CX88_VERSION); 1846 return cx8802_register_driver(&cx8802_dvb_driver); 1847 } 1848 1849 static void __exit dvb_fini(void) 1850 { 1851 cx8802_unregister_driver(&cx8802_dvb_driver); 1852 } 1853 1854 module_init(dvb_init); 1855 module_exit(dvb_fini); 1856