xref: /openbmc/linux/drivers/media/pci/cx88/cx88-dvb.c (revision 4f3db074)
1 /*
2  *
3  * device driver for Conexant 2388x based TV cards
4  * MPEG Transport Stream (DVB) routines
5  *
6  * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
7  * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
8  *
9  *  This program is free software; you can redistribute it and/or modify
10  *  it under the terms of the GNU General Public License as published by
11  *  the Free Software Foundation; either version 2 of the License, or
12  *  (at your option) any later version.
13  *
14  *  This program is distributed in the hope that it will be useful,
15  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
16  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  *  GNU General Public License for more details.
18  *
19  *  You should have received a copy of the GNU General Public License
20  *  along with this program; if not, write to the Free Software
21  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22  */
23 
24 #include <linux/module.h>
25 #include <linux/init.h>
26 #include <linux/device.h>
27 #include <linux/fs.h>
28 #include <linux/kthread.h>
29 #include <linux/file.h>
30 #include <linux/suspend.h>
31 
32 #include "cx88.h"
33 #include "dvb-pll.h"
34 #include <media/v4l2-common.h>
35 
36 #include "mt352.h"
37 #include "mt352_priv.h"
38 #include "cx88-vp3054-i2c.h"
39 #include "zl10353.h"
40 #include "cx22702.h"
41 #include "or51132.h"
42 #include "lgdt330x.h"
43 #include "s5h1409.h"
44 #include "xc4000.h"
45 #include "xc5000.h"
46 #include "nxt200x.h"
47 #include "cx24123.h"
48 #include "isl6421.h"
49 #include "tuner-simple.h"
50 #include "tda9887.h"
51 #include "s5h1411.h"
52 #include "stv0299.h"
53 #include "z0194a.h"
54 #include "stv0288.h"
55 #include "stb6000.h"
56 #include "cx24116.h"
57 #include "stv0900.h"
58 #include "stb6100.h"
59 #include "stb6100_proc.h"
60 #include "mb86a16.h"
61 #include "ts2020.h"
62 #include "ds3000.h"
63 
64 MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
65 MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
66 MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
67 MODULE_LICENSE("GPL");
68 MODULE_VERSION(CX88_VERSION);
69 
70 static unsigned int debug;
71 module_param(debug, int, 0644);
72 MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
73 
74 static unsigned int dvb_buf_tscnt = 32;
75 module_param(dvb_buf_tscnt, int, 0644);
76 MODULE_PARM_DESC(dvb_buf_tscnt, "DVB Buffer TS count [dvb]");
77 
78 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
79 
80 #define dprintk(level,fmt, arg...)	if (debug >= level) \
81 	printk(KERN_DEBUG "%s/2-dvb: " fmt, core->name, ## arg)
82 
83 /* ------------------------------------------------------------------ */
84 
85 static int queue_setup(struct vb2_queue *q, const struct v4l2_format *fmt,
86 			   unsigned int *num_buffers, unsigned int *num_planes,
87 			   unsigned int sizes[], void *alloc_ctxs[])
88 {
89 	struct cx8802_dev *dev = q->drv_priv;
90 
91 	*num_planes = 1;
92 	dev->ts_packet_size  = 188 * 4;
93 	dev->ts_packet_count = dvb_buf_tscnt;
94 	sizes[0] = dev->ts_packet_size * dev->ts_packet_count;
95 	alloc_ctxs[0] = dev->alloc_ctx;
96 	*num_buffers = dvb_buf_tscnt;
97 	return 0;
98 }
99 
100 static int buffer_prepare(struct vb2_buffer *vb)
101 {
102 	struct cx8802_dev *dev = vb->vb2_queue->drv_priv;
103 	struct cx88_buffer *buf = container_of(vb, struct cx88_buffer, vb);
104 
105 	return cx8802_buf_prepare(vb->vb2_queue, dev, buf);
106 }
107 
108 static void buffer_finish(struct vb2_buffer *vb)
109 {
110 	struct cx8802_dev *dev = vb->vb2_queue->drv_priv;
111 	struct cx88_buffer *buf = container_of(vb, struct cx88_buffer, vb);
112 	struct cx88_riscmem *risc = &buf->risc;
113 
114 	if (risc->cpu)
115 		pci_free_consistent(dev->pci, risc->size, risc->cpu, risc->dma);
116 	memset(risc, 0, sizeof(*risc));
117 }
118 
119 static void buffer_queue(struct vb2_buffer *vb)
120 {
121 	struct cx8802_dev *dev = vb->vb2_queue->drv_priv;
122 	struct cx88_buffer    *buf = container_of(vb, struct cx88_buffer, vb);
123 
124 	cx8802_buf_queue(dev, buf);
125 }
126 
127 static int start_streaming(struct vb2_queue *q, unsigned int count)
128 {
129 	struct cx8802_dev *dev = q->drv_priv;
130 	struct cx88_dmaqueue *dmaq = &dev->mpegq;
131 	struct cx88_buffer *buf;
132 
133 	buf = list_entry(dmaq->active.next, struct cx88_buffer, list);
134 	cx8802_start_dma(dev, dmaq, buf);
135 	return 0;
136 }
137 
138 static void stop_streaming(struct vb2_queue *q)
139 {
140 	struct cx8802_dev *dev = q->drv_priv;
141 	struct cx88_dmaqueue *dmaq = &dev->mpegq;
142 	unsigned long flags;
143 
144 	cx8802_cancel_buffers(dev);
145 
146 	spin_lock_irqsave(&dev->slock, flags);
147 	while (!list_empty(&dmaq->active)) {
148 		struct cx88_buffer *buf = list_entry(dmaq->active.next,
149 			struct cx88_buffer, list);
150 
151 		list_del(&buf->list);
152 		vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
153 	}
154 	spin_unlock_irqrestore(&dev->slock, flags);
155 }
156 
157 static struct vb2_ops dvb_qops = {
158 	.queue_setup    = queue_setup,
159 	.buf_prepare  = buffer_prepare,
160 	.buf_finish = buffer_finish,
161 	.buf_queue    = buffer_queue,
162 	.wait_prepare = vb2_ops_wait_prepare,
163 	.wait_finish = vb2_ops_wait_finish,
164 	.start_streaming = start_streaming,
165 	.stop_streaming = stop_streaming,
166 };
167 
168 /* ------------------------------------------------------------------ */
169 
170 static int cx88_dvb_bus_ctrl(struct dvb_frontend* fe, int acquire)
171 {
172 	struct cx8802_dev *dev= fe->dvb->priv;
173 	struct cx8802_driver *drv = NULL;
174 	int ret = 0;
175 	int fe_id;
176 
177 	fe_id = vb2_dvb_find_frontend(&dev->frontends, fe);
178 	if (!fe_id) {
179 		printk(KERN_ERR "%s() No frontend found\n", __func__);
180 		return -EINVAL;
181 	}
182 
183 	mutex_lock(&dev->core->lock);
184 	drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
185 	if (drv) {
186 		if (acquire){
187 			dev->frontends.active_fe_id = fe_id;
188 			ret = drv->request_acquire(drv);
189 		} else {
190 			ret = drv->request_release(drv);
191 			dev->frontends.active_fe_id = 0;
192 		}
193 	}
194 	mutex_unlock(&dev->core->lock);
195 
196 	return ret;
197 }
198 
199 static void cx88_dvb_gate_ctrl(struct cx88_core  *core, int open)
200 {
201 	struct vb2_dvb_frontends *f;
202 	struct vb2_dvb_frontend *fe;
203 
204 	if (!core->dvbdev)
205 		return;
206 
207 	f = &core->dvbdev->frontends;
208 
209 	if (!f)
210 		return;
211 
212 	if (f->gate <= 1) /* undefined or fe0 */
213 		fe = vb2_dvb_get_frontend(f, 1);
214 	else
215 		fe = vb2_dvb_get_frontend(f, f->gate);
216 
217 	if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl)
218 		fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open);
219 }
220 
221 /* ------------------------------------------------------------------ */
222 
223 static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
224 {
225 	static const u8 clock_config []  = { CLOCK_CTL,  0x38, 0x39 };
226 	static const u8 reset []         = { RESET,      0x80 };
227 	static const u8 adc_ctl_1_cfg [] = { ADC_CTL_1,  0x40 };
228 	static const u8 agc_cfg []       = { AGC_TARGET, 0x24, 0x20 };
229 	static const u8 gpp_ctl_cfg []   = { GPP_CTL,    0x33 };
230 	static const u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
231 
232 	mt352_write(fe, clock_config,   sizeof(clock_config));
233 	udelay(200);
234 	mt352_write(fe, reset,          sizeof(reset));
235 	mt352_write(fe, adc_ctl_1_cfg,  sizeof(adc_ctl_1_cfg));
236 
237 	mt352_write(fe, agc_cfg,        sizeof(agc_cfg));
238 	mt352_write(fe, gpp_ctl_cfg,    sizeof(gpp_ctl_cfg));
239 	mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
240 	return 0;
241 }
242 
243 static int dvico_dual_demod_init(struct dvb_frontend *fe)
244 {
245 	static const u8 clock_config []  = { CLOCK_CTL,  0x38, 0x38 };
246 	static const u8 reset []         = { RESET,      0x80 };
247 	static const u8 adc_ctl_1_cfg [] = { ADC_CTL_1,  0x40 };
248 	static const u8 agc_cfg []       = { AGC_TARGET, 0x28, 0x20 };
249 	static const u8 gpp_ctl_cfg []   = { GPP_CTL,    0x33 };
250 	static const u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
251 
252 	mt352_write(fe, clock_config,   sizeof(clock_config));
253 	udelay(200);
254 	mt352_write(fe, reset,          sizeof(reset));
255 	mt352_write(fe, adc_ctl_1_cfg,  sizeof(adc_ctl_1_cfg));
256 
257 	mt352_write(fe, agc_cfg,        sizeof(agc_cfg));
258 	mt352_write(fe, gpp_ctl_cfg,    sizeof(gpp_ctl_cfg));
259 	mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
260 
261 	return 0;
262 }
263 
264 static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
265 {
266 	static const u8 clock_config []  = { 0x89, 0x38, 0x39 };
267 	static const u8 reset []         = { 0x50, 0x80 };
268 	static const u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
269 	static const u8 agc_cfg []       = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
270 				       0x00, 0xFF, 0x00, 0x40, 0x40 };
271 	static const u8 dntv_extra[]     = { 0xB5, 0x7A };
272 	static const u8 capt_range_cfg[] = { 0x75, 0x32 };
273 
274 	mt352_write(fe, clock_config,   sizeof(clock_config));
275 	udelay(2000);
276 	mt352_write(fe, reset,          sizeof(reset));
277 	mt352_write(fe, adc_ctl_1_cfg,  sizeof(adc_ctl_1_cfg));
278 
279 	mt352_write(fe, agc_cfg,        sizeof(agc_cfg));
280 	udelay(2000);
281 	mt352_write(fe, dntv_extra,     sizeof(dntv_extra));
282 	mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
283 
284 	return 0;
285 }
286 
287 static const struct mt352_config dvico_fusionhdtv = {
288 	.demod_address = 0x0f,
289 	.demod_init    = dvico_fusionhdtv_demod_init,
290 };
291 
292 static const struct mt352_config dntv_live_dvbt_config = {
293 	.demod_address = 0x0f,
294 	.demod_init    = dntv_live_dvbt_demod_init,
295 };
296 
297 static const struct mt352_config dvico_fusionhdtv_dual = {
298 	.demod_address = 0x0f,
299 	.demod_init    = dvico_dual_demod_init,
300 };
301 
302 static const struct zl10353_config cx88_terratec_cinergy_ht_pci_mkii_config = {
303 	.demod_address = (0x1e >> 1),
304 	.no_tuner      = 1,
305 	.if2           = 45600,
306 };
307 
308 static struct mb86a16_config twinhan_vp1027 = {
309 	.demod_address  = 0x08,
310 };
311 
312 #if IS_ENABLED(CONFIG_VIDEO_CX88_VP3054)
313 static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
314 {
315 	static const u8 clock_config []  = { 0x89, 0x38, 0x38 };
316 	static const u8 reset []         = { 0x50, 0x80 };
317 	static const u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
318 	static const u8 agc_cfg []       = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
319 				       0x00, 0xFF, 0x00, 0x40, 0x40 };
320 	static const u8 dntv_extra[]     = { 0xB5, 0x7A };
321 	static const u8 capt_range_cfg[] = { 0x75, 0x32 };
322 
323 	mt352_write(fe, clock_config,   sizeof(clock_config));
324 	udelay(2000);
325 	mt352_write(fe, reset,          sizeof(reset));
326 	mt352_write(fe, adc_ctl_1_cfg,  sizeof(adc_ctl_1_cfg));
327 
328 	mt352_write(fe, agc_cfg,        sizeof(agc_cfg));
329 	udelay(2000);
330 	mt352_write(fe, dntv_extra,     sizeof(dntv_extra));
331 	mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
332 
333 	return 0;
334 }
335 
336 static const struct mt352_config dntv_live_dvbt_pro_config = {
337 	.demod_address = 0x0f,
338 	.no_tuner      = 1,
339 	.demod_init    = dntv_live_dvbt_pro_demod_init,
340 };
341 #endif
342 
343 static const struct zl10353_config dvico_fusionhdtv_hybrid = {
344 	.demod_address = 0x0f,
345 	.no_tuner      = 1,
346 };
347 
348 static const struct zl10353_config dvico_fusionhdtv_xc3028 = {
349 	.demod_address = 0x0f,
350 	.if2           = 45600,
351 	.no_tuner      = 1,
352 };
353 
354 static const struct mt352_config dvico_fusionhdtv_mt352_xc3028 = {
355 	.demod_address = 0x0f,
356 	.if2 = 4560,
357 	.no_tuner = 1,
358 	.demod_init = dvico_fusionhdtv_demod_init,
359 };
360 
361 static const struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
362 	.demod_address = 0x0f,
363 };
364 
365 static const struct cx22702_config connexant_refboard_config = {
366 	.demod_address = 0x43,
367 	.output_mode   = CX22702_SERIAL_OUTPUT,
368 };
369 
370 static const struct cx22702_config hauppauge_hvr_config = {
371 	.demod_address = 0x63,
372 	.output_mode   = CX22702_SERIAL_OUTPUT,
373 };
374 
375 static int or51132_set_ts_param(struct dvb_frontend* fe, int is_punctured)
376 {
377 	struct cx8802_dev *dev= fe->dvb->priv;
378 	dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
379 	return 0;
380 }
381 
382 static const struct or51132_config pchdtv_hd3000 = {
383 	.demod_address = 0x15,
384 	.set_ts_params = or51132_set_ts_param,
385 };
386 
387 static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
388 {
389 	struct cx8802_dev *dev= fe->dvb->priv;
390 	struct cx88_core *core = dev->core;
391 
392 	dprintk(1, "%s: index = %d\n", __func__, index);
393 	if (index == 0)
394 		cx_clear(MO_GP0_IO, 8);
395 	else
396 		cx_set(MO_GP0_IO, 8);
397 	return 0;
398 }
399 
400 static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
401 {
402 	struct cx8802_dev *dev= fe->dvb->priv;
403 	if (is_punctured)
404 		dev->ts_gen_cntrl |= 0x04;
405 	else
406 		dev->ts_gen_cntrl &= ~0x04;
407 	return 0;
408 }
409 
410 static struct lgdt330x_config fusionhdtv_3_gold = {
411 	.demod_address = 0x0e,
412 	.demod_chip    = LGDT3302,
413 	.serial_mpeg   = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
414 	.set_ts_params = lgdt330x_set_ts_param,
415 };
416 
417 static const struct lgdt330x_config fusionhdtv_5_gold = {
418 	.demod_address = 0x0e,
419 	.demod_chip    = LGDT3303,
420 	.serial_mpeg   = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
421 	.set_ts_params = lgdt330x_set_ts_param,
422 };
423 
424 static const struct lgdt330x_config pchdtv_hd5500 = {
425 	.demod_address = 0x59,
426 	.demod_chip    = LGDT3303,
427 	.serial_mpeg   = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
428 	.set_ts_params = lgdt330x_set_ts_param,
429 };
430 
431 static int nxt200x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
432 {
433 	struct cx8802_dev *dev= fe->dvb->priv;
434 	dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
435 	return 0;
436 }
437 
438 static const struct nxt200x_config ati_hdtvwonder = {
439 	.demod_address = 0x0a,
440 	.set_ts_params = nxt200x_set_ts_param,
441 };
442 
443 static int cx24123_set_ts_param(struct dvb_frontend* fe,
444 	int is_punctured)
445 {
446 	struct cx8802_dev *dev= fe->dvb->priv;
447 	dev->ts_gen_cntrl = 0x02;
448 	return 0;
449 }
450 
451 static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
452 				       fe_sec_voltage_t voltage)
453 {
454 	struct cx8802_dev *dev= fe->dvb->priv;
455 	struct cx88_core *core = dev->core;
456 
457 	if (voltage == SEC_VOLTAGE_OFF)
458 		cx_write(MO_GP0_IO, 0x000006fb);
459 	else
460 		cx_write(MO_GP0_IO, 0x000006f9);
461 
462 	if (core->prev_set_voltage)
463 		return core->prev_set_voltage(fe, voltage);
464 	return 0;
465 }
466 
467 static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
468 				      fe_sec_voltage_t voltage)
469 {
470 	struct cx8802_dev *dev= fe->dvb->priv;
471 	struct cx88_core *core = dev->core;
472 
473 	if (voltage == SEC_VOLTAGE_OFF) {
474 		dprintk(1,"LNB Voltage OFF\n");
475 		cx_write(MO_GP0_IO, 0x0000efff);
476 	}
477 
478 	if (core->prev_set_voltage)
479 		return core->prev_set_voltage(fe, voltage);
480 	return 0;
481 }
482 
483 static int tevii_dvbs_set_voltage(struct dvb_frontend *fe,
484 				      fe_sec_voltage_t voltage)
485 {
486 	struct cx8802_dev *dev= fe->dvb->priv;
487 	struct cx88_core *core = dev->core;
488 
489 	cx_set(MO_GP0_IO, 0x6040);
490 	switch (voltage) {
491 	case SEC_VOLTAGE_13:
492 		cx_clear(MO_GP0_IO, 0x20);
493 		break;
494 	case SEC_VOLTAGE_18:
495 		cx_set(MO_GP0_IO, 0x20);
496 		break;
497 	case SEC_VOLTAGE_OFF:
498 		cx_clear(MO_GP0_IO, 0x20);
499 		break;
500 	}
501 
502 	if (core->prev_set_voltage)
503 		return core->prev_set_voltage(fe, voltage);
504 	return 0;
505 }
506 
507 static int vp1027_set_voltage(struct dvb_frontend *fe,
508 				    fe_sec_voltage_t voltage)
509 {
510 	struct cx8802_dev *dev = fe->dvb->priv;
511 	struct cx88_core *core = dev->core;
512 
513 	switch (voltage) {
514 	case SEC_VOLTAGE_13:
515 		dprintk(1, "LNB SEC Voltage=13\n");
516 		cx_write(MO_GP0_IO, 0x00001220);
517 		break;
518 	case SEC_VOLTAGE_18:
519 		dprintk(1, "LNB SEC Voltage=18\n");
520 		cx_write(MO_GP0_IO, 0x00001222);
521 		break;
522 	case SEC_VOLTAGE_OFF:
523 		dprintk(1, "LNB Voltage OFF\n");
524 		cx_write(MO_GP0_IO, 0x00001230);
525 		break;
526 	}
527 
528 	if (core->prev_set_voltage)
529 		return core->prev_set_voltage(fe, voltage);
530 	return 0;
531 }
532 
533 static const struct cx24123_config geniatech_dvbs_config = {
534 	.demod_address = 0x55,
535 	.set_ts_params = cx24123_set_ts_param,
536 };
537 
538 static const struct cx24123_config hauppauge_novas_config = {
539 	.demod_address = 0x55,
540 	.set_ts_params = cx24123_set_ts_param,
541 };
542 
543 static const struct cx24123_config kworld_dvbs_100_config = {
544 	.demod_address = 0x15,
545 	.set_ts_params = cx24123_set_ts_param,
546 	.lnb_polarity  = 1,
547 };
548 
549 static const struct s5h1409_config pinnacle_pctv_hd_800i_config = {
550 	.demod_address = 0x32 >> 1,
551 	.output_mode   = S5H1409_PARALLEL_OUTPUT,
552 	.gpio	       = S5H1409_GPIO_ON,
553 	.qam_if	       = 44000,
554 	.inversion     = S5H1409_INVERSION_OFF,
555 	.status_mode   = S5H1409_DEMODLOCKING,
556 	.mpeg_timing   = S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK,
557 };
558 
559 static const struct s5h1409_config dvico_hdtv5_pci_nano_config = {
560 	.demod_address = 0x32 >> 1,
561 	.output_mode   = S5H1409_SERIAL_OUTPUT,
562 	.gpio          = S5H1409_GPIO_OFF,
563 	.inversion     = S5H1409_INVERSION_OFF,
564 	.status_mode   = S5H1409_DEMODLOCKING,
565 	.mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
566 };
567 
568 static const struct s5h1409_config kworld_atsc_120_config = {
569 	.demod_address = 0x32 >> 1,
570 	.output_mode   = S5H1409_SERIAL_OUTPUT,
571 	.gpio	       = S5H1409_GPIO_OFF,
572 	.inversion     = S5H1409_INVERSION_OFF,
573 	.status_mode   = S5H1409_DEMODLOCKING,
574 	.mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
575 };
576 
577 static const struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = {
578 	.i2c_address	= 0x64,
579 	.if_khz		= 5380,
580 };
581 
582 static const struct zl10353_config cx88_pinnacle_hybrid_pctv = {
583 	.demod_address = (0x1e >> 1),
584 	.no_tuner      = 1,
585 	.if2           = 45600,
586 };
587 
588 static const struct zl10353_config cx88_geniatech_x8000_mt = {
589 	.demod_address = (0x1e >> 1),
590 	.no_tuner = 1,
591 	.disable_i2c_gate_ctrl = 1,
592 };
593 
594 static const struct s5h1411_config dvico_fusionhdtv7_config = {
595 	.output_mode   = S5H1411_SERIAL_OUTPUT,
596 	.gpio          = S5H1411_GPIO_ON,
597 	.mpeg_timing   = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
598 	.qam_if        = S5H1411_IF_44000,
599 	.vsb_if        = S5H1411_IF_44000,
600 	.inversion     = S5H1411_INVERSION_OFF,
601 	.status_mode   = S5H1411_DEMODLOCKING
602 };
603 
604 static const struct xc5000_config dvico_fusionhdtv7_tuner_config = {
605 	.i2c_address    = 0xc2 >> 1,
606 	.if_khz         = 5380,
607 };
608 
609 static int attach_xc3028(u8 addr, struct cx8802_dev *dev)
610 {
611 	struct dvb_frontend *fe;
612 	struct vb2_dvb_frontend *fe0 = NULL;
613 	struct xc2028_ctrl ctl;
614 	struct xc2028_config cfg = {
615 		.i2c_adap  = &dev->core->i2c_adap,
616 		.i2c_addr  = addr,
617 		.ctrl      = &ctl,
618 	};
619 
620 	/* Get the first frontend */
621 	fe0 = vb2_dvb_get_frontend(&dev->frontends, 1);
622 	if (!fe0)
623 		return -EINVAL;
624 
625 	if (!fe0->dvb.frontend) {
626 		printk(KERN_ERR "%s/2: dvb frontend not attached. "
627 				"Can't attach xc3028\n",
628 		       dev->core->name);
629 		return -EINVAL;
630 	}
631 
632 	/*
633 	 * Some xc3028 devices may be hidden by an I2C gate. This is known
634 	 * to happen with some s5h1409-based devices.
635 	 * Now that I2C gate is open, sets up xc3028 configuration
636 	 */
637 	cx88_setup_xc3028(dev->core, &ctl);
638 
639 	fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, &cfg);
640 	if (!fe) {
641 		printk(KERN_ERR "%s/2: xc3028 attach failed\n",
642 		       dev->core->name);
643 		dvb_frontend_detach(fe0->dvb.frontend);
644 		dvb_unregister_frontend(fe0->dvb.frontend);
645 		fe0->dvb.frontend = NULL;
646 		return -EINVAL;
647 	}
648 
649 	printk(KERN_INFO "%s/2: xc3028 attached\n",
650 	       dev->core->name);
651 
652 	return 0;
653 }
654 
655 static int attach_xc4000(struct cx8802_dev *dev, struct xc4000_config *cfg)
656 {
657 	struct dvb_frontend *fe;
658 	struct vb2_dvb_frontend *fe0 = NULL;
659 
660 	/* Get the first frontend */
661 	fe0 = vb2_dvb_get_frontend(&dev->frontends, 1);
662 	if (!fe0)
663 		return -EINVAL;
664 
665 	if (!fe0->dvb.frontend) {
666 		printk(KERN_ERR "%s/2: dvb frontend not attached. "
667 				"Can't attach xc4000\n",
668 		       dev->core->name);
669 		return -EINVAL;
670 	}
671 
672 	fe = dvb_attach(xc4000_attach, fe0->dvb.frontend, &dev->core->i2c_adap,
673 			cfg);
674 	if (!fe) {
675 		printk(KERN_ERR "%s/2: xc4000 attach failed\n",
676 		       dev->core->name);
677 		dvb_frontend_detach(fe0->dvb.frontend);
678 		dvb_unregister_frontend(fe0->dvb.frontend);
679 		fe0->dvb.frontend = NULL;
680 		return -EINVAL;
681 	}
682 
683 	printk(KERN_INFO "%s/2: xc4000 attached\n", dev->core->name);
684 
685 	return 0;
686 }
687 
688 static int cx24116_set_ts_param(struct dvb_frontend *fe,
689 	int is_punctured)
690 {
691 	struct cx8802_dev *dev = fe->dvb->priv;
692 	dev->ts_gen_cntrl = 0x2;
693 
694 	return 0;
695 }
696 
697 static int stv0900_set_ts_param(struct dvb_frontend *fe,
698 	int is_punctured)
699 {
700 	struct cx8802_dev *dev = fe->dvb->priv;
701 	dev->ts_gen_cntrl = 0;
702 
703 	return 0;
704 }
705 
706 static int cx24116_reset_device(struct dvb_frontend *fe)
707 {
708 	struct cx8802_dev *dev = fe->dvb->priv;
709 	struct cx88_core *core = dev->core;
710 
711 	/* Reset the part */
712 	/* Put the cx24116 into reset */
713 	cx_write(MO_SRST_IO, 0);
714 	msleep(10);
715 	/* Take the cx24116 out of reset */
716 	cx_write(MO_SRST_IO, 1);
717 	msleep(10);
718 
719 	return 0;
720 }
721 
722 static const struct cx24116_config hauppauge_hvr4000_config = {
723 	.demod_address          = 0x05,
724 	.set_ts_params          = cx24116_set_ts_param,
725 	.reset_device           = cx24116_reset_device,
726 };
727 
728 static const struct cx24116_config tevii_s460_config = {
729 	.demod_address = 0x55,
730 	.set_ts_params = cx24116_set_ts_param,
731 	.reset_device  = cx24116_reset_device,
732 };
733 
734 static int ds3000_set_ts_param(struct dvb_frontend *fe,
735 	int is_punctured)
736 {
737 	struct cx8802_dev *dev = fe->dvb->priv;
738 	dev->ts_gen_cntrl = 4;
739 
740 	return 0;
741 }
742 
743 static struct ds3000_config tevii_ds3000_config = {
744 	.demod_address = 0x68,
745 	.set_ts_params = ds3000_set_ts_param,
746 };
747 
748 static struct ts2020_config tevii_ts2020_config  = {
749 	.tuner_address = 0x60,
750 	.clk_out_div = 1,
751 };
752 
753 static const struct stv0900_config prof_7301_stv0900_config = {
754 	.demod_address = 0x6a,
755 /*	demod_mode = 0,*/
756 	.xtal = 27000000,
757 	.clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */
758 	.diseqc_mode = 2,/* 2/3 PWM */
759 	.tun1_maddress = 0,/* 0x60 */
760 	.tun1_adc = 0,/* 2 Vpp */
761 	.path1_mode = 3,
762 	.set_ts_params = stv0900_set_ts_param,
763 };
764 
765 static const struct stb6100_config prof_7301_stb6100_config = {
766 	.tuner_address = 0x60,
767 	.refclock = 27000000,
768 };
769 
770 static const struct stv0299_config tevii_tuner_sharp_config = {
771 	.demod_address = 0x68,
772 	.inittab = sharp_z0194a_inittab,
773 	.mclk = 88000000UL,
774 	.invert = 1,
775 	.skip_reinit = 0,
776 	.lock_output = 1,
777 	.volt13_op0_op1 = STV0299_VOLT13_OP1,
778 	.min_delay_ms = 100,
779 	.set_symbol_rate = sharp_z0194a_set_symbol_rate,
780 	.set_ts_params = cx24116_set_ts_param,
781 };
782 
783 static const struct stv0288_config tevii_tuner_earda_config = {
784 	.demod_address = 0x68,
785 	.min_delay_ms = 100,
786 	.set_ts_params = cx24116_set_ts_param,
787 };
788 
789 static int cx8802_alloc_frontends(struct cx8802_dev *dev)
790 {
791 	struct cx88_core *core = dev->core;
792 	struct vb2_dvb_frontend *fe = NULL;
793 	int i;
794 
795 	mutex_init(&dev->frontends.lock);
796 	INIT_LIST_HEAD(&dev->frontends.felist);
797 
798 	if (!core->board.num_frontends)
799 		return -ENODEV;
800 
801 	printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__,
802 			 core->board.num_frontends);
803 	for (i = 1; i <= core->board.num_frontends; i++) {
804 		fe = vb2_dvb_alloc_frontend(&dev->frontends, i);
805 		if (!fe) {
806 			printk(KERN_ERR "%s() failed to alloc\n", __func__);
807 			vb2_dvb_dealloc_frontends(&dev->frontends);
808 			return -ENOMEM;
809 		}
810 	}
811 	return 0;
812 }
813 
814 
815 
816 static const u8 samsung_smt_7020_inittab[] = {
817 	     0x01, 0x15,
818 	     0x02, 0x00,
819 	     0x03, 0x00,
820 	     0x04, 0x7D,
821 	     0x05, 0x0F,
822 	     0x06, 0x02,
823 	     0x07, 0x00,
824 	     0x08, 0x60,
825 
826 	     0x0A, 0xC2,
827 	     0x0B, 0x00,
828 	     0x0C, 0x01,
829 	     0x0D, 0x81,
830 	     0x0E, 0x44,
831 	     0x0F, 0x09,
832 	     0x10, 0x3C,
833 	     0x11, 0x84,
834 	     0x12, 0xDA,
835 	     0x13, 0x99,
836 	     0x14, 0x8D,
837 	     0x15, 0xCE,
838 	     0x16, 0xE8,
839 	     0x17, 0x43,
840 	     0x18, 0x1C,
841 	     0x19, 0x1B,
842 	     0x1A, 0x1D,
843 
844 	     0x1C, 0x12,
845 	     0x1D, 0x00,
846 	     0x1E, 0x00,
847 	     0x1F, 0x00,
848 	     0x20, 0x00,
849 	     0x21, 0x00,
850 	     0x22, 0x00,
851 	     0x23, 0x00,
852 
853 	     0x28, 0x02,
854 	     0x29, 0x28,
855 	     0x2A, 0x14,
856 	     0x2B, 0x0F,
857 	     0x2C, 0x09,
858 	     0x2D, 0x05,
859 
860 	     0x31, 0x1F,
861 	     0x32, 0x19,
862 	     0x33, 0xFC,
863 	     0x34, 0x13,
864 	     0xff, 0xff,
865 };
866 
867 
868 static int samsung_smt_7020_tuner_set_params(struct dvb_frontend *fe)
869 {
870 	struct dtv_frontend_properties *c = &fe->dtv_property_cache;
871 	struct cx8802_dev *dev = fe->dvb->priv;
872 	u8 buf[4];
873 	u32 div;
874 	struct i2c_msg msg = {
875 		.addr = 0x61,
876 		.flags = 0,
877 		.buf = buf,
878 		.len = sizeof(buf) };
879 
880 	div = c->frequency / 125;
881 
882 	buf[0] = (div >> 8) & 0x7f;
883 	buf[1] = div & 0xff;
884 	buf[2] = 0x84;  /* 0xC4 */
885 	buf[3] = 0x00;
886 
887 	if (c->frequency < 1500000)
888 		buf[3] |= 0x10;
889 
890 	if (fe->ops.i2c_gate_ctrl)
891 		fe->ops.i2c_gate_ctrl(fe, 1);
892 
893 	if (i2c_transfer(&dev->core->i2c_adap, &msg, 1) != 1)
894 		return -EIO;
895 
896 	return 0;
897 }
898 
899 static int samsung_smt_7020_set_tone(struct dvb_frontend *fe,
900 	fe_sec_tone_mode_t tone)
901 {
902 	struct cx8802_dev *dev = fe->dvb->priv;
903 	struct cx88_core *core = dev->core;
904 
905 	cx_set(MO_GP0_IO, 0x0800);
906 
907 	switch (tone) {
908 	case SEC_TONE_ON:
909 		cx_set(MO_GP0_IO, 0x08);
910 		break;
911 	case SEC_TONE_OFF:
912 		cx_clear(MO_GP0_IO, 0x08);
913 		break;
914 	default:
915 		return -EINVAL;
916 	}
917 
918 	return 0;
919 }
920 
921 static int samsung_smt_7020_set_voltage(struct dvb_frontend *fe,
922 	fe_sec_voltage_t voltage)
923 {
924 	struct cx8802_dev *dev = fe->dvb->priv;
925 	struct cx88_core *core = dev->core;
926 
927 	u8 data;
928 	struct i2c_msg msg = {
929 		.addr = 8,
930 		.flags = 0,
931 		.buf = &data,
932 		.len = sizeof(data) };
933 
934 	cx_set(MO_GP0_IO, 0x8000);
935 
936 	switch (voltage) {
937 	case SEC_VOLTAGE_OFF:
938 		break;
939 	case SEC_VOLTAGE_13:
940 		data = ISL6421_EN1 | ISL6421_LLC1;
941 		cx_clear(MO_GP0_IO, 0x80);
942 		break;
943 	case SEC_VOLTAGE_18:
944 		data = ISL6421_EN1 | ISL6421_LLC1 | ISL6421_VSEL1;
945 		cx_clear(MO_GP0_IO, 0x80);
946 		break;
947 	default:
948 		return -EINVAL;
949 	}
950 
951 	return (i2c_transfer(&dev->core->i2c_adap, &msg, 1) == 1) ? 0 : -EIO;
952 }
953 
954 static int samsung_smt_7020_stv0299_set_symbol_rate(struct dvb_frontend *fe,
955 	u32 srate, u32 ratio)
956 {
957 	u8 aclk = 0;
958 	u8 bclk = 0;
959 
960 	if (srate < 1500000) {
961 		aclk = 0xb7;
962 		bclk = 0x47;
963 	} else if (srate < 3000000) {
964 		aclk = 0xb7;
965 		bclk = 0x4b;
966 	} else if (srate < 7000000) {
967 		aclk = 0xb7;
968 		bclk = 0x4f;
969 	} else if (srate < 14000000) {
970 		aclk = 0xb7;
971 		bclk = 0x53;
972 	} else if (srate < 30000000) {
973 		aclk = 0xb6;
974 		bclk = 0x53;
975 	} else if (srate < 45000000) {
976 		aclk = 0xb4;
977 		bclk = 0x51;
978 	}
979 
980 	stv0299_writereg(fe, 0x13, aclk);
981 	stv0299_writereg(fe, 0x14, bclk);
982 	stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff);
983 	stv0299_writereg(fe, 0x20, (ratio >>  8) & 0xff);
984 	stv0299_writereg(fe, 0x21, ratio & 0xf0);
985 
986 	return 0;
987 }
988 
989 
990 static const struct stv0299_config samsung_stv0299_config = {
991 	.demod_address = 0x68,
992 	.inittab = samsung_smt_7020_inittab,
993 	.mclk = 88000000UL,
994 	.invert = 0,
995 	.skip_reinit = 0,
996 	.lock_output = STV0299_LOCKOUTPUT_LK,
997 	.volt13_op0_op1 = STV0299_VOLT13_OP1,
998 	.min_delay_ms = 100,
999 	.set_symbol_rate = samsung_smt_7020_stv0299_set_symbol_rate,
1000 };
1001 
1002 static int dvb_register(struct cx8802_dev *dev)
1003 {
1004 	struct cx88_core *core = dev->core;
1005 	struct vb2_dvb_frontend *fe0, *fe1 = NULL;
1006 	int mfe_shared = 0; /* bus not shared by default */
1007 	int res = -EINVAL;
1008 
1009 	if (0 != core->i2c_rc) {
1010 		printk(KERN_ERR "%s/2: no i2c-bus available, cannot attach dvb drivers\n", core->name);
1011 		goto frontend_detach;
1012 	}
1013 
1014 	/* Get the first frontend */
1015 	fe0 = vb2_dvb_get_frontend(&dev->frontends, 1);
1016 	if (!fe0)
1017 		goto frontend_detach;
1018 
1019 	/* multi-frontend gate control is undefined or defaults to fe0 */
1020 	dev->frontends.gate = 0;
1021 
1022 	/* Sets the gate control callback to be used by i2c command calls */
1023 	core->gate_ctrl = cx88_dvb_gate_ctrl;
1024 
1025 	/* init frontend(s) */
1026 	switch (core->boardnr) {
1027 	case CX88_BOARD_HAUPPAUGE_DVB_T1:
1028 		fe0->dvb.frontend = dvb_attach(cx22702_attach,
1029 					       &connexant_refboard_config,
1030 					       &core->i2c_adap);
1031 		if (fe0->dvb.frontend != NULL) {
1032 			if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1033 					0x61, &core->i2c_adap,
1034 					DVB_PLL_THOMSON_DTT759X))
1035 				goto frontend_detach;
1036 		}
1037 		break;
1038 	case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
1039 	case CX88_BOARD_CONEXANT_DVB_T1:
1040 	case CX88_BOARD_KWORLD_DVB_T_CX22702:
1041 	case CX88_BOARD_WINFAST_DTV1000:
1042 		fe0->dvb.frontend = dvb_attach(cx22702_attach,
1043 					       &connexant_refboard_config,
1044 					       &core->i2c_adap);
1045 		if (fe0->dvb.frontend != NULL) {
1046 			if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1047 					0x60, &core->i2c_adap,
1048 					DVB_PLL_THOMSON_DTT7579))
1049 				goto frontend_detach;
1050 		}
1051 		break;
1052 	case CX88_BOARD_WINFAST_DTV2000H:
1053 	case CX88_BOARD_HAUPPAUGE_HVR1100:
1054 	case CX88_BOARD_HAUPPAUGE_HVR1100LP:
1055 	case CX88_BOARD_HAUPPAUGE_HVR1300:
1056 		fe0->dvb.frontend = dvb_attach(cx22702_attach,
1057 					       &hauppauge_hvr_config,
1058 					       &core->i2c_adap);
1059 		if (fe0->dvb.frontend != NULL) {
1060 			if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1061 				   &core->i2c_adap, 0x61,
1062 				   TUNER_PHILIPS_FMD1216ME_MK3))
1063 				goto frontend_detach;
1064 		}
1065 		break;
1066 	case CX88_BOARD_WINFAST_DTV2000H_J:
1067 		fe0->dvb.frontend = dvb_attach(cx22702_attach,
1068 					       &hauppauge_hvr_config,
1069 					       &core->i2c_adap);
1070 		if (fe0->dvb.frontend != NULL) {
1071 			if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1072 				   &core->i2c_adap, 0x61,
1073 				   TUNER_PHILIPS_FMD1216MEX_MK3))
1074 				goto frontend_detach;
1075 		}
1076 		break;
1077 	case CX88_BOARD_HAUPPAUGE_HVR3000:
1078 		/* MFE frontend 1 */
1079 		mfe_shared = 1;
1080 		dev->frontends.gate = 2;
1081 		/* DVB-S init */
1082 		fe0->dvb.frontend = dvb_attach(cx24123_attach,
1083 					&hauppauge_novas_config,
1084 					&dev->core->i2c_adap);
1085 		if (fe0->dvb.frontend) {
1086 			if (!dvb_attach(isl6421_attach,
1087 					fe0->dvb.frontend,
1088 					&dev->core->i2c_adap,
1089 					0x08, ISL6421_DCL, 0x00, false))
1090 				goto frontend_detach;
1091 		}
1092 		/* MFE frontend 2 */
1093 		fe1 = vb2_dvb_get_frontend(&dev->frontends, 2);
1094 		if (!fe1)
1095 			goto frontend_detach;
1096 		/* DVB-T init */
1097 		fe1->dvb.frontend = dvb_attach(cx22702_attach,
1098 					&hauppauge_hvr_config,
1099 					&dev->core->i2c_adap);
1100 		if (fe1->dvb.frontend) {
1101 			fe1->dvb.frontend->id = 1;
1102 			if (!dvb_attach(simple_tuner_attach,
1103 					fe1->dvb.frontend,
1104 					&dev->core->i2c_adap,
1105 					0x61, TUNER_PHILIPS_FMD1216ME_MK3))
1106 				goto frontend_detach;
1107 		}
1108 		break;
1109 	case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
1110 		fe0->dvb.frontend = dvb_attach(mt352_attach,
1111 					       &dvico_fusionhdtv,
1112 					       &core->i2c_adap);
1113 		if (fe0->dvb.frontend != NULL) {
1114 			if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1115 					0x60, NULL, DVB_PLL_THOMSON_DTT7579))
1116 				goto frontend_detach;
1117 			break;
1118 		}
1119 		/* ZL10353 replaces MT352 on later cards */
1120 		fe0->dvb.frontend = dvb_attach(zl10353_attach,
1121 					       &dvico_fusionhdtv_plus_v1_1,
1122 					       &core->i2c_adap);
1123 		if (fe0->dvb.frontend != NULL) {
1124 			if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1125 					0x60, NULL, DVB_PLL_THOMSON_DTT7579))
1126 				goto frontend_detach;
1127 		}
1128 		break;
1129 	case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
1130 		/* The tin box says DEE1601, but it seems to be DTT7579
1131 		 * compatible, with a slightly different MT352 AGC gain. */
1132 		fe0->dvb.frontend = dvb_attach(mt352_attach,
1133 					       &dvico_fusionhdtv_dual,
1134 					       &core->i2c_adap);
1135 		if (fe0->dvb.frontend != NULL) {
1136 			if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1137 					0x61, NULL, DVB_PLL_THOMSON_DTT7579))
1138 				goto frontend_detach;
1139 			break;
1140 		}
1141 		/* ZL10353 replaces MT352 on later cards */
1142 		fe0->dvb.frontend = dvb_attach(zl10353_attach,
1143 					       &dvico_fusionhdtv_plus_v1_1,
1144 					       &core->i2c_adap);
1145 		if (fe0->dvb.frontend != NULL) {
1146 			if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1147 					0x61, NULL, DVB_PLL_THOMSON_DTT7579))
1148 				goto frontend_detach;
1149 		}
1150 		break;
1151 	case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
1152 		fe0->dvb.frontend = dvb_attach(mt352_attach,
1153 					       &dvico_fusionhdtv,
1154 					       &core->i2c_adap);
1155 		if (fe0->dvb.frontend != NULL) {
1156 			if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1157 					0x61, NULL, DVB_PLL_LG_Z201))
1158 				goto frontend_detach;
1159 		}
1160 		break;
1161 	case CX88_BOARD_KWORLD_DVB_T:
1162 	case CX88_BOARD_DNTV_LIVE_DVB_T:
1163 	case CX88_BOARD_ADSTECH_DVB_T_PCI:
1164 		fe0->dvb.frontend = dvb_attach(mt352_attach,
1165 					       &dntv_live_dvbt_config,
1166 					       &core->i2c_adap);
1167 		if (fe0->dvb.frontend != NULL) {
1168 			if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1169 					0x61, NULL, DVB_PLL_UNKNOWN_1))
1170 				goto frontend_detach;
1171 		}
1172 		break;
1173 	case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
1174 #if IS_ENABLED(CONFIG_VIDEO_CX88_VP3054)
1175 		/* MT352 is on a secondary I2C bus made from some GPIO lines */
1176 		fe0->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
1177 					       &dev->vp3054->adap);
1178 		if (fe0->dvb.frontend != NULL) {
1179 			if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1180 					&core->i2c_adap, 0x61,
1181 					TUNER_PHILIPS_FMD1216ME_MK3))
1182 				goto frontend_detach;
1183 		}
1184 #else
1185 		printk(KERN_ERR "%s/2: built without vp3054 support\n",
1186 				core->name);
1187 #endif
1188 		break;
1189 	case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
1190 		fe0->dvb.frontend = dvb_attach(zl10353_attach,
1191 					       &dvico_fusionhdtv_hybrid,
1192 					       &core->i2c_adap);
1193 		if (fe0->dvb.frontend != NULL) {
1194 			if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1195 				   &core->i2c_adap, 0x61,
1196 				   TUNER_THOMSON_FE6600))
1197 				goto frontend_detach;
1198 		}
1199 		break;
1200 	case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
1201 		fe0->dvb.frontend = dvb_attach(zl10353_attach,
1202 					       &dvico_fusionhdtv_xc3028,
1203 					       &core->i2c_adap);
1204 		if (fe0->dvb.frontend == NULL)
1205 			fe0->dvb.frontend = dvb_attach(mt352_attach,
1206 						&dvico_fusionhdtv_mt352_xc3028,
1207 						&core->i2c_adap);
1208 		/*
1209 		 * On this board, the demod provides the I2C bus pullup.
1210 		 * We must not permit gate_ctrl to be performed, or
1211 		 * the xc3028 cannot communicate on the bus.
1212 		 */
1213 		if (fe0->dvb.frontend)
1214 			fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
1215 		if (attach_xc3028(0x61, dev) < 0)
1216 			goto frontend_detach;
1217 		break;
1218 	case CX88_BOARD_PCHDTV_HD3000:
1219 		fe0->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
1220 					       &core->i2c_adap);
1221 		if (fe0->dvb.frontend != NULL) {
1222 			if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1223 					&core->i2c_adap, 0x61,
1224 					TUNER_THOMSON_DTT761X))
1225 				goto frontend_detach;
1226 		}
1227 		break;
1228 	case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
1229 		dev->ts_gen_cntrl = 0x08;
1230 
1231 		/* Do a hardware reset of chip before using it. */
1232 		cx_clear(MO_GP0_IO, 1);
1233 		mdelay(100);
1234 		cx_set(MO_GP0_IO, 1);
1235 		mdelay(200);
1236 
1237 		/* Select RF connector callback */
1238 		fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
1239 		fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
1240 					       &fusionhdtv_3_gold,
1241 					       &core->i2c_adap);
1242 		if (fe0->dvb.frontend != NULL) {
1243 			if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1244 					&core->i2c_adap, 0x61,
1245 					TUNER_MICROTUNE_4042FI5))
1246 				goto frontend_detach;
1247 		}
1248 		break;
1249 	case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
1250 		dev->ts_gen_cntrl = 0x08;
1251 
1252 		/* Do a hardware reset of chip before using it. */
1253 		cx_clear(MO_GP0_IO, 1);
1254 		mdelay(100);
1255 		cx_set(MO_GP0_IO, 9);
1256 		mdelay(200);
1257 		fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
1258 					       &fusionhdtv_3_gold,
1259 					       &core->i2c_adap);
1260 		if (fe0->dvb.frontend != NULL) {
1261 			if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1262 					&core->i2c_adap, 0x61,
1263 					TUNER_THOMSON_DTT761X))
1264 				goto frontend_detach;
1265 		}
1266 		break;
1267 	case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
1268 		dev->ts_gen_cntrl = 0x08;
1269 
1270 		/* Do a hardware reset of chip before using it. */
1271 		cx_clear(MO_GP0_IO, 1);
1272 		mdelay(100);
1273 		cx_set(MO_GP0_IO, 1);
1274 		mdelay(200);
1275 		fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
1276 					       &fusionhdtv_5_gold,
1277 					       &core->i2c_adap);
1278 		if (fe0->dvb.frontend != NULL) {
1279 			if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1280 					&core->i2c_adap, 0x61,
1281 					TUNER_LG_TDVS_H06XF))
1282 				goto frontend_detach;
1283 			if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
1284 				   &core->i2c_adap, 0x43))
1285 				goto frontend_detach;
1286 		}
1287 		break;
1288 	case CX88_BOARD_PCHDTV_HD5500:
1289 		dev->ts_gen_cntrl = 0x08;
1290 
1291 		/* Do a hardware reset of chip before using it. */
1292 		cx_clear(MO_GP0_IO, 1);
1293 		mdelay(100);
1294 		cx_set(MO_GP0_IO, 1);
1295 		mdelay(200);
1296 		fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
1297 					       &pchdtv_hd5500,
1298 					       &core->i2c_adap);
1299 		if (fe0->dvb.frontend != NULL) {
1300 			if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1301 					&core->i2c_adap, 0x61,
1302 					TUNER_LG_TDVS_H06XF))
1303 				goto frontend_detach;
1304 			if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
1305 				   &core->i2c_adap, 0x43))
1306 				goto frontend_detach;
1307 		}
1308 		break;
1309 	case CX88_BOARD_ATI_HDTVWONDER:
1310 		fe0->dvb.frontend = dvb_attach(nxt200x_attach,
1311 					       &ati_hdtvwonder,
1312 					       &core->i2c_adap);
1313 		if (fe0->dvb.frontend != NULL) {
1314 			if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1315 					&core->i2c_adap, 0x61,
1316 					TUNER_PHILIPS_TUV1236D))
1317 				goto frontend_detach;
1318 		}
1319 		break;
1320 	case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
1321 	case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
1322 		fe0->dvb.frontend = dvb_attach(cx24123_attach,
1323 					       &hauppauge_novas_config,
1324 					       &core->i2c_adap);
1325 		if (fe0->dvb.frontend) {
1326 			bool override_tone;
1327 
1328 			if (core->model == 92001)
1329 				override_tone = true;
1330 			else
1331 				override_tone = false;
1332 
1333 			if (!dvb_attach(isl6421_attach, fe0->dvb.frontend,
1334 					&core->i2c_adap, 0x08, ISL6421_DCL, 0x00,
1335 					override_tone))
1336 				goto frontend_detach;
1337 		}
1338 		break;
1339 	case CX88_BOARD_KWORLD_DVBS_100:
1340 		fe0->dvb.frontend = dvb_attach(cx24123_attach,
1341 					       &kworld_dvbs_100_config,
1342 					       &core->i2c_adap);
1343 		if (fe0->dvb.frontend) {
1344 			core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
1345 			fe0->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
1346 		}
1347 		break;
1348 	case CX88_BOARD_GENIATECH_DVBS:
1349 		fe0->dvb.frontend = dvb_attach(cx24123_attach,
1350 					       &geniatech_dvbs_config,
1351 					       &core->i2c_adap);
1352 		if (fe0->dvb.frontend) {
1353 			core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
1354 			fe0->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
1355 		}
1356 		break;
1357 	case CX88_BOARD_PINNACLE_PCTV_HD_800i:
1358 		fe0->dvb.frontend = dvb_attach(s5h1409_attach,
1359 					       &pinnacle_pctv_hd_800i_config,
1360 					       &core->i2c_adap);
1361 		if (fe0->dvb.frontend != NULL) {
1362 			if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
1363 					&core->i2c_adap,
1364 					&pinnacle_pctv_hd_800i_tuner_config))
1365 				goto frontend_detach;
1366 		}
1367 		break;
1368 	case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
1369 		fe0->dvb.frontend = dvb_attach(s5h1409_attach,
1370 						&dvico_hdtv5_pci_nano_config,
1371 						&core->i2c_adap);
1372 		if (fe0->dvb.frontend != NULL) {
1373 			struct dvb_frontend *fe;
1374 			struct xc2028_config cfg = {
1375 				.i2c_adap  = &core->i2c_adap,
1376 				.i2c_addr  = 0x61,
1377 			};
1378 			static struct xc2028_ctrl ctl = {
1379 				.fname       = XC2028_DEFAULT_FIRMWARE,
1380 				.max_len     = 64,
1381 				.scode_table = XC3028_FE_OREN538,
1382 			};
1383 
1384 			fe = dvb_attach(xc2028_attach,
1385 					fe0->dvb.frontend, &cfg);
1386 			if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
1387 				fe->ops.tuner_ops.set_config(fe, &ctl);
1388 		}
1389 		break;
1390 	case CX88_BOARD_PINNACLE_HYBRID_PCTV:
1391 	case CX88_BOARD_WINFAST_DTV1800H:
1392 		fe0->dvb.frontend = dvb_attach(zl10353_attach,
1393 					       &cx88_pinnacle_hybrid_pctv,
1394 					       &core->i2c_adap);
1395 		if (fe0->dvb.frontend) {
1396 			fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
1397 			if (attach_xc3028(0x61, dev) < 0)
1398 				goto frontend_detach;
1399 		}
1400 		break;
1401 	case CX88_BOARD_WINFAST_DTV1800H_XC4000:
1402 	case CX88_BOARD_WINFAST_DTV2000H_PLUS:
1403 		fe0->dvb.frontend = dvb_attach(zl10353_attach,
1404 					       &cx88_pinnacle_hybrid_pctv,
1405 					       &core->i2c_adap);
1406 		if (fe0->dvb.frontend) {
1407 			struct xc4000_config cfg = {
1408 				.i2c_address	  = 0x61,
1409 				.default_pm	  = 0,
1410 				.dvb_amplitude	  = 134,
1411 				.set_smoothedcvbs = 1,
1412 				.if_khz		  = 4560
1413 			};
1414 			fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
1415 			if (attach_xc4000(dev, &cfg) < 0)
1416 				goto frontend_detach;
1417 		}
1418 		break;
1419 	case CX88_BOARD_GENIATECH_X8000_MT:
1420 		dev->ts_gen_cntrl = 0x00;
1421 
1422 		fe0->dvb.frontend = dvb_attach(zl10353_attach,
1423 					       &cx88_geniatech_x8000_mt,
1424 					       &core->i2c_adap);
1425 		if (attach_xc3028(0x61, dev) < 0)
1426 			goto frontend_detach;
1427 		break;
1428 	 case CX88_BOARD_KWORLD_ATSC_120:
1429 		fe0->dvb.frontend = dvb_attach(s5h1409_attach,
1430 					       &kworld_atsc_120_config,
1431 					       &core->i2c_adap);
1432 		if (attach_xc3028(0x61, dev) < 0)
1433 			goto frontend_detach;
1434 		break;
1435 	case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD:
1436 		fe0->dvb.frontend = dvb_attach(s5h1411_attach,
1437 					       &dvico_fusionhdtv7_config,
1438 					       &core->i2c_adap);
1439 		if (fe0->dvb.frontend != NULL) {
1440 			if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
1441 					&core->i2c_adap,
1442 					&dvico_fusionhdtv7_tuner_config))
1443 				goto frontend_detach;
1444 		}
1445 		break;
1446 	case CX88_BOARD_HAUPPAUGE_HVR4000:
1447 		/* MFE frontend 1 */
1448 		mfe_shared = 1;
1449 		dev->frontends.gate = 2;
1450 		/* DVB-S/S2 Init */
1451 		fe0->dvb.frontend = dvb_attach(cx24116_attach,
1452 					&hauppauge_hvr4000_config,
1453 					&dev->core->i2c_adap);
1454 		if (fe0->dvb.frontend) {
1455 			if (!dvb_attach(isl6421_attach,
1456 					fe0->dvb.frontend,
1457 					&dev->core->i2c_adap,
1458 					0x08, ISL6421_DCL, 0x00, false))
1459 				goto frontend_detach;
1460 		}
1461 		/* MFE frontend 2 */
1462 		fe1 = vb2_dvb_get_frontend(&dev->frontends, 2);
1463 		if (!fe1)
1464 			goto frontend_detach;
1465 		/* DVB-T Init */
1466 		fe1->dvb.frontend = dvb_attach(cx22702_attach,
1467 					&hauppauge_hvr_config,
1468 					&dev->core->i2c_adap);
1469 		if (fe1->dvb.frontend) {
1470 			fe1->dvb.frontend->id = 1;
1471 			if (!dvb_attach(simple_tuner_attach,
1472 					fe1->dvb.frontend,
1473 					&dev->core->i2c_adap,
1474 					0x61, TUNER_PHILIPS_FMD1216ME_MK3))
1475 				goto frontend_detach;
1476 		}
1477 		break;
1478 	case CX88_BOARD_HAUPPAUGE_HVR4000LITE:
1479 		fe0->dvb.frontend = dvb_attach(cx24116_attach,
1480 					&hauppauge_hvr4000_config,
1481 					&dev->core->i2c_adap);
1482 		if (fe0->dvb.frontend) {
1483 			if (!dvb_attach(isl6421_attach,
1484 					fe0->dvb.frontend,
1485 					&dev->core->i2c_adap,
1486 					0x08, ISL6421_DCL, 0x00, false))
1487 				goto frontend_detach;
1488 		}
1489 		break;
1490 	case CX88_BOARD_PROF_6200:
1491 	case CX88_BOARD_TBS_8910:
1492 	case CX88_BOARD_TEVII_S420:
1493 		fe0->dvb.frontend = dvb_attach(stv0299_attach,
1494 						&tevii_tuner_sharp_config,
1495 						&core->i2c_adap);
1496 		if (fe0->dvb.frontend != NULL) {
1497 			if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x60,
1498 					&core->i2c_adap, DVB_PLL_OPERA1))
1499 				goto frontend_detach;
1500 			core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
1501 			fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
1502 
1503 		} else {
1504 			fe0->dvb.frontend = dvb_attach(stv0288_attach,
1505 							    &tevii_tuner_earda_config,
1506 							    &core->i2c_adap);
1507 			if (fe0->dvb.frontend != NULL) {
1508 				if (!dvb_attach(stb6000_attach, fe0->dvb.frontend, 0x61,
1509 						&core->i2c_adap))
1510 					goto frontend_detach;
1511 				core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
1512 				fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
1513 			}
1514 		}
1515 		break;
1516 	case CX88_BOARD_TEVII_S460:
1517 		fe0->dvb.frontend = dvb_attach(cx24116_attach,
1518 					       &tevii_s460_config,
1519 					       &core->i2c_adap);
1520 		if (fe0->dvb.frontend != NULL)
1521 			fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
1522 		break;
1523 	case CX88_BOARD_TEVII_S464:
1524 		fe0->dvb.frontend = dvb_attach(ds3000_attach,
1525 						&tevii_ds3000_config,
1526 						&core->i2c_adap);
1527 		if (fe0->dvb.frontend != NULL) {
1528 			dvb_attach(ts2020_attach, fe0->dvb.frontend,
1529 				&tevii_ts2020_config, &core->i2c_adap);
1530 			fe0->dvb.frontend->ops.set_voltage =
1531 							tevii_dvbs_set_voltage;
1532 		}
1533 		break;
1534 	case CX88_BOARD_OMICOM_SS4_PCI:
1535 	case CX88_BOARD_TBS_8920:
1536 	case CX88_BOARD_PROF_7300:
1537 	case CX88_BOARD_SATTRADE_ST4200:
1538 		fe0->dvb.frontend = dvb_attach(cx24116_attach,
1539 					       &hauppauge_hvr4000_config,
1540 					       &core->i2c_adap);
1541 		if (fe0->dvb.frontend != NULL)
1542 			fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
1543 		break;
1544 	case CX88_BOARD_TERRATEC_CINERGY_HT_PCI_MKII:
1545 		fe0->dvb.frontend = dvb_attach(zl10353_attach,
1546 					       &cx88_terratec_cinergy_ht_pci_mkii_config,
1547 					       &core->i2c_adap);
1548 		if (fe0->dvb.frontend) {
1549 			fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
1550 			if (attach_xc3028(0x61, dev) < 0)
1551 				goto frontend_detach;
1552 		}
1553 		break;
1554 	case CX88_BOARD_PROF_7301:{
1555 		struct dvb_tuner_ops *tuner_ops = NULL;
1556 
1557 		fe0->dvb.frontend = dvb_attach(stv0900_attach,
1558 						&prof_7301_stv0900_config,
1559 						&core->i2c_adap, 0);
1560 		if (fe0->dvb.frontend != NULL) {
1561 			if (!dvb_attach(stb6100_attach, fe0->dvb.frontend,
1562 					&prof_7301_stb6100_config,
1563 					&core->i2c_adap))
1564 				goto frontend_detach;
1565 
1566 			tuner_ops = &fe0->dvb.frontend->ops.tuner_ops;
1567 			tuner_ops->set_frequency = stb6100_set_freq;
1568 			tuner_ops->get_frequency = stb6100_get_freq;
1569 			tuner_ops->set_bandwidth = stb6100_set_bandw;
1570 			tuner_ops->get_bandwidth = stb6100_get_bandw;
1571 
1572 			core->prev_set_voltage =
1573 					fe0->dvb.frontend->ops.set_voltage;
1574 			fe0->dvb.frontend->ops.set_voltage =
1575 					tevii_dvbs_set_voltage;
1576 		}
1577 		break;
1578 		}
1579 	case CX88_BOARD_SAMSUNG_SMT_7020:
1580 		dev->ts_gen_cntrl = 0x08;
1581 
1582 		cx_set(MO_GP0_IO, 0x0101);
1583 
1584 		cx_clear(MO_GP0_IO, 0x01);
1585 		mdelay(100);
1586 		cx_set(MO_GP0_IO, 0x01);
1587 		mdelay(200);
1588 
1589 		fe0->dvb.frontend = dvb_attach(stv0299_attach,
1590 					&samsung_stv0299_config,
1591 					&dev->core->i2c_adap);
1592 		if (fe0->dvb.frontend) {
1593 			fe0->dvb.frontend->ops.tuner_ops.set_params =
1594 				samsung_smt_7020_tuner_set_params;
1595 			fe0->dvb.frontend->tuner_priv =
1596 				&dev->core->i2c_adap;
1597 			fe0->dvb.frontend->ops.set_voltage =
1598 				samsung_smt_7020_set_voltage;
1599 			fe0->dvb.frontend->ops.set_tone =
1600 				samsung_smt_7020_set_tone;
1601 		}
1602 
1603 		break;
1604 	case CX88_BOARD_TWINHAN_VP1027_DVBS:
1605 		dev->ts_gen_cntrl = 0x00;
1606 		fe0->dvb.frontend = dvb_attach(mb86a16_attach,
1607 						&twinhan_vp1027,
1608 						&core->i2c_adap);
1609 		if (fe0->dvb.frontend) {
1610 			core->prev_set_voltage =
1611 					fe0->dvb.frontend->ops.set_voltage;
1612 			fe0->dvb.frontend->ops.set_voltage =
1613 					vp1027_set_voltage;
1614 		}
1615 		break;
1616 
1617 	default:
1618 		printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card isn't supported yet\n",
1619 		       core->name);
1620 		break;
1621 	}
1622 
1623 	if ( (NULL == fe0->dvb.frontend) || (fe1 && NULL == fe1->dvb.frontend) ) {
1624 		printk(KERN_ERR
1625 		       "%s/2: frontend initialization failed\n",
1626 		       core->name);
1627 		goto frontend_detach;
1628 	}
1629 	/* define general-purpose callback pointer */
1630 	fe0->dvb.frontend->callback = cx88_tuner_callback;
1631 
1632 	/* Ensure all frontends negotiate bus access */
1633 	fe0->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
1634 	if (fe1)
1635 		fe1->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
1636 
1637 	/* Put the analog decoder in standby to keep it quiet */
1638 	call_all(core, core, s_power, 0);
1639 
1640 	/* register everything */
1641 	res = vb2_dvb_register_bus(&dev->frontends, THIS_MODULE, dev,
1642 		&dev->pci->dev, adapter_nr, mfe_shared);
1643 	if (res)
1644 		goto frontend_detach;
1645 	return res;
1646 
1647 frontend_detach:
1648 	core->gate_ctrl = NULL;
1649 	vb2_dvb_dealloc_frontends(&dev->frontends);
1650 	return res;
1651 }
1652 
1653 /* ----------------------------------------------------------- */
1654 
1655 /* CX8802 MPEG -> mini driver - We have been given the hardware */
1656 static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
1657 {
1658 	struct cx88_core *core = drv->core;
1659 	int err = 0;
1660 	dprintk( 1, "%s\n", __func__);
1661 
1662 	switch (core->boardnr) {
1663 	case CX88_BOARD_HAUPPAUGE_HVR1300:
1664 		/* We arrive here with either the cx23416 or the cx22702
1665 		 * on the bus. Take the bus from the cx23416 and enable the
1666 		 * cx22702 demod
1667 		 */
1668 		/* Toggle reset on cx22702 leaving i2c active */
1669 		cx_set(MO_GP0_IO, 0x00000080);
1670 		udelay(1000);
1671 		cx_clear(MO_GP0_IO, 0x00000080);
1672 		udelay(50);
1673 		cx_set(MO_GP0_IO, 0x00000080);
1674 		udelay(1000);
1675 		/* enable the cx22702 pins */
1676 		cx_clear(MO_GP0_IO, 0x00000004);
1677 		udelay(1000);
1678 		break;
1679 
1680 	case CX88_BOARD_HAUPPAUGE_HVR3000:
1681 	case CX88_BOARD_HAUPPAUGE_HVR4000:
1682 		/* Toggle reset on cx22702 leaving i2c active */
1683 		cx_set(MO_GP0_IO, 0x00000080);
1684 		udelay(1000);
1685 		cx_clear(MO_GP0_IO, 0x00000080);
1686 		udelay(50);
1687 		cx_set(MO_GP0_IO, 0x00000080);
1688 		udelay(1000);
1689 		switch (core->dvbdev->frontends.active_fe_id) {
1690 		case 1: /* DVB-S/S2 Enabled */
1691 			/* tri-state the cx22702 pins */
1692 			cx_set(MO_GP0_IO, 0x00000004);
1693 			/* Take the cx24116/cx24123 out of reset */
1694 			cx_write(MO_SRST_IO, 1);
1695 			core->dvbdev->ts_gen_cntrl = 0x02; /* Parallel IO */
1696 			break;
1697 		case 2: /* DVB-T Enabled */
1698 			/* Put the cx24116/cx24123 into reset */
1699 			cx_write(MO_SRST_IO, 0);
1700 			/* enable the cx22702 pins */
1701 			cx_clear(MO_GP0_IO, 0x00000004);
1702 			core->dvbdev->ts_gen_cntrl = 0x0c; /* Serial IO */
1703 			break;
1704 		}
1705 		udelay(1000);
1706 		break;
1707 
1708 	case CX88_BOARD_WINFAST_DTV2000H_PLUS:
1709 		/* set RF input to AIR for DVB-T (GPIO 16) */
1710 		cx_write(MO_GP2_IO, 0x0101);
1711 		break;
1712 
1713 	default:
1714 		err = -ENODEV;
1715 	}
1716 	return err;
1717 }
1718 
1719 /* CX8802 MPEG -> mini driver - We no longer have the hardware */
1720 static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
1721 {
1722 	struct cx88_core *core = drv->core;
1723 	int err = 0;
1724 	dprintk( 1, "%s\n", __func__);
1725 
1726 	switch (core->boardnr) {
1727 	case CX88_BOARD_HAUPPAUGE_HVR1300:
1728 		/* Do Nothing, leave the cx22702 on the bus. */
1729 		break;
1730 	case CX88_BOARD_HAUPPAUGE_HVR3000:
1731 	case CX88_BOARD_HAUPPAUGE_HVR4000:
1732 		break;
1733 	default:
1734 		err = -ENODEV;
1735 	}
1736 	return err;
1737 }
1738 
1739 static int cx8802_dvb_probe(struct cx8802_driver *drv)
1740 {
1741 	struct cx88_core *core = drv->core;
1742 	struct cx8802_dev *dev = drv->core->dvbdev;
1743 	int err;
1744 	struct vb2_dvb_frontend *fe;
1745 	int i;
1746 
1747 	dprintk( 1, "%s\n", __func__);
1748 	dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
1749 		core->boardnr,
1750 		core->name,
1751 		core->pci_bus,
1752 		core->pci_slot);
1753 
1754 	err = -ENODEV;
1755 	if (!(core->board.mpeg & CX88_MPEG_DVB))
1756 		goto fail_core;
1757 
1758 	/* If vp3054 isn't enabled, a stub will just return 0 */
1759 	err = vp3054_i2c_probe(dev);
1760 	if (0 != err)
1761 		goto fail_core;
1762 
1763 	/* dvb stuff */
1764 	printk(KERN_INFO "%s/2: cx2388x based DVB/ATSC card\n", core->name);
1765 	dev->ts_gen_cntrl = 0x0c;
1766 
1767 	err = cx8802_alloc_frontends(dev);
1768 	if (err)
1769 		goto fail_core;
1770 
1771 	err = -ENODEV;
1772 	for (i = 1; i <= core->board.num_frontends; i++) {
1773 		struct vb2_queue *q;
1774 
1775 		fe = vb2_dvb_get_frontend(&core->dvbdev->frontends, i);
1776 		if (fe == NULL) {
1777 			printk(KERN_ERR "%s() failed to get frontend(%d)\n",
1778 					__func__, i);
1779 			goto fail_probe;
1780 		}
1781 		q = &fe->dvb.dvbq;
1782 		q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1783 		q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ;
1784 		q->gfp_flags = GFP_DMA32;
1785 		q->min_buffers_needed = 2;
1786 		q->drv_priv = dev;
1787 		q->buf_struct_size = sizeof(struct cx88_buffer);
1788 		q->ops = &dvb_qops;
1789 		q->mem_ops = &vb2_dma_sg_memops;
1790 		q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1791 		q->lock = &core->lock;
1792 
1793 		err = vb2_queue_init(q);
1794 		if (err < 0)
1795 			goto fail_probe;
1796 
1797 		/* init struct vb2_dvb */
1798 		fe->dvb.name = dev->core->name;
1799 	}
1800 
1801 	err = dvb_register(dev);
1802 	if (err)
1803 		/* frontends/adapter de-allocated in dvb_register */
1804 		printk(KERN_ERR "%s/2: dvb_register failed (err = %d)\n",
1805 		       core->name, err);
1806 	return err;
1807 fail_probe:
1808 	vb2_dvb_dealloc_frontends(&core->dvbdev->frontends);
1809 fail_core:
1810 	return err;
1811 }
1812 
1813 static int cx8802_dvb_remove(struct cx8802_driver *drv)
1814 {
1815 	struct cx88_core *core = drv->core;
1816 	struct cx8802_dev *dev = drv->core->dvbdev;
1817 
1818 	dprintk( 1, "%s\n", __func__);
1819 
1820 	vb2_dvb_unregister_bus(&dev->frontends);
1821 
1822 	vp3054_i2c_remove(dev);
1823 
1824 	core->gate_ctrl = NULL;
1825 
1826 	return 0;
1827 }
1828 
1829 static struct cx8802_driver cx8802_dvb_driver = {
1830 	.type_id        = CX88_MPEG_DVB,
1831 	.hw_access      = CX8802_DRVCTL_SHARED,
1832 	.probe          = cx8802_dvb_probe,
1833 	.remove         = cx8802_dvb_remove,
1834 	.advise_acquire = cx8802_dvb_advise_acquire,
1835 	.advise_release = cx8802_dvb_advise_release,
1836 };
1837 
1838 static int __init dvb_init(void)
1839 {
1840 	printk(KERN_INFO "cx88/2: cx2388x dvb driver version %s loaded\n",
1841 	       CX88_VERSION);
1842 	return cx8802_register_driver(&cx8802_dvb_driver);
1843 }
1844 
1845 static void __exit dvb_fini(void)
1846 {
1847 	cx8802_unregister_driver(&cx8802_dvb_driver);
1848 }
1849 
1850 module_init(dvb_init);
1851 module_exit(dvb_fini);
1852