1 /* 2 * Driver for the Conexant CX23885 PCIe bridge 3 * 4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * 15 * GNU General Public License for more details. 16 */ 17 18 #include <linux/pci.h> 19 #include <linux/i2c.h> 20 #include <linux/kdev_t.h> 21 #include <linux/slab.h> 22 23 #include <media/v4l2-device.h> 24 #include <media/v4l2-fh.h> 25 #include <media/v4l2-ctrls.h> 26 #include <media/tuner.h> 27 #include <media/tveeprom.h> 28 #include <media/videobuf2-dma-sg.h> 29 #include <media/videobuf2-dvb.h> 30 #include <media/rc-core.h> 31 32 #include "cx23885-reg.h" 33 #include "media/drv-intf/cx2341x.h" 34 35 #include <linux/mutex.h> 36 37 #define CX23885_VERSION "0.0.4" 38 39 #define UNSET (-1U) 40 41 #define CX23885_MAXBOARDS 8 42 43 /* Max number of inputs by card */ 44 #define MAX_CX23885_INPUT 8 45 #define INPUT(nr) (&cx23885_boards[dev->board].input[nr]) 46 47 #define BUFFER_TIMEOUT (HZ) /* 0.5 seconds */ 48 49 #define CX23885_BOARD_NOAUTO UNSET 50 #define CX23885_BOARD_UNKNOWN 0 51 #define CX23885_BOARD_HAUPPAUGE_HVR1800lp 1 52 #define CX23885_BOARD_HAUPPAUGE_HVR1800 2 53 #define CX23885_BOARD_HAUPPAUGE_HVR1250 3 54 #define CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP 4 55 #define CX23885_BOARD_HAUPPAUGE_HVR1500Q 5 56 #define CX23885_BOARD_HAUPPAUGE_HVR1500 6 57 #define CX23885_BOARD_HAUPPAUGE_HVR1200 7 58 #define CX23885_BOARD_HAUPPAUGE_HVR1700 8 59 #define CX23885_BOARD_HAUPPAUGE_HVR1400 9 60 #define CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP 10 61 #define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP 11 62 #define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H 12 63 #define CX23885_BOARD_COMPRO_VIDEOMATE_E650F 13 64 #define CX23885_BOARD_TBS_6920 14 65 #define CX23885_BOARD_TEVII_S470 15 66 #define CX23885_BOARD_DVBWORLD_2005 16 67 #define CX23885_BOARD_NETUP_DUAL_DVBS2_CI 17 68 #define CX23885_BOARD_HAUPPAUGE_HVR1270 18 69 #define CX23885_BOARD_HAUPPAUGE_HVR1275 19 70 #define CX23885_BOARD_HAUPPAUGE_HVR1255 20 71 #define CX23885_BOARD_HAUPPAUGE_HVR1210 21 72 #define CX23885_BOARD_MYGICA_X8506 22 73 #define CX23885_BOARD_MAGICPRO_PROHDTVE2 23 74 #define CX23885_BOARD_HAUPPAUGE_HVR1850 24 75 #define CX23885_BOARD_COMPRO_VIDEOMATE_E800 25 76 #define CX23885_BOARD_HAUPPAUGE_HVR1290 26 77 #define CX23885_BOARD_MYGICA_X8558PRO 27 78 #define CX23885_BOARD_LEADTEK_WINFAST_PXTV1200 28 79 #define CX23885_BOARD_GOTVIEW_X5_3D_HYBRID 29 80 #define CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF 30 81 #define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000 31 82 #define CX23885_BOARD_MPX885 32 83 #define CX23885_BOARD_MYGICA_X8507 33 84 #define CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL 34 85 #define CX23885_BOARD_TEVII_S471 35 86 #define CX23885_BOARD_HAUPPAUGE_HVR1255_22111 36 87 #define CX23885_BOARD_PROF_8000 37 88 #define CX23885_BOARD_HAUPPAUGE_HVR4400 38 89 #define CX23885_BOARD_AVERMEDIA_HC81R 39 90 #define CX23885_BOARD_TBS_6981 40 91 #define CX23885_BOARD_TBS_6980 41 92 #define CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200 42 93 #define CX23885_BOARD_HAUPPAUGE_IMPACTVCBE 43 94 #define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2 44 95 #define CX23885_BOARD_DVBSKY_T9580 45 96 #define CX23885_BOARD_DVBSKY_T980C 46 97 #define CX23885_BOARD_DVBSKY_S950C 47 98 #define CX23885_BOARD_TT_CT2_4500_CI 48 99 #define CX23885_BOARD_DVBSKY_S950 49 100 #define CX23885_BOARD_DVBSKY_S952 50 101 #define CX23885_BOARD_DVBSKY_T982 51 102 #define CX23885_BOARD_HAUPPAUGE_HVR5525 52 103 #define CX23885_BOARD_HAUPPAUGE_STARBURST 53 104 #define CX23885_BOARD_VIEWCAST_260E 54 105 #define CX23885_BOARD_VIEWCAST_460E 55 106 #define CX23885_BOARD_HAUPPAUGE_QUADHD_DVB 56 107 #define CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC 57 108 109 #define GPIO_0 0x00000001 110 #define GPIO_1 0x00000002 111 #define GPIO_2 0x00000004 112 #define GPIO_3 0x00000008 113 #define GPIO_4 0x00000010 114 #define GPIO_5 0x00000020 115 #define GPIO_6 0x00000040 116 #define GPIO_7 0x00000080 117 #define GPIO_8 0x00000100 118 #define GPIO_9 0x00000200 119 #define GPIO_10 0x00000400 120 #define GPIO_11 0x00000800 121 #define GPIO_12 0x00001000 122 #define GPIO_13 0x00002000 123 #define GPIO_14 0x00004000 124 #define GPIO_15 0x00008000 125 126 /* Currently unsupported by the driver: PAL/H, NTSC/Kr, SECAM B/G/H/LC */ 127 #define CX23885_NORMS (\ 128 V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_JP | V4L2_STD_NTSC_443 | \ 129 V4L2_STD_PAL_BG | V4L2_STD_PAL_DK | V4L2_STD_PAL_I | \ 130 V4L2_STD_PAL_M | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc | \ 131 V4L2_STD_PAL_60 | V4L2_STD_SECAM_L | V4L2_STD_SECAM_DK) 132 133 struct cx23885_fmt { 134 char *name; 135 u32 fourcc; /* v4l2 format id */ 136 int depth; 137 int flags; 138 u32 cxformat; 139 }; 140 141 struct cx23885_tvnorm { 142 char *name; 143 v4l2_std_id id; 144 u32 cxiformat; 145 u32 cxoformat; 146 }; 147 148 enum cx23885_itype { 149 CX23885_VMUX_COMPOSITE1 = 1, 150 CX23885_VMUX_COMPOSITE2, 151 CX23885_VMUX_COMPOSITE3, 152 CX23885_VMUX_COMPOSITE4, 153 CX23885_VMUX_SVIDEO, 154 CX23885_VMUX_COMPONENT, 155 CX23885_VMUX_TELEVISION, 156 CX23885_VMUX_CABLE, 157 CX23885_VMUX_DVB, 158 CX23885_VMUX_DEBUG, 159 CX23885_RADIO, 160 }; 161 162 enum cx23885_src_sel_type { 163 CX23885_SRC_SEL_EXT_656_VIDEO = 0, 164 CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO 165 }; 166 167 struct cx23885_riscmem { 168 unsigned int size; 169 __le32 *cpu; 170 __le32 *jmp; 171 dma_addr_t dma; 172 }; 173 174 /* buffer for one video frame */ 175 struct cx23885_buffer { 176 /* common v4l buffer stuff -- must be first */ 177 struct vb2_v4l2_buffer vb; 178 struct list_head queue; 179 180 /* cx23885 specific */ 181 unsigned int bpl; 182 struct cx23885_riscmem risc; 183 struct cx23885_fmt *fmt; 184 u32 count; 185 }; 186 187 struct cx23885_input { 188 enum cx23885_itype type; 189 unsigned int vmux; 190 unsigned int amux; 191 u32 gpio0, gpio1, gpio2, gpio3; 192 }; 193 194 typedef enum { 195 CX23885_MPEG_UNDEFINED = 0, 196 CX23885_MPEG_DVB, 197 CX23885_ANALOG_VIDEO, 198 CX23885_MPEG_ENCODER, 199 } port_t; 200 201 struct cx23885_board { 202 char *name; 203 port_t porta, portb, portc; 204 int num_fds_portb, num_fds_portc; 205 unsigned int tuner_type; 206 unsigned int radio_type; 207 unsigned char tuner_addr; 208 unsigned char radio_addr; 209 unsigned int tuner_bus; 210 211 /* Vendors can and do run the PCIe bridge at different 212 * clock rates, driven physically by crystals on the PCBs. 213 * The core has to accommodate this. This allows the user 214 * to add new boards with new frequencys. The value is 215 * expressed in Hz. 216 * 217 * The core framework will default this value based on 218 * current designs, but it can vary. 219 */ 220 u32 clk_freq; 221 struct cx23885_input input[MAX_CX23885_INPUT]; 222 int ci_type; /* for NetUP */ 223 /* Force bottom field first during DMA (888 workaround) */ 224 u32 force_bff; 225 }; 226 227 struct cx23885_subid { 228 u16 subvendor; 229 u16 subdevice; 230 u32 card; 231 }; 232 233 struct cx23885_i2c { 234 struct cx23885_dev *dev; 235 236 int nr; 237 238 /* i2c i/o */ 239 struct i2c_adapter i2c_adap; 240 struct i2c_client i2c_client; 241 u32 i2c_rc; 242 243 /* 885 registers used for raw addess */ 244 u32 i2c_period; 245 u32 reg_ctrl; 246 u32 reg_stat; 247 u32 reg_addr; 248 u32 reg_rdata; 249 u32 reg_wdata; 250 }; 251 252 struct cx23885_dmaqueue { 253 struct list_head active; 254 u32 count; 255 }; 256 257 struct cx23885_tsport { 258 struct cx23885_dev *dev; 259 260 unsigned nr; 261 int sram_chno; 262 263 struct vb2_dvb_frontends frontends; 264 265 /* dma queues */ 266 struct cx23885_dmaqueue mpegq; 267 u32 ts_packet_size; 268 u32 ts_packet_count; 269 270 int width; 271 int height; 272 273 spinlock_t slock; 274 275 /* registers */ 276 u32 reg_gpcnt; 277 u32 reg_gpcnt_ctl; 278 u32 reg_dma_ctl; 279 u32 reg_lngth; 280 u32 reg_hw_sop_ctrl; 281 u32 reg_gen_ctrl; 282 u32 reg_bd_pkt_status; 283 u32 reg_sop_status; 284 u32 reg_fifo_ovfl_stat; 285 u32 reg_vld_misc; 286 u32 reg_ts_clk_en; 287 u32 reg_ts_int_msk; 288 u32 reg_ts_int_stat; 289 u32 reg_src_sel; 290 291 /* Default register vals */ 292 int pci_irqmask; 293 u32 dma_ctl_val; 294 u32 ts_int_msk_val; 295 u32 gen_ctrl_val; 296 u32 ts_clk_en_val; 297 u32 src_sel_val; 298 u32 vld_misc_val; 299 u32 hw_sop_ctrl_val; 300 301 /* Allow a single tsport to have multiple frontends */ 302 u32 num_frontends; 303 void (*gate_ctrl)(struct cx23885_tsport *port, int open); 304 void *port_priv; 305 306 /* Workaround for a temp dvb_frontend that the tuner can attached to */ 307 struct dvb_frontend analog_fe; 308 309 struct i2c_client *i2c_client_demod; 310 struct i2c_client *i2c_client_tuner; 311 struct i2c_client *i2c_client_sec; 312 struct i2c_client *i2c_client_ci; 313 314 int (*set_frontend)(struct dvb_frontend *fe); 315 int (*fe_set_voltage)(struct dvb_frontend *fe, 316 enum fe_sec_voltage voltage); 317 }; 318 319 struct cx23885_kernel_ir { 320 struct cx23885_dev *cx; 321 char *name; 322 char *phys; 323 324 struct rc_dev *rc; 325 }; 326 327 struct cx23885_audio_buffer { 328 unsigned int bpl; 329 struct cx23885_riscmem risc; 330 void *vaddr; 331 struct scatterlist *sglist; 332 int sglen; 333 int nr_pages; 334 }; 335 336 struct cx23885_audio_dev { 337 struct cx23885_dev *dev; 338 339 struct pci_dev *pci; 340 341 struct snd_card *card; 342 343 spinlock_t lock; 344 345 atomic_t count; 346 347 unsigned int dma_size; 348 unsigned int period_size; 349 unsigned int num_periods; 350 351 struct cx23885_audio_buffer *buf; 352 353 struct snd_pcm_substream *substream; 354 }; 355 356 struct cx23885_dev { 357 atomic_t refcount; 358 struct v4l2_device v4l2_dev; 359 struct v4l2_ctrl_handler ctrl_handler; 360 361 /* pci stuff */ 362 struct pci_dev *pci; 363 unsigned char pci_rev, pci_lat; 364 int pci_bus, pci_slot; 365 u32 __iomem *lmmio; 366 u8 __iomem *bmmio; 367 int pci_irqmask; 368 spinlock_t pci_irqmask_lock; /* protects mask reg too */ 369 int hwrevision; 370 371 /* This valud is board specific and is used to configure the 372 * AV core so we see nice clean and stable video and audio. */ 373 u32 clk_freq; 374 375 /* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */ 376 struct cx23885_i2c i2c_bus[3]; 377 378 int nr; 379 struct mutex lock; 380 struct mutex gpio_lock; 381 382 /* board details */ 383 unsigned int board; 384 char name[32]; 385 386 struct cx23885_tsport ts1, ts2; 387 388 /* sram configuration */ 389 struct sram_channel *sram_channels; 390 391 enum { 392 CX23885_BRIDGE_UNDEFINED = 0, 393 CX23885_BRIDGE_885 = 885, 394 CX23885_BRIDGE_887 = 887, 395 CX23885_BRIDGE_888 = 888, 396 } bridge; 397 398 /* Analog video */ 399 unsigned int input; 400 unsigned int audinput; /* Selectable audio input */ 401 u32 tvaudio; 402 v4l2_std_id tvnorm; 403 unsigned int tuner_type; 404 unsigned char tuner_addr; 405 unsigned int tuner_bus; 406 unsigned int radio_type; 407 unsigned char radio_addr; 408 struct v4l2_subdev *sd_cx25840; 409 struct work_struct cx25840_work; 410 411 /* Infrared */ 412 struct v4l2_subdev *sd_ir; 413 struct work_struct ir_rx_work; 414 unsigned long ir_rx_notifications; 415 struct work_struct ir_tx_work; 416 unsigned long ir_tx_notifications; 417 418 struct cx23885_kernel_ir *kernel_ir; 419 atomic_t ir_input_stopping; 420 421 /* V4l */ 422 u32 freq; 423 struct video_device *video_dev; 424 struct video_device *vbi_dev; 425 426 /* video capture */ 427 struct cx23885_fmt *fmt; 428 unsigned int width, height; 429 unsigned field; 430 431 struct cx23885_dmaqueue vidq; 432 struct vb2_queue vb2_vidq; 433 struct cx23885_dmaqueue vbiq; 434 struct vb2_queue vb2_vbiq; 435 436 spinlock_t slock; 437 438 /* MPEG Encoder ONLY settings */ 439 u32 cx23417_mailbox; 440 struct cx2341x_handler cxhdl; 441 struct video_device *v4l_device; 442 struct vb2_queue vb2_mpegq; 443 struct cx23885_tvnorm encodernorm; 444 445 /* Analog raw audio */ 446 struct cx23885_audio_dev *audio_dev; 447 448 }; 449 450 static inline struct cx23885_dev *to_cx23885(struct v4l2_device *v4l2_dev) 451 { 452 return container_of(v4l2_dev, struct cx23885_dev, v4l2_dev); 453 } 454 455 #define call_all(dev, o, f, args...) \ 456 v4l2_device_call_all(&dev->v4l2_dev, 0, o, f, ##args) 457 458 #define CX23885_HW_888_IR (1 << 0) 459 #define CX23885_HW_AV_CORE (1 << 1) 460 461 #define call_hw(dev, grpid, o, f, args...) \ 462 v4l2_device_call_all(&dev->v4l2_dev, grpid, o, f, ##args) 463 464 extern struct v4l2_subdev *cx23885_find_hw(struct cx23885_dev *dev, u32 hw); 465 466 #define SRAM_CH01 0 /* Video A */ 467 #define SRAM_CH02 1 /* VBI A */ 468 #define SRAM_CH03 2 /* Video B */ 469 #define SRAM_CH04 3 /* Transport via B */ 470 #define SRAM_CH05 4 /* VBI B */ 471 #define SRAM_CH06 5 /* Video C */ 472 #define SRAM_CH07 6 /* Transport via C */ 473 #define SRAM_CH08 7 /* Audio Internal A */ 474 #define SRAM_CH09 8 /* Audio Internal B */ 475 #define SRAM_CH10 9 /* Audio External */ 476 #define SRAM_CH11 10 /* COMB_3D_N */ 477 #define SRAM_CH12 11 /* Comb 3D N1 */ 478 #define SRAM_CH13 12 /* Comb 3D N2 */ 479 #define SRAM_CH14 13 /* MOE Vid */ 480 #define SRAM_CH15 14 /* MOE RSLT */ 481 482 struct sram_channel { 483 char *name; 484 u32 cmds_start; 485 u32 ctrl_start; 486 u32 cdt; 487 u32 fifo_start; 488 u32 fifo_size; 489 u32 ptr1_reg; 490 u32 ptr2_reg; 491 u32 cnt1_reg; 492 u32 cnt2_reg; 493 u32 jumponly; 494 }; 495 496 /* ----------------------------------------------------------- */ 497 498 #define cx_read(reg) readl(dev->lmmio + ((reg)>>2)) 499 #define cx_write(reg, value) writel((value), dev->lmmio + ((reg)>>2)) 500 501 #define cx_andor(reg, mask, value) \ 502 writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\ 503 ((value) & (mask)), dev->lmmio+((reg)>>2)) 504 505 #define cx_set(reg, bit) cx_andor((reg), (bit), (bit)) 506 #define cx_clear(reg, bit) cx_andor((reg), (bit), 0) 507 508 /* ----------------------------------------------------------- */ 509 /* cx23885-core.c */ 510 511 extern int cx23885_sram_channel_setup(struct cx23885_dev *dev, 512 struct sram_channel *ch, 513 unsigned int bpl, u32 risc); 514 515 extern void cx23885_sram_channel_dump(struct cx23885_dev *dev, 516 struct sram_channel *ch); 517 518 extern int cx23885_risc_buffer(struct pci_dev *pci, struct cx23885_riscmem *risc, 519 struct scatterlist *sglist, 520 unsigned int top_offset, unsigned int bottom_offset, 521 unsigned int bpl, unsigned int padding, unsigned int lines); 522 523 extern int cx23885_risc_vbibuffer(struct pci_dev *pci, 524 struct cx23885_riscmem *risc, struct scatterlist *sglist, 525 unsigned int top_offset, unsigned int bottom_offset, 526 unsigned int bpl, unsigned int padding, unsigned int lines); 527 528 int cx23885_start_dma(struct cx23885_tsport *port, 529 struct cx23885_dmaqueue *q, 530 struct cx23885_buffer *buf); 531 void cx23885_cancel_buffers(struct cx23885_tsport *port); 532 533 534 extern void cx23885_gpio_set(struct cx23885_dev *dev, u32 mask); 535 extern void cx23885_gpio_clear(struct cx23885_dev *dev, u32 mask); 536 extern u32 cx23885_gpio_get(struct cx23885_dev *dev, u32 mask); 537 extern void cx23885_gpio_enable(struct cx23885_dev *dev, u32 mask, 538 int asoutput); 539 540 extern void cx23885_irq_add_enable(struct cx23885_dev *dev, u32 mask); 541 extern void cx23885_irq_enable(struct cx23885_dev *dev, u32 mask); 542 extern void cx23885_irq_disable(struct cx23885_dev *dev, u32 mask); 543 extern void cx23885_irq_remove(struct cx23885_dev *dev, u32 mask); 544 545 /* ----------------------------------------------------------- */ 546 /* cx23885-cards.c */ 547 extern struct cx23885_board cx23885_boards[]; 548 extern const unsigned int cx23885_bcount; 549 550 extern struct cx23885_subid cx23885_subids[]; 551 extern const unsigned int cx23885_idcount; 552 553 extern int cx23885_tuner_callback(void *priv, int component, 554 int command, int arg); 555 extern void cx23885_card_list(struct cx23885_dev *dev); 556 extern int cx23885_ir_init(struct cx23885_dev *dev); 557 extern void cx23885_ir_pci_int_enable(struct cx23885_dev *dev); 558 extern void cx23885_ir_fini(struct cx23885_dev *dev); 559 extern void cx23885_gpio_setup(struct cx23885_dev *dev); 560 extern void cx23885_card_setup(struct cx23885_dev *dev); 561 extern void cx23885_card_setup_pre_i2c(struct cx23885_dev *dev); 562 563 extern int cx23885_dvb_register(struct cx23885_tsport *port); 564 extern int cx23885_dvb_unregister(struct cx23885_tsport *port); 565 566 extern int cx23885_buf_prepare(struct cx23885_buffer *buf, 567 struct cx23885_tsport *port); 568 extern void cx23885_buf_queue(struct cx23885_tsport *port, 569 struct cx23885_buffer *buf); 570 extern void cx23885_free_buffer(struct cx23885_dev *dev, 571 struct cx23885_buffer *buf); 572 573 /* ----------------------------------------------------------- */ 574 /* cx23885-video.c */ 575 /* Video */ 576 extern int cx23885_video_register(struct cx23885_dev *dev); 577 extern void cx23885_video_unregister(struct cx23885_dev *dev); 578 extern int cx23885_video_irq(struct cx23885_dev *dev, u32 status); 579 extern void cx23885_video_wakeup(struct cx23885_dev *dev, 580 struct cx23885_dmaqueue *q, u32 count); 581 int cx23885_enum_input(struct cx23885_dev *dev, struct v4l2_input *i); 582 int cx23885_set_input(struct file *file, void *priv, unsigned int i); 583 int cx23885_get_input(struct file *file, void *priv, unsigned int *i); 584 int cx23885_set_frequency(struct file *file, void *priv, const struct v4l2_frequency *f); 585 int cx23885_set_tvnorm(struct cx23885_dev *dev, v4l2_std_id norm); 586 587 /* ----------------------------------------------------------- */ 588 /* cx23885-vbi.c */ 589 extern int cx23885_vbi_fmt(struct file *file, void *priv, 590 struct v4l2_format *f); 591 extern void cx23885_vbi_timeout(unsigned long data); 592 extern struct vb2_ops cx23885_vbi_qops; 593 extern int cx23885_vbi_irq(struct cx23885_dev *dev, u32 status); 594 595 /* cx23885-i2c.c */ 596 extern int cx23885_i2c_register(struct cx23885_i2c *bus); 597 extern int cx23885_i2c_unregister(struct cx23885_i2c *bus); 598 extern void cx23885_av_clk(struct cx23885_dev *dev, int enable); 599 600 /* ----------------------------------------------------------- */ 601 /* cx23885-417.c */ 602 extern int cx23885_417_register(struct cx23885_dev *dev); 603 extern void cx23885_417_unregister(struct cx23885_dev *dev); 604 extern int cx23885_irq_417(struct cx23885_dev *dev, u32 status); 605 extern void cx23885_417_check_encoder(struct cx23885_dev *dev); 606 extern void cx23885_mc417_init(struct cx23885_dev *dev); 607 extern int mc417_memory_read(struct cx23885_dev *dev, u32 address, u32 *value); 608 extern int mc417_memory_write(struct cx23885_dev *dev, u32 address, u32 value); 609 extern int mc417_register_read(struct cx23885_dev *dev, 610 u16 address, u32 *value); 611 extern int mc417_register_write(struct cx23885_dev *dev, 612 u16 address, u32 value); 613 extern void mc417_gpio_set(struct cx23885_dev *dev, u32 mask); 614 extern void mc417_gpio_clear(struct cx23885_dev *dev, u32 mask); 615 extern void mc417_gpio_enable(struct cx23885_dev *dev, u32 mask, int asoutput); 616 617 /* ----------------------------------------------------------- */ 618 /* cx23885-alsa.c */ 619 extern struct cx23885_audio_dev *cx23885_audio_register( 620 struct cx23885_dev *dev); 621 extern void cx23885_audio_unregister(struct cx23885_dev *dev); 622 extern int cx23885_audio_irq(struct cx23885_dev *dev, u32 status, u32 mask); 623 extern int cx23885_risc_databuffer(struct pci_dev *pci, 624 struct cx23885_riscmem *risc, 625 struct scatterlist *sglist, 626 unsigned int bpl, 627 unsigned int lines, 628 unsigned int lpi); 629 630 /* ----------------------------------------------------------- */ 631 /* tv norms */ 632 633 static inline unsigned int norm_maxh(v4l2_std_id norm) 634 { 635 return (norm & V4L2_STD_525_60) ? 480 : 576; 636 } 637