1 /* 2 * Driver for the Conexant CX23885 PCIe bridge 3 * 4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * 15 * GNU General Public License for more details. 16 */ 17 18 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 19 20 #include <linux/pci.h> 21 #include <linux/i2c.h> 22 #include <linux/kdev_t.h> 23 #include <linux/slab.h> 24 25 #include <media/v4l2-device.h> 26 #include <media/v4l2-fh.h> 27 #include <media/v4l2-ctrls.h> 28 #include <media/tuner.h> 29 #include <media/tveeprom.h> 30 #include <media/videobuf2-dma-sg.h> 31 #include <media/videobuf2-dvb.h> 32 #include <media/rc-core.h> 33 34 #include "cx23885-reg.h" 35 #include "media/drv-intf/cx2341x.h" 36 37 #include <linux/mutex.h> 38 39 #define CX23885_VERSION "0.0.4" 40 41 #define UNSET (-1U) 42 43 #define CX23885_MAXBOARDS 8 44 45 /* Max number of inputs by card */ 46 #define MAX_CX23885_INPUT 8 47 #define INPUT(nr) (&cx23885_boards[dev->board].input[nr]) 48 49 #define BUFFER_TIMEOUT (HZ) /* 0.5 seconds */ 50 51 #define CX23885_BOARD_NOAUTO UNSET 52 #define CX23885_BOARD_UNKNOWN 0 53 #define CX23885_BOARD_HAUPPAUGE_HVR1800lp 1 54 #define CX23885_BOARD_HAUPPAUGE_HVR1800 2 55 #define CX23885_BOARD_HAUPPAUGE_HVR1250 3 56 #define CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP 4 57 #define CX23885_BOARD_HAUPPAUGE_HVR1500Q 5 58 #define CX23885_BOARD_HAUPPAUGE_HVR1500 6 59 #define CX23885_BOARD_HAUPPAUGE_HVR1200 7 60 #define CX23885_BOARD_HAUPPAUGE_HVR1700 8 61 #define CX23885_BOARD_HAUPPAUGE_HVR1400 9 62 #define CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP 10 63 #define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP 11 64 #define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H 12 65 #define CX23885_BOARD_COMPRO_VIDEOMATE_E650F 13 66 #define CX23885_BOARD_TBS_6920 14 67 #define CX23885_BOARD_TEVII_S470 15 68 #define CX23885_BOARD_DVBWORLD_2005 16 69 #define CX23885_BOARD_NETUP_DUAL_DVBS2_CI 17 70 #define CX23885_BOARD_HAUPPAUGE_HVR1270 18 71 #define CX23885_BOARD_HAUPPAUGE_HVR1275 19 72 #define CX23885_BOARD_HAUPPAUGE_HVR1255 20 73 #define CX23885_BOARD_HAUPPAUGE_HVR1210 21 74 #define CX23885_BOARD_MYGICA_X8506 22 75 #define CX23885_BOARD_MAGICPRO_PROHDTVE2 23 76 #define CX23885_BOARD_HAUPPAUGE_HVR1850 24 77 #define CX23885_BOARD_COMPRO_VIDEOMATE_E800 25 78 #define CX23885_BOARD_HAUPPAUGE_HVR1290 26 79 #define CX23885_BOARD_MYGICA_X8558PRO 27 80 #define CX23885_BOARD_LEADTEK_WINFAST_PXTV1200 28 81 #define CX23885_BOARD_GOTVIEW_X5_3D_HYBRID 29 82 #define CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF 30 83 #define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000 31 84 #define CX23885_BOARD_MPX885 32 85 #define CX23885_BOARD_MYGICA_X8507 33 86 #define CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL 34 87 #define CX23885_BOARD_TEVII_S471 35 88 #define CX23885_BOARD_HAUPPAUGE_HVR1255_22111 36 89 #define CX23885_BOARD_PROF_8000 37 90 #define CX23885_BOARD_HAUPPAUGE_HVR4400 38 91 #define CX23885_BOARD_AVERMEDIA_HC81R 39 92 #define CX23885_BOARD_TBS_6981 40 93 #define CX23885_BOARD_TBS_6980 41 94 #define CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200 42 95 #define CX23885_BOARD_HAUPPAUGE_IMPACTVCBE 43 96 #define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2 44 97 #define CX23885_BOARD_DVBSKY_T9580 45 98 #define CX23885_BOARD_DVBSKY_T980C 46 99 #define CX23885_BOARD_DVBSKY_S950C 47 100 #define CX23885_BOARD_TT_CT2_4500_CI 48 101 #define CX23885_BOARD_DVBSKY_S950 49 102 #define CX23885_BOARD_DVBSKY_S952 50 103 #define CX23885_BOARD_DVBSKY_T982 51 104 #define CX23885_BOARD_HAUPPAUGE_HVR5525 52 105 #define CX23885_BOARD_HAUPPAUGE_STARBURST 53 106 #define CX23885_BOARD_VIEWCAST_260E 54 107 #define CX23885_BOARD_VIEWCAST_460E 55 108 #define CX23885_BOARD_HAUPPAUGE_QUADHD_DVB 56 109 #define CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC 57 110 111 #define GPIO_0 0x00000001 112 #define GPIO_1 0x00000002 113 #define GPIO_2 0x00000004 114 #define GPIO_3 0x00000008 115 #define GPIO_4 0x00000010 116 #define GPIO_5 0x00000020 117 #define GPIO_6 0x00000040 118 #define GPIO_7 0x00000080 119 #define GPIO_8 0x00000100 120 #define GPIO_9 0x00000200 121 #define GPIO_10 0x00000400 122 #define GPIO_11 0x00000800 123 #define GPIO_12 0x00001000 124 #define GPIO_13 0x00002000 125 #define GPIO_14 0x00004000 126 #define GPIO_15 0x00008000 127 128 /* Currently unsupported by the driver: PAL/H, NTSC/Kr, SECAM B/G/H/LC */ 129 #define CX23885_NORMS (\ 130 V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_JP | V4L2_STD_NTSC_443 | \ 131 V4L2_STD_PAL_BG | V4L2_STD_PAL_DK | V4L2_STD_PAL_I | \ 132 V4L2_STD_PAL_M | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc | \ 133 V4L2_STD_PAL_60 | V4L2_STD_SECAM_L | V4L2_STD_SECAM_DK) 134 135 struct cx23885_fmt { 136 char *name; 137 u32 fourcc; /* v4l2 format id */ 138 int depth; 139 int flags; 140 u32 cxformat; 141 }; 142 143 struct cx23885_tvnorm { 144 char *name; 145 v4l2_std_id id; 146 u32 cxiformat; 147 u32 cxoformat; 148 }; 149 150 enum cx23885_itype { 151 CX23885_VMUX_COMPOSITE1 = 1, 152 CX23885_VMUX_COMPOSITE2, 153 CX23885_VMUX_COMPOSITE3, 154 CX23885_VMUX_COMPOSITE4, 155 CX23885_VMUX_SVIDEO, 156 CX23885_VMUX_COMPONENT, 157 CX23885_VMUX_TELEVISION, 158 CX23885_VMUX_CABLE, 159 CX23885_VMUX_DVB, 160 CX23885_VMUX_DEBUG, 161 CX23885_RADIO, 162 }; 163 164 enum cx23885_src_sel_type { 165 CX23885_SRC_SEL_EXT_656_VIDEO = 0, 166 CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO 167 }; 168 169 struct cx23885_riscmem { 170 unsigned int size; 171 __le32 *cpu; 172 __le32 *jmp; 173 dma_addr_t dma; 174 }; 175 176 /* buffer for one video frame */ 177 struct cx23885_buffer { 178 /* common v4l buffer stuff -- must be first */ 179 struct vb2_v4l2_buffer vb; 180 struct list_head queue; 181 182 /* cx23885 specific */ 183 unsigned int bpl; 184 struct cx23885_riscmem risc; 185 struct cx23885_fmt *fmt; 186 u32 count; 187 }; 188 189 struct cx23885_input { 190 enum cx23885_itype type; 191 unsigned int vmux; 192 unsigned int amux; 193 u32 gpio0, gpio1, gpio2, gpio3; 194 }; 195 196 typedef enum { 197 CX23885_MPEG_UNDEFINED = 0, 198 CX23885_MPEG_DVB, 199 CX23885_ANALOG_VIDEO, 200 CX23885_MPEG_ENCODER, 201 } port_t; 202 203 struct cx23885_board { 204 char *name; 205 port_t porta, portb, portc; 206 int num_fds_portb, num_fds_portc; 207 unsigned int tuner_type; 208 unsigned int radio_type; 209 unsigned char tuner_addr; 210 unsigned char radio_addr; 211 unsigned int tuner_bus; 212 213 /* Vendors can and do run the PCIe bridge at different 214 * clock rates, driven physically by crystals on the PCBs. 215 * The core has to accommodate this. This allows the user 216 * to add new boards with new frequencys. The value is 217 * expressed in Hz. 218 * 219 * The core framework will default this value based on 220 * current designs, but it can vary. 221 */ 222 u32 clk_freq; 223 struct cx23885_input input[MAX_CX23885_INPUT]; 224 int ci_type; /* for NetUP */ 225 /* Force bottom field first during DMA (888 workaround) */ 226 u32 force_bff; 227 }; 228 229 struct cx23885_subid { 230 u16 subvendor; 231 u16 subdevice; 232 u32 card; 233 }; 234 235 struct cx23885_i2c { 236 struct cx23885_dev *dev; 237 238 int nr; 239 240 /* i2c i/o */ 241 struct i2c_adapter i2c_adap; 242 struct i2c_client i2c_client; 243 u32 i2c_rc; 244 245 /* 885 registers used for raw addess */ 246 u32 i2c_period; 247 u32 reg_ctrl; 248 u32 reg_stat; 249 u32 reg_addr; 250 u32 reg_rdata; 251 u32 reg_wdata; 252 }; 253 254 struct cx23885_dmaqueue { 255 struct list_head active; 256 u32 count; 257 }; 258 259 struct cx23885_tsport { 260 struct cx23885_dev *dev; 261 262 unsigned nr; 263 int sram_chno; 264 265 struct vb2_dvb_frontends frontends; 266 267 /* dma queues */ 268 struct cx23885_dmaqueue mpegq; 269 u32 ts_packet_size; 270 u32 ts_packet_count; 271 272 int width; 273 int height; 274 275 spinlock_t slock; 276 277 /* registers */ 278 u32 reg_gpcnt; 279 u32 reg_gpcnt_ctl; 280 u32 reg_dma_ctl; 281 u32 reg_lngth; 282 u32 reg_hw_sop_ctrl; 283 u32 reg_gen_ctrl; 284 u32 reg_bd_pkt_status; 285 u32 reg_sop_status; 286 u32 reg_fifo_ovfl_stat; 287 u32 reg_vld_misc; 288 u32 reg_ts_clk_en; 289 u32 reg_ts_int_msk; 290 u32 reg_ts_int_stat; 291 u32 reg_src_sel; 292 293 /* Default register vals */ 294 int pci_irqmask; 295 u32 dma_ctl_val; 296 u32 ts_int_msk_val; 297 u32 gen_ctrl_val; 298 u32 ts_clk_en_val; 299 u32 src_sel_val; 300 u32 vld_misc_val; 301 u32 hw_sop_ctrl_val; 302 303 /* Allow a single tsport to have multiple frontends */ 304 u32 num_frontends; 305 void (*gate_ctrl)(struct cx23885_tsport *port, int open); 306 void *port_priv; 307 308 /* Workaround for a temp dvb_frontend that the tuner can attached to */ 309 struct dvb_frontend analog_fe; 310 311 struct i2c_client *i2c_client_demod; 312 struct i2c_client *i2c_client_tuner; 313 struct i2c_client *i2c_client_sec; 314 struct i2c_client *i2c_client_ci; 315 316 int (*set_frontend)(struct dvb_frontend *fe); 317 int (*fe_set_voltage)(struct dvb_frontend *fe, 318 enum fe_sec_voltage voltage); 319 }; 320 321 struct cx23885_kernel_ir { 322 struct cx23885_dev *cx; 323 char *name; 324 char *phys; 325 326 struct rc_dev *rc; 327 }; 328 329 struct cx23885_audio_buffer { 330 unsigned int bpl; 331 struct cx23885_riscmem risc; 332 void *vaddr; 333 struct scatterlist *sglist; 334 int sglen; 335 int nr_pages; 336 }; 337 338 struct cx23885_audio_dev { 339 struct cx23885_dev *dev; 340 341 struct pci_dev *pci; 342 343 struct snd_card *card; 344 345 spinlock_t lock; 346 347 atomic_t count; 348 349 unsigned int dma_size; 350 unsigned int period_size; 351 unsigned int num_periods; 352 353 struct cx23885_audio_buffer *buf; 354 355 struct snd_pcm_substream *substream; 356 }; 357 358 struct cx23885_dev { 359 atomic_t refcount; 360 struct v4l2_device v4l2_dev; 361 struct v4l2_ctrl_handler ctrl_handler; 362 363 /* pci stuff */ 364 struct pci_dev *pci; 365 unsigned char pci_rev, pci_lat; 366 int pci_bus, pci_slot; 367 u32 __iomem *lmmio; 368 u8 __iomem *bmmio; 369 int pci_irqmask; 370 spinlock_t pci_irqmask_lock; /* protects mask reg too */ 371 int hwrevision; 372 373 /* This valud is board specific and is used to configure the 374 * AV core so we see nice clean and stable video and audio. */ 375 u32 clk_freq; 376 377 /* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */ 378 struct cx23885_i2c i2c_bus[3]; 379 380 int nr; 381 struct mutex lock; 382 struct mutex gpio_lock; 383 384 /* board details */ 385 unsigned int board; 386 char name[32]; 387 388 struct cx23885_tsport ts1, ts2; 389 390 /* sram configuration */ 391 struct sram_channel *sram_channels; 392 393 enum { 394 CX23885_BRIDGE_UNDEFINED = 0, 395 CX23885_BRIDGE_885 = 885, 396 CX23885_BRIDGE_887 = 887, 397 CX23885_BRIDGE_888 = 888, 398 } bridge; 399 400 /* Analog video */ 401 unsigned int input; 402 unsigned int audinput; /* Selectable audio input */ 403 u32 tvaudio; 404 v4l2_std_id tvnorm; 405 unsigned int tuner_type; 406 unsigned char tuner_addr; 407 unsigned int tuner_bus; 408 unsigned int radio_type; 409 unsigned char radio_addr; 410 struct v4l2_subdev *sd_cx25840; 411 struct work_struct cx25840_work; 412 413 /* Infrared */ 414 struct v4l2_subdev *sd_ir; 415 struct work_struct ir_rx_work; 416 unsigned long ir_rx_notifications; 417 struct work_struct ir_tx_work; 418 unsigned long ir_tx_notifications; 419 420 struct cx23885_kernel_ir *kernel_ir; 421 atomic_t ir_input_stopping; 422 423 /* V4l */ 424 u32 freq; 425 struct video_device *video_dev; 426 struct video_device *vbi_dev; 427 428 /* video capture */ 429 struct cx23885_fmt *fmt; 430 unsigned int width, height; 431 unsigned field; 432 433 struct cx23885_dmaqueue vidq; 434 struct vb2_queue vb2_vidq; 435 struct cx23885_dmaqueue vbiq; 436 struct vb2_queue vb2_vbiq; 437 438 spinlock_t slock; 439 440 /* MPEG Encoder ONLY settings */ 441 u32 cx23417_mailbox; 442 struct cx2341x_handler cxhdl; 443 struct video_device *v4l_device; 444 struct vb2_queue vb2_mpegq; 445 struct cx23885_tvnorm encodernorm; 446 447 /* Analog raw audio */ 448 struct cx23885_audio_dev *audio_dev; 449 450 }; 451 452 static inline struct cx23885_dev *to_cx23885(struct v4l2_device *v4l2_dev) 453 { 454 return container_of(v4l2_dev, struct cx23885_dev, v4l2_dev); 455 } 456 457 #define call_all(dev, o, f, args...) \ 458 v4l2_device_call_all(&dev->v4l2_dev, 0, o, f, ##args) 459 460 #define CX23885_HW_888_IR (1 << 0) 461 #define CX23885_HW_AV_CORE (1 << 1) 462 463 #define call_hw(dev, grpid, o, f, args...) \ 464 v4l2_device_call_all(&dev->v4l2_dev, grpid, o, f, ##args) 465 466 extern struct v4l2_subdev *cx23885_find_hw(struct cx23885_dev *dev, u32 hw); 467 468 #define SRAM_CH01 0 /* Video A */ 469 #define SRAM_CH02 1 /* VBI A */ 470 #define SRAM_CH03 2 /* Video B */ 471 #define SRAM_CH04 3 /* Transport via B */ 472 #define SRAM_CH05 4 /* VBI B */ 473 #define SRAM_CH06 5 /* Video C */ 474 #define SRAM_CH07 6 /* Transport via C */ 475 #define SRAM_CH08 7 /* Audio Internal A */ 476 #define SRAM_CH09 8 /* Audio Internal B */ 477 #define SRAM_CH10 9 /* Audio External */ 478 #define SRAM_CH11 10 /* COMB_3D_N */ 479 #define SRAM_CH12 11 /* Comb 3D N1 */ 480 #define SRAM_CH13 12 /* Comb 3D N2 */ 481 #define SRAM_CH14 13 /* MOE Vid */ 482 #define SRAM_CH15 14 /* MOE RSLT */ 483 484 struct sram_channel { 485 char *name; 486 u32 cmds_start; 487 u32 ctrl_start; 488 u32 cdt; 489 u32 fifo_start; 490 u32 fifo_size; 491 u32 ptr1_reg; 492 u32 ptr2_reg; 493 u32 cnt1_reg; 494 u32 cnt2_reg; 495 u32 jumponly; 496 }; 497 498 /* ----------------------------------------------------------- */ 499 500 #define cx_read(reg) readl(dev->lmmio + ((reg)>>2)) 501 #define cx_write(reg, value) writel((value), dev->lmmio + ((reg)>>2)) 502 503 #define cx_andor(reg, mask, value) \ 504 writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\ 505 ((value) & (mask)), dev->lmmio+((reg)>>2)) 506 507 #define cx_set(reg, bit) cx_andor((reg), (bit), (bit)) 508 #define cx_clear(reg, bit) cx_andor((reg), (bit), 0) 509 510 /* ----------------------------------------------------------- */ 511 /* cx23885-core.c */ 512 513 extern int cx23885_sram_channel_setup(struct cx23885_dev *dev, 514 struct sram_channel *ch, 515 unsigned int bpl, u32 risc); 516 517 extern void cx23885_sram_channel_dump(struct cx23885_dev *dev, 518 struct sram_channel *ch); 519 520 extern int cx23885_risc_buffer(struct pci_dev *pci, struct cx23885_riscmem *risc, 521 struct scatterlist *sglist, 522 unsigned int top_offset, unsigned int bottom_offset, 523 unsigned int bpl, unsigned int padding, unsigned int lines); 524 525 extern int cx23885_risc_vbibuffer(struct pci_dev *pci, 526 struct cx23885_riscmem *risc, struct scatterlist *sglist, 527 unsigned int top_offset, unsigned int bottom_offset, 528 unsigned int bpl, unsigned int padding, unsigned int lines); 529 530 int cx23885_start_dma(struct cx23885_tsport *port, 531 struct cx23885_dmaqueue *q, 532 struct cx23885_buffer *buf); 533 void cx23885_cancel_buffers(struct cx23885_tsport *port); 534 535 536 extern void cx23885_gpio_set(struct cx23885_dev *dev, u32 mask); 537 extern void cx23885_gpio_clear(struct cx23885_dev *dev, u32 mask); 538 extern u32 cx23885_gpio_get(struct cx23885_dev *dev, u32 mask); 539 extern void cx23885_gpio_enable(struct cx23885_dev *dev, u32 mask, 540 int asoutput); 541 542 extern void cx23885_irq_add_enable(struct cx23885_dev *dev, u32 mask); 543 extern void cx23885_irq_enable(struct cx23885_dev *dev, u32 mask); 544 extern void cx23885_irq_disable(struct cx23885_dev *dev, u32 mask); 545 extern void cx23885_irq_remove(struct cx23885_dev *dev, u32 mask); 546 547 /* ----------------------------------------------------------- */ 548 /* cx23885-cards.c */ 549 extern struct cx23885_board cx23885_boards[]; 550 extern const unsigned int cx23885_bcount; 551 552 extern struct cx23885_subid cx23885_subids[]; 553 extern const unsigned int cx23885_idcount; 554 555 extern int cx23885_tuner_callback(void *priv, int component, 556 int command, int arg); 557 extern void cx23885_card_list(struct cx23885_dev *dev); 558 extern int cx23885_ir_init(struct cx23885_dev *dev); 559 extern void cx23885_ir_pci_int_enable(struct cx23885_dev *dev); 560 extern void cx23885_ir_fini(struct cx23885_dev *dev); 561 extern void cx23885_gpio_setup(struct cx23885_dev *dev); 562 extern void cx23885_card_setup(struct cx23885_dev *dev); 563 extern void cx23885_card_setup_pre_i2c(struct cx23885_dev *dev); 564 565 extern int cx23885_dvb_register(struct cx23885_tsport *port); 566 extern int cx23885_dvb_unregister(struct cx23885_tsport *port); 567 568 extern int cx23885_buf_prepare(struct cx23885_buffer *buf, 569 struct cx23885_tsport *port); 570 extern void cx23885_buf_queue(struct cx23885_tsport *port, 571 struct cx23885_buffer *buf); 572 extern void cx23885_free_buffer(struct cx23885_dev *dev, 573 struct cx23885_buffer *buf); 574 575 /* ----------------------------------------------------------- */ 576 /* cx23885-video.c */ 577 /* Video */ 578 extern int cx23885_video_register(struct cx23885_dev *dev); 579 extern void cx23885_video_unregister(struct cx23885_dev *dev); 580 extern int cx23885_video_irq(struct cx23885_dev *dev, u32 status); 581 extern void cx23885_video_wakeup(struct cx23885_dev *dev, 582 struct cx23885_dmaqueue *q, u32 count); 583 int cx23885_enum_input(struct cx23885_dev *dev, struct v4l2_input *i); 584 int cx23885_set_input(struct file *file, void *priv, unsigned int i); 585 int cx23885_get_input(struct file *file, void *priv, unsigned int *i); 586 int cx23885_set_frequency(struct file *file, void *priv, const struct v4l2_frequency *f); 587 int cx23885_set_tvnorm(struct cx23885_dev *dev, v4l2_std_id norm); 588 589 /* ----------------------------------------------------------- */ 590 /* cx23885-vbi.c */ 591 extern int cx23885_vbi_fmt(struct file *file, void *priv, 592 struct v4l2_format *f); 593 extern void cx23885_vbi_timeout(unsigned long data); 594 extern struct vb2_ops cx23885_vbi_qops; 595 extern int cx23885_vbi_irq(struct cx23885_dev *dev, u32 status); 596 597 /* cx23885-i2c.c */ 598 extern int cx23885_i2c_register(struct cx23885_i2c *bus); 599 extern int cx23885_i2c_unregister(struct cx23885_i2c *bus); 600 extern void cx23885_av_clk(struct cx23885_dev *dev, int enable); 601 602 /* ----------------------------------------------------------- */ 603 /* cx23885-417.c */ 604 extern int cx23885_417_register(struct cx23885_dev *dev); 605 extern void cx23885_417_unregister(struct cx23885_dev *dev); 606 extern int cx23885_irq_417(struct cx23885_dev *dev, u32 status); 607 extern void cx23885_417_check_encoder(struct cx23885_dev *dev); 608 extern void cx23885_mc417_init(struct cx23885_dev *dev); 609 extern int mc417_memory_read(struct cx23885_dev *dev, u32 address, u32 *value); 610 extern int mc417_memory_write(struct cx23885_dev *dev, u32 address, u32 value); 611 extern int mc417_register_read(struct cx23885_dev *dev, 612 u16 address, u32 *value); 613 extern int mc417_register_write(struct cx23885_dev *dev, 614 u16 address, u32 value); 615 extern void mc417_gpio_set(struct cx23885_dev *dev, u32 mask); 616 extern void mc417_gpio_clear(struct cx23885_dev *dev, u32 mask); 617 extern void mc417_gpio_enable(struct cx23885_dev *dev, u32 mask, int asoutput); 618 619 /* ----------------------------------------------------------- */ 620 /* cx23885-alsa.c */ 621 extern struct cx23885_audio_dev *cx23885_audio_register( 622 struct cx23885_dev *dev); 623 extern void cx23885_audio_unregister(struct cx23885_dev *dev); 624 extern int cx23885_audio_irq(struct cx23885_dev *dev, u32 status, u32 mask); 625 extern int cx23885_risc_databuffer(struct pci_dev *pci, 626 struct cx23885_riscmem *risc, 627 struct scatterlist *sglist, 628 unsigned int bpl, 629 unsigned int lines, 630 unsigned int lpi); 631 632 /* ----------------------------------------------------------- */ 633 /* tv norms */ 634 635 static inline unsigned int norm_maxh(v4l2_std_id norm) 636 { 637 return (norm & V4L2_STD_525_60) ? 480 : 576; 638 } 639