1 /*
2  *  Driver for the Conexant CX23885 PCIe bridge
3  *
4  *  Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
5  *
6  *  This program is free software; you can redistribute it and/or modify
7  *  it under the terms of the GNU General Public License as published by
8  *  the Free Software Foundation; either version 2 of the License, or
9  *  (at your option) any later version.
10  *
11  *  This program is distributed in the hope that it will be useful,
12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  *
15  *  GNU General Public License for more details.
16  *
17  *  You should have received a copy of the GNU General Public License
18  *  along with this program; if not, write to the Free Software
19  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20  */
21 
22 #include <linux/pci.h>
23 #include <linux/i2c.h>
24 #include <linux/kdev_t.h>
25 #include <linux/slab.h>
26 
27 #include <media/v4l2-device.h>
28 #include <media/tuner.h>
29 #include <media/tveeprom.h>
30 #include <media/videobuf-dma-sg.h>
31 #include <media/videobuf-dvb.h>
32 #include <media/rc-core.h>
33 
34 #include "btcx-risc.h"
35 #include "cx23885-reg.h"
36 #include "media/cx2341x.h"
37 
38 #include <linux/mutex.h>
39 
40 #define CX23885_VERSION "0.0.3"
41 
42 #define UNSET (-1U)
43 
44 #define CX23885_MAXBOARDS 8
45 
46 /* Max number of inputs by card */
47 #define MAX_CX23885_INPUT 8
48 #define INPUT(nr) (&cx23885_boards[dev->board].input[nr])
49 #define RESOURCE_OVERLAY       1
50 #define RESOURCE_VIDEO         2
51 #define RESOURCE_VBI           4
52 
53 #define BUFFER_TIMEOUT     (HZ)  /* 0.5 seconds */
54 
55 #define CX23885_BOARD_NOAUTO               UNSET
56 #define CX23885_BOARD_UNKNOWN                  0
57 #define CX23885_BOARD_HAUPPAUGE_HVR1800lp      1
58 #define CX23885_BOARD_HAUPPAUGE_HVR1800        2
59 #define CX23885_BOARD_HAUPPAUGE_HVR1250        3
60 #define CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP   4
61 #define CX23885_BOARD_HAUPPAUGE_HVR1500Q       5
62 #define CX23885_BOARD_HAUPPAUGE_HVR1500        6
63 #define CX23885_BOARD_HAUPPAUGE_HVR1200        7
64 #define CX23885_BOARD_HAUPPAUGE_HVR1700        8
65 #define CX23885_BOARD_HAUPPAUGE_HVR1400        9
66 #define CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP 10
67 #define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP 11
68 #define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H 12
69 #define CX23885_BOARD_COMPRO_VIDEOMATE_E650F   13
70 #define CX23885_BOARD_TBS_6920                 14
71 #define CX23885_BOARD_TEVII_S470               15
72 #define CX23885_BOARD_DVBWORLD_2005            16
73 #define CX23885_BOARD_NETUP_DUAL_DVBS2_CI      17
74 #define CX23885_BOARD_HAUPPAUGE_HVR1270        18
75 #define CX23885_BOARD_HAUPPAUGE_HVR1275        19
76 #define CX23885_BOARD_HAUPPAUGE_HVR1255        20
77 #define CX23885_BOARD_HAUPPAUGE_HVR1210        21
78 #define CX23885_BOARD_MYGICA_X8506             22
79 #define CX23885_BOARD_MAGICPRO_PROHDTVE2       23
80 #define CX23885_BOARD_HAUPPAUGE_HVR1850        24
81 #define CX23885_BOARD_COMPRO_VIDEOMATE_E800    25
82 #define CX23885_BOARD_HAUPPAUGE_HVR1290        26
83 #define CX23885_BOARD_MYGICA_X8558PRO          27
84 #define CX23885_BOARD_LEADTEK_WINFAST_PXTV1200 28
85 #define CX23885_BOARD_GOTVIEW_X5_3D_HYBRID     29
86 #define CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF 30
87 #define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000 31
88 #define CX23885_BOARD_MPX885                   32
89 #define CX23885_BOARD_MYGICA_X8507             33
90 #define CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL 34
91 #define CX23885_BOARD_TEVII_S471               35
92 #define CX23885_BOARD_HAUPPAUGE_HVR1255_22111  36
93 #define CX23885_BOARD_PROF_8000                37
94 #define CX23885_BOARD_HAUPPAUGE_HVR4400        38
95 #define CX23885_BOARD_AVERMEDIA_HC81R          39
96 #define CX23885_BOARD_TBS_6981                 40
97 #define CX23885_BOARD_TBS_6980                 41
98 #define CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200 42
99 
100 #define GPIO_0 0x00000001
101 #define GPIO_1 0x00000002
102 #define GPIO_2 0x00000004
103 #define GPIO_3 0x00000008
104 #define GPIO_4 0x00000010
105 #define GPIO_5 0x00000020
106 #define GPIO_6 0x00000040
107 #define GPIO_7 0x00000080
108 #define GPIO_8 0x00000100
109 #define GPIO_9 0x00000200
110 #define GPIO_10 0x00000400
111 #define GPIO_11 0x00000800
112 #define GPIO_12 0x00001000
113 #define GPIO_13 0x00002000
114 #define GPIO_14 0x00004000
115 #define GPIO_15 0x00008000
116 
117 /* Currently unsupported by the driver: PAL/H, NTSC/Kr, SECAM B/G/H/LC */
118 #define CX23885_NORMS (\
119 	V4L2_STD_NTSC_M |  V4L2_STD_NTSC_M_JP |  V4L2_STD_NTSC_443 | \
120 	V4L2_STD_PAL_BG |  V4L2_STD_PAL_DK    |  V4L2_STD_PAL_I    | \
121 	V4L2_STD_PAL_M  |  V4L2_STD_PAL_N     |  V4L2_STD_PAL_Nc   | \
122 	V4L2_STD_PAL_60 |  V4L2_STD_SECAM_L   |  V4L2_STD_SECAM_DK)
123 
124 struct cx23885_fmt {
125 	char  *name;
126 	u32   fourcc;          /* v4l2 format id */
127 	int   depth;
128 	int   flags;
129 	u32   cxformat;
130 };
131 
132 struct cx23885_ctrl {
133 	struct v4l2_queryctrl v;
134 	u32                   off;
135 	u32                   reg;
136 	u32                   mask;
137 	u32                   shift;
138 };
139 
140 struct cx23885_tvnorm {
141 	char		*name;
142 	v4l2_std_id	id;
143 	u32		cxiformat;
144 	u32		cxoformat;
145 };
146 
147 struct cx23885_fh {
148 	struct cx23885_dev         *dev;
149 	enum v4l2_buf_type         type;
150 	int                        radio;
151 	u32                        resources;
152 
153 	/* video overlay */
154 	struct v4l2_window         win;
155 	struct v4l2_clip           *clips;
156 	unsigned int               nclips;
157 
158 	/* video capture */
159 	struct cx23885_fmt         *fmt;
160 	unsigned int               width, height;
161 
162 	/* vbi capture */
163 	struct videobuf_queue      vidq;
164 	struct videobuf_queue      vbiq;
165 
166 	/* MPEG Encoder specifics ONLY */
167 	struct videobuf_queue      mpegq;
168 	atomic_t                   v4l_reading;
169 };
170 
171 enum cx23885_itype {
172 	CX23885_VMUX_COMPOSITE1 = 1,
173 	CX23885_VMUX_COMPOSITE2,
174 	CX23885_VMUX_COMPOSITE3,
175 	CX23885_VMUX_COMPOSITE4,
176 	CX23885_VMUX_SVIDEO,
177 	CX23885_VMUX_COMPONENT,
178 	CX23885_VMUX_TELEVISION,
179 	CX23885_VMUX_CABLE,
180 	CX23885_VMUX_DVB,
181 	CX23885_VMUX_DEBUG,
182 	CX23885_RADIO,
183 };
184 
185 enum cx23885_src_sel_type {
186 	CX23885_SRC_SEL_EXT_656_VIDEO = 0,
187 	CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO
188 };
189 
190 /* buffer for one video frame */
191 struct cx23885_buffer {
192 	/* common v4l buffer stuff -- must be first */
193 	struct videobuf_buffer vb;
194 
195 	/* cx23885 specific */
196 	unsigned int           bpl;
197 	struct btcx_riscmem    risc;
198 	struct cx23885_fmt     *fmt;
199 	u32                    count;
200 };
201 
202 struct cx23885_input {
203 	enum cx23885_itype type;
204 	unsigned int    vmux;
205 	unsigned int    amux;
206 	u32             gpio0, gpio1, gpio2, gpio3;
207 };
208 
209 typedef enum {
210 	CX23885_MPEG_UNDEFINED = 0,
211 	CX23885_MPEG_DVB,
212 	CX23885_ANALOG_VIDEO,
213 	CX23885_MPEG_ENCODER,
214 } port_t;
215 
216 struct cx23885_board {
217 	char                    *name;
218 	port_t			porta, portb, portc;
219 	int		num_fds_portb, num_fds_portc;
220 	unsigned int		tuner_type;
221 	unsigned int		radio_type;
222 	unsigned char		tuner_addr;
223 	unsigned char		radio_addr;
224 	unsigned int		tuner_bus;
225 
226 	/* Vendors can and do run the PCIe bridge at different
227 	 * clock rates, driven physically by crystals on the PCBs.
228 	 * The core has to accommodate this. This allows the user
229 	 * to add new boards with new frequencys. The value is
230 	 * expressed in Hz.
231 	 *
232 	 * The core framework will default this value based on
233 	 * current designs, but it can vary.
234 	 */
235 	u32			clk_freq;
236 	struct cx23885_input    input[MAX_CX23885_INPUT];
237 	int			ci_type; /* for NetUP */
238 	/* Force bottom field first during DMA (888 workaround) */
239 	u32                     force_bff;
240 };
241 
242 struct cx23885_subid {
243 	u16     subvendor;
244 	u16     subdevice;
245 	u32     card;
246 };
247 
248 struct cx23885_i2c {
249 	struct cx23885_dev *dev;
250 
251 	int                        nr;
252 
253 	/* i2c i/o */
254 	struct i2c_adapter         i2c_adap;
255 	struct i2c_client          i2c_client;
256 	u32                        i2c_rc;
257 
258 	/* 885 registers used for raw addess */
259 	u32                        i2c_period;
260 	u32                        reg_ctrl;
261 	u32                        reg_stat;
262 	u32                        reg_addr;
263 	u32                        reg_rdata;
264 	u32                        reg_wdata;
265 };
266 
267 struct cx23885_dmaqueue {
268 	struct list_head       active;
269 	struct list_head       queued;
270 	struct timer_list      timeout;
271 	struct btcx_riscmem    stopper;
272 	u32                    count;
273 };
274 
275 struct cx23885_tsport {
276 	struct cx23885_dev *dev;
277 
278 	int                        nr;
279 	int                        sram_chno;
280 
281 	struct videobuf_dvb_frontends frontends;
282 
283 	/* dma queues */
284 	struct cx23885_dmaqueue    mpegq;
285 	u32                        ts_packet_size;
286 	u32                        ts_packet_count;
287 
288 	int                        width;
289 	int                        height;
290 
291 	spinlock_t                 slock;
292 
293 	/* registers */
294 	u32                        reg_gpcnt;
295 	u32                        reg_gpcnt_ctl;
296 	u32                        reg_dma_ctl;
297 	u32                        reg_lngth;
298 	u32                        reg_hw_sop_ctrl;
299 	u32                        reg_gen_ctrl;
300 	u32                        reg_bd_pkt_status;
301 	u32                        reg_sop_status;
302 	u32                        reg_fifo_ovfl_stat;
303 	u32                        reg_vld_misc;
304 	u32                        reg_ts_clk_en;
305 	u32                        reg_ts_int_msk;
306 	u32                        reg_ts_int_stat;
307 	u32                        reg_src_sel;
308 
309 	/* Default register vals */
310 	int                        pci_irqmask;
311 	u32                        dma_ctl_val;
312 	u32                        ts_int_msk_val;
313 	u32                        gen_ctrl_val;
314 	u32                        ts_clk_en_val;
315 	u32                        src_sel_val;
316 	u32                        vld_misc_val;
317 	u32                        hw_sop_ctrl_val;
318 
319 	/* Allow a single tsport to have multiple frontends */
320 	u32                        num_frontends;
321 	void                (*gate_ctrl)(struct cx23885_tsport *port, int open);
322 	void                       *port_priv;
323 
324 	/* Workaround for a temp dvb_frontend that the tuner can attached to */
325 	struct dvb_frontend analog_fe;
326 
327 	int (*set_frontend)(struct dvb_frontend *fe);
328 };
329 
330 struct cx23885_kernel_ir {
331 	struct cx23885_dev	*cx;
332 	char			*name;
333 	char			*phys;
334 
335 	struct rc_dev		*rc;
336 };
337 
338 struct cx23885_audio_buffer {
339 	unsigned int		bpl;
340 	struct btcx_riscmem	risc;
341 	struct videobuf_dmabuf	dma;
342 };
343 
344 struct cx23885_audio_dev {
345 	struct cx23885_dev	*dev;
346 
347 	struct pci_dev		*pci;
348 
349 	struct snd_card		*card;
350 
351 	spinlock_t		lock;
352 
353 	atomic_t		count;
354 
355 	unsigned int		dma_size;
356 	unsigned int		period_size;
357 	unsigned int		num_periods;
358 
359 	struct videobuf_dmabuf	*dma_risc;
360 
361 	struct cx23885_audio_buffer   *buf;
362 
363 	struct snd_pcm_substream *substream;
364 };
365 
366 struct cx23885_dev {
367 	atomic_t                   refcount;
368 	struct v4l2_device 	   v4l2_dev;
369 
370 	/* pci stuff */
371 	struct pci_dev             *pci;
372 	unsigned char              pci_rev, pci_lat;
373 	int                        pci_bus, pci_slot;
374 	u32                        __iomem *lmmio;
375 	u8                         __iomem *bmmio;
376 	int                        pci_irqmask;
377 	spinlock_t		   pci_irqmask_lock; /* protects mask reg too */
378 	int                        hwrevision;
379 
380 	/* This valud is board specific and is used to configure the
381 	 * AV core so we see nice clean and stable video and audio. */
382 	u32                        clk_freq;
383 
384 	/* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */
385 	struct cx23885_i2c         i2c_bus[3];
386 
387 	int                        nr;
388 	struct mutex               lock;
389 	struct mutex               gpio_lock;
390 
391 	/* board details */
392 	unsigned int               board;
393 	char                       name[32];
394 
395 	struct cx23885_tsport      ts1, ts2;
396 
397 	/* sram configuration */
398 	struct sram_channel        *sram_channels;
399 
400 	enum {
401 		CX23885_BRIDGE_UNDEFINED = 0,
402 		CX23885_BRIDGE_885 = 885,
403 		CX23885_BRIDGE_887 = 887,
404 		CX23885_BRIDGE_888 = 888,
405 	} bridge;
406 
407 	/* Analog video */
408 	u32                        resources;
409 	unsigned int               input;
410 	unsigned int               audinput; /* Selectable audio input */
411 	u32                        tvaudio;
412 	v4l2_std_id                tvnorm;
413 	unsigned int               tuner_type;
414 	unsigned char              tuner_addr;
415 	unsigned int               tuner_bus;
416 	unsigned int               radio_type;
417 	unsigned char              radio_addr;
418 	unsigned int               has_radio;
419 	struct v4l2_subdev 	   *sd_cx25840;
420 	struct work_struct	   cx25840_work;
421 
422 	/* Infrared */
423 	struct v4l2_subdev         *sd_ir;
424 	struct work_struct	   ir_rx_work;
425 	unsigned long		   ir_rx_notifications;
426 	struct work_struct	   ir_tx_work;
427 	unsigned long		   ir_tx_notifications;
428 
429 	struct cx23885_kernel_ir   *kernel_ir;
430 	atomic_t		   ir_input_stopping;
431 
432 	/* V4l */
433 	u32                        freq;
434 	struct video_device        *video_dev;
435 	struct video_device        *vbi_dev;
436 	struct video_device        *radio_dev;
437 
438 	struct cx23885_dmaqueue    vidq;
439 	struct cx23885_dmaqueue    vbiq;
440 	spinlock_t                 slock;
441 
442 	/* MPEG Encoder ONLY settings */
443 	u32                        cx23417_mailbox;
444 	struct cx2341x_mpeg_params mpeg_params;
445 	struct video_device        *v4l_device;
446 	atomic_t                   v4l_reader_count;
447 	struct cx23885_tvnorm      encodernorm;
448 
449 	/* Analog raw audio */
450 	struct cx23885_audio_dev   *audio_dev;
451 
452 };
453 
454 static inline struct cx23885_dev *to_cx23885(struct v4l2_device *v4l2_dev)
455 {
456 	return container_of(v4l2_dev, struct cx23885_dev, v4l2_dev);
457 }
458 
459 #define call_all(dev, o, f, args...) \
460 	v4l2_device_call_all(&dev->v4l2_dev, 0, o, f, ##args)
461 
462 #define CX23885_HW_888_IR  (1 << 0)
463 #define CX23885_HW_AV_CORE (1 << 1)
464 
465 #define call_hw(dev, grpid, o, f, args...) \
466 	v4l2_device_call_all(&dev->v4l2_dev, grpid, o, f, ##args)
467 
468 extern struct v4l2_subdev *cx23885_find_hw(struct cx23885_dev *dev, u32 hw);
469 
470 #define SRAM_CH01  0 /* Video A */
471 #define SRAM_CH02  1 /* VBI A */
472 #define SRAM_CH03  2 /* Video B */
473 #define SRAM_CH04  3 /* Transport via B */
474 #define SRAM_CH05  4 /* VBI B */
475 #define SRAM_CH06  5 /* Video C */
476 #define SRAM_CH07  6 /* Transport via C */
477 #define SRAM_CH08  7 /* Audio Internal A */
478 #define SRAM_CH09  8 /* Audio Internal B */
479 #define SRAM_CH10  9 /* Audio External */
480 #define SRAM_CH11 10 /* COMB_3D_N */
481 #define SRAM_CH12 11 /* Comb 3D N1 */
482 #define SRAM_CH13 12 /* Comb 3D N2 */
483 #define SRAM_CH14 13 /* MOE Vid */
484 #define SRAM_CH15 14 /* MOE RSLT */
485 
486 struct sram_channel {
487 	char *name;
488 	u32  cmds_start;
489 	u32  ctrl_start;
490 	u32  cdt;
491 	u32  fifo_start;
492 	u32  fifo_size;
493 	u32  ptr1_reg;
494 	u32  ptr2_reg;
495 	u32  cnt1_reg;
496 	u32  cnt2_reg;
497 	u32  jumponly;
498 };
499 
500 /* ----------------------------------------------------------- */
501 
502 #define cx_read(reg)             readl(dev->lmmio + ((reg)>>2))
503 #define cx_write(reg, value)     writel((value), dev->lmmio + ((reg)>>2))
504 
505 #define cx_andor(reg, mask, value) \
506   writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\
507   ((value) & (mask)), dev->lmmio+((reg)>>2))
508 
509 #define cx_set(reg, bit)          cx_andor((reg), (bit), (bit))
510 #define cx_clear(reg, bit)        cx_andor((reg), (bit), 0)
511 
512 /* ----------------------------------------------------------- */
513 /* cx23885-core.c                                              */
514 
515 extern int cx23885_sram_channel_setup(struct cx23885_dev *dev,
516 	struct sram_channel *ch,
517 	unsigned int bpl, u32 risc);
518 
519 extern void cx23885_sram_channel_dump(struct cx23885_dev *dev,
520 	struct sram_channel *ch);
521 
522 extern int cx23885_risc_stopper(struct pci_dev *pci, struct btcx_riscmem *risc,
523 	u32 reg, u32 mask, u32 value);
524 
525 extern int cx23885_risc_buffer(struct pci_dev *pci, struct btcx_riscmem *risc,
526 	struct scatterlist *sglist,
527 	unsigned int top_offset, unsigned int bottom_offset,
528 	unsigned int bpl, unsigned int padding, unsigned int lines);
529 
530 extern int cx23885_risc_vbibuffer(struct pci_dev *pci,
531 	struct btcx_riscmem *risc, struct scatterlist *sglist,
532 	unsigned int top_offset, unsigned int bottom_offset,
533 	unsigned int bpl, unsigned int padding, unsigned int lines);
534 
535 void cx23885_cancel_buffers(struct cx23885_tsport *port);
536 
537 extern int cx23885_restart_queue(struct cx23885_tsport *port,
538 				struct cx23885_dmaqueue *q);
539 
540 extern void cx23885_wakeup(struct cx23885_tsport *port,
541 			   struct cx23885_dmaqueue *q, u32 count);
542 
543 extern void cx23885_gpio_set(struct cx23885_dev *dev, u32 mask);
544 extern void cx23885_gpio_clear(struct cx23885_dev *dev, u32 mask);
545 extern u32 cx23885_gpio_get(struct cx23885_dev *dev, u32 mask);
546 extern void cx23885_gpio_enable(struct cx23885_dev *dev, u32 mask,
547 	int asoutput);
548 
549 extern void cx23885_irq_add_enable(struct cx23885_dev *dev, u32 mask);
550 extern void cx23885_irq_enable(struct cx23885_dev *dev, u32 mask);
551 extern void cx23885_irq_disable(struct cx23885_dev *dev, u32 mask);
552 extern void cx23885_irq_remove(struct cx23885_dev *dev, u32 mask);
553 
554 /* ----------------------------------------------------------- */
555 /* cx23885-cards.c                                             */
556 extern struct cx23885_board cx23885_boards[];
557 extern const unsigned int cx23885_bcount;
558 
559 extern struct cx23885_subid cx23885_subids[];
560 extern const unsigned int cx23885_idcount;
561 
562 extern int cx23885_tuner_callback(void *priv, int component,
563 	int command, int arg);
564 extern void cx23885_card_list(struct cx23885_dev *dev);
565 extern int  cx23885_ir_init(struct cx23885_dev *dev);
566 extern void cx23885_ir_pci_int_enable(struct cx23885_dev *dev);
567 extern void cx23885_ir_fini(struct cx23885_dev *dev);
568 extern void cx23885_gpio_setup(struct cx23885_dev *dev);
569 extern void cx23885_card_setup(struct cx23885_dev *dev);
570 extern void cx23885_card_setup_pre_i2c(struct cx23885_dev *dev);
571 
572 extern int cx23885_dvb_register(struct cx23885_tsport *port);
573 extern int cx23885_dvb_unregister(struct cx23885_tsport *port);
574 
575 extern int cx23885_buf_prepare(struct videobuf_queue *q,
576 			       struct cx23885_tsport *port,
577 			       struct cx23885_buffer *buf,
578 			       enum v4l2_field field);
579 extern void cx23885_buf_queue(struct cx23885_tsport *port,
580 			      struct cx23885_buffer *buf);
581 extern void cx23885_free_buffer(struct videobuf_queue *q,
582 				struct cx23885_buffer *buf);
583 
584 /* ----------------------------------------------------------- */
585 /* cx23885-video.c                                             */
586 /* Video */
587 extern int cx23885_video_register(struct cx23885_dev *dev);
588 extern void cx23885_video_unregister(struct cx23885_dev *dev);
589 extern int cx23885_video_irq(struct cx23885_dev *dev, u32 status);
590 extern void cx23885_video_wakeup(struct cx23885_dev *dev,
591 	struct cx23885_dmaqueue *q, u32 count);
592 int cx23885_enum_input(struct cx23885_dev *dev, struct v4l2_input *i);
593 int cx23885_set_input(struct file *file, void *priv, unsigned int i);
594 int cx23885_get_input(struct file *file, void *priv, unsigned int *i);
595 int cx23885_set_frequency(struct file *file, void *priv, const struct v4l2_frequency *f);
596 int cx23885_set_control(struct cx23885_dev *dev, struct v4l2_control *ctl);
597 int cx23885_get_control(struct cx23885_dev *dev, struct v4l2_control *ctl);
598 int cx23885_set_tvnorm(struct cx23885_dev *dev, v4l2_std_id norm);
599 
600 /* ----------------------------------------------------------- */
601 /* cx23885-vbi.c                                               */
602 extern int cx23885_vbi_fmt(struct file *file, void *priv,
603 	struct v4l2_format *f);
604 extern void cx23885_vbi_timeout(unsigned long data);
605 extern struct videobuf_queue_ops cx23885_vbi_qops;
606 extern int cx23885_restart_vbi_queue(struct cx23885_dev *dev,
607 	struct cx23885_dmaqueue *q);
608 extern int cx23885_vbi_irq(struct cx23885_dev *dev, u32 status);
609 
610 /* cx23885-i2c.c                                                */
611 extern int cx23885_i2c_register(struct cx23885_i2c *bus);
612 extern int cx23885_i2c_unregister(struct cx23885_i2c *bus);
613 extern void cx23885_av_clk(struct cx23885_dev *dev, int enable);
614 
615 /* ----------------------------------------------------------- */
616 /* cx23885-417.c                                               */
617 extern int cx23885_417_register(struct cx23885_dev *dev);
618 extern void cx23885_417_unregister(struct cx23885_dev *dev);
619 extern int cx23885_irq_417(struct cx23885_dev *dev, u32 status);
620 extern void cx23885_417_check_encoder(struct cx23885_dev *dev);
621 extern void cx23885_mc417_init(struct cx23885_dev *dev);
622 extern int mc417_memory_read(struct cx23885_dev *dev, u32 address, u32 *value);
623 extern int mc417_memory_write(struct cx23885_dev *dev, u32 address, u32 value);
624 extern int mc417_register_read(struct cx23885_dev *dev,
625 				u16 address, u32 *value);
626 extern int mc417_register_write(struct cx23885_dev *dev,
627 				u16 address, u32 value);
628 extern void mc417_gpio_set(struct cx23885_dev *dev, u32 mask);
629 extern void mc417_gpio_clear(struct cx23885_dev *dev, u32 mask);
630 extern void mc417_gpio_enable(struct cx23885_dev *dev, u32 mask, int asoutput);
631 
632 /* ----------------------------------------------------------- */
633 /* cx23885-alsa.c                                             */
634 extern struct cx23885_audio_dev *cx23885_audio_register(
635 					struct cx23885_dev *dev);
636 extern void cx23885_audio_unregister(struct cx23885_dev *dev);
637 extern int cx23885_audio_irq(struct cx23885_dev *dev, u32 status, u32 mask);
638 extern int cx23885_risc_databuffer(struct pci_dev *pci,
639 				   struct btcx_riscmem *risc,
640 				   struct scatterlist *sglist,
641 				   unsigned int bpl,
642 				   unsigned int lines,
643 				   unsigned int lpi);
644 
645 /* ----------------------------------------------------------- */
646 /* tv norms                                                    */
647 
648 static inline unsigned int norm_maxw(v4l2_std_id norm)
649 {
650 	return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 720 : 768;
651 }
652 
653 static inline unsigned int norm_maxh(v4l2_std_id norm)
654 {
655 	return (norm & V4L2_STD_625_50) ? 576 : 480;
656 }
657 
658 static inline unsigned int norm_swidth(v4l2_std_id norm)
659 {
660 	return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 754 : 922;
661 }
662