1 /* 2 * Driver for the Conexant CX23885 PCIe bridge 3 * 4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * 15 * GNU General Public License for more details. 16 */ 17 18 #include <linux/pci.h> 19 #include <linux/i2c.h> 20 #include <linux/kdev_t.h> 21 #include <linux/slab.h> 22 23 #include <media/v4l2-device.h> 24 #include <media/v4l2-fh.h> 25 #include <media/v4l2-ctrls.h> 26 #include <media/tuner.h> 27 #include <media/tveeprom.h> 28 #include <media/videobuf2-dma-sg.h> 29 #include <media/videobuf2-dvb.h> 30 #include <media/rc-core.h> 31 32 #include "cx23885-reg.h" 33 #include "media/cx2341x.h" 34 35 #include <linux/mutex.h> 36 37 #define CX23885_VERSION "0.0.4" 38 39 #define UNSET (-1U) 40 41 #define CX23885_MAXBOARDS 8 42 43 /* Max number of inputs by card */ 44 #define MAX_CX23885_INPUT 8 45 #define INPUT(nr) (&cx23885_boards[dev->board].input[nr]) 46 47 #define BUFFER_TIMEOUT (HZ) /* 0.5 seconds */ 48 49 #define CX23885_BOARD_NOAUTO UNSET 50 #define CX23885_BOARD_UNKNOWN 0 51 #define CX23885_BOARD_HAUPPAUGE_HVR1800lp 1 52 #define CX23885_BOARD_HAUPPAUGE_HVR1800 2 53 #define CX23885_BOARD_HAUPPAUGE_HVR1250 3 54 #define CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP 4 55 #define CX23885_BOARD_HAUPPAUGE_HVR1500Q 5 56 #define CX23885_BOARD_HAUPPAUGE_HVR1500 6 57 #define CX23885_BOARD_HAUPPAUGE_HVR1200 7 58 #define CX23885_BOARD_HAUPPAUGE_HVR1700 8 59 #define CX23885_BOARD_HAUPPAUGE_HVR1400 9 60 #define CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP 10 61 #define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP 11 62 #define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H 12 63 #define CX23885_BOARD_COMPRO_VIDEOMATE_E650F 13 64 #define CX23885_BOARD_TBS_6920 14 65 #define CX23885_BOARD_TEVII_S470 15 66 #define CX23885_BOARD_DVBWORLD_2005 16 67 #define CX23885_BOARD_NETUP_DUAL_DVBS2_CI 17 68 #define CX23885_BOARD_HAUPPAUGE_HVR1270 18 69 #define CX23885_BOARD_HAUPPAUGE_HVR1275 19 70 #define CX23885_BOARD_HAUPPAUGE_HVR1255 20 71 #define CX23885_BOARD_HAUPPAUGE_HVR1210 21 72 #define CX23885_BOARD_MYGICA_X8506 22 73 #define CX23885_BOARD_MAGICPRO_PROHDTVE2 23 74 #define CX23885_BOARD_HAUPPAUGE_HVR1850 24 75 #define CX23885_BOARD_COMPRO_VIDEOMATE_E800 25 76 #define CX23885_BOARD_HAUPPAUGE_HVR1290 26 77 #define CX23885_BOARD_MYGICA_X8558PRO 27 78 #define CX23885_BOARD_LEADTEK_WINFAST_PXTV1200 28 79 #define CX23885_BOARD_GOTVIEW_X5_3D_HYBRID 29 80 #define CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF 30 81 #define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000 31 82 #define CX23885_BOARD_MPX885 32 83 #define CX23885_BOARD_MYGICA_X8507 33 84 #define CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL 34 85 #define CX23885_BOARD_TEVII_S471 35 86 #define CX23885_BOARD_HAUPPAUGE_HVR1255_22111 36 87 #define CX23885_BOARD_PROF_8000 37 88 #define CX23885_BOARD_HAUPPAUGE_HVR4400 38 89 #define CX23885_BOARD_AVERMEDIA_HC81R 39 90 #define CX23885_BOARD_TBS_6981 40 91 #define CX23885_BOARD_TBS_6980 41 92 #define CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200 42 93 #define CX23885_BOARD_HAUPPAUGE_IMPACTVCBE 43 94 #define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2 44 95 #define CX23885_BOARD_DVBSKY_T9580 45 96 97 #define GPIO_0 0x00000001 98 #define GPIO_1 0x00000002 99 #define GPIO_2 0x00000004 100 #define GPIO_3 0x00000008 101 #define GPIO_4 0x00000010 102 #define GPIO_5 0x00000020 103 #define GPIO_6 0x00000040 104 #define GPIO_7 0x00000080 105 #define GPIO_8 0x00000100 106 #define GPIO_9 0x00000200 107 #define GPIO_10 0x00000400 108 #define GPIO_11 0x00000800 109 #define GPIO_12 0x00001000 110 #define GPIO_13 0x00002000 111 #define GPIO_14 0x00004000 112 #define GPIO_15 0x00008000 113 114 /* Currently unsupported by the driver: PAL/H, NTSC/Kr, SECAM B/G/H/LC */ 115 #define CX23885_NORMS (\ 116 V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_JP | V4L2_STD_NTSC_443 | \ 117 V4L2_STD_PAL_BG | V4L2_STD_PAL_DK | V4L2_STD_PAL_I | \ 118 V4L2_STD_PAL_M | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc | \ 119 V4L2_STD_PAL_60 | V4L2_STD_SECAM_L | V4L2_STD_SECAM_DK) 120 121 struct cx23885_fmt { 122 char *name; 123 u32 fourcc; /* v4l2 format id */ 124 int depth; 125 int flags; 126 u32 cxformat; 127 }; 128 129 struct cx23885_tvnorm { 130 char *name; 131 v4l2_std_id id; 132 u32 cxiformat; 133 u32 cxoformat; 134 }; 135 136 enum cx23885_itype { 137 CX23885_VMUX_COMPOSITE1 = 1, 138 CX23885_VMUX_COMPOSITE2, 139 CX23885_VMUX_COMPOSITE3, 140 CX23885_VMUX_COMPOSITE4, 141 CX23885_VMUX_SVIDEO, 142 CX23885_VMUX_COMPONENT, 143 CX23885_VMUX_TELEVISION, 144 CX23885_VMUX_CABLE, 145 CX23885_VMUX_DVB, 146 CX23885_VMUX_DEBUG, 147 CX23885_RADIO, 148 }; 149 150 enum cx23885_src_sel_type { 151 CX23885_SRC_SEL_EXT_656_VIDEO = 0, 152 CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO 153 }; 154 155 struct cx23885_riscmem { 156 unsigned int size; 157 __le32 *cpu; 158 __le32 *jmp; 159 dma_addr_t dma; 160 }; 161 162 /* buffer for one video frame */ 163 struct cx23885_buffer { 164 /* common v4l buffer stuff -- must be first */ 165 struct vb2_buffer vb; 166 struct list_head queue; 167 168 /* cx23885 specific */ 169 unsigned int bpl; 170 struct cx23885_riscmem risc; 171 struct cx23885_fmt *fmt; 172 u32 count; 173 }; 174 175 struct cx23885_input { 176 enum cx23885_itype type; 177 unsigned int vmux; 178 unsigned int amux; 179 u32 gpio0, gpio1, gpio2, gpio3; 180 }; 181 182 typedef enum { 183 CX23885_MPEG_UNDEFINED = 0, 184 CX23885_MPEG_DVB, 185 CX23885_ANALOG_VIDEO, 186 CX23885_MPEG_ENCODER, 187 } port_t; 188 189 struct cx23885_board { 190 char *name; 191 port_t porta, portb, portc; 192 int num_fds_portb, num_fds_portc; 193 unsigned int tuner_type; 194 unsigned int radio_type; 195 unsigned char tuner_addr; 196 unsigned char radio_addr; 197 unsigned int tuner_bus; 198 199 /* Vendors can and do run the PCIe bridge at different 200 * clock rates, driven physically by crystals on the PCBs. 201 * The core has to accommodate this. This allows the user 202 * to add new boards with new frequencys. The value is 203 * expressed in Hz. 204 * 205 * The core framework will default this value based on 206 * current designs, but it can vary. 207 */ 208 u32 clk_freq; 209 struct cx23885_input input[MAX_CX23885_INPUT]; 210 int ci_type; /* for NetUP */ 211 /* Force bottom field first during DMA (888 workaround) */ 212 u32 force_bff; 213 }; 214 215 struct cx23885_subid { 216 u16 subvendor; 217 u16 subdevice; 218 u32 card; 219 }; 220 221 struct cx23885_i2c { 222 struct cx23885_dev *dev; 223 224 int nr; 225 226 /* i2c i/o */ 227 struct i2c_adapter i2c_adap; 228 struct i2c_client i2c_client; 229 u32 i2c_rc; 230 231 /* 885 registers used for raw addess */ 232 u32 i2c_period; 233 u32 reg_ctrl; 234 u32 reg_stat; 235 u32 reg_addr; 236 u32 reg_rdata; 237 u32 reg_wdata; 238 }; 239 240 struct cx23885_dmaqueue { 241 struct list_head active; 242 u32 count; 243 }; 244 245 struct cx23885_tsport { 246 struct cx23885_dev *dev; 247 248 int nr; 249 int sram_chno; 250 251 struct vb2_dvb_frontends frontends; 252 253 /* dma queues */ 254 struct cx23885_dmaqueue mpegq; 255 u32 ts_packet_size; 256 u32 ts_packet_count; 257 258 int width; 259 int height; 260 261 spinlock_t slock; 262 263 /* registers */ 264 u32 reg_gpcnt; 265 u32 reg_gpcnt_ctl; 266 u32 reg_dma_ctl; 267 u32 reg_lngth; 268 u32 reg_hw_sop_ctrl; 269 u32 reg_gen_ctrl; 270 u32 reg_bd_pkt_status; 271 u32 reg_sop_status; 272 u32 reg_fifo_ovfl_stat; 273 u32 reg_vld_misc; 274 u32 reg_ts_clk_en; 275 u32 reg_ts_int_msk; 276 u32 reg_ts_int_stat; 277 u32 reg_src_sel; 278 279 /* Default register vals */ 280 int pci_irqmask; 281 u32 dma_ctl_val; 282 u32 ts_int_msk_val; 283 u32 gen_ctrl_val; 284 u32 ts_clk_en_val; 285 u32 src_sel_val; 286 u32 vld_misc_val; 287 u32 hw_sop_ctrl_val; 288 289 /* Allow a single tsport to have multiple frontends */ 290 u32 num_frontends; 291 void (*gate_ctrl)(struct cx23885_tsport *port, int open); 292 void *port_priv; 293 294 /* Workaround for a temp dvb_frontend that the tuner can attached to */ 295 struct dvb_frontend analog_fe; 296 297 struct i2c_client *i2c_client_demod; 298 struct i2c_client *i2c_client_tuner; 299 300 int (*set_frontend)(struct dvb_frontend *fe); 301 int (*fe_set_voltage)(struct dvb_frontend *fe, 302 fe_sec_voltage_t voltage); 303 }; 304 305 struct cx23885_kernel_ir { 306 struct cx23885_dev *cx; 307 char *name; 308 char *phys; 309 310 struct rc_dev *rc; 311 }; 312 313 struct cx23885_audio_buffer { 314 unsigned int bpl; 315 struct cx23885_riscmem risc; 316 void *vaddr; 317 struct scatterlist *sglist; 318 int sglen; 319 int nr_pages; 320 }; 321 322 struct cx23885_audio_dev { 323 struct cx23885_dev *dev; 324 325 struct pci_dev *pci; 326 327 struct snd_card *card; 328 329 spinlock_t lock; 330 331 atomic_t count; 332 333 unsigned int dma_size; 334 unsigned int period_size; 335 unsigned int num_periods; 336 337 struct cx23885_audio_buffer *buf; 338 339 struct snd_pcm_substream *substream; 340 }; 341 342 struct cx23885_dev { 343 atomic_t refcount; 344 struct v4l2_device v4l2_dev; 345 struct v4l2_ctrl_handler ctrl_handler; 346 347 /* pci stuff */ 348 struct pci_dev *pci; 349 unsigned char pci_rev, pci_lat; 350 int pci_bus, pci_slot; 351 u32 __iomem *lmmio; 352 u8 __iomem *bmmio; 353 int pci_irqmask; 354 spinlock_t pci_irqmask_lock; /* protects mask reg too */ 355 int hwrevision; 356 357 /* This valud is board specific and is used to configure the 358 * AV core so we see nice clean and stable video and audio. */ 359 u32 clk_freq; 360 361 /* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */ 362 struct cx23885_i2c i2c_bus[3]; 363 364 int nr; 365 struct mutex lock; 366 struct mutex gpio_lock; 367 368 /* board details */ 369 unsigned int board; 370 char name[32]; 371 372 struct cx23885_tsport ts1, ts2; 373 374 /* sram configuration */ 375 struct sram_channel *sram_channels; 376 377 enum { 378 CX23885_BRIDGE_UNDEFINED = 0, 379 CX23885_BRIDGE_885 = 885, 380 CX23885_BRIDGE_887 = 887, 381 CX23885_BRIDGE_888 = 888, 382 } bridge; 383 384 /* Analog video */ 385 unsigned int input; 386 unsigned int audinput; /* Selectable audio input */ 387 u32 tvaudio; 388 v4l2_std_id tvnorm; 389 unsigned int tuner_type; 390 unsigned char tuner_addr; 391 unsigned int tuner_bus; 392 unsigned int radio_type; 393 unsigned char radio_addr; 394 struct v4l2_subdev *sd_cx25840; 395 struct work_struct cx25840_work; 396 397 /* Infrared */ 398 struct v4l2_subdev *sd_ir; 399 struct work_struct ir_rx_work; 400 unsigned long ir_rx_notifications; 401 struct work_struct ir_tx_work; 402 unsigned long ir_tx_notifications; 403 404 struct cx23885_kernel_ir *kernel_ir; 405 atomic_t ir_input_stopping; 406 407 /* V4l */ 408 u32 freq; 409 struct video_device *video_dev; 410 struct video_device *vbi_dev; 411 412 /* video capture */ 413 struct cx23885_fmt *fmt; 414 unsigned int width, height; 415 unsigned field; 416 417 struct cx23885_dmaqueue vidq; 418 struct vb2_queue vb2_vidq; 419 struct cx23885_dmaqueue vbiq; 420 struct vb2_queue vb2_vbiq; 421 422 spinlock_t slock; 423 424 /* MPEG Encoder ONLY settings */ 425 u32 cx23417_mailbox; 426 struct cx2341x_handler cxhdl; 427 struct video_device *v4l_device; 428 struct vb2_queue vb2_mpegq; 429 struct cx23885_tvnorm encodernorm; 430 431 /* Analog raw audio */ 432 struct cx23885_audio_dev *audio_dev; 433 434 }; 435 436 static inline struct cx23885_dev *to_cx23885(struct v4l2_device *v4l2_dev) 437 { 438 return container_of(v4l2_dev, struct cx23885_dev, v4l2_dev); 439 } 440 441 #define call_all(dev, o, f, args...) \ 442 v4l2_device_call_all(&dev->v4l2_dev, 0, o, f, ##args) 443 444 #define CX23885_HW_888_IR (1 << 0) 445 #define CX23885_HW_AV_CORE (1 << 1) 446 447 #define call_hw(dev, grpid, o, f, args...) \ 448 v4l2_device_call_all(&dev->v4l2_dev, grpid, o, f, ##args) 449 450 extern struct v4l2_subdev *cx23885_find_hw(struct cx23885_dev *dev, u32 hw); 451 452 #define SRAM_CH01 0 /* Video A */ 453 #define SRAM_CH02 1 /* VBI A */ 454 #define SRAM_CH03 2 /* Video B */ 455 #define SRAM_CH04 3 /* Transport via B */ 456 #define SRAM_CH05 4 /* VBI B */ 457 #define SRAM_CH06 5 /* Video C */ 458 #define SRAM_CH07 6 /* Transport via C */ 459 #define SRAM_CH08 7 /* Audio Internal A */ 460 #define SRAM_CH09 8 /* Audio Internal B */ 461 #define SRAM_CH10 9 /* Audio External */ 462 #define SRAM_CH11 10 /* COMB_3D_N */ 463 #define SRAM_CH12 11 /* Comb 3D N1 */ 464 #define SRAM_CH13 12 /* Comb 3D N2 */ 465 #define SRAM_CH14 13 /* MOE Vid */ 466 #define SRAM_CH15 14 /* MOE RSLT */ 467 468 struct sram_channel { 469 char *name; 470 u32 cmds_start; 471 u32 ctrl_start; 472 u32 cdt; 473 u32 fifo_start; 474 u32 fifo_size; 475 u32 ptr1_reg; 476 u32 ptr2_reg; 477 u32 cnt1_reg; 478 u32 cnt2_reg; 479 u32 jumponly; 480 }; 481 482 /* ----------------------------------------------------------- */ 483 484 #define cx_read(reg) readl(dev->lmmio + ((reg)>>2)) 485 #define cx_write(reg, value) writel((value), dev->lmmio + ((reg)>>2)) 486 487 #define cx_andor(reg, mask, value) \ 488 writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\ 489 ((value) & (mask)), dev->lmmio+((reg)>>2)) 490 491 #define cx_set(reg, bit) cx_andor((reg), (bit), (bit)) 492 #define cx_clear(reg, bit) cx_andor((reg), (bit), 0) 493 494 /* ----------------------------------------------------------- */ 495 /* cx23885-core.c */ 496 497 extern int cx23885_sram_channel_setup(struct cx23885_dev *dev, 498 struct sram_channel *ch, 499 unsigned int bpl, u32 risc); 500 501 extern void cx23885_sram_channel_dump(struct cx23885_dev *dev, 502 struct sram_channel *ch); 503 504 extern int cx23885_risc_buffer(struct pci_dev *pci, struct cx23885_riscmem *risc, 505 struct scatterlist *sglist, 506 unsigned int top_offset, unsigned int bottom_offset, 507 unsigned int bpl, unsigned int padding, unsigned int lines); 508 509 extern int cx23885_risc_vbibuffer(struct pci_dev *pci, 510 struct cx23885_riscmem *risc, struct scatterlist *sglist, 511 unsigned int top_offset, unsigned int bottom_offset, 512 unsigned int bpl, unsigned int padding, unsigned int lines); 513 514 int cx23885_start_dma(struct cx23885_tsport *port, 515 struct cx23885_dmaqueue *q, 516 struct cx23885_buffer *buf); 517 void cx23885_cancel_buffers(struct cx23885_tsport *port); 518 519 520 extern void cx23885_gpio_set(struct cx23885_dev *dev, u32 mask); 521 extern void cx23885_gpio_clear(struct cx23885_dev *dev, u32 mask); 522 extern u32 cx23885_gpio_get(struct cx23885_dev *dev, u32 mask); 523 extern void cx23885_gpio_enable(struct cx23885_dev *dev, u32 mask, 524 int asoutput); 525 526 extern void cx23885_irq_add_enable(struct cx23885_dev *dev, u32 mask); 527 extern void cx23885_irq_enable(struct cx23885_dev *dev, u32 mask); 528 extern void cx23885_irq_disable(struct cx23885_dev *dev, u32 mask); 529 extern void cx23885_irq_remove(struct cx23885_dev *dev, u32 mask); 530 531 /* ----------------------------------------------------------- */ 532 /* cx23885-cards.c */ 533 extern struct cx23885_board cx23885_boards[]; 534 extern const unsigned int cx23885_bcount; 535 536 extern struct cx23885_subid cx23885_subids[]; 537 extern const unsigned int cx23885_idcount; 538 539 extern int cx23885_tuner_callback(void *priv, int component, 540 int command, int arg); 541 extern void cx23885_card_list(struct cx23885_dev *dev); 542 extern int cx23885_ir_init(struct cx23885_dev *dev); 543 extern void cx23885_ir_pci_int_enable(struct cx23885_dev *dev); 544 extern void cx23885_ir_fini(struct cx23885_dev *dev); 545 extern void cx23885_gpio_setup(struct cx23885_dev *dev); 546 extern void cx23885_card_setup(struct cx23885_dev *dev); 547 extern void cx23885_card_setup_pre_i2c(struct cx23885_dev *dev); 548 549 extern int cx23885_dvb_register(struct cx23885_tsport *port); 550 extern int cx23885_dvb_unregister(struct cx23885_tsport *port); 551 552 extern int cx23885_buf_prepare(struct cx23885_buffer *buf, 553 struct cx23885_tsport *port); 554 extern void cx23885_buf_queue(struct cx23885_tsport *port, 555 struct cx23885_buffer *buf); 556 extern void cx23885_free_buffer(struct cx23885_dev *dev, 557 struct cx23885_buffer *buf); 558 559 /* ----------------------------------------------------------- */ 560 /* cx23885-video.c */ 561 /* Video */ 562 extern int cx23885_video_register(struct cx23885_dev *dev); 563 extern void cx23885_video_unregister(struct cx23885_dev *dev); 564 extern int cx23885_video_irq(struct cx23885_dev *dev, u32 status); 565 extern void cx23885_video_wakeup(struct cx23885_dev *dev, 566 struct cx23885_dmaqueue *q, u32 count); 567 int cx23885_enum_input(struct cx23885_dev *dev, struct v4l2_input *i); 568 int cx23885_set_input(struct file *file, void *priv, unsigned int i); 569 int cx23885_get_input(struct file *file, void *priv, unsigned int *i); 570 int cx23885_set_frequency(struct file *file, void *priv, const struct v4l2_frequency *f); 571 int cx23885_set_tvnorm(struct cx23885_dev *dev, v4l2_std_id norm); 572 573 /* ----------------------------------------------------------- */ 574 /* cx23885-vbi.c */ 575 extern int cx23885_vbi_fmt(struct file *file, void *priv, 576 struct v4l2_format *f); 577 extern void cx23885_vbi_timeout(unsigned long data); 578 extern struct vb2_ops cx23885_vbi_qops; 579 extern int cx23885_vbi_irq(struct cx23885_dev *dev, u32 status); 580 581 /* cx23885-i2c.c */ 582 extern int cx23885_i2c_register(struct cx23885_i2c *bus); 583 extern int cx23885_i2c_unregister(struct cx23885_i2c *bus); 584 extern void cx23885_av_clk(struct cx23885_dev *dev, int enable); 585 586 /* ----------------------------------------------------------- */ 587 /* cx23885-417.c */ 588 extern int cx23885_417_register(struct cx23885_dev *dev); 589 extern void cx23885_417_unregister(struct cx23885_dev *dev); 590 extern int cx23885_irq_417(struct cx23885_dev *dev, u32 status); 591 extern void cx23885_417_check_encoder(struct cx23885_dev *dev); 592 extern void cx23885_mc417_init(struct cx23885_dev *dev); 593 extern int mc417_memory_read(struct cx23885_dev *dev, u32 address, u32 *value); 594 extern int mc417_memory_write(struct cx23885_dev *dev, u32 address, u32 value); 595 extern int mc417_register_read(struct cx23885_dev *dev, 596 u16 address, u32 *value); 597 extern int mc417_register_write(struct cx23885_dev *dev, 598 u16 address, u32 value); 599 extern void mc417_gpio_set(struct cx23885_dev *dev, u32 mask); 600 extern void mc417_gpio_clear(struct cx23885_dev *dev, u32 mask); 601 extern void mc417_gpio_enable(struct cx23885_dev *dev, u32 mask, int asoutput); 602 603 /* ----------------------------------------------------------- */ 604 /* cx23885-alsa.c */ 605 extern struct cx23885_audio_dev *cx23885_audio_register( 606 struct cx23885_dev *dev); 607 extern void cx23885_audio_unregister(struct cx23885_dev *dev); 608 extern int cx23885_audio_irq(struct cx23885_dev *dev, u32 status, u32 mask); 609 extern int cx23885_risc_databuffer(struct pci_dev *pci, 610 struct cx23885_riscmem *risc, 611 struct scatterlist *sglist, 612 unsigned int bpl, 613 unsigned int lines, 614 unsigned int lpi); 615 616 /* ----------------------------------------------------------- */ 617 /* tv norms */ 618 619 static inline unsigned int norm_maxw(v4l2_std_id norm) 620 { 621 return (norm & V4L2_STD_525_60) ? 720 : 768; 622 } 623 624 static inline unsigned int norm_maxh(v4l2_std_id norm) 625 { 626 return (norm & V4L2_STD_525_60) ? 480 : 576; 627 } 628