1 /* 2 * Driver for the Conexant CX23885 PCIe bridge 3 * 4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * 15 * GNU General Public License for more details. 16 */ 17 18 #include <linux/pci.h> 19 #include <linux/i2c.h> 20 #include <linux/kdev_t.h> 21 #include <linux/slab.h> 22 23 #include <media/v4l2-device.h> 24 #include <media/v4l2-fh.h> 25 #include <media/v4l2-ctrls.h> 26 #include <media/tuner.h> 27 #include <media/tveeprom.h> 28 #include <media/videobuf2-dma-sg.h> 29 #include <media/videobuf2-dvb.h> 30 #include <media/rc-core.h> 31 32 #include "cx23885-reg.h" 33 #include "media/drv-intf/cx2341x.h" 34 35 #include <linux/mutex.h> 36 37 #define CX23885_VERSION "0.0.4" 38 39 #define UNSET (-1U) 40 41 #define CX23885_MAXBOARDS 8 42 43 /* Max number of inputs by card */ 44 #define MAX_CX23885_INPUT 8 45 #define INPUT(nr) (&cx23885_boards[dev->board].input[nr]) 46 47 #define BUFFER_TIMEOUT (HZ) /* 0.5 seconds */ 48 49 #define CX23885_BOARD_NOAUTO UNSET 50 #define CX23885_BOARD_UNKNOWN 0 51 #define CX23885_BOARD_HAUPPAUGE_HVR1800lp 1 52 #define CX23885_BOARD_HAUPPAUGE_HVR1800 2 53 #define CX23885_BOARD_HAUPPAUGE_HVR1250 3 54 #define CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP 4 55 #define CX23885_BOARD_HAUPPAUGE_HVR1500Q 5 56 #define CX23885_BOARD_HAUPPAUGE_HVR1500 6 57 #define CX23885_BOARD_HAUPPAUGE_HVR1200 7 58 #define CX23885_BOARD_HAUPPAUGE_HVR1700 8 59 #define CX23885_BOARD_HAUPPAUGE_HVR1400 9 60 #define CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP 10 61 #define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP 11 62 #define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H 12 63 #define CX23885_BOARD_COMPRO_VIDEOMATE_E650F 13 64 #define CX23885_BOARD_TBS_6920 14 65 #define CX23885_BOARD_TEVII_S470 15 66 #define CX23885_BOARD_DVBWORLD_2005 16 67 #define CX23885_BOARD_NETUP_DUAL_DVBS2_CI 17 68 #define CX23885_BOARD_HAUPPAUGE_HVR1270 18 69 #define CX23885_BOARD_HAUPPAUGE_HVR1275 19 70 #define CX23885_BOARD_HAUPPAUGE_HVR1255 20 71 #define CX23885_BOARD_HAUPPAUGE_HVR1210 21 72 #define CX23885_BOARD_MYGICA_X8506 22 73 #define CX23885_BOARD_MAGICPRO_PROHDTVE2 23 74 #define CX23885_BOARD_HAUPPAUGE_HVR1850 24 75 #define CX23885_BOARD_COMPRO_VIDEOMATE_E800 25 76 #define CX23885_BOARD_HAUPPAUGE_HVR1290 26 77 #define CX23885_BOARD_MYGICA_X8558PRO 27 78 #define CX23885_BOARD_LEADTEK_WINFAST_PXTV1200 28 79 #define CX23885_BOARD_GOTVIEW_X5_3D_HYBRID 29 80 #define CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF 30 81 #define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000 31 82 #define CX23885_BOARD_MPX885 32 83 #define CX23885_BOARD_MYGICA_X8507 33 84 #define CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL 34 85 #define CX23885_BOARD_TEVII_S471 35 86 #define CX23885_BOARD_HAUPPAUGE_HVR1255_22111 36 87 #define CX23885_BOARD_PROF_8000 37 88 #define CX23885_BOARD_HAUPPAUGE_HVR4400 38 89 #define CX23885_BOARD_AVERMEDIA_HC81R 39 90 #define CX23885_BOARD_TBS_6981 40 91 #define CX23885_BOARD_TBS_6980 41 92 #define CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200 42 93 #define CX23885_BOARD_HAUPPAUGE_IMPACTVCBE 43 94 #define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2 44 95 #define CX23885_BOARD_DVBSKY_T9580 45 96 #define CX23885_BOARD_DVBSKY_T980C 46 97 #define CX23885_BOARD_DVBSKY_S950C 47 98 #define CX23885_BOARD_TT_CT2_4500_CI 48 99 #define CX23885_BOARD_DVBSKY_S950 49 100 #define CX23885_BOARD_DVBSKY_S952 50 101 #define CX23885_BOARD_DVBSKY_T982 51 102 #define CX23885_BOARD_HAUPPAUGE_HVR5525 52 103 #define CX23885_BOARD_HAUPPAUGE_STARBURST 53 104 #define CX23885_BOARD_VIEWCAST_260E 54 105 #define CX23885_BOARD_VIEWCAST_460E 55 106 107 #define GPIO_0 0x00000001 108 #define GPIO_1 0x00000002 109 #define GPIO_2 0x00000004 110 #define GPIO_3 0x00000008 111 #define GPIO_4 0x00000010 112 #define GPIO_5 0x00000020 113 #define GPIO_6 0x00000040 114 #define GPIO_7 0x00000080 115 #define GPIO_8 0x00000100 116 #define GPIO_9 0x00000200 117 #define GPIO_10 0x00000400 118 #define GPIO_11 0x00000800 119 #define GPIO_12 0x00001000 120 #define GPIO_13 0x00002000 121 #define GPIO_14 0x00004000 122 #define GPIO_15 0x00008000 123 124 /* Currently unsupported by the driver: PAL/H, NTSC/Kr, SECAM B/G/H/LC */ 125 #define CX23885_NORMS (\ 126 V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_JP | V4L2_STD_NTSC_443 | \ 127 V4L2_STD_PAL_BG | V4L2_STD_PAL_DK | V4L2_STD_PAL_I | \ 128 V4L2_STD_PAL_M | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc | \ 129 V4L2_STD_PAL_60 | V4L2_STD_SECAM_L | V4L2_STD_SECAM_DK) 130 131 struct cx23885_fmt { 132 char *name; 133 u32 fourcc; /* v4l2 format id */ 134 int depth; 135 int flags; 136 u32 cxformat; 137 }; 138 139 struct cx23885_tvnorm { 140 char *name; 141 v4l2_std_id id; 142 u32 cxiformat; 143 u32 cxoformat; 144 }; 145 146 enum cx23885_itype { 147 CX23885_VMUX_COMPOSITE1 = 1, 148 CX23885_VMUX_COMPOSITE2, 149 CX23885_VMUX_COMPOSITE3, 150 CX23885_VMUX_COMPOSITE4, 151 CX23885_VMUX_SVIDEO, 152 CX23885_VMUX_COMPONENT, 153 CX23885_VMUX_TELEVISION, 154 CX23885_VMUX_CABLE, 155 CX23885_VMUX_DVB, 156 CX23885_VMUX_DEBUG, 157 CX23885_RADIO, 158 }; 159 160 enum cx23885_src_sel_type { 161 CX23885_SRC_SEL_EXT_656_VIDEO = 0, 162 CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO 163 }; 164 165 struct cx23885_riscmem { 166 unsigned int size; 167 __le32 *cpu; 168 __le32 *jmp; 169 dma_addr_t dma; 170 }; 171 172 /* buffer for one video frame */ 173 struct cx23885_buffer { 174 /* common v4l buffer stuff -- must be first */ 175 struct vb2_v4l2_buffer vb; 176 struct list_head queue; 177 178 /* cx23885 specific */ 179 unsigned int bpl; 180 struct cx23885_riscmem risc; 181 struct cx23885_fmt *fmt; 182 u32 count; 183 }; 184 185 struct cx23885_input { 186 enum cx23885_itype type; 187 unsigned int vmux; 188 unsigned int amux; 189 u32 gpio0, gpio1, gpio2, gpio3; 190 }; 191 192 typedef enum { 193 CX23885_MPEG_UNDEFINED = 0, 194 CX23885_MPEG_DVB, 195 CX23885_ANALOG_VIDEO, 196 CX23885_MPEG_ENCODER, 197 } port_t; 198 199 struct cx23885_board { 200 char *name; 201 port_t porta, portb, portc; 202 int num_fds_portb, num_fds_portc; 203 unsigned int tuner_type; 204 unsigned int radio_type; 205 unsigned char tuner_addr; 206 unsigned char radio_addr; 207 unsigned int tuner_bus; 208 209 /* Vendors can and do run the PCIe bridge at different 210 * clock rates, driven physically by crystals on the PCBs. 211 * The core has to accommodate this. This allows the user 212 * to add new boards with new frequencys. The value is 213 * expressed in Hz. 214 * 215 * The core framework will default this value based on 216 * current designs, but it can vary. 217 */ 218 u32 clk_freq; 219 struct cx23885_input input[MAX_CX23885_INPUT]; 220 int ci_type; /* for NetUP */ 221 /* Force bottom field first during DMA (888 workaround) */ 222 u32 force_bff; 223 }; 224 225 struct cx23885_subid { 226 u16 subvendor; 227 u16 subdevice; 228 u32 card; 229 }; 230 231 struct cx23885_i2c { 232 struct cx23885_dev *dev; 233 234 int nr; 235 236 /* i2c i/o */ 237 struct i2c_adapter i2c_adap; 238 struct i2c_client i2c_client; 239 u32 i2c_rc; 240 241 /* 885 registers used for raw addess */ 242 u32 i2c_period; 243 u32 reg_ctrl; 244 u32 reg_stat; 245 u32 reg_addr; 246 u32 reg_rdata; 247 u32 reg_wdata; 248 }; 249 250 struct cx23885_dmaqueue { 251 struct list_head active; 252 u32 count; 253 }; 254 255 struct cx23885_tsport { 256 struct cx23885_dev *dev; 257 258 int nr; 259 int sram_chno; 260 261 struct vb2_dvb_frontends frontends; 262 263 /* dma queues */ 264 struct cx23885_dmaqueue mpegq; 265 u32 ts_packet_size; 266 u32 ts_packet_count; 267 268 int width; 269 int height; 270 271 spinlock_t slock; 272 273 /* registers */ 274 u32 reg_gpcnt; 275 u32 reg_gpcnt_ctl; 276 u32 reg_dma_ctl; 277 u32 reg_lngth; 278 u32 reg_hw_sop_ctrl; 279 u32 reg_gen_ctrl; 280 u32 reg_bd_pkt_status; 281 u32 reg_sop_status; 282 u32 reg_fifo_ovfl_stat; 283 u32 reg_vld_misc; 284 u32 reg_ts_clk_en; 285 u32 reg_ts_int_msk; 286 u32 reg_ts_int_stat; 287 u32 reg_src_sel; 288 289 /* Default register vals */ 290 int pci_irqmask; 291 u32 dma_ctl_val; 292 u32 ts_int_msk_val; 293 u32 gen_ctrl_val; 294 u32 ts_clk_en_val; 295 u32 src_sel_val; 296 u32 vld_misc_val; 297 u32 hw_sop_ctrl_val; 298 299 /* Allow a single tsport to have multiple frontends */ 300 u32 num_frontends; 301 void (*gate_ctrl)(struct cx23885_tsport *port, int open); 302 void *port_priv; 303 304 /* Workaround for a temp dvb_frontend that the tuner can attached to */ 305 struct dvb_frontend analog_fe; 306 307 struct i2c_client *i2c_client_demod; 308 struct i2c_client *i2c_client_tuner; 309 struct i2c_client *i2c_client_sec; 310 struct i2c_client *i2c_client_ci; 311 312 int (*set_frontend)(struct dvb_frontend *fe); 313 int (*fe_set_voltage)(struct dvb_frontend *fe, 314 enum fe_sec_voltage voltage); 315 }; 316 317 struct cx23885_kernel_ir { 318 struct cx23885_dev *cx; 319 char *name; 320 char *phys; 321 322 struct rc_dev *rc; 323 }; 324 325 struct cx23885_audio_buffer { 326 unsigned int bpl; 327 struct cx23885_riscmem risc; 328 void *vaddr; 329 struct scatterlist *sglist; 330 int sglen; 331 int nr_pages; 332 }; 333 334 struct cx23885_audio_dev { 335 struct cx23885_dev *dev; 336 337 struct pci_dev *pci; 338 339 struct snd_card *card; 340 341 spinlock_t lock; 342 343 atomic_t count; 344 345 unsigned int dma_size; 346 unsigned int period_size; 347 unsigned int num_periods; 348 349 struct cx23885_audio_buffer *buf; 350 351 struct snd_pcm_substream *substream; 352 }; 353 354 struct cx23885_dev { 355 atomic_t refcount; 356 struct v4l2_device v4l2_dev; 357 struct v4l2_ctrl_handler ctrl_handler; 358 359 /* pci stuff */ 360 struct pci_dev *pci; 361 unsigned char pci_rev, pci_lat; 362 int pci_bus, pci_slot; 363 u32 __iomem *lmmio; 364 u8 __iomem *bmmio; 365 int pci_irqmask; 366 spinlock_t pci_irqmask_lock; /* protects mask reg too */ 367 int hwrevision; 368 369 /* This valud is board specific and is used to configure the 370 * AV core so we see nice clean and stable video and audio. */ 371 u32 clk_freq; 372 373 /* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */ 374 struct cx23885_i2c i2c_bus[3]; 375 376 int nr; 377 struct mutex lock; 378 struct mutex gpio_lock; 379 380 /* board details */ 381 unsigned int board; 382 char name[32]; 383 384 struct cx23885_tsport ts1, ts2; 385 386 /* sram configuration */ 387 struct sram_channel *sram_channels; 388 389 enum { 390 CX23885_BRIDGE_UNDEFINED = 0, 391 CX23885_BRIDGE_885 = 885, 392 CX23885_BRIDGE_887 = 887, 393 CX23885_BRIDGE_888 = 888, 394 } bridge; 395 396 /* Analog video */ 397 unsigned int input; 398 unsigned int audinput; /* Selectable audio input */ 399 u32 tvaudio; 400 v4l2_std_id tvnorm; 401 unsigned int tuner_type; 402 unsigned char tuner_addr; 403 unsigned int tuner_bus; 404 unsigned int radio_type; 405 unsigned char radio_addr; 406 struct v4l2_subdev *sd_cx25840; 407 struct work_struct cx25840_work; 408 409 /* Infrared */ 410 struct v4l2_subdev *sd_ir; 411 struct work_struct ir_rx_work; 412 unsigned long ir_rx_notifications; 413 struct work_struct ir_tx_work; 414 unsigned long ir_tx_notifications; 415 416 struct cx23885_kernel_ir *kernel_ir; 417 atomic_t ir_input_stopping; 418 419 /* V4l */ 420 u32 freq; 421 struct video_device *video_dev; 422 struct video_device *vbi_dev; 423 424 /* video capture */ 425 struct cx23885_fmt *fmt; 426 unsigned int width, height; 427 unsigned field; 428 429 struct cx23885_dmaqueue vidq; 430 struct vb2_queue vb2_vidq; 431 struct cx23885_dmaqueue vbiq; 432 struct vb2_queue vb2_vbiq; 433 void *alloc_ctx; 434 435 spinlock_t slock; 436 437 /* MPEG Encoder ONLY settings */ 438 u32 cx23417_mailbox; 439 struct cx2341x_handler cxhdl; 440 struct video_device *v4l_device; 441 struct vb2_queue vb2_mpegq; 442 struct cx23885_tvnorm encodernorm; 443 444 /* Analog raw audio */ 445 struct cx23885_audio_dev *audio_dev; 446 447 }; 448 449 static inline struct cx23885_dev *to_cx23885(struct v4l2_device *v4l2_dev) 450 { 451 return container_of(v4l2_dev, struct cx23885_dev, v4l2_dev); 452 } 453 454 #define call_all(dev, o, f, args...) \ 455 v4l2_device_call_all(&dev->v4l2_dev, 0, o, f, ##args) 456 457 #define CX23885_HW_888_IR (1 << 0) 458 #define CX23885_HW_AV_CORE (1 << 1) 459 460 #define call_hw(dev, grpid, o, f, args...) \ 461 v4l2_device_call_all(&dev->v4l2_dev, grpid, o, f, ##args) 462 463 extern struct v4l2_subdev *cx23885_find_hw(struct cx23885_dev *dev, u32 hw); 464 465 #define SRAM_CH01 0 /* Video A */ 466 #define SRAM_CH02 1 /* VBI A */ 467 #define SRAM_CH03 2 /* Video B */ 468 #define SRAM_CH04 3 /* Transport via B */ 469 #define SRAM_CH05 4 /* VBI B */ 470 #define SRAM_CH06 5 /* Video C */ 471 #define SRAM_CH07 6 /* Transport via C */ 472 #define SRAM_CH08 7 /* Audio Internal A */ 473 #define SRAM_CH09 8 /* Audio Internal B */ 474 #define SRAM_CH10 9 /* Audio External */ 475 #define SRAM_CH11 10 /* COMB_3D_N */ 476 #define SRAM_CH12 11 /* Comb 3D N1 */ 477 #define SRAM_CH13 12 /* Comb 3D N2 */ 478 #define SRAM_CH14 13 /* MOE Vid */ 479 #define SRAM_CH15 14 /* MOE RSLT */ 480 481 struct sram_channel { 482 char *name; 483 u32 cmds_start; 484 u32 ctrl_start; 485 u32 cdt; 486 u32 fifo_start; 487 u32 fifo_size; 488 u32 ptr1_reg; 489 u32 ptr2_reg; 490 u32 cnt1_reg; 491 u32 cnt2_reg; 492 u32 jumponly; 493 }; 494 495 /* ----------------------------------------------------------- */ 496 497 #define cx_read(reg) readl(dev->lmmio + ((reg)>>2)) 498 #define cx_write(reg, value) writel((value), dev->lmmio + ((reg)>>2)) 499 500 #define cx_andor(reg, mask, value) \ 501 writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\ 502 ((value) & (mask)), dev->lmmio+((reg)>>2)) 503 504 #define cx_set(reg, bit) cx_andor((reg), (bit), (bit)) 505 #define cx_clear(reg, bit) cx_andor((reg), (bit), 0) 506 507 /* ----------------------------------------------------------- */ 508 /* cx23885-core.c */ 509 510 extern int cx23885_sram_channel_setup(struct cx23885_dev *dev, 511 struct sram_channel *ch, 512 unsigned int bpl, u32 risc); 513 514 extern void cx23885_sram_channel_dump(struct cx23885_dev *dev, 515 struct sram_channel *ch); 516 517 extern int cx23885_risc_buffer(struct pci_dev *pci, struct cx23885_riscmem *risc, 518 struct scatterlist *sglist, 519 unsigned int top_offset, unsigned int bottom_offset, 520 unsigned int bpl, unsigned int padding, unsigned int lines); 521 522 extern int cx23885_risc_vbibuffer(struct pci_dev *pci, 523 struct cx23885_riscmem *risc, struct scatterlist *sglist, 524 unsigned int top_offset, unsigned int bottom_offset, 525 unsigned int bpl, unsigned int padding, unsigned int lines); 526 527 int cx23885_start_dma(struct cx23885_tsport *port, 528 struct cx23885_dmaqueue *q, 529 struct cx23885_buffer *buf); 530 void cx23885_cancel_buffers(struct cx23885_tsport *port); 531 532 533 extern void cx23885_gpio_set(struct cx23885_dev *dev, u32 mask); 534 extern void cx23885_gpio_clear(struct cx23885_dev *dev, u32 mask); 535 extern u32 cx23885_gpio_get(struct cx23885_dev *dev, u32 mask); 536 extern void cx23885_gpio_enable(struct cx23885_dev *dev, u32 mask, 537 int asoutput); 538 539 extern void cx23885_irq_add_enable(struct cx23885_dev *dev, u32 mask); 540 extern void cx23885_irq_enable(struct cx23885_dev *dev, u32 mask); 541 extern void cx23885_irq_disable(struct cx23885_dev *dev, u32 mask); 542 extern void cx23885_irq_remove(struct cx23885_dev *dev, u32 mask); 543 544 /* ----------------------------------------------------------- */ 545 /* cx23885-cards.c */ 546 extern struct cx23885_board cx23885_boards[]; 547 extern const unsigned int cx23885_bcount; 548 549 extern struct cx23885_subid cx23885_subids[]; 550 extern const unsigned int cx23885_idcount; 551 552 extern int cx23885_tuner_callback(void *priv, int component, 553 int command, int arg); 554 extern void cx23885_card_list(struct cx23885_dev *dev); 555 extern int cx23885_ir_init(struct cx23885_dev *dev); 556 extern void cx23885_ir_pci_int_enable(struct cx23885_dev *dev); 557 extern void cx23885_ir_fini(struct cx23885_dev *dev); 558 extern void cx23885_gpio_setup(struct cx23885_dev *dev); 559 extern void cx23885_card_setup(struct cx23885_dev *dev); 560 extern void cx23885_card_setup_pre_i2c(struct cx23885_dev *dev); 561 562 extern int cx23885_dvb_register(struct cx23885_tsport *port); 563 extern int cx23885_dvb_unregister(struct cx23885_tsport *port); 564 565 extern int cx23885_buf_prepare(struct cx23885_buffer *buf, 566 struct cx23885_tsport *port); 567 extern void cx23885_buf_queue(struct cx23885_tsport *port, 568 struct cx23885_buffer *buf); 569 extern void cx23885_free_buffer(struct cx23885_dev *dev, 570 struct cx23885_buffer *buf); 571 572 /* ----------------------------------------------------------- */ 573 /* cx23885-video.c */ 574 /* Video */ 575 extern int cx23885_video_register(struct cx23885_dev *dev); 576 extern void cx23885_video_unregister(struct cx23885_dev *dev); 577 extern int cx23885_video_irq(struct cx23885_dev *dev, u32 status); 578 extern void cx23885_video_wakeup(struct cx23885_dev *dev, 579 struct cx23885_dmaqueue *q, u32 count); 580 int cx23885_enum_input(struct cx23885_dev *dev, struct v4l2_input *i); 581 int cx23885_set_input(struct file *file, void *priv, unsigned int i); 582 int cx23885_get_input(struct file *file, void *priv, unsigned int *i); 583 int cx23885_set_frequency(struct file *file, void *priv, const struct v4l2_frequency *f); 584 int cx23885_set_tvnorm(struct cx23885_dev *dev, v4l2_std_id norm); 585 586 /* ----------------------------------------------------------- */ 587 /* cx23885-vbi.c */ 588 extern int cx23885_vbi_fmt(struct file *file, void *priv, 589 struct v4l2_format *f); 590 extern void cx23885_vbi_timeout(unsigned long data); 591 extern struct vb2_ops cx23885_vbi_qops; 592 extern int cx23885_vbi_irq(struct cx23885_dev *dev, u32 status); 593 594 /* cx23885-i2c.c */ 595 extern int cx23885_i2c_register(struct cx23885_i2c *bus); 596 extern int cx23885_i2c_unregister(struct cx23885_i2c *bus); 597 extern void cx23885_av_clk(struct cx23885_dev *dev, int enable); 598 599 /* ----------------------------------------------------------- */ 600 /* cx23885-417.c */ 601 extern int cx23885_417_register(struct cx23885_dev *dev); 602 extern void cx23885_417_unregister(struct cx23885_dev *dev); 603 extern int cx23885_irq_417(struct cx23885_dev *dev, u32 status); 604 extern void cx23885_417_check_encoder(struct cx23885_dev *dev); 605 extern void cx23885_mc417_init(struct cx23885_dev *dev); 606 extern int mc417_memory_read(struct cx23885_dev *dev, u32 address, u32 *value); 607 extern int mc417_memory_write(struct cx23885_dev *dev, u32 address, u32 value); 608 extern int mc417_register_read(struct cx23885_dev *dev, 609 u16 address, u32 *value); 610 extern int mc417_register_write(struct cx23885_dev *dev, 611 u16 address, u32 value); 612 extern void mc417_gpio_set(struct cx23885_dev *dev, u32 mask); 613 extern void mc417_gpio_clear(struct cx23885_dev *dev, u32 mask); 614 extern void mc417_gpio_enable(struct cx23885_dev *dev, u32 mask, int asoutput); 615 616 /* ----------------------------------------------------------- */ 617 /* cx23885-alsa.c */ 618 extern struct cx23885_audio_dev *cx23885_audio_register( 619 struct cx23885_dev *dev); 620 extern void cx23885_audio_unregister(struct cx23885_dev *dev); 621 extern int cx23885_audio_irq(struct cx23885_dev *dev, u32 status, u32 mask); 622 extern int cx23885_risc_databuffer(struct pci_dev *pci, 623 struct cx23885_riscmem *risc, 624 struct scatterlist *sglist, 625 unsigned int bpl, 626 unsigned int lines, 627 unsigned int lpi); 628 629 /* ----------------------------------------------------------- */ 630 /* tv norms */ 631 632 static inline unsigned int norm_maxh(v4l2_std_id norm) 633 { 634 return (norm & V4L2_STD_525_60) ? 480 : 576; 635 } 636