1 /* 2 * Driver for the Conexant CX23885 PCIe bridge 3 * 4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * 15 * GNU General Public License for more details. 16 */ 17 18 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 19 20 #include <linux/pci.h> 21 #include <linux/i2c.h> 22 #include <linux/kdev_t.h> 23 #include <linux/slab.h> 24 25 #include <media/v4l2-device.h> 26 #include <media/v4l2-fh.h> 27 #include <media/v4l2-ctrls.h> 28 #include <media/tuner.h> 29 #include <media/tveeprom.h> 30 #include <media/videobuf2-dma-sg.h> 31 #include <media/videobuf2-dvb.h> 32 #include <media/rc-core.h> 33 34 #include "cx23885-reg.h" 35 #include "media/drv-intf/cx2341x.h" 36 37 #include <linux/mutex.h> 38 39 #define CX23885_VERSION "0.0.4" 40 41 #define UNSET (-1U) 42 43 #define CX23885_MAXBOARDS 8 44 45 /* Max number of inputs by card */ 46 #define MAX_CX23885_INPUT 8 47 #define INPUT(nr) (&cx23885_boards[dev->board].input[nr]) 48 49 #define BUFFER_TIMEOUT (HZ) /* 0.5 seconds */ 50 51 #define CX23885_BOARD_NOAUTO UNSET 52 #define CX23885_BOARD_UNKNOWN 0 53 #define CX23885_BOARD_HAUPPAUGE_HVR1800lp 1 54 #define CX23885_BOARD_HAUPPAUGE_HVR1800 2 55 #define CX23885_BOARD_HAUPPAUGE_HVR1250 3 56 #define CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP 4 57 #define CX23885_BOARD_HAUPPAUGE_HVR1500Q 5 58 #define CX23885_BOARD_HAUPPAUGE_HVR1500 6 59 #define CX23885_BOARD_HAUPPAUGE_HVR1200 7 60 #define CX23885_BOARD_HAUPPAUGE_HVR1700 8 61 #define CX23885_BOARD_HAUPPAUGE_HVR1400 9 62 #define CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP 10 63 #define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP 11 64 #define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H 12 65 #define CX23885_BOARD_COMPRO_VIDEOMATE_E650F 13 66 #define CX23885_BOARD_TBS_6920 14 67 #define CX23885_BOARD_TEVII_S470 15 68 #define CX23885_BOARD_DVBWORLD_2005 16 69 #define CX23885_BOARD_NETUP_DUAL_DVBS2_CI 17 70 #define CX23885_BOARD_HAUPPAUGE_HVR1270 18 71 #define CX23885_BOARD_HAUPPAUGE_HVR1275 19 72 #define CX23885_BOARD_HAUPPAUGE_HVR1255 20 73 #define CX23885_BOARD_HAUPPAUGE_HVR1210 21 74 #define CX23885_BOARD_MYGICA_X8506 22 75 #define CX23885_BOARD_MAGICPRO_PROHDTVE2 23 76 #define CX23885_BOARD_HAUPPAUGE_HVR1850 24 77 #define CX23885_BOARD_COMPRO_VIDEOMATE_E800 25 78 #define CX23885_BOARD_HAUPPAUGE_HVR1290 26 79 #define CX23885_BOARD_MYGICA_X8558PRO 27 80 #define CX23885_BOARD_LEADTEK_WINFAST_PXTV1200 28 81 #define CX23885_BOARD_GOTVIEW_X5_3D_HYBRID 29 82 #define CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF 30 83 #define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000 31 84 #define CX23885_BOARD_MPX885 32 85 #define CX23885_BOARD_MYGICA_X8507 33 86 #define CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL 34 87 #define CX23885_BOARD_TEVII_S471 35 88 #define CX23885_BOARD_HAUPPAUGE_HVR1255_22111 36 89 #define CX23885_BOARD_PROF_8000 37 90 #define CX23885_BOARD_HAUPPAUGE_HVR4400 38 91 #define CX23885_BOARD_AVERMEDIA_HC81R 39 92 #define CX23885_BOARD_TBS_6981 40 93 #define CX23885_BOARD_TBS_6980 41 94 #define CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200 42 95 #define CX23885_BOARD_HAUPPAUGE_IMPACTVCBE 43 96 #define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2 44 97 #define CX23885_BOARD_DVBSKY_T9580 45 98 #define CX23885_BOARD_DVBSKY_T980C 46 99 #define CX23885_BOARD_DVBSKY_S950C 47 100 #define CX23885_BOARD_TT_CT2_4500_CI 48 101 #define CX23885_BOARD_DVBSKY_S950 49 102 #define CX23885_BOARD_DVBSKY_S952 50 103 #define CX23885_BOARD_DVBSKY_T982 51 104 #define CX23885_BOARD_HAUPPAUGE_HVR5525 52 105 #define CX23885_BOARD_HAUPPAUGE_STARBURST 53 106 #define CX23885_BOARD_VIEWCAST_260E 54 107 #define CX23885_BOARD_VIEWCAST_460E 55 108 #define CX23885_BOARD_HAUPPAUGE_QUADHD_DVB 56 109 #define CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC 57 110 #define CX23885_BOARD_HAUPPAUGE_HVR1265_K4 58 111 #define CX23885_BOARD_HAUPPAUGE_STARBURST2 59 112 #define CX23885_BOARD_HAUPPAUGE_QUADHD_DVB_885 60 113 #define CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC_885 61 114 115 #define GPIO_0 0x00000001 116 #define GPIO_1 0x00000002 117 #define GPIO_2 0x00000004 118 #define GPIO_3 0x00000008 119 #define GPIO_4 0x00000010 120 #define GPIO_5 0x00000020 121 #define GPIO_6 0x00000040 122 #define GPIO_7 0x00000080 123 #define GPIO_8 0x00000100 124 #define GPIO_9 0x00000200 125 #define GPIO_10 0x00000400 126 #define GPIO_11 0x00000800 127 #define GPIO_12 0x00001000 128 #define GPIO_13 0x00002000 129 #define GPIO_14 0x00004000 130 #define GPIO_15 0x00008000 131 132 /* Currently unsupported by the driver: PAL/H, NTSC/Kr, SECAM B/G/H/LC */ 133 #define CX23885_NORMS (\ 134 V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_JP | V4L2_STD_NTSC_443 | \ 135 V4L2_STD_PAL_BG | V4L2_STD_PAL_DK | V4L2_STD_PAL_I | \ 136 V4L2_STD_PAL_M | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc | \ 137 V4L2_STD_PAL_60 | V4L2_STD_SECAM_L | V4L2_STD_SECAM_DK) 138 139 struct cx23885_fmt { 140 char *name; 141 u32 fourcc; /* v4l2 format id */ 142 int depth; 143 int flags; 144 u32 cxformat; 145 }; 146 147 struct cx23885_tvnorm { 148 char *name; 149 v4l2_std_id id; 150 u32 cxiformat; 151 u32 cxoformat; 152 }; 153 154 enum cx23885_itype { 155 CX23885_VMUX_COMPOSITE1 = 1, 156 CX23885_VMUX_COMPOSITE2, 157 CX23885_VMUX_COMPOSITE3, 158 CX23885_VMUX_COMPOSITE4, 159 CX23885_VMUX_SVIDEO, 160 CX23885_VMUX_COMPONENT, 161 CX23885_VMUX_TELEVISION, 162 CX23885_VMUX_CABLE, 163 CX23885_VMUX_DVB, 164 CX23885_VMUX_DEBUG, 165 CX23885_RADIO, 166 }; 167 168 enum cx23885_src_sel_type { 169 CX23885_SRC_SEL_EXT_656_VIDEO = 0, 170 CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO 171 }; 172 173 struct cx23885_riscmem { 174 unsigned int size; 175 __le32 *cpu; 176 __le32 *jmp; 177 dma_addr_t dma; 178 }; 179 180 /* buffer for one video frame */ 181 struct cx23885_buffer { 182 /* common v4l buffer stuff -- must be first */ 183 struct vb2_v4l2_buffer vb; 184 struct list_head queue; 185 186 /* cx23885 specific */ 187 unsigned int bpl; 188 struct cx23885_riscmem risc; 189 struct cx23885_fmt *fmt; 190 u32 count; 191 }; 192 193 struct cx23885_input { 194 enum cx23885_itype type; 195 unsigned int vmux; 196 unsigned int amux; 197 u32 gpio0, gpio1, gpio2, gpio3; 198 }; 199 200 typedef enum { 201 CX23885_MPEG_UNDEFINED = 0, 202 CX23885_MPEG_DVB, 203 CX23885_ANALOG_VIDEO, 204 CX23885_MPEG_ENCODER, 205 } port_t; 206 207 struct cx23885_board { 208 char *name; 209 port_t porta, portb, portc; 210 int num_fds_portb, num_fds_portc; 211 unsigned int tuner_type; 212 unsigned int radio_type; 213 unsigned char tuner_addr; 214 unsigned char radio_addr; 215 unsigned int tuner_bus; 216 217 /* Vendors can and do run the PCIe bridge at different 218 * clock rates, driven physically by crystals on the PCBs. 219 * The core has to accommodate this. This allows the user 220 * to add new boards with new frequencys. The value is 221 * expressed in Hz. 222 * 223 * The core framework will default this value based on 224 * current designs, but it can vary. 225 */ 226 u32 clk_freq; 227 struct cx23885_input input[MAX_CX23885_INPUT]; 228 int ci_type; /* for NetUP */ 229 /* Force bottom field first during DMA (888 workaround) */ 230 u32 force_bff; 231 }; 232 233 struct cx23885_subid { 234 u16 subvendor; 235 u16 subdevice; 236 u32 card; 237 }; 238 239 struct cx23885_i2c { 240 struct cx23885_dev *dev; 241 242 int nr; 243 244 /* i2c i/o */ 245 struct i2c_adapter i2c_adap; 246 struct i2c_client i2c_client; 247 u32 i2c_rc; 248 249 /* 885 registers used for raw addess */ 250 u32 i2c_period; 251 u32 reg_ctrl; 252 u32 reg_stat; 253 u32 reg_addr; 254 u32 reg_rdata; 255 u32 reg_wdata; 256 }; 257 258 struct cx23885_dmaqueue { 259 struct list_head active; 260 u32 count; 261 }; 262 263 struct cx23885_tsport { 264 struct cx23885_dev *dev; 265 266 unsigned nr; 267 int sram_chno; 268 269 struct vb2_dvb_frontends frontends; 270 271 /* dma queues */ 272 struct cx23885_dmaqueue mpegq; 273 u32 ts_packet_size; 274 u32 ts_packet_count; 275 276 int width; 277 int height; 278 279 spinlock_t slock; 280 281 /* registers */ 282 u32 reg_gpcnt; 283 u32 reg_gpcnt_ctl; 284 u32 reg_dma_ctl; 285 u32 reg_lngth; 286 u32 reg_hw_sop_ctrl; 287 u32 reg_gen_ctrl; 288 u32 reg_bd_pkt_status; 289 u32 reg_sop_status; 290 u32 reg_fifo_ovfl_stat; 291 u32 reg_vld_misc; 292 u32 reg_ts_clk_en; 293 u32 reg_ts_int_msk; 294 u32 reg_ts_int_stat; 295 u32 reg_src_sel; 296 297 /* Default register vals */ 298 int pci_irqmask; 299 u32 dma_ctl_val; 300 u32 ts_int_msk_val; 301 u32 gen_ctrl_val; 302 u32 ts_clk_en_val; 303 u32 src_sel_val; 304 u32 vld_misc_val; 305 u32 hw_sop_ctrl_val; 306 307 /* Allow a single tsport to have multiple frontends */ 308 u32 num_frontends; 309 void (*gate_ctrl)(struct cx23885_tsport *port, int open); 310 void *port_priv; 311 312 /* Workaround for a temp dvb_frontend that the tuner can attached to */ 313 struct dvb_frontend analog_fe; 314 315 struct i2c_client *i2c_client_demod; 316 struct i2c_client *i2c_client_tuner; 317 struct i2c_client *i2c_client_sec; 318 struct i2c_client *i2c_client_ci; 319 320 int (*set_frontend)(struct dvb_frontend *fe); 321 int (*fe_set_voltage)(struct dvb_frontend *fe, 322 enum fe_sec_voltage voltage); 323 }; 324 325 struct cx23885_kernel_ir { 326 struct cx23885_dev *cx; 327 char *name; 328 char *phys; 329 330 struct rc_dev *rc; 331 }; 332 333 struct cx23885_audio_buffer { 334 unsigned int bpl; 335 struct cx23885_riscmem risc; 336 void *vaddr; 337 struct scatterlist *sglist; 338 int sglen; 339 int nr_pages; 340 }; 341 342 struct cx23885_audio_dev { 343 struct cx23885_dev *dev; 344 345 struct pci_dev *pci; 346 347 struct snd_card *card; 348 349 spinlock_t lock; 350 351 atomic_t count; 352 353 unsigned int dma_size; 354 unsigned int period_size; 355 unsigned int num_periods; 356 357 struct cx23885_audio_buffer *buf; 358 359 struct snd_pcm_substream *substream; 360 }; 361 362 struct cx23885_dev { 363 atomic_t refcount; 364 struct v4l2_device v4l2_dev; 365 struct v4l2_ctrl_handler ctrl_handler; 366 367 /* pci stuff */ 368 struct pci_dev *pci; 369 unsigned char pci_rev, pci_lat; 370 int pci_bus, pci_slot; 371 u32 __iomem *lmmio; 372 u8 __iomem *bmmio; 373 int pci_irqmask; 374 spinlock_t pci_irqmask_lock; /* protects mask reg too */ 375 int hwrevision; 376 377 /* This valud is board specific and is used to configure the 378 * AV core so we see nice clean and stable video and audio. */ 379 u32 clk_freq; 380 381 /* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */ 382 struct cx23885_i2c i2c_bus[3]; 383 384 int nr; 385 struct mutex lock; 386 struct mutex gpio_lock; 387 388 /* board details */ 389 unsigned int board; 390 char name[32]; 391 392 struct cx23885_tsport ts1, ts2; 393 394 /* sram configuration */ 395 struct sram_channel *sram_channels; 396 397 enum { 398 CX23885_BRIDGE_UNDEFINED = 0, 399 CX23885_BRIDGE_885 = 885, 400 CX23885_BRIDGE_887 = 887, 401 CX23885_BRIDGE_888 = 888, 402 } bridge; 403 404 /* Analog video */ 405 unsigned int input; 406 unsigned int audinput; /* Selectable audio input */ 407 u32 tvaudio; 408 v4l2_std_id tvnorm; 409 unsigned int tuner_type; 410 unsigned char tuner_addr; 411 unsigned int tuner_bus; 412 unsigned int radio_type; 413 unsigned char radio_addr; 414 struct v4l2_subdev *sd_cx25840; 415 struct work_struct cx25840_work; 416 417 /* Infrared */ 418 struct v4l2_subdev *sd_ir; 419 struct work_struct ir_rx_work; 420 unsigned long ir_rx_notifications; 421 struct work_struct ir_tx_work; 422 unsigned long ir_tx_notifications; 423 424 struct cx23885_kernel_ir *kernel_ir; 425 atomic_t ir_input_stopping; 426 427 /* V4l */ 428 u32 freq; 429 struct video_device *video_dev; 430 struct video_device *vbi_dev; 431 432 /* video capture */ 433 struct cx23885_fmt *fmt; 434 unsigned int width, height; 435 unsigned field; 436 437 struct cx23885_dmaqueue vidq; 438 struct vb2_queue vb2_vidq; 439 struct cx23885_dmaqueue vbiq; 440 struct vb2_queue vb2_vbiq; 441 442 spinlock_t slock; 443 444 /* MPEG Encoder ONLY settings */ 445 u32 cx23417_mailbox; 446 struct cx2341x_handler cxhdl; 447 struct video_device *v4l_device; 448 struct vb2_queue vb2_mpegq; 449 struct cx23885_tvnorm encodernorm; 450 451 /* Analog raw audio */ 452 struct cx23885_audio_dev *audio_dev; 453 454 }; 455 456 static inline struct cx23885_dev *to_cx23885(struct v4l2_device *v4l2_dev) 457 { 458 return container_of(v4l2_dev, struct cx23885_dev, v4l2_dev); 459 } 460 461 #define call_all(dev, o, f, args...) \ 462 v4l2_device_call_all(&dev->v4l2_dev, 0, o, f, ##args) 463 464 #define CX23885_HW_888_IR (1 << 0) 465 #define CX23885_HW_AV_CORE (1 << 1) 466 467 #define call_hw(dev, grpid, o, f, args...) \ 468 v4l2_device_call_all(&dev->v4l2_dev, grpid, o, f, ##args) 469 470 extern struct v4l2_subdev *cx23885_find_hw(struct cx23885_dev *dev, u32 hw); 471 472 #define SRAM_CH01 0 /* Video A */ 473 #define SRAM_CH02 1 /* VBI A */ 474 #define SRAM_CH03 2 /* Video B */ 475 #define SRAM_CH04 3 /* Transport via B */ 476 #define SRAM_CH05 4 /* VBI B */ 477 #define SRAM_CH06 5 /* Video C */ 478 #define SRAM_CH07 6 /* Transport via C */ 479 #define SRAM_CH08 7 /* Audio Internal A */ 480 #define SRAM_CH09 8 /* Audio Internal B */ 481 #define SRAM_CH10 9 /* Audio External */ 482 #define SRAM_CH11 10 /* COMB_3D_N */ 483 #define SRAM_CH12 11 /* Comb 3D N1 */ 484 #define SRAM_CH13 12 /* Comb 3D N2 */ 485 #define SRAM_CH14 13 /* MOE Vid */ 486 #define SRAM_CH15 14 /* MOE RSLT */ 487 488 struct sram_channel { 489 char *name; 490 u32 cmds_start; 491 u32 ctrl_start; 492 u32 cdt; 493 u32 fifo_start; 494 u32 fifo_size; 495 u32 ptr1_reg; 496 u32 ptr2_reg; 497 u32 cnt1_reg; 498 u32 cnt2_reg; 499 u32 jumponly; 500 }; 501 502 /* ----------------------------------------------------------- */ 503 504 #define cx_read(reg) readl(dev->lmmio + ((reg)>>2)) 505 #define cx_write(reg, value) writel((value), dev->lmmio + ((reg)>>2)) 506 507 #define cx_andor(reg, mask, value) \ 508 writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\ 509 ((value) & (mask)), dev->lmmio+((reg)>>2)) 510 511 #define cx_set(reg, bit) cx_andor((reg), (bit), (bit)) 512 #define cx_clear(reg, bit) cx_andor((reg), (bit), 0) 513 514 /* ----------------------------------------------------------- */ 515 /* cx23885-core.c */ 516 517 extern int cx23885_sram_channel_setup(struct cx23885_dev *dev, 518 struct sram_channel *ch, 519 unsigned int bpl, u32 risc); 520 521 extern void cx23885_sram_channel_dump(struct cx23885_dev *dev, 522 struct sram_channel *ch); 523 524 extern int cx23885_risc_buffer(struct pci_dev *pci, struct cx23885_riscmem *risc, 525 struct scatterlist *sglist, 526 unsigned int top_offset, unsigned int bottom_offset, 527 unsigned int bpl, unsigned int padding, unsigned int lines); 528 529 extern int cx23885_risc_vbibuffer(struct pci_dev *pci, 530 struct cx23885_riscmem *risc, struct scatterlist *sglist, 531 unsigned int top_offset, unsigned int bottom_offset, 532 unsigned int bpl, unsigned int padding, unsigned int lines); 533 534 int cx23885_start_dma(struct cx23885_tsport *port, 535 struct cx23885_dmaqueue *q, 536 struct cx23885_buffer *buf); 537 void cx23885_cancel_buffers(struct cx23885_tsport *port); 538 539 540 extern void cx23885_gpio_set(struct cx23885_dev *dev, u32 mask); 541 extern void cx23885_gpio_clear(struct cx23885_dev *dev, u32 mask); 542 extern u32 cx23885_gpio_get(struct cx23885_dev *dev, u32 mask); 543 extern void cx23885_gpio_enable(struct cx23885_dev *dev, u32 mask, 544 int asoutput); 545 546 extern void cx23885_irq_add_enable(struct cx23885_dev *dev, u32 mask); 547 extern void cx23885_irq_enable(struct cx23885_dev *dev, u32 mask); 548 extern void cx23885_irq_disable(struct cx23885_dev *dev, u32 mask); 549 extern void cx23885_irq_remove(struct cx23885_dev *dev, u32 mask); 550 551 /* ----------------------------------------------------------- */ 552 /* cx23885-cards.c */ 553 extern struct cx23885_board cx23885_boards[]; 554 extern const unsigned int cx23885_bcount; 555 556 extern struct cx23885_subid cx23885_subids[]; 557 extern const unsigned int cx23885_idcount; 558 559 extern int cx23885_tuner_callback(void *priv, int component, 560 int command, int arg); 561 extern void cx23885_card_list(struct cx23885_dev *dev); 562 extern int cx23885_ir_init(struct cx23885_dev *dev); 563 extern void cx23885_ir_pci_int_enable(struct cx23885_dev *dev); 564 extern void cx23885_ir_fini(struct cx23885_dev *dev); 565 extern void cx23885_gpio_setup(struct cx23885_dev *dev); 566 extern void cx23885_card_setup(struct cx23885_dev *dev); 567 extern void cx23885_card_setup_pre_i2c(struct cx23885_dev *dev); 568 569 extern int cx23885_dvb_register(struct cx23885_tsport *port); 570 extern int cx23885_dvb_unregister(struct cx23885_tsport *port); 571 572 extern int cx23885_buf_prepare(struct cx23885_buffer *buf, 573 struct cx23885_tsport *port); 574 extern void cx23885_buf_queue(struct cx23885_tsport *port, 575 struct cx23885_buffer *buf); 576 extern void cx23885_free_buffer(struct cx23885_dev *dev, 577 struct cx23885_buffer *buf); 578 579 /* ----------------------------------------------------------- */ 580 /* cx23885-video.c */ 581 /* Video */ 582 extern int cx23885_video_register(struct cx23885_dev *dev); 583 extern void cx23885_video_unregister(struct cx23885_dev *dev); 584 extern int cx23885_video_irq(struct cx23885_dev *dev, u32 status); 585 extern void cx23885_video_wakeup(struct cx23885_dev *dev, 586 struct cx23885_dmaqueue *q, u32 count); 587 int cx23885_enum_input(struct cx23885_dev *dev, struct v4l2_input *i); 588 int cx23885_set_input(struct file *file, void *priv, unsigned int i); 589 int cx23885_get_input(struct file *file, void *priv, unsigned int *i); 590 int cx23885_set_frequency(struct file *file, void *priv, const struct v4l2_frequency *f); 591 int cx23885_set_tvnorm(struct cx23885_dev *dev, v4l2_std_id norm); 592 593 /* ----------------------------------------------------------- */ 594 /* cx23885-vbi.c */ 595 extern int cx23885_vbi_fmt(struct file *file, void *priv, 596 struct v4l2_format *f); 597 extern void cx23885_vbi_timeout(unsigned long data); 598 extern const struct vb2_ops cx23885_vbi_qops; 599 extern int cx23885_vbi_irq(struct cx23885_dev *dev, u32 status); 600 601 /* cx23885-i2c.c */ 602 extern int cx23885_i2c_register(struct cx23885_i2c *bus); 603 extern int cx23885_i2c_unregister(struct cx23885_i2c *bus); 604 extern void cx23885_av_clk(struct cx23885_dev *dev, int enable); 605 606 /* ----------------------------------------------------------- */ 607 /* cx23885-417.c */ 608 extern int cx23885_417_register(struct cx23885_dev *dev); 609 extern void cx23885_417_unregister(struct cx23885_dev *dev); 610 extern int cx23885_irq_417(struct cx23885_dev *dev, u32 status); 611 extern void cx23885_417_check_encoder(struct cx23885_dev *dev); 612 extern void cx23885_mc417_init(struct cx23885_dev *dev); 613 extern int mc417_memory_read(struct cx23885_dev *dev, u32 address, u32 *value); 614 extern int mc417_memory_write(struct cx23885_dev *dev, u32 address, u32 value); 615 extern int mc417_register_read(struct cx23885_dev *dev, 616 u16 address, u32 *value); 617 extern int mc417_register_write(struct cx23885_dev *dev, 618 u16 address, u32 value); 619 extern void mc417_gpio_set(struct cx23885_dev *dev, u32 mask); 620 extern void mc417_gpio_clear(struct cx23885_dev *dev, u32 mask); 621 extern void mc417_gpio_enable(struct cx23885_dev *dev, u32 mask, int asoutput); 622 623 /* ----------------------------------------------------------- */ 624 /* cx23885-alsa.c */ 625 extern struct cx23885_audio_dev *cx23885_audio_register( 626 struct cx23885_dev *dev); 627 extern void cx23885_audio_unregister(struct cx23885_dev *dev); 628 extern int cx23885_audio_irq(struct cx23885_dev *dev, u32 status, u32 mask); 629 extern int cx23885_risc_databuffer(struct pci_dev *pci, 630 struct cx23885_riscmem *risc, 631 struct scatterlist *sglist, 632 unsigned int bpl, 633 unsigned int lines, 634 unsigned int lpi); 635 636 /* ----------------------------------------------------------- */ 637 /* tv norms */ 638 639 static inline unsigned int norm_maxh(v4l2_std_id norm) 640 { 641 return (norm & V4L2_STD_525_60) ? 480 : 576; 642 } 643