1 /*
2  *  Driver for the Conexant CX23885 PCIe bridge
3  *
4  *  Copyright (c) 2007 Steven Toth <stoth@linuxtv.org>
5  *
6  *  This program is free software; you can redistribute it and/or modify
7  *  it under the terms of the GNU General Public License as published by
8  *  the Free Software Foundation; either version 2 of the License, or
9  *  (at your option) any later version.
10  *
11  *  This program is distributed in the hope that it will be useful,
12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  *
15  *  GNU General Public License for more details.
16  */
17 
18 #include "cx23885.h"
19 
20 #include <linux/kernel.h>
21 #include <linux/module.h>
22 #include <linux/moduleparam.h>
23 #include <linux/init.h>
24 
25 static unsigned int vbibufs = 4;
26 module_param(vbibufs, int, 0644);
27 MODULE_PARM_DESC(vbibufs, "number of vbi buffers, range 2-32");
28 
29 static unsigned int vbi_debug;
30 module_param(vbi_debug, int, 0644);
31 MODULE_PARM_DESC(vbi_debug, "enable debug messages [vbi]");
32 
33 #define dprintk(level, fmt, arg...)\
34 	do { if (vbi_debug >= level)\
35 		printk(KERN_DEBUG pr_fmt("%s: vbi:" fmt), \
36 			__func__, ##arg); \
37 	} while (0)
38 
39 /* ------------------------------------------------------------------ */
40 
41 #define VBI_LINE_LENGTH 1440
42 #define VBI_NTSC_LINE_COUNT 12
43 #define VBI_PAL_LINE_COUNT 18
44 
45 
46 int cx23885_vbi_fmt(struct file *file, void *priv,
47 	struct v4l2_format *f)
48 {
49 	struct cx23885_dev *dev = video_drvdata(file);
50 
51 	f->fmt.vbi.sampling_rate = 27000000;
52 	f->fmt.vbi.samples_per_line = VBI_LINE_LENGTH;
53 	f->fmt.vbi.sample_format = V4L2_PIX_FMT_GREY;
54 	f->fmt.vbi.offset = 0;
55 	f->fmt.vbi.flags = 0;
56 	if (dev->tvnorm & V4L2_STD_525_60) {
57 		/* ntsc */
58 		f->fmt.vbi.start[0] = V4L2_VBI_ITU_525_F1_START + 9;
59 		f->fmt.vbi.start[1] = V4L2_VBI_ITU_525_F2_START + 9;
60 		f->fmt.vbi.count[0] = VBI_NTSC_LINE_COUNT;
61 		f->fmt.vbi.count[1] = VBI_NTSC_LINE_COUNT;
62 	} else if (dev->tvnorm & V4L2_STD_625_50) {
63 		/* pal */
64 		f->fmt.vbi.start[0] = V4L2_VBI_ITU_625_F1_START + 5;
65 		f->fmt.vbi.start[1] = V4L2_VBI_ITU_625_F2_START + 5;
66 		f->fmt.vbi.count[0] = VBI_PAL_LINE_COUNT;
67 		f->fmt.vbi.count[1] = VBI_PAL_LINE_COUNT;
68 	}
69 
70 	return 0;
71 }
72 
73 /* We're given the Video Interrupt status register.
74  * The cx23885_video_irq() func has already validated
75  * the potential error bits, we just need to
76  * deal with vbi payload and return indication if
77  * we actually processed any payload.
78  */
79 int cx23885_vbi_irq(struct cx23885_dev *dev, u32 status)
80 {
81 	u32 count;
82 	int handled = 0;
83 
84 	if (status & VID_BC_MSK_VBI_RISCI1) {
85 		dprintk(1, "%s() VID_BC_MSK_VBI_RISCI1\n", __func__);
86 		spin_lock(&dev->slock);
87 		count = cx_read(VBI_A_GPCNT);
88 		cx23885_video_wakeup(dev, &dev->vbiq, count);
89 		spin_unlock(&dev->slock);
90 		handled++;
91 	}
92 
93 	return handled;
94 }
95 
96 static int cx23885_start_vbi_dma(struct cx23885_dev    *dev,
97 			 struct cx23885_dmaqueue *q,
98 			 struct cx23885_buffer   *buf)
99 {
100 	dprintk(1, "%s()\n", __func__);
101 
102 	/* setup fifo + format */
103 	cx23885_sram_channel_setup(dev, &dev->sram_channels[SRAM_CH02],
104 				VBI_LINE_LENGTH, buf->risc.dma);
105 
106 	/* reset counter */
107 	cx_write(VID_A_VBI_CTRL, 3);
108 	cx_write(VBI_A_GPCNT_CTL, 3);
109 	q->count = 0;
110 
111 	/* enable irq */
112 	cx23885_irq_add_enable(dev, 0x01);
113 	cx_set(VID_A_INT_MSK, 0x000022);
114 
115 	/* start dma */
116 	cx_set(DEV_CNTRL2, (1<<5));
117 	cx_set(VID_A_DMA_CTL, 0x22); /* FIFO and RISC enable */
118 
119 	return 0;
120 }
121 
122 /* ------------------------------------------------------------------ */
123 
124 static int queue_setup(struct vb2_queue *q,
125 			   unsigned int *num_buffers, unsigned int *num_planes,
126 			   unsigned int sizes[], struct device *alloc_devs[])
127 {
128 	struct cx23885_dev *dev = q->drv_priv;
129 	unsigned lines = VBI_PAL_LINE_COUNT;
130 
131 	if (dev->tvnorm & V4L2_STD_525_60)
132 		lines = VBI_NTSC_LINE_COUNT;
133 	*num_planes = 1;
134 	sizes[0] = lines * VBI_LINE_LENGTH * 2;
135 	return 0;
136 }
137 
138 static int buffer_prepare(struct vb2_buffer *vb)
139 {
140 	struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
141 	struct cx23885_dev *dev = vb->vb2_queue->drv_priv;
142 	struct cx23885_buffer *buf = container_of(vbuf,
143 		struct cx23885_buffer, vb);
144 	struct sg_table *sgt = vb2_dma_sg_plane_desc(vb, 0);
145 	unsigned lines = VBI_PAL_LINE_COUNT;
146 
147 	if (dev->tvnorm & V4L2_STD_525_60)
148 		lines = VBI_NTSC_LINE_COUNT;
149 
150 	if (vb2_plane_size(vb, 0) < lines * VBI_LINE_LENGTH * 2)
151 		return -EINVAL;
152 	vb2_set_plane_payload(vb, 0, lines * VBI_LINE_LENGTH * 2);
153 
154 	cx23885_risc_vbibuffer(dev->pci, &buf->risc,
155 			 sgt->sgl,
156 			 0, VBI_LINE_LENGTH * lines,
157 			 VBI_LINE_LENGTH, 0,
158 			 lines);
159 	return 0;
160 }
161 
162 static void buffer_finish(struct vb2_buffer *vb)
163 {
164 	struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
165 	struct cx23885_buffer *buf = container_of(vbuf,
166 		struct cx23885_buffer, vb);
167 
168 	cx23885_free_buffer(vb->vb2_queue->drv_priv, buf);
169 }
170 
171 /*
172  * The risc program for each buffer works as follows: it starts with a simple
173  * 'JUMP to addr + 12', which is effectively a NOP. Then the code to DMA the
174  * buffer follows and at the end we have a JUMP back to the start + 12 (skipping
175  * the initial JUMP).
176  *
177  * This is the risc program of the first buffer to be queued if the active list
178  * is empty and it just keeps DMAing this buffer without generating any
179  * interrupts.
180  *
181  * If a new buffer is added then the initial JUMP in the code for that buffer
182  * will generate an interrupt which signals that the previous buffer has been
183  * DMAed successfully and that it can be returned to userspace.
184  *
185  * It also sets the final jump of the previous buffer to the start of the new
186  * buffer, thus chaining the new buffer into the DMA chain. This is a single
187  * atomic u32 write, so there is no race condition.
188  *
189  * The end-result of all this that you only get an interrupt when a buffer
190  * is ready, so the control flow is very easy.
191  */
192 static void buffer_queue(struct vb2_buffer *vb)
193 {
194 	struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
195 	struct cx23885_dev *dev = vb->vb2_queue->drv_priv;
196 	struct cx23885_buffer *buf = container_of(vbuf,
197 			struct cx23885_buffer, vb);
198 	struct cx23885_buffer *prev;
199 	struct cx23885_dmaqueue *q = &dev->vbiq;
200 	unsigned long flags;
201 
202 	buf->risc.cpu[1] = cpu_to_le32(buf->risc.dma + 12);
203 	buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_CNT_INC);
204 	buf->risc.jmp[1] = cpu_to_le32(buf->risc.dma + 12);
205 	buf->risc.jmp[2] = cpu_to_le32(0); /* bits 63-32 */
206 
207 	if (list_empty(&q->active)) {
208 		spin_lock_irqsave(&dev->slock, flags);
209 		list_add_tail(&buf->queue, &q->active);
210 		spin_unlock_irqrestore(&dev->slock, flags);
211 		dprintk(2, "[%p/%d] vbi_queue - first active\n",
212 			buf, buf->vb.vb2_buf.index);
213 
214 	} else {
215 		buf->risc.cpu[0] |= cpu_to_le32(RISC_IRQ1);
216 		prev = list_entry(q->active.prev, struct cx23885_buffer,
217 			queue);
218 		spin_lock_irqsave(&dev->slock, flags);
219 		list_add_tail(&buf->queue, &q->active);
220 		spin_unlock_irqrestore(&dev->slock, flags);
221 		prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
222 		dprintk(2, "[%p/%d] buffer_queue - append to active\n",
223 			buf, buf->vb.vb2_buf.index);
224 	}
225 }
226 
227 static int cx23885_start_streaming(struct vb2_queue *q, unsigned int count)
228 {
229 	struct cx23885_dev *dev = q->drv_priv;
230 	struct cx23885_dmaqueue *dmaq = &dev->vbiq;
231 	struct cx23885_buffer *buf = list_entry(dmaq->active.next,
232 			struct cx23885_buffer, queue);
233 
234 	cx23885_start_vbi_dma(dev, dmaq, buf);
235 	return 0;
236 }
237 
238 static void cx23885_stop_streaming(struct vb2_queue *q)
239 {
240 	struct cx23885_dev *dev = q->drv_priv;
241 	struct cx23885_dmaqueue *dmaq = &dev->vbiq;
242 	unsigned long flags;
243 
244 	cx_clear(VID_A_DMA_CTL, 0x22); /* FIFO and RISC enable */
245 	spin_lock_irqsave(&dev->slock, flags);
246 	while (!list_empty(&dmaq->active)) {
247 		struct cx23885_buffer *buf = list_entry(dmaq->active.next,
248 			struct cx23885_buffer, queue);
249 
250 		list_del(&buf->queue);
251 		vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
252 	}
253 	spin_unlock_irqrestore(&dev->slock, flags);
254 }
255 
256 
257 const struct vb2_ops cx23885_vbi_qops = {
258 	.queue_setup    = queue_setup,
259 	.buf_prepare  = buffer_prepare,
260 	.buf_finish = buffer_finish,
261 	.buf_queue    = buffer_queue,
262 	.wait_prepare = vb2_ops_wait_prepare,
263 	.wait_finish = vb2_ops_wait_finish,
264 	.start_streaming = cx23885_start_streaming,
265 	.stop_streaming = cx23885_stop_streaming,
266 };
267