1 /* 2 * Driver for the Conexant CX23885 PCIe bridge 3 * 4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * 15 * GNU General Public License for more details. 16 */ 17 18 #include <linux/module.h> 19 #include <linux/init.h> 20 #include <linux/device.h> 21 #include <linux/fs.h> 22 #include <linux/kthread.h> 23 #include <linux/file.h> 24 #include <linux/suspend.h> 25 26 #include "cx23885.h" 27 #include <media/v4l2-common.h> 28 29 #include "dvb_ca_en50221.h" 30 #include "s5h1409.h" 31 #include "s5h1411.h" 32 #include "mt2131.h" 33 #include "tda8290.h" 34 #include "tda18271.h" 35 #include "lgdt330x.h" 36 #include "xc4000.h" 37 #include "xc5000.h" 38 #include "max2165.h" 39 #include "tda10048.h" 40 #include "tuner-xc2028.h" 41 #include "tuner-simple.h" 42 #include "dib7000p.h" 43 #include "dib0070.h" 44 #include "dibx000_common.h" 45 #include "zl10353.h" 46 #include "stv0900.h" 47 #include "stv0900_reg.h" 48 #include "stv6110.h" 49 #include "lnbh24.h" 50 #include "cx24116.h" 51 #include "cx24117.h" 52 #include "cimax2.h" 53 #include "lgs8gxx.h" 54 #include "netup-eeprom.h" 55 #include "netup-init.h" 56 #include "lgdt3305.h" 57 #include "atbm8830.h" 58 #include "ts2020.h" 59 #include "ds3000.h" 60 #include "cx23885-f300.h" 61 #include "altera-ci.h" 62 #include "stv0367.h" 63 #include "drxk.h" 64 #include "mt2063.h" 65 #include "stv090x.h" 66 #include "stb6100.h" 67 #include "stb6100_cfg.h" 68 #include "tda10071.h" 69 #include "a8293.h" 70 #include "mb86a20s.h" 71 #include "si2165.h" 72 #include "si2168.h" 73 #include "si2157.h" 74 #include "sp2.h" 75 #include "m88ds3103.h" 76 #include "m88ts2022.h" 77 78 static unsigned int debug; 79 80 #define dprintk(level, fmt, arg...)\ 81 do { if (debug >= level)\ 82 printk(KERN_DEBUG "%s/0: " fmt, dev->name, ## arg);\ 83 } while (0) 84 85 /* ------------------------------------------------------------------ */ 86 87 static unsigned int alt_tuner; 88 module_param(alt_tuner, int, 0644); 89 MODULE_PARM_DESC(alt_tuner, "Enable alternate tuner configuration"); 90 91 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr); 92 93 /* ------------------------------------------------------------------ */ 94 95 static int queue_setup(struct vb2_queue *q, const struct v4l2_format *fmt, 96 unsigned int *num_buffers, unsigned int *num_planes, 97 unsigned int sizes[], void *alloc_ctxs[]) 98 { 99 struct cx23885_tsport *port = q->drv_priv; 100 101 port->ts_packet_size = 188 * 4; 102 port->ts_packet_count = 32; 103 *num_planes = 1; 104 sizes[0] = port->ts_packet_size * port->ts_packet_count; 105 alloc_ctxs[0] = port->dev->alloc_ctx; 106 *num_buffers = 32; 107 return 0; 108 } 109 110 111 static int buffer_prepare(struct vb2_buffer *vb) 112 { 113 struct cx23885_tsport *port = vb->vb2_queue->drv_priv; 114 struct cx23885_buffer *buf = 115 container_of(vb, struct cx23885_buffer, vb); 116 117 return cx23885_buf_prepare(buf, port); 118 } 119 120 static void buffer_finish(struct vb2_buffer *vb) 121 { 122 struct cx23885_tsport *port = vb->vb2_queue->drv_priv; 123 struct cx23885_dev *dev = port->dev; 124 struct cx23885_buffer *buf = container_of(vb, 125 struct cx23885_buffer, vb); 126 127 cx23885_free_buffer(dev, buf); 128 } 129 130 static void buffer_queue(struct vb2_buffer *vb) 131 { 132 struct cx23885_tsport *port = vb->vb2_queue->drv_priv; 133 struct cx23885_buffer *buf = container_of(vb, 134 struct cx23885_buffer, vb); 135 136 cx23885_buf_queue(port, buf); 137 } 138 139 static void cx23885_dvb_gate_ctrl(struct cx23885_tsport *port, int open) 140 { 141 struct vb2_dvb_frontends *f; 142 struct vb2_dvb_frontend *fe; 143 144 f = &port->frontends; 145 146 if (f->gate <= 1) /* undefined or fe0 */ 147 fe = vb2_dvb_get_frontend(f, 1); 148 else 149 fe = vb2_dvb_get_frontend(f, f->gate); 150 151 if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl) 152 fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open); 153 } 154 155 static int cx23885_start_streaming(struct vb2_queue *q, unsigned int count) 156 { 157 struct cx23885_tsport *port = q->drv_priv; 158 struct cx23885_dmaqueue *dmaq = &port->mpegq; 159 struct cx23885_buffer *buf = list_entry(dmaq->active.next, 160 struct cx23885_buffer, queue); 161 162 cx23885_start_dma(port, dmaq, buf); 163 return 0; 164 } 165 166 static void cx23885_stop_streaming(struct vb2_queue *q) 167 { 168 struct cx23885_tsport *port = q->drv_priv; 169 170 cx23885_cancel_buffers(port); 171 } 172 173 static struct vb2_ops dvb_qops = { 174 .queue_setup = queue_setup, 175 .buf_prepare = buffer_prepare, 176 .buf_finish = buffer_finish, 177 .buf_queue = buffer_queue, 178 .wait_prepare = vb2_ops_wait_prepare, 179 .wait_finish = vb2_ops_wait_finish, 180 .start_streaming = cx23885_start_streaming, 181 .stop_streaming = cx23885_stop_streaming, 182 }; 183 184 static struct s5h1409_config hauppauge_generic_config = { 185 .demod_address = 0x32 >> 1, 186 .output_mode = S5H1409_SERIAL_OUTPUT, 187 .gpio = S5H1409_GPIO_ON, 188 .qam_if = 44000, 189 .inversion = S5H1409_INVERSION_OFF, 190 .status_mode = S5H1409_DEMODLOCKING, 191 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, 192 }; 193 194 static struct tda10048_config hauppauge_hvr1200_config = { 195 .demod_address = 0x10 >> 1, 196 .output_mode = TDA10048_SERIAL_OUTPUT, 197 .fwbulkwritelen = TDA10048_BULKWRITE_200, 198 .inversion = TDA10048_INVERSION_ON, 199 .dtv6_if_freq_khz = TDA10048_IF_3300, 200 .dtv7_if_freq_khz = TDA10048_IF_3800, 201 .dtv8_if_freq_khz = TDA10048_IF_4300, 202 .clk_freq_khz = TDA10048_CLK_16000, 203 }; 204 205 static struct tda10048_config hauppauge_hvr1210_config = { 206 .demod_address = 0x10 >> 1, 207 .output_mode = TDA10048_SERIAL_OUTPUT, 208 .fwbulkwritelen = TDA10048_BULKWRITE_200, 209 .inversion = TDA10048_INVERSION_ON, 210 .dtv6_if_freq_khz = TDA10048_IF_3300, 211 .dtv7_if_freq_khz = TDA10048_IF_3500, 212 .dtv8_if_freq_khz = TDA10048_IF_4000, 213 .clk_freq_khz = TDA10048_CLK_16000, 214 }; 215 216 static struct s5h1409_config hauppauge_ezqam_config = { 217 .demod_address = 0x32 >> 1, 218 .output_mode = S5H1409_SERIAL_OUTPUT, 219 .gpio = S5H1409_GPIO_OFF, 220 .qam_if = 4000, 221 .inversion = S5H1409_INVERSION_ON, 222 .status_mode = S5H1409_DEMODLOCKING, 223 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, 224 }; 225 226 static struct s5h1409_config hauppauge_hvr1800lp_config = { 227 .demod_address = 0x32 >> 1, 228 .output_mode = S5H1409_SERIAL_OUTPUT, 229 .gpio = S5H1409_GPIO_OFF, 230 .qam_if = 44000, 231 .inversion = S5H1409_INVERSION_OFF, 232 .status_mode = S5H1409_DEMODLOCKING, 233 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, 234 }; 235 236 static struct s5h1409_config hauppauge_hvr1500_config = { 237 .demod_address = 0x32 >> 1, 238 .output_mode = S5H1409_SERIAL_OUTPUT, 239 .gpio = S5H1409_GPIO_OFF, 240 .inversion = S5H1409_INVERSION_OFF, 241 .status_mode = S5H1409_DEMODLOCKING, 242 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, 243 }; 244 245 static struct mt2131_config hauppauge_generic_tunerconfig = { 246 0x61 247 }; 248 249 static struct lgdt330x_config fusionhdtv_5_express = { 250 .demod_address = 0x0e, 251 .demod_chip = LGDT3303, 252 .serial_mpeg = 0x40, 253 }; 254 255 static struct s5h1409_config hauppauge_hvr1500q_config = { 256 .demod_address = 0x32 >> 1, 257 .output_mode = S5H1409_SERIAL_OUTPUT, 258 .gpio = S5H1409_GPIO_ON, 259 .qam_if = 44000, 260 .inversion = S5H1409_INVERSION_OFF, 261 .status_mode = S5H1409_DEMODLOCKING, 262 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, 263 }; 264 265 static struct s5h1409_config dvico_s5h1409_config = { 266 .demod_address = 0x32 >> 1, 267 .output_mode = S5H1409_SERIAL_OUTPUT, 268 .gpio = S5H1409_GPIO_ON, 269 .qam_if = 44000, 270 .inversion = S5H1409_INVERSION_OFF, 271 .status_mode = S5H1409_DEMODLOCKING, 272 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, 273 }; 274 275 static struct s5h1411_config dvico_s5h1411_config = { 276 .output_mode = S5H1411_SERIAL_OUTPUT, 277 .gpio = S5H1411_GPIO_ON, 278 .qam_if = S5H1411_IF_44000, 279 .vsb_if = S5H1411_IF_44000, 280 .inversion = S5H1411_INVERSION_OFF, 281 .status_mode = S5H1411_DEMODLOCKING, 282 .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, 283 }; 284 285 static struct s5h1411_config hcw_s5h1411_config = { 286 .output_mode = S5H1411_SERIAL_OUTPUT, 287 .gpio = S5H1411_GPIO_OFF, 288 .vsb_if = S5H1411_IF_44000, 289 .qam_if = S5H1411_IF_4000, 290 .inversion = S5H1411_INVERSION_ON, 291 .status_mode = S5H1411_DEMODLOCKING, 292 .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, 293 }; 294 295 static struct xc5000_config hauppauge_hvr1500q_tunerconfig = { 296 .i2c_address = 0x61, 297 .if_khz = 5380, 298 }; 299 300 static struct xc5000_config dvico_xc5000_tunerconfig = { 301 .i2c_address = 0x64, 302 .if_khz = 5380, 303 }; 304 305 static struct tda829x_config tda829x_no_probe = { 306 .probe_tuner = TDA829X_DONT_PROBE, 307 }; 308 309 static struct tda18271_std_map hauppauge_tda18271_std_map = { 310 .atsc_6 = { .if_freq = 5380, .agc_mode = 3, .std = 3, 311 .if_lvl = 6, .rfagc_top = 0x37 }, 312 .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 0, 313 .if_lvl = 6, .rfagc_top = 0x37 }, 314 }; 315 316 static struct tda18271_std_map hauppauge_hvr1200_tda18271_std_map = { 317 .dvbt_6 = { .if_freq = 3300, .agc_mode = 3, .std = 4, 318 .if_lvl = 1, .rfagc_top = 0x37, }, 319 .dvbt_7 = { .if_freq = 3800, .agc_mode = 3, .std = 5, 320 .if_lvl = 1, .rfagc_top = 0x37, }, 321 .dvbt_8 = { .if_freq = 4300, .agc_mode = 3, .std = 6, 322 .if_lvl = 1, .rfagc_top = 0x37, }, 323 }; 324 325 static struct tda18271_config hauppauge_tda18271_config = { 326 .std_map = &hauppauge_tda18271_std_map, 327 .gate = TDA18271_GATE_ANALOG, 328 .output_opt = TDA18271_OUTPUT_LT_OFF, 329 }; 330 331 static struct tda18271_config hauppauge_hvr1200_tuner_config = { 332 .std_map = &hauppauge_hvr1200_tda18271_std_map, 333 .gate = TDA18271_GATE_ANALOG, 334 .output_opt = TDA18271_OUTPUT_LT_OFF, 335 }; 336 337 static struct tda18271_config hauppauge_hvr1210_tuner_config = { 338 .gate = TDA18271_GATE_DIGITAL, 339 .output_opt = TDA18271_OUTPUT_LT_OFF, 340 }; 341 342 static struct tda18271_config hauppauge_hvr4400_tuner_config = { 343 .gate = TDA18271_GATE_DIGITAL, 344 .output_opt = TDA18271_OUTPUT_LT_OFF, 345 }; 346 347 static struct tda18271_std_map hauppauge_hvr127x_std_map = { 348 .atsc_6 = { .if_freq = 3250, .agc_mode = 3, .std = 4, 349 .if_lvl = 1, .rfagc_top = 0x58 }, 350 .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 5, 351 .if_lvl = 1, .rfagc_top = 0x58 }, 352 }; 353 354 static struct tda18271_config hauppauge_hvr127x_config = { 355 .std_map = &hauppauge_hvr127x_std_map, 356 .output_opt = TDA18271_OUTPUT_LT_OFF, 357 }; 358 359 static struct lgdt3305_config hauppauge_lgdt3305_config = { 360 .i2c_addr = 0x0e, 361 .mpeg_mode = LGDT3305_MPEG_SERIAL, 362 .tpclk_edge = LGDT3305_TPCLK_FALLING_EDGE, 363 .tpvalid_polarity = LGDT3305_TP_VALID_HIGH, 364 .deny_i2c_rptr = 1, 365 .spectral_inversion = 1, 366 .qam_if_khz = 4000, 367 .vsb_if_khz = 3250, 368 }; 369 370 static struct dibx000_agc_config xc3028_agc_config = { 371 BAND_VHF | BAND_UHF, /* band_caps */ 372 373 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0, 374 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, 375 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, 376 * P_agc_nb_est=2, P_agc_write=0 377 */ 378 (0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | 379 (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), /* setup */ 380 381 712, /* inv_gain */ 382 21, /* time_stabiliz */ 383 384 0, /* alpha_level */ 385 118, /* thlock */ 386 387 0, /* wbd_inv */ 388 2867, /* wbd_ref */ 389 0, /* wbd_sel */ 390 2, /* wbd_alpha */ 391 392 0, /* agc1_max */ 393 0, /* agc1_min */ 394 39718, /* agc2_max */ 395 9930, /* agc2_min */ 396 0, /* agc1_pt1 */ 397 0, /* agc1_pt2 */ 398 0, /* agc1_pt3 */ 399 0, /* agc1_slope1 */ 400 0, /* agc1_slope2 */ 401 0, /* agc2_pt1 */ 402 128, /* agc2_pt2 */ 403 29, /* agc2_slope1 */ 404 29, /* agc2_slope2 */ 405 406 17, /* alpha_mant */ 407 27, /* alpha_exp */ 408 23, /* beta_mant */ 409 51, /* beta_exp */ 410 411 1, /* perform_agc_softsplit */ 412 }; 413 414 /* PLL Configuration for COFDM BW_MHz = 8.000000 415 * With external clock = 30.000000 */ 416 static struct dibx000_bandwidth_config xc3028_bw_config = { 417 60000, /* internal */ 418 30000, /* sampling */ 419 1, /* pll_cfg: prediv */ 420 8, /* pll_cfg: ratio */ 421 3, /* pll_cfg: range */ 422 1, /* pll_cfg: reset */ 423 0, /* pll_cfg: bypass */ 424 0, /* misc: refdiv */ 425 0, /* misc: bypclk_div */ 426 1, /* misc: IO_CLK_en_core */ 427 1, /* misc: ADClkSrc */ 428 0, /* misc: modulo */ 429 (3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */ 430 (1 << 25) | 5816102, /* ifreq = 5.200000 MHz */ 431 20452225, /* timf */ 432 30000000 /* xtal_hz */ 433 }; 434 435 static struct dib7000p_config hauppauge_hvr1400_dib7000_config = { 436 .output_mpeg2_in_188_bytes = 1, 437 .hostbus_diversity = 1, 438 .tuner_is_baseband = 0, 439 .update_lna = NULL, 440 441 .agc_config_count = 1, 442 .agc = &xc3028_agc_config, 443 .bw = &xc3028_bw_config, 444 445 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS, 446 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES, 447 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS, 448 449 .pwm_freq_div = 0, 450 .agc_control = NULL, 451 .spur_protect = 0, 452 453 .output_mode = OUTMODE_MPEG2_SERIAL, 454 }; 455 456 static struct zl10353_config dvico_fusionhdtv_xc3028 = { 457 .demod_address = 0x0f, 458 .if2 = 45600, 459 .no_tuner = 1, 460 .disable_i2c_gate_ctrl = 1, 461 }; 462 463 static struct stv0900_reg stv0900_ts_regs[] = { 464 { R0900_TSGENERAL, 0x00 }, 465 { R0900_P1_TSSPEED, 0x40 }, 466 { R0900_P2_TSSPEED, 0x40 }, 467 { R0900_P1_TSCFGM, 0xc0 }, 468 { R0900_P2_TSCFGM, 0xc0 }, 469 { R0900_P1_TSCFGH, 0xe0 }, 470 { R0900_P2_TSCFGH, 0xe0 }, 471 { R0900_P1_TSCFGL, 0x20 }, 472 { R0900_P2_TSCFGL, 0x20 }, 473 { 0xffff, 0xff }, /* terminate */ 474 }; 475 476 static struct stv0900_config netup_stv0900_config = { 477 .demod_address = 0x68, 478 .demod_mode = 1, /* dual */ 479 .xtal = 8000000, 480 .clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */ 481 .diseqc_mode = 2,/* 2/3 PWM */ 482 .ts_config_regs = stv0900_ts_regs, 483 .tun1_maddress = 0,/* 0x60 */ 484 .tun2_maddress = 3,/* 0x63 */ 485 .tun1_adc = 1,/* 1 Vpp */ 486 .tun2_adc = 1,/* 1 Vpp */ 487 }; 488 489 static struct stv6110_config netup_stv6110_tunerconfig_a = { 490 .i2c_address = 0x60, 491 .mclk = 16000000, 492 .clk_div = 1, 493 .gain = 8, /* +16 dB - maximum gain */ 494 }; 495 496 static struct stv6110_config netup_stv6110_tunerconfig_b = { 497 .i2c_address = 0x63, 498 .mclk = 16000000, 499 .clk_div = 1, 500 .gain = 8, /* +16 dB - maximum gain */ 501 }; 502 503 static struct cx24116_config tbs_cx24116_config = { 504 .demod_address = 0x55, 505 }; 506 507 static struct cx24117_config tbs_cx24117_config = { 508 .demod_address = 0x55, 509 }; 510 511 static struct ds3000_config tevii_ds3000_config = { 512 .demod_address = 0x68, 513 }; 514 515 static struct ts2020_config tevii_ts2020_config = { 516 .tuner_address = 0x60, 517 .clk_out_div = 1, 518 .frequency_div = 1146000, 519 }; 520 521 static struct cx24116_config dvbworld_cx24116_config = { 522 .demod_address = 0x05, 523 }; 524 525 static struct lgs8gxx_config mygica_x8506_lgs8gl5_config = { 526 .prod = LGS8GXX_PROD_LGS8GL5, 527 .demod_address = 0x19, 528 .serial_ts = 0, 529 .ts_clk_pol = 1, 530 .ts_clk_gated = 1, 531 .if_clk_freq = 30400, /* 30.4 MHz */ 532 .if_freq = 5380, /* 5.38 MHz */ 533 .if_neg_center = 1, 534 .ext_adc = 0, 535 .adc_signed = 0, 536 .if_neg_edge = 0, 537 }; 538 539 static struct xc5000_config mygica_x8506_xc5000_config = { 540 .i2c_address = 0x61, 541 .if_khz = 5380, 542 }; 543 544 static struct mb86a20s_config mygica_x8507_mb86a20s_config = { 545 .demod_address = 0x10, 546 }; 547 548 static struct xc5000_config mygica_x8507_xc5000_config = { 549 .i2c_address = 0x61, 550 .if_khz = 4000, 551 }; 552 553 static struct stv090x_config prof_8000_stv090x_config = { 554 .device = STV0903, 555 .demod_mode = STV090x_SINGLE, 556 .clk_mode = STV090x_CLK_EXT, 557 .xtal = 27000000, 558 .address = 0x6A, 559 .ts1_mode = STV090x_TSMODE_PARALLEL_PUNCTURED, 560 .repeater_level = STV090x_RPTLEVEL_64, 561 .adc1_range = STV090x_ADC_2Vpp, 562 .diseqc_envelope_mode = false, 563 564 .tuner_get_frequency = stb6100_get_frequency, 565 .tuner_set_frequency = stb6100_set_frequency, 566 .tuner_set_bandwidth = stb6100_set_bandwidth, 567 .tuner_get_bandwidth = stb6100_get_bandwidth, 568 }; 569 570 static struct stb6100_config prof_8000_stb6100_config = { 571 .tuner_address = 0x60, 572 .refclock = 27000000, 573 }; 574 575 static int p8000_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) 576 { 577 struct cx23885_tsport *port = fe->dvb->priv; 578 struct cx23885_dev *dev = port->dev; 579 580 if (voltage == SEC_VOLTAGE_18) 581 cx_write(MC417_RWD, 0x00001e00); 582 else if (voltage == SEC_VOLTAGE_13) 583 cx_write(MC417_RWD, 0x00001a00); 584 else 585 cx_write(MC417_RWD, 0x00001800); 586 return 0; 587 } 588 589 static int dvbsky_t9580_set_voltage(struct dvb_frontend *fe, 590 fe_sec_voltage_t voltage) 591 { 592 struct cx23885_tsport *port = fe->dvb->priv; 593 struct cx23885_dev *dev = port->dev; 594 595 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1); 596 597 switch (voltage) { 598 case SEC_VOLTAGE_13: 599 cx23885_gpio_set(dev, GPIO_1); 600 cx23885_gpio_clear(dev, GPIO_0); 601 break; 602 case SEC_VOLTAGE_18: 603 cx23885_gpio_set(dev, GPIO_1); 604 cx23885_gpio_set(dev, GPIO_0); 605 break; 606 case SEC_VOLTAGE_OFF: 607 cx23885_gpio_clear(dev, GPIO_1); 608 cx23885_gpio_clear(dev, GPIO_0); 609 break; 610 } 611 612 /* call the frontend set_voltage function */ 613 port->fe_set_voltage(fe, voltage); 614 615 return 0; 616 } 617 618 static int dvbsky_s952_portc_set_voltage(struct dvb_frontend *fe, 619 fe_sec_voltage_t voltage) 620 { 621 struct cx23885_tsport *port = fe->dvb->priv; 622 struct cx23885_dev *dev = port->dev; 623 624 cx23885_gpio_enable(dev, GPIO_12 | GPIO_13, 1); 625 626 switch (voltage) { 627 case SEC_VOLTAGE_13: 628 cx23885_gpio_set(dev, GPIO_13); 629 cx23885_gpio_clear(dev, GPIO_12); 630 break; 631 case SEC_VOLTAGE_18: 632 cx23885_gpio_set(dev, GPIO_13); 633 cx23885_gpio_set(dev, GPIO_12); 634 break; 635 case SEC_VOLTAGE_OFF: 636 cx23885_gpio_clear(dev, GPIO_13); 637 cx23885_gpio_clear(dev, GPIO_12); 638 break; 639 } 640 /* call the frontend set_voltage function */ 641 return port->fe_set_voltage(fe, voltage); 642 } 643 644 static int cx23885_sp2_ci_ctrl(void *priv, u8 read, int addr, 645 u8 data, int *mem) 646 { 647 /* MC417 */ 648 #define SP2_DATA 0x000000ff 649 #define SP2_WR 0x00008000 650 #define SP2_RD 0x00004000 651 #define SP2_ACK 0x00001000 652 #define SP2_ADHI 0x00000800 653 #define SP2_ADLO 0x00000400 654 #define SP2_CS1 0x00000200 655 #define SP2_CS0 0x00000100 656 #define SP2_EN_ALL 0x00001000 657 #define SP2_CTRL_OFF (SP2_CS1 | SP2_CS0 | SP2_WR | SP2_RD) 658 659 struct cx23885_tsport *port = priv; 660 struct cx23885_dev *dev = port->dev; 661 int ret; 662 int tmp = 0; 663 unsigned long timeout; 664 665 mutex_lock(&dev->gpio_lock); 666 667 /* write addr */ 668 cx_write(MC417_OEN, SP2_EN_ALL); 669 cx_write(MC417_RWD, SP2_CTRL_OFF | 670 SP2_ADLO | (0xff & addr)); 671 cx_clear(MC417_RWD, SP2_ADLO); 672 cx_write(MC417_RWD, SP2_CTRL_OFF | 673 SP2_ADHI | (0xff & (addr >> 8))); 674 cx_clear(MC417_RWD, SP2_ADHI); 675 676 if (read) 677 /* data in */ 678 cx_write(MC417_OEN, SP2_EN_ALL | SP2_DATA); 679 else 680 /* data out */ 681 cx_write(MC417_RWD, SP2_CTRL_OFF | data); 682 683 /* chip select 0 */ 684 cx_clear(MC417_RWD, SP2_CS0); 685 686 /* read/write */ 687 cx_clear(MC417_RWD, (read) ? SP2_RD : SP2_WR); 688 689 /* wait for a maximum of 1 msec */ 690 timeout = jiffies + msecs_to_jiffies(1); 691 while (!time_after(jiffies, timeout)) { 692 tmp = cx_read(MC417_RWD); 693 if ((tmp & SP2_ACK) == 0) 694 break; 695 usleep_range(50, 100); 696 } 697 698 cx_set(MC417_RWD, SP2_CTRL_OFF); 699 *mem = tmp & 0xff; 700 701 mutex_unlock(&dev->gpio_lock); 702 703 if (!read) { 704 if (*mem < 0) { 705 ret = -EREMOTEIO; 706 goto err; 707 } 708 } 709 710 return 0; 711 err: 712 return ret; 713 } 714 715 static int cx23885_dvb_set_frontend(struct dvb_frontend *fe) 716 { 717 struct dtv_frontend_properties *p = &fe->dtv_property_cache; 718 struct cx23885_tsport *port = fe->dvb->priv; 719 struct cx23885_dev *dev = port->dev; 720 721 switch (dev->board) { 722 case CX23885_BOARD_HAUPPAUGE_HVR1275: 723 switch (p->modulation) { 724 case VSB_8: 725 cx23885_gpio_clear(dev, GPIO_5); 726 break; 727 case QAM_64: 728 case QAM_256: 729 default: 730 cx23885_gpio_set(dev, GPIO_5); 731 break; 732 } 733 break; 734 case CX23885_BOARD_MYGICA_X8506: 735 case CX23885_BOARD_MYGICA_X8507: 736 case CX23885_BOARD_MAGICPRO_PROHDTVE2: 737 /* Select Digital TV */ 738 cx23885_gpio_set(dev, GPIO_0); 739 break; 740 } 741 742 /* Call the real set_frontend */ 743 if (port->set_frontend) 744 return port->set_frontend(fe); 745 746 return 0; 747 } 748 749 static void cx23885_set_frontend_hook(struct cx23885_tsport *port, 750 struct dvb_frontend *fe) 751 { 752 port->set_frontend = fe->ops.set_frontend; 753 fe->ops.set_frontend = cx23885_dvb_set_frontend; 754 } 755 756 static struct lgs8gxx_config magicpro_prohdtve2_lgs8g75_config = { 757 .prod = LGS8GXX_PROD_LGS8G75, 758 .demod_address = 0x19, 759 .serial_ts = 0, 760 .ts_clk_pol = 1, 761 .ts_clk_gated = 1, 762 .if_clk_freq = 30400, /* 30.4 MHz */ 763 .if_freq = 6500, /* 6.50 MHz */ 764 .if_neg_center = 1, 765 .ext_adc = 0, 766 .adc_signed = 1, 767 .adc_vpp = 2, /* 1.6 Vpp */ 768 .if_neg_edge = 1, 769 }; 770 771 static struct xc5000_config magicpro_prohdtve2_xc5000_config = { 772 .i2c_address = 0x61, 773 .if_khz = 6500, 774 }; 775 776 static struct atbm8830_config mygica_x8558pro_atbm8830_cfg1 = { 777 .prod = ATBM8830_PROD_8830, 778 .demod_address = 0x44, 779 .serial_ts = 0, 780 .ts_sampling_edge = 1, 781 .ts_clk_gated = 0, 782 .osc_clk_freq = 30400, /* in kHz */ 783 .if_freq = 0, /* zero IF */ 784 .zif_swap_iq = 1, 785 .agc_min = 0x2E, 786 .agc_max = 0xFF, 787 .agc_hold_loop = 0, 788 }; 789 790 static struct max2165_config mygic_x8558pro_max2165_cfg1 = { 791 .i2c_address = 0x60, 792 .osc_clk = 20 793 }; 794 795 static struct atbm8830_config mygica_x8558pro_atbm8830_cfg2 = { 796 .prod = ATBM8830_PROD_8830, 797 .demod_address = 0x44, 798 .serial_ts = 1, 799 .ts_sampling_edge = 1, 800 .ts_clk_gated = 0, 801 .osc_clk_freq = 30400, /* in kHz */ 802 .if_freq = 0, /* zero IF */ 803 .zif_swap_iq = 1, 804 .agc_min = 0x2E, 805 .agc_max = 0xFF, 806 .agc_hold_loop = 0, 807 }; 808 809 static struct max2165_config mygic_x8558pro_max2165_cfg2 = { 810 .i2c_address = 0x60, 811 .osc_clk = 20 812 }; 813 static struct stv0367_config netup_stv0367_config[] = { 814 { 815 .demod_address = 0x1c, 816 .xtal = 27000000, 817 .if_khz = 4500, 818 .if_iq_mode = 0, 819 .ts_mode = 1, 820 .clk_pol = 0, 821 }, { 822 .demod_address = 0x1d, 823 .xtal = 27000000, 824 .if_khz = 4500, 825 .if_iq_mode = 0, 826 .ts_mode = 1, 827 .clk_pol = 0, 828 }, 829 }; 830 831 static struct xc5000_config netup_xc5000_config[] = { 832 { 833 .i2c_address = 0x61, 834 .if_khz = 4500, 835 }, { 836 .i2c_address = 0x64, 837 .if_khz = 4500, 838 }, 839 }; 840 841 static struct drxk_config terratec_drxk_config[] = { 842 { 843 .adr = 0x29, 844 .no_i2c_bridge = 1, 845 }, { 846 .adr = 0x2a, 847 .no_i2c_bridge = 1, 848 }, 849 }; 850 851 static struct mt2063_config terratec_mt2063_config[] = { 852 { 853 .tuner_address = 0x60, 854 }, { 855 .tuner_address = 0x67, 856 }, 857 }; 858 859 static const struct tda10071_config hauppauge_tda10071_config = { 860 .demod_i2c_addr = 0x05, 861 .tuner_i2c_addr = 0x54, 862 .i2c_wr_max = 64, 863 .ts_mode = TDA10071_TS_SERIAL, 864 .spec_inv = 0, 865 .xtal = 40444000, /* 40.444 MHz */ 866 .pll_multiplier = 20, 867 }; 868 869 static const struct a8293_config hauppauge_a8293_config = { 870 .i2c_addr = 0x0b, 871 }; 872 873 static const struct si2165_config hauppauge_hvr4400_si2165_config = { 874 .i2c_addr = 0x64, 875 .chip_mode = SI2165_MODE_PLL_XTAL, 876 .ref_freq_Hz = 16000000, 877 }; 878 879 static const struct m88ds3103_config dvbsky_t9580_m88ds3103_config = { 880 .i2c_addr = 0x68, 881 .clock = 27000000, 882 .i2c_wr_max = 33, 883 .clock_out = 0, 884 .ts_mode = M88DS3103_TS_PARALLEL, 885 .ts_clk = 16000, 886 .ts_clk_pol = 1, 887 .lnb_en_pol = 1, 888 .lnb_hv_pol = 0, 889 .agc = 0x99, 890 }; 891 892 static const struct m88ds3103_config dvbsky_s950c_m88ds3103_config = { 893 .i2c_addr = 0x68, 894 .clock = 27000000, 895 .i2c_wr_max = 33, 896 .clock_out = 0, 897 .ts_mode = M88DS3103_TS_CI, 898 .ts_clk = 10000, 899 .ts_clk_pol = 1, 900 .lnb_en_pol = 1, 901 .lnb_hv_pol = 0, 902 .agc = 0x99, 903 }; 904 905 static const struct m88ds3103_config dvbsky_s952_portc_m88ds3103_config = { 906 .i2c_addr = 0x68, 907 .clock = 27000000, 908 .i2c_wr_max = 33, 909 .clock_out = 0, 910 .ts_mode = M88DS3103_TS_SERIAL, 911 .ts_clk = 96000, 912 .ts_clk_pol = 0, 913 .lnb_en_pol = 1, 914 .lnb_hv_pol = 0, 915 .agc = 0x99, 916 }; 917 918 static int netup_altera_fpga_rw(void *device, int flag, int data, int read) 919 { 920 struct cx23885_dev *dev = (struct cx23885_dev *)device; 921 unsigned long timeout = jiffies + msecs_to_jiffies(1); 922 uint32_t mem = 0; 923 924 mem = cx_read(MC417_RWD); 925 if (read) 926 cx_set(MC417_OEN, ALT_DATA); 927 else { 928 cx_clear(MC417_OEN, ALT_DATA);/* D0-D7 out */ 929 mem &= ~ALT_DATA; 930 mem |= (data & ALT_DATA); 931 } 932 933 if (flag) 934 mem |= ALT_AD_RG; 935 else 936 mem &= ~ALT_AD_RG; 937 938 mem &= ~ALT_CS; 939 if (read) 940 mem = (mem & ~ALT_RD) | ALT_WR; 941 else 942 mem = (mem & ~ALT_WR) | ALT_RD; 943 944 cx_write(MC417_RWD, mem); /* start RW cycle */ 945 946 for (;;) { 947 mem = cx_read(MC417_RWD); 948 if ((mem & ALT_RDY) == 0) 949 break; 950 if (time_after(jiffies, timeout)) 951 break; 952 udelay(1); 953 } 954 955 cx_set(MC417_RWD, ALT_RD | ALT_WR | ALT_CS); 956 if (read) 957 return mem & ALT_DATA; 958 959 return 0; 960 }; 961 962 static int dib7070_tuner_reset(struct dvb_frontend *fe, int onoff) 963 { 964 struct dib7000p_ops *dib7000p_ops = fe->sec_priv; 965 966 return dib7000p_ops->set_gpio(fe, 8, 0, !onoff); 967 } 968 969 static int dib7070_tuner_sleep(struct dvb_frontend *fe, int onoff) 970 { 971 return 0; 972 } 973 974 static struct dib0070_config dib7070p_dib0070_config = { 975 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS, 976 .reset = dib7070_tuner_reset, 977 .sleep = dib7070_tuner_sleep, 978 .clock_khz = 12000, 979 .freq_offset_khz_vhf = 550, 980 /* .flip_chip = 1, */ 981 }; 982 983 /* DIB7070 generic */ 984 static struct dibx000_agc_config dib7070_agc_config = { 985 .band_caps = BAND_UHF | BAND_VHF | BAND_LBAND | BAND_SBAND, 986 987 /* 988 * P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5, 989 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0, 990 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 991 */ 992 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | 993 (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0), 994 .inv_gain = 600, 995 .time_stabiliz = 10, 996 .alpha_level = 0, 997 .thlock = 118, 998 .wbd_inv = 0, 999 .wbd_ref = 3530, 1000 .wbd_sel = 1, 1001 .wbd_alpha = 5, 1002 .agc1_max = 65535, 1003 .agc1_min = 0, 1004 .agc2_max = 65535, 1005 .agc2_min = 0, 1006 .agc1_pt1 = 0, 1007 .agc1_pt2 = 40, 1008 .agc1_pt3 = 183, 1009 .agc1_slope1 = 206, 1010 .agc1_slope2 = 255, 1011 .agc2_pt1 = 72, 1012 .agc2_pt2 = 152, 1013 .agc2_slope1 = 88, 1014 .agc2_slope2 = 90, 1015 .alpha_mant = 17, 1016 .alpha_exp = 27, 1017 .beta_mant = 23, 1018 .beta_exp = 51, 1019 .perform_agc_softsplit = 0, 1020 }; 1021 1022 static struct dibx000_bandwidth_config dib7070_bw_config_12_mhz = { 1023 .internal = 60000, 1024 .sampling = 15000, 1025 .pll_prediv = 1, 1026 .pll_ratio = 20, 1027 .pll_range = 3, 1028 .pll_reset = 1, 1029 .pll_bypass = 0, 1030 .enable_refdiv = 0, 1031 .bypclk_div = 0, 1032 .IO_CLK_en_core = 1, 1033 .ADClkSrc = 1, 1034 .modulo = 2, 1035 /* refsel, sel, freq_15k */ 1036 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0), 1037 .ifreq = (0 << 25) | 0, 1038 .timf = 20452225, 1039 .xtal_hz = 12000000, 1040 }; 1041 1042 static struct dib7000p_config dib7070p_dib7000p_config = { 1043 /* .output_mode = OUTMODE_MPEG2_FIFO, */ 1044 .output_mode = OUTMODE_MPEG2_SERIAL, 1045 /* .output_mode = OUTMODE_MPEG2_PAR_GATED_CLK, */ 1046 .output_mpeg2_in_188_bytes = 1, 1047 1048 .agc_config_count = 1, 1049 .agc = &dib7070_agc_config, 1050 .bw = &dib7070_bw_config_12_mhz, 1051 .tuner_is_baseband = 1, 1052 .spur_protect = 1, 1053 1054 .gpio_dir = 0xfcef, /* DIB7000P_GPIO_DEFAULT_DIRECTIONS, */ 1055 .gpio_val = 0x0110, /* DIB7000P_GPIO_DEFAULT_VALUES, */ 1056 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS, 1057 1058 .hostbus_diversity = 1, 1059 }; 1060 1061 static int dvb_register(struct cx23885_tsport *port) 1062 { 1063 struct dib7000p_ops dib7000p_ops; 1064 struct cx23885_dev *dev = port->dev; 1065 struct cx23885_i2c *i2c_bus = NULL, *i2c_bus2 = NULL; 1066 struct vb2_dvb_frontend *fe0, *fe1 = NULL; 1067 struct si2168_config si2168_config; 1068 struct si2157_config si2157_config; 1069 struct sp2_config sp2_config; 1070 struct m88ts2022_config m88ts2022_config; 1071 struct i2c_board_info info; 1072 struct i2c_adapter *adapter; 1073 struct i2c_client *client_demod = NULL, *client_tuner = NULL, *client_ci = NULL; 1074 const struct m88ds3103_config *p_m88ds3103_config = NULL; 1075 int (*p_set_voltage)(struct dvb_frontend *fe, fe_sec_voltage_t voltage) = NULL; 1076 int mfe_shared = 0; /* bus not shared by default */ 1077 int ret; 1078 1079 /* Get the first frontend */ 1080 fe0 = vb2_dvb_get_frontend(&port->frontends, 1); 1081 if (!fe0) 1082 return -EINVAL; 1083 1084 /* init struct vb2_dvb */ 1085 fe0->dvb.name = dev->name; 1086 1087 /* multi-frontend gate control is undefined or defaults to fe0 */ 1088 port->frontends.gate = 0; 1089 1090 /* Sets the gate control callback to be used by i2c command calls */ 1091 port->gate_ctrl = cx23885_dvb_gate_ctrl; 1092 1093 /* init frontend */ 1094 switch (dev->board) { 1095 case CX23885_BOARD_HAUPPAUGE_HVR1250: 1096 i2c_bus = &dev->i2c_bus[0]; 1097 fe0->dvb.frontend = dvb_attach(s5h1409_attach, 1098 &hauppauge_generic_config, 1099 &i2c_bus->i2c_adap); 1100 if (fe0->dvb.frontend == NULL) 1101 break; 1102 dvb_attach(mt2131_attach, fe0->dvb.frontend, 1103 &i2c_bus->i2c_adap, 1104 &hauppauge_generic_tunerconfig, 0); 1105 break; 1106 case CX23885_BOARD_HAUPPAUGE_HVR1270: 1107 case CX23885_BOARD_HAUPPAUGE_HVR1275: 1108 i2c_bus = &dev->i2c_bus[0]; 1109 fe0->dvb.frontend = dvb_attach(lgdt3305_attach, 1110 &hauppauge_lgdt3305_config, 1111 &i2c_bus->i2c_adap); 1112 if (fe0->dvb.frontend == NULL) 1113 break; 1114 dvb_attach(tda18271_attach, fe0->dvb.frontend, 1115 0x60, &dev->i2c_bus[1].i2c_adap, 1116 &hauppauge_hvr127x_config); 1117 if (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1275) 1118 cx23885_set_frontend_hook(port, fe0->dvb.frontend); 1119 break; 1120 case CX23885_BOARD_HAUPPAUGE_HVR1255: 1121 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111: 1122 i2c_bus = &dev->i2c_bus[0]; 1123 fe0->dvb.frontend = dvb_attach(s5h1411_attach, 1124 &hcw_s5h1411_config, 1125 &i2c_bus->i2c_adap); 1126 if (fe0->dvb.frontend == NULL) 1127 break; 1128 1129 dvb_attach(tda18271_attach, fe0->dvb.frontend, 1130 0x60, &dev->i2c_bus[1].i2c_adap, 1131 &hauppauge_tda18271_config); 1132 1133 tda18271_attach(&dev->ts1.analog_fe, 1134 0x60, &dev->i2c_bus[1].i2c_adap, 1135 &hauppauge_tda18271_config); 1136 1137 break; 1138 case CX23885_BOARD_HAUPPAUGE_HVR1800: 1139 i2c_bus = &dev->i2c_bus[0]; 1140 switch (alt_tuner) { 1141 case 1: 1142 fe0->dvb.frontend = 1143 dvb_attach(s5h1409_attach, 1144 &hauppauge_ezqam_config, 1145 &i2c_bus->i2c_adap); 1146 if (fe0->dvb.frontend == NULL) 1147 break; 1148 1149 dvb_attach(tda829x_attach, fe0->dvb.frontend, 1150 &dev->i2c_bus[1].i2c_adap, 0x42, 1151 &tda829x_no_probe); 1152 dvb_attach(tda18271_attach, fe0->dvb.frontend, 1153 0x60, &dev->i2c_bus[1].i2c_adap, 1154 &hauppauge_tda18271_config); 1155 break; 1156 case 0: 1157 default: 1158 fe0->dvb.frontend = 1159 dvb_attach(s5h1409_attach, 1160 &hauppauge_generic_config, 1161 &i2c_bus->i2c_adap); 1162 if (fe0->dvb.frontend == NULL) 1163 break; 1164 dvb_attach(mt2131_attach, fe0->dvb.frontend, 1165 &i2c_bus->i2c_adap, 1166 &hauppauge_generic_tunerconfig, 0); 1167 } 1168 break; 1169 case CX23885_BOARD_HAUPPAUGE_HVR1800lp: 1170 i2c_bus = &dev->i2c_bus[0]; 1171 fe0->dvb.frontend = dvb_attach(s5h1409_attach, 1172 &hauppauge_hvr1800lp_config, 1173 &i2c_bus->i2c_adap); 1174 if (fe0->dvb.frontend == NULL) 1175 break; 1176 dvb_attach(mt2131_attach, fe0->dvb.frontend, 1177 &i2c_bus->i2c_adap, 1178 &hauppauge_generic_tunerconfig, 0); 1179 break; 1180 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP: 1181 i2c_bus = &dev->i2c_bus[0]; 1182 fe0->dvb.frontend = dvb_attach(lgdt330x_attach, 1183 &fusionhdtv_5_express, 1184 &i2c_bus->i2c_adap); 1185 if (fe0->dvb.frontend == NULL) 1186 break; 1187 dvb_attach(simple_tuner_attach, fe0->dvb.frontend, 1188 &i2c_bus->i2c_adap, 0x61, 1189 TUNER_LG_TDVS_H06XF); 1190 break; 1191 case CX23885_BOARD_HAUPPAUGE_HVR1500Q: 1192 i2c_bus = &dev->i2c_bus[1]; 1193 fe0->dvb.frontend = dvb_attach(s5h1409_attach, 1194 &hauppauge_hvr1500q_config, 1195 &dev->i2c_bus[0].i2c_adap); 1196 if (fe0->dvb.frontend == NULL) 1197 break; 1198 dvb_attach(xc5000_attach, fe0->dvb.frontend, 1199 &i2c_bus->i2c_adap, 1200 &hauppauge_hvr1500q_tunerconfig); 1201 break; 1202 case CX23885_BOARD_HAUPPAUGE_HVR1500: 1203 i2c_bus = &dev->i2c_bus[1]; 1204 fe0->dvb.frontend = dvb_attach(s5h1409_attach, 1205 &hauppauge_hvr1500_config, 1206 &dev->i2c_bus[0].i2c_adap); 1207 if (fe0->dvb.frontend != NULL) { 1208 struct dvb_frontend *fe; 1209 struct xc2028_config cfg = { 1210 .i2c_adap = &i2c_bus->i2c_adap, 1211 .i2c_addr = 0x61, 1212 }; 1213 static struct xc2028_ctrl ctl = { 1214 .fname = XC2028_DEFAULT_FIRMWARE, 1215 .max_len = 64, 1216 .demod = XC3028_FE_OREN538, 1217 }; 1218 1219 fe = dvb_attach(xc2028_attach, 1220 fe0->dvb.frontend, &cfg); 1221 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL) 1222 fe->ops.tuner_ops.set_config(fe, &ctl); 1223 } 1224 break; 1225 case CX23885_BOARD_HAUPPAUGE_HVR1200: 1226 case CX23885_BOARD_HAUPPAUGE_HVR1700: 1227 i2c_bus = &dev->i2c_bus[0]; 1228 fe0->dvb.frontend = dvb_attach(tda10048_attach, 1229 &hauppauge_hvr1200_config, 1230 &i2c_bus->i2c_adap); 1231 if (fe0->dvb.frontend == NULL) 1232 break; 1233 dvb_attach(tda829x_attach, fe0->dvb.frontend, 1234 &dev->i2c_bus[1].i2c_adap, 0x42, 1235 &tda829x_no_probe); 1236 dvb_attach(tda18271_attach, fe0->dvb.frontend, 1237 0x60, &dev->i2c_bus[1].i2c_adap, 1238 &hauppauge_hvr1200_tuner_config); 1239 break; 1240 case CX23885_BOARD_HAUPPAUGE_HVR1210: 1241 i2c_bus = &dev->i2c_bus[0]; 1242 fe0->dvb.frontend = dvb_attach(tda10048_attach, 1243 &hauppauge_hvr1210_config, 1244 &i2c_bus->i2c_adap); 1245 if (fe0->dvb.frontend != NULL) { 1246 dvb_attach(tda18271_attach, fe0->dvb.frontend, 1247 0x60, &dev->i2c_bus[1].i2c_adap, 1248 &hauppauge_hvr1210_tuner_config); 1249 } 1250 break; 1251 case CX23885_BOARD_HAUPPAUGE_HVR1400: 1252 i2c_bus = &dev->i2c_bus[0]; 1253 1254 if (!dvb_attach(dib7000p_attach, &dib7000p_ops)) 1255 return -ENODEV; 1256 1257 fe0->dvb.frontend = dib7000p_ops.init(&i2c_bus->i2c_adap, 1258 0x12, &hauppauge_hvr1400_dib7000_config); 1259 if (fe0->dvb.frontend != NULL) { 1260 struct dvb_frontend *fe; 1261 struct xc2028_config cfg = { 1262 .i2c_adap = &dev->i2c_bus[1].i2c_adap, 1263 .i2c_addr = 0x64, 1264 }; 1265 static struct xc2028_ctrl ctl = { 1266 .fname = XC3028L_DEFAULT_FIRMWARE, 1267 .max_len = 64, 1268 .demod = XC3028_FE_DIBCOM52, 1269 /* This is true for all demods with 1270 v36 firmware? */ 1271 .type = XC2028_D2633, 1272 }; 1273 1274 fe = dvb_attach(xc2028_attach, 1275 fe0->dvb.frontend, &cfg); 1276 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL) 1277 fe->ops.tuner_ops.set_config(fe, &ctl); 1278 } 1279 break; 1280 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP: 1281 i2c_bus = &dev->i2c_bus[port->nr - 1]; 1282 1283 fe0->dvb.frontend = dvb_attach(s5h1409_attach, 1284 &dvico_s5h1409_config, 1285 &i2c_bus->i2c_adap); 1286 if (fe0->dvb.frontend == NULL) 1287 fe0->dvb.frontend = dvb_attach(s5h1411_attach, 1288 &dvico_s5h1411_config, 1289 &i2c_bus->i2c_adap); 1290 if (fe0->dvb.frontend != NULL) 1291 dvb_attach(xc5000_attach, fe0->dvb.frontend, 1292 &i2c_bus->i2c_adap, 1293 &dvico_xc5000_tunerconfig); 1294 break; 1295 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: { 1296 i2c_bus = &dev->i2c_bus[port->nr - 1]; 1297 1298 fe0->dvb.frontend = dvb_attach(zl10353_attach, 1299 &dvico_fusionhdtv_xc3028, 1300 &i2c_bus->i2c_adap); 1301 if (fe0->dvb.frontend != NULL) { 1302 struct dvb_frontend *fe; 1303 struct xc2028_config cfg = { 1304 .i2c_adap = &i2c_bus->i2c_adap, 1305 .i2c_addr = 0x61, 1306 }; 1307 static struct xc2028_ctrl ctl = { 1308 .fname = XC2028_DEFAULT_FIRMWARE, 1309 .max_len = 64, 1310 .demod = XC3028_FE_ZARLINK456, 1311 }; 1312 1313 fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, 1314 &cfg); 1315 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL) 1316 fe->ops.tuner_ops.set_config(fe, &ctl); 1317 } 1318 break; 1319 } 1320 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2: { 1321 i2c_bus = &dev->i2c_bus[port->nr - 1]; 1322 /* cxusb_ctrl_msg(adap->dev, CMD_DIGITAL, NULL, 0, NULL, 0); */ 1323 /* cxusb_bluebird_gpio_pulse(adap->dev, 0x02, 1); */ 1324 1325 if (!dvb_attach(dib7000p_attach, &dib7000p_ops)) 1326 return -ENODEV; 1327 1328 if (dib7000p_ops.i2c_enumeration(&i2c_bus->i2c_adap, 1, 0x12, &dib7070p_dib7000p_config) < 0) { 1329 printk(KERN_WARNING "Unable to enumerate dib7000p\n"); 1330 return -ENODEV; 1331 } 1332 fe0->dvb.frontend = dib7000p_ops.init(&i2c_bus->i2c_adap, 0x80, &dib7070p_dib7000p_config); 1333 if (fe0->dvb.frontend != NULL) { 1334 struct i2c_adapter *tun_i2c; 1335 1336 fe0->dvb.frontend->sec_priv = kmalloc(sizeof(dib7000p_ops), GFP_KERNEL); 1337 memcpy(fe0->dvb.frontend->sec_priv, &dib7000p_ops, sizeof(dib7000p_ops)); 1338 tun_i2c = dib7000p_ops.get_i2c_master(fe0->dvb.frontend, DIBX000_I2C_INTERFACE_TUNER, 1); 1339 if (!dvb_attach(dib0070_attach, fe0->dvb.frontend, tun_i2c, &dib7070p_dib0070_config)) 1340 return -ENODEV; 1341 } 1342 break; 1343 } 1344 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H: 1345 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F: 1346 case CX23885_BOARD_COMPRO_VIDEOMATE_E800: 1347 i2c_bus = &dev->i2c_bus[0]; 1348 1349 fe0->dvb.frontend = dvb_attach(zl10353_attach, 1350 &dvico_fusionhdtv_xc3028, 1351 &i2c_bus->i2c_adap); 1352 if (fe0->dvb.frontend != NULL) { 1353 struct dvb_frontend *fe; 1354 struct xc2028_config cfg = { 1355 .i2c_adap = &dev->i2c_bus[1].i2c_adap, 1356 .i2c_addr = 0x61, 1357 }; 1358 static struct xc2028_ctrl ctl = { 1359 .fname = XC2028_DEFAULT_FIRMWARE, 1360 .max_len = 64, 1361 .demod = XC3028_FE_ZARLINK456, 1362 }; 1363 1364 fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, 1365 &cfg); 1366 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL) 1367 fe->ops.tuner_ops.set_config(fe, &ctl); 1368 } 1369 break; 1370 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000: 1371 i2c_bus = &dev->i2c_bus[0]; 1372 1373 fe0->dvb.frontend = dvb_attach(zl10353_attach, 1374 &dvico_fusionhdtv_xc3028, 1375 &i2c_bus->i2c_adap); 1376 if (fe0->dvb.frontend != NULL) { 1377 struct dvb_frontend *fe; 1378 struct xc4000_config cfg = { 1379 .i2c_address = 0x61, 1380 .default_pm = 0, 1381 .dvb_amplitude = 134, 1382 .set_smoothedcvbs = 1, 1383 .if_khz = 4560 1384 }; 1385 1386 fe = dvb_attach(xc4000_attach, fe0->dvb.frontend, 1387 &dev->i2c_bus[1].i2c_adap, &cfg); 1388 if (!fe) { 1389 printk(KERN_ERR "%s/2: xc4000 attach failed\n", 1390 dev->name); 1391 goto frontend_detach; 1392 } 1393 } 1394 break; 1395 case CX23885_BOARD_TBS_6920: 1396 i2c_bus = &dev->i2c_bus[1]; 1397 1398 fe0->dvb.frontend = dvb_attach(cx24116_attach, 1399 &tbs_cx24116_config, 1400 &i2c_bus->i2c_adap); 1401 if (fe0->dvb.frontend != NULL) 1402 fe0->dvb.frontend->ops.set_voltage = f300_set_voltage; 1403 1404 break; 1405 case CX23885_BOARD_TBS_6980: 1406 case CX23885_BOARD_TBS_6981: 1407 i2c_bus = &dev->i2c_bus[1]; 1408 1409 switch (port->nr) { 1410 /* PORT B */ 1411 case 1: 1412 fe0->dvb.frontend = dvb_attach(cx24117_attach, 1413 &tbs_cx24117_config, 1414 &i2c_bus->i2c_adap); 1415 break; 1416 /* PORT C */ 1417 case 2: 1418 fe0->dvb.frontend = dvb_attach(cx24117_attach, 1419 &tbs_cx24117_config, 1420 &i2c_bus->i2c_adap); 1421 break; 1422 } 1423 break; 1424 case CX23885_BOARD_TEVII_S470: 1425 i2c_bus = &dev->i2c_bus[1]; 1426 1427 fe0->dvb.frontend = dvb_attach(ds3000_attach, 1428 &tevii_ds3000_config, 1429 &i2c_bus->i2c_adap); 1430 if (fe0->dvb.frontend != NULL) { 1431 dvb_attach(ts2020_attach, fe0->dvb.frontend, 1432 &tevii_ts2020_config, &i2c_bus->i2c_adap); 1433 fe0->dvb.frontend->ops.set_voltage = f300_set_voltage; 1434 } 1435 1436 break; 1437 case CX23885_BOARD_DVBWORLD_2005: 1438 i2c_bus = &dev->i2c_bus[1]; 1439 1440 fe0->dvb.frontend = dvb_attach(cx24116_attach, 1441 &dvbworld_cx24116_config, 1442 &i2c_bus->i2c_adap); 1443 break; 1444 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: 1445 i2c_bus = &dev->i2c_bus[0]; 1446 switch (port->nr) { 1447 /* port B */ 1448 case 1: 1449 fe0->dvb.frontend = dvb_attach(stv0900_attach, 1450 &netup_stv0900_config, 1451 &i2c_bus->i2c_adap, 0); 1452 if (fe0->dvb.frontend != NULL) { 1453 if (dvb_attach(stv6110_attach, 1454 fe0->dvb.frontend, 1455 &netup_stv6110_tunerconfig_a, 1456 &i2c_bus->i2c_adap)) { 1457 if (!dvb_attach(lnbh24_attach, 1458 fe0->dvb.frontend, 1459 &i2c_bus->i2c_adap, 1460 LNBH24_PCL | LNBH24_TTX, 1461 LNBH24_TEN, 0x09)) 1462 printk(KERN_ERR 1463 "No LNBH24 found!\n"); 1464 1465 } 1466 } 1467 break; 1468 /* port C */ 1469 case 2: 1470 fe0->dvb.frontend = dvb_attach(stv0900_attach, 1471 &netup_stv0900_config, 1472 &i2c_bus->i2c_adap, 1); 1473 if (fe0->dvb.frontend != NULL) { 1474 if (dvb_attach(stv6110_attach, 1475 fe0->dvb.frontend, 1476 &netup_stv6110_tunerconfig_b, 1477 &i2c_bus->i2c_adap)) { 1478 if (!dvb_attach(lnbh24_attach, 1479 fe0->dvb.frontend, 1480 &i2c_bus->i2c_adap, 1481 LNBH24_PCL | LNBH24_TTX, 1482 LNBH24_TEN, 0x0a)) 1483 printk(KERN_ERR 1484 "No LNBH24 found!\n"); 1485 1486 } 1487 } 1488 break; 1489 } 1490 break; 1491 case CX23885_BOARD_MYGICA_X8506: 1492 i2c_bus = &dev->i2c_bus[0]; 1493 i2c_bus2 = &dev->i2c_bus[1]; 1494 fe0->dvb.frontend = dvb_attach(lgs8gxx_attach, 1495 &mygica_x8506_lgs8gl5_config, 1496 &i2c_bus->i2c_adap); 1497 if (fe0->dvb.frontend == NULL) 1498 break; 1499 dvb_attach(xc5000_attach, fe0->dvb.frontend, 1500 &i2c_bus2->i2c_adap, &mygica_x8506_xc5000_config); 1501 cx23885_set_frontend_hook(port, fe0->dvb.frontend); 1502 break; 1503 case CX23885_BOARD_MYGICA_X8507: 1504 i2c_bus = &dev->i2c_bus[0]; 1505 i2c_bus2 = &dev->i2c_bus[1]; 1506 fe0->dvb.frontend = dvb_attach(mb86a20s_attach, 1507 &mygica_x8507_mb86a20s_config, 1508 &i2c_bus->i2c_adap); 1509 if (fe0->dvb.frontend == NULL) 1510 break; 1511 1512 dvb_attach(xc5000_attach, fe0->dvb.frontend, 1513 &i2c_bus2->i2c_adap, 1514 &mygica_x8507_xc5000_config); 1515 cx23885_set_frontend_hook(port, fe0->dvb.frontend); 1516 break; 1517 case CX23885_BOARD_MAGICPRO_PROHDTVE2: 1518 i2c_bus = &dev->i2c_bus[0]; 1519 i2c_bus2 = &dev->i2c_bus[1]; 1520 fe0->dvb.frontend = dvb_attach(lgs8gxx_attach, 1521 &magicpro_prohdtve2_lgs8g75_config, 1522 &i2c_bus->i2c_adap); 1523 if (fe0->dvb.frontend == NULL) 1524 break; 1525 dvb_attach(xc5000_attach, fe0->dvb.frontend, 1526 &i2c_bus2->i2c_adap, 1527 &magicpro_prohdtve2_xc5000_config); 1528 cx23885_set_frontend_hook(port, fe0->dvb.frontend); 1529 break; 1530 case CX23885_BOARD_HAUPPAUGE_HVR1850: 1531 i2c_bus = &dev->i2c_bus[0]; 1532 fe0->dvb.frontend = dvb_attach(s5h1411_attach, 1533 &hcw_s5h1411_config, 1534 &i2c_bus->i2c_adap); 1535 if (fe0->dvb.frontend == NULL) 1536 break; 1537 dvb_attach(tda18271_attach, fe0->dvb.frontend, 1538 0x60, &dev->i2c_bus[0].i2c_adap, 1539 &hauppauge_tda18271_config); 1540 1541 tda18271_attach(&dev->ts1.analog_fe, 1542 0x60, &dev->i2c_bus[1].i2c_adap, 1543 &hauppauge_tda18271_config); 1544 1545 break; 1546 case CX23885_BOARD_HAUPPAUGE_HVR1290: 1547 i2c_bus = &dev->i2c_bus[0]; 1548 fe0->dvb.frontend = dvb_attach(s5h1411_attach, 1549 &hcw_s5h1411_config, 1550 &i2c_bus->i2c_adap); 1551 if (fe0->dvb.frontend == NULL) 1552 break; 1553 dvb_attach(tda18271_attach, fe0->dvb.frontend, 1554 0x60, &dev->i2c_bus[0].i2c_adap, 1555 &hauppauge_tda18271_config); 1556 break; 1557 case CX23885_BOARD_MYGICA_X8558PRO: 1558 switch (port->nr) { 1559 /* port B */ 1560 case 1: 1561 i2c_bus = &dev->i2c_bus[0]; 1562 fe0->dvb.frontend = dvb_attach(atbm8830_attach, 1563 &mygica_x8558pro_atbm8830_cfg1, 1564 &i2c_bus->i2c_adap); 1565 if (fe0->dvb.frontend == NULL) 1566 break; 1567 dvb_attach(max2165_attach, fe0->dvb.frontend, 1568 &i2c_bus->i2c_adap, 1569 &mygic_x8558pro_max2165_cfg1); 1570 break; 1571 /* port C */ 1572 case 2: 1573 i2c_bus = &dev->i2c_bus[1]; 1574 fe0->dvb.frontend = dvb_attach(atbm8830_attach, 1575 &mygica_x8558pro_atbm8830_cfg2, 1576 &i2c_bus->i2c_adap); 1577 if (fe0->dvb.frontend == NULL) 1578 break; 1579 dvb_attach(max2165_attach, fe0->dvb.frontend, 1580 &i2c_bus->i2c_adap, 1581 &mygic_x8558pro_max2165_cfg2); 1582 } 1583 break; 1584 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: 1585 i2c_bus = &dev->i2c_bus[0]; 1586 mfe_shared = 1;/* MFE */ 1587 port->frontends.gate = 0;/* not clear for me yet */ 1588 /* ports B, C */ 1589 /* MFE frontend 1 DVB-T */ 1590 fe0->dvb.frontend = dvb_attach(stv0367ter_attach, 1591 &netup_stv0367_config[port->nr - 1], 1592 &i2c_bus->i2c_adap); 1593 if (fe0->dvb.frontend == NULL) 1594 break; 1595 if (NULL == dvb_attach(xc5000_attach, fe0->dvb.frontend, 1596 &i2c_bus->i2c_adap, 1597 &netup_xc5000_config[port->nr - 1])) 1598 goto frontend_detach; 1599 /* load xc5000 firmware */ 1600 fe0->dvb.frontend->ops.tuner_ops.init(fe0->dvb.frontend); 1601 1602 /* MFE frontend 2 */ 1603 fe1 = vb2_dvb_get_frontend(&port->frontends, 2); 1604 if (fe1 == NULL) 1605 goto frontend_detach; 1606 /* DVB-C init */ 1607 fe1->dvb.frontend = dvb_attach(stv0367cab_attach, 1608 &netup_stv0367_config[port->nr - 1], 1609 &i2c_bus->i2c_adap); 1610 if (fe1->dvb.frontend == NULL) 1611 break; 1612 1613 fe1->dvb.frontend->id = 1; 1614 if (NULL == dvb_attach(xc5000_attach, 1615 fe1->dvb.frontend, 1616 &i2c_bus->i2c_adap, 1617 &netup_xc5000_config[port->nr - 1])) 1618 goto frontend_detach; 1619 break; 1620 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL: 1621 i2c_bus = &dev->i2c_bus[0]; 1622 i2c_bus2 = &dev->i2c_bus[1]; 1623 1624 switch (port->nr) { 1625 /* port b */ 1626 case 1: 1627 fe0->dvb.frontend = dvb_attach(drxk_attach, 1628 &terratec_drxk_config[0], 1629 &i2c_bus->i2c_adap); 1630 if (fe0->dvb.frontend == NULL) 1631 break; 1632 if (!dvb_attach(mt2063_attach, 1633 fe0->dvb.frontend, 1634 &terratec_mt2063_config[0], 1635 &i2c_bus2->i2c_adap)) 1636 goto frontend_detach; 1637 break; 1638 /* port c */ 1639 case 2: 1640 fe0->dvb.frontend = dvb_attach(drxk_attach, 1641 &terratec_drxk_config[1], 1642 &i2c_bus->i2c_adap); 1643 if (fe0->dvb.frontend == NULL) 1644 break; 1645 if (!dvb_attach(mt2063_attach, 1646 fe0->dvb.frontend, 1647 &terratec_mt2063_config[1], 1648 &i2c_bus2->i2c_adap)) 1649 goto frontend_detach; 1650 break; 1651 } 1652 break; 1653 case CX23885_BOARD_TEVII_S471: 1654 i2c_bus = &dev->i2c_bus[1]; 1655 1656 fe0->dvb.frontend = dvb_attach(ds3000_attach, 1657 &tevii_ds3000_config, 1658 &i2c_bus->i2c_adap); 1659 if (fe0->dvb.frontend == NULL) 1660 break; 1661 dvb_attach(ts2020_attach, fe0->dvb.frontend, 1662 &tevii_ts2020_config, &i2c_bus->i2c_adap); 1663 break; 1664 case CX23885_BOARD_PROF_8000: 1665 i2c_bus = &dev->i2c_bus[0]; 1666 1667 fe0->dvb.frontend = dvb_attach(stv090x_attach, 1668 &prof_8000_stv090x_config, 1669 &i2c_bus->i2c_adap, 1670 STV090x_DEMODULATOR_0); 1671 if (fe0->dvb.frontend == NULL) 1672 break; 1673 if (!dvb_attach(stb6100_attach, 1674 fe0->dvb.frontend, 1675 &prof_8000_stb6100_config, 1676 &i2c_bus->i2c_adap)) 1677 goto frontend_detach; 1678 1679 fe0->dvb.frontend->ops.set_voltage = p8000_set_voltage; 1680 break; 1681 case CX23885_BOARD_HAUPPAUGE_HVR4400: 1682 i2c_bus = &dev->i2c_bus[0]; 1683 i2c_bus2 = &dev->i2c_bus[1]; 1684 switch (port->nr) { 1685 /* port b */ 1686 case 1: 1687 fe0->dvb.frontend = dvb_attach(tda10071_attach, 1688 &hauppauge_tda10071_config, 1689 &i2c_bus->i2c_adap); 1690 if (fe0->dvb.frontend == NULL) 1691 break; 1692 if (!dvb_attach(a8293_attach, fe0->dvb.frontend, 1693 &i2c_bus->i2c_adap, 1694 &hauppauge_a8293_config)) 1695 goto frontend_detach; 1696 break; 1697 /* port c */ 1698 case 2: 1699 fe0->dvb.frontend = dvb_attach(si2165_attach, 1700 &hauppauge_hvr4400_si2165_config, 1701 &i2c_bus->i2c_adap); 1702 if (fe0->dvb.frontend == NULL) 1703 break; 1704 fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL; 1705 if (!dvb_attach(tda18271_attach, 1706 fe0->dvb.frontend, 1707 0x60, &i2c_bus2->i2c_adap, 1708 &hauppauge_hvr4400_tuner_config)) 1709 goto frontend_detach; 1710 break; 1711 } 1712 break; 1713 case CX23885_BOARD_HAUPPAUGE_STARBURST: 1714 i2c_bus = &dev->i2c_bus[0]; 1715 fe0->dvb.frontend = dvb_attach(tda10071_attach, 1716 &hauppauge_tda10071_config, 1717 &i2c_bus->i2c_adap); 1718 if (fe0->dvb.frontend != NULL) { 1719 dvb_attach(a8293_attach, fe0->dvb.frontend, 1720 &i2c_bus->i2c_adap, 1721 &hauppauge_a8293_config); 1722 } 1723 break; 1724 case CX23885_BOARD_DVBSKY_T9580: 1725 case CX23885_BOARD_DVBSKY_S950: 1726 i2c_bus = &dev->i2c_bus[0]; 1727 i2c_bus2 = &dev->i2c_bus[1]; 1728 switch (port->nr) { 1729 /* port b - satellite */ 1730 case 1: 1731 /* attach frontend */ 1732 fe0->dvb.frontend = dvb_attach(m88ds3103_attach, 1733 &dvbsky_t9580_m88ds3103_config, 1734 &i2c_bus2->i2c_adap, &adapter); 1735 if (fe0->dvb.frontend == NULL) 1736 break; 1737 1738 /* attach tuner */ 1739 memset(&m88ts2022_config, 0, sizeof(m88ts2022_config)); 1740 m88ts2022_config.fe = fe0->dvb.frontend; 1741 m88ts2022_config.clock = 27000000; 1742 memset(&info, 0, sizeof(struct i2c_board_info)); 1743 strlcpy(info.type, "m88ts2022", I2C_NAME_SIZE); 1744 info.addr = 0x60; 1745 info.platform_data = &m88ts2022_config; 1746 request_module(info.type); 1747 client_tuner = i2c_new_device(adapter, &info); 1748 if (client_tuner == NULL || 1749 client_tuner->dev.driver == NULL) 1750 goto frontend_detach; 1751 if (!try_module_get(client_tuner->dev.driver->owner)) { 1752 i2c_unregister_device(client_tuner); 1753 goto frontend_detach; 1754 } 1755 1756 /* delegate signal strength measurement to tuner */ 1757 fe0->dvb.frontend->ops.read_signal_strength = 1758 fe0->dvb.frontend->ops.tuner_ops.get_rf_strength; 1759 1760 /* 1761 * for setting the voltage we need to set GPIOs on 1762 * the card. 1763 */ 1764 port->fe_set_voltage = 1765 fe0->dvb.frontend->ops.set_voltage; 1766 fe0->dvb.frontend->ops.set_voltage = 1767 dvbsky_t9580_set_voltage; 1768 1769 port->i2c_client_tuner = client_tuner; 1770 1771 break; 1772 /* port c - terrestrial/cable */ 1773 case 2: 1774 /* attach frontend */ 1775 memset(&si2168_config, 0, sizeof(si2168_config)); 1776 si2168_config.i2c_adapter = &adapter; 1777 si2168_config.fe = &fe0->dvb.frontend; 1778 si2168_config.ts_mode = SI2168_TS_SERIAL; 1779 memset(&info, 0, sizeof(struct i2c_board_info)); 1780 strlcpy(info.type, "si2168", I2C_NAME_SIZE); 1781 info.addr = 0x64; 1782 info.platform_data = &si2168_config; 1783 request_module(info.type); 1784 client_demod = i2c_new_device(&i2c_bus->i2c_adap, &info); 1785 if (client_demod == NULL || 1786 client_demod->dev.driver == NULL) 1787 goto frontend_detach; 1788 if (!try_module_get(client_demod->dev.driver->owner)) { 1789 i2c_unregister_device(client_demod); 1790 goto frontend_detach; 1791 } 1792 port->i2c_client_demod = client_demod; 1793 1794 /* attach tuner */ 1795 memset(&si2157_config, 0, sizeof(si2157_config)); 1796 si2157_config.fe = fe0->dvb.frontend; 1797 memset(&info, 0, sizeof(struct i2c_board_info)); 1798 strlcpy(info.type, "si2157", I2C_NAME_SIZE); 1799 info.addr = 0x60; 1800 info.platform_data = &si2157_config; 1801 request_module(info.type); 1802 client_tuner = i2c_new_device(adapter, &info); 1803 if (client_tuner == NULL || 1804 client_tuner->dev.driver == NULL) { 1805 module_put(client_demod->dev.driver->owner); 1806 i2c_unregister_device(client_demod); 1807 goto frontend_detach; 1808 } 1809 if (!try_module_get(client_tuner->dev.driver->owner)) { 1810 i2c_unregister_device(client_tuner); 1811 module_put(client_demod->dev.driver->owner); 1812 i2c_unregister_device(client_demod); 1813 goto frontend_detach; 1814 } 1815 port->i2c_client_tuner = client_tuner; 1816 break; 1817 } 1818 break; 1819 case CX23885_BOARD_DVBSKY_T980C: 1820 case CX23885_BOARD_TT_CT2_4500_CI: 1821 i2c_bus = &dev->i2c_bus[1]; 1822 i2c_bus2 = &dev->i2c_bus[0]; 1823 1824 /* attach frontend */ 1825 memset(&si2168_config, 0, sizeof(si2168_config)); 1826 si2168_config.i2c_adapter = &adapter; 1827 si2168_config.fe = &fe0->dvb.frontend; 1828 si2168_config.ts_mode = SI2168_TS_PARALLEL; 1829 memset(&info, 0, sizeof(struct i2c_board_info)); 1830 strlcpy(info.type, "si2168", I2C_NAME_SIZE); 1831 info.addr = 0x64; 1832 info.platform_data = &si2168_config; 1833 request_module(info.type); 1834 client_demod = i2c_new_device(&i2c_bus->i2c_adap, &info); 1835 if (client_demod == NULL || 1836 client_demod->dev.driver == NULL) 1837 goto frontend_detach; 1838 if (!try_module_get(client_demod->dev.driver->owner)) { 1839 i2c_unregister_device(client_demod); 1840 goto frontend_detach; 1841 } 1842 port->i2c_client_demod = client_demod; 1843 1844 /* attach tuner */ 1845 memset(&si2157_config, 0, sizeof(si2157_config)); 1846 si2157_config.fe = fe0->dvb.frontend; 1847 memset(&info, 0, sizeof(struct i2c_board_info)); 1848 strlcpy(info.type, "si2157", I2C_NAME_SIZE); 1849 info.addr = 0x60; 1850 info.platform_data = &si2157_config; 1851 request_module(info.type); 1852 client_tuner = i2c_new_device(adapter, &info); 1853 if (client_tuner == NULL || 1854 client_tuner->dev.driver == NULL) { 1855 module_put(client_demod->dev.driver->owner); 1856 i2c_unregister_device(client_demod); 1857 goto frontend_detach; 1858 } 1859 if (!try_module_get(client_tuner->dev.driver->owner)) { 1860 i2c_unregister_device(client_tuner); 1861 module_put(client_demod->dev.driver->owner); 1862 i2c_unregister_device(client_demod); 1863 goto frontend_detach; 1864 } 1865 port->i2c_client_tuner = client_tuner; 1866 break; 1867 case CX23885_BOARD_DVBSKY_S950C: 1868 i2c_bus = &dev->i2c_bus[1]; 1869 i2c_bus2 = &dev->i2c_bus[0]; 1870 1871 /* attach frontend */ 1872 fe0->dvb.frontend = dvb_attach(m88ds3103_attach, 1873 &dvbsky_s950c_m88ds3103_config, 1874 &i2c_bus->i2c_adap, &adapter); 1875 if (fe0->dvb.frontend == NULL) 1876 break; 1877 1878 /* attach tuner */ 1879 memset(&m88ts2022_config, 0, sizeof(m88ts2022_config)); 1880 m88ts2022_config.fe = fe0->dvb.frontend; 1881 m88ts2022_config.clock = 27000000; 1882 memset(&info, 0, sizeof(struct i2c_board_info)); 1883 strlcpy(info.type, "m88ts2022", I2C_NAME_SIZE); 1884 info.addr = 0x60; 1885 info.platform_data = &m88ts2022_config; 1886 request_module(info.type); 1887 client_tuner = i2c_new_device(adapter, &info); 1888 if (client_tuner == NULL || 1889 client_tuner->dev.driver == NULL) 1890 goto frontend_detach; 1891 if (!try_module_get(client_tuner->dev.driver->owner)) { 1892 i2c_unregister_device(client_tuner); 1893 goto frontend_detach; 1894 } 1895 1896 /* delegate signal strength measurement to tuner */ 1897 fe0->dvb.frontend->ops.read_signal_strength = 1898 fe0->dvb.frontend->ops.tuner_ops.get_rf_strength; 1899 1900 port->i2c_client_tuner = client_tuner; 1901 break; 1902 case CX23885_BOARD_DVBSKY_S952: 1903 switch (port->nr) { 1904 /* port b */ 1905 case 1: 1906 i2c_bus = &dev->i2c_bus[1]; 1907 p_m88ds3103_config = &dvbsky_t9580_m88ds3103_config; 1908 p_set_voltage = dvbsky_t9580_set_voltage; 1909 break; 1910 /* port c */ 1911 case 2: 1912 i2c_bus = &dev->i2c_bus[0]; 1913 p_m88ds3103_config = &dvbsky_s952_portc_m88ds3103_config; 1914 p_set_voltage = dvbsky_s952_portc_set_voltage; 1915 break; 1916 } 1917 1918 /* attach frontend */ 1919 fe0->dvb.frontend = dvb_attach(m88ds3103_attach, 1920 p_m88ds3103_config, 1921 &i2c_bus->i2c_adap, &adapter); 1922 if (fe0->dvb.frontend == NULL) 1923 break; 1924 1925 /* attach tuner */ 1926 memset(&m88ts2022_config, 0, sizeof(m88ts2022_config)); 1927 m88ts2022_config.fe = fe0->dvb.frontend; 1928 m88ts2022_config.clock = 27000000; 1929 memset(&info, 0, sizeof(struct i2c_board_info)); 1930 strlcpy(info.type, "m88ts2022", I2C_NAME_SIZE); 1931 info.addr = 0x60; 1932 info.platform_data = &m88ts2022_config; 1933 request_module(info.type); 1934 client_tuner = i2c_new_device(adapter, &info); 1935 if (client_tuner == NULL || 1936 client_tuner->dev.driver == NULL) 1937 goto frontend_detach; 1938 if (!try_module_get(client_tuner->dev.driver->owner)) { 1939 i2c_unregister_device(client_tuner); 1940 goto frontend_detach; 1941 } 1942 1943 /* delegate signal strength measurement to tuner */ 1944 fe0->dvb.frontend->ops.read_signal_strength = 1945 fe0->dvb.frontend->ops.tuner_ops.get_rf_strength; 1946 1947 /* 1948 * for setting the voltage we need to set GPIOs on 1949 * the card. 1950 */ 1951 port->fe_set_voltage = 1952 fe0->dvb.frontend->ops.set_voltage; 1953 fe0->dvb.frontend->ops.set_voltage = p_set_voltage; 1954 1955 port->i2c_client_tuner = client_tuner; 1956 break; 1957 case CX23885_BOARD_DVBSKY_T982: 1958 memset(&si2168_config, 0, sizeof(si2168_config)); 1959 switch (port->nr) { 1960 /* port b */ 1961 case 1: 1962 i2c_bus = &dev->i2c_bus[1]; 1963 si2168_config.ts_mode = SI2168_TS_PARALLEL; 1964 break; 1965 /* port c */ 1966 case 2: 1967 i2c_bus = &dev->i2c_bus[0]; 1968 si2168_config.ts_mode = SI2168_TS_SERIAL; 1969 break; 1970 } 1971 1972 /* attach frontend */ 1973 si2168_config.i2c_adapter = &adapter; 1974 si2168_config.fe = &fe0->dvb.frontend; 1975 memset(&info, 0, sizeof(struct i2c_board_info)); 1976 strlcpy(info.type, "si2168", I2C_NAME_SIZE); 1977 info.addr = 0x64; 1978 info.platform_data = &si2168_config; 1979 request_module(info.type); 1980 client_demod = i2c_new_device(&i2c_bus->i2c_adap, &info); 1981 if (client_demod == NULL || 1982 client_demod->dev.driver == NULL) 1983 goto frontend_detach; 1984 if (!try_module_get(client_demod->dev.driver->owner)) { 1985 i2c_unregister_device(client_demod); 1986 goto frontend_detach; 1987 } 1988 port->i2c_client_demod = client_demod; 1989 1990 /* attach tuner */ 1991 memset(&si2157_config, 0, sizeof(si2157_config)); 1992 si2157_config.fe = fe0->dvb.frontend; 1993 memset(&info, 0, sizeof(struct i2c_board_info)); 1994 strlcpy(info.type, "si2157", I2C_NAME_SIZE); 1995 info.addr = 0x60; 1996 info.platform_data = &si2157_config; 1997 request_module(info.type); 1998 client_tuner = i2c_new_device(adapter, &info); 1999 if (client_tuner == NULL || 2000 client_tuner->dev.driver == NULL) { 2001 module_put(client_demod->dev.driver->owner); 2002 i2c_unregister_device(client_demod); 2003 goto frontend_detach; 2004 } 2005 if (!try_module_get(client_tuner->dev.driver->owner)) { 2006 i2c_unregister_device(client_tuner); 2007 module_put(client_demod->dev.driver->owner); 2008 i2c_unregister_device(client_demod); 2009 port->i2c_client_demod = NULL; 2010 goto frontend_detach; 2011 } 2012 port->i2c_client_tuner = client_tuner; 2013 break; 2014 default: 2015 printk(KERN_INFO "%s: The frontend of your DVB/ATSC card " 2016 " isn't supported yet\n", 2017 dev->name); 2018 break; 2019 } 2020 2021 if ((NULL == fe0->dvb.frontend) || (fe1 && NULL == fe1->dvb.frontend)) { 2022 printk(KERN_ERR "%s: frontend initialization failed\n", 2023 dev->name); 2024 goto frontend_detach; 2025 } 2026 2027 /* define general-purpose callback pointer */ 2028 fe0->dvb.frontend->callback = cx23885_tuner_callback; 2029 if (fe1) 2030 fe1->dvb.frontend->callback = cx23885_tuner_callback; 2031 #if 0 2032 /* Ensure all frontends negotiate bus access */ 2033 fe0->dvb.frontend->ops.ts_bus_ctrl = cx23885_dvb_bus_ctrl; 2034 if (fe1) 2035 fe1->dvb.frontend->ops.ts_bus_ctrl = cx23885_dvb_bus_ctrl; 2036 #endif 2037 2038 /* Put the analog decoder in standby to keep it quiet */ 2039 call_all(dev, core, s_power, 0); 2040 2041 if (fe0->dvb.frontend->ops.analog_ops.standby) 2042 fe0->dvb.frontend->ops.analog_ops.standby(fe0->dvb.frontend); 2043 2044 /* register everything */ 2045 ret = vb2_dvb_register_bus(&port->frontends, THIS_MODULE, port, 2046 &dev->pci->dev, adapter_nr, mfe_shared); 2047 if (ret) 2048 goto frontend_detach; 2049 2050 /* init CI & MAC */ 2051 switch (dev->board) { 2052 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: { 2053 static struct netup_card_info cinfo; 2054 2055 netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo); 2056 memcpy(port->frontends.adapter.proposed_mac, 2057 cinfo.port[port->nr - 1].mac, 6); 2058 printk(KERN_INFO "NetUP Dual DVB-S2 CI card port%d MAC=%pM\n", 2059 port->nr, port->frontends.adapter.proposed_mac); 2060 2061 netup_ci_init(port); 2062 break; 2063 } 2064 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: { 2065 struct altera_ci_config netup_ci_cfg = { 2066 .dev = dev,/* magic number to identify*/ 2067 .adapter = &port->frontends.adapter,/* for CI */ 2068 .demux = &fe0->dvb.demux,/* for hw pid filter */ 2069 .fpga_rw = netup_altera_fpga_rw, 2070 }; 2071 2072 altera_ci_init(&netup_ci_cfg, port->nr); 2073 break; 2074 } 2075 case CX23885_BOARD_TEVII_S470: { 2076 u8 eeprom[256]; /* 24C02 i2c eeprom */ 2077 2078 if (port->nr != 1) 2079 break; 2080 2081 /* Read entire EEPROM */ 2082 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1; 2083 tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom, sizeof(eeprom)); 2084 printk(KERN_INFO "TeVii S470 MAC= %pM\n", eeprom + 0xa0); 2085 memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xa0, 6); 2086 break; 2087 } 2088 case CX23885_BOARD_DVBSKY_T9580: 2089 case CX23885_BOARD_DVBSKY_S950: 2090 case CX23885_BOARD_DVBSKY_S952: 2091 case CX23885_BOARD_DVBSKY_T982: { 2092 u8 eeprom[256]; /* 24C02 i2c eeprom */ 2093 2094 if (port->nr > 2) 2095 break; 2096 2097 /* Read entire EEPROM */ 2098 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1; 2099 tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom, 2100 sizeof(eeprom)); 2101 printk(KERN_INFO "%s port %d MAC address: %pM\n", 2102 cx23885_boards[dev->board].name, port->nr, 2103 eeprom + 0xc0 + (port->nr-1) * 8); 2104 memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xc0 + 2105 (port->nr-1) * 8, 6); 2106 break; 2107 } 2108 case CX23885_BOARD_DVBSKY_S950C: 2109 case CX23885_BOARD_DVBSKY_T980C: 2110 case CX23885_BOARD_TT_CT2_4500_CI: { 2111 u8 eeprom[256]; /* 24C02 i2c eeprom */ 2112 2113 /* attach CI */ 2114 memset(&sp2_config, 0, sizeof(sp2_config)); 2115 sp2_config.dvb_adap = &port->frontends.adapter; 2116 sp2_config.priv = port; 2117 sp2_config.ci_control = cx23885_sp2_ci_ctrl; 2118 memset(&info, 0, sizeof(struct i2c_board_info)); 2119 strlcpy(info.type, "sp2", I2C_NAME_SIZE); 2120 info.addr = 0x40; 2121 info.platform_data = &sp2_config; 2122 request_module(info.type); 2123 client_ci = i2c_new_device(&i2c_bus2->i2c_adap, &info); 2124 if (client_ci == NULL || 2125 client_ci->dev.driver == NULL) { 2126 if (client_tuner) { 2127 module_put(client_tuner->dev.driver->owner); 2128 i2c_unregister_device(client_tuner); 2129 } 2130 if (client_demod) { 2131 module_put(client_demod->dev.driver->owner); 2132 i2c_unregister_device(client_demod); 2133 } 2134 goto frontend_detach; 2135 } 2136 if (!try_module_get(client_ci->dev.driver->owner)) { 2137 i2c_unregister_device(client_ci); 2138 if (client_tuner) { 2139 module_put(client_tuner->dev.driver->owner); 2140 i2c_unregister_device(client_tuner); 2141 } 2142 if (client_demod) { 2143 module_put(client_demod->dev.driver->owner); 2144 i2c_unregister_device(client_demod); 2145 } 2146 goto frontend_detach; 2147 } 2148 port->i2c_client_ci = client_ci; 2149 2150 if (port->nr != 1) 2151 break; 2152 2153 /* Read entire EEPROM */ 2154 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1; 2155 tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom, 2156 sizeof(eeprom)); 2157 printk(KERN_INFO "%s MAC address: %pM\n", 2158 cx23885_boards[dev->board].name, eeprom + 0xc0); 2159 memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xc0, 6); 2160 break; 2161 } 2162 } 2163 2164 return ret; 2165 2166 frontend_detach: 2167 port->gate_ctrl = NULL; 2168 vb2_dvb_dealloc_frontends(&port->frontends); 2169 return -EINVAL; 2170 } 2171 2172 int cx23885_dvb_register(struct cx23885_tsport *port) 2173 { 2174 2175 struct vb2_dvb_frontend *fe0; 2176 struct cx23885_dev *dev = port->dev; 2177 int err, i; 2178 2179 /* Here we need to allocate the correct number of frontends, 2180 * as reflected in the cards struct. The reality is that currently 2181 * no cx23885 boards support this - yet. But, if we don't modify this 2182 * code then the second frontend would never be allocated (later) 2183 * and fail with error before the attach in dvb_register(). 2184 * Without these changes we risk an OOPS later. The changes here 2185 * are for safety, and should provide a good foundation for the 2186 * future addition of any multi-frontend cx23885 based boards. 2187 */ 2188 printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__, 2189 port->num_frontends); 2190 2191 for (i = 1; i <= port->num_frontends; i++) { 2192 struct vb2_queue *q; 2193 2194 if (vb2_dvb_alloc_frontend( 2195 &port->frontends, i) == NULL) { 2196 printk(KERN_ERR "%s() failed to alloc\n", __func__); 2197 return -ENOMEM; 2198 } 2199 2200 fe0 = vb2_dvb_get_frontend(&port->frontends, i); 2201 if (!fe0) 2202 return -EINVAL; 2203 2204 dprintk(1, "%s\n", __func__); 2205 dprintk(1, " ->probed by Card=%d Name=%s, PCI %02x:%02x\n", 2206 dev->board, 2207 dev->name, 2208 dev->pci_bus, 2209 dev->pci_slot); 2210 2211 err = -ENODEV; 2212 2213 /* dvb stuff */ 2214 /* We have to init the queue for each frontend on a port. */ 2215 printk(KERN_INFO "%s: cx23885 based dvb card\n", dev->name); 2216 q = &fe0->dvb.dvbq; 2217 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; 2218 q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ; 2219 q->gfp_flags = GFP_DMA32; 2220 q->min_buffers_needed = 2; 2221 q->drv_priv = port; 2222 q->buf_struct_size = sizeof(struct cx23885_buffer); 2223 q->ops = &dvb_qops; 2224 q->mem_ops = &vb2_dma_sg_memops; 2225 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; 2226 q->lock = &dev->lock; 2227 2228 err = vb2_queue_init(q); 2229 if (err < 0) 2230 return err; 2231 } 2232 err = dvb_register(port); 2233 if (err != 0) 2234 printk(KERN_ERR "%s() dvb_register failed err = %d\n", 2235 __func__, err); 2236 2237 return err; 2238 } 2239 2240 int cx23885_dvb_unregister(struct cx23885_tsport *port) 2241 { 2242 struct vb2_dvb_frontend *fe0; 2243 struct i2c_client *client; 2244 2245 /* remove I2C client for CI */ 2246 client = port->i2c_client_ci; 2247 if (client) { 2248 module_put(client->dev.driver->owner); 2249 i2c_unregister_device(client); 2250 } 2251 2252 /* remove I2C client for tuner */ 2253 client = port->i2c_client_tuner; 2254 if (client) { 2255 module_put(client->dev.driver->owner); 2256 i2c_unregister_device(client); 2257 } 2258 2259 /* remove I2C client for demodulator */ 2260 client = port->i2c_client_demod; 2261 if (client) { 2262 module_put(client->dev.driver->owner); 2263 i2c_unregister_device(client); 2264 } 2265 2266 fe0 = vb2_dvb_get_frontend(&port->frontends, 1); 2267 2268 if (fe0 && fe0->dvb.frontend) 2269 vb2_dvb_unregister_bus(&port->frontends); 2270 2271 switch (port->dev->board) { 2272 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: 2273 netup_ci_exit(port); 2274 break; 2275 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: 2276 altera_ci_release(port->dev, port->nr); 2277 break; 2278 } 2279 2280 port->gate_ctrl = NULL; 2281 2282 return 0; 2283 } 2284