1 /* 2 * Driver for the Conexant CX23885 PCIe bridge 3 * 4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * 15 * GNU General Public License for more details. 16 */ 17 18 #include "cx23885.h" 19 20 #include <linux/init.h> 21 #include <linux/module.h> 22 #include <linux/pci.h> 23 #include <linux/delay.h> 24 #include <media/drv-intf/cx25840.h> 25 #include <linux/firmware.h> 26 #include <misc/altera.h> 27 28 #include "tuner-xc2028.h" 29 #include "netup-eeprom.h" 30 #include "netup-init.h" 31 #include "altera-ci.h" 32 #include "xc4000.h" 33 #include "xc5000.h" 34 #include "cx23888-ir.h" 35 36 static unsigned int netup_card_rev = 4; 37 module_param(netup_card_rev, int, 0644); 38 MODULE_PARM_DESC(netup_card_rev, 39 "NetUP Dual DVB-T/C CI card revision"); 40 static unsigned int enable_885_ir; 41 module_param(enable_885_ir, int, 0644); 42 MODULE_PARM_DESC(enable_885_ir, 43 "Enable integrated IR controller for supported\n" 44 "\t\t CX2388[57] boards that are wired for it:\n" 45 "\t\t\tHVR-1250 (reported safe)\n" 46 "\t\t\tTerraTec Cinergy T PCIe Dual (not well tested, appears to be safe)\n" 47 "\t\t\tTeVii S470 (reported unsafe)\n" 48 "\t\t This can cause an interrupt storm with some cards.\n" 49 "\t\t Default: 0 [Disabled]"); 50 51 /* ------------------------------------------------------------------ */ 52 /* board config info */ 53 54 struct cx23885_board cx23885_boards[] = { 55 [CX23885_BOARD_UNKNOWN] = { 56 .name = "UNKNOWN/GENERIC", 57 /* Ensure safe default for unknown boards */ 58 .clk_freq = 0, 59 .input = {{ 60 .type = CX23885_VMUX_COMPOSITE1, 61 .vmux = 0, 62 }, { 63 .type = CX23885_VMUX_COMPOSITE2, 64 .vmux = 1, 65 }, { 66 .type = CX23885_VMUX_COMPOSITE3, 67 .vmux = 2, 68 }, { 69 .type = CX23885_VMUX_COMPOSITE4, 70 .vmux = 3, 71 } }, 72 }, 73 [CX23885_BOARD_HAUPPAUGE_HVR1800lp] = { 74 .name = "Hauppauge WinTV-HVR1800lp", 75 .portc = CX23885_MPEG_DVB, 76 .input = {{ 77 .type = CX23885_VMUX_TELEVISION, 78 .vmux = 0, 79 .gpio0 = 0xff00, 80 }, { 81 .type = CX23885_VMUX_DEBUG, 82 .vmux = 0, 83 .gpio0 = 0xff01, 84 }, { 85 .type = CX23885_VMUX_COMPOSITE1, 86 .vmux = 1, 87 .gpio0 = 0xff02, 88 }, { 89 .type = CX23885_VMUX_SVIDEO, 90 .vmux = 2, 91 .gpio0 = 0xff02, 92 } }, 93 }, 94 [CX23885_BOARD_HAUPPAUGE_HVR1800] = { 95 .name = "Hauppauge WinTV-HVR1800", 96 .porta = CX23885_ANALOG_VIDEO, 97 .portb = CX23885_MPEG_ENCODER, 98 .portc = CX23885_MPEG_DVB, 99 .tuner_type = TUNER_PHILIPS_TDA8290, 100 .tuner_addr = 0x42, /* 0x84 >> 1 */ 101 .tuner_bus = 1, 102 .input = {{ 103 .type = CX23885_VMUX_TELEVISION, 104 .vmux = CX25840_VIN7_CH3 | 105 CX25840_VIN5_CH2 | 106 CX25840_VIN2_CH1, 107 .amux = CX25840_AUDIO8, 108 .gpio0 = 0, 109 }, { 110 .type = CX23885_VMUX_COMPOSITE1, 111 .vmux = CX25840_VIN7_CH3 | 112 CX25840_VIN4_CH2 | 113 CX25840_VIN6_CH1, 114 .amux = CX25840_AUDIO7, 115 .gpio0 = 0, 116 }, { 117 .type = CX23885_VMUX_SVIDEO, 118 .vmux = CX25840_VIN7_CH3 | 119 CX25840_VIN4_CH2 | 120 CX25840_VIN8_CH1 | 121 CX25840_SVIDEO_ON, 122 .amux = CX25840_AUDIO7, 123 .gpio0 = 0, 124 } }, 125 }, 126 [CX23885_BOARD_HAUPPAUGE_HVR1250] = { 127 .name = "Hauppauge WinTV-HVR1250", 128 .porta = CX23885_ANALOG_VIDEO, 129 .portc = CX23885_MPEG_DVB, 130 #ifdef MT2131_NO_ANALOG_SUPPORT_YET 131 .tuner_type = TUNER_PHILIPS_TDA8290, 132 .tuner_addr = 0x42, /* 0x84 >> 1 */ 133 .tuner_bus = 1, 134 #endif 135 .force_bff = 1, 136 .input = {{ 137 #ifdef MT2131_NO_ANALOG_SUPPORT_YET 138 .type = CX23885_VMUX_TELEVISION, 139 .vmux = CX25840_VIN7_CH3 | 140 CX25840_VIN5_CH2 | 141 CX25840_VIN2_CH1, 142 .amux = CX25840_AUDIO8, 143 .gpio0 = 0xff00, 144 }, { 145 #endif 146 .type = CX23885_VMUX_COMPOSITE1, 147 .vmux = CX25840_VIN7_CH3 | 148 CX25840_VIN4_CH2 | 149 CX25840_VIN6_CH1, 150 .amux = CX25840_AUDIO7, 151 .gpio0 = 0xff02, 152 }, { 153 .type = CX23885_VMUX_SVIDEO, 154 .vmux = CX25840_VIN7_CH3 | 155 CX25840_VIN4_CH2 | 156 CX25840_VIN8_CH1 | 157 CX25840_SVIDEO_ON, 158 .amux = CX25840_AUDIO7, 159 .gpio0 = 0xff02, 160 } }, 161 }, 162 [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = { 163 .name = "DViCO FusionHDTV5 Express", 164 .portb = CX23885_MPEG_DVB, 165 }, 166 [CX23885_BOARD_HAUPPAUGE_HVR1500Q] = { 167 .name = "Hauppauge WinTV-HVR1500Q", 168 .portc = CX23885_MPEG_DVB, 169 }, 170 [CX23885_BOARD_HAUPPAUGE_HVR1500] = { 171 .name = "Hauppauge WinTV-HVR1500", 172 .porta = CX23885_ANALOG_VIDEO, 173 .portc = CX23885_MPEG_DVB, 174 .tuner_type = TUNER_XC2028, 175 .tuner_addr = 0x61, /* 0xc2 >> 1 */ 176 .input = {{ 177 .type = CX23885_VMUX_TELEVISION, 178 .vmux = CX25840_VIN7_CH3 | 179 CX25840_VIN5_CH2 | 180 CX25840_VIN2_CH1, 181 .gpio0 = 0, 182 }, { 183 .type = CX23885_VMUX_COMPOSITE1, 184 .vmux = CX25840_VIN7_CH3 | 185 CX25840_VIN4_CH2 | 186 CX25840_VIN6_CH1, 187 .gpio0 = 0, 188 }, { 189 .type = CX23885_VMUX_SVIDEO, 190 .vmux = CX25840_VIN7_CH3 | 191 CX25840_VIN4_CH2 | 192 CX25840_VIN8_CH1 | 193 CX25840_SVIDEO_ON, 194 .gpio0 = 0, 195 } }, 196 }, 197 [CX23885_BOARD_HAUPPAUGE_HVR1200] = { 198 .name = "Hauppauge WinTV-HVR1200", 199 .portc = CX23885_MPEG_DVB, 200 }, 201 [CX23885_BOARD_HAUPPAUGE_HVR1700] = { 202 .name = "Hauppauge WinTV-HVR1700", 203 .portc = CX23885_MPEG_DVB, 204 }, 205 [CX23885_BOARD_HAUPPAUGE_HVR1400] = { 206 .name = "Hauppauge WinTV-HVR1400", 207 .portc = CX23885_MPEG_DVB, 208 }, 209 [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = { 210 .name = "DViCO FusionHDTV7 Dual Express", 211 .portb = CX23885_MPEG_DVB, 212 .portc = CX23885_MPEG_DVB, 213 }, 214 [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = { 215 .name = "DViCO FusionHDTV DVB-T Dual Express", 216 .portb = CX23885_MPEG_DVB, 217 .portc = CX23885_MPEG_DVB, 218 }, 219 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = { 220 .name = "Leadtek Winfast PxDVR3200 H", 221 .portc = CX23885_MPEG_DVB, 222 }, 223 [CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200] = { 224 .name = "Leadtek Winfast PxPVR2200", 225 .porta = CX23885_ANALOG_VIDEO, 226 .tuner_type = TUNER_XC2028, 227 .tuner_addr = 0x61, 228 .tuner_bus = 1, 229 .input = {{ 230 .type = CX23885_VMUX_TELEVISION, 231 .vmux = CX25840_VIN2_CH1 | 232 CX25840_VIN5_CH2, 233 .amux = CX25840_AUDIO8, 234 .gpio0 = 0x704040, 235 }, { 236 .type = CX23885_VMUX_COMPOSITE1, 237 .vmux = CX25840_COMPOSITE1, 238 .amux = CX25840_AUDIO7, 239 .gpio0 = 0x704040, 240 }, { 241 .type = CX23885_VMUX_SVIDEO, 242 .vmux = CX25840_SVIDEO_LUMA3 | 243 CX25840_SVIDEO_CHROMA4, 244 .amux = CX25840_AUDIO7, 245 .gpio0 = 0x704040, 246 }, { 247 .type = CX23885_VMUX_COMPONENT, 248 .vmux = CX25840_VIN7_CH1 | 249 CX25840_VIN6_CH2 | 250 CX25840_VIN8_CH3 | 251 CX25840_COMPONENT_ON, 252 .amux = CX25840_AUDIO7, 253 .gpio0 = 0x704040, 254 } }, 255 }, 256 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000] = { 257 .name = "Leadtek Winfast PxDVR3200 H XC4000", 258 .porta = CX23885_ANALOG_VIDEO, 259 .portc = CX23885_MPEG_DVB, 260 .tuner_type = TUNER_XC4000, 261 .tuner_addr = 0x61, 262 .radio_type = UNSET, 263 .radio_addr = ADDR_UNSET, 264 .input = {{ 265 .type = CX23885_VMUX_TELEVISION, 266 .vmux = CX25840_VIN2_CH1 | 267 CX25840_VIN5_CH2 | 268 CX25840_NONE0_CH3, 269 }, { 270 .type = CX23885_VMUX_COMPOSITE1, 271 .vmux = CX25840_COMPOSITE1, 272 }, { 273 .type = CX23885_VMUX_SVIDEO, 274 .vmux = CX25840_SVIDEO_LUMA3 | 275 CX25840_SVIDEO_CHROMA4, 276 }, { 277 .type = CX23885_VMUX_COMPONENT, 278 .vmux = CX25840_VIN7_CH1 | 279 CX25840_VIN6_CH2 | 280 CX25840_VIN8_CH3 | 281 CX25840_COMPONENT_ON, 282 } }, 283 }, 284 [CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = { 285 .name = "Compro VideoMate E650F", 286 .portc = CX23885_MPEG_DVB, 287 }, 288 [CX23885_BOARD_TBS_6920] = { 289 .name = "TurboSight TBS 6920", 290 .portb = CX23885_MPEG_DVB, 291 }, 292 [CX23885_BOARD_TBS_6980] = { 293 .name = "TurboSight TBS 6980", 294 .portb = CX23885_MPEG_DVB, 295 .portc = CX23885_MPEG_DVB, 296 }, 297 [CX23885_BOARD_TBS_6981] = { 298 .name = "TurboSight TBS 6981", 299 .portb = CX23885_MPEG_DVB, 300 .portc = CX23885_MPEG_DVB, 301 }, 302 [CX23885_BOARD_TEVII_S470] = { 303 .name = "TeVii S470", 304 .portb = CX23885_MPEG_DVB, 305 }, 306 [CX23885_BOARD_DVBWORLD_2005] = { 307 .name = "DVBWorld DVB-S2 2005", 308 .portb = CX23885_MPEG_DVB, 309 }, 310 [CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = { 311 .ci_type = 1, 312 .name = "NetUP Dual DVB-S2 CI", 313 .portb = CX23885_MPEG_DVB, 314 .portc = CX23885_MPEG_DVB, 315 }, 316 [CX23885_BOARD_HAUPPAUGE_HVR1270] = { 317 .name = "Hauppauge WinTV-HVR1270", 318 .portc = CX23885_MPEG_DVB, 319 }, 320 [CX23885_BOARD_HAUPPAUGE_HVR1275] = { 321 .name = "Hauppauge WinTV-HVR1275", 322 .portc = CX23885_MPEG_DVB, 323 }, 324 [CX23885_BOARD_HAUPPAUGE_HVR1255] = { 325 .name = "Hauppauge WinTV-HVR1255", 326 .porta = CX23885_ANALOG_VIDEO, 327 .portc = CX23885_MPEG_DVB, 328 .tuner_type = TUNER_ABSENT, 329 .tuner_addr = 0x42, /* 0x84 >> 1 */ 330 .force_bff = 1, 331 .input = {{ 332 .type = CX23885_VMUX_TELEVISION, 333 .vmux = CX25840_VIN7_CH3 | 334 CX25840_VIN5_CH2 | 335 CX25840_VIN2_CH1 | 336 CX25840_DIF_ON, 337 .amux = CX25840_AUDIO8, 338 }, { 339 .type = CX23885_VMUX_COMPOSITE1, 340 .vmux = CX25840_VIN7_CH3 | 341 CX25840_VIN4_CH2 | 342 CX25840_VIN6_CH1, 343 .amux = CX25840_AUDIO7, 344 }, { 345 .type = CX23885_VMUX_SVIDEO, 346 .vmux = CX25840_VIN7_CH3 | 347 CX25840_VIN4_CH2 | 348 CX25840_VIN8_CH1 | 349 CX25840_SVIDEO_ON, 350 .amux = CX25840_AUDIO7, 351 } }, 352 }, 353 [CX23885_BOARD_HAUPPAUGE_HVR1255_22111] = { 354 .name = "Hauppauge WinTV-HVR1255", 355 .porta = CX23885_ANALOG_VIDEO, 356 .portc = CX23885_MPEG_DVB, 357 .tuner_type = TUNER_ABSENT, 358 .tuner_addr = 0x42, /* 0x84 >> 1 */ 359 .force_bff = 1, 360 .input = {{ 361 .type = CX23885_VMUX_TELEVISION, 362 .vmux = CX25840_VIN7_CH3 | 363 CX25840_VIN5_CH2 | 364 CX25840_VIN2_CH1 | 365 CX25840_DIF_ON, 366 .amux = CX25840_AUDIO8, 367 }, { 368 .type = CX23885_VMUX_SVIDEO, 369 .vmux = CX25840_VIN7_CH3 | 370 CX25840_VIN4_CH2 | 371 CX25840_VIN8_CH1 | 372 CX25840_SVIDEO_ON, 373 .amux = CX25840_AUDIO7, 374 } }, 375 }, 376 [CX23885_BOARD_HAUPPAUGE_HVR1210] = { 377 .name = "Hauppauge WinTV-HVR1210", 378 .portc = CX23885_MPEG_DVB, 379 }, 380 [CX23885_BOARD_MYGICA_X8506] = { 381 .name = "Mygica X8506 DMB-TH", 382 .tuner_type = TUNER_XC5000, 383 .tuner_addr = 0x61, 384 .tuner_bus = 1, 385 .porta = CX23885_ANALOG_VIDEO, 386 .portb = CX23885_MPEG_DVB, 387 .input = { 388 { 389 .type = CX23885_VMUX_TELEVISION, 390 .vmux = CX25840_COMPOSITE2, 391 }, 392 { 393 .type = CX23885_VMUX_COMPOSITE1, 394 .vmux = CX25840_COMPOSITE8, 395 }, 396 { 397 .type = CX23885_VMUX_SVIDEO, 398 .vmux = CX25840_SVIDEO_LUMA3 | 399 CX25840_SVIDEO_CHROMA4, 400 }, 401 { 402 .type = CX23885_VMUX_COMPONENT, 403 .vmux = CX25840_COMPONENT_ON | 404 CX25840_VIN1_CH1 | 405 CX25840_VIN6_CH2 | 406 CX25840_VIN7_CH3, 407 }, 408 }, 409 }, 410 [CX23885_BOARD_MAGICPRO_PROHDTVE2] = { 411 .name = "Magic-Pro ProHDTV Extreme 2", 412 .tuner_type = TUNER_XC5000, 413 .tuner_addr = 0x61, 414 .tuner_bus = 1, 415 .porta = CX23885_ANALOG_VIDEO, 416 .portb = CX23885_MPEG_DVB, 417 .input = { 418 { 419 .type = CX23885_VMUX_TELEVISION, 420 .vmux = CX25840_COMPOSITE2, 421 }, 422 { 423 .type = CX23885_VMUX_COMPOSITE1, 424 .vmux = CX25840_COMPOSITE8, 425 }, 426 { 427 .type = CX23885_VMUX_SVIDEO, 428 .vmux = CX25840_SVIDEO_LUMA3 | 429 CX25840_SVIDEO_CHROMA4, 430 }, 431 { 432 .type = CX23885_VMUX_COMPONENT, 433 .vmux = CX25840_COMPONENT_ON | 434 CX25840_VIN1_CH1 | 435 CX25840_VIN6_CH2 | 436 CX25840_VIN7_CH3, 437 }, 438 }, 439 }, 440 [CX23885_BOARD_HAUPPAUGE_HVR1850] = { 441 .name = "Hauppauge WinTV-HVR1850", 442 .porta = CX23885_ANALOG_VIDEO, 443 .portb = CX23885_MPEG_ENCODER, 444 .portc = CX23885_MPEG_DVB, 445 .tuner_type = TUNER_ABSENT, 446 .tuner_addr = 0x42, /* 0x84 >> 1 */ 447 .force_bff = 1, 448 .input = {{ 449 .type = CX23885_VMUX_TELEVISION, 450 .vmux = CX25840_VIN7_CH3 | 451 CX25840_VIN5_CH2 | 452 CX25840_VIN2_CH1 | 453 CX25840_DIF_ON, 454 .amux = CX25840_AUDIO8, 455 }, { 456 .type = CX23885_VMUX_COMPOSITE1, 457 .vmux = CX25840_VIN7_CH3 | 458 CX25840_VIN4_CH2 | 459 CX25840_VIN6_CH1, 460 .amux = CX25840_AUDIO7, 461 }, { 462 .type = CX23885_VMUX_SVIDEO, 463 .vmux = CX25840_VIN7_CH3 | 464 CX25840_VIN4_CH2 | 465 CX25840_VIN8_CH1 | 466 CX25840_SVIDEO_ON, 467 .amux = CX25840_AUDIO7, 468 } }, 469 }, 470 [CX23885_BOARD_COMPRO_VIDEOMATE_E800] = { 471 .name = "Compro VideoMate E800", 472 .portc = CX23885_MPEG_DVB, 473 }, 474 [CX23885_BOARD_HAUPPAUGE_HVR1290] = { 475 .name = "Hauppauge WinTV-HVR1290", 476 .portc = CX23885_MPEG_DVB, 477 }, 478 [CX23885_BOARD_MYGICA_X8558PRO] = { 479 .name = "Mygica X8558 PRO DMB-TH", 480 .portb = CX23885_MPEG_DVB, 481 .portc = CX23885_MPEG_DVB, 482 }, 483 [CX23885_BOARD_LEADTEK_WINFAST_PXTV1200] = { 484 .name = "LEADTEK WinFast PxTV1200", 485 .porta = CX23885_ANALOG_VIDEO, 486 .tuner_type = TUNER_XC2028, 487 .tuner_addr = 0x61, 488 .tuner_bus = 1, 489 .input = {{ 490 .type = CX23885_VMUX_TELEVISION, 491 .vmux = CX25840_VIN2_CH1 | 492 CX25840_VIN5_CH2 | 493 CX25840_NONE0_CH3, 494 }, { 495 .type = CX23885_VMUX_COMPOSITE1, 496 .vmux = CX25840_COMPOSITE1, 497 }, { 498 .type = CX23885_VMUX_SVIDEO, 499 .vmux = CX25840_SVIDEO_LUMA3 | 500 CX25840_SVIDEO_CHROMA4, 501 }, { 502 .type = CX23885_VMUX_COMPONENT, 503 .vmux = CX25840_VIN7_CH1 | 504 CX25840_VIN6_CH2 | 505 CX25840_VIN8_CH3 | 506 CX25840_COMPONENT_ON, 507 } }, 508 }, 509 [CX23885_BOARD_GOTVIEW_X5_3D_HYBRID] = { 510 .name = "GoTView X5 3D Hybrid", 511 .tuner_type = TUNER_XC5000, 512 .tuner_addr = 0x64, 513 .tuner_bus = 1, 514 .porta = CX23885_ANALOG_VIDEO, 515 .portb = CX23885_MPEG_DVB, 516 .input = {{ 517 .type = CX23885_VMUX_TELEVISION, 518 .vmux = CX25840_VIN2_CH1 | 519 CX25840_VIN5_CH2, 520 .gpio0 = 0x02, 521 }, { 522 .type = CX23885_VMUX_COMPOSITE1, 523 .vmux = CX23885_VMUX_COMPOSITE1, 524 }, { 525 .type = CX23885_VMUX_SVIDEO, 526 .vmux = CX25840_SVIDEO_LUMA3 | 527 CX25840_SVIDEO_CHROMA4, 528 } }, 529 }, 530 [CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF] = { 531 .ci_type = 2, 532 .name = "NetUP Dual DVB-T/C-CI RF", 533 .porta = CX23885_ANALOG_VIDEO, 534 .portb = CX23885_MPEG_DVB, 535 .portc = CX23885_MPEG_DVB, 536 .num_fds_portb = 2, 537 .num_fds_portc = 2, 538 .tuner_type = TUNER_XC5000, 539 .tuner_addr = 0x64, 540 .input = { { 541 .type = CX23885_VMUX_TELEVISION, 542 .vmux = CX25840_COMPOSITE1, 543 } }, 544 }, 545 [CX23885_BOARD_MPX885] = { 546 .name = "MPX-885", 547 .porta = CX23885_ANALOG_VIDEO, 548 .input = {{ 549 .type = CX23885_VMUX_COMPOSITE1, 550 .vmux = CX25840_COMPOSITE1, 551 .amux = CX25840_AUDIO6, 552 .gpio0 = 0, 553 }, { 554 .type = CX23885_VMUX_COMPOSITE2, 555 .vmux = CX25840_COMPOSITE2, 556 .amux = CX25840_AUDIO6, 557 .gpio0 = 0, 558 }, { 559 .type = CX23885_VMUX_COMPOSITE3, 560 .vmux = CX25840_COMPOSITE3, 561 .amux = CX25840_AUDIO7, 562 .gpio0 = 0, 563 }, { 564 .type = CX23885_VMUX_COMPOSITE4, 565 .vmux = CX25840_COMPOSITE4, 566 .amux = CX25840_AUDIO7, 567 .gpio0 = 0, 568 } }, 569 }, 570 [CX23885_BOARD_MYGICA_X8507] = { 571 .name = "Mygica X8502/X8507 ISDB-T", 572 .tuner_type = TUNER_XC5000, 573 .tuner_addr = 0x61, 574 .tuner_bus = 1, 575 .porta = CX23885_ANALOG_VIDEO, 576 .portb = CX23885_MPEG_DVB, 577 .input = { 578 { 579 .type = CX23885_VMUX_TELEVISION, 580 .vmux = CX25840_COMPOSITE2, 581 .amux = CX25840_AUDIO8, 582 }, 583 { 584 .type = CX23885_VMUX_COMPOSITE1, 585 .vmux = CX25840_COMPOSITE8, 586 .amux = CX25840_AUDIO7, 587 }, 588 { 589 .type = CX23885_VMUX_SVIDEO, 590 .vmux = CX25840_SVIDEO_LUMA3 | 591 CX25840_SVIDEO_CHROMA4, 592 .amux = CX25840_AUDIO7, 593 }, 594 { 595 .type = CX23885_VMUX_COMPONENT, 596 .vmux = CX25840_COMPONENT_ON | 597 CX25840_VIN1_CH1 | 598 CX25840_VIN6_CH2 | 599 CX25840_VIN7_CH3, 600 .amux = CX25840_AUDIO7, 601 }, 602 }, 603 }, 604 [CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL] = { 605 .name = "TerraTec Cinergy T PCIe Dual", 606 .portb = CX23885_MPEG_DVB, 607 .portc = CX23885_MPEG_DVB, 608 }, 609 [CX23885_BOARD_TEVII_S471] = { 610 .name = "TeVii S471", 611 .portb = CX23885_MPEG_DVB, 612 }, 613 [CX23885_BOARD_PROF_8000] = { 614 .name = "Prof Revolution DVB-S2 8000", 615 .portb = CX23885_MPEG_DVB, 616 }, 617 [CX23885_BOARD_HAUPPAUGE_HVR4400] = { 618 .name = "Hauppauge WinTV-HVR4400/HVR5500", 619 .porta = CX23885_ANALOG_VIDEO, 620 .portb = CX23885_MPEG_DVB, 621 .portc = CX23885_MPEG_DVB, 622 .tuner_type = TUNER_NXP_TDA18271, 623 .tuner_addr = 0x60, /* 0xc0 >> 1 */ 624 .tuner_bus = 1, 625 }, 626 [CX23885_BOARD_HAUPPAUGE_STARBURST] = { 627 .name = "Hauppauge WinTV Starburst", 628 .portb = CX23885_MPEG_DVB, 629 }, 630 [CX23885_BOARD_AVERMEDIA_HC81R] = { 631 .name = "AVerTV Hybrid Express Slim HC81R", 632 .tuner_type = TUNER_XC2028, 633 .tuner_addr = 0x61, /* 0xc2 >> 1 */ 634 .tuner_bus = 1, 635 .porta = CX23885_ANALOG_VIDEO, 636 .input = {{ 637 .type = CX23885_VMUX_TELEVISION, 638 .vmux = CX25840_VIN2_CH1 | 639 CX25840_VIN5_CH2 | 640 CX25840_NONE0_CH3 | 641 CX25840_NONE1_CH3, 642 .amux = CX25840_AUDIO8, 643 }, { 644 .type = CX23885_VMUX_SVIDEO, 645 .vmux = CX25840_VIN8_CH1 | 646 CX25840_NONE_CH2 | 647 CX25840_VIN7_CH3 | 648 CX25840_SVIDEO_ON, 649 .amux = CX25840_AUDIO6, 650 }, { 651 .type = CX23885_VMUX_COMPONENT, 652 .vmux = CX25840_VIN1_CH1 | 653 CX25840_NONE_CH2 | 654 CX25840_NONE0_CH3 | 655 CX25840_NONE1_CH3, 656 .amux = CX25840_AUDIO6, 657 } }, 658 }, 659 [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2] = { 660 .name = "DViCO FusionHDTV DVB-T Dual Express2", 661 .portb = CX23885_MPEG_DVB, 662 .portc = CX23885_MPEG_DVB, 663 }, 664 [CX23885_BOARD_HAUPPAUGE_IMPACTVCBE] = { 665 .name = "Hauppauge ImpactVCB-e", 666 .tuner_type = TUNER_ABSENT, 667 .porta = CX23885_ANALOG_VIDEO, 668 .input = {{ 669 .type = CX23885_VMUX_COMPOSITE1, 670 .vmux = CX25840_VIN7_CH3 | 671 CX25840_VIN4_CH2 | 672 CX25840_VIN6_CH1, 673 .amux = CX25840_AUDIO7, 674 }, { 675 .type = CX23885_VMUX_SVIDEO, 676 .vmux = CX25840_VIN7_CH3 | 677 CX25840_VIN4_CH2 | 678 CX25840_VIN8_CH1 | 679 CX25840_SVIDEO_ON, 680 .amux = CX25840_AUDIO7, 681 } }, 682 }, 683 [CX23885_BOARD_DVBSKY_T9580] = { 684 .name = "DVBSky T9580", 685 .portb = CX23885_MPEG_DVB, 686 .portc = CX23885_MPEG_DVB, 687 }, 688 [CX23885_BOARD_DVBSKY_T980C] = { 689 .name = "DVBSky T980C", 690 .portb = CX23885_MPEG_DVB, 691 }, 692 [CX23885_BOARD_DVBSKY_S950C] = { 693 .name = "DVBSky S950C", 694 .portb = CX23885_MPEG_DVB, 695 }, 696 [CX23885_BOARD_TT_CT2_4500_CI] = { 697 .name = "Technotrend TT-budget CT2-4500 CI", 698 .portb = CX23885_MPEG_DVB, 699 }, 700 [CX23885_BOARD_DVBSKY_S950] = { 701 .name = "DVBSky S950", 702 .portb = CX23885_MPEG_DVB, 703 }, 704 [CX23885_BOARD_DVBSKY_S952] = { 705 .name = "DVBSky S952", 706 .portb = CX23885_MPEG_DVB, 707 .portc = CX23885_MPEG_DVB, 708 }, 709 [CX23885_BOARD_DVBSKY_T982] = { 710 .name = "DVBSky T982", 711 .portb = CX23885_MPEG_DVB, 712 .portc = CX23885_MPEG_DVB, 713 }, 714 [CX23885_BOARD_HAUPPAUGE_HVR5525] = { 715 .name = "Hauppauge WinTV-HVR5525", 716 .portb = CX23885_MPEG_DVB, 717 .portc = CX23885_MPEG_DVB, 718 }, 719 [CX23885_BOARD_VIEWCAST_260E] = { 720 .name = "ViewCast 260e", 721 .porta = CX23885_ANALOG_VIDEO, 722 .force_bff = 1, 723 .input = {{ 724 .type = CX23885_VMUX_COMPOSITE1, 725 .vmux = CX25840_VIN6_CH1, 726 .amux = CX25840_AUDIO7, 727 }, { 728 .type = CX23885_VMUX_SVIDEO, 729 .vmux = CX25840_VIN7_CH3 | 730 CX25840_VIN5_CH1 | 731 CX25840_SVIDEO_ON, 732 .amux = CX25840_AUDIO7, 733 }, { 734 .type = CX23885_VMUX_COMPONENT, 735 .vmux = CX25840_VIN7_CH3 | 736 CX25840_VIN6_CH2 | 737 CX25840_VIN5_CH1 | 738 CX25840_COMPONENT_ON, 739 .amux = CX25840_AUDIO7, 740 } }, 741 }, 742 [CX23885_BOARD_VIEWCAST_460E] = { 743 .name = "ViewCast 460e", 744 .porta = CX23885_ANALOG_VIDEO, 745 .force_bff = 1, 746 .input = {{ 747 .type = CX23885_VMUX_COMPOSITE1, 748 .vmux = CX25840_VIN4_CH1, 749 .amux = CX25840_AUDIO7, 750 }, { 751 .type = CX23885_VMUX_SVIDEO, 752 .vmux = CX25840_VIN7_CH3 | 753 CX25840_VIN6_CH1 | 754 CX25840_SVIDEO_ON, 755 .amux = CX25840_AUDIO7, 756 }, { 757 .type = CX23885_VMUX_COMPONENT, 758 .vmux = CX25840_VIN7_CH3 | 759 CX25840_VIN6_CH1 | 760 CX25840_VIN5_CH2 | 761 CX25840_COMPONENT_ON, 762 .amux = CX25840_AUDIO7, 763 }, { 764 .type = CX23885_VMUX_COMPOSITE2, 765 .vmux = CX25840_VIN6_CH1, 766 .amux = CX25840_AUDIO7, 767 } }, 768 }, 769 [CX23885_BOARD_HAUPPAUGE_QUADHD_DVB] = { 770 .name = "Hauppauge WinTV-QuadHD-DVB", 771 .portb = CX23885_MPEG_DVB, 772 .portc = CX23885_MPEG_DVB, 773 }, 774 [CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC] = { 775 .name = "Hauppauge WinTV-QuadHD-ATSC", 776 .portb = CX23885_MPEG_DVB, 777 .portc = CX23885_MPEG_DVB, 778 }, 779 }; 780 const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards); 781 782 /* ------------------------------------------------------------------ */ 783 /* PCI subsystem IDs */ 784 785 struct cx23885_subid cx23885_subids[] = { 786 { 787 .subvendor = 0x0070, 788 .subdevice = 0x3400, 789 .card = CX23885_BOARD_UNKNOWN, 790 }, { 791 .subvendor = 0x0070, 792 .subdevice = 0x7600, 793 .card = CX23885_BOARD_HAUPPAUGE_HVR1800lp, 794 }, { 795 .subvendor = 0x0070, 796 .subdevice = 0x7800, 797 .card = CX23885_BOARD_HAUPPAUGE_HVR1800, 798 }, { 799 .subvendor = 0x0070, 800 .subdevice = 0x7801, 801 .card = CX23885_BOARD_HAUPPAUGE_HVR1800, 802 }, { 803 .subvendor = 0x0070, 804 .subdevice = 0x7809, 805 .card = CX23885_BOARD_HAUPPAUGE_HVR1800, 806 }, { 807 .subvendor = 0x0070, 808 .subdevice = 0x7911, 809 .card = CX23885_BOARD_HAUPPAUGE_HVR1250, 810 }, { 811 .subvendor = 0x18ac, 812 .subdevice = 0xd500, 813 .card = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP, 814 }, { 815 .subvendor = 0x0070, 816 .subdevice = 0x7790, 817 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q, 818 }, { 819 .subvendor = 0x0070, 820 .subdevice = 0x7797, 821 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q, 822 }, { 823 .subvendor = 0x0070, 824 .subdevice = 0x7710, 825 .card = CX23885_BOARD_HAUPPAUGE_HVR1500, 826 }, { 827 .subvendor = 0x0070, 828 .subdevice = 0x7717, 829 .card = CX23885_BOARD_HAUPPAUGE_HVR1500, 830 }, { 831 .subvendor = 0x0070, 832 .subdevice = 0x71d1, 833 .card = CX23885_BOARD_HAUPPAUGE_HVR1200, 834 }, { 835 .subvendor = 0x0070, 836 .subdevice = 0x71d3, 837 .card = CX23885_BOARD_HAUPPAUGE_HVR1200, 838 }, { 839 .subvendor = 0x0070, 840 .subdevice = 0x8101, 841 .card = CX23885_BOARD_HAUPPAUGE_HVR1700, 842 }, { 843 .subvendor = 0x0070, 844 .subdevice = 0x8010, 845 .card = CX23885_BOARD_HAUPPAUGE_HVR1400, 846 }, { 847 .subvendor = 0x18ac, 848 .subdevice = 0xd618, 849 .card = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP, 850 }, { 851 .subvendor = 0x18ac, 852 .subdevice = 0xdb78, 853 .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP, 854 }, { 855 .subvendor = 0x107d, 856 .subdevice = 0x6681, 857 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H, 858 }, { 859 .subvendor = 0x107d, 860 .subdevice = 0x6f21, 861 .card = CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200, 862 }, { 863 .subvendor = 0x107d, 864 .subdevice = 0x6f39, 865 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000, 866 }, { 867 .subvendor = 0x185b, 868 .subdevice = 0xe800, 869 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E650F, 870 }, { 871 .subvendor = 0x6920, 872 .subdevice = 0x8888, 873 .card = CX23885_BOARD_TBS_6920, 874 }, { 875 .subvendor = 0x6980, 876 .subdevice = 0x8888, 877 .card = CX23885_BOARD_TBS_6980, 878 }, { 879 .subvendor = 0x6981, 880 .subdevice = 0x8888, 881 .card = CX23885_BOARD_TBS_6981, 882 }, { 883 .subvendor = 0xd470, 884 .subdevice = 0x9022, 885 .card = CX23885_BOARD_TEVII_S470, 886 }, { 887 .subvendor = 0x0001, 888 .subdevice = 0x2005, 889 .card = CX23885_BOARD_DVBWORLD_2005, 890 }, { 891 .subvendor = 0x1b55, 892 .subdevice = 0x2a2c, 893 .card = CX23885_BOARD_NETUP_DUAL_DVBS2_CI, 894 }, { 895 .subvendor = 0x0070, 896 .subdevice = 0x2211, 897 .card = CX23885_BOARD_HAUPPAUGE_HVR1270, 898 }, { 899 .subvendor = 0x0070, 900 .subdevice = 0x2215, 901 .card = CX23885_BOARD_HAUPPAUGE_HVR1275, 902 }, { 903 .subvendor = 0x0070, 904 .subdevice = 0x221d, 905 .card = CX23885_BOARD_HAUPPAUGE_HVR1275, 906 }, { 907 .subvendor = 0x0070, 908 .subdevice = 0x2251, 909 .card = CX23885_BOARD_HAUPPAUGE_HVR1255, 910 }, { 911 .subvendor = 0x0070, 912 .subdevice = 0x2259, 913 .card = CX23885_BOARD_HAUPPAUGE_HVR1255_22111, 914 }, { 915 .subvendor = 0x0070, 916 .subdevice = 0x2291, 917 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, 918 }, { 919 .subvendor = 0x0070, 920 .subdevice = 0x2295, 921 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, 922 }, { 923 .subvendor = 0x0070, 924 .subdevice = 0x2299, 925 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, 926 }, { 927 .subvendor = 0x0070, 928 .subdevice = 0x229d, 929 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */ 930 }, { 931 .subvendor = 0x0070, 932 .subdevice = 0x22f0, 933 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, 934 }, { 935 .subvendor = 0x0070, 936 .subdevice = 0x22f1, 937 .card = CX23885_BOARD_HAUPPAUGE_HVR1255, 938 }, { 939 .subvendor = 0x0070, 940 .subdevice = 0x22f2, 941 .card = CX23885_BOARD_HAUPPAUGE_HVR1275, 942 }, { 943 .subvendor = 0x0070, 944 .subdevice = 0x22f3, 945 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */ 946 }, { 947 .subvendor = 0x0070, 948 .subdevice = 0x22f4, 949 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, 950 }, { 951 .subvendor = 0x0070, 952 .subdevice = 0x22f5, 953 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */ 954 }, { 955 .subvendor = 0x14f1, 956 .subdevice = 0x8651, 957 .card = CX23885_BOARD_MYGICA_X8506, 958 }, { 959 .subvendor = 0x14f1, 960 .subdevice = 0x8657, 961 .card = CX23885_BOARD_MAGICPRO_PROHDTVE2, 962 }, { 963 .subvendor = 0x0070, 964 .subdevice = 0x8541, 965 .card = CX23885_BOARD_HAUPPAUGE_HVR1850, 966 }, { 967 .subvendor = 0x1858, 968 .subdevice = 0xe800, 969 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E800, 970 }, { 971 .subvendor = 0x0070, 972 .subdevice = 0x8551, 973 .card = CX23885_BOARD_HAUPPAUGE_HVR1290, 974 }, { 975 .subvendor = 0x14f1, 976 .subdevice = 0x8578, 977 .card = CX23885_BOARD_MYGICA_X8558PRO, 978 }, { 979 .subvendor = 0x107d, 980 .subdevice = 0x6f22, 981 .card = CX23885_BOARD_LEADTEK_WINFAST_PXTV1200, 982 }, { 983 .subvendor = 0x5654, 984 .subdevice = 0x2390, 985 .card = CX23885_BOARD_GOTVIEW_X5_3D_HYBRID, 986 }, { 987 .subvendor = 0x1b55, 988 .subdevice = 0xe2e4, 989 .card = CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF, 990 }, { 991 .subvendor = 0x14f1, 992 .subdevice = 0x8502, 993 .card = CX23885_BOARD_MYGICA_X8507, 994 }, { 995 .subvendor = 0x153b, 996 .subdevice = 0x117e, 997 .card = CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL, 998 }, { 999 .subvendor = 0xd471, 1000 .subdevice = 0x9022, 1001 .card = CX23885_BOARD_TEVII_S471, 1002 }, { 1003 .subvendor = 0x8000, 1004 .subdevice = 0x3034, 1005 .card = CX23885_BOARD_PROF_8000, 1006 }, { 1007 .subvendor = 0x0070, 1008 .subdevice = 0xc108, 1009 .card = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-4400 (Model 121xxx, Hybrid DVB-T/S2, IR) */ 1010 }, { 1011 .subvendor = 0x0070, 1012 .subdevice = 0xc138, 1013 .card = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-5500 (Model 121xxx, Hybrid DVB-T/C/S2, IR) */ 1014 }, { 1015 .subvendor = 0x0070, 1016 .subdevice = 0xc12a, 1017 .card = CX23885_BOARD_HAUPPAUGE_STARBURST, /* Hauppauge WinTV Starburst (Model 121x00, DVB-S2, IR) */ 1018 }, { 1019 .subvendor = 0x0070, 1020 .subdevice = 0xc1f8, 1021 .card = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-5500 (Model 121xxx, Hybrid DVB-T/C/S2, IR) */ 1022 }, { 1023 .subvendor = 0x1461, 1024 .subdevice = 0xd939, 1025 .card = CX23885_BOARD_AVERMEDIA_HC81R, 1026 }, { 1027 .subvendor = 0x0070, 1028 .subdevice = 0x7133, 1029 .card = CX23885_BOARD_HAUPPAUGE_IMPACTVCBE, 1030 }, { 1031 .subvendor = 0x18ac, 1032 .subdevice = 0xdb98, 1033 .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2, 1034 }, { 1035 .subvendor = 0x4254, 1036 .subdevice = 0x9580, 1037 .card = CX23885_BOARD_DVBSKY_T9580, 1038 }, { 1039 .subvendor = 0x4254, 1040 .subdevice = 0x980c, 1041 .card = CX23885_BOARD_DVBSKY_T980C, 1042 }, { 1043 .subvendor = 0x4254, 1044 .subdevice = 0x950c, 1045 .card = CX23885_BOARD_DVBSKY_S950C, 1046 }, { 1047 .subvendor = 0x13c2, 1048 .subdevice = 0x3013, 1049 .card = CX23885_BOARD_TT_CT2_4500_CI, 1050 }, { 1051 .subvendor = 0x4254, 1052 .subdevice = 0x0950, 1053 .card = CX23885_BOARD_DVBSKY_S950, 1054 }, { 1055 .subvendor = 0x4254, 1056 .subdevice = 0x0952, 1057 .card = CX23885_BOARD_DVBSKY_S952, 1058 }, { 1059 .subvendor = 0x4254, 1060 .subdevice = 0x0982, 1061 .card = CX23885_BOARD_DVBSKY_T982, 1062 }, { 1063 .subvendor = 0x0070, 1064 .subdevice = 0xf038, 1065 .card = CX23885_BOARD_HAUPPAUGE_HVR5525, 1066 }, { 1067 .subvendor = 0x1576, 1068 .subdevice = 0x0260, 1069 .card = CX23885_BOARD_VIEWCAST_260E, 1070 }, { 1071 .subvendor = 0x1576, 1072 .subdevice = 0x0460, 1073 .card = CX23885_BOARD_VIEWCAST_460E, 1074 }, { 1075 .subvendor = 0x0070, 1076 .subdevice = 0x6a28, 1077 .card = CX23885_BOARD_HAUPPAUGE_QUADHD_DVB, /* Tuner Pair 1 */ 1078 }, { 1079 .subvendor = 0x0070, 1080 .subdevice = 0x6b28, 1081 .card = CX23885_BOARD_HAUPPAUGE_QUADHD_DVB, /* Tuner Pair 2 */ 1082 }, { 1083 .subvendor = 0x0070, 1084 .subdevice = 0x6a18, 1085 .card = CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC, /* Tuner Pair 1 */ 1086 }, { 1087 .subvendor = 0x0070, 1088 .subdevice = 0x6b18, 1089 .card = CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC, /* Tuner Pair 2 */ 1090 }, 1091 }; 1092 const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids); 1093 1094 void cx23885_card_list(struct cx23885_dev *dev) 1095 { 1096 int i; 1097 1098 if (0 == dev->pci->subsystem_vendor && 1099 0 == dev->pci->subsystem_device) { 1100 pr_info("%s: Board has no valid PCIe Subsystem ID and can't\n" 1101 "%s: be autodetected. Pass card=<n> insmod option\n" 1102 "%s: to workaround that. Redirect complaints to the\n" 1103 "%s: vendor of the TV card. Best regards,\n" 1104 "%s: -- tux\n", 1105 dev->name, dev->name, dev->name, dev->name, dev->name); 1106 } else { 1107 pr_info("%s: Your board isn't known (yet) to the driver.\n" 1108 "%s: Try to pick one of the existing card configs via\n" 1109 "%s: card=<n> insmod option. Updating to the latest\n" 1110 "%s: version might help as well.\n", 1111 dev->name, dev->name, dev->name, dev->name); 1112 } 1113 pr_info("%s: Here is a list of valid choices for the card=<n> insmod option:\n", 1114 dev->name); 1115 for (i = 0; i < cx23885_bcount; i++) 1116 pr_info("%s: card=%d -> %s\n", 1117 dev->name, i, cx23885_boards[i].name); 1118 } 1119 1120 static void viewcast_eeprom(struct cx23885_dev *dev, u8 *eeprom_data) 1121 { 1122 u32 sn; 1123 1124 /* The serial number record begins with tag 0x59 */ 1125 if (*(eeprom_data + 0x00) != 0x59) { 1126 pr_info("%s() eeprom records are undefined, no serial number\n", 1127 __func__); 1128 return; 1129 } 1130 1131 sn = (*(eeprom_data + 0x06) << 24) | 1132 (*(eeprom_data + 0x05) << 16) | 1133 (*(eeprom_data + 0x04) << 8) | 1134 (*(eeprom_data + 0x03)); 1135 1136 pr_info("%s: card '%s' sn# MM%d\n", 1137 dev->name, 1138 cx23885_boards[dev->board].name, 1139 sn); 1140 } 1141 1142 static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data) 1143 { 1144 struct tveeprom tv; 1145 1146 tveeprom_hauppauge_analog(&tv, eeprom_data); 1147 1148 /* Make sure we support the board model */ 1149 switch (tv.model) { 1150 case 22001: 1151 /* WinTV-HVR1270 (PCIe, Retail, half height) 1152 * ATSC/QAM and basic analog, IR Blast */ 1153 case 22009: 1154 /* WinTV-HVR1210 (PCIe, Retail, half height) 1155 * DVB-T and basic analog, IR Blast */ 1156 case 22011: 1157 /* WinTV-HVR1270 (PCIe, Retail, half height) 1158 * ATSC/QAM and basic analog, IR Recv */ 1159 case 22019: 1160 /* WinTV-HVR1210 (PCIe, Retail, half height) 1161 * DVB-T and basic analog, IR Recv */ 1162 case 22021: 1163 /* WinTV-HVR1275 (PCIe, Retail, half height) 1164 * ATSC/QAM and basic analog, IR Recv */ 1165 case 22029: 1166 /* WinTV-HVR1210 (PCIe, Retail, half height) 1167 * DVB-T and basic analog, IR Recv */ 1168 case 22101: 1169 /* WinTV-HVR1270 (PCIe, Retail, full height) 1170 * ATSC/QAM and basic analog, IR Blast */ 1171 case 22109: 1172 /* WinTV-HVR1210 (PCIe, Retail, full height) 1173 * DVB-T and basic analog, IR Blast */ 1174 case 22111: 1175 /* WinTV-HVR1270 (PCIe, Retail, full height) 1176 * ATSC/QAM and basic analog, IR Recv */ 1177 case 22119: 1178 /* WinTV-HVR1210 (PCIe, Retail, full height) 1179 * DVB-T and basic analog, IR Recv */ 1180 case 22121: 1181 /* WinTV-HVR1275 (PCIe, Retail, full height) 1182 * ATSC/QAM and basic analog, IR Recv */ 1183 case 22129: 1184 /* WinTV-HVR1210 (PCIe, Retail, full height) 1185 * DVB-T and basic analog, IR Recv */ 1186 case 71009: 1187 /* WinTV-HVR1200 (PCIe, Retail, full height) 1188 * DVB-T and basic analog */ 1189 case 71100: 1190 /* WinTV-ImpactVCB-e (PCIe, Retail, half height) 1191 * Basic analog */ 1192 case 71359: 1193 /* WinTV-HVR1200 (PCIe, OEM, half height) 1194 * DVB-T and basic analog */ 1195 case 71439: 1196 /* WinTV-HVR1200 (PCIe, OEM, half height) 1197 * DVB-T and basic analog */ 1198 case 71449: 1199 /* WinTV-HVR1200 (PCIe, OEM, full height) 1200 * DVB-T and basic analog */ 1201 case 71939: 1202 /* WinTV-HVR1200 (PCIe, OEM, half height) 1203 * DVB-T and basic analog */ 1204 case 71949: 1205 /* WinTV-HVR1200 (PCIe, OEM, full height) 1206 * DVB-T and basic analog */ 1207 case 71959: 1208 /* WinTV-HVR1200 (PCIe, OEM, full height) 1209 * DVB-T and basic analog */ 1210 case 71979: 1211 /* WinTV-HVR1200 (PCIe, OEM, half height) 1212 * DVB-T and basic analog */ 1213 case 71999: 1214 /* WinTV-HVR1200 (PCIe, OEM, full height) 1215 * DVB-T and basic analog */ 1216 case 76601: 1217 /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual 1218 channel ATSC and MPEG2 HW Encoder */ 1219 case 77001: 1220 /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC 1221 and Basic analog */ 1222 case 77011: 1223 /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC 1224 and Basic analog */ 1225 case 77041: 1226 /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM 1227 and Basic analog */ 1228 case 77051: 1229 /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM 1230 and Basic analog */ 1231 case 78011: 1232 /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM, 1233 Dual channel ATSC and MPEG2 HW Encoder */ 1234 case 78501: 1235 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM, 1236 Dual channel ATSC and MPEG2 HW Encoder */ 1237 case 78521: 1238 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM, 1239 Dual channel ATSC and MPEG2 HW Encoder */ 1240 case 78531: 1241 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM, 1242 Dual channel ATSC and MPEG2 HW Encoder */ 1243 case 78631: 1244 /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM, 1245 Dual channel ATSC and MPEG2 HW Encoder */ 1246 case 79001: 1247 /* WinTV-HVR1250 (PCIe, Retail, IR, full height, 1248 ATSC and Basic analog */ 1249 case 79101: 1250 /* WinTV-HVR1250 (PCIe, Retail, IR, half height, 1251 ATSC and Basic analog */ 1252 case 79501: 1253 /* WinTV-HVR1250 (PCIe, No IR, half height, 1254 ATSC [at least] and Basic analog) */ 1255 case 79561: 1256 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height, 1257 ATSC and Basic analog */ 1258 case 79571: 1259 /* WinTV-HVR1250 (PCIe, OEM, No IR, full height, 1260 ATSC and Basic analog */ 1261 case 79671: 1262 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height, 1263 ATSC and Basic analog */ 1264 case 80019: 1265 /* WinTV-HVR1400 (Express Card, Retail, IR, 1266 * DVB-T and Basic analog */ 1267 case 81509: 1268 /* WinTV-HVR1700 (PCIe, OEM, No IR, half height) 1269 * DVB-T and MPEG2 HW Encoder */ 1270 case 81519: 1271 /* WinTV-HVR1700 (PCIe, OEM, No IR, full height) 1272 * DVB-T and MPEG2 HW Encoder */ 1273 break; 1274 case 85021: 1275 /* WinTV-HVR1850 (PCIe, Retail, 3.5mm in, IR, FM, 1276 Dual channel ATSC and MPEG2 HW Encoder */ 1277 break; 1278 case 85721: 1279 /* WinTV-HVR1290 (PCIe, OEM, RCA in, IR, 1280 Dual channel ATSC and Basic analog */ 1281 case 150329: 1282 /* WinTV-HVR5525 (PCIe, DVB-S/S2, DVB-T/T2/C) */ 1283 break; 1284 case 166100: 1285 /* WinTV-QuadHD (DVB) Tuner Pair 1 (PCIe, IR, half height, 1286 DVB-T/T2/C, DVB-T/T2/C */ 1287 break; 1288 case 166101: 1289 /* WinTV-QuadHD (DVB) Tuner Pair 2 (PCIe, IR, half height, 1290 DVB-T/T2/C, DVB-T/T2/C */ 1291 break; 1292 case 165100: 1293 /* 1294 * WinTV-QuadHD (ATSC) Tuner Pair 1 (PCIe, IR, half height, 1295 * ATSC, ATSC 1296 */ 1297 break; 1298 case 165101: 1299 /* 1300 * WinTV-QuadHD (DVB) Tuner Pair 2 (PCIe, IR, half height, 1301 * ATSC, ATSC 1302 */ 1303 break; 1304 default: 1305 pr_warn("%s: warning: unknown hauppauge model #%d\n", 1306 dev->name, tv.model); 1307 break; 1308 } 1309 1310 pr_info("%s: hauppauge eeprom: model=%d\n", 1311 dev->name, tv.model); 1312 } 1313 1314 /* Some TBS cards require initing a chip using a bitbanged SPI attached 1315 to the cx23885 gpio's. If this chip doesn't get init'ed the demod 1316 doesn't respond to any command. */ 1317 static void tbs_card_init(struct cx23885_dev *dev) 1318 { 1319 int i; 1320 const u8 buf[] = { 1321 0xe0, 0x06, 0x66, 0x33, 0x65, 1322 0x01, 0x17, 0x06, 0xde}; 1323 1324 switch (dev->board) { 1325 case CX23885_BOARD_TBS_6980: 1326 case CX23885_BOARD_TBS_6981: 1327 cx_set(GP0_IO, 0x00070007); 1328 usleep_range(1000, 10000); 1329 cx_clear(GP0_IO, 2); 1330 usleep_range(1000, 10000); 1331 for (i = 0; i < 9 * 8; i++) { 1332 cx_clear(GP0_IO, 7); 1333 usleep_range(1000, 10000); 1334 cx_set(GP0_IO, 1335 ((buf[i >> 3] >> (7 - (i & 7))) & 1) | 4); 1336 usleep_range(1000, 10000); 1337 } 1338 cx_set(GP0_IO, 7); 1339 break; 1340 } 1341 } 1342 1343 int cx23885_tuner_callback(void *priv, int component, int command, int arg) 1344 { 1345 struct cx23885_tsport *port = priv; 1346 struct cx23885_dev *dev = port->dev; 1347 u32 bitmask = 0; 1348 1349 if ((command == XC2028_RESET_CLK) || (command == XC2028_I2C_FLUSH)) 1350 return 0; 1351 1352 if (command != 0) { 1353 pr_err("%s(): Unknown command 0x%x.\n", 1354 __func__, command); 1355 return -EINVAL; 1356 } 1357 1358 switch (dev->board) { 1359 case CX23885_BOARD_HAUPPAUGE_HVR1400: 1360 case CX23885_BOARD_HAUPPAUGE_HVR1500: 1361 case CX23885_BOARD_HAUPPAUGE_HVR1500Q: 1362 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H: 1363 case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200: 1364 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000: 1365 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F: 1366 case CX23885_BOARD_COMPRO_VIDEOMATE_E800: 1367 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200: 1368 /* Tuner Reset Command */ 1369 bitmask = 0x04; 1370 break; 1371 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP: 1372 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: 1373 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2: 1374 /* Two identical tuners on two different i2c buses, 1375 * we need to reset the correct gpio. */ 1376 if (port->nr == 1) 1377 bitmask = 0x01; 1378 else if (port->nr == 2) 1379 bitmask = 0x04; 1380 break; 1381 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID: 1382 /* Tuner Reset Command */ 1383 bitmask = 0x02; 1384 break; 1385 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: 1386 altera_ci_tuner_reset(dev, port->nr); 1387 break; 1388 case CX23885_BOARD_AVERMEDIA_HC81R: 1389 /* XC3028L Reset Command */ 1390 bitmask = 1 << 2; 1391 break; 1392 } 1393 1394 if (bitmask) { 1395 /* Drive the tuner into reset and back out */ 1396 cx_clear(GP0_IO, bitmask); 1397 mdelay(200); 1398 cx_set(GP0_IO, bitmask); 1399 } 1400 1401 return 0; 1402 } 1403 1404 void cx23885_gpio_setup(struct cx23885_dev *dev) 1405 { 1406 switch (dev->board) { 1407 case CX23885_BOARD_HAUPPAUGE_HVR1250: 1408 /* GPIO-0 cx24227 demodulator reset */ 1409 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */ 1410 break; 1411 case CX23885_BOARD_HAUPPAUGE_HVR1500: 1412 /* GPIO-0 cx24227 demodulator */ 1413 /* GPIO-2 xc3028 tuner */ 1414 1415 /* Put the parts into reset */ 1416 cx_set(GP0_IO, 0x00050000); 1417 cx_clear(GP0_IO, 0x00000005); 1418 msleep(5); 1419 1420 /* Bring the parts out of reset */ 1421 cx_set(GP0_IO, 0x00050005); 1422 break; 1423 case CX23885_BOARD_HAUPPAUGE_HVR1500Q: 1424 /* GPIO-0 cx24227 demodulator reset */ 1425 /* GPIO-2 xc5000 tuner reset */ 1426 cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */ 1427 break; 1428 case CX23885_BOARD_HAUPPAUGE_HVR1800: 1429 /* GPIO-0 656_CLK */ 1430 /* GPIO-1 656_D0 */ 1431 /* GPIO-2 8295A Reset */ 1432 /* GPIO-3-10 cx23417 data0-7 */ 1433 /* GPIO-11-14 cx23417 addr0-3 */ 1434 /* GPIO-15-18 cx23417 READY, CS, RD, WR */ 1435 /* GPIO-19 IR_RX */ 1436 1437 /* CX23417 GPIO's */ 1438 /* EIO15 Zilog Reset */ 1439 /* EIO14 S5H1409/CX24227 Reset */ 1440 mc417_gpio_enable(dev, GPIO_15 | GPIO_14, 1); 1441 1442 /* Put the demod into reset and protect the eeprom */ 1443 mc417_gpio_clear(dev, GPIO_15 | GPIO_14); 1444 mdelay(100); 1445 1446 /* Bring the demod and blaster out of reset */ 1447 mc417_gpio_set(dev, GPIO_15 | GPIO_14); 1448 mdelay(100); 1449 1450 /* Force the TDA8295A into reset and back */ 1451 cx23885_gpio_enable(dev, GPIO_2, 1); 1452 cx23885_gpio_set(dev, GPIO_2); 1453 mdelay(20); 1454 cx23885_gpio_clear(dev, GPIO_2); 1455 mdelay(20); 1456 cx23885_gpio_set(dev, GPIO_2); 1457 mdelay(20); 1458 break; 1459 case CX23885_BOARD_HAUPPAUGE_HVR1200: 1460 /* GPIO-0 tda10048 demodulator reset */ 1461 /* GPIO-2 tda18271 tuner reset */ 1462 1463 /* Put the parts into reset and back */ 1464 cx_set(GP0_IO, 0x00050000); 1465 mdelay(20); 1466 cx_clear(GP0_IO, 0x00000005); 1467 mdelay(20); 1468 cx_set(GP0_IO, 0x00050005); 1469 break; 1470 case CX23885_BOARD_HAUPPAUGE_HVR1700: 1471 /* GPIO-0 TDA10048 demodulator reset */ 1472 /* GPIO-2 TDA8295A Reset */ 1473 /* GPIO-3-10 cx23417 data0-7 */ 1474 /* GPIO-11-14 cx23417 addr0-3 */ 1475 /* GPIO-15-18 cx23417 READY, CS, RD, WR */ 1476 1477 /* The following GPIO's are on the interna AVCore (cx25840) */ 1478 /* GPIO-19 IR_RX */ 1479 /* GPIO-20 IR_TX 416/DVBT Select */ 1480 /* GPIO-21 IIS DAT */ 1481 /* GPIO-22 IIS WCLK */ 1482 /* GPIO-23 IIS BCLK */ 1483 1484 /* Put the parts into reset and back */ 1485 cx_set(GP0_IO, 0x00050000); 1486 mdelay(20); 1487 cx_clear(GP0_IO, 0x00000005); 1488 mdelay(20); 1489 cx_set(GP0_IO, 0x00050005); 1490 break; 1491 case CX23885_BOARD_HAUPPAUGE_HVR1400: 1492 /* GPIO-0 Dibcom7000p demodulator reset */ 1493 /* GPIO-2 xc3028L tuner reset */ 1494 /* GPIO-13 LED */ 1495 1496 /* Put the parts into reset and back */ 1497 cx_set(GP0_IO, 0x00050000); 1498 mdelay(20); 1499 cx_clear(GP0_IO, 0x00000005); 1500 mdelay(20); 1501 cx_set(GP0_IO, 0x00050005); 1502 break; 1503 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP: 1504 /* GPIO-0 xc5000 tuner reset i2c bus 0 */ 1505 /* GPIO-1 s5h1409 demod reset i2c bus 0 */ 1506 /* GPIO-2 xc5000 tuner reset i2c bus 1 */ 1507 /* GPIO-3 s5h1409 demod reset i2c bus 0 */ 1508 1509 /* Put the parts into reset and back */ 1510 cx_set(GP0_IO, 0x000f0000); 1511 mdelay(20); 1512 cx_clear(GP0_IO, 0x0000000f); 1513 mdelay(20); 1514 cx_set(GP0_IO, 0x000f000f); 1515 break; 1516 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: 1517 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2: 1518 /* GPIO-0 portb xc3028 reset */ 1519 /* GPIO-1 portb zl10353 reset */ 1520 /* GPIO-2 portc xc3028 reset */ 1521 /* GPIO-3 portc zl10353 reset */ 1522 1523 /* Put the parts into reset and back */ 1524 cx_set(GP0_IO, 0x000f0000); 1525 mdelay(20); 1526 cx_clear(GP0_IO, 0x0000000f); 1527 mdelay(20); 1528 cx_set(GP0_IO, 0x000f000f); 1529 break; 1530 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H: 1531 case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200: 1532 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000: 1533 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F: 1534 case CX23885_BOARD_COMPRO_VIDEOMATE_E800: 1535 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200: 1536 /* GPIO-2 xc3028 tuner reset */ 1537 1538 /* The following GPIO's are on the internal AVCore (cx25840) */ 1539 /* GPIO-? zl10353 demod reset */ 1540 1541 /* Put the parts into reset and back */ 1542 cx_set(GP0_IO, 0x00040000); 1543 mdelay(20); 1544 cx_clear(GP0_IO, 0x00000004); 1545 mdelay(20); 1546 cx_set(GP0_IO, 0x00040004); 1547 break; 1548 case CX23885_BOARD_TBS_6920: 1549 case CX23885_BOARD_TBS_6980: 1550 case CX23885_BOARD_TBS_6981: 1551 case CX23885_BOARD_PROF_8000: 1552 cx_write(MC417_CTL, 0x00000036); 1553 cx_write(MC417_OEN, 0x00001000); 1554 cx_set(MC417_RWD, 0x00000002); 1555 mdelay(200); 1556 cx_clear(MC417_RWD, 0x00000800); 1557 mdelay(200); 1558 cx_set(MC417_RWD, 0x00000800); 1559 mdelay(200); 1560 break; 1561 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: 1562 /* GPIO-0 INTA from CiMax1 1563 GPIO-1 INTB from CiMax2 1564 GPIO-2 reset chips 1565 GPIO-3 to GPIO-10 data/addr for CA 1566 GPIO-11 ~CS0 to CiMax1 1567 GPIO-12 ~CS1 to CiMax2 1568 GPIO-13 ADL0 load LSB addr 1569 GPIO-14 ADL1 load MSB addr 1570 GPIO-15 ~RDY from CiMax 1571 GPIO-17 ~RD to CiMax 1572 GPIO-18 ~WR to CiMax 1573 */ 1574 cx_set(GP0_IO, 0x00040000); /* GPIO as out */ 1575 /* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */ 1576 cx_clear(GP0_IO, 0x00030004); 1577 mdelay(100);/* reset delay */ 1578 cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */ 1579 cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */ 1580 /* GPIO-15 IN as ~ACK, rest as OUT */ 1581 cx_write(MC417_OEN, 0x00001000); 1582 /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */ 1583 cx_write(MC417_RWD, 0x0000c300); 1584 /* enable irq */ 1585 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/ 1586 break; 1587 case CX23885_BOARD_HAUPPAUGE_HVR1270: 1588 case CX23885_BOARD_HAUPPAUGE_HVR1275: 1589 case CX23885_BOARD_HAUPPAUGE_HVR1255: 1590 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111: 1591 case CX23885_BOARD_HAUPPAUGE_HVR1210: 1592 /* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */ 1593 /* GPIO-6 I2C Gate which can isolate the demod from the bus */ 1594 /* GPIO-9 Demod reset */ 1595 1596 /* Put the parts into reset and back */ 1597 cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1); 1598 cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5); 1599 cx23885_gpio_clear(dev, GPIO_9); 1600 mdelay(20); 1601 cx23885_gpio_set(dev, GPIO_9); 1602 break; 1603 case CX23885_BOARD_MYGICA_X8506: 1604 case CX23885_BOARD_MAGICPRO_PROHDTVE2: 1605 case CX23885_BOARD_MYGICA_X8507: 1606 /* GPIO-0 (0)Analog / (1)Digital TV */ 1607 /* GPIO-1 reset XC5000 */ 1608 /* GPIO-2 demod reset */ 1609 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1 | GPIO_2, 1); 1610 cx23885_gpio_clear(dev, GPIO_1 | GPIO_2); 1611 mdelay(100); 1612 cx23885_gpio_set(dev, GPIO_0 | GPIO_1 | GPIO_2); 1613 mdelay(100); 1614 break; 1615 case CX23885_BOARD_MYGICA_X8558PRO: 1616 /* GPIO-0 reset first ATBM8830 */ 1617 /* GPIO-1 reset second ATBM8830 */ 1618 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1); 1619 cx23885_gpio_clear(dev, GPIO_0 | GPIO_1); 1620 mdelay(100); 1621 cx23885_gpio_set(dev, GPIO_0 | GPIO_1); 1622 mdelay(100); 1623 break; 1624 case CX23885_BOARD_HAUPPAUGE_HVR1850: 1625 case CX23885_BOARD_HAUPPAUGE_HVR1290: 1626 /* GPIO-0 656_CLK */ 1627 /* GPIO-1 656_D0 */ 1628 /* GPIO-2 Wake# */ 1629 /* GPIO-3-10 cx23417 data0-7 */ 1630 /* GPIO-11-14 cx23417 addr0-3 */ 1631 /* GPIO-15-18 cx23417 READY, CS, RD, WR */ 1632 /* GPIO-19 IR_RX */ 1633 /* GPIO-20 C_IR_TX */ 1634 /* GPIO-21 I2S DAT */ 1635 /* GPIO-22 I2S WCLK */ 1636 /* GPIO-23 I2S BCLK */ 1637 /* ALT GPIO: EXP GPIO LATCH */ 1638 1639 /* CX23417 GPIO's */ 1640 /* GPIO-14 S5H1411/CX24228 Reset */ 1641 /* GPIO-13 EEPROM write protect */ 1642 mc417_gpio_enable(dev, GPIO_14 | GPIO_13, 1); 1643 1644 /* Put the demod into reset and protect the eeprom */ 1645 mc417_gpio_clear(dev, GPIO_14 | GPIO_13); 1646 mdelay(100); 1647 1648 /* Bring the demod out of reset */ 1649 mc417_gpio_set(dev, GPIO_14); 1650 mdelay(100); 1651 1652 /* CX24228 GPIO */ 1653 /* Connected to IF / Mux */ 1654 break; 1655 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID: 1656 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */ 1657 break; 1658 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: 1659 /* GPIO-0 ~INT in 1660 GPIO-1 TMS out 1661 GPIO-2 ~reset chips out 1662 GPIO-3 to GPIO-10 data/addr for CA in/out 1663 GPIO-11 ~CS out 1664 GPIO-12 ADDR out 1665 GPIO-13 ~WR out 1666 GPIO-14 ~RD out 1667 GPIO-15 ~RDY in 1668 GPIO-16 TCK out 1669 GPIO-17 TDO in 1670 GPIO-18 TDI out 1671 */ 1672 cx_set(GP0_IO, 0x00060000); /* GPIO-1,2 as out */ 1673 /* GPIO-0 as INT, reset & TMS low */ 1674 cx_clear(GP0_IO, 0x00010006); 1675 mdelay(100);/* reset delay */ 1676 cx_set(GP0_IO, 0x00000004); /* reset high */ 1677 cx_write(MC417_CTL, 0x00000037);/* enable GPIO-3..18 pins */ 1678 /* GPIO-17 is TDO in, GPIO-15 is ~RDY in, rest is out */ 1679 cx_write(MC417_OEN, 0x00005000); 1680 /* ~RD, ~WR high; ADDR low; ~CS high */ 1681 cx_write(MC417_RWD, 0x00000d00); 1682 /* enable irq */ 1683 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/ 1684 break; 1685 case CX23885_BOARD_HAUPPAUGE_HVR4400: 1686 case CX23885_BOARD_HAUPPAUGE_STARBURST: 1687 /* GPIO-8 tda10071 demod reset */ 1688 /* GPIO-9 si2165 demod reset (only HVR4400/HVR5500)*/ 1689 1690 /* Put the parts into reset and back */ 1691 cx23885_gpio_enable(dev, GPIO_8 | GPIO_9, 1); 1692 1693 cx23885_gpio_clear(dev, GPIO_8 | GPIO_9); 1694 mdelay(100); 1695 cx23885_gpio_set(dev, GPIO_8 | GPIO_9); 1696 mdelay(100); 1697 1698 break; 1699 case CX23885_BOARD_AVERMEDIA_HC81R: 1700 cx_clear(MC417_CTL, 1); 1701 /* GPIO-0,1,2 setup direction as output */ 1702 cx_set(GP0_IO, 0x00070000); 1703 mdelay(10); 1704 /* AF9013 demod reset */ 1705 cx_set(GP0_IO, 0x00010001); 1706 mdelay(10); 1707 cx_clear(GP0_IO, 0x00010001); 1708 mdelay(10); 1709 cx_set(GP0_IO, 0x00010001); 1710 mdelay(10); 1711 /* demod tune? */ 1712 cx_clear(GP0_IO, 0x00030003); 1713 mdelay(10); 1714 cx_set(GP0_IO, 0x00020002); 1715 mdelay(10); 1716 cx_set(GP0_IO, 0x00010001); 1717 mdelay(10); 1718 cx_clear(GP0_IO, 0x00020002); 1719 /* XC3028L tuner reset */ 1720 cx_set(GP0_IO, 0x00040004); 1721 cx_clear(GP0_IO, 0x00040004); 1722 cx_set(GP0_IO, 0x00040004); 1723 mdelay(60); 1724 break; 1725 case CX23885_BOARD_DVBSKY_T9580: 1726 case CX23885_BOARD_DVBSKY_S952: 1727 case CX23885_BOARD_DVBSKY_T982: 1728 /* enable GPIO3-18 pins */ 1729 cx_write(MC417_CTL, 0x00000037); 1730 cx23885_gpio_enable(dev, GPIO_2 | GPIO_11, 1); 1731 cx23885_gpio_clear(dev, GPIO_2 | GPIO_11); 1732 mdelay(100); 1733 cx23885_gpio_set(dev, GPIO_2 | GPIO_11); 1734 break; 1735 case CX23885_BOARD_DVBSKY_T980C: 1736 case CX23885_BOARD_DVBSKY_S950C: 1737 case CX23885_BOARD_TT_CT2_4500_CI: 1738 /* 1739 * GPIO-0 INTA from CiMax, input 1740 * GPIO-1 reset CiMax, output, high active 1741 * GPIO-2 reset demod, output, low active 1742 * GPIO-3 to GPIO-10 data/addr for CAM 1743 * GPIO-11 ~CS0 to CiMax1 1744 * GPIO-12 ~CS1 to CiMax2 1745 * GPIO-13 ADL0 load LSB addr 1746 * GPIO-14 ADL1 load MSB addr 1747 * GPIO-15 ~RDY from CiMax 1748 * GPIO-17 ~RD to CiMax 1749 * GPIO-18 ~WR to CiMax 1750 */ 1751 1752 cx_set(GP0_IO, 0x00060002); /* GPIO 1/2 as output */ 1753 cx_clear(GP0_IO, 0x00010004); /* GPIO 0 as input */ 1754 mdelay(100); /* reset delay */ 1755 cx_set(GP0_IO, 0x00060004); /* GPIO as out, reset high */ 1756 cx_clear(GP0_IO, 0x00010002); 1757 cx_write(MC417_CTL, 0x00000037); /* enable GPIO3-18 pins */ 1758 1759 /* GPIO-15 IN as ~ACK, rest as OUT */ 1760 cx_write(MC417_OEN, 0x00001000); 1761 1762 /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */ 1763 cx_write(MC417_RWD, 0x0000c300); 1764 1765 /* enable irq */ 1766 cx_write(GPIO_ISM, 0x00000000); /* INTERRUPTS active low */ 1767 break; 1768 case CX23885_BOARD_DVBSKY_S950: 1769 cx23885_gpio_enable(dev, GPIO_2, 1); 1770 cx23885_gpio_clear(dev, GPIO_2); 1771 msleep(100); 1772 cx23885_gpio_set(dev, GPIO_2); 1773 break; 1774 case CX23885_BOARD_HAUPPAUGE_HVR5525: 1775 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB: 1776 case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC: 1777 /* 1778 * HVR5525 GPIO Details: 1779 * GPIO-00 IR_WIDE 1780 * GPIO-02 wake# 1781 * GPIO-03 VAUX Pres. 1782 * GPIO-07 PROG# 1783 * GPIO-08 SAT_RESN 1784 * GPIO-09 TER_RESN 1785 * GPIO-10 B2_SENSE 1786 * GPIO-11 B1_SENSE 1787 * GPIO-15 IR_LED_STATUS 1788 * GPIO-19 IR_NARROW 1789 * GPIO-20 Blauster1 1790 * ALTGPIO VAUX_SWITCH 1791 * AUX_PLL_CLK : Blaster2 1792 */ 1793 /* Put the parts into reset and back */ 1794 cx23885_gpio_enable(dev, GPIO_8 | GPIO_9, 1); 1795 cx23885_gpio_clear(dev, GPIO_8 | GPIO_9); 1796 msleep(100); 1797 cx23885_gpio_set(dev, GPIO_8 | GPIO_9); 1798 msleep(100); 1799 break; 1800 case CX23885_BOARD_VIEWCAST_260E: 1801 case CX23885_BOARD_VIEWCAST_460E: 1802 /* For documentation purposes, it's worth noting that this 1803 * card does not have any GPIO's connected to subcomponents. 1804 */ 1805 break; 1806 } 1807 } 1808 1809 int cx23885_ir_init(struct cx23885_dev *dev) 1810 { 1811 static struct v4l2_subdev_io_pin_config ir_rxtx_pin_cfg[] = { 1812 { 1813 .flags = V4L2_SUBDEV_IO_PIN_INPUT, 1814 .pin = CX23885_PIN_IR_RX_GPIO19, 1815 .function = CX23885_PAD_IR_RX, 1816 .value = 0, 1817 .strength = CX25840_PIN_DRIVE_MEDIUM, 1818 }, { 1819 .flags = V4L2_SUBDEV_IO_PIN_OUTPUT, 1820 .pin = CX23885_PIN_IR_TX_GPIO20, 1821 .function = CX23885_PAD_IR_TX, 1822 .value = 0, 1823 .strength = CX25840_PIN_DRIVE_MEDIUM, 1824 } 1825 }; 1826 const size_t ir_rxtx_pin_cfg_count = ARRAY_SIZE(ir_rxtx_pin_cfg); 1827 1828 static struct v4l2_subdev_io_pin_config ir_rx_pin_cfg[] = { 1829 { 1830 .flags = V4L2_SUBDEV_IO_PIN_INPUT, 1831 .pin = CX23885_PIN_IR_RX_GPIO19, 1832 .function = CX23885_PAD_IR_RX, 1833 .value = 0, 1834 .strength = CX25840_PIN_DRIVE_MEDIUM, 1835 } 1836 }; 1837 const size_t ir_rx_pin_cfg_count = ARRAY_SIZE(ir_rx_pin_cfg); 1838 1839 struct v4l2_subdev_ir_parameters params; 1840 int ret = 0; 1841 switch (dev->board) { 1842 case CX23885_BOARD_HAUPPAUGE_HVR1500: 1843 case CX23885_BOARD_HAUPPAUGE_HVR1500Q: 1844 case CX23885_BOARD_HAUPPAUGE_HVR1800: 1845 case CX23885_BOARD_HAUPPAUGE_HVR1200: 1846 case CX23885_BOARD_HAUPPAUGE_HVR1400: 1847 case CX23885_BOARD_HAUPPAUGE_HVR1275: 1848 case CX23885_BOARD_HAUPPAUGE_HVR1255: 1849 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111: 1850 case CX23885_BOARD_HAUPPAUGE_HVR1210: 1851 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB: 1852 case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC: 1853 /* FIXME: Implement me */ 1854 break; 1855 case CX23885_BOARD_HAUPPAUGE_HVR1270: 1856 ret = cx23888_ir_probe(dev); 1857 if (ret) 1858 break; 1859 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR); 1860 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config, 1861 ir_rx_pin_cfg_count, ir_rx_pin_cfg); 1862 break; 1863 case CX23885_BOARD_HAUPPAUGE_HVR1850: 1864 case CX23885_BOARD_HAUPPAUGE_HVR1290: 1865 ret = cx23888_ir_probe(dev); 1866 if (ret) 1867 break; 1868 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR); 1869 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config, 1870 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg); 1871 /* 1872 * For these boards we need to invert the Tx output via the 1873 * IR controller to have the LED off while idle 1874 */ 1875 v4l2_subdev_call(dev->sd_ir, ir, tx_g_parameters, ¶ms); 1876 params.enable = false; 1877 params.shutdown = false; 1878 params.invert_level = true; 1879 v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, ¶ms); 1880 params.shutdown = true; 1881 v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, ¶ms); 1882 break; 1883 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL: 1884 case CX23885_BOARD_TEVII_S470: 1885 case CX23885_BOARD_MYGICA_X8507: 1886 case CX23885_BOARD_TBS_6980: 1887 case CX23885_BOARD_TBS_6981: 1888 case CX23885_BOARD_DVBSKY_T9580: 1889 case CX23885_BOARD_DVBSKY_T980C: 1890 case CX23885_BOARD_DVBSKY_S950C: 1891 case CX23885_BOARD_TT_CT2_4500_CI: 1892 case CX23885_BOARD_DVBSKY_S950: 1893 case CX23885_BOARD_DVBSKY_S952: 1894 case CX23885_BOARD_DVBSKY_T982: 1895 if (!enable_885_ir) 1896 break; 1897 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE); 1898 if (dev->sd_ir == NULL) { 1899 ret = -ENODEV; 1900 break; 1901 } 1902 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config, 1903 ir_rx_pin_cfg_count, ir_rx_pin_cfg); 1904 break; 1905 case CX23885_BOARD_HAUPPAUGE_HVR1250: 1906 if (!enable_885_ir) 1907 break; 1908 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE); 1909 if (dev->sd_ir == NULL) { 1910 ret = -ENODEV; 1911 break; 1912 } 1913 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config, 1914 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg); 1915 break; 1916 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: 1917 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2: 1918 request_module("ir-kbd-i2c"); 1919 break; 1920 } 1921 1922 return ret; 1923 } 1924 1925 void cx23885_ir_fini(struct cx23885_dev *dev) 1926 { 1927 switch (dev->board) { 1928 case CX23885_BOARD_HAUPPAUGE_HVR1270: 1929 case CX23885_BOARD_HAUPPAUGE_HVR1850: 1930 case CX23885_BOARD_HAUPPAUGE_HVR1290: 1931 cx23885_irq_remove(dev, PCI_MSK_IR); 1932 cx23888_ir_remove(dev); 1933 dev->sd_ir = NULL; 1934 break; 1935 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL: 1936 case CX23885_BOARD_TEVII_S470: 1937 case CX23885_BOARD_HAUPPAUGE_HVR1250: 1938 case CX23885_BOARD_MYGICA_X8507: 1939 case CX23885_BOARD_TBS_6980: 1940 case CX23885_BOARD_TBS_6981: 1941 case CX23885_BOARD_DVBSKY_T9580: 1942 case CX23885_BOARD_DVBSKY_T980C: 1943 case CX23885_BOARD_DVBSKY_S950C: 1944 case CX23885_BOARD_TT_CT2_4500_CI: 1945 case CX23885_BOARD_DVBSKY_S950: 1946 case CX23885_BOARD_DVBSKY_S952: 1947 case CX23885_BOARD_DVBSKY_T982: 1948 cx23885_irq_remove(dev, PCI_MSK_AV_CORE); 1949 /* sd_ir is a duplicate pointer to the AV Core, just clear it */ 1950 dev->sd_ir = NULL; 1951 break; 1952 } 1953 } 1954 1955 static int netup_jtag_io(void *device, int tms, int tdi, int read_tdo) 1956 { 1957 int data; 1958 int tdo = 0; 1959 struct cx23885_dev *dev = (struct cx23885_dev *)device; 1960 /*TMS*/ 1961 data = ((cx_read(GP0_IO)) & (~0x00000002)); 1962 data |= (tms ? 0x00020002 : 0x00020000); 1963 cx_write(GP0_IO, data); 1964 1965 /*TDI*/ 1966 data = ((cx_read(MC417_RWD)) & (~0x0000a000)); 1967 data |= (tdi ? 0x00008000 : 0); 1968 cx_write(MC417_RWD, data); 1969 if (read_tdo) 1970 tdo = (data & 0x00004000) ? 1 : 0; /*TDO*/ 1971 1972 cx_write(MC417_RWD, data | 0x00002000); 1973 udelay(1); 1974 /*TCK*/ 1975 cx_write(MC417_RWD, data); 1976 1977 return tdo; 1978 } 1979 1980 void cx23885_ir_pci_int_enable(struct cx23885_dev *dev) 1981 { 1982 switch (dev->board) { 1983 case CX23885_BOARD_HAUPPAUGE_HVR1270: 1984 case CX23885_BOARD_HAUPPAUGE_HVR1850: 1985 case CX23885_BOARD_HAUPPAUGE_HVR1290: 1986 if (dev->sd_ir) 1987 cx23885_irq_add_enable(dev, PCI_MSK_IR); 1988 break; 1989 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL: 1990 case CX23885_BOARD_TEVII_S470: 1991 case CX23885_BOARD_HAUPPAUGE_HVR1250: 1992 case CX23885_BOARD_MYGICA_X8507: 1993 case CX23885_BOARD_TBS_6980: 1994 case CX23885_BOARD_TBS_6981: 1995 case CX23885_BOARD_DVBSKY_T9580: 1996 case CX23885_BOARD_DVBSKY_T980C: 1997 case CX23885_BOARD_DVBSKY_S950C: 1998 case CX23885_BOARD_TT_CT2_4500_CI: 1999 case CX23885_BOARD_DVBSKY_S950: 2000 case CX23885_BOARD_DVBSKY_S952: 2001 case CX23885_BOARD_DVBSKY_T982: 2002 if (dev->sd_ir) 2003 cx23885_irq_add_enable(dev, PCI_MSK_AV_CORE); 2004 break; 2005 } 2006 } 2007 2008 void cx23885_card_setup(struct cx23885_dev *dev) 2009 { 2010 struct cx23885_tsport *ts1 = &dev->ts1; 2011 struct cx23885_tsport *ts2 = &dev->ts2; 2012 2013 static u8 eeprom[256]; 2014 2015 if (dev->i2c_bus[0].i2c_rc == 0) { 2016 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1; 2017 tveeprom_read(&dev->i2c_bus[0].i2c_client, 2018 eeprom, sizeof(eeprom)); 2019 } 2020 2021 switch (dev->board) { 2022 case CX23885_BOARD_HAUPPAUGE_HVR1250: 2023 if (dev->i2c_bus[0].i2c_rc == 0) { 2024 if (eeprom[0x80] != 0x84) 2025 hauppauge_eeprom(dev, eeprom+0xc0); 2026 else 2027 hauppauge_eeprom(dev, eeprom+0x80); 2028 } 2029 break; 2030 case CX23885_BOARD_HAUPPAUGE_HVR1500: 2031 case CX23885_BOARD_HAUPPAUGE_HVR1500Q: 2032 case CX23885_BOARD_HAUPPAUGE_HVR1400: 2033 if (dev->i2c_bus[0].i2c_rc == 0) 2034 hauppauge_eeprom(dev, eeprom+0x80); 2035 break; 2036 case CX23885_BOARD_HAUPPAUGE_HVR1800: 2037 case CX23885_BOARD_HAUPPAUGE_HVR1800lp: 2038 case CX23885_BOARD_HAUPPAUGE_HVR1200: 2039 case CX23885_BOARD_HAUPPAUGE_HVR1700: 2040 case CX23885_BOARD_HAUPPAUGE_HVR1270: 2041 case CX23885_BOARD_HAUPPAUGE_HVR1275: 2042 case CX23885_BOARD_HAUPPAUGE_HVR1255: 2043 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111: 2044 case CX23885_BOARD_HAUPPAUGE_HVR1210: 2045 case CX23885_BOARD_HAUPPAUGE_HVR1850: 2046 case CX23885_BOARD_HAUPPAUGE_HVR1290: 2047 case CX23885_BOARD_HAUPPAUGE_HVR4400: 2048 case CX23885_BOARD_HAUPPAUGE_STARBURST: 2049 case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE: 2050 case CX23885_BOARD_HAUPPAUGE_HVR5525: 2051 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB: 2052 case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC: 2053 if (dev->i2c_bus[0].i2c_rc == 0) 2054 hauppauge_eeprom(dev, eeprom+0xc0); 2055 break; 2056 case CX23885_BOARD_VIEWCAST_260E: 2057 case CX23885_BOARD_VIEWCAST_460E: 2058 dev->i2c_bus[1].i2c_client.addr = 0xa0 >> 1; 2059 tveeprom_read(&dev->i2c_bus[1].i2c_client, 2060 eeprom, sizeof(eeprom)); 2061 if (dev->i2c_bus[0].i2c_rc == 0) 2062 viewcast_eeprom(dev, eeprom); 2063 break; 2064 } 2065 2066 switch (dev->board) { 2067 case CX23885_BOARD_AVERMEDIA_HC81R: 2068 /* Defaults for VID B */ 2069 ts1->gen_ctrl_val = 0x4; /* Parallel */ 2070 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2071 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2072 /* Defaults for VID C */ 2073 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */ 2074 ts2->gen_ctrl_val = 0x10e; 2075 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2076 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2077 break; 2078 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP: 2079 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: 2080 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2: 2081 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 2082 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2083 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2084 /* break omitted intentionally */ 2085 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP: 2086 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 2087 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2088 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2089 break; 2090 case CX23885_BOARD_HAUPPAUGE_HVR1850: 2091 case CX23885_BOARD_HAUPPAUGE_HVR1800: 2092 /* Defaults for VID B - Analog encoder */ 2093 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */ 2094 ts1->gen_ctrl_val = 0x10e; 2095 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2096 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2097 2098 /* APB_TSVALERR_POL (active low)*/ 2099 ts1->vld_misc_val = 0x2000; 2100 ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc); 2101 cx_write(0x130184, 0xc); 2102 2103 /* Defaults for VID C */ 2104 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 2105 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2106 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2107 break; 2108 case CX23885_BOARD_TBS_6920: 2109 ts1->gen_ctrl_val = 0x4; /* Parallel */ 2110 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2111 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2112 break; 2113 case CX23885_BOARD_TEVII_S470: 2114 case CX23885_BOARD_TEVII_S471: 2115 case CX23885_BOARD_DVBWORLD_2005: 2116 case CX23885_BOARD_PROF_8000: 2117 case CX23885_BOARD_DVBSKY_T980C: 2118 case CX23885_BOARD_DVBSKY_S950C: 2119 case CX23885_BOARD_TT_CT2_4500_CI: 2120 case CX23885_BOARD_DVBSKY_S950: 2121 ts1->gen_ctrl_val = 0x5; /* Parallel */ 2122 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2123 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2124 break; 2125 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: 2126 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: 2127 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL: 2128 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 2129 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2130 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2131 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 2132 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2133 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2134 break; 2135 case CX23885_BOARD_TBS_6980: 2136 case CX23885_BOARD_TBS_6981: 2137 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 2138 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2139 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2140 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 2141 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2142 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2143 tbs_card_init(dev); 2144 break; 2145 case CX23885_BOARD_MYGICA_X8506: 2146 case CX23885_BOARD_MAGICPRO_PROHDTVE2: 2147 case CX23885_BOARD_MYGICA_X8507: 2148 ts1->gen_ctrl_val = 0x5; /* Parallel */ 2149 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2150 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2151 break; 2152 case CX23885_BOARD_MYGICA_X8558PRO: 2153 ts1->gen_ctrl_val = 0x5; /* Parallel */ 2154 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2155 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2156 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 2157 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2158 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2159 break; 2160 case CX23885_BOARD_HAUPPAUGE_HVR4400: 2161 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 2162 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2163 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2164 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 2165 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2166 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2167 break; 2168 case CX23885_BOARD_HAUPPAUGE_STARBURST: 2169 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 2170 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2171 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2172 break; 2173 case CX23885_BOARD_DVBSKY_T9580: 2174 case CX23885_BOARD_DVBSKY_T982: 2175 ts1->gen_ctrl_val = 0x5; /* Parallel */ 2176 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2177 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2178 ts2->gen_ctrl_val = 0x8; /* Serial bus */ 2179 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2180 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2181 break; 2182 case CX23885_BOARD_DVBSKY_S952: 2183 ts1->gen_ctrl_val = 0x5; /* Parallel */ 2184 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2185 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2186 ts2->gen_ctrl_val = 0xe; /* Serial bus */ 2187 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2188 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2189 break; 2190 case CX23885_BOARD_HAUPPAUGE_HVR5525: 2191 ts1->gen_ctrl_val = 0x5; /* Parallel */ 2192 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2193 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2194 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 2195 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2196 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2197 break; 2198 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB: 2199 case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC: 2200 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 2201 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2202 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2203 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 2204 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2205 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2206 break; 2207 case CX23885_BOARD_HAUPPAUGE_HVR1250: 2208 case CX23885_BOARD_HAUPPAUGE_HVR1500: 2209 case CX23885_BOARD_HAUPPAUGE_HVR1500Q: 2210 case CX23885_BOARD_HAUPPAUGE_HVR1800lp: 2211 case CX23885_BOARD_HAUPPAUGE_HVR1200: 2212 case CX23885_BOARD_HAUPPAUGE_HVR1700: 2213 case CX23885_BOARD_HAUPPAUGE_HVR1400: 2214 case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE: 2215 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H: 2216 case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200: 2217 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000: 2218 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F: 2219 case CX23885_BOARD_HAUPPAUGE_HVR1270: 2220 case CX23885_BOARD_HAUPPAUGE_HVR1275: 2221 case CX23885_BOARD_HAUPPAUGE_HVR1255: 2222 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111: 2223 case CX23885_BOARD_HAUPPAUGE_HVR1210: 2224 case CX23885_BOARD_COMPRO_VIDEOMATE_E800: 2225 case CX23885_BOARD_HAUPPAUGE_HVR1290: 2226 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID: 2227 default: 2228 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 2229 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2230 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2231 } 2232 2233 /* Certain boards support analog, or require the avcore to be 2234 * loaded, ensure this happens. 2235 */ 2236 switch (dev->board) { 2237 case CX23885_BOARD_TEVII_S470: 2238 /* Currently only enabled for the integrated IR controller */ 2239 if (!enable_885_ir) 2240 break; 2241 case CX23885_BOARD_HAUPPAUGE_HVR1250: 2242 case CX23885_BOARD_HAUPPAUGE_HVR1800: 2243 case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE: 2244 case CX23885_BOARD_HAUPPAUGE_HVR1800lp: 2245 case CX23885_BOARD_HAUPPAUGE_HVR1700: 2246 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H: 2247 case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200: 2248 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000: 2249 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F: 2250 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: 2251 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: 2252 case CX23885_BOARD_COMPRO_VIDEOMATE_E800: 2253 case CX23885_BOARD_HAUPPAUGE_HVR1255: 2254 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111: 2255 case CX23885_BOARD_HAUPPAUGE_HVR1270: 2256 case CX23885_BOARD_HAUPPAUGE_HVR1850: 2257 case CX23885_BOARD_MYGICA_X8506: 2258 case CX23885_BOARD_MAGICPRO_PROHDTVE2: 2259 case CX23885_BOARD_HAUPPAUGE_HVR1290: 2260 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200: 2261 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID: 2262 case CX23885_BOARD_HAUPPAUGE_HVR1500: 2263 case CX23885_BOARD_MPX885: 2264 case CX23885_BOARD_MYGICA_X8507: 2265 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL: 2266 case CX23885_BOARD_AVERMEDIA_HC81R: 2267 case CX23885_BOARD_TBS_6980: 2268 case CX23885_BOARD_TBS_6981: 2269 case CX23885_BOARD_DVBSKY_T9580: 2270 case CX23885_BOARD_DVBSKY_T980C: 2271 case CX23885_BOARD_DVBSKY_S950C: 2272 case CX23885_BOARD_TT_CT2_4500_CI: 2273 case CX23885_BOARD_DVBSKY_S950: 2274 case CX23885_BOARD_DVBSKY_S952: 2275 case CX23885_BOARD_DVBSKY_T982: 2276 case CX23885_BOARD_VIEWCAST_260E: 2277 case CX23885_BOARD_VIEWCAST_460E: 2278 dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev, 2279 &dev->i2c_bus[2].i2c_adap, 2280 "cx25840", 0x88 >> 1, NULL); 2281 if (dev->sd_cx25840) { 2282 dev->sd_cx25840->grp_id = CX23885_HW_AV_CORE; 2283 v4l2_subdev_call(dev->sd_cx25840, core, load_fw); 2284 } 2285 break; 2286 } 2287 2288 switch (dev->board) { 2289 case CX23885_BOARD_VIEWCAST_260E: 2290 v4l2_i2c_new_subdev(&dev->v4l2_dev, 2291 &dev->i2c_bus[0].i2c_adap, 2292 "cs3308", 0x82 >> 1, NULL); 2293 break; 2294 case CX23885_BOARD_VIEWCAST_460E: 2295 /* This cs3308 controls the audio from the breakout cable */ 2296 v4l2_i2c_new_subdev(&dev->v4l2_dev, 2297 &dev->i2c_bus[0].i2c_adap, 2298 "cs3308", 0x80 >> 1, NULL); 2299 /* This cs3308 controls the audio from the onboard header */ 2300 v4l2_i2c_new_subdev(&dev->v4l2_dev, 2301 &dev->i2c_bus[0].i2c_adap, 2302 "cs3308", 0x82 >> 1, NULL); 2303 break; 2304 } 2305 2306 /* AUX-PLL 27MHz CLK */ 2307 switch (dev->board) { 2308 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: 2309 netup_initialize(dev); 2310 break; 2311 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: { 2312 int ret; 2313 const struct firmware *fw; 2314 const char *filename = "dvb-netup-altera-01.fw"; 2315 char *action = "configure"; 2316 static struct netup_card_info cinfo; 2317 struct altera_config netup_config = { 2318 .dev = dev, 2319 .action = action, 2320 .jtag_io = netup_jtag_io, 2321 }; 2322 2323 netup_initialize(dev); 2324 2325 netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo); 2326 if (netup_card_rev) 2327 cinfo.rev = netup_card_rev; 2328 2329 switch (cinfo.rev) { 2330 case 0x4: 2331 filename = "dvb-netup-altera-04.fw"; 2332 break; 2333 default: 2334 filename = "dvb-netup-altera-01.fw"; 2335 break; 2336 } 2337 pr_info("NetUP card rev=0x%x fw_filename=%s\n", 2338 cinfo.rev, filename); 2339 2340 ret = request_firmware(&fw, filename, &dev->pci->dev); 2341 if (ret != 0) 2342 pr_err("did not find the firmware file. (%s) Please see linux/Documentation/dvb/ for more details on firmware-problems.", 2343 filename); 2344 else 2345 altera_init(&netup_config, fw); 2346 2347 release_firmware(fw); 2348 break; 2349 } 2350 } 2351 } 2352