1 /* 2 * Driver for the Conexant CX23885 PCIe bridge 3 * 4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * 15 * GNU General Public License for more details. 16 */ 17 18 #include <linux/init.h> 19 #include <linux/module.h> 20 #include <linux/pci.h> 21 #include <linux/delay.h> 22 #include <media/cx25840.h> 23 #include <linux/firmware.h> 24 #include <misc/altera.h> 25 26 #include "cx23885.h" 27 #include "tuner-xc2028.h" 28 #include "netup-eeprom.h" 29 #include "netup-init.h" 30 #include "altera-ci.h" 31 #include "xc4000.h" 32 #include "xc5000.h" 33 #include "cx23888-ir.h" 34 35 static unsigned int netup_card_rev = 4; 36 module_param(netup_card_rev, int, 0644); 37 MODULE_PARM_DESC(netup_card_rev, 38 "NetUP Dual DVB-T/C CI card revision"); 39 static unsigned int enable_885_ir; 40 module_param(enable_885_ir, int, 0644); 41 MODULE_PARM_DESC(enable_885_ir, 42 "Enable integrated IR controller for supported\n" 43 "\t\t CX2388[57] boards that are wired for it:\n" 44 "\t\t\tHVR-1250 (reported safe)\n" 45 "\t\t\tTerraTec Cinergy T PCIe Dual (not well tested, appears to be safe)\n" 46 "\t\t\tTeVii S470 (reported unsafe)\n" 47 "\t\t This can cause an interrupt storm with some cards.\n" 48 "\t\t Default: 0 [Disabled]"); 49 50 /* ------------------------------------------------------------------ */ 51 /* board config info */ 52 53 struct cx23885_board cx23885_boards[] = { 54 [CX23885_BOARD_UNKNOWN] = { 55 .name = "UNKNOWN/GENERIC", 56 /* Ensure safe default for unknown boards */ 57 .clk_freq = 0, 58 .input = {{ 59 .type = CX23885_VMUX_COMPOSITE1, 60 .vmux = 0, 61 }, { 62 .type = CX23885_VMUX_COMPOSITE2, 63 .vmux = 1, 64 }, { 65 .type = CX23885_VMUX_COMPOSITE3, 66 .vmux = 2, 67 }, { 68 .type = CX23885_VMUX_COMPOSITE4, 69 .vmux = 3, 70 } }, 71 }, 72 [CX23885_BOARD_HAUPPAUGE_HVR1800lp] = { 73 .name = "Hauppauge WinTV-HVR1800lp", 74 .portc = CX23885_MPEG_DVB, 75 .input = {{ 76 .type = CX23885_VMUX_TELEVISION, 77 .vmux = 0, 78 .gpio0 = 0xff00, 79 }, { 80 .type = CX23885_VMUX_DEBUG, 81 .vmux = 0, 82 .gpio0 = 0xff01, 83 }, { 84 .type = CX23885_VMUX_COMPOSITE1, 85 .vmux = 1, 86 .gpio0 = 0xff02, 87 }, { 88 .type = CX23885_VMUX_SVIDEO, 89 .vmux = 2, 90 .gpio0 = 0xff02, 91 } }, 92 }, 93 [CX23885_BOARD_HAUPPAUGE_HVR1800] = { 94 .name = "Hauppauge WinTV-HVR1800", 95 .porta = CX23885_ANALOG_VIDEO, 96 .portb = CX23885_MPEG_ENCODER, 97 .portc = CX23885_MPEG_DVB, 98 .tuner_type = TUNER_PHILIPS_TDA8290, 99 .tuner_addr = 0x42, /* 0x84 >> 1 */ 100 .tuner_bus = 1, 101 .input = {{ 102 .type = CX23885_VMUX_TELEVISION, 103 .vmux = CX25840_VIN7_CH3 | 104 CX25840_VIN5_CH2 | 105 CX25840_VIN2_CH1, 106 .amux = CX25840_AUDIO8, 107 .gpio0 = 0, 108 }, { 109 .type = CX23885_VMUX_COMPOSITE1, 110 .vmux = CX25840_VIN7_CH3 | 111 CX25840_VIN4_CH2 | 112 CX25840_VIN6_CH1, 113 .amux = CX25840_AUDIO7, 114 .gpio0 = 0, 115 }, { 116 .type = CX23885_VMUX_SVIDEO, 117 .vmux = CX25840_VIN7_CH3 | 118 CX25840_VIN4_CH2 | 119 CX25840_VIN8_CH1 | 120 CX25840_SVIDEO_ON, 121 .amux = CX25840_AUDIO7, 122 .gpio0 = 0, 123 } }, 124 }, 125 [CX23885_BOARD_HAUPPAUGE_HVR1250] = { 126 .name = "Hauppauge WinTV-HVR1250", 127 .porta = CX23885_ANALOG_VIDEO, 128 .portc = CX23885_MPEG_DVB, 129 #ifdef MT2131_NO_ANALOG_SUPPORT_YET 130 .tuner_type = TUNER_PHILIPS_TDA8290, 131 .tuner_addr = 0x42, /* 0x84 >> 1 */ 132 .tuner_bus = 1, 133 #endif 134 .force_bff = 1, 135 .input = {{ 136 #ifdef MT2131_NO_ANALOG_SUPPORT_YET 137 .type = CX23885_VMUX_TELEVISION, 138 .vmux = CX25840_VIN7_CH3 | 139 CX25840_VIN5_CH2 | 140 CX25840_VIN2_CH1, 141 .amux = CX25840_AUDIO8, 142 .gpio0 = 0xff00, 143 }, { 144 #endif 145 .type = CX23885_VMUX_COMPOSITE1, 146 .vmux = CX25840_VIN7_CH3 | 147 CX25840_VIN4_CH2 | 148 CX25840_VIN6_CH1, 149 .amux = CX25840_AUDIO7, 150 .gpio0 = 0xff02, 151 }, { 152 .type = CX23885_VMUX_SVIDEO, 153 .vmux = CX25840_VIN7_CH3 | 154 CX25840_VIN4_CH2 | 155 CX25840_VIN8_CH1 | 156 CX25840_SVIDEO_ON, 157 .amux = CX25840_AUDIO7, 158 .gpio0 = 0xff02, 159 } }, 160 }, 161 [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = { 162 .name = "DViCO FusionHDTV5 Express", 163 .portb = CX23885_MPEG_DVB, 164 }, 165 [CX23885_BOARD_HAUPPAUGE_HVR1500Q] = { 166 .name = "Hauppauge WinTV-HVR1500Q", 167 .portc = CX23885_MPEG_DVB, 168 }, 169 [CX23885_BOARD_HAUPPAUGE_HVR1500] = { 170 .name = "Hauppauge WinTV-HVR1500", 171 .porta = CX23885_ANALOG_VIDEO, 172 .portc = CX23885_MPEG_DVB, 173 .tuner_type = TUNER_XC2028, 174 .tuner_addr = 0x61, /* 0xc2 >> 1 */ 175 .input = {{ 176 .type = CX23885_VMUX_TELEVISION, 177 .vmux = CX25840_VIN7_CH3 | 178 CX25840_VIN5_CH2 | 179 CX25840_VIN2_CH1, 180 .gpio0 = 0, 181 }, { 182 .type = CX23885_VMUX_COMPOSITE1, 183 .vmux = CX25840_VIN7_CH3 | 184 CX25840_VIN4_CH2 | 185 CX25840_VIN6_CH1, 186 .gpio0 = 0, 187 }, { 188 .type = CX23885_VMUX_SVIDEO, 189 .vmux = CX25840_VIN7_CH3 | 190 CX25840_VIN4_CH2 | 191 CX25840_VIN8_CH1 | 192 CX25840_SVIDEO_ON, 193 .gpio0 = 0, 194 } }, 195 }, 196 [CX23885_BOARD_HAUPPAUGE_HVR1200] = { 197 .name = "Hauppauge WinTV-HVR1200", 198 .portc = CX23885_MPEG_DVB, 199 }, 200 [CX23885_BOARD_HAUPPAUGE_HVR1700] = { 201 .name = "Hauppauge WinTV-HVR1700", 202 .portc = CX23885_MPEG_DVB, 203 }, 204 [CX23885_BOARD_HAUPPAUGE_HVR1400] = { 205 .name = "Hauppauge WinTV-HVR1400", 206 .portc = CX23885_MPEG_DVB, 207 }, 208 [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = { 209 .name = "DViCO FusionHDTV7 Dual Express", 210 .portb = CX23885_MPEG_DVB, 211 .portc = CX23885_MPEG_DVB, 212 }, 213 [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = { 214 .name = "DViCO FusionHDTV DVB-T Dual Express", 215 .portb = CX23885_MPEG_DVB, 216 .portc = CX23885_MPEG_DVB, 217 }, 218 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = { 219 .name = "Leadtek Winfast PxDVR3200 H", 220 .portc = CX23885_MPEG_DVB, 221 }, 222 [CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200] = { 223 .name = "Leadtek Winfast PxPVR2200", 224 .porta = CX23885_ANALOG_VIDEO, 225 .tuner_type = TUNER_XC2028, 226 .tuner_addr = 0x61, 227 .tuner_bus = 1, 228 .input = {{ 229 .type = CX23885_VMUX_TELEVISION, 230 .vmux = CX25840_VIN2_CH1 | 231 CX25840_VIN5_CH2, 232 .amux = CX25840_AUDIO8, 233 .gpio0 = 0x704040, 234 }, { 235 .type = CX23885_VMUX_COMPOSITE1, 236 .vmux = CX25840_COMPOSITE1, 237 .amux = CX25840_AUDIO7, 238 .gpio0 = 0x704040, 239 }, { 240 .type = CX23885_VMUX_SVIDEO, 241 .vmux = CX25840_SVIDEO_LUMA3 | 242 CX25840_SVIDEO_CHROMA4, 243 .amux = CX25840_AUDIO7, 244 .gpio0 = 0x704040, 245 }, { 246 .type = CX23885_VMUX_COMPONENT, 247 .vmux = CX25840_VIN7_CH1 | 248 CX25840_VIN6_CH2 | 249 CX25840_VIN8_CH3 | 250 CX25840_COMPONENT_ON, 251 .amux = CX25840_AUDIO7, 252 .gpio0 = 0x704040, 253 } }, 254 }, 255 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000] = { 256 .name = "Leadtek Winfast PxDVR3200 H XC4000", 257 .porta = CX23885_ANALOG_VIDEO, 258 .portc = CX23885_MPEG_DVB, 259 .tuner_type = TUNER_XC4000, 260 .tuner_addr = 0x61, 261 .radio_type = UNSET, 262 .radio_addr = ADDR_UNSET, 263 .input = {{ 264 .type = CX23885_VMUX_TELEVISION, 265 .vmux = CX25840_VIN2_CH1 | 266 CX25840_VIN5_CH2 | 267 CX25840_NONE0_CH3, 268 }, { 269 .type = CX23885_VMUX_COMPOSITE1, 270 .vmux = CX25840_COMPOSITE1, 271 }, { 272 .type = CX23885_VMUX_SVIDEO, 273 .vmux = CX25840_SVIDEO_LUMA3 | 274 CX25840_SVIDEO_CHROMA4, 275 }, { 276 .type = CX23885_VMUX_COMPONENT, 277 .vmux = CX25840_VIN7_CH1 | 278 CX25840_VIN6_CH2 | 279 CX25840_VIN8_CH3 | 280 CX25840_COMPONENT_ON, 281 } }, 282 }, 283 [CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = { 284 .name = "Compro VideoMate E650F", 285 .portc = CX23885_MPEG_DVB, 286 }, 287 [CX23885_BOARD_TBS_6920] = { 288 .name = "TurboSight TBS 6920", 289 .portb = CX23885_MPEG_DVB, 290 }, 291 [CX23885_BOARD_TBS_6980] = { 292 .name = "TurboSight TBS 6980", 293 .portb = CX23885_MPEG_DVB, 294 .portc = CX23885_MPEG_DVB, 295 }, 296 [CX23885_BOARD_TBS_6981] = { 297 .name = "TurboSight TBS 6981", 298 .portb = CX23885_MPEG_DVB, 299 .portc = CX23885_MPEG_DVB, 300 }, 301 [CX23885_BOARD_TEVII_S470] = { 302 .name = "TeVii S470", 303 .portb = CX23885_MPEG_DVB, 304 }, 305 [CX23885_BOARD_DVBWORLD_2005] = { 306 .name = "DVBWorld DVB-S2 2005", 307 .portb = CX23885_MPEG_DVB, 308 }, 309 [CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = { 310 .ci_type = 1, 311 .name = "NetUP Dual DVB-S2 CI", 312 .portb = CX23885_MPEG_DVB, 313 .portc = CX23885_MPEG_DVB, 314 }, 315 [CX23885_BOARD_HAUPPAUGE_HVR1270] = { 316 .name = "Hauppauge WinTV-HVR1270", 317 .portc = CX23885_MPEG_DVB, 318 }, 319 [CX23885_BOARD_HAUPPAUGE_HVR1275] = { 320 .name = "Hauppauge WinTV-HVR1275", 321 .portc = CX23885_MPEG_DVB, 322 }, 323 [CX23885_BOARD_HAUPPAUGE_HVR1255] = { 324 .name = "Hauppauge WinTV-HVR1255", 325 .porta = CX23885_ANALOG_VIDEO, 326 .portc = CX23885_MPEG_DVB, 327 .tuner_type = TUNER_ABSENT, 328 .tuner_addr = 0x42, /* 0x84 >> 1 */ 329 .force_bff = 1, 330 .input = {{ 331 .type = CX23885_VMUX_TELEVISION, 332 .vmux = CX25840_VIN7_CH3 | 333 CX25840_VIN5_CH2 | 334 CX25840_VIN2_CH1 | 335 CX25840_DIF_ON, 336 .amux = CX25840_AUDIO8, 337 }, { 338 .type = CX23885_VMUX_COMPOSITE1, 339 .vmux = CX25840_VIN7_CH3 | 340 CX25840_VIN4_CH2 | 341 CX25840_VIN6_CH1, 342 .amux = CX25840_AUDIO7, 343 }, { 344 .type = CX23885_VMUX_SVIDEO, 345 .vmux = CX25840_VIN7_CH3 | 346 CX25840_VIN4_CH2 | 347 CX25840_VIN8_CH1 | 348 CX25840_SVIDEO_ON, 349 .amux = CX25840_AUDIO7, 350 } }, 351 }, 352 [CX23885_BOARD_HAUPPAUGE_HVR1255_22111] = { 353 .name = "Hauppauge WinTV-HVR1255", 354 .porta = CX23885_ANALOG_VIDEO, 355 .portc = CX23885_MPEG_DVB, 356 .tuner_type = TUNER_ABSENT, 357 .tuner_addr = 0x42, /* 0x84 >> 1 */ 358 .force_bff = 1, 359 .input = {{ 360 .type = CX23885_VMUX_TELEVISION, 361 .vmux = CX25840_VIN7_CH3 | 362 CX25840_VIN5_CH2 | 363 CX25840_VIN2_CH1 | 364 CX25840_DIF_ON, 365 .amux = CX25840_AUDIO8, 366 }, { 367 .type = CX23885_VMUX_SVIDEO, 368 .vmux = CX25840_VIN7_CH3 | 369 CX25840_VIN4_CH2 | 370 CX25840_VIN8_CH1 | 371 CX25840_SVIDEO_ON, 372 .amux = CX25840_AUDIO7, 373 } }, 374 }, 375 [CX23885_BOARD_HAUPPAUGE_HVR1210] = { 376 .name = "Hauppauge WinTV-HVR1210", 377 .portc = CX23885_MPEG_DVB, 378 }, 379 [CX23885_BOARD_MYGICA_X8506] = { 380 .name = "Mygica X8506 DMB-TH", 381 .tuner_type = TUNER_XC5000, 382 .tuner_addr = 0x61, 383 .tuner_bus = 1, 384 .porta = CX23885_ANALOG_VIDEO, 385 .portb = CX23885_MPEG_DVB, 386 .input = { 387 { 388 .type = CX23885_VMUX_TELEVISION, 389 .vmux = CX25840_COMPOSITE2, 390 }, 391 { 392 .type = CX23885_VMUX_COMPOSITE1, 393 .vmux = CX25840_COMPOSITE8, 394 }, 395 { 396 .type = CX23885_VMUX_SVIDEO, 397 .vmux = CX25840_SVIDEO_LUMA3 | 398 CX25840_SVIDEO_CHROMA4, 399 }, 400 { 401 .type = CX23885_VMUX_COMPONENT, 402 .vmux = CX25840_COMPONENT_ON | 403 CX25840_VIN1_CH1 | 404 CX25840_VIN6_CH2 | 405 CX25840_VIN7_CH3, 406 }, 407 }, 408 }, 409 [CX23885_BOARD_MAGICPRO_PROHDTVE2] = { 410 .name = "Magic-Pro ProHDTV Extreme 2", 411 .tuner_type = TUNER_XC5000, 412 .tuner_addr = 0x61, 413 .tuner_bus = 1, 414 .porta = CX23885_ANALOG_VIDEO, 415 .portb = CX23885_MPEG_DVB, 416 .input = { 417 { 418 .type = CX23885_VMUX_TELEVISION, 419 .vmux = CX25840_COMPOSITE2, 420 }, 421 { 422 .type = CX23885_VMUX_COMPOSITE1, 423 .vmux = CX25840_COMPOSITE8, 424 }, 425 { 426 .type = CX23885_VMUX_SVIDEO, 427 .vmux = CX25840_SVIDEO_LUMA3 | 428 CX25840_SVIDEO_CHROMA4, 429 }, 430 { 431 .type = CX23885_VMUX_COMPONENT, 432 .vmux = CX25840_COMPONENT_ON | 433 CX25840_VIN1_CH1 | 434 CX25840_VIN6_CH2 | 435 CX25840_VIN7_CH3, 436 }, 437 }, 438 }, 439 [CX23885_BOARD_HAUPPAUGE_HVR1850] = { 440 .name = "Hauppauge WinTV-HVR1850", 441 .porta = CX23885_ANALOG_VIDEO, 442 .portb = CX23885_MPEG_ENCODER, 443 .portc = CX23885_MPEG_DVB, 444 .tuner_type = TUNER_ABSENT, 445 .tuner_addr = 0x42, /* 0x84 >> 1 */ 446 .force_bff = 1, 447 .input = {{ 448 .type = CX23885_VMUX_TELEVISION, 449 .vmux = CX25840_VIN7_CH3 | 450 CX25840_VIN5_CH2 | 451 CX25840_VIN2_CH1 | 452 CX25840_DIF_ON, 453 .amux = CX25840_AUDIO8, 454 }, { 455 .type = CX23885_VMUX_COMPOSITE1, 456 .vmux = CX25840_VIN7_CH3 | 457 CX25840_VIN4_CH2 | 458 CX25840_VIN6_CH1, 459 .amux = CX25840_AUDIO7, 460 }, { 461 .type = CX23885_VMUX_SVIDEO, 462 .vmux = CX25840_VIN7_CH3 | 463 CX25840_VIN4_CH2 | 464 CX25840_VIN8_CH1 | 465 CX25840_SVIDEO_ON, 466 .amux = CX25840_AUDIO7, 467 } }, 468 }, 469 [CX23885_BOARD_COMPRO_VIDEOMATE_E800] = { 470 .name = "Compro VideoMate E800", 471 .portc = CX23885_MPEG_DVB, 472 }, 473 [CX23885_BOARD_HAUPPAUGE_HVR1290] = { 474 .name = "Hauppauge WinTV-HVR1290", 475 .portc = CX23885_MPEG_DVB, 476 }, 477 [CX23885_BOARD_MYGICA_X8558PRO] = { 478 .name = "Mygica X8558 PRO DMB-TH", 479 .portb = CX23885_MPEG_DVB, 480 .portc = CX23885_MPEG_DVB, 481 }, 482 [CX23885_BOARD_LEADTEK_WINFAST_PXTV1200] = { 483 .name = "LEADTEK WinFast PxTV1200", 484 .porta = CX23885_ANALOG_VIDEO, 485 .tuner_type = TUNER_XC2028, 486 .tuner_addr = 0x61, 487 .tuner_bus = 1, 488 .input = {{ 489 .type = CX23885_VMUX_TELEVISION, 490 .vmux = CX25840_VIN2_CH1 | 491 CX25840_VIN5_CH2 | 492 CX25840_NONE0_CH3, 493 }, { 494 .type = CX23885_VMUX_COMPOSITE1, 495 .vmux = CX25840_COMPOSITE1, 496 }, { 497 .type = CX23885_VMUX_SVIDEO, 498 .vmux = CX25840_SVIDEO_LUMA3 | 499 CX25840_SVIDEO_CHROMA4, 500 }, { 501 .type = CX23885_VMUX_COMPONENT, 502 .vmux = CX25840_VIN7_CH1 | 503 CX25840_VIN6_CH2 | 504 CX25840_VIN8_CH3 | 505 CX25840_COMPONENT_ON, 506 } }, 507 }, 508 [CX23885_BOARD_GOTVIEW_X5_3D_HYBRID] = { 509 .name = "GoTView X5 3D Hybrid", 510 .tuner_type = TUNER_XC5000, 511 .tuner_addr = 0x64, 512 .tuner_bus = 1, 513 .porta = CX23885_ANALOG_VIDEO, 514 .portb = CX23885_MPEG_DVB, 515 .input = {{ 516 .type = CX23885_VMUX_TELEVISION, 517 .vmux = CX25840_VIN2_CH1 | 518 CX25840_VIN5_CH2, 519 .gpio0 = 0x02, 520 }, { 521 .type = CX23885_VMUX_COMPOSITE1, 522 .vmux = CX23885_VMUX_COMPOSITE1, 523 }, { 524 .type = CX23885_VMUX_SVIDEO, 525 .vmux = CX25840_SVIDEO_LUMA3 | 526 CX25840_SVIDEO_CHROMA4, 527 } }, 528 }, 529 [CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF] = { 530 .ci_type = 2, 531 .name = "NetUP Dual DVB-T/C-CI RF", 532 .porta = CX23885_ANALOG_VIDEO, 533 .portb = CX23885_MPEG_DVB, 534 .portc = CX23885_MPEG_DVB, 535 .num_fds_portb = 2, 536 .num_fds_portc = 2, 537 .tuner_type = TUNER_XC5000, 538 .tuner_addr = 0x64, 539 .input = { { 540 .type = CX23885_VMUX_TELEVISION, 541 .vmux = CX25840_COMPOSITE1, 542 } }, 543 }, 544 [CX23885_BOARD_MPX885] = { 545 .name = "MPX-885", 546 .porta = CX23885_ANALOG_VIDEO, 547 .input = {{ 548 .type = CX23885_VMUX_COMPOSITE1, 549 .vmux = CX25840_COMPOSITE1, 550 .amux = CX25840_AUDIO6, 551 .gpio0 = 0, 552 }, { 553 .type = CX23885_VMUX_COMPOSITE2, 554 .vmux = CX25840_COMPOSITE2, 555 .amux = CX25840_AUDIO6, 556 .gpio0 = 0, 557 }, { 558 .type = CX23885_VMUX_COMPOSITE3, 559 .vmux = CX25840_COMPOSITE3, 560 .amux = CX25840_AUDIO7, 561 .gpio0 = 0, 562 }, { 563 .type = CX23885_VMUX_COMPOSITE4, 564 .vmux = CX25840_COMPOSITE4, 565 .amux = CX25840_AUDIO7, 566 .gpio0 = 0, 567 } }, 568 }, 569 [CX23885_BOARD_MYGICA_X8507] = { 570 .name = "Mygica X8502/X8507 ISDB-T", 571 .tuner_type = TUNER_XC5000, 572 .tuner_addr = 0x61, 573 .tuner_bus = 1, 574 .porta = CX23885_ANALOG_VIDEO, 575 .portb = CX23885_MPEG_DVB, 576 .input = { 577 { 578 .type = CX23885_VMUX_TELEVISION, 579 .vmux = CX25840_COMPOSITE2, 580 .amux = CX25840_AUDIO8, 581 }, 582 { 583 .type = CX23885_VMUX_COMPOSITE1, 584 .vmux = CX25840_COMPOSITE8, 585 .amux = CX25840_AUDIO7, 586 }, 587 { 588 .type = CX23885_VMUX_SVIDEO, 589 .vmux = CX25840_SVIDEO_LUMA3 | 590 CX25840_SVIDEO_CHROMA4, 591 .amux = CX25840_AUDIO7, 592 }, 593 { 594 .type = CX23885_VMUX_COMPONENT, 595 .vmux = CX25840_COMPONENT_ON | 596 CX25840_VIN1_CH1 | 597 CX25840_VIN6_CH2 | 598 CX25840_VIN7_CH3, 599 .amux = CX25840_AUDIO7, 600 }, 601 }, 602 }, 603 [CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL] = { 604 .name = "TerraTec Cinergy T PCIe Dual", 605 .portb = CX23885_MPEG_DVB, 606 .portc = CX23885_MPEG_DVB, 607 }, 608 [CX23885_BOARD_TEVII_S471] = { 609 .name = "TeVii S471", 610 .portb = CX23885_MPEG_DVB, 611 }, 612 [CX23885_BOARD_PROF_8000] = { 613 .name = "Prof Revolution DVB-S2 8000", 614 .portb = CX23885_MPEG_DVB, 615 }, 616 [CX23885_BOARD_HAUPPAUGE_HVR4400] = { 617 .name = "Hauppauge WinTV-HVR4400/HVR5500", 618 .porta = CX23885_ANALOG_VIDEO, 619 .portb = CX23885_MPEG_DVB, 620 .portc = CX23885_MPEG_DVB, 621 .tuner_type = TUNER_NXP_TDA18271, 622 .tuner_addr = 0x60, /* 0xc0 >> 1 */ 623 .tuner_bus = 1, 624 }, 625 [CX23885_BOARD_HAUPPAUGE_STARBURST] = { 626 .name = "Hauppauge WinTV Starburst", 627 .portb = CX23885_MPEG_DVB, 628 }, 629 [CX23885_BOARD_AVERMEDIA_HC81R] = { 630 .name = "AVerTV Hybrid Express Slim HC81R", 631 .tuner_type = TUNER_XC2028, 632 .tuner_addr = 0x61, /* 0xc2 >> 1 */ 633 .tuner_bus = 1, 634 .porta = CX23885_ANALOG_VIDEO, 635 .input = {{ 636 .type = CX23885_VMUX_TELEVISION, 637 .vmux = CX25840_VIN2_CH1 | 638 CX25840_VIN5_CH2 | 639 CX25840_NONE0_CH3 | 640 CX25840_NONE1_CH3, 641 .amux = CX25840_AUDIO8, 642 }, { 643 .type = CX23885_VMUX_SVIDEO, 644 .vmux = CX25840_VIN8_CH1 | 645 CX25840_NONE_CH2 | 646 CX25840_VIN7_CH3 | 647 CX25840_SVIDEO_ON, 648 .amux = CX25840_AUDIO6, 649 }, { 650 .type = CX23885_VMUX_COMPONENT, 651 .vmux = CX25840_VIN1_CH1 | 652 CX25840_NONE_CH2 | 653 CX25840_NONE0_CH3 | 654 CX25840_NONE1_CH3, 655 .amux = CX25840_AUDIO6, 656 } }, 657 }, 658 [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2] = { 659 .name = "DViCO FusionHDTV DVB-T Dual Express2", 660 .portb = CX23885_MPEG_DVB, 661 .portc = CX23885_MPEG_DVB, 662 }, 663 [CX23885_BOARD_HAUPPAUGE_IMPACTVCBE] = { 664 .name = "Hauppauge ImpactVCB-e", 665 .tuner_type = TUNER_ABSENT, 666 .porta = CX23885_ANALOG_VIDEO, 667 .input = {{ 668 .type = CX23885_VMUX_COMPOSITE1, 669 .vmux = CX25840_VIN7_CH3 | 670 CX25840_VIN4_CH2 | 671 CX25840_VIN6_CH1, 672 .amux = CX25840_AUDIO7, 673 }, { 674 .type = CX23885_VMUX_SVIDEO, 675 .vmux = CX25840_VIN7_CH3 | 676 CX25840_VIN4_CH2 | 677 CX25840_VIN8_CH1 | 678 CX25840_SVIDEO_ON, 679 .amux = CX25840_AUDIO7, 680 } }, 681 }, 682 [CX23885_BOARD_DVBSKY_T9580] = { 683 .name = "DVBSky T9580", 684 .portb = CX23885_MPEG_DVB, 685 .portc = CX23885_MPEG_DVB, 686 }, 687 [CX23885_BOARD_DVBSKY_T980C] = { 688 .name = "DVBSky T980C", 689 .portb = CX23885_MPEG_DVB, 690 }, 691 [CX23885_BOARD_DVBSKY_S950C] = { 692 .name = "DVBSky S950C", 693 .portb = CX23885_MPEG_DVB, 694 }, 695 [CX23885_BOARD_TT_CT2_4500_CI] = { 696 .name = "Technotrend TT-budget CT2-4500 CI", 697 .portb = CX23885_MPEG_DVB, 698 }, 699 [CX23885_BOARD_DVBSKY_S950] = { 700 .name = "DVBSky S950", 701 .portb = CX23885_MPEG_DVB, 702 }, 703 [CX23885_BOARD_DVBSKY_S952] = { 704 .name = "DVBSky S952", 705 .portb = CX23885_MPEG_DVB, 706 .portc = CX23885_MPEG_DVB, 707 }, 708 [CX23885_BOARD_DVBSKY_T982] = { 709 .name = "DVBSky T982", 710 .portb = CX23885_MPEG_DVB, 711 .portc = CX23885_MPEG_DVB, 712 }, 713 }; 714 const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards); 715 716 /* ------------------------------------------------------------------ */ 717 /* PCI subsystem IDs */ 718 719 struct cx23885_subid cx23885_subids[] = { 720 { 721 .subvendor = 0x0070, 722 .subdevice = 0x3400, 723 .card = CX23885_BOARD_UNKNOWN, 724 }, { 725 .subvendor = 0x0070, 726 .subdevice = 0x7600, 727 .card = CX23885_BOARD_HAUPPAUGE_HVR1800lp, 728 }, { 729 .subvendor = 0x0070, 730 .subdevice = 0x7800, 731 .card = CX23885_BOARD_HAUPPAUGE_HVR1800, 732 }, { 733 .subvendor = 0x0070, 734 .subdevice = 0x7801, 735 .card = CX23885_BOARD_HAUPPAUGE_HVR1800, 736 }, { 737 .subvendor = 0x0070, 738 .subdevice = 0x7809, 739 .card = CX23885_BOARD_HAUPPAUGE_HVR1800, 740 }, { 741 .subvendor = 0x0070, 742 .subdevice = 0x7911, 743 .card = CX23885_BOARD_HAUPPAUGE_HVR1250, 744 }, { 745 .subvendor = 0x18ac, 746 .subdevice = 0xd500, 747 .card = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP, 748 }, { 749 .subvendor = 0x0070, 750 .subdevice = 0x7790, 751 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q, 752 }, { 753 .subvendor = 0x0070, 754 .subdevice = 0x7797, 755 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q, 756 }, { 757 .subvendor = 0x0070, 758 .subdevice = 0x7710, 759 .card = CX23885_BOARD_HAUPPAUGE_HVR1500, 760 }, { 761 .subvendor = 0x0070, 762 .subdevice = 0x7717, 763 .card = CX23885_BOARD_HAUPPAUGE_HVR1500, 764 }, { 765 .subvendor = 0x0070, 766 .subdevice = 0x71d1, 767 .card = CX23885_BOARD_HAUPPAUGE_HVR1200, 768 }, { 769 .subvendor = 0x0070, 770 .subdevice = 0x71d3, 771 .card = CX23885_BOARD_HAUPPAUGE_HVR1200, 772 }, { 773 .subvendor = 0x0070, 774 .subdevice = 0x8101, 775 .card = CX23885_BOARD_HAUPPAUGE_HVR1700, 776 }, { 777 .subvendor = 0x0070, 778 .subdevice = 0x8010, 779 .card = CX23885_BOARD_HAUPPAUGE_HVR1400, 780 }, { 781 .subvendor = 0x18ac, 782 .subdevice = 0xd618, 783 .card = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP, 784 }, { 785 .subvendor = 0x18ac, 786 .subdevice = 0xdb78, 787 .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP, 788 }, { 789 .subvendor = 0x107d, 790 .subdevice = 0x6681, 791 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H, 792 }, { 793 .subvendor = 0x107d, 794 .subdevice = 0x6f21, 795 .card = CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200, 796 }, { 797 .subvendor = 0x107d, 798 .subdevice = 0x6f39, 799 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000, 800 }, { 801 .subvendor = 0x185b, 802 .subdevice = 0xe800, 803 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E650F, 804 }, { 805 .subvendor = 0x6920, 806 .subdevice = 0x8888, 807 .card = CX23885_BOARD_TBS_6920, 808 }, { 809 .subvendor = 0x6980, 810 .subdevice = 0x8888, 811 .card = CX23885_BOARD_TBS_6980, 812 }, { 813 .subvendor = 0x6981, 814 .subdevice = 0x8888, 815 .card = CX23885_BOARD_TBS_6981, 816 }, { 817 .subvendor = 0xd470, 818 .subdevice = 0x9022, 819 .card = CX23885_BOARD_TEVII_S470, 820 }, { 821 .subvendor = 0x0001, 822 .subdevice = 0x2005, 823 .card = CX23885_BOARD_DVBWORLD_2005, 824 }, { 825 .subvendor = 0x1b55, 826 .subdevice = 0x2a2c, 827 .card = CX23885_BOARD_NETUP_DUAL_DVBS2_CI, 828 }, { 829 .subvendor = 0x0070, 830 .subdevice = 0x2211, 831 .card = CX23885_BOARD_HAUPPAUGE_HVR1270, 832 }, { 833 .subvendor = 0x0070, 834 .subdevice = 0x2215, 835 .card = CX23885_BOARD_HAUPPAUGE_HVR1275, 836 }, { 837 .subvendor = 0x0070, 838 .subdevice = 0x221d, 839 .card = CX23885_BOARD_HAUPPAUGE_HVR1275, 840 }, { 841 .subvendor = 0x0070, 842 .subdevice = 0x2251, 843 .card = CX23885_BOARD_HAUPPAUGE_HVR1255, 844 }, { 845 .subvendor = 0x0070, 846 .subdevice = 0x2259, 847 .card = CX23885_BOARD_HAUPPAUGE_HVR1255_22111, 848 }, { 849 .subvendor = 0x0070, 850 .subdevice = 0x2291, 851 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, 852 }, { 853 .subvendor = 0x0070, 854 .subdevice = 0x2295, 855 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, 856 }, { 857 .subvendor = 0x0070, 858 .subdevice = 0x2299, 859 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, 860 }, { 861 .subvendor = 0x0070, 862 .subdevice = 0x229d, 863 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */ 864 }, { 865 .subvendor = 0x0070, 866 .subdevice = 0x22f0, 867 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, 868 }, { 869 .subvendor = 0x0070, 870 .subdevice = 0x22f1, 871 .card = CX23885_BOARD_HAUPPAUGE_HVR1255, 872 }, { 873 .subvendor = 0x0070, 874 .subdevice = 0x22f2, 875 .card = CX23885_BOARD_HAUPPAUGE_HVR1275, 876 }, { 877 .subvendor = 0x0070, 878 .subdevice = 0x22f3, 879 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */ 880 }, { 881 .subvendor = 0x0070, 882 .subdevice = 0x22f4, 883 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, 884 }, { 885 .subvendor = 0x0070, 886 .subdevice = 0x22f5, 887 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */ 888 }, { 889 .subvendor = 0x14f1, 890 .subdevice = 0x8651, 891 .card = CX23885_BOARD_MYGICA_X8506, 892 }, { 893 .subvendor = 0x14f1, 894 .subdevice = 0x8657, 895 .card = CX23885_BOARD_MAGICPRO_PROHDTVE2, 896 }, { 897 .subvendor = 0x0070, 898 .subdevice = 0x8541, 899 .card = CX23885_BOARD_HAUPPAUGE_HVR1850, 900 }, { 901 .subvendor = 0x1858, 902 .subdevice = 0xe800, 903 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E800, 904 }, { 905 .subvendor = 0x0070, 906 .subdevice = 0x8551, 907 .card = CX23885_BOARD_HAUPPAUGE_HVR1290, 908 }, { 909 .subvendor = 0x14f1, 910 .subdevice = 0x8578, 911 .card = CX23885_BOARD_MYGICA_X8558PRO, 912 }, { 913 .subvendor = 0x107d, 914 .subdevice = 0x6f22, 915 .card = CX23885_BOARD_LEADTEK_WINFAST_PXTV1200, 916 }, { 917 .subvendor = 0x5654, 918 .subdevice = 0x2390, 919 .card = CX23885_BOARD_GOTVIEW_X5_3D_HYBRID, 920 }, { 921 .subvendor = 0x1b55, 922 .subdevice = 0xe2e4, 923 .card = CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF, 924 }, { 925 .subvendor = 0x14f1, 926 .subdevice = 0x8502, 927 .card = CX23885_BOARD_MYGICA_X8507, 928 }, { 929 .subvendor = 0x153b, 930 .subdevice = 0x117e, 931 .card = CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL, 932 }, { 933 .subvendor = 0xd471, 934 .subdevice = 0x9022, 935 .card = CX23885_BOARD_TEVII_S471, 936 }, { 937 .subvendor = 0x8000, 938 .subdevice = 0x3034, 939 .card = CX23885_BOARD_PROF_8000, 940 }, { 941 .subvendor = 0x0070, 942 .subdevice = 0xc108, 943 .card = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-4400 (Model 121xxx, Hybrid DVB-T/S2, IR) */ 944 }, { 945 .subvendor = 0x0070, 946 .subdevice = 0xc138, 947 .card = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-5500 (Model 121xxx, Hybrid DVB-T/C/S2, IR) */ 948 }, { 949 .subvendor = 0x0070, 950 .subdevice = 0xc12a, 951 .card = CX23885_BOARD_HAUPPAUGE_STARBURST, /* Hauppauge WinTV Starburst (Model 121x00, DVB-S2, IR) */ 952 }, { 953 .subvendor = 0x0070, 954 .subdevice = 0xc1f8, 955 .card = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-5500 (Model 121xxx, Hybrid DVB-T/C/S2, IR) */ 956 }, { 957 .subvendor = 0x1461, 958 .subdevice = 0xd939, 959 .card = CX23885_BOARD_AVERMEDIA_HC81R, 960 }, { 961 .subvendor = 0x0070, 962 .subdevice = 0x7133, 963 .card = CX23885_BOARD_HAUPPAUGE_IMPACTVCBE, 964 }, { 965 .subvendor = 0x18ac, 966 .subdevice = 0xdb98, 967 .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2, 968 }, { 969 .subvendor = 0x4254, 970 .subdevice = 0x9580, 971 .card = CX23885_BOARD_DVBSKY_T9580, 972 }, { 973 .subvendor = 0x4254, 974 .subdevice = 0x980c, 975 .card = CX23885_BOARD_DVBSKY_T980C, 976 }, { 977 .subvendor = 0x4254, 978 .subdevice = 0x950c, 979 .card = CX23885_BOARD_DVBSKY_S950C, 980 }, { 981 .subvendor = 0x13c2, 982 .subdevice = 0x3013, 983 .card = CX23885_BOARD_TT_CT2_4500_CI, 984 }, { 985 .subvendor = 0x4254, 986 .subdevice = 0x0950, 987 .card = CX23885_BOARD_DVBSKY_S950, 988 }, { 989 .subvendor = 0x4254, 990 .subdevice = 0x0952, 991 .card = CX23885_BOARD_DVBSKY_S952, 992 }, { 993 .subvendor = 0x4254, 994 .subdevice = 0x0982, 995 .card = CX23885_BOARD_DVBSKY_T982, 996 }, 997 }; 998 const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids); 999 1000 void cx23885_card_list(struct cx23885_dev *dev) 1001 { 1002 int i; 1003 1004 if (0 == dev->pci->subsystem_vendor && 1005 0 == dev->pci->subsystem_device) { 1006 printk(KERN_INFO 1007 "%s: Board has no valid PCIe Subsystem ID and can't\n" 1008 "%s: be autodetected. Pass card=<n> insmod option\n" 1009 "%s: to workaround that. Redirect complaints to the\n" 1010 "%s: vendor of the TV card. Best regards,\n" 1011 "%s: -- tux\n", 1012 dev->name, dev->name, dev->name, dev->name, dev->name); 1013 } else { 1014 printk(KERN_INFO 1015 "%s: Your board isn't known (yet) to the driver.\n" 1016 "%s: Try to pick one of the existing card configs via\n" 1017 "%s: card=<n> insmod option. Updating to the latest\n" 1018 "%s: version might help as well.\n", 1019 dev->name, dev->name, dev->name, dev->name); 1020 } 1021 printk(KERN_INFO "%s: Here is a list of valid choices for the card=<n> insmod option:\n", 1022 dev->name); 1023 for (i = 0; i < cx23885_bcount; i++) 1024 printk(KERN_INFO "%s: card=%d -> %s\n", 1025 dev->name, i, cx23885_boards[i].name); 1026 } 1027 1028 static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data) 1029 { 1030 struct tveeprom tv; 1031 1032 tveeprom_hauppauge_analog(&dev->i2c_bus[0].i2c_client, &tv, 1033 eeprom_data); 1034 1035 /* Make sure we support the board model */ 1036 switch (tv.model) { 1037 case 22001: 1038 /* WinTV-HVR1270 (PCIe, Retail, half height) 1039 * ATSC/QAM and basic analog, IR Blast */ 1040 case 22009: 1041 /* WinTV-HVR1210 (PCIe, Retail, half height) 1042 * DVB-T and basic analog, IR Blast */ 1043 case 22011: 1044 /* WinTV-HVR1270 (PCIe, Retail, half height) 1045 * ATSC/QAM and basic analog, IR Recv */ 1046 case 22019: 1047 /* WinTV-HVR1210 (PCIe, Retail, half height) 1048 * DVB-T and basic analog, IR Recv */ 1049 case 22021: 1050 /* WinTV-HVR1275 (PCIe, Retail, half height) 1051 * ATSC/QAM and basic analog, IR Recv */ 1052 case 22029: 1053 /* WinTV-HVR1210 (PCIe, Retail, half height) 1054 * DVB-T and basic analog, IR Recv */ 1055 case 22101: 1056 /* WinTV-HVR1270 (PCIe, Retail, full height) 1057 * ATSC/QAM and basic analog, IR Blast */ 1058 case 22109: 1059 /* WinTV-HVR1210 (PCIe, Retail, full height) 1060 * DVB-T and basic analog, IR Blast */ 1061 case 22111: 1062 /* WinTV-HVR1270 (PCIe, Retail, full height) 1063 * ATSC/QAM and basic analog, IR Recv */ 1064 case 22119: 1065 /* WinTV-HVR1210 (PCIe, Retail, full height) 1066 * DVB-T and basic analog, IR Recv */ 1067 case 22121: 1068 /* WinTV-HVR1275 (PCIe, Retail, full height) 1069 * ATSC/QAM and basic analog, IR Recv */ 1070 case 22129: 1071 /* WinTV-HVR1210 (PCIe, Retail, full height) 1072 * DVB-T and basic analog, IR Recv */ 1073 case 71009: 1074 /* WinTV-HVR1200 (PCIe, Retail, full height) 1075 * DVB-T and basic analog */ 1076 case 71100: 1077 /* WinTV-ImpactVCB-e (PCIe, Retail, half height) 1078 * Basic analog */ 1079 case 71359: 1080 /* WinTV-HVR1200 (PCIe, OEM, half height) 1081 * DVB-T and basic analog */ 1082 case 71439: 1083 /* WinTV-HVR1200 (PCIe, OEM, half height) 1084 * DVB-T and basic analog */ 1085 case 71449: 1086 /* WinTV-HVR1200 (PCIe, OEM, full height) 1087 * DVB-T and basic analog */ 1088 case 71939: 1089 /* WinTV-HVR1200 (PCIe, OEM, half height) 1090 * DVB-T and basic analog */ 1091 case 71949: 1092 /* WinTV-HVR1200 (PCIe, OEM, full height) 1093 * DVB-T and basic analog */ 1094 case 71959: 1095 /* WinTV-HVR1200 (PCIe, OEM, full height) 1096 * DVB-T and basic analog */ 1097 case 71979: 1098 /* WinTV-HVR1200 (PCIe, OEM, half height) 1099 * DVB-T and basic analog */ 1100 case 71999: 1101 /* WinTV-HVR1200 (PCIe, OEM, full height) 1102 * DVB-T and basic analog */ 1103 case 76601: 1104 /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual 1105 channel ATSC and MPEG2 HW Encoder */ 1106 case 77001: 1107 /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC 1108 and Basic analog */ 1109 case 77011: 1110 /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC 1111 and Basic analog */ 1112 case 77041: 1113 /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM 1114 and Basic analog */ 1115 case 77051: 1116 /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM 1117 and Basic analog */ 1118 case 78011: 1119 /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM, 1120 Dual channel ATSC and MPEG2 HW Encoder */ 1121 case 78501: 1122 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM, 1123 Dual channel ATSC and MPEG2 HW Encoder */ 1124 case 78521: 1125 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM, 1126 Dual channel ATSC and MPEG2 HW Encoder */ 1127 case 78531: 1128 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM, 1129 Dual channel ATSC and MPEG2 HW Encoder */ 1130 case 78631: 1131 /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM, 1132 Dual channel ATSC and MPEG2 HW Encoder */ 1133 case 79001: 1134 /* WinTV-HVR1250 (PCIe, Retail, IR, full height, 1135 ATSC and Basic analog */ 1136 case 79101: 1137 /* WinTV-HVR1250 (PCIe, Retail, IR, half height, 1138 ATSC and Basic analog */ 1139 case 79501: 1140 /* WinTV-HVR1250 (PCIe, No IR, half height, 1141 ATSC [at least] and Basic analog) */ 1142 case 79561: 1143 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height, 1144 ATSC and Basic analog */ 1145 case 79571: 1146 /* WinTV-HVR1250 (PCIe, OEM, No IR, full height, 1147 ATSC and Basic analog */ 1148 case 79671: 1149 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height, 1150 ATSC and Basic analog */ 1151 case 80019: 1152 /* WinTV-HVR1400 (Express Card, Retail, IR, 1153 * DVB-T and Basic analog */ 1154 case 81509: 1155 /* WinTV-HVR1700 (PCIe, OEM, No IR, half height) 1156 * DVB-T and MPEG2 HW Encoder */ 1157 case 81519: 1158 /* WinTV-HVR1700 (PCIe, OEM, No IR, full height) 1159 * DVB-T and MPEG2 HW Encoder */ 1160 break; 1161 case 85021: 1162 /* WinTV-HVR1850 (PCIe, Retail, 3.5mm in, IR, FM, 1163 Dual channel ATSC and MPEG2 HW Encoder */ 1164 break; 1165 case 85721: 1166 /* WinTV-HVR1290 (PCIe, OEM, RCA in, IR, 1167 Dual channel ATSC and Basic analog */ 1168 break; 1169 default: 1170 printk(KERN_WARNING "%s: warning: " 1171 "unknown hauppauge model #%d\n", 1172 dev->name, tv.model); 1173 break; 1174 } 1175 1176 printk(KERN_INFO "%s: hauppauge eeprom: model=%d\n", 1177 dev->name, tv.model); 1178 } 1179 1180 /* Some TBS cards require initing a chip using a bitbanged SPI attached 1181 to the cx23885 gpio's. If this chip doesn't get init'ed the demod 1182 doesn't respond to any command. */ 1183 static void tbs_card_init(struct cx23885_dev *dev) 1184 { 1185 int i; 1186 const u8 buf[] = { 1187 0xe0, 0x06, 0x66, 0x33, 0x65, 1188 0x01, 0x17, 0x06, 0xde}; 1189 1190 switch (dev->board) { 1191 case CX23885_BOARD_TBS_6980: 1192 case CX23885_BOARD_TBS_6981: 1193 cx_set(GP0_IO, 0x00070007); 1194 usleep_range(1000, 10000); 1195 cx_clear(GP0_IO, 2); 1196 usleep_range(1000, 10000); 1197 for (i = 0; i < 9 * 8; i++) { 1198 cx_clear(GP0_IO, 7); 1199 usleep_range(1000, 10000); 1200 cx_set(GP0_IO, 1201 ((buf[i >> 3] >> (7 - (i & 7))) & 1) | 4); 1202 usleep_range(1000, 10000); 1203 } 1204 cx_set(GP0_IO, 7); 1205 break; 1206 } 1207 } 1208 1209 int cx23885_tuner_callback(void *priv, int component, int command, int arg) 1210 { 1211 struct cx23885_tsport *port = priv; 1212 struct cx23885_dev *dev = port->dev; 1213 u32 bitmask = 0; 1214 1215 if ((command == XC2028_RESET_CLK) || (command == XC2028_I2C_FLUSH)) 1216 return 0; 1217 1218 if (command != 0) { 1219 printk(KERN_ERR "%s(): Unknown command 0x%x.\n", 1220 __func__, command); 1221 return -EINVAL; 1222 } 1223 1224 switch (dev->board) { 1225 case CX23885_BOARD_HAUPPAUGE_HVR1400: 1226 case CX23885_BOARD_HAUPPAUGE_HVR1500: 1227 case CX23885_BOARD_HAUPPAUGE_HVR1500Q: 1228 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H: 1229 case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200: 1230 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000: 1231 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F: 1232 case CX23885_BOARD_COMPRO_VIDEOMATE_E800: 1233 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200: 1234 /* Tuner Reset Command */ 1235 bitmask = 0x04; 1236 break; 1237 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP: 1238 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: 1239 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2: 1240 /* Two identical tuners on two different i2c buses, 1241 * we need to reset the correct gpio. */ 1242 if (port->nr == 1) 1243 bitmask = 0x01; 1244 else if (port->nr == 2) 1245 bitmask = 0x04; 1246 break; 1247 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID: 1248 /* Tuner Reset Command */ 1249 bitmask = 0x02; 1250 break; 1251 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: 1252 altera_ci_tuner_reset(dev, port->nr); 1253 break; 1254 case CX23885_BOARD_AVERMEDIA_HC81R: 1255 /* XC3028L Reset Command */ 1256 bitmask = 1 << 2; 1257 break; 1258 } 1259 1260 if (bitmask) { 1261 /* Drive the tuner into reset and back out */ 1262 cx_clear(GP0_IO, bitmask); 1263 mdelay(200); 1264 cx_set(GP0_IO, bitmask); 1265 } 1266 1267 return 0; 1268 } 1269 1270 void cx23885_gpio_setup(struct cx23885_dev *dev) 1271 { 1272 switch (dev->board) { 1273 case CX23885_BOARD_HAUPPAUGE_HVR1250: 1274 /* GPIO-0 cx24227 demodulator reset */ 1275 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */ 1276 break; 1277 case CX23885_BOARD_HAUPPAUGE_HVR1500: 1278 /* GPIO-0 cx24227 demodulator */ 1279 /* GPIO-2 xc3028 tuner */ 1280 1281 /* Put the parts into reset */ 1282 cx_set(GP0_IO, 0x00050000); 1283 cx_clear(GP0_IO, 0x00000005); 1284 msleep(5); 1285 1286 /* Bring the parts out of reset */ 1287 cx_set(GP0_IO, 0x00050005); 1288 break; 1289 case CX23885_BOARD_HAUPPAUGE_HVR1500Q: 1290 /* GPIO-0 cx24227 demodulator reset */ 1291 /* GPIO-2 xc5000 tuner reset */ 1292 cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */ 1293 break; 1294 case CX23885_BOARD_HAUPPAUGE_HVR1800: 1295 /* GPIO-0 656_CLK */ 1296 /* GPIO-1 656_D0 */ 1297 /* GPIO-2 8295A Reset */ 1298 /* GPIO-3-10 cx23417 data0-7 */ 1299 /* GPIO-11-14 cx23417 addr0-3 */ 1300 /* GPIO-15-18 cx23417 READY, CS, RD, WR */ 1301 /* GPIO-19 IR_RX */ 1302 1303 /* CX23417 GPIO's */ 1304 /* EIO15 Zilog Reset */ 1305 /* EIO14 S5H1409/CX24227 Reset */ 1306 mc417_gpio_enable(dev, GPIO_15 | GPIO_14, 1); 1307 1308 /* Put the demod into reset and protect the eeprom */ 1309 mc417_gpio_clear(dev, GPIO_15 | GPIO_14); 1310 mdelay(100); 1311 1312 /* Bring the demod and blaster out of reset */ 1313 mc417_gpio_set(dev, GPIO_15 | GPIO_14); 1314 mdelay(100); 1315 1316 /* Force the TDA8295A into reset and back */ 1317 cx23885_gpio_enable(dev, GPIO_2, 1); 1318 cx23885_gpio_set(dev, GPIO_2); 1319 mdelay(20); 1320 cx23885_gpio_clear(dev, GPIO_2); 1321 mdelay(20); 1322 cx23885_gpio_set(dev, GPIO_2); 1323 mdelay(20); 1324 break; 1325 case CX23885_BOARD_HAUPPAUGE_HVR1200: 1326 /* GPIO-0 tda10048 demodulator reset */ 1327 /* GPIO-2 tda18271 tuner reset */ 1328 1329 /* Put the parts into reset and back */ 1330 cx_set(GP0_IO, 0x00050000); 1331 mdelay(20); 1332 cx_clear(GP0_IO, 0x00000005); 1333 mdelay(20); 1334 cx_set(GP0_IO, 0x00050005); 1335 break; 1336 case CX23885_BOARD_HAUPPAUGE_HVR1700: 1337 /* GPIO-0 TDA10048 demodulator reset */ 1338 /* GPIO-2 TDA8295A Reset */ 1339 /* GPIO-3-10 cx23417 data0-7 */ 1340 /* GPIO-11-14 cx23417 addr0-3 */ 1341 /* GPIO-15-18 cx23417 READY, CS, RD, WR */ 1342 1343 /* The following GPIO's are on the interna AVCore (cx25840) */ 1344 /* GPIO-19 IR_RX */ 1345 /* GPIO-20 IR_TX 416/DVBT Select */ 1346 /* GPIO-21 IIS DAT */ 1347 /* GPIO-22 IIS WCLK */ 1348 /* GPIO-23 IIS BCLK */ 1349 1350 /* Put the parts into reset and back */ 1351 cx_set(GP0_IO, 0x00050000); 1352 mdelay(20); 1353 cx_clear(GP0_IO, 0x00000005); 1354 mdelay(20); 1355 cx_set(GP0_IO, 0x00050005); 1356 break; 1357 case CX23885_BOARD_HAUPPAUGE_HVR1400: 1358 /* GPIO-0 Dibcom7000p demodulator reset */ 1359 /* GPIO-2 xc3028L tuner reset */ 1360 /* GPIO-13 LED */ 1361 1362 /* Put the parts into reset and back */ 1363 cx_set(GP0_IO, 0x00050000); 1364 mdelay(20); 1365 cx_clear(GP0_IO, 0x00000005); 1366 mdelay(20); 1367 cx_set(GP0_IO, 0x00050005); 1368 break; 1369 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP: 1370 /* GPIO-0 xc5000 tuner reset i2c bus 0 */ 1371 /* GPIO-1 s5h1409 demod reset i2c bus 0 */ 1372 /* GPIO-2 xc5000 tuner reset i2c bus 1 */ 1373 /* GPIO-3 s5h1409 demod reset i2c bus 0 */ 1374 1375 /* Put the parts into reset and back */ 1376 cx_set(GP0_IO, 0x000f0000); 1377 mdelay(20); 1378 cx_clear(GP0_IO, 0x0000000f); 1379 mdelay(20); 1380 cx_set(GP0_IO, 0x000f000f); 1381 break; 1382 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: 1383 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2: 1384 /* GPIO-0 portb xc3028 reset */ 1385 /* GPIO-1 portb zl10353 reset */ 1386 /* GPIO-2 portc xc3028 reset */ 1387 /* GPIO-3 portc zl10353 reset */ 1388 1389 /* Put the parts into reset and back */ 1390 cx_set(GP0_IO, 0x000f0000); 1391 mdelay(20); 1392 cx_clear(GP0_IO, 0x0000000f); 1393 mdelay(20); 1394 cx_set(GP0_IO, 0x000f000f); 1395 break; 1396 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H: 1397 case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200: 1398 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000: 1399 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F: 1400 case CX23885_BOARD_COMPRO_VIDEOMATE_E800: 1401 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200: 1402 /* GPIO-2 xc3028 tuner reset */ 1403 1404 /* The following GPIO's are on the internal AVCore (cx25840) */ 1405 /* GPIO-? zl10353 demod reset */ 1406 1407 /* Put the parts into reset and back */ 1408 cx_set(GP0_IO, 0x00040000); 1409 mdelay(20); 1410 cx_clear(GP0_IO, 0x00000004); 1411 mdelay(20); 1412 cx_set(GP0_IO, 0x00040004); 1413 break; 1414 case CX23885_BOARD_TBS_6920: 1415 case CX23885_BOARD_TBS_6980: 1416 case CX23885_BOARD_TBS_6981: 1417 case CX23885_BOARD_PROF_8000: 1418 cx_write(MC417_CTL, 0x00000036); 1419 cx_write(MC417_OEN, 0x00001000); 1420 cx_set(MC417_RWD, 0x00000002); 1421 mdelay(200); 1422 cx_clear(MC417_RWD, 0x00000800); 1423 mdelay(200); 1424 cx_set(MC417_RWD, 0x00000800); 1425 mdelay(200); 1426 break; 1427 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: 1428 /* GPIO-0 INTA from CiMax1 1429 GPIO-1 INTB from CiMax2 1430 GPIO-2 reset chips 1431 GPIO-3 to GPIO-10 data/addr for CA 1432 GPIO-11 ~CS0 to CiMax1 1433 GPIO-12 ~CS1 to CiMax2 1434 GPIO-13 ADL0 load LSB addr 1435 GPIO-14 ADL1 load MSB addr 1436 GPIO-15 ~RDY from CiMax 1437 GPIO-17 ~RD to CiMax 1438 GPIO-18 ~WR to CiMax 1439 */ 1440 cx_set(GP0_IO, 0x00040000); /* GPIO as out */ 1441 /* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */ 1442 cx_clear(GP0_IO, 0x00030004); 1443 mdelay(100);/* reset delay */ 1444 cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */ 1445 cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */ 1446 /* GPIO-15 IN as ~ACK, rest as OUT */ 1447 cx_write(MC417_OEN, 0x00001000); 1448 /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */ 1449 cx_write(MC417_RWD, 0x0000c300); 1450 /* enable irq */ 1451 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/ 1452 break; 1453 case CX23885_BOARD_HAUPPAUGE_HVR1270: 1454 case CX23885_BOARD_HAUPPAUGE_HVR1275: 1455 case CX23885_BOARD_HAUPPAUGE_HVR1255: 1456 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111: 1457 case CX23885_BOARD_HAUPPAUGE_HVR1210: 1458 /* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */ 1459 /* GPIO-6 I2C Gate which can isolate the demod from the bus */ 1460 /* GPIO-9 Demod reset */ 1461 1462 /* Put the parts into reset and back */ 1463 cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1); 1464 cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5); 1465 cx23885_gpio_clear(dev, GPIO_9); 1466 mdelay(20); 1467 cx23885_gpio_set(dev, GPIO_9); 1468 break; 1469 case CX23885_BOARD_MYGICA_X8506: 1470 case CX23885_BOARD_MAGICPRO_PROHDTVE2: 1471 case CX23885_BOARD_MYGICA_X8507: 1472 /* GPIO-0 (0)Analog / (1)Digital TV */ 1473 /* GPIO-1 reset XC5000 */ 1474 /* GPIO-2 demod reset */ 1475 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1 | GPIO_2, 1); 1476 cx23885_gpio_clear(dev, GPIO_1 | GPIO_2); 1477 mdelay(100); 1478 cx23885_gpio_set(dev, GPIO_0 | GPIO_1 | GPIO_2); 1479 mdelay(100); 1480 break; 1481 case CX23885_BOARD_MYGICA_X8558PRO: 1482 /* GPIO-0 reset first ATBM8830 */ 1483 /* GPIO-1 reset second ATBM8830 */ 1484 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1); 1485 cx23885_gpio_clear(dev, GPIO_0 | GPIO_1); 1486 mdelay(100); 1487 cx23885_gpio_set(dev, GPIO_0 | GPIO_1); 1488 mdelay(100); 1489 break; 1490 case CX23885_BOARD_HAUPPAUGE_HVR1850: 1491 case CX23885_BOARD_HAUPPAUGE_HVR1290: 1492 /* GPIO-0 656_CLK */ 1493 /* GPIO-1 656_D0 */ 1494 /* GPIO-2 Wake# */ 1495 /* GPIO-3-10 cx23417 data0-7 */ 1496 /* GPIO-11-14 cx23417 addr0-3 */ 1497 /* GPIO-15-18 cx23417 READY, CS, RD, WR */ 1498 /* GPIO-19 IR_RX */ 1499 /* GPIO-20 C_IR_TX */ 1500 /* GPIO-21 I2S DAT */ 1501 /* GPIO-22 I2S WCLK */ 1502 /* GPIO-23 I2S BCLK */ 1503 /* ALT GPIO: EXP GPIO LATCH */ 1504 1505 /* CX23417 GPIO's */ 1506 /* GPIO-14 S5H1411/CX24228 Reset */ 1507 /* GPIO-13 EEPROM write protect */ 1508 mc417_gpio_enable(dev, GPIO_14 | GPIO_13, 1); 1509 1510 /* Put the demod into reset and protect the eeprom */ 1511 mc417_gpio_clear(dev, GPIO_14 | GPIO_13); 1512 mdelay(100); 1513 1514 /* Bring the demod out of reset */ 1515 mc417_gpio_set(dev, GPIO_14); 1516 mdelay(100); 1517 1518 /* CX24228 GPIO */ 1519 /* Connected to IF / Mux */ 1520 break; 1521 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID: 1522 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */ 1523 break; 1524 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: 1525 /* GPIO-0 ~INT in 1526 GPIO-1 TMS out 1527 GPIO-2 ~reset chips out 1528 GPIO-3 to GPIO-10 data/addr for CA in/out 1529 GPIO-11 ~CS out 1530 GPIO-12 ADDR out 1531 GPIO-13 ~WR out 1532 GPIO-14 ~RD out 1533 GPIO-15 ~RDY in 1534 GPIO-16 TCK out 1535 GPIO-17 TDO in 1536 GPIO-18 TDI out 1537 */ 1538 cx_set(GP0_IO, 0x00060000); /* GPIO-1,2 as out */ 1539 /* GPIO-0 as INT, reset & TMS low */ 1540 cx_clear(GP0_IO, 0x00010006); 1541 mdelay(100);/* reset delay */ 1542 cx_set(GP0_IO, 0x00000004); /* reset high */ 1543 cx_write(MC417_CTL, 0x00000037);/* enable GPIO-3..18 pins */ 1544 /* GPIO-17 is TDO in, GPIO-15 is ~RDY in, rest is out */ 1545 cx_write(MC417_OEN, 0x00005000); 1546 /* ~RD, ~WR high; ADDR low; ~CS high */ 1547 cx_write(MC417_RWD, 0x00000d00); 1548 /* enable irq */ 1549 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/ 1550 break; 1551 case CX23885_BOARD_HAUPPAUGE_HVR4400: 1552 case CX23885_BOARD_HAUPPAUGE_STARBURST: 1553 /* GPIO-8 tda10071 demod reset */ 1554 /* GPIO-9 si2165 demod reset (only HVR4400/HVR5500)*/ 1555 1556 /* Put the parts into reset and back */ 1557 cx23885_gpio_enable(dev, GPIO_8 | GPIO_9, 1); 1558 1559 cx23885_gpio_clear(dev, GPIO_8 | GPIO_9); 1560 mdelay(100); 1561 cx23885_gpio_set(dev, GPIO_8 | GPIO_9); 1562 mdelay(100); 1563 1564 break; 1565 case CX23885_BOARD_AVERMEDIA_HC81R: 1566 cx_clear(MC417_CTL, 1); 1567 /* GPIO-0,1,2 setup direction as output */ 1568 cx_set(GP0_IO, 0x00070000); 1569 mdelay(10); 1570 /* AF9013 demod reset */ 1571 cx_set(GP0_IO, 0x00010001); 1572 mdelay(10); 1573 cx_clear(GP0_IO, 0x00010001); 1574 mdelay(10); 1575 cx_set(GP0_IO, 0x00010001); 1576 mdelay(10); 1577 /* demod tune? */ 1578 cx_clear(GP0_IO, 0x00030003); 1579 mdelay(10); 1580 cx_set(GP0_IO, 0x00020002); 1581 mdelay(10); 1582 cx_set(GP0_IO, 0x00010001); 1583 mdelay(10); 1584 cx_clear(GP0_IO, 0x00020002); 1585 /* XC3028L tuner reset */ 1586 cx_set(GP0_IO, 0x00040004); 1587 cx_clear(GP0_IO, 0x00040004); 1588 cx_set(GP0_IO, 0x00040004); 1589 mdelay(60); 1590 break; 1591 case CX23885_BOARD_DVBSKY_T9580: 1592 case CX23885_BOARD_DVBSKY_S952: 1593 case CX23885_BOARD_DVBSKY_T982: 1594 /* enable GPIO3-18 pins */ 1595 cx_write(MC417_CTL, 0x00000037); 1596 cx23885_gpio_enable(dev, GPIO_2 | GPIO_11, 1); 1597 cx23885_gpio_clear(dev, GPIO_2 | GPIO_11); 1598 mdelay(100); 1599 cx23885_gpio_set(dev, GPIO_2 | GPIO_11); 1600 break; 1601 case CX23885_BOARD_DVBSKY_T980C: 1602 case CX23885_BOARD_DVBSKY_S950C: 1603 case CX23885_BOARD_TT_CT2_4500_CI: 1604 /* 1605 * GPIO-0 INTA from CiMax, input 1606 * GPIO-1 reset CiMax, output, high active 1607 * GPIO-2 reset demod, output, low active 1608 * GPIO-3 to GPIO-10 data/addr for CAM 1609 * GPIO-11 ~CS0 to CiMax1 1610 * GPIO-12 ~CS1 to CiMax2 1611 * GPIO-13 ADL0 load LSB addr 1612 * GPIO-14 ADL1 load MSB addr 1613 * GPIO-15 ~RDY from CiMax 1614 * GPIO-17 ~RD to CiMax 1615 * GPIO-18 ~WR to CiMax 1616 */ 1617 1618 cx_set(GP0_IO, 0x00060002); /* GPIO 1/2 as output */ 1619 cx_clear(GP0_IO, 0x00010004); /* GPIO 0 as input */ 1620 mdelay(100); /* reset delay */ 1621 cx_set(GP0_IO, 0x00060004); /* GPIO as out, reset high */ 1622 cx_clear(GP0_IO, 0x00010002); 1623 cx_write(MC417_CTL, 0x00000037); /* enable GPIO3-18 pins */ 1624 1625 /* GPIO-15 IN as ~ACK, rest as OUT */ 1626 cx_write(MC417_OEN, 0x00001000); 1627 1628 /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */ 1629 cx_write(MC417_RWD, 0x0000c300); 1630 1631 /* enable irq */ 1632 cx_write(GPIO_ISM, 0x00000000); /* INTERRUPTS active low */ 1633 break; 1634 case CX23885_BOARD_DVBSKY_S950: 1635 cx23885_gpio_enable(dev, GPIO_2, 1); 1636 cx23885_gpio_clear(dev, GPIO_2); 1637 msleep(100); 1638 cx23885_gpio_set(dev, GPIO_2); 1639 break; 1640 } 1641 } 1642 1643 int cx23885_ir_init(struct cx23885_dev *dev) 1644 { 1645 static struct v4l2_subdev_io_pin_config ir_rxtx_pin_cfg[] = { 1646 { 1647 .flags = V4L2_SUBDEV_IO_PIN_INPUT, 1648 .pin = CX23885_PIN_IR_RX_GPIO19, 1649 .function = CX23885_PAD_IR_RX, 1650 .value = 0, 1651 .strength = CX25840_PIN_DRIVE_MEDIUM, 1652 }, { 1653 .flags = V4L2_SUBDEV_IO_PIN_OUTPUT, 1654 .pin = CX23885_PIN_IR_TX_GPIO20, 1655 .function = CX23885_PAD_IR_TX, 1656 .value = 0, 1657 .strength = CX25840_PIN_DRIVE_MEDIUM, 1658 } 1659 }; 1660 const size_t ir_rxtx_pin_cfg_count = ARRAY_SIZE(ir_rxtx_pin_cfg); 1661 1662 static struct v4l2_subdev_io_pin_config ir_rx_pin_cfg[] = { 1663 { 1664 .flags = V4L2_SUBDEV_IO_PIN_INPUT, 1665 .pin = CX23885_PIN_IR_RX_GPIO19, 1666 .function = CX23885_PAD_IR_RX, 1667 .value = 0, 1668 .strength = CX25840_PIN_DRIVE_MEDIUM, 1669 } 1670 }; 1671 const size_t ir_rx_pin_cfg_count = ARRAY_SIZE(ir_rx_pin_cfg); 1672 1673 struct v4l2_subdev_ir_parameters params; 1674 int ret = 0; 1675 switch (dev->board) { 1676 case CX23885_BOARD_HAUPPAUGE_HVR1500: 1677 case CX23885_BOARD_HAUPPAUGE_HVR1500Q: 1678 case CX23885_BOARD_HAUPPAUGE_HVR1800: 1679 case CX23885_BOARD_HAUPPAUGE_HVR1200: 1680 case CX23885_BOARD_HAUPPAUGE_HVR1400: 1681 case CX23885_BOARD_HAUPPAUGE_HVR1275: 1682 case CX23885_BOARD_HAUPPAUGE_HVR1255: 1683 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111: 1684 case CX23885_BOARD_HAUPPAUGE_HVR1210: 1685 /* FIXME: Implement me */ 1686 break; 1687 case CX23885_BOARD_HAUPPAUGE_HVR1270: 1688 ret = cx23888_ir_probe(dev); 1689 if (ret) 1690 break; 1691 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR); 1692 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config, 1693 ir_rx_pin_cfg_count, ir_rx_pin_cfg); 1694 break; 1695 case CX23885_BOARD_HAUPPAUGE_HVR1850: 1696 case CX23885_BOARD_HAUPPAUGE_HVR1290: 1697 ret = cx23888_ir_probe(dev); 1698 if (ret) 1699 break; 1700 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR); 1701 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config, 1702 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg); 1703 /* 1704 * For these boards we need to invert the Tx output via the 1705 * IR controller to have the LED off while idle 1706 */ 1707 v4l2_subdev_call(dev->sd_ir, ir, tx_g_parameters, ¶ms); 1708 params.enable = false; 1709 params.shutdown = false; 1710 params.invert_level = true; 1711 v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, ¶ms); 1712 params.shutdown = true; 1713 v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, ¶ms); 1714 break; 1715 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL: 1716 case CX23885_BOARD_TEVII_S470: 1717 case CX23885_BOARD_MYGICA_X8507: 1718 case CX23885_BOARD_TBS_6980: 1719 case CX23885_BOARD_TBS_6981: 1720 case CX23885_BOARD_DVBSKY_T9580: 1721 case CX23885_BOARD_DVBSKY_T980C: 1722 case CX23885_BOARD_DVBSKY_S950C: 1723 case CX23885_BOARD_TT_CT2_4500_CI: 1724 case CX23885_BOARD_DVBSKY_S950: 1725 case CX23885_BOARD_DVBSKY_S952: 1726 case CX23885_BOARD_DVBSKY_T982: 1727 if (!enable_885_ir) 1728 break; 1729 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE); 1730 if (dev->sd_ir == NULL) { 1731 ret = -ENODEV; 1732 break; 1733 } 1734 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config, 1735 ir_rx_pin_cfg_count, ir_rx_pin_cfg); 1736 break; 1737 case CX23885_BOARD_HAUPPAUGE_HVR1250: 1738 if (!enable_885_ir) 1739 break; 1740 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE); 1741 if (dev->sd_ir == NULL) { 1742 ret = -ENODEV; 1743 break; 1744 } 1745 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config, 1746 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg); 1747 break; 1748 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: 1749 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2: 1750 request_module("ir-kbd-i2c"); 1751 break; 1752 } 1753 1754 return ret; 1755 } 1756 1757 void cx23885_ir_fini(struct cx23885_dev *dev) 1758 { 1759 switch (dev->board) { 1760 case CX23885_BOARD_HAUPPAUGE_HVR1270: 1761 case CX23885_BOARD_HAUPPAUGE_HVR1850: 1762 case CX23885_BOARD_HAUPPAUGE_HVR1290: 1763 cx23885_irq_remove(dev, PCI_MSK_IR); 1764 cx23888_ir_remove(dev); 1765 dev->sd_ir = NULL; 1766 break; 1767 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL: 1768 case CX23885_BOARD_TEVII_S470: 1769 case CX23885_BOARD_HAUPPAUGE_HVR1250: 1770 case CX23885_BOARD_MYGICA_X8507: 1771 case CX23885_BOARD_TBS_6980: 1772 case CX23885_BOARD_TBS_6981: 1773 case CX23885_BOARD_DVBSKY_T9580: 1774 case CX23885_BOARD_DVBSKY_T980C: 1775 case CX23885_BOARD_DVBSKY_S950C: 1776 case CX23885_BOARD_TT_CT2_4500_CI: 1777 case CX23885_BOARD_DVBSKY_S950: 1778 case CX23885_BOARD_DVBSKY_S952: 1779 case CX23885_BOARD_DVBSKY_T982: 1780 cx23885_irq_remove(dev, PCI_MSK_AV_CORE); 1781 /* sd_ir is a duplicate pointer to the AV Core, just clear it */ 1782 dev->sd_ir = NULL; 1783 break; 1784 } 1785 } 1786 1787 static int netup_jtag_io(void *device, int tms, int tdi, int read_tdo) 1788 { 1789 int data; 1790 int tdo = 0; 1791 struct cx23885_dev *dev = (struct cx23885_dev *)device; 1792 /*TMS*/ 1793 data = ((cx_read(GP0_IO)) & (~0x00000002)); 1794 data |= (tms ? 0x00020002 : 0x00020000); 1795 cx_write(GP0_IO, data); 1796 1797 /*TDI*/ 1798 data = ((cx_read(MC417_RWD)) & (~0x0000a000)); 1799 data |= (tdi ? 0x00008000 : 0); 1800 cx_write(MC417_RWD, data); 1801 if (read_tdo) 1802 tdo = (data & 0x00004000) ? 1 : 0; /*TDO*/ 1803 1804 cx_write(MC417_RWD, data | 0x00002000); 1805 udelay(1); 1806 /*TCK*/ 1807 cx_write(MC417_RWD, data); 1808 1809 return tdo; 1810 } 1811 1812 void cx23885_ir_pci_int_enable(struct cx23885_dev *dev) 1813 { 1814 switch (dev->board) { 1815 case CX23885_BOARD_HAUPPAUGE_HVR1270: 1816 case CX23885_BOARD_HAUPPAUGE_HVR1850: 1817 case CX23885_BOARD_HAUPPAUGE_HVR1290: 1818 if (dev->sd_ir) 1819 cx23885_irq_add_enable(dev, PCI_MSK_IR); 1820 break; 1821 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL: 1822 case CX23885_BOARD_TEVII_S470: 1823 case CX23885_BOARD_HAUPPAUGE_HVR1250: 1824 case CX23885_BOARD_MYGICA_X8507: 1825 case CX23885_BOARD_TBS_6980: 1826 case CX23885_BOARD_TBS_6981: 1827 case CX23885_BOARD_DVBSKY_T9580: 1828 case CX23885_BOARD_DVBSKY_T980C: 1829 case CX23885_BOARD_DVBSKY_S950C: 1830 case CX23885_BOARD_TT_CT2_4500_CI: 1831 case CX23885_BOARD_DVBSKY_S950: 1832 case CX23885_BOARD_DVBSKY_S952: 1833 case CX23885_BOARD_DVBSKY_T982: 1834 if (dev->sd_ir) 1835 cx23885_irq_add_enable(dev, PCI_MSK_AV_CORE); 1836 break; 1837 } 1838 } 1839 1840 void cx23885_card_setup(struct cx23885_dev *dev) 1841 { 1842 struct cx23885_tsport *ts1 = &dev->ts1; 1843 struct cx23885_tsport *ts2 = &dev->ts2; 1844 1845 static u8 eeprom[256]; 1846 1847 if (dev->i2c_bus[0].i2c_rc == 0) { 1848 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1; 1849 tveeprom_read(&dev->i2c_bus[0].i2c_client, 1850 eeprom, sizeof(eeprom)); 1851 } 1852 1853 switch (dev->board) { 1854 case CX23885_BOARD_HAUPPAUGE_HVR1250: 1855 if (dev->i2c_bus[0].i2c_rc == 0) { 1856 if (eeprom[0x80] != 0x84) 1857 hauppauge_eeprom(dev, eeprom+0xc0); 1858 else 1859 hauppauge_eeprom(dev, eeprom+0x80); 1860 } 1861 break; 1862 case CX23885_BOARD_HAUPPAUGE_HVR1500: 1863 case CX23885_BOARD_HAUPPAUGE_HVR1500Q: 1864 case CX23885_BOARD_HAUPPAUGE_HVR1400: 1865 if (dev->i2c_bus[0].i2c_rc == 0) 1866 hauppauge_eeprom(dev, eeprom+0x80); 1867 break; 1868 case CX23885_BOARD_HAUPPAUGE_HVR1800: 1869 case CX23885_BOARD_HAUPPAUGE_HVR1800lp: 1870 case CX23885_BOARD_HAUPPAUGE_HVR1200: 1871 case CX23885_BOARD_HAUPPAUGE_HVR1700: 1872 case CX23885_BOARD_HAUPPAUGE_HVR1270: 1873 case CX23885_BOARD_HAUPPAUGE_HVR1275: 1874 case CX23885_BOARD_HAUPPAUGE_HVR1255: 1875 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111: 1876 case CX23885_BOARD_HAUPPAUGE_HVR1210: 1877 case CX23885_BOARD_HAUPPAUGE_HVR1850: 1878 case CX23885_BOARD_HAUPPAUGE_HVR1290: 1879 case CX23885_BOARD_HAUPPAUGE_HVR4400: 1880 case CX23885_BOARD_HAUPPAUGE_STARBURST: 1881 case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE: 1882 if (dev->i2c_bus[0].i2c_rc == 0) 1883 hauppauge_eeprom(dev, eeprom+0xc0); 1884 break; 1885 } 1886 1887 switch (dev->board) { 1888 case CX23885_BOARD_AVERMEDIA_HC81R: 1889 /* Defaults for VID B */ 1890 ts1->gen_ctrl_val = 0x4; /* Parallel */ 1891 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 1892 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 1893 /* Defaults for VID C */ 1894 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */ 1895 ts2->gen_ctrl_val = 0x10e; 1896 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 1897 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 1898 break; 1899 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP: 1900 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: 1901 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2: 1902 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 1903 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 1904 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 1905 /* break omitted intentionally */ 1906 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP: 1907 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 1908 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 1909 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 1910 break; 1911 case CX23885_BOARD_HAUPPAUGE_HVR1850: 1912 case CX23885_BOARD_HAUPPAUGE_HVR1800: 1913 /* Defaults for VID B - Analog encoder */ 1914 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */ 1915 ts1->gen_ctrl_val = 0x10e; 1916 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 1917 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 1918 1919 /* APB_TSVALERR_POL (active low)*/ 1920 ts1->vld_misc_val = 0x2000; 1921 ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc); 1922 cx_write(0x130184, 0xc); 1923 1924 /* Defaults for VID C */ 1925 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 1926 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 1927 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 1928 break; 1929 case CX23885_BOARD_TBS_6920: 1930 ts1->gen_ctrl_val = 0x4; /* Parallel */ 1931 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 1932 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 1933 break; 1934 case CX23885_BOARD_TEVII_S470: 1935 case CX23885_BOARD_TEVII_S471: 1936 case CX23885_BOARD_DVBWORLD_2005: 1937 case CX23885_BOARD_PROF_8000: 1938 case CX23885_BOARD_DVBSKY_T980C: 1939 case CX23885_BOARD_DVBSKY_S950C: 1940 case CX23885_BOARD_TT_CT2_4500_CI: 1941 case CX23885_BOARD_DVBSKY_S950: 1942 ts1->gen_ctrl_val = 0x5; /* Parallel */ 1943 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 1944 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 1945 break; 1946 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: 1947 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: 1948 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL: 1949 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 1950 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 1951 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 1952 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 1953 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 1954 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 1955 break; 1956 case CX23885_BOARD_TBS_6980: 1957 case CX23885_BOARD_TBS_6981: 1958 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 1959 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 1960 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 1961 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 1962 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 1963 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 1964 tbs_card_init(dev); 1965 break; 1966 case CX23885_BOARD_MYGICA_X8506: 1967 case CX23885_BOARD_MAGICPRO_PROHDTVE2: 1968 case CX23885_BOARD_MYGICA_X8507: 1969 ts1->gen_ctrl_val = 0x5; /* Parallel */ 1970 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 1971 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 1972 break; 1973 case CX23885_BOARD_MYGICA_X8558PRO: 1974 ts1->gen_ctrl_val = 0x5; /* Parallel */ 1975 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 1976 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 1977 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 1978 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 1979 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 1980 break; 1981 case CX23885_BOARD_HAUPPAUGE_HVR4400: 1982 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 1983 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 1984 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 1985 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 1986 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 1987 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 1988 break; 1989 case CX23885_BOARD_HAUPPAUGE_STARBURST: 1990 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 1991 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 1992 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 1993 break; 1994 case CX23885_BOARD_DVBSKY_T9580: 1995 case CX23885_BOARD_DVBSKY_T982: 1996 ts1->gen_ctrl_val = 0x5; /* Parallel */ 1997 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 1998 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 1999 ts2->gen_ctrl_val = 0x8; /* Serial bus */ 2000 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2001 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2002 break; 2003 case CX23885_BOARD_DVBSKY_S952: 2004 ts1->gen_ctrl_val = 0x5; /* Parallel */ 2005 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2006 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2007 ts2->gen_ctrl_val = 0xe; /* Serial bus */ 2008 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2009 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2010 break; 2011 case CX23885_BOARD_HAUPPAUGE_HVR1250: 2012 case CX23885_BOARD_HAUPPAUGE_HVR1500: 2013 case CX23885_BOARD_HAUPPAUGE_HVR1500Q: 2014 case CX23885_BOARD_HAUPPAUGE_HVR1800lp: 2015 case CX23885_BOARD_HAUPPAUGE_HVR1200: 2016 case CX23885_BOARD_HAUPPAUGE_HVR1700: 2017 case CX23885_BOARD_HAUPPAUGE_HVR1400: 2018 case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE: 2019 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H: 2020 case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200: 2021 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000: 2022 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F: 2023 case CX23885_BOARD_HAUPPAUGE_HVR1270: 2024 case CX23885_BOARD_HAUPPAUGE_HVR1275: 2025 case CX23885_BOARD_HAUPPAUGE_HVR1255: 2026 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111: 2027 case CX23885_BOARD_HAUPPAUGE_HVR1210: 2028 case CX23885_BOARD_COMPRO_VIDEOMATE_E800: 2029 case CX23885_BOARD_HAUPPAUGE_HVR1290: 2030 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID: 2031 default: 2032 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 2033 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2034 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2035 } 2036 2037 /* Certain boards support analog, or require the avcore to be 2038 * loaded, ensure this happens. 2039 */ 2040 switch (dev->board) { 2041 case CX23885_BOARD_TEVII_S470: 2042 /* Currently only enabled for the integrated IR controller */ 2043 if (!enable_885_ir) 2044 break; 2045 case CX23885_BOARD_HAUPPAUGE_HVR1250: 2046 case CX23885_BOARD_HAUPPAUGE_HVR1800: 2047 case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE: 2048 case CX23885_BOARD_HAUPPAUGE_HVR1800lp: 2049 case CX23885_BOARD_HAUPPAUGE_HVR1700: 2050 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H: 2051 case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200: 2052 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000: 2053 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F: 2054 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: 2055 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: 2056 case CX23885_BOARD_COMPRO_VIDEOMATE_E800: 2057 case CX23885_BOARD_HAUPPAUGE_HVR1255: 2058 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111: 2059 case CX23885_BOARD_HAUPPAUGE_HVR1270: 2060 case CX23885_BOARD_HAUPPAUGE_HVR1850: 2061 case CX23885_BOARD_MYGICA_X8506: 2062 case CX23885_BOARD_MAGICPRO_PROHDTVE2: 2063 case CX23885_BOARD_HAUPPAUGE_HVR1290: 2064 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200: 2065 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID: 2066 case CX23885_BOARD_HAUPPAUGE_HVR1500: 2067 case CX23885_BOARD_MPX885: 2068 case CX23885_BOARD_MYGICA_X8507: 2069 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL: 2070 case CX23885_BOARD_AVERMEDIA_HC81R: 2071 case CX23885_BOARD_TBS_6980: 2072 case CX23885_BOARD_TBS_6981: 2073 case CX23885_BOARD_DVBSKY_T9580: 2074 case CX23885_BOARD_DVBSKY_T980C: 2075 case CX23885_BOARD_DVBSKY_S950C: 2076 case CX23885_BOARD_TT_CT2_4500_CI: 2077 case CX23885_BOARD_DVBSKY_S950: 2078 case CX23885_BOARD_DVBSKY_S952: 2079 case CX23885_BOARD_DVBSKY_T982: 2080 dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev, 2081 &dev->i2c_bus[2].i2c_adap, 2082 "cx25840", 0x88 >> 1, NULL); 2083 if (dev->sd_cx25840) { 2084 dev->sd_cx25840->grp_id = CX23885_HW_AV_CORE; 2085 v4l2_subdev_call(dev->sd_cx25840, core, load_fw); 2086 } 2087 break; 2088 } 2089 2090 /* AUX-PLL 27MHz CLK */ 2091 switch (dev->board) { 2092 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: 2093 netup_initialize(dev); 2094 break; 2095 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: { 2096 int ret; 2097 const struct firmware *fw; 2098 const char *filename = "dvb-netup-altera-01.fw"; 2099 char *action = "configure"; 2100 static struct netup_card_info cinfo; 2101 struct altera_config netup_config = { 2102 .dev = dev, 2103 .action = action, 2104 .jtag_io = netup_jtag_io, 2105 }; 2106 2107 netup_initialize(dev); 2108 2109 netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo); 2110 if (netup_card_rev) 2111 cinfo.rev = netup_card_rev; 2112 2113 switch (cinfo.rev) { 2114 case 0x4: 2115 filename = "dvb-netup-altera-04.fw"; 2116 break; 2117 default: 2118 filename = "dvb-netup-altera-01.fw"; 2119 break; 2120 } 2121 printk(KERN_INFO "NetUP card rev=0x%x fw_filename=%s\n", 2122 cinfo.rev, filename); 2123 2124 ret = request_firmware(&fw, filename, &dev->pci->dev); 2125 if (ret != 0) 2126 printk(KERN_ERR "did not find the firmware file. (%s) " 2127 "Please see linux/Documentation/dvb/ for more details " 2128 "on firmware-problems.", filename); 2129 else 2130 altera_init(&netup_config, fw); 2131 2132 release_firmware(fw); 2133 break; 2134 } 2135 } 2136 } 2137