1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Driver for the Conexant CX23885 PCIe bridge 4 * 5 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org> 6 */ 7 8 #include "cx23885.h" 9 10 #include <linux/init.h> 11 #include <linux/module.h> 12 #include <linux/pci.h> 13 #include <linux/delay.h> 14 #include <media/drv-intf/cx25840.h> 15 #include <linux/firmware.h> 16 #include <misc/altera.h> 17 18 #include "tuner-xc2028.h" 19 #include "netup-eeprom.h" 20 #include "netup-init.h" 21 #include "altera-ci.h" 22 #include "xc4000.h" 23 #include "xc5000.h" 24 #include "cx23888-ir.h" 25 26 static unsigned int netup_card_rev = 4; 27 module_param(netup_card_rev, int, 0644); 28 MODULE_PARM_DESC(netup_card_rev, 29 "NetUP Dual DVB-T/C CI card revision"); 30 static unsigned int enable_885_ir; 31 module_param(enable_885_ir, int, 0644); 32 MODULE_PARM_DESC(enable_885_ir, 33 "Enable integrated IR controller for supported\n" 34 "\t\t CX2388[57] boards that are wired for it:\n" 35 "\t\t\tHVR-1250 (reported safe)\n" 36 "\t\t\tTerraTec Cinergy T PCIe Dual (not well tested, appears to be safe)\n" 37 "\t\t\tTeVii S470 (reported unsafe)\n" 38 "\t\t This can cause an interrupt storm with some cards.\n" 39 "\t\t Default: 0 [Disabled]"); 40 41 /* ------------------------------------------------------------------ */ 42 /* board config info */ 43 44 struct cx23885_board cx23885_boards[] = { 45 [CX23885_BOARD_UNKNOWN] = { 46 .name = "UNKNOWN/GENERIC", 47 /* Ensure safe default for unknown boards */ 48 .clk_freq = 0, 49 .input = {{ 50 .type = CX23885_VMUX_COMPOSITE1, 51 .vmux = 0, 52 }, { 53 .type = CX23885_VMUX_COMPOSITE2, 54 .vmux = 1, 55 }, { 56 .type = CX23885_VMUX_COMPOSITE3, 57 .vmux = 2, 58 }, { 59 .type = CX23885_VMUX_COMPOSITE4, 60 .vmux = 3, 61 } }, 62 }, 63 [CX23885_BOARD_HAUPPAUGE_HVR1800lp] = { 64 .name = "Hauppauge WinTV-HVR1800lp", 65 .portc = CX23885_MPEG_DVB, 66 .input = {{ 67 .type = CX23885_VMUX_TELEVISION, 68 .vmux = 0, 69 .gpio0 = 0xff00, 70 }, { 71 .type = CX23885_VMUX_DEBUG, 72 .vmux = 0, 73 .gpio0 = 0xff01, 74 }, { 75 .type = CX23885_VMUX_COMPOSITE1, 76 .vmux = 1, 77 .gpio0 = 0xff02, 78 }, { 79 .type = CX23885_VMUX_SVIDEO, 80 .vmux = 2, 81 .gpio0 = 0xff02, 82 } }, 83 }, 84 [CX23885_BOARD_HAUPPAUGE_HVR1800] = { 85 .name = "Hauppauge WinTV-HVR1800", 86 .porta = CX23885_ANALOG_VIDEO, 87 .portb = CX23885_MPEG_ENCODER, 88 .portc = CX23885_MPEG_DVB, 89 .tuner_type = TUNER_PHILIPS_TDA8290, 90 .tuner_addr = 0x42, /* 0x84 >> 1 */ 91 .tuner_bus = 1, 92 .input = {{ 93 .type = CX23885_VMUX_TELEVISION, 94 .vmux = CX25840_VIN7_CH3 | 95 CX25840_VIN5_CH2 | 96 CX25840_VIN2_CH1, 97 .amux = CX25840_AUDIO8, 98 .gpio0 = 0, 99 }, { 100 .type = CX23885_VMUX_COMPOSITE1, 101 .vmux = CX25840_VIN7_CH3 | 102 CX25840_VIN4_CH2 | 103 CX25840_VIN6_CH1, 104 .amux = CX25840_AUDIO7, 105 .gpio0 = 0, 106 }, { 107 .type = CX23885_VMUX_SVIDEO, 108 .vmux = CX25840_VIN7_CH3 | 109 CX25840_VIN4_CH2 | 110 CX25840_VIN8_CH1 | 111 CX25840_SVIDEO_ON, 112 .amux = CX25840_AUDIO7, 113 .gpio0 = 0, 114 } }, 115 }, 116 [CX23885_BOARD_HAUPPAUGE_HVR1250] = { 117 .name = "Hauppauge WinTV-HVR1250", 118 .porta = CX23885_ANALOG_VIDEO, 119 .portc = CX23885_MPEG_DVB, 120 #ifdef MT2131_NO_ANALOG_SUPPORT_YET 121 .tuner_type = TUNER_PHILIPS_TDA8290, 122 .tuner_addr = 0x42, /* 0x84 >> 1 */ 123 .tuner_bus = 1, 124 #endif 125 .force_bff = 1, 126 .input = {{ 127 #ifdef MT2131_NO_ANALOG_SUPPORT_YET 128 .type = CX23885_VMUX_TELEVISION, 129 .vmux = CX25840_VIN7_CH3 | 130 CX25840_VIN5_CH2 | 131 CX25840_VIN2_CH1, 132 .amux = CX25840_AUDIO8, 133 .gpio0 = 0xff00, 134 }, { 135 #endif 136 .type = CX23885_VMUX_COMPOSITE1, 137 .vmux = CX25840_VIN7_CH3 | 138 CX25840_VIN4_CH2 | 139 CX25840_VIN6_CH1, 140 .amux = CX25840_AUDIO7, 141 .gpio0 = 0xff02, 142 }, { 143 .type = CX23885_VMUX_SVIDEO, 144 .vmux = CX25840_VIN7_CH3 | 145 CX25840_VIN4_CH2 | 146 CX25840_VIN8_CH1 | 147 CX25840_SVIDEO_ON, 148 .amux = CX25840_AUDIO7, 149 .gpio0 = 0xff02, 150 } }, 151 }, 152 [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = { 153 .name = "DViCO FusionHDTV5 Express", 154 .portb = CX23885_MPEG_DVB, 155 }, 156 [CX23885_BOARD_HAUPPAUGE_HVR1500Q] = { 157 .name = "Hauppauge WinTV-HVR1500Q", 158 .portc = CX23885_MPEG_DVB, 159 }, 160 [CX23885_BOARD_HAUPPAUGE_HVR1500] = { 161 .name = "Hauppauge WinTV-HVR1500", 162 .porta = CX23885_ANALOG_VIDEO, 163 .portc = CX23885_MPEG_DVB, 164 .tuner_type = TUNER_XC2028, 165 .tuner_addr = 0x61, /* 0xc2 >> 1 */ 166 .input = {{ 167 .type = CX23885_VMUX_TELEVISION, 168 .vmux = CX25840_VIN7_CH3 | 169 CX25840_VIN5_CH2 | 170 CX25840_VIN2_CH1, 171 .gpio0 = 0, 172 }, { 173 .type = CX23885_VMUX_COMPOSITE1, 174 .vmux = CX25840_VIN7_CH3 | 175 CX25840_VIN4_CH2 | 176 CX25840_VIN6_CH1, 177 .gpio0 = 0, 178 }, { 179 .type = CX23885_VMUX_SVIDEO, 180 .vmux = CX25840_VIN7_CH3 | 181 CX25840_VIN4_CH2 | 182 CX25840_VIN8_CH1 | 183 CX25840_SVIDEO_ON, 184 .gpio0 = 0, 185 } }, 186 }, 187 [CX23885_BOARD_HAUPPAUGE_HVR1200] = { 188 .name = "Hauppauge WinTV-HVR1200", 189 .portc = CX23885_MPEG_DVB, 190 }, 191 [CX23885_BOARD_HAUPPAUGE_HVR1700] = { 192 .name = "Hauppauge WinTV-HVR1700", 193 .portc = CX23885_MPEG_DVB, 194 }, 195 [CX23885_BOARD_HAUPPAUGE_HVR1400] = { 196 .name = "Hauppauge WinTV-HVR1400", 197 .portc = CX23885_MPEG_DVB, 198 }, 199 [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = { 200 .name = "DViCO FusionHDTV7 Dual Express", 201 .portb = CX23885_MPEG_DVB, 202 .portc = CX23885_MPEG_DVB, 203 }, 204 [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = { 205 .name = "DViCO FusionHDTV DVB-T Dual Express", 206 .portb = CX23885_MPEG_DVB, 207 .portc = CX23885_MPEG_DVB, 208 }, 209 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = { 210 .name = "Leadtek Winfast PxDVR3200 H", 211 .portc = CX23885_MPEG_DVB, 212 }, 213 [CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200] = { 214 .name = "Leadtek Winfast PxPVR2200", 215 .porta = CX23885_ANALOG_VIDEO, 216 .tuner_type = TUNER_XC2028, 217 .tuner_addr = 0x61, 218 .tuner_bus = 1, 219 .input = {{ 220 .type = CX23885_VMUX_TELEVISION, 221 .vmux = CX25840_VIN2_CH1 | 222 CX25840_VIN5_CH2, 223 .amux = CX25840_AUDIO8, 224 .gpio0 = 0x704040, 225 }, { 226 .type = CX23885_VMUX_COMPOSITE1, 227 .vmux = CX25840_COMPOSITE1, 228 .amux = CX25840_AUDIO7, 229 .gpio0 = 0x704040, 230 }, { 231 .type = CX23885_VMUX_SVIDEO, 232 .vmux = CX25840_SVIDEO_LUMA3 | 233 CX25840_SVIDEO_CHROMA4, 234 .amux = CX25840_AUDIO7, 235 .gpio0 = 0x704040, 236 }, { 237 .type = CX23885_VMUX_COMPONENT, 238 .vmux = CX25840_VIN7_CH1 | 239 CX25840_VIN6_CH2 | 240 CX25840_VIN8_CH3 | 241 CX25840_COMPONENT_ON, 242 .amux = CX25840_AUDIO7, 243 .gpio0 = 0x704040, 244 } }, 245 }, 246 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000] = { 247 .name = "Leadtek Winfast PxDVR3200 H XC4000", 248 .porta = CX23885_ANALOG_VIDEO, 249 .portc = CX23885_MPEG_DVB, 250 .tuner_type = TUNER_XC4000, 251 .tuner_addr = 0x61, 252 .radio_type = UNSET, 253 .radio_addr = ADDR_UNSET, 254 .input = {{ 255 .type = CX23885_VMUX_TELEVISION, 256 .vmux = CX25840_VIN2_CH1 | 257 CX25840_VIN5_CH2 | 258 CX25840_NONE0_CH3, 259 }, { 260 .type = CX23885_VMUX_COMPOSITE1, 261 .vmux = CX25840_COMPOSITE1, 262 }, { 263 .type = CX23885_VMUX_SVIDEO, 264 .vmux = CX25840_SVIDEO_LUMA3 | 265 CX25840_SVIDEO_CHROMA4, 266 }, { 267 .type = CX23885_VMUX_COMPONENT, 268 .vmux = CX25840_VIN7_CH1 | 269 CX25840_VIN6_CH2 | 270 CX25840_VIN8_CH3 | 271 CX25840_COMPONENT_ON, 272 } }, 273 }, 274 [CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = { 275 .name = "Compro VideoMate E650F", 276 .portc = CX23885_MPEG_DVB, 277 }, 278 [CX23885_BOARD_TBS_6920] = { 279 .name = "TurboSight TBS 6920", 280 .portb = CX23885_MPEG_DVB, 281 }, 282 [CX23885_BOARD_TBS_6980] = { 283 .name = "TurboSight TBS 6980", 284 .portb = CX23885_MPEG_DVB, 285 .portc = CX23885_MPEG_DVB, 286 }, 287 [CX23885_BOARD_TBS_6981] = { 288 .name = "TurboSight TBS 6981", 289 .portb = CX23885_MPEG_DVB, 290 .portc = CX23885_MPEG_DVB, 291 }, 292 [CX23885_BOARD_TEVII_S470] = { 293 .name = "TeVii S470", 294 .portb = CX23885_MPEG_DVB, 295 }, 296 [CX23885_BOARD_DVBWORLD_2005] = { 297 .name = "DVBWorld DVB-S2 2005", 298 .portb = CX23885_MPEG_DVB, 299 }, 300 [CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = { 301 .ci_type = 1, 302 .name = "NetUP Dual DVB-S2 CI", 303 .portb = CX23885_MPEG_DVB, 304 .portc = CX23885_MPEG_DVB, 305 }, 306 [CX23885_BOARD_HAUPPAUGE_HVR1270] = { 307 .name = "Hauppauge WinTV-HVR1270", 308 .portc = CX23885_MPEG_DVB, 309 }, 310 [CX23885_BOARD_HAUPPAUGE_HVR1275] = { 311 .name = "Hauppauge WinTV-HVR1275", 312 .portc = CX23885_MPEG_DVB, 313 }, 314 [CX23885_BOARD_HAUPPAUGE_HVR1255] = { 315 .name = "Hauppauge WinTV-HVR1255", 316 .porta = CX23885_ANALOG_VIDEO, 317 .portc = CX23885_MPEG_DVB, 318 .tuner_type = TUNER_ABSENT, 319 .tuner_addr = 0x42, /* 0x84 >> 1 */ 320 .force_bff = 1, 321 .input = {{ 322 .type = CX23885_VMUX_TELEVISION, 323 .vmux = CX25840_VIN7_CH3 | 324 CX25840_VIN5_CH2 | 325 CX25840_VIN2_CH1 | 326 CX25840_DIF_ON, 327 .amux = CX25840_AUDIO8, 328 }, { 329 .type = CX23885_VMUX_COMPOSITE1, 330 .vmux = CX25840_VIN7_CH3 | 331 CX25840_VIN4_CH2 | 332 CX25840_VIN6_CH1, 333 .amux = CX25840_AUDIO7, 334 }, { 335 .type = CX23885_VMUX_SVIDEO, 336 .vmux = CX25840_VIN7_CH3 | 337 CX25840_VIN4_CH2 | 338 CX25840_VIN8_CH1 | 339 CX25840_SVIDEO_ON, 340 .amux = CX25840_AUDIO7, 341 } }, 342 }, 343 [CX23885_BOARD_HAUPPAUGE_HVR1255_22111] = { 344 .name = "Hauppauge WinTV-HVR1255", 345 .porta = CX23885_ANALOG_VIDEO, 346 .portc = CX23885_MPEG_DVB, 347 .tuner_type = TUNER_ABSENT, 348 .tuner_addr = 0x42, /* 0x84 >> 1 */ 349 .force_bff = 1, 350 .input = {{ 351 .type = CX23885_VMUX_TELEVISION, 352 .vmux = CX25840_VIN7_CH3 | 353 CX25840_VIN5_CH2 | 354 CX25840_VIN2_CH1 | 355 CX25840_DIF_ON, 356 .amux = CX25840_AUDIO8, 357 }, { 358 .type = CX23885_VMUX_SVIDEO, 359 .vmux = CX25840_VIN7_CH3 | 360 CX25840_VIN4_CH2 | 361 CX25840_VIN8_CH1 | 362 CX25840_SVIDEO_ON, 363 .amux = CX25840_AUDIO7, 364 } }, 365 }, 366 [CX23885_BOARD_HAUPPAUGE_HVR1210] = { 367 .name = "Hauppauge WinTV-HVR1210", 368 .portc = CX23885_MPEG_DVB, 369 }, 370 [CX23885_BOARD_MYGICA_X8506] = { 371 .name = "Mygica X8506 DMB-TH", 372 .tuner_type = TUNER_XC5000, 373 .tuner_addr = 0x61, 374 .tuner_bus = 1, 375 .porta = CX23885_ANALOG_VIDEO, 376 .portb = CX23885_MPEG_DVB, 377 .input = { 378 { 379 .type = CX23885_VMUX_TELEVISION, 380 .vmux = CX25840_COMPOSITE2, 381 }, 382 { 383 .type = CX23885_VMUX_COMPOSITE1, 384 .vmux = CX25840_COMPOSITE8, 385 }, 386 { 387 .type = CX23885_VMUX_SVIDEO, 388 .vmux = CX25840_SVIDEO_LUMA3 | 389 CX25840_SVIDEO_CHROMA4, 390 }, 391 { 392 .type = CX23885_VMUX_COMPONENT, 393 .vmux = CX25840_COMPONENT_ON | 394 CX25840_VIN1_CH1 | 395 CX25840_VIN6_CH2 | 396 CX25840_VIN7_CH3, 397 }, 398 }, 399 }, 400 [CX23885_BOARD_MAGICPRO_PROHDTVE2] = { 401 .name = "Magic-Pro ProHDTV Extreme 2", 402 .tuner_type = TUNER_XC5000, 403 .tuner_addr = 0x61, 404 .tuner_bus = 1, 405 .porta = CX23885_ANALOG_VIDEO, 406 .portb = CX23885_MPEG_DVB, 407 .input = { 408 { 409 .type = CX23885_VMUX_TELEVISION, 410 .vmux = CX25840_COMPOSITE2, 411 }, 412 { 413 .type = CX23885_VMUX_COMPOSITE1, 414 .vmux = CX25840_COMPOSITE8, 415 }, 416 { 417 .type = CX23885_VMUX_SVIDEO, 418 .vmux = CX25840_SVIDEO_LUMA3 | 419 CX25840_SVIDEO_CHROMA4, 420 }, 421 { 422 .type = CX23885_VMUX_COMPONENT, 423 .vmux = CX25840_COMPONENT_ON | 424 CX25840_VIN1_CH1 | 425 CX25840_VIN6_CH2 | 426 CX25840_VIN7_CH3, 427 }, 428 }, 429 }, 430 [CX23885_BOARD_HAUPPAUGE_HVR1850] = { 431 .name = "Hauppauge WinTV-HVR1850", 432 .porta = CX23885_ANALOG_VIDEO, 433 .portb = CX23885_MPEG_ENCODER, 434 .portc = CX23885_MPEG_DVB, 435 .tuner_type = TUNER_ABSENT, 436 .tuner_addr = 0x42, /* 0x84 >> 1 */ 437 .force_bff = 1, 438 .input = {{ 439 .type = CX23885_VMUX_TELEVISION, 440 .vmux = CX25840_VIN7_CH3 | 441 CX25840_VIN5_CH2 | 442 CX25840_VIN2_CH1 | 443 CX25840_DIF_ON, 444 .amux = CX25840_AUDIO8, 445 }, { 446 .type = CX23885_VMUX_COMPOSITE1, 447 .vmux = CX25840_VIN7_CH3 | 448 CX25840_VIN4_CH2 | 449 CX25840_VIN6_CH1, 450 .amux = CX25840_AUDIO7, 451 }, { 452 .type = CX23885_VMUX_SVIDEO, 453 .vmux = CX25840_VIN7_CH3 | 454 CX25840_VIN4_CH2 | 455 CX25840_VIN8_CH1 | 456 CX25840_SVIDEO_ON, 457 .amux = CX25840_AUDIO7, 458 } }, 459 }, 460 [CX23885_BOARD_COMPRO_VIDEOMATE_E800] = { 461 .name = "Compro VideoMate E800", 462 .portc = CX23885_MPEG_DVB, 463 }, 464 [CX23885_BOARD_HAUPPAUGE_HVR1290] = { 465 .name = "Hauppauge WinTV-HVR1290", 466 .portc = CX23885_MPEG_DVB, 467 }, 468 [CX23885_BOARD_MYGICA_X8558PRO] = { 469 .name = "Mygica X8558 PRO DMB-TH", 470 .portb = CX23885_MPEG_DVB, 471 .portc = CX23885_MPEG_DVB, 472 }, 473 [CX23885_BOARD_LEADTEK_WINFAST_PXTV1200] = { 474 .name = "LEADTEK WinFast PxTV1200", 475 .porta = CX23885_ANALOG_VIDEO, 476 .tuner_type = TUNER_XC2028, 477 .tuner_addr = 0x61, 478 .tuner_bus = 1, 479 .input = {{ 480 .type = CX23885_VMUX_TELEVISION, 481 .vmux = CX25840_VIN2_CH1 | 482 CX25840_VIN5_CH2 | 483 CX25840_NONE0_CH3, 484 }, { 485 .type = CX23885_VMUX_COMPOSITE1, 486 .vmux = CX25840_COMPOSITE1, 487 }, { 488 .type = CX23885_VMUX_SVIDEO, 489 .vmux = CX25840_SVIDEO_LUMA3 | 490 CX25840_SVIDEO_CHROMA4, 491 }, { 492 .type = CX23885_VMUX_COMPONENT, 493 .vmux = CX25840_VIN7_CH1 | 494 CX25840_VIN6_CH2 | 495 CX25840_VIN8_CH3 | 496 CX25840_COMPONENT_ON, 497 } }, 498 }, 499 [CX23885_BOARD_GOTVIEW_X5_3D_HYBRID] = { 500 .name = "GoTView X5 3D Hybrid", 501 .tuner_type = TUNER_XC5000, 502 .tuner_addr = 0x64, 503 .tuner_bus = 1, 504 .porta = CX23885_ANALOG_VIDEO, 505 .portb = CX23885_MPEG_DVB, 506 .input = {{ 507 .type = CX23885_VMUX_TELEVISION, 508 .vmux = CX25840_VIN2_CH1 | 509 CX25840_VIN5_CH2, 510 .gpio0 = 0x02, 511 }, { 512 .type = CX23885_VMUX_COMPOSITE1, 513 .vmux = CX23885_VMUX_COMPOSITE1, 514 }, { 515 .type = CX23885_VMUX_SVIDEO, 516 .vmux = CX25840_SVIDEO_LUMA3 | 517 CX25840_SVIDEO_CHROMA4, 518 } }, 519 }, 520 [CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF] = { 521 .ci_type = 2, 522 .name = "NetUP Dual DVB-T/C-CI RF", 523 .porta = CX23885_ANALOG_VIDEO, 524 .portb = CX23885_MPEG_DVB, 525 .portc = CX23885_MPEG_DVB, 526 .num_fds_portb = 2, 527 .num_fds_portc = 2, 528 .tuner_type = TUNER_XC5000, 529 .tuner_addr = 0x64, 530 .input = { { 531 .type = CX23885_VMUX_TELEVISION, 532 .vmux = CX25840_COMPOSITE1, 533 } }, 534 }, 535 [CX23885_BOARD_MPX885] = { 536 .name = "MPX-885", 537 .porta = CX23885_ANALOG_VIDEO, 538 .input = {{ 539 .type = CX23885_VMUX_COMPOSITE1, 540 .vmux = CX25840_COMPOSITE1, 541 .amux = CX25840_AUDIO6, 542 .gpio0 = 0, 543 }, { 544 .type = CX23885_VMUX_COMPOSITE2, 545 .vmux = CX25840_COMPOSITE2, 546 .amux = CX25840_AUDIO6, 547 .gpio0 = 0, 548 }, { 549 .type = CX23885_VMUX_COMPOSITE3, 550 .vmux = CX25840_COMPOSITE3, 551 .amux = CX25840_AUDIO7, 552 .gpio0 = 0, 553 }, { 554 .type = CX23885_VMUX_COMPOSITE4, 555 .vmux = CX25840_COMPOSITE4, 556 .amux = CX25840_AUDIO7, 557 .gpio0 = 0, 558 } }, 559 }, 560 [CX23885_BOARD_MYGICA_X8507] = { 561 .name = "Mygica X8502/X8507 ISDB-T", 562 .tuner_type = TUNER_XC5000, 563 .tuner_addr = 0x61, 564 .tuner_bus = 1, 565 .porta = CX23885_ANALOG_VIDEO, 566 .portb = CX23885_MPEG_DVB, 567 .input = { 568 { 569 .type = CX23885_VMUX_TELEVISION, 570 .vmux = CX25840_COMPOSITE2, 571 .amux = CX25840_AUDIO8, 572 }, 573 { 574 .type = CX23885_VMUX_COMPOSITE1, 575 .vmux = CX25840_COMPOSITE8, 576 .amux = CX25840_AUDIO7, 577 }, 578 { 579 .type = CX23885_VMUX_SVIDEO, 580 .vmux = CX25840_SVIDEO_LUMA3 | 581 CX25840_SVIDEO_CHROMA4, 582 .amux = CX25840_AUDIO7, 583 }, 584 { 585 .type = CX23885_VMUX_COMPONENT, 586 .vmux = CX25840_COMPONENT_ON | 587 CX25840_VIN1_CH1 | 588 CX25840_VIN6_CH2 | 589 CX25840_VIN7_CH3, 590 .amux = CX25840_AUDIO7, 591 }, 592 }, 593 }, 594 [CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL] = { 595 .name = "TerraTec Cinergy T PCIe Dual", 596 .portb = CX23885_MPEG_DVB, 597 .portc = CX23885_MPEG_DVB, 598 }, 599 [CX23885_BOARD_TEVII_S471] = { 600 .name = "TeVii S471", 601 .portb = CX23885_MPEG_DVB, 602 }, 603 [CX23885_BOARD_PROF_8000] = { 604 .name = "Prof Revolution DVB-S2 8000", 605 .portb = CX23885_MPEG_DVB, 606 }, 607 [CX23885_BOARD_HAUPPAUGE_HVR4400] = { 608 .name = "Hauppauge WinTV-HVR4400/HVR5500", 609 .porta = CX23885_ANALOG_VIDEO, 610 .portb = CX23885_MPEG_DVB, 611 .portc = CX23885_MPEG_DVB, 612 .tuner_type = TUNER_NXP_TDA18271, 613 .tuner_addr = 0x60, /* 0xc0 >> 1 */ 614 .tuner_bus = 1, 615 }, 616 [CX23885_BOARD_HAUPPAUGE_STARBURST] = { 617 .name = "Hauppauge WinTV Starburst", 618 .portb = CX23885_MPEG_DVB, 619 }, 620 [CX23885_BOARD_AVERMEDIA_HC81R] = { 621 .name = "AVerTV Hybrid Express Slim HC81R", 622 .tuner_type = TUNER_XC2028, 623 .tuner_addr = 0x61, /* 0xc2 >> 1 */ 624 .tuner_bus = 1, 625 .porta = CX23885_ANALOG_VIDEO, 626 .input = {{ 627 .type = CX23885_VMUX_TELEVISION, 628 .vmux = CX25840_VIN2_CH1 | 629 CX25840_VIN5_CH2 | 630 CX25840_NONE0_CH3 | 631 CX25840_NONE1_CH3, 632 .amux = CX25840_AUDIO8, 633 }, { 634 .type = CX23885_VMUX_SVIDEO, 635 .vmux = CX25840_VIN8_CH1 | 636 CX25840_NONE_CH2 | 637 CX25840_VIN7_CH3 | 638 CX25840_SVIDEO_ON, 639 .amux = CX25840_AUDIO6, 640 }, { 641 .type = CX23885_VMUX_COMPONENT, 642 .vmux = CX25840_VIN1_CH1 | 643 CX25840_NONE_CH2 | 644 CX25840_NONE0_CH3 | 645 CX25840_NONE1_CH3, 646 .amux = CX25840_AUDIO6, 647 } }, 648 }, 649 [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2] = { 650 .name = "DViCO FusionHDTV DVB-T Dual Express2", 651 .portb = CX23885_MPEG_DVB, 652 .portc = CX23885_MPEG_DVB, 653 }, 654 [CX23885_BOARD_HAUPPAUGE_IMPACTVCBE] = { 655 .name = "Hauppauge ImpactVCB-e", 656 .tuner_type = TUNER_ABSENT, 657 .porta = CX23885_ANALOG_VIDEO, 658 .input = {{ 659 .type = CX23885_VMUX_COMPOSITE1, 660 .vmux = CX25840_VIN7_CH3 | 661 CX25840_VIN4_CH2 | 662 CX25840_VIN6_CH1, 663 .amux = CX25840_AUDIO7, 664 }, { 665 .type = CX23885_VMUX_SVIDEO, 666 .vmux = CX25840_VIN7_CH3 | 667 CX25840_VIN4_CH2 | 668 CX25840_VIN8_CH1 | 669 CX25840_SVIDEO_ON, 670 .amux = CX25840_AUDIO7, 671 } }, 672 }, 673 [CX23885_BOARD_DVBSKY_T9580] = { 674 .name = "DVBSky T9580", 675 .portb = CX23885_MPEG_DVB, 676 .portc = CX23885_MPEG_DVB, 677 }, 678 [CX23885_BOARD_DVBSKY_T980C] = { 679 .name = "DVBSky T980C", 680 .portb = CX23885_MPEG_DVB, 681 }, 682 [CX23885_BOARD_DVBSKY_S950C] = { 683 .name = "DVBSky S950C", 684 .portb = CX23885_MPEG_DVB, 685 }, 686 [CX23885_BOARD_TT_CT2_4500_CI] = { 687 .name = "Technotrend TT-budget CT2-4500 CI", 688 .portb = CX23885_MPEG_DVB, 689 }, 690 [CX23885_BOARD_DVBSKY_S950] = { 691 .name = "DVBSky S950", 692 .portb = CX23885_MPEG_DVB, 693 }, 694 [CX23885_BOARD_DVBSKY_S952] = { 695 .name = "DVBSky S952", 696 .portb = CX23885_MPEG_DVB, 697 .portc = CX23885_MPEG_DVB, 698 }, 699 [CX23885_BOARD_DVBSKY_T982] = { 700 .name = "DVBSky T982", 701 .portb = CX23885_MPEG_DVB, 702 .portc = CX23885_MPEG_DVB, 703 }, 704 [CX23885_BOARD_HAUPPAUGE_HVR5525] = { 705 .name = "Hauppauge WinTV-HVR5525", 706 .portb = CX23885_MPEG_DVB, 707 .portc = CX23885_MPEG_DVB, 708 }, 709 [CX23885_BOARD_VIEWCAST_260E] = { 710 .name = "ViewCast 260e", 711 .porta = CX23885_ANALOG_VIDEO, 712 .force_bff = 1, 713 .input = {{ 714 .type = CX23885_VMUX_COMPOSITE1, 715 .vmux = CX25840_VIN6_CH1, 716 .amux = CX25840_AUDIO7, 717 }, { 718 .type = CX23885_VMUX_SVIDEO, 719 .vmux = CX25840_VIN7_CH3 | 720 CX25840_VIN5_CH1 | 721 CX25840_SVIDEO_ON, 722 .amux = CX25840_AUDIO7, 723 }, { 724 .type = CX23885_VMUX_COMPONENT, 725 .vmux = CX25840_VIN7_CH3 | 726 CX25840_VIN6_CH2 | 727 CX25840_VIN5_CH1 | 728 CX25840_COMPONENT_ON, 729 .amux = CX25840_AUDIO7, 730 } }, 731 }, 732 [CX23885_BOARD_VIEWCAST_460E] = { 733 .name = "ViewCast 460e", 734 .porta = CX23885_ANALOG_VIDEO, 735 .force_bff = 1, 736 .input = {{ 737 .type = CX23885_VMUX_COMPOSITE1, 738 .vmux = CX25840_VIN4_CH1, 739 .amux = CX25840_AUDIO7, 740 }, { 741 .type = CX23885_VMUX_SVIDEO, 742 .vmux = CX25840_VIN7_CH3 | 743 CX25840_VIN6_CH1 | 744 CX25840_SVIDEO_ON, 745 .amux = CX25840_AUDIO7, 746 }, { 747 .type = CX23885_VMUX_COMPONENT, 748 .vmux = CX25840_VIN7_CH3 | 749 CX25840_VIN6_CH1 | 750 CX25840_VIN5_CH2 | 751 CX25840_COMPONENT_ON, 752 .amux = CX25840_AUDIO7, 753 }, { 754 .type = CX23885_VMUX_COMPOSITE2, 755 .vmux = CX25840_VIN6_CH1, 756 .amux = CX25840_AUDIO7, 757 } }, 758 }, 759 [CX23885_BOARD_HAUPPAUGE_QUADHD_DVB] = { 760 .name = "Hauppauge WinTV-QuadHD-DVB", 761 .portb = CX23885_MPEG_DVB, 762 .portc = CX23885_MPEG_DVB, 763 }, 764 [CX23885_BOARD_HAUPPAUGE_QUADHD_DVB_885] = { 765 .name = "Hauppauge WinTV-QuadHD-DVB(885)", 766 .portb = CX23885_MPEG_DVB, 767 .portc = CX23885_MPEG_DVB, 768 }, 769 [CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC] = { 770 .name = "Hauppauge WinTV-QuadHD-ATSC", 771 .portb = CX23885_MPEG_DVB, 772 .portc = CX23885_MPEG_DVB, 773 }, 774 [CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC_885] = { 775 .name = "Hauppauge WinTV-QuadHD-ATSC(885)", 776 .portb = CX23885_MPEG_DVB, 777 .portc = CX23885_MPEG_DVB, 778 }, 779 [CX23885_BOARD_HAUPPAUGE_HVR1265_K4] = { 780 .name = "Hauppauge WinTV-HVR-1265(161111)", 781 .porta = CX23885_ANALOG_VIDEO, 782 .portc = CX23885_MPEG_DVB, 783 .tuner_type = TUNER_ABSENT, 784 .force_bff = 1, 785 .input = {{ 786 .type = CX23885_VMUX_COMPOSITE1, 787 .vmux = CX25840_VIN7_CH3 | 788 CX25840_VIN4_CH2 | 789 CX25840_VIN6_CH1, 790 .amux = CX25840_AUDIO7, 791 }, { 792 .type = CX23885_VMUX_SVIDEO, 793 .vmux = CX25840_VIN7_CH3 | 794 CX25840_VIN4_CH2 | 795 CX25840_VIN8_CH1 | 796 CX25840_SVIDEO_ON, 797 .amux = CX25840_AUDIO7, 798 } }, 799 }, 800 [CX23885_BOARD_HAUPPAUGE_STARBURST2] = { 801 .name = "Hauppauge WinTV-Starburst2", 802 .portb = CX23885_MPEG_DVB, 803 }, 804 [CX23885_BOARD_AVERMEDIA_CE310B] = { 805 .name = "AVerMedia CE310B", 806 .porta = CX23885_ANALOG_VIDEO, 807 .force_bff = 1, 808 .input = {{ 809 .type = CX23885_VMUX_COMPOSITE1, 810 .vmux = CX25840_VIN1_CH1 | 811 CX25840_NONE_CH2 | 812 CX25840_NONE0_CH3, 813 .amux = CX25840_AUDIO7, 814 }, { 815 .type = CX23885_VMUX_SVIDEO, 816 .vmux = CX25840_VIN8_CH1 | 817 CX25840_NONE_CH2 | 818 CX25840_VIN7_CH3 | 819 CX25840_SVIDEO_ON, 820 .amux = CX25840_AUDIO7, 821 } }, 822 }, 823 }; 824 const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards); 825 826 /* ------------------------------------------------------------------ */ 827 /* PCI subsystem IDs */ 828 829 struct cx23885_subid cx23885_subids[] = { 830 { 831 .subvendor = 0x0070, 832 .subdevice = 0x3400, 833 .card = CX23885_BOARD_UNKNOWN, 834 }, { 835 .subvendor = 0x0070, 836 .subdevice = 0x7600, 837 .card = CX23885_BOARD_HAUPPAUGE_HVR1800lp, 838 }, { 839 .subvendor = 0x0070, 840 .subdevice = 0x7800, 841 .card = CX23885_BOARD_HAUPPAUGE_HVR1800, 842 }, { 843 .subvendor = 0x0070, 844 .subdevice = 0x7801, 845 .card = CX23885_BOARD_HAUPPAUGE_HVR1800, 846 }, { 847 .subvendor = 0x0070, 848 .subdevice = 0x7809, 849 .card = CX23885_BOARD_HAUPPAUGE_HVR1800, 850 }, { 851 .subvendor = 0x0070, 852 .subdevice = 0x7911, 853 .card = CX23885_BOARD_HAUPPAUGE_HVR1250, 854 }, { 855 .subvendor = 0x18ac, 856 .subdevice = 0xd500, 857 .card = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP, 858 }, { 859 .subvendor = 0x0070, 860 .subdevice = 0x7790, 861 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q, 862 }, { 863 .subvendor = 0x0070, 864 .subdevice = 0x7797, 865 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q, 866 }, { 867 .subvendor = 0x0070, 868 .subdevice = 0x7710, 869 .card = CX23885_BOARD_HAUPPAUGE_HVR1500, 870 }, { 871 .subvendor = 0x0070, 872 .subdevice = 0x7717, 873 .card = CX23885_BOARD_HAUPPAUGE_HVR1500, 874 }, { 875 .subvendor = 0x0070, 876 .subdevice = 0x71d1, 877 .card = CX23885_BOARD_HAUPPAUGE_HVR1200, 878 }, { 879 .subvendor = 0x0070, 880 .subdevice = 0x71d3, 881 .card = CX23885_BOARD_HAUPPAUGE_HVR1200, 882 }, { 883 .subvendor = 0x0070, 884 .subdevice = 0x8101, 885 .card = CX23885_BOARD_HAUPPAUGE_HVR1700, 886 }, { 887 .subvendor = 0x0070, 888 .subdevice = 0x8010, 889 .card = CX23885_BOARD_HAUPPAUGE_HVR1400, 890 }, { 891 .subvendor = 0x18ac, 892 .subdevice = 0xd618, 893 .card = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP, 894 }, { 895 .subvendor = 0x18ac, 896 .subdevice = 0xdb78, 897 .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP, 898 }, { 899 .subvendor = 0x107d, 900 .subdevice = 0x6681, 901 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H, 902 }, { 903 .subvendor = 0x107d, 904 .subdevice = 0x6f21, 905 .card = CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200, 906 }, { 907 .subvendor = 0x107d, 908 .subdevice = 0x6f39, 909 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000, 910 }, { 911 .subvendor = 0x185b, 912 .subdevice = 0xe800, 913 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E650F, 914 }, { 915 .subvendor = 0x6920, 916 .subdevice = 0x8888, 917 .card = CX23885_BOARD_TBS_6920, 918 }, { 919 .subvendor = 0x6980, 920 .subdevice = 0x8888, 921 .card = CX23885_BOARD_TBS_6980, 922 }, { 923 .subvendor = 0x6981, 924 .subdevice = 0x8888, 925 .card = CX23885_BOARD_TBS_6981, 926 }, { 927 .subvendor = 0xd470, 928 .subdevice = 0x9022, 929 .card = CX23885_BOARD_TEVII_S470, 930 }, { 931 .subvendor = 0x0001, 932 .subdevice = 0x2005, 933 .card = CX23885_BOARD_DVBWORLD_2005, 934 }, { 935 .subvendor = 0x1b55, 936 .subdevice = 0x2a2c, 937 .card = CX23885_BOARD_NETUP_DUAL_DVBS2_CI, 938 }, { 939 .subvendor = 0x0070, 940 .subdevice = 0x2211, 941 .card = CX23885_BOARD_HAUPPAUGE_HVR1270, 942 }, { 943 .subvendor = 0x0070, 944 .subdevice = 0x2215, 945 .card = CX23885_BOARD_HAUPPAUGE_HVR1275, 946 }, { 947 .subvendor = 0x0070, 948 .subdevice = 0x221d, 949 .card = CX23885_BOARD_HAUPPAUGE_HVR1275, 950 }, { 951 .subvendor = 0x0070, 952 .subdevice = 0x2251, 953 .card = CX23885_BOARD_HAUPPAUGE_HVR1255, 954 }, { 955 .subvendor = 0x0070, 956 .subdevice = 0x2259, 957 .card = CX23885_BOARD_HAUPPAUGE_HVR1255_22111, 958 }, { 959 .subvendor = 0x0070, 960 .subdevice = 0x2291, 961 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, 962 }, { 963 .subvendor = 0x0070, 964 .subdevice = 0x2295, 965 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, 966 }, { 967 .subvendor = 0x0070, 968 .subdevice = 0x2299, 969 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, 970 }, { 971 .subvendor = 0x0070, 972 .subdevice = 0x229d, 973 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */ 974 }, { 975 .subvendor = 0x0070, 976 .subdevice = 0x22f0, 977 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, 978 }, { 979 .subvendor = 0x0070, 980 .subdevice = 0x22f1, 981 .card = CX23885_BOARD_HAUPPAUGE_HVR1255, 982 }, { 983 .subvendor = 0x0070, 984 .subdevice = 0x22f2, 985 .card = CX23885_BOARD_HAUPPAUGE_HVR1275, 986 }, { 987 .subvendor = 0x0070, 988 .subdevice = 0x22f3, 989 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */ 990 }, { 991 .subvendor = 0x0070, 992 .subdevice = 0x22f4, 993 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, 994 }, { 995 .subvendor = 0x0070, 996 .subdevice = 0x22f5, 997 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */ 998 }, { 999 .subvendor = 0x14f1, 1000 .subdevice = 0x8651, 1001 .card = CX23885_BOARD_MYGICA_X8506, 1002 }, { 1003 .subvendor = 0x14f1, 1004 .subdevice = 0x8657, 1005 .card = CX23885_BOARD_MAGICPRO_PROHDTVE2, 1006 }, { 1007 .subvendor = 0x0070, 1008 .subdevice = 0x8541, 1009 .card = CX23885_BOARD_HAUPPAUGE_HVR1850, 1010 }, { 1011 .subvendor = 0x1858, 1012 .subdevice = 0xe800, 1013 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E800, 1014 }, { 1015 .subvendor = 0x0070, 1016 .subdevice = 0x8551, 1017 .card = CX23885_BOARD_HAUPPAUGE_HVR1290, 1018 }, { 1019 .subvendor = 0x14f1, 1020 .subdevice = 0x8578, 1021 .card = CX23885_BOARD_MYGICA_X8558PRO, 1022 }, { 1023 .subvendor = 0x107d, 1024 .subdevice = 0x6f22, 1025 .card = CX23885_BOARD_LEADTEK_WINFAST_PXTV1200, 1026 }, { 1027 .subvendor = 0x5654, 1028 .subdevice = 0x2390, 1029 .card = CX23885_BOARD_GOTVIEW_X5_3D_HYBRID, 1030 }, { 1031 .subvendor = 0x1b55, 1032 .subdevice = 0xe2e4, 1033 .card = CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF, 1034 }, { 1035 .subvendor = 0x14f1, 1036 .subdevice = 0x8502, 1037 .card = CX23885_BOARD_MYGICA_X8507, 1038 }, { 1039 .subvendor = 0x153b, 1040 .subdevice = 0x117e, 1041 .card = CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL, 1042 }, { 1043 .subvendor = 0xd471, 1044 .subdevice = 0x9022, 1045 .card = CX23885_BOARD_TEVII_S471, 1046 }, { 1047 .subvendor = 0x8000, 1048 .subdevice = 0x3034, 1049 .card = CX23885_BOARD_PROF_8000, 1050 }, { 1051 .subvendor = 0x0070, 1052 .subdevice = 0xc108, 1053 .card = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-4400 (Model 121xxx, Hybrid DVB-T/S2, IR) */ 1054 }, { 1055 .subvendor = 0x0070, 1056 .subdevice = 0xc138, 1057 .card = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-5500 (Model 121xxx, Hybrid DVB-T/C/S2, IR) */ 1058 }, { 1059 .subvendor = 0x0070, 1060 .subdevice = 0xc12a, 1061 .card = CX23885_BOARD_HAUPPAUGE_STARBURST, /* Hauppauge WinTV Starburst (Model 121x00, DVB-S2, IR) */ 1062 }, { 1063 .subvendor = 0x0070, 1064 .subdevice = 0xc1f8, 1065 .card = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-5500 (Model 121xxx, Hybrid DVB-T/C/S2, IR) */ 1066 }, { 1067 .subvendor = 0x1461, 1068 .subdevice = 0xd939, 1069 .card = CX23885_BOARD_AVERMEDIA_HC81R, 1070 }, { 1071 .subvendor = 0x0070, 1072 .subdevice = 0x7133, 1073 .card = CX23885_BOARD_HAUPPAUGE_IMPACTVCBE, 1074 }, { 1075 .subvendor = 0x0070, 1076 .subdevice = 0x7137, 1077 .card = CX23885_BOARD_HAUPPAUGE_IMPACTVCBE, 1078 }, { 1079 .subvendor = 0x18ac, 1080 .subdevice = 0xdb98, 1081 .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2, 1082 }, { 1083 .subvendor = 0x4254, 1084 .subdevice = 0x9580, 1085 .card = CX23885_BOARD_DVBSKY_T9580, 1086 }, { 1087 .subvendor = 0x4254, 1088 .subdevice = 0x980c, 1089 .card = CX23885_BOARD_DVBSKY_T980C, 1090 }, { 1091 .subvendor = 0x4254, 1092 .subdevice = 0x950c, 1093 .card = CX23885_BOARD_DVBSKY_S950C, 1094 }, { 1095 .subvendor = 0x13c2, 1096 .subdevice = 0x3013, 1097 .card = CX23885_BOARD_TT_CT2_4500_CI, 1098 }, { 1099 .subvendor = 0x4254, 1100 .subdevice = 0x0950, 1101 .card = CX23885_BOARD_DVBSKY_S950, 1102 }, { 1103 .subvendor = 0x4254, 1104 .subdevice = 0x0952, 1105 .card = CX23885_BOARD_DVBSKY_S952, 1106 }, { 1107 .subvendor = 0x4254, 1108 .subdevice = 0x0982, 1109 .card = CX23885_BOARD_DVBSKY_T982, 1110 }, { 1111 .subvendor = 0x0070, 1112 .subdevice = 0xf038, 1113 .card = CX23885_BOARD_HAUPPAUGE_HVR5525, 1114 }, { 1115 .subvendor = 0x1576, 1116 .subdevice = 0x0260, 1117 .card = CX23885_BOARD_VIEWCAST_260E, 1118 }, { 1119 .subvendor = 0x1576, 1120 .subdevice = 0x0460, 1121 .card = CX23885_BOARD_VIEWCAST_460E, 1122 }, { 1123 .subvendor = 0x0070, 1124 .subdevice = 0x6a28, 1125 .card = CX23885_BOARD_HAUPPAUGE_QUADHD_DVB, /* Tuner Pair 1 */ 1126 }, { 1127 .subvendor = 0x0070, 1128 .subdevice = 0x6b28, 1129 .card = CX23885_BOARD_HAUPPAUGE_QUADHD_DVB, /* Tuner Pair 2 */ 1130 }, { 1131 .subvendor = 0x0070, 1132 .subdevice = 0x6a18, 1133 .card = CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC, /* Tuner Pair 1 */ 1134 }, { 1135 .subvendor = 0x0070, 1136 .subdevice = 0x6b18, 1137 .card = CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC, /* Tuner Pair 2 */ 1138 }, { 1139 .subvendor = 0x0070, 1140 .subdevice = 0x2a18, 1141 .card = CX23885_BOARD_HAUPPAUGE_HVR1265_K4, /* Hauppauge WinTV HVR-1265 (Model 161xx1, Hybrid ATSC/QAM-B) */ 1142 }, { 1143 .subvendor = 0x0070, 1144 .subdevice = 0xf02a, 1145 .card = CX23885_BOARD_HAUPPAUGE_STARBURST2, 1146 }, { 1147 .subvendor = 0x1461, 1148 .subdevice = 0x3100, 1149 .card = CX23885_BOARD_AVERMEDIA_CE310B, 1150 }, 1151 }; 1152 const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids); 1153 1154 void cx23885_card_list(struct cx23885_dev *dev) 1155 { 1156 int i; 1157 1158 if (0 == dev->pci->subsystem_vendor && 1159 0 == dev->pci->subsystem_device) { 1160 pr_info("%s: Board has no valid PCIe Subsystem ID and can't\n" 1161 "%s: be autodetected. Pass card=<n> insmod option\n" 1162 "%s: to workaround that. Redirect complaints to the\n" 1163 "%s: vendor of the TV card. Best regards,\n" 1164 "%s: -- tux\n", 1165 dev->name, dev->name, dev->name, dev->name, dev->name); 1166 } else { 1167 pr_info("%s: Your board isn't known (yet) to the driver.\n" 1168 "%s: Try to pick one of the existing card configs via\n" 1169 "%s: card=<n> insmod option. Updating to the latest\n" 1170 "%s: version might help as well.\n", 1171 dev->name, dev->name, dev->name, dev->name); 1172 } 1173 pr_info("%s: Here is a list of valid choices for the card=<n> insmod option:\n", 1174 dev->name); 1175 for (i = 0; i < cx23885_bcount; i++) 1176 pr_info("%s: card=%d -> %s\n", 1177 dev->name, i, cx23885_boards[i].name); 1178 } 1179 1180 static void viewcast_eeprom(struct cx23885_dev *dev, u8 *eeprom_data) 1181 { 1182 u32 sn; 1183 1184 /* The serial number record begins with tag 0x59 */ 1185 if (*(eeprom_data + 0x00) != 0x59) { 1186 pr_info("%s() eeprom records are undefined, no serial number\n", 1187 __func__); 1188 return; 1189 } 1190 1191 sn = (*(eeprom_data + 0x06) << 24) | 1192 (*(eeprom_data + 0x05) << 16) | 1193 (*(eeprom_data + 0x04) << 8) | 1194 (*(eeprom_data + 0x03)); 1195 1196 pr_info("%s: card '%s' sn# MM%d\n", 1197 dev->name, 1198 cx23885_boards[dev->board].name, 1199 sn); 1200 } 1201 1202 static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data) 1203 { 1204 struct tveeprom tv; 1205 1206 tveeprom_hauppauge_analog(&tv, eeprom_data); 1207 1208 /* Make sure we support the board model */ 1209 switch (tv.model) { 1210 case 22001: 1211 /* WinTV-HVR1270 (PCIe, Retail, half height) 1212 * ATSC/QAM and basic analog, IR Blast */ 1213 case 22009: 1214 /* WinTV-HVR1210 (PCIe, Retail, half height) 1215 * DVB-T and basic analog, IR Blast */ 1216 case 22011: 1217 /* WinTV-HVR1270 (PCIe, Retail, half height) 1218 * ATSC/QAM and basic analog, IR Recv */ 1219 case 22019: 1220 /* WinTV-HVR1210 (PCIe, Retail, half height) 1221 * DVB-T and basic analog, IR Recv */ 1222 case 22021: 1223 /* WinTV-HVR1275 (PCIe, Retail, half height) 1224 * ATSC/QAM and basic analog, IR Recv */ 1225 case 22029: 1226 /* WinTV-HVR1210 (PCIe, Retail, half height) 1227 * DVB-T and basic analog, IR Recv */ 1228 case 22101: 1229 /* WinTV-HVR1270 (PCIe, Retail, full height) 1230 * ATSC/QAM and basic analog, IR Blast */ 1231 case 22109: 1232 /* WinTV-HVR1210 (PCIe, Retail, full height) 1233 * DVB-T and basic analog, IR Blast */ 1234 case 22111: 1235 /* WinTV-HVR1270 (PCIe, Retail, full height) 1236 * ATSC/QAM and basic analog, IR Recv */ 1237 case 22119: 1238 /* WinTV-HVR1210 (PCIe, Retail, full height) 1239 * DVB-T and basic analog, IR Recv */ 1240 case 22121: 1241 /* WinTV-HVR1275 (PCIe, Retail, full height) 1242 * ATSC/QAM and basic analog, IR Recv */ 1243 case 22129: 1244 /* WinTV-HVR1210 (PCIe, Retail, full height) 1245 * DVB-T and basic analog, IR Recv */ 1246 case 71009: 1247 /* WinTV-HVR1200 (PCIe, Retail, full height) 1248 * DVB-T and basic analog */ 1249 case 71100: 1250 /* WinTV-ImpactVCB-e (PCIe, Retail, half height) 1251 * Basic analog */ 1252 case 71359: 1253 /* WinTV-HVR1200 (PCIe, OEM, half height) 1254 * DVB-T and basic analog */ 1255 case 71439: 1256 /* WinTV-HVR1200 (PCIe, OEM, half height) 1257 * DVB-T and basic analog */ 1258 case 71449: 1259 /* WinTV-HVR1200 (PCIe, OEM, full height) 1260 * DVB-T and basic analog */ 1261 case 71939: 1262 /* WinTV-HVR1200 (PCIe, OEM, half height) 1263 * DVB-T and basic analog */ 1264 case 71949: 1265 /* WinTV-HVR1200 (PCIe, OEM, full height) 1266 * DVB-T and basic analog */ 1267 case 71959: 1268 /* WinTV-HVR1200 (PCIe, OEM, full height) 1269 * DVB-T and basic analog */ 1270 case 71979: 1271 /* WinTV-HVR1200 (PCIe, OEM, half height) 1272 * DVB-T and basic analog */ 1273 case 71999: 1274 /* WinTV-HVR1200 (PCIe, OEM, full height) 1275 * DVB-T and basic analog */ 1276 case 76601: 1277 /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual 1278 channel ATSC and MPEG2 HW Encoder */ 1279 case 77001: 1280 /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC 1281 and Basic analog */ 1282 case 77011: 1283 /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC 1284 and Basic analog */ 1285 case 77041: 1286 /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM 1287 and Basic analog */ 1288 case 77051: 1289 /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM 1290 and Basic analog */ 1291 case 78011: 1292 /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM, 1293 Dual channel ATSC and MPEG2 HW Encoder */ 1294 case 78501: 1295 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM, 1296 Dual channel ATSC and MPEG2 HW Encoder */ 1297 case 78521: 1298 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM, 1299 Dual channel ATSC and MPEG2 HW Encoder */ 1300 case 78531: 1301 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM, 1302 Dual channel ATSC and MPEG2 HW Encoder */ 1303 case 78631: 1304 /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM, 1305 Dual channel ATSC and MPEG2 HW Encoder */ 1306 case 79001: 1307 /* WinTV-HVR1250 (PCIe, Retail, IR, full height, 1308 ATSC and Basic analog */ 1309 case 79101: 1310 /* WinTV-HVR1250 (PCIe, Retail, IR, half height, 1311 ATSC and Basic analog */ 1312 case 79501: 1313 /* WinTV-HVR1250 (PCIe, No IR, half height, 1314 ATSC [at least] and Basic analog) */ 1315 case 79561: 1316 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height, 1317 ATSC and Basic analog */ 1318 case 79571: 1319 /* WinTV-HVR1250 (PCIe, OEM, No IR, full height, 1320 ATSC and Basic analog */ 1321 case 79671: 1322 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height, 1323 ATSC and Basic analog */ 1324 case 80019: 1325 /* WinTV-HVR1400 (Express Card, Retail, IR, 1326 * DVB-T and Basic analog */ 1327 case 81509: 1328 /* WinTV-HVR1700 (PCIe, OEM, No IR, half height) 1329 * DVB-T and MPEG2 HW Encoder */ 1330 case 81519: 1331 /* WinTV-HVR1700 (PCIe, OEM, No IR, full height) 1332 * DVB-T and MPEG2 HW Encoder */ 1333 break; 1334 case 85021: 1335 /* WinTV-HVR1850 (PCIe, Retail, 3.5mm in, IR, FM, 1336 Dual channel ATSC and MPEG2 HW Encoder */ 1337 break; 1338 case 85721: 1339 /* WinTV-HVR1290 (PCIe, OEM, RCA in, IR, 1340 Dual channel ATSC and Basic analog */ 1341 case 121019: 1342 /* WinTV-HVR4400 (PCIe, DVB-S2, DVB-C/T) */ 1343 break; 1344 case 121029: 1345 /* WinTV-HVR5500 (PCIe, DVB-S2, DVB-C/T) */ 1346 break; 1347 case 150329: 1348 /* WinTV-HVR5525 (PCIe, DVB-S/S2, DVB-T/T2/C) */ 1349 break; 1350 case 161111: 1351 /* WinTV-HVR-1265 K4 (PCIe, Analog/ATSC/QAM-B) */ 1352 break; 1353 case 166100: /* 888 version, hybrid */ 1354 case 166200: /* 885 version, DVB only */ 1355 /* WinTV-QuadHD (DVB) Tuner Pair 1 (PCIe, IR, half height, 1356 DVB-T/T2/C, DVB-T/T2/C */ 1357 break; 1358 case 166101: /* 888 version, hybrid */ 1359 case 166201: /* 885 version, DVB only */ 1360 /* WinTV-QuadHD (DVB) Tuner Pair 2 (PCIe, IR, half height, 1361 DVB-T/T2/C, DVB-T/T2/C */ 1362 break; 1363 case 165100: /* 888 version, hybrid */ 1364 case 165200: /* 885 version, digital only */ 1365 /* WinTV-QuadHD (ATSC) Tuner Pair 1 (PCIe, IR, half height, 1366 * ATSC/QAM-B, ATSC/QAM-B */ 1367 break; 1368 case 165101: /* 888 version, hybrid */ 1369 case 165201: /* 885 version, digital only */ 1370 /* WinTV-QuadHD (ATSC) Tuner Pair 2 (PCIe, IR, half height, 1371 * ATSC/QAM-B, ATSC/QAM-B */ 1372 break; 1373 default: 1374 pr_warn("%s: warning: unknown hauppauge model #%d\n", 1375 dev->name, tv.model); 1376 break; 1377 } 1378 1379 pr_info("%s: hauppauge eeprom: model=%d\n", 1380 dev->name, tv.model); 1381 } 1382 1383 /* Some TBS cards require initing a chip using a bitbanged SPI attached 1384 to the cx23885 gpio's. If this chip doesn't get init'ed the demod 1385 doesn't respond to any command. */ 1386 static void tbs_card_init(struct cx23885_dev *dev) 1387 { 1388 int i; 1389 static const u8 buf[] = { 1390 0xe0, 0x06, 0x66, 0x33, 0x65, 1391 0x01, 0x17, 0x06, 0xde}; 1392 1393 switch (dev->board) { 1394 case CX23885_BOARD_TBS_6980: 1395 case CX23885_BOARD_TBS_6981: 1396 cx_set(GP0_IO, 0x00070007); 1397 usleep_range(1000, 10000); 1398 cx_clear(GP0_IO, 2); 1399 usleep_range(1000, 10000); 1400 for (i = 0; i < 9 * 8; i++) { 1401 cx_clear(GP0_IO, 7); 1402 usleep_range(1000, 10000); 1403 cx_set(GP0_IO, 1404 ((buf[i >> 3] >> (7 - (i & 7))) & 1) | 4); 1405 usleep_range(1000, 10000); 1406 } 1407 cx_set(GP0_IO, 7); 1408 break; 1409 } 1410 } 1411 1412 int cx23885_tuner_callback(void *priv, int component, int command, int arg) 1413 { 1414 struct cx23885_tsport *port = priv; 1415 struct cx23885_dev *dev = port->dev; 1416 u32 bitmask = 0; 1417 1418 if ((command == XC2028_RESET_CLK) || (command == XC2028_I2C_FLUSH)) 1419 return 0; 1420 1421 if (command != 0) { 1422 pr_err("%s(): Unknown command 0x%x.\n", 1423 __func__, command); 1424 return -EINVAL; 1425 } 1426 1427 switch (dev->board) { 1428 case CX23885_BOARD_HAUPPAUGE_HVR1400: 1429 case CX23885_BOARD_HAUPPAUGE_HVR1500: 1430 case CX23885_BOARD_HAUPPAUGE_HVR1500Q: 1431 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H: 1432 case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200: 1433 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000: 1434 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F: 1435 case CX23885_BOARD_COMPRO_VIDEOMATE_E800: 1436 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200: 1437 /* Tuner Reset Command */ 1438 bitmask = 0x04; 1439 break; 1440 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP: 1441 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: 1442 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2: 1443 /* Two identical tuners on two different i2c buses, 1444 * we need to reset the correct gpio. */ 1445 if (port->nr == 1) 1446 bitmask = 0x01; 1447 else if (port->nr == 2) 1448 bitmask = 0x04; 1449 break; 1450 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID: 1451 /* Tuner Reset Command */ 1452 bitmask = 0x02; 1453 break; 1454 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: 1455 altera_ci_tuner_reset(dev, port->nr); 1456 break; 1457 case CX23885_BOARD_AVERMEDIA_HC81R: 1458 /* XC3028L Reset Command */ 1459 bitmask = 1 << 2; 1460 break; 1461 } 1462 1463 if (bitmask) { 1464 /* Drive the tuner into reset and back out */ 1465 cx_clear(GP0_IO, bitmask); 1466 mdelay(200); 1467 cx_set(GP0_IO, bitmask); 1468 } 1469 1470 return 0; 1471 } 1472 1473 void cx23885_gpio_setup(struct cx23885_dev *dev) 1474 { 1475 switch (dev->board) { 1476 case CX23885_BOARD_HAUPPAUGE_HVR1250: 1477 /* GPIO-0 cx24227 demodulator reset */ 1478 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */ 1479 break; 1480 case CX23885_BOARD_HAUPPAUGE_HVR1500: 1481 /* GPIO-0 cx24227 demodulator */ 1482 /* GPIO-2 xc3028 tuner */ 1483 1484 /* Put the parts into reset */ 1485 cx_set(GP0_IO, 0x00050000); 1486 cx_clear(GP0_IO, 0x00000005); 1487 msleep(5); 1488 1489 /* Bring the parts out of reset */ 1490 cx_set(GP0_IO, 0x00050005); 1491 break; 1492 case CX23885_BOARD_HAUPPAUGE_HVR1500Q: 1493 /* GPIO-0 cx24227 demodulator reset */ 1494 /* GPIO-2 xc5000 tuner reset */ 1495 cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */ 1496 break; 1497 case CX23885_BOARD_HAUPPAUGE_HVR1800: 1498 /* GPIO-0 656_CLK */ 1499 /* GPIO-1 656_D0 */ 1500 /* GPIO-2 8295A Reset */ 1501 /* GPIO-3-10 cx23417 data0-7 */ 1502 /* GPIO-11-14 cx23417 addr0-3 */ 1503 /* GPIO-15-18 cx23417 READY, CS, RD, WR */ 1504 /* GPIO-19 IR_RX */ 1505 1506 /* CX23417 GPIO's */ 1507 /* EIO15 Zilog Reset */ 1508 /* EIO14 S5H1409/CX24227 Reset */ 1509 mc417_gpio_enable(dev, GPIO_15 | GPIO_14, 1); 1510 1511 /* Put the demod into reset and protect the eeprom */ 1512 mc417_gpio_clear(dev, GPIO_15 | GPIO_14); 1513 msleep(100); 1514 1515 /* Bring the demod and blaster out of reset */ 1516 mc417_gpio_set(dev, GPIO_15 | GPIO_14); 1517 msleep(100); 1518 1519 /* Force the TDA8295A into reset and back */ 1520 cx23885_gpio_enable(dev, GPIO_2, 1); 1521 cx23885_gpio_set(dev, GPIO_2); 1522 msleep(20); 1523 cx23885_gpio_clear(dev, GPIO_2); 1524 msleep(20); 1525 cx23885_gpio_set(dev, GPIO_2); 1526 msleep(20); 1527 break; 1528 case CX23885_BOARD_HAUPPAUGE_HVR1200: 1529 /* GPIO-0 tda10048 demodulator reset */ 1530 /* GPIO-2 tda18271 tuner reset */ 1531 1532 /* Put the parts into reset and back */ 1533 cx_set(GP0_IO, 0x00050000); 1534 msleep(20); 1535 cx_clear(GP0_IO, 0x00000005); 1536 msleep(20); 1537 cx_set(GP0_IO, 0x00050005); 1538 break; 1539 case CX23885_BOARD_HAUPPAUGE_HVR1700: 1540 /* GPIO-0 TDA10048 demodulator reset */ 1541 /* GPIO-2 TDA8295A Reset */ 1542 /* GPIO-3-10 cx23417 data0-7 */ 1543 /* GPIO-11-14 cx23417 addr0-3 */ 1544 /* GPIO-15-18 cx23417 READY, CS, RD, WR */ 1545 1546 /* The following GPIO's are on the interna AVCore (cx25840) */ 1547 /* GPIO-19 IR_RX */ 1548 /* GPIO-20 IR_TX 416/DVBT Select */ 1549 /* GPIO-21 IIS DAT */ 1550 /* GPIO-22 IIS WCLK */ 1551 /* GPIO-23 IIS BCLK */ 1552 1553 /* Put the parts into reset and back */ 1554 cx_set(GP0_IO, 0x00050000); 1555 msleep(20); 1556 cx_clear(GP0_IO, 0x00000005); 1557 msleep(20); 1558 cx_set(GP0_IO, 0x00050005); 1559 break; 1560 case CX23885_BOARD_HAUPPAUGE_HVR1400: 1561 /* GPIO-0 Dibcom7000p demodulator reset */ 1562 /* GPIO-2 xc3028L tuner reset */ 1563 /* GPIO-13 LED */ 1564 1565 /* Put the parts into reset and back */ 1566 cx_set(GP0_IO, 0x00050000); 1567 msleep(20); 1568 cx_clear(GP0_IO, 0x00000005); 1569 msleep(20); 1570 cx_set(GP0_IO, 0x00050005); 1571 break; 1572 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP: 1573 /* GPIO-0 xc5000 tuner reset i2c bus 0 */ 1574 /* GPIO-1 s5h1409 demod reset i2c bus 0 */ 1575 /* GPIO-2 xc5000 tuner reset i2c bus 1 */ 1576 /* GPIO-3 s5h1409 demod reset i2c bus 0 */ 1577 1578 /* Put the parts into reset and back */ 1579 cx_set(GP0_IO, 0x000f0000); 1580 msleep(20); 1581 cx_clear(GP0_IO, 0x0000000f); 1582 msleep(20); 1583 cx_set(GP0_IO, 0x000f000f); 1584 break; 1585 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: 1586 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2: 1587 /* GPIO-0 portb xc3028 reset */ 1588 /* GPIO-1 portb zl10353 reset */ 1589 /* GPIO-2 portc xc3028 reset */ 1590 /* GPIO-3 portc zl10353 reset */ 1591 1592 /* Put the parts into reset and back */ 1593 cx_set(GP0_IO, 0x000f0000); 1594 msleep(20); 1595 cx_clear(GP0_IO, 0x0000000f); 1596 msleep(20); 1597 cx_set(GP0_IO, 0x000f000f); 1598 break; 1599 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H: 1600 case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200: 1601 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000: 1602 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F: 1603 case CX23885_BOARD_COMPRO_VIDEOMATE_E800: 1604 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200: 1605 /* GPIO-2 xc3028 tuner reset */ 1606 1607 /* The following GPIO's are on the internal AVCore (cx25840) */ 1608 /* GPIO-? zl10353 demod reset */ 1609 1610 /* Put the parts into reset and back */ 1611 cx_set(GP0_IO, 0x00040000); 1612 msleep(20); 1613 cx_clear(GP0_IO, 0x00000004); 1614 msleep(20); 1615 cx_set(GP0_IO, 0x00040004); 1616 break; 1617 case CX23885_BOARD_TBS_6920: 1618 case CX23885_BOARD_TBS_6980: 1619 case CX23885_BOARD_TBS_6981: 1620 case CX23885_BOARD_PROF_8000: 1621 cx_write(MC417_CTL, 0x00000036); 1622 cx_write(MC417_OEN, 0x00001000); 1623 cx_set(MC417_RWD, 0x00000002); 1624 msleep(200); 1625 cx_clear(MC417_RWD, 0x00000800); 1626 msleep(200); 1627 cx_set(MC417_RWD, 0x00000800); 1628 msleep(200); 1629 break; 1630 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: 1631 /* GPIO-0 INTA from CiMax1 1632 GPIO-1 INTB from CiMax2 1633 GPIO-2 reset chips 1634 GPIO-3 to GPIO-10 data/addr for CA 1635 GPIO-11 ~CS0 to CiMax1 1636 GPIO-12 ~CS1 to CiMax2 1637 GPIO-13 ADL0 load LSB addr 1638 GPIO-14 ADL1 load MSB addr 1639 GPIO-15 ~RDY from CiMax 1640 GPIO-17 ~RD to CiMax 1641 GPIO-18 ~WR to CiMax 1642 */ 1643 cx_set(GP0_IO, 0x00040000); /* GPIO as out */ 1644 /* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */ 1645 cx_clear(GP0_IO, 0x00030004); 1646 msleep(100);/* reset delay */ 1647 cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */ 1648 cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */ 1649 /* GPIO-15 IN as ~ACK, rest as OUT */ 1650 cx_write(MC417_OEN, 0x00001000); 1651 /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */ 1652 cx_write(MC417_RWD, 0x0000c300); 1653 /* enable irq */ 1654 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/ 1655 break; 1656 case CX23885_BOARD_HAUPPAUGE_HVR1270: 1657 case CX23885_BOARD_HAUPPAUGE_HVR1275: 1658 case CX23885_BOARD_HAUPPAUGE_HVR1255: 1659 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111: 1660 case CX23885_BOARD_HAUPPAUGE_HVR1210: 1661 /* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */ 1662 /* GPIO-6 I2C Gate which can isolate the demod from the bus */ 1663 /* GPIO-9 Demod reset */ 1664 1665 /* Put the parts into reset and back */ 1666 cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1); 1667 cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5); 1668 cx23885_gpio_clear(dev, GPIO_9); 1669 msleep(20); 1670 cx23885_gpio_set(dev, GPIO_9); 1671 break; 1672 case CX23885_BOARD_MYGICA_X8506: 1673 case CX23885_BOARD_MAGICPRO_PROHDTVE2: 1674 case CX23885_BOARD_MYGICA_X8507: 1675 /* GPIO-0 (0)Analog / (1)Digital TV */ 1676 /* GPIO-1 reset XC5000 */ 1677 /* GPIO-2 demod reset */ 1678 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1 | GPIO_2, 1); 1679 cx23885_gpio_clear(dev, GPIO_1 | GPIO_2); 1680 msleep(100); 1681 cx23885_gpio_set(dev, GPIO_0 | GPIO_1 | GPIO_2); 1682 msleep(100); 1683 break; 1684 case CX23885_BOARD_MYGICA_X8558PRO: 1685 /* GPIO-0 reset first ATBM8830 */ 1686 /* GPIO-1 reset second ATBM8830 */ 1687 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1); 1688 cx23885_gpio_clear(dev, GPIO_0 | GPIO_1); 1689 msleep(100); 1690 cx23885_gpio_set(dev, GPIO_0 | GPIO_1); 1691 msleep(100); 1692 break; 1693 case CX23885_BOARD_HAUPPAUGE_HVR1850: 1694 case CX23885_BOARD_HAUPPAUGE_HVR1290: 1695 /* GPIO-0 656_CLK */ 1696 /* GPIO-1 656_D0 */ 1697 /* GPIO-2 Wake# */ 1698 /* GPIO-3-10 cx23417 data0-7 */ 1699 /* GPIO-11-14 cx23417 addr0-3 */ 1700 /* GPIO-15-18 cx23417 READY, CS, RD, WR */ 1701 /* GPIO-19 IR_RX */ 1702 /* GPIO-20 C_IR_TX */ 1703 /* GPIO-21 I2S DAT */ 1704 /* GPIO-22 I2S WCLK */ 1705 /* GPIO-23 I2S BCLK */ 1706 /* ALT GPIO: EXP GPIO LATCH */ 1707 1708 /* CX23417 GPIO's */ 1709 /* GPIO-14 S5H1411/CX24228 Reset */ 1710 /* GPIO-13 EEPROM write protect */ 1711 mc417_gpio_enable(dev, GPIO_14 | GPIO_13, 1); 1712 1713 /* Put the demod into reset and protect the eeprom */ 1714 mc417_gpio_clear(dev, GPIO_14 | GPIO_13); 1715 msleep(100); 1716 1717 /* Bring the demod out of reset */ 1718 mc417_gpio_set(dev, GPIO_14); 1719 msleep(100); 1720 1721 /* CX24228 GPIO */ 1722 /* Connected to IF / Mux */ 1723 break; 1724 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID: 1725 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */ 1726 break; 1727 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: 1728 /* GPIO-0 ~INT in 1729 GPIO-1 TMS out 1730 GPIO-2 ~reset chips out 1731 GPIO-3 to GPIO-10 data/addr for CA in/out 1732 GPIO-11 ~CS out 1733 GPIO-12 ADDR out 1734 GPIO-13 ~WR out 1735 GPIO-14 ~RD out 1736 GPIO-15 ~RDY in 1737 GPIO-16 TCK out 1738 GPIO-17 TDO in 1739 GPIO-18 TDI out 1740 */ 1741 cx_set(GP0_IO, 0x00060000); /* GPIO-1,2 as out */ 1742 /* GPIO-0 as INT, reset & TMS low */ 1743 cx_clear(GP0_IO, 0x00010006); 1744 msleep(100);/* reset delay */ 1745 cx_set(GP0_IO, 0x00000004); /* reset high */ 1746 cx_write(MC417_CTL, 0x00000037);/* enable GPIO-3..18 pins */ 1747 /* GPIO-17 is TDO in, GPIO-15 is ~RDY in, rest is out */ 1748 cx_write(MC417_OEN, 0x00005000); 1749 /* ~RD, ~WR high; ADDR low; ~CS high */ 1750 cx_write(MC417_RWD, 0x00000d00); 1751 /* enable irq */ 1752 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/ 1753 break; 1754 case CX23885_BOARD_HAUPPAUGE_HVR4400: 1755 case CX23885_BOARD_HAUPPAUGE_STARBURST: 1756 /* GPIO-8 tda10071 demod reset */ 1757 /* GPIO-9 si2165 demod reset (only HVR4400/HVR5500)*/ 1758 1759 /* Put the parts into reset and back */ 1760 cx23885_gpio_enable(dev, GPIO_8 | GPIO_9, 1); 1761 1762 cx23885_gpio_clear(dev, GPIO_8 | GPIO_9); 1763 msleep(100); 1764 cx23885_gpio_set(dev, GPIO_8 | GPIO_9); 1765 msleep(100); 1766 1767 break; 1768 case CX23885_BOARD_AVERMEDIA_HC81R: 1769 cx_clear(MC417_CTL, 1); 1770 /* GPIO-0,1,2 setup direction as output */ 1771 cx_set(GP0_IO, 0x00070000); 1772 usleep_range(10000, 11000); 1773 /* AF9013 demod reset */ 1774 cx_set(GP0_IO, 0x00010001); 1775 usleep_range(10000, 11000); 1776 cx_clear(GP0_IO, 0x00010001); 1777 usleep_range(10000, 11000); 1778 cx_set(GP0_IO, 0x00010001); 1779 usleep_range(10000, 11000); 1780 /* demod tune? */ 1781 cx_clear(GP0_IO, 0x00030003); 1782 usleep_range(10000, 11000); 1783 cx_set(GP0_IO, 0x00020002); 1784 usleep_range(10000, 11000); 1785 cx_set(GP0_IO, 0x00010001); 1786 usleep_range(10000, 11000); 1787 cx_clear(GP0_IO, 0x00020002); 1788 /* XC3028L tuner reset */ 1789 cx_set(GP0_IO, 0x00040004); 1790 cx_clear(GP0_IO, 0x00040004); 1791 cx_set(GP0_IO, 0x00040004); 1792 msleep(60); 1793 break; 1794 case CX23885_BOARD_DVBSKY_T9580: 1795 case CX23885_BOARD_DVBSKY_S952: 1796 case CX23885_BOARD_DVBSKY_T982: 1797 /* enable GPIO3-18 pins */ 1798 cx_write(MC417_CTL, 0x00000037); 1799 cx23885_gpio_enable(dev, GPIO_2 | GPIO_11, 1); 1800 cx23885_gpio_clear(dev, GPIO_2 | GPIO_11); 1801 msleep(100); 1802 cx23885_gpio_set(dev, GPIO_2 | GPIO_11); 1803 break; 1804 case CX23885_BOARD_DVBSKY_T980C: 1805 case CX23885_BOARD_DVBSKY_S950C: 1806 case CX23885_BOARD_TT_CT2_4500_CI: 1807 /* 1808 * GPIO-0 INTA from CiMax, input 1809 * GPIO-1 reset CiMax, output, high active 1810 * GPIO-2 reset demod, output, low active 1811 * GPIO-3 to GPIO-10 data/addr for CAM 1812 * GPIO-11 ~CS0 to CiMax1 1813 * GPIO-12 ~CS1 to CiMax2 1814 * GPIO-13 ADL0 load LSB addr 1815 * GPIO-14 ADL1 load MSB addr 1816 * GPIO-15 ~RDY from CiMax 1817 * GPIO-17 ~RD to CiMax 1818 * GPIO-18 ~WR to CiMax 1819 */ 1820 1821 cx_set(GP0_IO, 0x00060002); /* GPIO 1/2 as output */ 1822 cx_clear(GP0_IO, 0x00010004); /* GPIO 0 as input */ 1823 msleep(100); /* reset delay */ 1824 cx_set(GP0_IO, 0x00060004); /* GPIO as out, reset high */ 1825 cx_clear(GP0_IO, 0x00010002); 1826 cx_write(MC417_CTL, 0x00000037); /* enable GPIO3-18 pins */ 1827 1828 /* GPIO-15 IN as ~ACK, rest as OUT */ 1829 cx_write(MC417_OEN, 0x00001000); 1830 1831 /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */ 1832 cx_write(MC417_RWD, 0x0000c300); 1833 1834 /* enable irq */ 1835 cx_write(GPIO_ISM, 0x00000000); /* INTERRUPTS active low */ 1836 break; 1837 case CX23885_BOARD_DVBSKY_S950: 1838 cx23885_gpio_enable(dev, GPIO_2, 1); 1839 cx23885_gpio_clear(dev, GPIO_2); 1840 msleep(100); 1841 cx23885_gpio_set(dev, GPIO_2); 1842 break; 1843 case CX23885_BOARD_HAUPPAUGE_HVR5525: 1844 case CX23885_BOARD_HAUPPAUGE_STARBURST2: 1845 /* 1846 * HVR5525 GPIO Details: 1847 * GPIO-00 IR_WIDE 1848 * GPIO-02 wake# 1849 * GPIO-03 VAUX Pres. 1850 * GPIO-07 PROG# 1851 * GPIO-08 SAT_RESN 1852 * GPIO-09 TER_RESN 1853 * GPIO-10 B2_SENSE 1854 * GPIO-11 B1_SENSE 1855 * GPIO-15 IR_LED_STATUS 1856 * GPIO-19 IR_NARROW 1857 * GPIO-20 Blauster1 1858 * ALTGPIO VAUX_SWITCH 1859 * AUX_PLL_CLK : Blaster2 1860 */ 1861 /* Put the parts into reset and back */ 1862 cx23885_gpio_enable(dev, GPIO_8 | GPIO_9, 1); 1863 cx23885_gpio_clear(dev, GPIO_8 | GPIO_9); 1864 msleep(100); 1865 cx23885_gpio_set(dev, GPIO_8 | GPIO_9); 1866 msleep(100); 1867 break; 1868 case CX23885_BOARD_VIEWCAST_260E: 1869 case CX23885_BOARD_VIEWCAST_460E: 1870 /* For documentation purposes, it's worth noting that this 1871 * card does not have any GPIO's connected to subcomponents. 1872 */ 1873 break; 1874 case CX23885_BOARD_HAUPPAUGE_HVR1265_K4: 1875 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB: 1876 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB_885: 1877 case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC: 1878 case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC_885: 1879 /* 1880 * GPIO-08 TER1_RESN 1881 * GPIO-09 TER2_RESN 1882 */ 1883 /* Put the parts into reset and back */ 1884 cx23885_gpio_enable(dev, GPIO_8 | GPIO_9, 1); 1885 cx23885_gpio_clear(dev, GPIO_8 | GPIO_9); 1886 msleep(100); 1887 cx23885_gpio_set(dev, GPIO_8 | GPIO_9); 1888 msleep(100); 1889 break; 1890 } 1891 } 1892 1893 int cx23885_ir_init(struct cx23885_dev *dev) 1894 { 1895 static struct v4l2_subdev_io_pin_config ir_rxtx_pin_cfg[] = { 1896 { 1897 .flags = BIT(V4L2_SUBDEV_IO_PIN_INPUT), 1898 .pin = CX23885_PIN_IR_RX_GPIO19, 1899 .function = CX23885_PAD_IR_RX, 1900 .value = 0, 1901 .strength = CX25840_PIN_DRIVE_MEDIUM, 1902 }, { 1903 .flags = BIT(V4L2_SUBDEV_IO_PIN_OUTPUT), 1904 .pin = CX23885_PIN_IR_TX_GPIO20, 1905 .function = CX23885_PAD_IR_TX, 1906 .value = 0, 1907 .strength = CX25840_PIN_DRIVE_MEDIUM, 1908 } 1909 }; 1910 const size_t ir_rxtx_pin_cfg_count = ARRAY_SIZE(ir_rxtx_pin_cfg); 1911 1912 static struct v4l2_subdev_io_pin_config ir_rx_pin_cfg[] = { 1913 { 1914 .flags = BIT(V4L2_SUBDEV_IO_PIN_INPUT), 1915 .pin = CX23885_PIN_IR_RX_GPIO19, 1916 .function = CX23885_PAD_IR_RX, 1917 .value = 0, 1918 .strength = CX25840_PIN_DRIVE_MEDIUM, 1919 } 1920 }; 1921 const size_t ir_rx_pin_cfg_count = ARRAY_SIZE(ir_rx_pin_cfg); 1922 1923 struct v4l2_subdev_ir_parameters params; 1924 int ret = 0; 1925 switch (dev->board) { 1926 case CX23885_BOARD_HAUPPAUGE_HVR1500: 1927 case CX23885_BOARD_HAUPPAUGE_HVR1500Q: 1928 case CX23885_BOARD_HAUPPAUGE_HVR1800: 1929 case CX23885_BOARD_HAUPPAUGE_HVR1200: 1930 case CX23885_BOARD_HAUPPAUGE_HVR1400: 1931 case CX23885_BOARD_HAUPPAUGE_HVR1275: 1932 case CX23885_BOARD_HAUPPAUGE_HVR1255: 1933 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111: 1934 case CX23885_BOARD_HAUPPAUGE_HVR1210: 1935 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB: 1936 case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC: 1937 /* FIXME: Implement me */ 1938 break; 1939 case CX23885_BOARD_HAUPPAUGE_HVR1270: 1940 ret = cx23888_ir_probe(dev); 1941 if (ret) 1942 break; 1943 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR); 1944 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config, 1945 ir_rx_pin_cfg_count, ir_rx_pin_cfg); 1946 break; 1947 case CX23885_BOARD_HAUPPAUGE_HVR1850: 1948 case CX23885_BOARD_HAUPPAUGE_HVR1290: 1949 ret = cx23888_ir_probe(dev); 1950 if (ret) 1951 break; 1952 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR); 1953 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config, 1954 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg); 1955 /* 1956 * For these boards we need to invert the Tx output via the 1957 * IR controller to have the LED off while idle 1958 */ 1959 v4l2_subdev_call(dev->sd_ir, ir, tx_g_parameters, ¶ms); 1960 params.enable = false; 1961 params.shutdown = false; 1962 params.invert_level = true; 1963 v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, ¶ms); 1964 params.shutdown = true; 1965 v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, ¶ms); 1966 break; 1967 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL: 1968 case CX23885_BOARD_TEVII_S470: 1969 case CX23885_BOARD_MYGICA_X8507: 1970 case CX23885_BOARD_TBS_6980: 1971 case CX23885_BOARD_TBS_6981: 1972 case CX23885_BOARD_DVBSKY_T9580: 1973 case CX23885_BOARD_DVBSKY_T980C: 1974 case CX23885_BOARD_DVBSKY_S950C: 1975 case CX23885_BOARD_TT_CT2_4500_CI: 1976 case CX23885_BOARD_DVBSKY_S950: 1977 case CX23885_BOARD_DVBSKY_S952: 1978 case CX23885_BOARD_DVBSKY_T982: 1979 if (!enable_885_ir) 1980 break; 1981 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE); 1982 if (dev->sd_ir == NULL) { 1983 ret = -ENODEV; 1984 break; 1985 } 1986 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config, 1987 ir_rx_pin_cfg_count, ir_rx_pin_cfg); 1988 break; 1989 case CX23885_BOARD_HAUPPAUGE_HVR1250: 1990 if (!enable_885_ir) 1991 break; 1992 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE); 1993 if (dev->sd_ir == NULL) { 1994 ret = -ENODEV; 1995 break; 1996 } 1997 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config, 1998 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg); 1999 break; 2000 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: 2001 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2: 2002 request_module("ir-kbd-i2c"); 2003 break; 2004 } 2005 2006 return ret; 2007 } 2008 2009 void cx23885_ir_fini(struct cx23885_dev *dev) 2010 { 2011 switch (dev->board) { 2012 case CX23885_BOARD_HAUPPAUGE_HVR1270: 2013 case CX23885_BOARD_HAUPPAUGE_HVR1850: 2014 case CX23885_BOARD_HAUPPAUGE_HVR1290: 2015 cx23885_irq_remove(dev, PCI_MSK_IR); 2016 cx23888_ir_remove(dev); 2017 dev->sd_ir = NULL; 2018 break; 2019 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL: 2020 case CX23885_BOARD_TEVII_S470: 2021 case CX23885_BOARD_HAUPPAUGE_HVR1250: 2022 case CX23885_BOARD_MYGICA_X8507: 2023 case CX23885_BOARD_TBS_6980: 2024 case CX23885_BOARD_TBS_6981: 2025 case CX23885_BOARD_DVBSKY_T9580: 2026 case CX23885_BOARD_DVBSKY_T980C: 2027 case CX23885_BOARD_DVBSKY_S950C: 2028 case CX23885_BOARD_TT_CT2_4500_CI: 2029 case CX23885_BOARD_DVBSKY_S950: 2030 case CX23885_BOARD_DVBSKY_S952: 2031 case CX23885_BOARD_DVBSKY_T982: 2032 cx23885_irq_remove(dev, PCI_MSK_AV_CORE); 2033 /* sd_ir is a duplicate pointer to the AV Core, just clear it */ 2034 dev->sd_ir = NULL; 2035 break; 2036 } 2037 } 2038 2039 static int netup_jtag_io(void *device, int tms, int tdi, int read_tdo) 2040 { 2041 int data; 2042 int tdo = 0; 2043 struct cx23885_dev *dev = (struct cx23885_dev *)device; 2044 /*TMS*/ 2045 data = ((cx_read(GP0_IO)) & (~0x00000002)); 2046 data |= (tms ? 0x00020002 : 0x00020000); 2047 cx_write(GP0_IO, data); 2048 2049 /*TDI*/ 2050 data = ((cx_read(MC417_RWD)) & (~0x0000a000)); 2051 data |= (tdi ? 0x00008000 : 0); 2052 cx_write(MC417_RWD, data); 2053 if (read_tdo) 2054 tdo = (data & 0x00004000) ? 1 : 0; /*TDO*/ 2055 2056 cx_write(MC417_RWD, data | 0x00002000); 2057 udelay(1); 2058 /*TCK*/ 2059 cx_write(MC417_RWD, data); 2060 2061 return tdo; 2062 } 2063 2064 void cx23885_ir_pci_int_enable(struct cx23885_dev *dev) 2065 { 2066 switch (dev->board) { 2067 case CX23885_BOARD_HAUPPAUGE_HVR1270: 2068 case CX23885_BOARD_HAUPPAUGE_HVR1850: 2069 case CX23885_BOARD_HAUPPAUGE_HVR1290: 2070 if (dev->sd_ir) 2071 cx23885_irq_add_enable(dev, PCI_MSK_IR); 2072 break; 2073 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL: 2074 case CX23885_BOARD_TEVII_S470: 2075 case CX23885_BOARD_HAUPPAUGE_HVR1250: 2076 case CX23885_BOARD_MYGICA_X8507: 2077 case CX23885_BOARD_TBS_6980: 2078 case CX23885_BOARD_TBS_6981: 2079 case CX23885_BOARD_DVBSKY_T9580: 2080 case CX23885_BOARD_DVBSKY_T980C: 2081 case CX23885_BOARD_DVBSKY_S950C: 2082 case CX23885_BOARD_TT_CT2_4500_CI: 2083 case CX23885_BOARD_DVBSKY_S950: 2084 case CX23885_BOARD_DVBSKY_S952: 2085 case CX23885_BOARD_DVBSKY_T982: 2086 if (dev->sd_ir) 2087 cx23885_irq_add_enable(dev, PCI_MSK_AV_CORE); 2088 break; 2089 } 2090 } 2091 2092 void cx23885_card_setup(struct cx23885_dev *dev) 2093 { 2094 struct cx23885_tsport *ts1 = &dev->ts1; 2095 struct cx23885_tsport *ts2 = &dev->ts2; 2096 2097 static u8 eeprom[256]; 2098 2099 if (dev->i2c_bus[0].i2c_rc == 0) { 2100 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1; 2101 tveeprom_read(&dev->i2c_bus[0].i2c_client, 2102 eeprom, sizeof(eeprom)); 2103 } 2104 2105 switch (dev->board) { 2106 case CX23885_BOARD_HAUPPAUGE_HVR1250: 2107 if (dev->i2c_bus[0].i2c_rc == 0) { 2108 if (eeprom[0x80] != 0x84) 2109 hauppauge_eeprom(dev, eeprom+0xc0); 2110 else 2111 hauppauge_eeprom(dev, eeprom+0x80); 2112 } 2113 break; 2114 case CX23885_BOARD_HAUPPAUGE_HVR1500: 2115 case CX23885_BOARD_HAUPPAUGE_HVR1500Q: 2116 case CX23885_BOARD_HAUPPAUGE_HVR1400: 2117 if (dev->i2c_bus[0].i2c_rc == 0) 2118 hauppauge_eeprom(dev, eeprom+0x80); 2119 break; 2120 case CX23885_BOARD_HAUPPAUGE_HVR1800: 2121 case CX23885_BOARD_HAUPPAUGE_HVR1800lp: 2122 case CX23885_BOARD_HAUPPAUGE_HVR1200: 2123 case CX23885_BOARD_HAUPPAUGE_HVR1700: 2124 case CX23885_BOARD_HAUPPAUGE_HVR1270: 2125 case CX23885_BOARD_HAUPPAUGE_HVR1275: 2126 case CX23885_BOARD_HAUPPAUGE_HVR1255: 2127 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111: 2128 case CX23885_BOARD_HAUPPAUGE_HVR1210: 2129 case CX23885_BOARD_HAUPPAUGE_HVR1850: 2130 case CX23885_BOARD_HAUPPAUGE_HVR1290: 2131 case CX23885_BOARD_HAUPPAUGE_HVR4400: 2132 case CX23885_BOARD_HAUPPAUGE_STARBURST: 2133 case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE: 2134 case CX23885_BOARD_HAUPPAUGE_HVR5525: 2135 case CX23885_BOARD_HAUPPAUGE_HVR1265_K4: 2136 case CX23885_BOARD_HAUPPAUGE_STARBURST2: 2137 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB: 2138 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB_885: 2139 case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC: 2140 case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC_885: 2141 if (dev->i2c_bus[0].i2c_rc == 0) 2142 hauppauge_eeprom(dev, eeprom+0xc0); 2143 break; 2144 case CX23885_BOARD_VIEWCAST_260E: 2145 case CX23885_BOARD_VIEWCAST_460E: 2146 dev->i2c_bus[1].i2c_client.addr = 0xa0 >> 1; 2147 tveeprom_read(&dev->i2c_bus[1].i2c_client, 2148 eeprom, sizeof(eeprom)); 2149 if (dev->i2c_bus[0].i2c_rc == 0) 2150 viewcast_eeprom(dev, eeprom); 2151 break; 2152 } 2153 2154 switch (dev->board) { 2155 case CX23885_BOARD_AVERMEDIA_HC81R: 2156 /* Defaults for VID B */ 2157 ts1->gen_ctrl_val = 0x4; /* Parallel */ 2158 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2159 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2160 /* Defaults for VID C */ 2161 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */ 2162 ts2->gen_ctrl_val = 0x10e; 2163 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2164 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2165 break; 2166 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP: 2167 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: 2168 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2: 2169 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 2170 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2171 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2172 /* fall-through */ 2173 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP: 2174 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 2175 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2176 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2177 break; 2178 case CX23885_BOARD_HAUPPAUGE_HVR1850: 2179 case CX23885_BOARD_HAUPPAUGE_HVR1800: 2180 /* Defaults for VID B - Analog encoder */ 2181 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */ 2182 ts1->gen_ctrl_val = 0x10e; 2183 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2184 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2185 2186 /* APB_TSVALERR_POL (active low)*/ 2187 ts1->vld_misc_val = 0x2000; 2188 ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc); 2189 cx_write(0x130184, 0xc); 2190 2191 /* Defaults for VID C */ 2192 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 2193 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2194 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2195 break; 2196 case CX23885_BOARD_TBS_6920: 2197 ts1->gen_ctrl_val = 0x4; /* Parallel */ 2198 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2199 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2200 break; 2201 case CX23885_BOARD_TEVII_S470: 2202 case CX23885_BOARD_TEVII_S471: 2203 case CX23885_BOARD_DVBWORLD_2005: 2204 case CX23885_BOARD_PROF_8000: 2205 case CX23885_BOARD_DVBSKY_T980C: 2206 case CX23885_BOARD_DVBSKY_S950C: 2207 case CX23885_BOARD_TT_CT2_4500_CI: 2208 case CX23885_BOARD_DVBSKY_S950: 2209 ts1->gen_ctrl_val = 0x5; /* Parallel */ 2210 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2211 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2212 break; 2213 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: 2214 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: 2215 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL: 2216 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 2217 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2218 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2219 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 2220 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2221 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2222 break; 2223 case CX23885_BOARD_TBS_6980: 2224 case CX23885_BOARD_TBS_6981: 2225 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 2226 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2227 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2228 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 2229 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2230 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2231 tbs_card_init(dev); 2232 break; 2233 case CX23885_BOARD_MYGICA_X8506: 2234 case CX23885_BOARD_MAGICPRO_PROHDTVE2: 2235 case CX23885_BOARD_MYGICA_X8507: 2236 ts1->gen_ctrl_val = 0x5; /* Parallel */ 2237 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2238 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2239 break; 2240 case CX23885_BOARD_MYGICA_X8558PRO: 2241 ts1->gen_ctrl_val = 0x5; /* Parallel */ 2242 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2243 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2244 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 2245 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2246 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2247 break; 2248 case CX23885_BOARD_HAUPPAUGE_HVR4400: 2249 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 2250 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2251 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2252 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 2253 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2254 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2255 break; 2256 case CX23885_BOARD_HAUPPAUGE_STARBURST: 2257 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 2258 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2259 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2260 break; 2261 case CX23885_BOARD_DVBSKY_T9580: 2262 case CX23885_BOARD_DVBSKY_T982: 2263 ts1->gen_ctrl_val = 0x5; /* Parallel */ 2264 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2265 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2266 ts2->gen_ctrl_val = 0x8; /* Serial bus */ 2267 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2268 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2269 break; 2270 case CX23885_BOARD_DVBSKY_S952: 2271 ts1->gen_ctrl_val = 0x5; /* Parallel */ 2272 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2273 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2274 ts2->gen_ctrl_val = 0xe; /* Serial bus */ 2275 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2276 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2277 break; 2278 case CX23885_BOARD_HAUPPAUGE_HVR5525: 2279 case CX23885_BOARD_HAUPPAUGE_STARBURST2: 2280 ts1->gen_ctrl_val = 0x5; /* Parallel */ 2281 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2282 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2283 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 2284 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2285 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2286 break; 2287 case CX23885_BOARD_HAUPPAUGE_HVR1265_K4: 2288 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB: 2289 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB_885: 2290 case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC: 2291 case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC_885: 2292 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 2293 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2294 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2295 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 2296 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2297 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2298 break; 2299 case CX23885_BOARD_HAUPPAUGE_HVR1250: 2300 case CX23885_BOARD_HAUPPAUGE_HVR1500: 2301 case CX23885_BOARD_HAUPPAUGE_HVR1500Q: 2302 case CX23885_BOARD_HAUPPAUGE_HVR1800lp: 2303 case CX23885_BOARD_HAUPPAUGE_HVR1200: 2304 case CX23885_BOARD_HAUPPAUGE_HVR1700: 2305 case CX23885_BOARD_HAUPPAUGE_HVR1400: 2306 case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE: 2307 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H: 2308 case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200: 2309 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000: 2310 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F: 2311 case CX23885_BOARD_HAUPPAUGE_HVR1270: 2312 case CX23885_BOARD_HAUPPAUGE_HVR1275: 2313 case CX23885_BOARD_HAUPPAUGE_HVR1255: 2314 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111: 2315 case CX23885_BOARD_HAUPPAUGE_HVR1210: 2316 case CX23885_BOARD_COMPRO_VIDEOMATE_E800: 2317 case CX23885_BOARD_HAUPPAUGE_HVR1290: 2318 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID: 2319 default: 2320 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 2321 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2322 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2323 } 2324 2325 /* Certain boards support analog, or require the avcore to be 2326 * loaded, ensure this happens. 2327 */ 2328 switch (dev->board) { 2329 case CX23885_BOARD_TEVII_S470: 2330 /* Currently only enabled for the integrated IR controller */ 2331 if (!enable_885_ir) 2332 break; 2333 /* fall-through */ 2334 case CX23885_BOARD_HAUPPAUGE_HVR1250: 2335 case CX23885_BOARD_HAUPPAUGE_HVR1800: 2336 case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE: 2337 case CX23885_BOARD_HAUPPAUGE_HVR1800lp: 2338 case CX23885_BOARD_HAUPPAUGE_HVR1700: 2339 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H: 2340 case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200: 2341 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000: 2342 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F: 2343 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: 2344 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: 2345 case CX23885_BOARD_COMPRO_VIDEOMATE_E800: 2346 case CX23885_BOARD_HAUPPAUGE_HVR1255: 2347 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111: 2348 case CX23885_BOARD_HAUPPAUGE_HVR1265_K4: 2349 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB: 2350 case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC: 2351 case CX23885_BOARD_HAUPPAUGE_HVR1270: 2352 case CX23885_BOARD_HAUPPAUGE_HVR1850: 2353 case CX23885_BOARD_MYGICA_X8506: 2354 case CX23885_BOARD_MAGICPRO_PROHDTVE2: 2355 case CX23885_BOARD_HAUPPAUGE_HVR1290: 2356 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200: 2357 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID: 2358 case CX23885_BOARD_HAUPPAUGE_HVR1500: 2359 case CX23885_BOARD_MPX885: 2360 case CX23885_BOARD_MYGICA_X8507: 2361 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL: 2362 case CX23885_BOARD_AVERMEDIA_HC81R: 2363 case CX23885_BOARD_TBS_6980: 2364 case CX23885_BOARD_TBS_6981: 2365 case CX23885_BOARD_DVBSKY_T9580: 2366 case CX23885_BOARD_DVBSKY_T980C: 2367 case CX23885_BOARD_DVBSKY_S950C: 2368 case CX23885_BOARD_TT_CT2_4500_CI: 2369 case CX23885_BOARD_DVBSKY_S950: 2370 case CX23885_BOARD_DVBSKY_S952: 2371 case CX23885_BOARD_DVBSKY_T982: 2372 case CX23885_BOARD_VIEWCAST_260E: 2373 case CX23885_BOARD_VIEWCAST_460E: 2374 case CX23885_BOARD_AVERMEDIA_CE310B: 2375 dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev, 2376 &dev->i2c_bus[2].i2c_adap, 2377 "cx25840", 0x88 >> 1, NULL); 2378 if (dev->sd_cx25840) { 2379 /* set host data for clk_freq configuration */ 2380 v4l2_set_subdev_hostdata(dev->sd_cx25840, 2381 &dev->clk_freq); 2382 2383 dev->sd_cx25840->grp_id = CX23885_HW_AV_CORE; 2384 v4l2_subdev_call(dev->sd_cx25840, core, load_fw); 2385 } 2386 break; 2387 } 2388 2389 switch (dev->board) { 2390 case CX23885_BOARD_VIEWCAST_260E: 2391 v4l2_i2c_new_subdev(&dev->v4l2_dev, 2392 &dev->i2c_bus[0].i2c_adap, 2393 "cs3308", 0x82 >> 1, NULL); 2394 break; 2395 case CX23885_BOARD_VIEWCAST_460E: 2396 /* This cs3308 controls the audio from the breakout cable */ 2397 v4l2_i2c_new_subdev(&dev->v4l2_dev, 2398 &dev->i2c_bus[0].i2c_adap, 2399 "cs3308", 0x80 >> 1, NULL); 2400 /* This cs3308 controls the audio from the onboard header */ 2401 v4l2_i2c_new_subdev(&dev->v4l2_dev, 2402 &dev->i2c_bus[0].i2c_adap, 2403 "cs3308", 0x82 >> 1, NULL); 2404 break; 2405 } 2406 2407 /* AUX-PLL 27MHz CLK */ 2408 switch (dev->board) { 2409 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: 2410 netup_initialize(dev); 2411 break; 2412 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: { 2413 int ret; 2414 const struct firmware *fw; 2415 const char *filename = "dvb-netup-altera-01.fw"; 2416 char *action = "configure"; 2417 static struct netup_card_info cinfo; 2418 struct altera_config netup_config = { 2419 .dev = dev, 2420 .action = action, 2421 .jtag_io = netup_jtag_io, 2422 }; 2423 2424 netup_initialize(dev); 2425 2426 netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo); 2427 if (netup_card_rev) 2428 cinfo.rev = netup_card_rev; 2429 2430 switch (cinfo.rev) { 2431 case 0x4: 2432 filename = "dvb-netup-altera-04.fw"; 2433 break; 2434 default: 2435 filename = "dvb-netup-altera-01.fw"; 2436 break; 2437 } 2438 pr_info("NetUP card rev=0x%x fw_filename=%s\n", 2439 cinfo.rev, filename); 2440 2441 ret = request_firmware(&fw, filename, &dev->pci->dev); 2442 if (ret != 0) 2443 pr_err("did not find the firmware file '%s'. You can use <kernel_dir>/scripts/get_dvb_firmware to get the firmware.", 2444 filename); 2445 else 2446 altera_init(&netup_config, fw); 2447 2448 release_firmware(fw); 2449 break; 2450 } 2451 } 2452 } 2453