1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  *  Driver for the Conexant CX23885 PCIe bridge
4  *
5  *  Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
6  */
7 
8 #include "cx23885.h"
9 
10 #include <linux/init.h>
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/delay.h>
14 #include <media/drv-intf/cx25840.h>
15 #include <linux/firmware.h>
16 #include <misc/altera.h>
17 
18 #include "tuner-xc2028.h"
19 #include "netup-eeprom.h"
20 #include "netup-init.h"
21 #include "altera-ci.h"
22 #include "xc4000.h"
23 #include "xc5000.h"
24 #include "cx23888-ir.h"
25 
26 static unsigned int netup_card_rev = 4;
27 module_param(netup_card_rev, int, 0644);
28 MODULE_PARM_DESC(netup_card_rev,
29 		"NetUP Dual DVB-T/C CI card revision");
30 static unsigned int enable_885_ir;
31 module_param(enable_885_ir, int, 0644);
32 MODULE_PARM_DESC(enable_885_ir,
33 		 "Enable integrated IR controller for supported\n"
34 		 "\t\t    CX2388[57] boards that are wired for it:\n"
35 		 "\t\t\tHVR-1250 (reported safe)\n"
36 		 "\t\t\tTerraTec Cinergy T PCIe Dual (not well tested, appears to be safe)\n"
37 		 "\t\t\tTeVii S470 (reported unsafe)\n"
38 		 "\t\t    This can cause an interrupt storm with some cards.\n"
39 		 "\t\t    Default: 0 [Disabled]");
40 
41 /* ------------------------------------------------------------------ */
42 /* board config info                                                  */
43 
44 struct cx23885_board cx23885_boards[] = {
45 	[CX23885_BOARD_UNKNOWN] = {
46 		.name		= "UNKNOWN/GENERIC",
47 		/* Ensure safe default for unknown boards */
48 		.clk_freq       = 0,
49 		.input          = {{
50 			.type   = CX23885_VMUX_COMPOSITE1,
51 			.vmux   = 0,
52 		}, {
53 			.type   = CX23885_VMUX_COMPOSITE2,
54 			.vmux   = 1,
55 		}, {
56 			.type   = CX23885_VMUX_COMPOSITE3,
57 			.vmux   = 2,
58 		}, {
59 			.type   = CX23885_VMUX_COMPOSITE4,
60 			.vmux   = 3,
61 		} },
62 	},
63 	[CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
64 		.name		= "Hauppauge WinTV-HVR1800lp",
65 		.portc		= CX23885_MPEG_DVB,
66 		.input          = {{
67 			.type   = CX23885_VMUX_TELEVISION,
68 			.vmux   = 0,
69 			.gpio0  = 0xff00,
70 		}, {
71 			.type   = CX23885_VMUX_DEBUG,
72 			.vmux   = 0,
73 			.gpio0  = 0xff01,
74 		}, {
75 			.type   = CX23885_VMUX_COMPOSITE1,
76 			.vmux   = 1,
77 			.gpio0  = 0xff02,
78 		}, {
79 			.type   = CX23885_VMUX_SVIDEO,
80 			.vmux   = 2,
81 			.gpio0  = 0xff02,
82 		} },
83 	},
84 	[CX23885_BOARD_HAUPPAUGE_HVR1800] = {
85 		.name		= "Hauppauge WinTV-HVR1800",
86 		.porta		= CX23885_ANALOG_VIDEO,
87 		.portb		= CX23885_MPEG_ENCODER,
88 		.portc		= CX23885_MPEG_DVB,
89 		.tuner_type	= TUNER_PHILIPS_TDA8290,
90 		.tuner_addr	= 0x42, /* 0x84 >> 1 */
91 		.tuner_bus	= 1,
92 		.input          = {{
93 			.type   = CX23885_VMUX_TELEVISION,
94 			.vmux   =	CX25840_VIN7_CH3 |
95 					CX25840_VIN5_CH2 |
96 					CX25840_VIN2_CH1,
97 			.amux   = CX25840_AUDIO8,
98 			.gpio0  = 0,
99 		}, {
100 			.type   = CX23885_VMUX_COMPOSITE1,
101 			.vmux   =	CX25840_VIN7_CH3 |
102 					CX25840_VIN4_CH2 |
103 					CX25840_VIN6_CH1,
104 			.amux   = CX25840_AUDIO7,
105 			.gpio0  = 0,
106 		}, {
107 			.type   = CX23885_VMUX_SVIDEO,
108 			.vmux   =	CX25840_VIN7_CH3 |
109 					CX25840_VIN4_CH2 |
110 					CX25840_VIN8_CH1 |
111 					CX25840_SVIDEO_ON,
112 			.amux   = CX25840_AUDIO7,
113 			.gpio0  = 0,
114 		} },
115 	},
116 	[CX23885_BOARD_HAUPPAUGE_HVR1250] = {
117 		.name		= "Hauppauge WinTV-HVR1250",
118 		.porta		= CX23885_ANALOG_VIDEO,
119 		.portc		= CX23885_MPEG_DVB,
120 #ifdef MT2131_NO_ANALOG_SUPPORT_YET
121 		.tuner_type	= TUNER_PHILIPS_TDA8290,
122 		.tuner_addr	= 0x42, /* 0x84 >> 1 */
123 		.tuner_bus	= 1,
124 #endif
125 		.force_bff	= 1,
126 		.input          = {{
127 #ifdef MT2131_NO_ANALOG_SUPPORT_YET
128 			.type   = CX23885_VMUX_TELEVISION,
129 			.vmux   =	CX25840_VIN7_CH3 |
130 					CX25840_VIN5_CH2 |
131 					CX25840_VIN2_CH1,
132 			.amux   = CX25840_AUDIO8,
133 			.gpio0  = 0xff00,
134 		}, {
135 #endif
136 			.type   = CX23885_VMUX_COMPOSITE1,
137 			.vmux   =	CX25840_VIN7_CH3 |
138 					CX25840_VIN4_CH2 |
139 					CX25840_VIN6_CH1,
140 			.amux   = CX25840_AUDIO7,
141 			.gpio0  = 0xff02,
142 		}, {
143 			.type   = CX23885_VMUX_SVIDEO,
144 			.vmux   =	CX25840_VIN7_CH3 |
145 					CX25840_VIN4_CH2 |
146 					CX25840_VIN8_CH1 |
147 					CX25840_SVIDEO_ON,
148 			.amux   = CX25840_AUDIO7,
149 			.gpio0  = 0xff02,
150 		} },
151 	},
152 	[CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
153 		.name		= "DViCO FusionHDTV5 Express",
154 		.portb		= CX23885_MPEG_DVB,
155 	},
156 	[CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
157 		.name		= "Hauppauge WinTV-HVR1500Q",
158 		.portc		= CX23885_MPEG_DVB,
159 	},
160 	[CX23885_BOARD_HAUPPAUGE_HVR1500] = {
161 		.name		= "Hauppauge WinTV-HVR1500",
162 		.porta		= CX23885_ANALOG_VIDEO,
163 		.portc		= CX23885_MPEG_DVB,
164 		.tuner_type	= TUNER_XC2028,
165 		.tuner_addr	= 0x61, /* 0xc2 >> 1 */
166 		.input          = {{
167 			.type   = CX23885_VMUX_TELEVISION,
168 			.vmux   =	CX25840_VIN7_CH3 |
169 					CX25840_VIN5_CH2 |
170 					CX25840_VIN2_CH1,
171 			.gpio0  = 0,
172 		}, {
173 			.type   = CX23885_VMUX_COMPOSITE1,
174 			.vmux   =	CX25840_VIN7_CH3 |
175 					CX25840_VIN4_CH2 |
176 					CX25840_VIN6_CH1,
177 			.gpio0  = 0,
178 		}, {
179 			.type   = CX23885_VMUX_SVIDEO,
180 			.vmux   =	CX25840_VIN7_CH3 |
181 					CX25840_VIN4_CH2 |
182 					CX25840_VIN8_CH1 |
183 					CX25840_SVIDEO_ON,
184 			.gpio0  = 0,
185 		} },
186 	},
187 	[CX23885_BOARD_HAUPPAUGE_HVR1200] = {
188 		.name		= "Hauppauge WinTV-HVR1200",
189 		.portc		= CX23885_MPEG_DVB,
190 	},
191 	[CX23885_BOARD_HAUPPAUGE_HVR1700] = {
192 		.name		= "Hauppauge WinTV-HVR1700",
193 		.portc		= CX23885_MPEG_DVB,
194 	},
195 	[CX23885_BOARD_HAUPPAUGE_HVR1400] = {
196 		.name		= "Hauppauge WinTV-HVR1400",
197 		.portc		= CX23885_MPEG_DVB,
198 	},
199 	[CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
200 		.name		= "DViCO FusionHDTV7 Dual Express",
201 		.portb		= CX23885_MPEG_DVB,
202 		.portc		= CX23885_MPEG_DVB,
203 	},
204 	[CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
205 		.name		= "DViCO FusionHDTV DVB-T Dual Express",
206 		.portb		= CX23885_MPEG_DVB,
207 		.portc		= CX23885_MPEG_DVB,
208 	},
209 	[CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
210 		.name		= "Leadtek Winfast PxDVR3200 H",
211 		.portc		= CX23885_MPEG_DVB,
212 	},
213 	[CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200] = {
214 		.name		= "Leadtek Winfast PxPVR2200",
215 		.porta		= CX23885_ANALOG_VIDEO,
216 		.tuner_type	= TUNER_XC2028,
217 		.tuner_addr	= 0x61,
218 		.tuner_bus	= 1,
219 		.input		= {{
220 			.type	= CX23885_VMUX_TELEVISION,
221 			.vmux	= CX25840_VIN2_CH1 |
222 				  CX25840_VIN5_CH2,
223 			.amux	= CX25840_AUDIO8,
224 			.gpio0	= 0x704040,
225 		}, {
226 			.type	= CX23885_VMUX_COMPOSITE1,
227 			.vmux	= CX25840_COMPOSITE1,
228 			.amux	= CX25840_AUDIO7,
229 			.gpio0	= 0x704040,
230 		}, {
231 			.type	= CX23885_VMUX_SVIDEO,
232 			.vmux	= CX25840_SVIDEO_LUMA3 |
233 				  CX25840_SVIDEO_CHROMA4,
234 			.amux	= CX25840_AUDIO7,
235 			.gpio0	= 0x704040,
236 		}, {
237 			.type	= CX23885_VMUX_COMPONENT,
238 			.vmux	= CX25840_VIN7_CH1 |
239 				  CX25840_VIN6_CH2 |
240 				  CX25840_VIN8_CH3 |
241 				  CX25840_COMPONENT_ON,
242 			.amux	= CX25840_AUDIO7,
243 			.gpio0	= 0x704040,
244 		} },
245 	},
246 	[CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000] = {
247 		.name		= "Leadtek Winfast PxDVR3200 H XC4000",
248 		.porta		= CX23885_ANALOG_VIDEO,
249 		.portc		= CX23885_MPEG_DVB,
250 		.tuner_type	= TUNER_XC4000,
251 		.tuner_addr	= 0x61,
252 		.radio_type	= UNSET,
253 		.radio_addr	= ADDR_UNSET,
254 		.input		= {{
255 			.type	= CX23885_VMUX_TELEVISION,
256 			.vmux	= CX25840_VIN2_CH1 |
257 				  CX25840_VIN5_CH2 |
258 				  CX25840_NONE0_CH3,
259 		}, {
260 			.type	= CX23885_VMUX_COMPOSITE1,
261 			.vmux	= CX25840_COMPOSITE1,
262 		}, {
263 			.type	= CX23885_VMUX_SVIDEO,
264 			.vmux	= CX25840_SVIDEO_LUMA3 |
265 				  CX25840_SVIDEO_CHROMA4,
266 		}, {
267 			.type	= CX23885_VMUX_COMPONENT,
268 			.vmux	= CX25840_VIN7_CH1 |
269 				  CX25840_VIN6_CH2 |
270 				  CX25840_VIN8_CH3 |
271 				  CX25840_COMPONENT_ON,
272 		} },
273 	},
274 	[CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = {
275 		.name		= "Compro VideoMate E650F",
276 		.portc		= CX23885_MPEG_DVB,
277 	},
278 	[CX23885_BOARD_TBS_6920] = {
279 		.name		= "TurboSight TBS 6920",
280 		.portb		= CX23885_MPEG_DVB,
281 	},
282 	[CX23885_BOARD_TBS_6980] = {
283 		.name		= "TurboSight TBS 6980",
284 		.portb		= CX23885_MPEG_DVB,
285 		.portc		= CX23885_MPEG_DVB,
286 	},
287 	[CX23885_BOARD_TBS_6981] = {
288 		.name		= "TurboSight TBS 6981",
289 		.portb		= CX23885_MPEG_DVB,
290 		.portc		= CX23885_MPEG_DVB,
291 	},
292 	[CX23885_BOARD_TEVII_S470] = {
293 		.name		= "TeVii S470",
294 		.portb		= CX23885_MPEG_DVB,
295 	},
296 	[CX23885_BOARD_DVBWORLD_2005] = {
297 		.name		= "DVBWorld DVB-S2 2005",
298 		.portb		= CX23885_MPEG_DVB,
299 	},
300 	[CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = {
301 		.ci_type	= 1,
302 		.name		= "NetUP Dual DVB-S2 CI",
303 		.portb		= CX23885_MPEG_DVB,
304 		.portc		= CX23885_MPEG_DVB,
305 	},
306 	[CX23885_BOARD_HAUPPAUGE_HVR1270] = {
307 		.name		= "Hauppauge WinTV-HVR1270",
308 		.portc		= CX23885_MPEG_DVB,
309 	},
310 	[CX23885_BOARD_HAUPPAUGE_HVR1275] = {
311 		.name		= "Hauppauge WinTV-HVR1275",
312 		.portc		= CX23885_MPEG_DVB,
313 	},
314 	[CX23885_BOARD_HAUPPAUGE_HVR1255] = {
315 		.name		= "Hauppauge WinTV-HVR1255",
316 		.porta		= CX23885_ANALOG_VIDEO,
317 		.portc		= CX23885_MPEG_DVB,
318 		.tuner_type	= TUNER_ABSENT,
319 		.tuner_addr	= 0x42, /* 0x84 >> 1 */
320 		.force_bff	= 1,
321 		.input          = {{
322 			.type   = CX23885_VMUX_TELEVISION,
323 			.vmux   =	CX25840_VIN7_CH3 |
324 					CX25840_VIN5_CH2 |
325 					CX25840_VIN2_CH1 |
326 					CX25840_DIF_ON,
327 			.amux   = CX25840_AUDIO8,
328 		}, {
329 			.type   = CX23885_VMUX_COMPOSITE1,
330 			.vmux   =	CX25840_VIN7_CH3 |
331 					CX25840_VIN4_CH2 |
332 					CX25840_VIN6_CH1,
333 			.amux   = CX25840_AUDIO7,
334 		}, {
335 			.type   = CX23885_VMUX_SVIDEO,
336 			.vmux   =	CX25840_VIN7_CH3 |
337 					CX25840_VIN4_CH2 |
338 					CX25840_VIN8_CH1 |
339 					CX25840_SVIDEO_ON,
340 			.amux   = CX25840_AUDIO7,
341 		} },
342 	},
343 	[CX23885_BOARD_HAUPPAUGE_HVR1255_22111] = {
344 		.name		= "Hauppauge WinTV-HVR1255",
345 		.porta		= CX23885_ANALOG_VIDEO,
346 		.portc		= CX23885_MPEG_DVB,
347 		.tuner_type	= TUNER_ABSENT,
348 		.tuner_addr	= 0x42, /* 0x84 >> 1 */
349 		.force_bff	= 1,
350 		.input          = {{
351 			.type   = CX23885_VMUX_TELEVISION,
352 			.vmux   =	CX25840_VIN7_CH3 |
353 					CX25840_VIN5_CH2 |
354 					CX25840_VIN2_CH1 |
355 					CX25840_DIF_ON,
356 			.amux   = CX25840_AUDIO8,
357 		}, {
358 			.type   = CX23885_VMUX_SVIDEO,
359 			.vmux   =	CX25840_VIN7_CH3 |
360 					CX25840_VIN4_CH2 |
361 					CX25840_VIN8_CH1 |
362 					CX25840_SVIDEO_ON,
363 			.amux   = CX25840_AUDIO7,
364 		} },
365 	},
366 	[CX23885_BOARD_HAUPPAUGE_HVR1210] = {
367 		.name		= "Hauppauge WinTV-HVR1210",
368 		.portc		= CX23885_MPEG_DVB,
369 	},
370 	[CX23885_BOARD_MYGICA_X8506] = {
371 		.name		= "Mygica X8506 DMB-TH",
372 		.tuner_type = TUNER_XC5000,
373 		.tuner_addr = 0x61,
374 		.tuner_bus	= 1,
375 		.porta		= CX23885_ANALOG_VIDEO,
376 		.portb		= CX23885_MPEG_DVB,
377 		.input		= {
378 			{
379 				.type   = CX23885_VMUX_TELEVISION,
380 				.vmux   = CX25840_COMPOSITE2,
381 			},
382 			{
383 				.type   = CX23885_VMUX_COMPOSITE1,
384 				.vmux   = CX25840_COMPOSITE8,
385 			},
386 			{
387 				.type   = CX23885_VMUX_SVIDEO,
388 				.vmux   = CX25840_SVIDEO_LUMA3 |
389 						CX25840_SVIDEO_CHROMA4,
390 			},
391 			{
392 				.type   = CX23885_VMUX_COMPONENT,
393 				.vmux   = CX25840_COMPONENT_ON |
394 					CX25840_VIN1_CH1 |
395 					CX25840_VIN6_CH2 |
396 					CX25840_VIN7_CH3,
397 			},
398 		},
399 	},
400 	[CX23885_BOARD_MAGICPRO_PROHDTVE2] = {
401 		.name		= "Magic-Pro ProHDTV Extreme 2",
402 		.tuner_type = TUNER_XC5000,
403 		.tuner_addr = 0x61,
404 		.tuner_bus	= 1,
405 		.porta		= CX23885_ANALOG_VIDEO,
406 		.portb		= CX23885_MPEG_DVB,
407 		.input		= {
408 			{
409 				.type   = CX23885_VMUX_TELEVISION,
410 				.vmux   = CX25840_COMPOSITE2,
411 			},
412 			{
413 				.type   = CX23885_VMUX_COMPOSITE1,
414 				.vmux   = CX25840_COMPOSITE8,
415 			},
416 			{
417 				.type   = CX23885_VMUX_SVIDEO,
418 				.vmux   = CX25840_SVIDEO_LUMA3 |
419 						CX25840_SVIDEO_CHROMA4,
420 			},
421 			{
422 				.type   = CX23885_VMUX_COMPONENT,
423 				.vmux   = CX25840_COMPONENT_ON |
424 					CX25840_VIN1_CH1 |
425 					CX25840_VIN6_CH2 |
426 					CX25840_VIN7_CH3,
427 			},
428 		},
429 	},
430 	[CX23885_BOARD_HAUPPAUGE_HVR1850] = {
431 		.name		= "Hauppauge WinTV-HVR1850",
432 		.porta		= CX23885_ANALOG_VIDEO,
433 		.portb		= CX23885_MPEG_ENCODER,
434 		.portc		= CX23885_MPEG_DVB,
435 		.tuner_type	= TUNER_ABSENT,
436 		.tuner_addr	= 0x42, /* 0x84 >> 1 */
437 		.force_bff	= 1,
438 		.input          = {{
439 			.type   = CX23885_VMUX_TELEVISION,
440 			.vmux   =	CX25840_VIN7_CH3 |
441 					CX25840_VIN5_CH2 |
442 					CX25840_VIN2_CH1 |
443 					CX25840_DIF_ON,
444 			.amux   = CX25840_AUDIO8,
445 		}, {
446 			.type   = CX23885_VMUX_COMPOSITE1,
447 			.vmux   =	CX25840_VIN7_CH3 |
448 					CX25840_VIN4_CH2 |
449 					CX25840_VIN6_CH1,
450 			.amux   = CX25840_AUDIO7,
451 		}, {
452 			.type   = CX23885_VMUX_SVIDEO,
453 			.vmux   =	CX25840_VIN7_CH3 |
454 					CX25840_VIN4_CH2 |
455 					CX25840_VIN8_CH1 |
456 					CX25840_SVIDEO_ON,
457 			.amux   = CX25840_AUDIO7,
458 		} },
459 	},
460 	[CX23885_BOARD_COMPRO_VIDEOMATE_E800] = {
461 		.name		= "Compro VideoMate E800",
462 		.portc		= CX23885_MPEG_DVB,
463 	},
464 	[CX23885_BOARD_HAUPPAUGE_HVR1290] = {
465 		.name		= "Hauppauge WinTV-HVR1290",
466 		.portc		= CX23885_MPEG_DVB,
467 	},
468 	[CX23885_BOARD_MYGICA_X8558PRO] = {
469 		.name		= "Mygica X8558 PRO DMB-TH",
470 		.portb		= CX23885_MPEG_DVB,
471 		.portc		= CX23885_MPEG_DVB,
472 	},
473 	[CX23885_BOARD_LEADTEK_WINFAST_PXTV1200] = {
474 		.name           = "LEADTEK WinFast PxTV1200",
475 		.porta          = CX23885_ANALOG_VIDEO,
476 		.tuner_type     = TUNER_XC2028,
477 		.tuner_addr     = 0x61,
478 		.tuner_bus	= 1,
479 		.input          = {{
480 			.type   = CX23885_VMUX_TELEVISION,
481 			.vmux   = CX25840_VIN2_CH1 |
482 				  CX25840_VIN5_CH2 |
483 				  CX25840_NONE0_CH3,
484 		}, {
485 			.type   = CX23885_VMUX_COMPOSITE1,
486 			.vmux   = CX25840_COMPOSITE1,
487 		}, {
488 			.type   = CX23885_VMUX_SVIDEO,
489 			.vmux   = CX25840_SVIDEO_LUMA3 |
490 				  CX25840_SVIDEO_CHROMA4,
491 		}, {
492 			.type   = CX23885_VMUX_COMPONENT,
493 			.vmux   = CX25840_VIN7_CH1 |
494 				  CX25840_VIN6_CH2 |
495 				  CX25840_VIN8_CH3 |
496 				  CX25840_COMPONENT_ON,
497 		} },
498 	},
499 	[CX23885_BOARD_GOTVIEW_X5_3D_HYBRID] = {
500 		.name		= "GoTView X5 3D Hybrid",
501 		.tuner_type	= TUNER_XC5000,
502 		.tuner_addr	= 0x64,
503 		.tuner_bus	= 1,
504 		.porta		= CX23885_ANALOG_VIDEO,
505 		.portb		= CX23885_MPEG_DVB,
506 		.input          = {{
507 			.type   = CX23885_VMUX_TELEVISION,
508 			.vmux   = CX25840_VIN2_CH1 |
509 				  CX25840_VIN5_CH2,
510 			.gpio0	= 0x02,
511 		}, {
512 			.type   = CX23885_VMUX_COMPOSITE1,
513 			.vmux   = CX23885_VMUX_COMPOSITE1,
514 		}, {
515 			.type   = CX23885_VMUX_SVIDEO,
516 			.vmux   = CX25840_SVIDEO_LUMA3 |
517 				  CX25840_SVIDEO_CHROMA4,
518 		} },
519 	},
520 	[CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF] = {
521 		.ci_type	= 2,
522 		.name		= "NetUP Dual DVB-T/C-CI RF",
523 		.porta		= CX23885_ANALOG_VIDEO,
524 		.portb		= CX23885_MPEG_DVB,
525 		.portc		= CX23885_MPEG_DVB,
526 		.num_fds_portb	= 2,
527 		.num_fds_portc	= 2,
528 		.tuner_type	= TUNER_XC5000,
529 		.tuner_addr	= 0x64,
530 		.input          = { {
531 				.type   = CX23885_VMUX_TELEVISION,
532 				.vmux   = CX25840_COMPOSITE1,
533 		} },
534 	},
535 	[CX23885_BOARD_MPX885] = {
536 		.name		= "MPX-885",
537 		.porta		= CX23885_ANALOG_VIDEO,
538 		.input          = {{
539 			.type   = CX23885_VMUX_COMPOSITE1,
540 			.vmux   = CX25840_COMPOSITE1,
541 			.amux   = CX25840_AUDIO6,
542 			.gpio0  = 0,
543 		}, {
544 			.type   = CX23885_VMUX_COMPOSITE2,
545 			.vmux   = CX25840_COMPOSITE2,
546 			.amux   = CX25840_AUDIO6,
547 			.gpio0  = 0,
548 		}, {
549 			.type   = CX23885_VMUX_COMPOSITE3,
550 			.vmux   = CX25840_COMPOSITE3,
551 			.amux   = CX25840_AUDIO7,
552 			.gpio0  = 0,
553 		}, {
554 			.type   = CX23885_VMUX_COMPOSITE4,
555 			.vmux   = CX25840_COMPOSITE4,
556 			.amux   = CX25840_AUDIO7,
557 			.gpio0  = 0,
558 		} },
559 	},
560 	[CX23885_BOARD_MYGICA_X8507] = {
561 		.name		= "Mygica X8502/X8507 ISDB-T",
562 		.tuner_type = TUNER_XC5000,
563 		.tuner_addr = 0x61,
564 		.tuner_bus	= 1,
565 		.porta		= CX23885_ANALOG_VIDEO,
566 		.portb		= CX23885_MPEG_DVB,
567 		.input		= {
568 			{
569 				.type   = CX23885_VMUX_TELEVISION,
570 				.vmux   = CX25840_COMPOSITE2,
571 				.amux   = CX25840_AUDIO8,
572 			},
573 			{
574 				.type   = CX23885_VMUX_COMPOSITE1,
575 				.vmux   = CX25840_COMPOSITE8,
576 				.amux   = CX25840_AUDIO7,
577 			},
578 			{
579 				.type   = CX23885_VMUX_SVIDEO,
580 				.vmux   = CX25840_SVIDEO_LUMA3 |
581 						CX25840_SVIDEO_CHROMA4,
582 				.amux   = CX25840_AUDIO7,
583 			},
584 			{
585 				.type   = CX23885_VMUX_COMPONENT,
586 				.vmux   = CX25840_COMPONENT_ON |
587 					CX25840_VIN1_CH1 |
588 					CX25840_VIN6_CH2 |
589 					CX25840_VIN7_CH3,
590 				.amux   = CX25840_AUDIO7,
591 			},
592 		},
593 	},
594 	[CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL] = {
595 		.name		= "TerraTec Cinergy T PCIe Dual",
596 		.portb		= CX23885_MPEG_DVB,
597 		.portc		= CX23885_MPEG_DVB,
598 	},
599 	[CX23885_BOARD_TEVII_S471] = {
600 		.name		= "TeVii S471",
601 		.portb		= CX23885_MPEG_DVB,
602 	},
603 	[CX23885_BOARD_PROF_8000] = {
604 		.name		= "Prof Revolution DVB-S2 8000",
605 		.portb		= CX23885_MPEG_DVB,
606 	},
607 	[CX23885_BOARD_HAUPPAUGE_HVR4400] = {
608 		.name		= "Hauppauge WinTV-HVR4400/HVR5500",
609 		.porta		= CX23885_ANALOG_VIDEO,
610 		.portb		= CX23885_MPEG_DVB,
611 		.portc		= CX23885_MPEG_DVB,
612 		.tuner_type	= TUNER_NXP_TDA18271,
613 		.tuner_addr	= 0x60, /* 0xc0 >> 1 */
614 		.tuner_bus	= 1,
615 	},
616 	[CX23885_BOARD_HAUPPAUGE_STARBURST] = {
617 		.name		= "Hauppauge WinTV Starburst",
618 		.portb		= CX23885_MPEG_DVB,
619 	},
620 	[CX23885_BOARD_AVERMEDIA_HC81R] = {
621 		.name		= "AVerTV Hybrid Express Slim HC81R",
622 		.tuner_type	= TUNER_XC2028,
623 		.tuner_addr	= 0x61, /* 0xc2 >> 1 */
624 		.tuner_bus	= 1,
625 		.porta		= CX23885_ANALOG_VIDEO,
626 		.input          = {{
627 			.type   = CX23885_VMUX_TELEVISION,
628 			.vmux   = CX25840_VIN2_CH1 |
629 				  CX25840_VIN5_CH2 |
630 				  CX25840_NONE0_CH3 |
631 				  CX25840_NONE1_CH3,
632 			.amux   = CX25840_AUDIO8,
633 		}, {
634 			.type   = CX23885_VMUX_SVIDEO,
635 			.vmux   = CX25840_VIN8_CH1 |
636 				  CX25840_NONE_CH2 |
637 				  CX25840_VIN7_CH3 |
638 				  CX25840_SVIDEO_ON,
639 			.amux   = CX25840_AUDIO6,
640 		}, {
641 			.type   = CX23885_VMUX_COMPONENT,
642 			.vmux   = CX25840_VIN1_CH1 |
643 				  CX25840_NONE_CH2 |
644 				  CX25840_NONE0_CH3 |
645 				  CX25840_NONE1_CH3,
646 			.amux   = CX25840_AUDIO6,
647 		} },
648 	},
649 	[CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2] = {
650 		.name		= "DViCO FusionHDTV DVB-T Dual Express2",
651 		.portb		= CX23885_MPEG_DVB,
652 		.portc		= CX23885_MPEG_DVB,
653 	},
654 	[CX23885_BOARD_HAUPPAUGE_IMPACTVCBE] = {
655 		.name		= "Hauppauge ImpactVCB-e",
656 		.tuner_type	= TUNER_ABSENT,
657 		.porta		= CX23885_ANALOG_VIDEO,
658 		.input          = {{
659 			.type   = CX23885_VMUX_COMPOSITE1,
660 			.vmux   = CX25840_VIN7_CH3 |
661 				  CX25840_VIN4_CH2 |
662 				  CX25840_VIN6_CH1,
663 			.amux   = CX25840_AUDIO7,
664 		}, {
665 			.type   = CX23885_VMUX_SVIDEO,
666 			.vmux   = CX25840_VIN7_CH3 |
667 				  CX25840_VIN4_CH2 |
668 				  CX25840_VIN8_CH1 |
669 				  CX25840_SVIDEO_ON,
670 			.amux   = CX25840_AUDIO7,
671 		} },
672 	},
673 	[CX23885_BOARD_DVBSKY_T9580] = {
674 		.name		= "DVBSky T9580",
675 		.portb		= CX23885_MPEG_DVB,
676 		.portc		= CX23885_MPEG_DVB,
677 	},
678 	[CX23885_BOARD_DVBSKY_T980C] = {
679 		.name		= "DVBSky T980C",
680 		.portb		= CX23885_MPEG_DVB,
681 	},
682 	[CX23885_BOARD_DVBSKY_S950C] = {
683 		.name		= "DVBSky S950C",
684 		.portb		= CX23885_MPEG_DVB,
685 	},
686 	[CX23885_BOARD_TT_CT2_4500_CI] = {
687 		.name		= "Technotrend TT-budget CT2-4500 CI",
688 		.portb		= CX23885_MPEG_DVB,
689 	},
690 	[CX23885_BOARD_DVBSKY_S950] = {
691 		.name		= "DVBSky S950",
692 		.portb		= CX23885_MPEG_DVB,
693 	},
694 	[CX23885_BOARD_DVBSKY_S952] = {
695 		.name		= "DVBSky S952",
696 		.portb		= CX23885_MPEG_DVB,
697 		.portc		= CX23885_MPEG_DVB,
698 	},
699 	[CX23885_BOARD_DVBSKY_T982] = {
700 		.name		= "DVBSky T982",
701 		.portb		= CX23885_MPEG_DVB,
702 		.portc		= CX23885_MPEG_DVB,
703 	},
704 	[CX23885_BOARD_HAUPPAUGE_HVR5525] = {
705 		.name		= "Hauppauge WinTV-HVR5525",
706 		.porta		= CX23885_ANALOG_VIDEO,
707 		.portb		= CX23885_MPEG_DVB,
708 		.portc		= CX23885_MPEG_DVB,
709 		.tuner_type	= TUNER_ABSENT,
710 		.force_bff	= 1,
711 		.input		= {{
712 			.type	= CX23885_VMUX_TELEVISION,
713 			.vmux	=	CX25840_VIN7_CH3 |
714 					CX25840_VIN5_CH2 |
715 					CX25840_VIN2_CH1 |
716 					CX25840_DIF_ON,
717 			.amux   = CX25840_AUDIO8,
718 		} },
719 	},
720 	[CX23885_BOARD_VIEWCAST_260E] = {
721 		.name		= "ViewCast 260e",
722 		.porta		= CX23885_ANALOG_VIDEO,
723 		.force_bff	= 1,
724 		.input          = {{
725 			.type   = CX23885_VMUX_COMPOSITE1,
726 			.vmux   = CX25840_VIN6_CH1,
727 			.amux   = CX25840_AUDIO7,
728 		}, {
729 			.type   = CX23885_VMUX_SVIDEO,
730 			.vmux   = CX25840_VIN7_CH3 |
731 					CX25840_VIN5_CH1 |
732 					CX25840_SVIDEO_ON,
733 			.amux   = CX25840_AUDIO7,
734 		}, {
735 			.type   = CX23885_VMUX_COMPONENT,
736 			.vmux   = CX25840_VIN7_CH3 |
737 					CX25840_VIN6_CH2 |
738 					CX25840_VIN5_CH1 |
739 					CX25840_COMPONENT_ON,
740 			.amux   = CX25840_AUDIO7,
741 		} },
742 	},
743 	[CX23885_BOARD_VIEWCAST_460E] = {
744 		.name		= "ViewCast 460e",
745 		.porta		= CX23885_ANALOG_VIDEO,
746 		.force_bff	= 1,
747 		.input          = {{
748 			.type   = CX23885_VMUX_COMPOSITE1,
749 			.vmux   = CX25840_VIN4_CH1,
750 			.amux   = CX25840_AUDIO7,
751 		}, {
752 			.type   = CX23885_VMUX_SVIDEO,
753 			.vmux   = CX25840_VIN7_CH3 |
754 					CX25840_VIN6_CH1 |
755 					CX25840_SVIDEO_ON,
756 			.amux   = CX25840_AUDIO7,
757 		}, {
758 			.type   = CX23885_VMUX_COMPONENT,
759 			.vmux   = CX25840_VIN7_CH3 |
760 					CX25840_VIN6_CH1 |
761 					CX25840_VIN5_CH2 |
762 					CX25840_COMPONENT_ON,
763 			.amux   = CX25840_AUDIO7,
764 		}, {
765 			.type   = CX23885_VMUX_COMPOSITE2,
766 			.vmux   = CX25840_VIN6_CH1,
767 			.amux   = CX25840_AUDIO7,
768 		} },
769 	},
770 	[CX23885_BOARD_HAUPPAUGE_QUADHD_DVB] = {
771 		.name         = "Hauppauge WinTV-QuadHD-DVB",
772 		.porta        = CX23885_ANALOG_VIDEO,
773 		.portb        = CX23885_MPEG_DVB,
774 		.portc        = CX23885_MPEG_DVB,
775 		.tuner_type	= TUNER_ABSENT,
776 		.force_bff	= 1,
777 		.input          = {{
778 			.type   = CX23885_VMUX_TELEVISION,
779 			.vmux   =	CX25840_VIN7_CH3 |
780 					CX25840_VIN5_CH2 |
781 					CX25840_VIN2_CH1 |
782 					CX25840_DIF_ON,
783 			.amux   = CX25840_AUDIO8,
784 		} },
785 	},
786 	[CX23885_BOARD_HAUPPAUGE_QUADHD_DVB_885] = {
787 		.name         = "Hauppauge WinTV-QuadHD-DVB(885)",
788 		.portb        = CX23885_MPEG_DVB,
789 		.portc        = CX23885_MPEG_DVB,
790 		.tuner_type   = TUNER_ABSENT,
791 	},
792 	[CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC] = {
793 		.name         = "Hauppauge WinTV-QuadHD-ATSC",
794 		.porta        = CX23885_ANALOG_VIDEO,
795 		.portb        = CX23885_MPEG_DVB,
796 		.portc        = CX23885_MPEG_DVB,
797 		.tuner_type	= TUNER_ABSENT,
798 		.input          = {{
799 			.type   = CX23885_VMUX_TELEVISION,
800 			.vmux   =	CX25840_VIN7_CH3 |
801 					CX25840_VIN5_CH2 |
802 					CX25840_VIN2_CH1 |
803 					CX25840_DIF_ON,
804 			.amux   = CX25840_AUDIO8,
805 		} },
806 	},
807 	[CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC_885] = {
808 		.name         = "Hauppauge WinTV-QuadHD-ATSC(885)",
809 		.portb        = CX23885_MPEG_DVB,
810 		.portc        = CX23885_MPEG_DVB,
811 		.tuner_type   = TUNER_ABSENT,
812 	},
813 	[CX23885_BOARD_HAUPPAUGE_HVR1265_K4] = {
814 		.name		= "Hauppauge WinTV-HVR-1265(161111)",
815 		.porta          = CX23885_ANALOG_VIDEO,
816 		.portc		= CX23885_MPEG_DVB,
817 		.tuner_type     = TUNER_ABSENT,
818 		.input          = {{
819 			.type   = CX23885_VMUX_TELEVISION,
820 			.vmux   =	CX25840_VIN7_CH3 |
821 					CX25840_VIN5_CH2 |
822 					CX25840_VIN2_CH1 |
823 					CX25840_DIF_ON,
824 			.amux   = CX25840_AUDIO8,
825 		}, {
826 			.type   = CX23885_VMUX_COMPOSITE1,
827 			.vmux   =	CX25840_VIN7_CH3 |
828 					CX25840_VIN4_CH2 |
829 					CX25840_VIN6_CH1,
830 			.amux   = CX25840_AUDIO7,
831 		}, {
832 			.type   = CX23885_VMUX_SVIDEO,
833 			.vmux   =	CX25840_VIN7_CH3 |
834 					CX25840_VIN4_CH2 |
835 					CX25840_VIN8_CH1 |
836 					CX25840_SVIDEO_ON,
837 			.amux   = CX25840_AUDIO7,
838 		} },
839 	},
840 	[CX23885_BOARD_HAUPPAUGE_STARBURST2] = {
841 		.name		= "Hauppauge WinTV-Starburst2",
842 		.portb		= CX23885_MPEG_DVB,
843 	},
844 	[CX23885_BOARD_AVERMEDIA_CE310B] = {
845 		.name		= "AVerMedia CE310B",
846 		.porta		= CX23885_ANALOG_VIDEO,
847 		.force_bff	= 1,
848 		.input          = {{
849 			.type   = CX23885_VMUX_COMPOSITE1,
850 			.vmux   = CX25840_VIN1_CH1 |
851 				  CX25840_NONE_CH2 |
852 				  CX25840_NONE0_CH3,
853 			.amux   = CX25840_AUDIO7,
854 		}, {
855 			.type   = CX23885_VMUX_SVIDEO,
856 			.vmux   = CX25840_VIN8_CH1 |
857 				  CX25840_NONE_CH2 |
858 				  CX25840_VIN7_CH3 |
859 				  CX25840_SVIDEO_ON,
860 			.amux   = CX25840_AUDIO7,
861 		} },
862 	},
863 };
864 const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
865 
866 /* ------------------------------------------------------------------ */
867 /* PCI subsystem IDs                                                  */
868 
869 struct cx23885_subid cx23885_subids[] = {
870 	{
871 		.subvendor = 0x0070,
872 		.subdevice = 0x3400,
873 		.card      = CX23885_BOARD_UNKNOWN,
874 	}, {
875 		.subvendor = 0x0070,
876 		.subdevice = 0x7600,
877 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
878 	}, {
879 		.subvendor = 0x0070,
880 		.subdevice = 0x7800,
881 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1800,
882 	}, {
883 		.subvendor = 0x0070,
884 		.subdevice = 0x7801,
885 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1800,
886 	}, {
887 		.subvendor = 0x0070,
888 		.subdevice = 0x7809,
889 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1800,
890 	}, {
891 		.subvendor = 0x0070,
892 		.subdevice = 0x7911,
893 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1250,
894 	}, {
895 		.subvendor = 0x18ac,
896 		.subdevice = 0xd500,
897 		.card      = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
898 	}, {
899 		.subvendor = 0x0070,
900 		.subdevice = 0x7790,
901 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
902 	}, {
903 		.subvendor = 0x0070,
904 		.subdevice = 0x7797,
905 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
906 	}, {
907 		.subvendor = 0x0070,
908 		.subdevice = 0x7710,
909 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1500,
910 	}, {
911 		.subvendor = 0x0070,
912 		.subdevice = 0x7717,
913 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1500,
914 	}, {
915 		.subvendor = 0x0070,
916 		.subdevice = 0x71d1,
917 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1200,
918 	}, {
919 		.subvendor = 0x0070,
920 		.subdevice = 0x71d3,
921 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1200,
922 	}, {
923 		.subvendor = 0x0070,
924 		.subdevice = 0x8101,
925 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1700,
926 	}, {
927 		.subvendor = 0x0070,
928 		.subdevice = 0x8010,
929 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1400,
930 	}, {
931 		.subvendor = 0x18ac,
932 		.subdevice = 0xd618,
933 		.card      = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
934 	}, {
935 		.subvendor = 0x18ac,
936 		.subdevice = 0xdb78,
937 		.card      = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
938 	}, {
939 		.subvendor = 0x107d,
940 		.subdevice = 0x6681,
941 		.card      = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
942 	}, {
943 		.subvendor = 0x107d,
944 		.subdevice = 0x6f21,
945 		.card      = CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200,
946 	}, {
947 		.subvendor = 0x107d,
948 		.subdevice = 0x6f39,
949 		.card	   = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000,
950 	}, {
951 		.subvendor = 0x185b,
952 		.subdevice = 0xe800,
953 		.card      = CX23885_BOARD_COMPRO_VIDEOMATE_E650F,
954 	}, {
955 		.subvendor = 0x6920,
956 		.subdevice = 0x8888,
957 		.card      = CX23885_BOARD_TBS_6920,
958 	}, {
959 		.subvendor = 0x6980,
960 		.subdevice = 0x8888,
961 		.card      = CX23885_BOARD_TBS_6980,
962 	}, {
963 		.subvendor = 0x6981,
964 		.subdevice = 0x8888,
965 		.card      = CX23885_BOARD_TBS_6981,
966 	}, {
967 		.subvendor = 0xd470,
968 		.subdevice = 0x9022,
969 		.card      = CX23885_BOARD_TEVII_S470,
970 	}, {
971 		.subvendor = 0x0001,
972 		.subdevice = 0x2005,
973 		.card      = CX23885_BOARD_DVBWORLD_2005,
974 	}, {
975 		.subvendor = 0x1b55,
976 		.subdevice = 0x2a2c,
977 		.card      = CX23885_BOARD_NETUP_DUAL_DVBS2_CI,
978 	}, {
979 		.subvendor = 0x0070,
980 		.subdevice = 0x2211,
981 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1270,
982 	}, {
983 		.subvendor = 0x0070,
984 		.subdevice = 0x2215,
985 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1275,
986 	}, {
987 		.subvendor = 0x0070,
988 		.subdevice = 0x221d,
989 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1275,
990 	}, {
991 		.subvendor = 0x0070,
992 		.subdevice = 0x2251,
993 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1255,
994 	}, {
995 		.subvendor = 0x0070,
996 		.subdevice = 0x2259,
997 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1255_22111,
998 	}, {
999 		.subvendor = 0x0070,
1000 		.subdevice = 0x2291,
1001 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210,
1002 	}, {
1003 		.subvendor = 0x0070,
1004 		.subdevice = 0x2295,
1005 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210,
1006 	}, {
1007 		.subvendor = 0x0070,
1008 		.subdevice = 0x2299,
1009 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210,
1010 	}, {
1011 		.subvendor = 0x0070,
1012 		.subdevice = 0x229d,
1013 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
1014 	}, {
1015 		.subvendor = 0x0070,
1016 		.subdevice = 0x22f0,
1017 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210,
1018 	}, {
1019 		.subvendor = 0x0070,
1020 		.subdevice = 0x22f1,
1021 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1255,
1022 	}, {
1023 		.subvendor = 0x0070,
1024 		.subdevice = 0x22f2,
1025 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1275,
1026 	}, {
1027 		.subvendor = 0x0070,
1028 		.subdevice = 0x22f3,
1029 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
1030 	}, {
1031 		.subvendor = 0x0070,
1032 		.subdevice = 0x22f4,
1033 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210,
1034 	}, {
1035 		.subvendor = 0x0070,
1036 		.subdevice = 0x22f5,
1037 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
1038 	}, {
1039 		.subvendor = 0x14f1,
1040 		.subdevice = 0x8651,
1041 		.card      = CX23885_BOARD_MYGICA_X8506,
1042 	}, {
1043 		.subvendor = 0x14f1,
1044 		.subdevice = 0x8657,
1045 		.card      = CX23885_BOARD_MAGICPRO_PROHDTVE2,
1046 	}, {
1047 		.subvendor = 0x0070,
1048 		.subdevice = 0x8541,
1049 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1850,
1050 	}, {
1051 		.subvendor = 0x1858,
1052 		.subdevice = 0xe800,
1053 		.card      = CX23885_BOARD_COMPRO_VIDEOMATE_E800,
1054 	}, {
1055 		.subvendor = 0x0070,
1056 		.subdevice = 0x8551,
1057 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1290,
1058 	}, {
1059 		.subvendor = 0x14f1,
1060 		.subdevice = 0x8578,
1061 		.card      = CX23885_BOARD_MYGICA_X8558PRO,
1062 	}, {
1063 		.subvendor = 0x107d,
1064 		.subdevice = 0x6f22,
1065 		.card      = CX23885_BOARD_LEADTEK_WINFAST_PXTV1200,
1066 	}, {
1067 		.subvendor = 0x5654,
1068 		.subdevice = 0x2390,
1069 		.card      = CX23885_BOARD_GOTVIEW_X5_3D_HYBRID,
1070 	}, {
1071 		.subvendor = 0x1b55,
1072 		.subdevice = 0xe2e4,
1073 		.card      = CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF,
1074 	}, {
1075 		.subvendor = 0x14f1,
1076 		.subdevice = 0x8502,
1077 		.card      = CX23885_BOARD_MYGICA_X8507,
1078 	}, {
1079 		.subvendor = 0x153b,
1080 		.subdevice = 0x117e,
1081 		.card      = CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL,
1082 	}, {
1083 		.subvendor = 0xd471,
1084 		.subdevice = 0x9022,
1085 		.card      = CX23885_BOARD_TEVII_S471,
1086 	}, {
1087 		.subvendor = 0x8000,
1088 		.subdevice = 0x3034,
1089 		.card      = CX23885_BOARD_PROF_8000,
1090 	}, {
1091 		.subvendor = 0x0070,
1092 		.subdevice = 0xc108,
1093 		.card      = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-4400 (Model 121xxx, Hybrid DVB-T/S2, IR) */
1094 	}, {
1095 		.subvendor = 0x0070,
1096 		.subdevice = 0xc138,
1097 		.card      = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-5500 (Model 121xxx, Hybrid DVB-T/C/S2, IR) */
1098 	}, {
1099 		.subvendor = 0x0070,
1100 		.subdevice = 0xc12a,
1101 		.card      = CX23885_BOARD_HAUPPAUGE_STARBURST, /* Hauppauge WinTV Starburst (Model 121x00, DVB-S2, IR) */
1102 	}, {
1103 		.subvendor = 0x0070,
1104 		.subdevice = 0xc1f8,
1105 		.card      = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-5500 (Model 121xxx, Hybrid DVB-T/C/S2, IR) */
1106 	}, {
1107 		.subvendor = 0x1461,
1108 		.subdevice = 0xd939,
1109 		.card      = CX23885_BOARD_AVERMEDIA_HC81R,
1110 	}, {
1111 		.subvendor = 0x0070,
1112 		.subdevice = 0x7133,
1113 		.card      = CX23885_BOARD_HAUPPAUGE_IMPACTVCBE,
1114 	}, {
1115 		.subvendor = 0x0070,
1116 		.subdevice = 0x7137,
1117 		.card      = CX23885_BOARD_HAUPPAUGE_IMPACTVCBE,
1118 	}, {
1119 		.subvendor = 0x18ac,
1120 		.subdevice = 0xdb98,
1121 		.card      = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2,
1122 	}, {
1123 		.subvendor = 0x4254,
1124 		.subdevice = 0x9580,
1125 		.card      = CX23885_BOARD_DVBSKY_T9580,
1126 	}, {
1127 		.subvendor = 0x4254,
1128 		.subdevice = 0x980c,
1129 		.card      = CX23885_BOARD_DVBSKY_T980C,
1130 	}, {
1131 		.subvendor = 0x4254,
1132 		.subdevice = 0x950c,
1133 		.card      = CX23885_BOARD_DVBSKY_S950C,
1134 	}, {
1135 		.subvendor = 0x13c2,
1136 		.subdevice = 0x3013,
1137 		.card      = CX23885_BOARD_TT_CT2_4500_CI,
1138 	}, {
1139 		.subvendor = 0x4254,
1140 		.subdevice = 0x0950,
1141 		.card      = CX23885_BOARD_DVBSKY_S950,
1142 	}, {
1143 		.subvendor = 0x4254,
1144 		.subdevice = 0x0952,
1145 		.card      = CX23885_BOARD_DVBSKY_S952,
1146 	}, {
1147 		.subvendor = 0x4254,
1148 		.subdevice = 0x0982,
1149 		.card      = CX23885_BOARD_DVBSKY_T982,
1150 	}, {
1151 		.subvendor = 0x0070,
1152 		.subdevice = 0xf038,
1153 		.card      = CX23885_BOARD_HAUPPAUGE_HVR5525,
1154 	}, {
1155 		.subvendor = 0x1576,
1156 		.subdevice = 0x0260,
1157 		.card      = CX23885_BOARD_VIEWCAST_260E,
1158 	}, {
1159 		.subvendor = 0x1576,
1160 		.subdevice = 0x0460,
1161 		.card      = CX23885_BOARD_VIEWCAST_460E,
1162 	}, {
1163 		.subvendor = 0x0070,
1164 		.subdevice = 0x6a28,
1165 		.card      = CX23885_BOARD_HAUPPAUGE_QUADHD_DVB, /* Tuner Pair 1 */
1166 	}, {
1167 		.subvendor = 0x0070,
1168 		.subdevice = 0x6b28,
1169 		.card      = CX23885_BOARD_HAUPPAUGE_QUADHD_DVB, /* Tuner Pair 2 */
1170 	}, {
1171 		.subvendor = 0x0070,
1172 		.subdevice = 0x6a18,
1173 		.card      = CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC, /* Tuner Pair 1 */
1174 	}, {
1175 		.subvendor = 0x0070,
1176 		.subdevice = 0x6b18,
1177 		.card      = CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC, /* Tuner Pair 2 */
1178 	}, {
1179 		.subvendor = 0x0070,
1180 		.subdevice = 0x2a18,
1181 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1265_K4, /* Hauppauge WinTV HVR-1265 (Model 161xx1, Hybrid ATSC/QAM-B) */
1182 	}, {
1183 		.subvendor = 0x0070,
1184 		.subdevice = 0xf02a,
1185 		.card      = CX23885_BOARD_HAUPPAUGE_STARBURST2,
1186 	}, {
1187 		.subvendor = 0x1461,
1188 		.subdevice = 0x3100,
1189 		.card      = CX23885_BOARD_AVERMEDIA_CE310B,
1190 	},
1191 };
1192 const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
1193 
1194 void cx23885_card_list(struct cx23885_dev *dev)
1195 {
1196 	int i;
1197 
1198 	if (0 == dev->pci->subsystem_vendor &&
1199 	    0 == dev->pci->subsystem_device) {
1200 		pr_info("%s: Board has no valid PCIe Subsystem ID and can't\n"
1201 			"%s: be autodetected. Pass card=<n> insmod option\n"
1202 			"%s: to workaround that. Redirect complaints to the\n"
1203 			"%s: vendor of the TV card.  Best regards,\n"
1204 			"%s:         -- tux\n",
1205 			dev->name, dev->name, dev->name, dev->name, dev->name);
1206 	} else {
1207 		pr_info("%s: Your board isn't known (yet) to the driver.\n"
1208 			"%s: Try to pick one of the existing card configs via\n"
1209 			"%s: card=<n> insmod option.  Updating to the latest\n"
1210 			"%s: version might help as well.\n",
1211 			dev->name, dev->name, dev->name, dev->name);
1212 	}
1213 	pr_info("%s: Here is a list of valid choices for the card=<n> insmod option:\n",
1214 	       dev->name);
1215 	for (i = 0; i < cx23885_bcount; i++)
1216 		pr_info("%s:    card=%d -> %s\n",
1217 			dev->name, i, cx23885_boards[i].name);
1218 }
1219 
1220 static void viewcast_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
1221 {
1222 	u32 sn;
1223 
1224 	/* The serial number record begins with tag 0x59 */
1225 	if (*(eeprom_data + 0x00) != 0x59) {
1226 		pr_info("%s() eeprom records are undefined, no serial number\n",
1227 			__func__);
1228 		return;
1229 	}
1230 
1231 	sn =	(*(eeprom_data + 0x06) << 24) |
1232 		(*(eeprom_data + 0x05) << 16) |
1233 		(*(eeprom_data + 0x04) << 8) |
1234 		(*(eeprom_data + 0x03));
1235 
1236 	pr_info("%s: card '%s' sn# MM%d\n",
1237 		dev->name,
1238 		cx23885_boards[dev->board].name,
1239 		sn);
1240 }
1241 
1242 static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
1243 {
1244 	struct tveeprom tv;
1245 
1246 	tveeprom_hauppauge_analog(&tv, eeprom_data);
1247 
1248 	/* Make sure we support the board model */
1249 	switch (tv.model) {
1250 	case 22001:
1251 		/* WinTV-HVR1270 (PCIe, Retail, half height)
1252 		 * ATSC/QAM and basic analog, IR Blast */
1253 	case 22009:
1254 		/* WinTV-HVR1210 (PCIe, Retail, half height)
1255 		 * DVB-T and basic analog, IR Blast */
1256 	case 22011:
1257 		/* WinTV-HVR1270 (PCIe, Retail, half height)
1258 		 * ATSC/QAM and basic analog, IR Recv */
1259 	case 22019:
1260 		/* WinTV-HVR1210 (PCIe, Retail, half height)
1261 		 * DVB-T and basic analog, IR Recv */
1262 	case 22021:
1263 		/* WinTV-HVR1275 (PCIe, Retail, half height)
1264 		 * ATSC/QAM and basic analog, IR Recv */
1265 	case 22029:
1266 		/* WinTV-HVR1210 (PCIe, Retail, half height)
1267 		 * DVB-T and basic analog, IR Recv */
1268 	case 22101:
1269 		/* WinTV-HVR1270 (PCIe, Retail, full height)
1270 		 * ATSC/QAM and basic analog, IR Blast */
1271 	case 22109:
1272 		/* WinTV-HVR1210 (PCIe, Retail, full height)
1273 		 * DVB-T and basic analog, IR Blast */
1274 	case 22111:
1275 		/* WinTV-HVR1270 (PCIe, Retail, full height)
1276 		 * ATSC/QAM and basic analog, IR Recv */
1277 	case 22119:
1278 		/* WinTV-HVR1210 (PCIe, Retail, full height)
1279 		 * DVB-T and basic analog, IR Recv */
1280 	case 22121:
1281 		/* WinTV-HVR1275 (PCIe, Retail, full height)
1282 		 * ATSC/QAM and basic analog, IR Recv */
1283 	case 22129:
1284 		/* WinTV-HVR1210 (PCIe, Retail, full height)
1285 		 * DVB-T and basic analog, IR Recv */
1286 	case 71009:
1287 		/* WinTV-HVR1200 (PCIe, Retail, full height)
1288 		 * DVB-T and basic analog */
1289 	case 71100:
1290 		/* WinTV-ImpactVCB-e (PCIe, Retail, half height)
1291 		 * Basic analog */
1292 	case 71359:
1293 		/* WinTV-HVR1200 (PCIe, OEM, half height)
1294 		 * DVB-T and basic analog */
1295 	case 71439:
1296 		/* WinTV-HVR1200 (PCIe, OEM, half height)
1297 		 * DVB-T and basic analog */
1298 	case 71449:
1299 		/* WinTV-HVR1200 (PCIe, OEM, full height)
1300 		 * DVB-T and basic analog */
1301 	case 71939:
1302 		/* WinTV-HVR1200 (PCIe, OEM, half height)
1303 		 * DVB-T and basic analog */
1304 	case 71949:
1305 		/* WinTV-HVR1200 (PCIe, OEM, full height)
1306 		 * DVB-T and basic analog */
1307 	case 71959:
1308 		/* WinTV-HVR1200 (PCIe, OEM, full height)
1309 		 * DVB-T and basic analog */
1310 	case 71979:
1311 		/* WinTV-HVR1200 (PCIe, OEM, half height)
1312 		 * DVB-T and basic analog */
1313 	case 71999:
1314 		/* WinTV-HVR1200 (PCIe, OEM, full height)
1315 		 * DVB-T and basic analog */
1316 	case 76601:
1317 		/* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
1318 			channel ATSC and MPEG2 HW Encoder */
1319 	case 77001:
1320 		/* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
1321 			and Basic analog */
1322 	case 77011:
1323 		/* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
1324 			and Basic analog */
1325 	case 77041:
1326 		/* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
1327 			and Basic analog */
1328 	case 77051:
1329 		/* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
1330 			and Basic analog */
1331 	case 78011:
1332 		/* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
1333 			Dual channel ATSC and MPEG2 HW Encoder */
1334 	case 78501:
1335 		/* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
1336 			Dual channel ATSC and MPEG2 HW Encoder */
1337 	case 78521:
1338 		/* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
1339 			Dual channel ATSC and MPEG2 HW Encoder */
1340 	case 78531:
1341 		/* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
1342 			Dual channel ATSC and MPEG2 HW Encoder */
1343 	case 78631:
1344 		/* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
1345 			Dual channel ATSC and MPEG2 HW Encoder */
1346 	case 79001:
1347 		/* WinTV-HVR1250 (PCIe, Retail, IR, full height,
1348 			ATSC and Basic analog */
1349 	case 79101:
1350 		/* WinTV-HVR1250 (PCIe, Retail, IR, half height,
1351 			ATSC and Basic analog */
1352 	case 79501:
1353 		/* WinTV-HVR1250 (PCIe, No IR, half height,
1354 			ATSC [at least] and Basic analog) */
1355 	case 79561:
1356 		/* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
1357 			ATSC and Basic analog */
1358 	case 79571:
1359 		/* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
1360 		 ATSC and Basic analog */
1361 	case 79671:
1362 		/* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
1363 			ATSC and Basic analog */
1364 	case 80019:
1365 		/* WinTV-HVR1400 (Express Card, Retail, IR,
1366 		 * DVB-T and Basic analog */
1367 	case 81509:
1368 		/* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
1369 		 * DVB-T and MPEG2 HW Encoder */
1370 	case 81519:
1371 		/* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
1372 		 * DVB-T and MPEG2 HW Encoder */
1373 		break;
1374 	case 85021:
1375 		/* WinTV-HVR1850 (PCIe, Retail, 3.5mm in, IR, FM,
1376 			Dual channel ATSC and MPEG2 HW Encoder */
1377 		break;
1378 	case 85721:
1379 		/* WinTV-HVR1290 (PCIe, OEM, RCA in, IR,
1380 			Dual channel ATSC and Basic analog */
1381 	case 121019:
1382 		/* WinTV-HVR4400 (PCIe, DVB-S2, DVB-C/T) */
1383 		break;
1384 	case 121029:
1385 		/* WinTV-HVR5500 (PCIe, DVB-S2, DVB-C/T) */
1386 		break;
1387 	case 150329:
1388 		/* WinTV-HVR5525 (PCIe, DVB-S/S2, DVB-T/T2/C) */
1389 		break;
1390 	case 161111:
1391 		/* WinTV-HVR-1265 K4 (PCIe, Analog/ATSC/QAM-B) */
1392 		break;
1393 	case 166100: /* 888 version, hybrid */
1394 	case 166200: /* 885 version, DVB only */
1395 		/* WinTV-QuadHD (DVB) Tuner Pair 1 (PCIe, IR, half height,
1396 		   DVB-T/T2/C, DVB-T/T2/C */
1397 		break;
1398 	case 166101: /* 888 version, hybrid */
1399 	case 166201: /* 885 version, DVB only */
1400 		/* WinTV-QuadHD (DVB) Tuner Pair 2 (PCIe, IR, half height,
1401 		   DVB-T/T2/C, DVB-T/T2/C */
1402 		break;
1403 	case 165100: /* 888 version, hybrid */
1404 	case 165200: /* 885 version, digital only */
1405 		/* WinTV-QuadHD (ATSC) Tuner Pair 1 (PCIe, IR, half height,
1406 		 * ATSC/QAM-B, ATSC/QAM-B */
1407 		break;
1408 	case 165101: /* 888 version, hybrid */
1409 	case 165201: /* 885 version, digital only */
1410 		/* WinTV-QuadHD (ATSC) Tuner Pair 2 (PCIe, IR, half height,
1411 		 * ATSC/QAM-B, ATSC/QAM-B */
1412 		break;
1413 	default:
1414 		pr_warn("%s: warning: unknown hauppauge model #%d\n",
1415 			dev->name, tv.model);
1416 		break;
1417 	}
1418 
1419 	pr_info("%s: hauppauge eeprom: model=%d\n",
1420 		dev->name, tv.model);
1421 }
1422 
1423 /* Some TBS cards require initing a chip using a bitbanged SPI attached
1424    to the cx23885 gpio's. If this chip doesn't get init'ed the demod
1425    doesn't respond to any command. */
1426 static void tbs_card_init(struct cx23885_dev *dev)
1427 {
1428 	int i;
1429 	static const u8 buf[] = {
1430 		0xe0, 0x06, 0x66, 0x33, 0x65,
1431 		0x01, 0x17, 0x06, 0xde};
1432 
1433 	switch (dev->board) {
1434 	case CX23885_BOARD_TBS_6980:
1435 	case CX23885_BOARD_TBS_6981:
1436 		cx_set(GP0_IO, 0x00070007);
1437 		usleep_range(1000, 10000);
1438 		cx_clear(GP0_IO, 2);
1439 		usleep_range(1000, 10000);
1440 		for (i = 0; i < 9 * 8; i++) {
1441 			cx_clear(GP0_IO, 7);
1442 			usleep_range(1000, 10000);
1443 			cx_set(GP0_IO,
1444 				((buf[i >> 3] >> (7 - (i & 7))) & 1) | 4);
1445 			usleep_range(1000, 10000);
1446 		}
1447 		cx_set(GP0_IO, 7);
1448 		break;
1449 	}
1450 }
1451 
1452 int cx23885_tuner_callback(void *priv, int component, int command, int arg)
1453 {
1454 	struct cx23885_tsport *port = priv;
1455 	struct cx23885_dev *dev = port->dev;
1456 	u32 bitmask = 0;
1457 
1458 	if ((command == XC2028_RESET_CLK) || (command == XC2028_I2C_FLUSH))
1459 		return 0;
1460 
1461 	if (command != 0) {
1462 		pr_err("%s(): Unknown command 0x%x.\n",
1463 		       __func__, command);
1464 		return -EINVAL;
1465 	}
1466 
1467 	switch (dev->board) {
1468 	case CX23885_BOARD_HAUPPAUGE_HVR1400:
1469 	case CX23885_BOARD_HAUPPAUGE_HVR1500:
1470 	case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1471 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1472 	case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
1473 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1474 	case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1475 	case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1476 	case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
1477 		/* Tuner Reset Command */
1478 		bitmask = 0x04;
1479 		break;
1480 	case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1481 	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
1482 	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
1483 		/* Two identical tuners on two different i2c buses,
1484 		 * we need to reset the correct gpio. */
1485 		if (port->nr == 1)
1486 			bitmask = 0x01;
1487 		else if (port->nr == 2)
1488 			bitmask = 0x04;
1489 		break;
1490 	case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1491 		/* Tuner Reset Command */
1492 		bitmask = 0x02;
1493 		break;
1494 	case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1495 		altera_ci_tuner_reset(dev, port->nr);
1496 		break;
1497 	case CX23885_BOARD_AVERMEDIA_HC81R:
1498 		/* XC3028L Reset Command */
1499 		bitmask = 1 << 2;
1500 		break;
1501 	}
1502 
1503 	if (bitmask) {
1504 		/* Drive the tuner into reset and back out */
1505 		cx_clear(GP0_IO, bitmask);
1506 		mdelay(200);
1507 		cx_set(GP0_IO, bitmask);
1508 	}
1509 
1510 	return 0;
1511 }
1512 
1513 void cx23885_gpio_setup(struct cx23885_dev *dev)
1514 {
1515 	switch (dev->board) {
1516 	case CX23885_BOARD_HAUPPAUGE_HVR1250:
1517 		/* GPIO-0 cx24227 demodulator reset */
1518 		cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
1519 		break;
1520 	case CX23885_BOARD_HAUPPAUGE_HVR1500:
1521 		/* GPIO-0 cx24227 demodulator */
1522 		/* GPIO-2 xc3028 tuner */
1523 
1524 		/* Put the parts into reset */
1525 		cx_set(GP0_IO, 0x00050000);
1526 		cx_clear(GP0_IO, 0x00000005);
1527 		msleep(5);
1528 
1529 		/* Bring the parts out of reset */
1530 		cx_set(GP0_IO, 0x00050005);
1531 		break;
1532 	case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1533 		/* GPIO-0 cx24227 demodulator reset */
1534 		/* GPIO-2 xc5000 tuner reset */
1535 		cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
1536 		break;
1537 	case CX23885_BOARD_HAUPPAUGE_HVR1800:
1538 		/* GPIO-0 656_CLK */
1539 		/* GPIO-1 656_D0 */
1540 		/* GPIO-2 8295A Reset */
1541 		/* GPIO-3-10 cx23417 data0-7 */
1542 		/* GPIO-11-14 cx23417 addr0-3 */
1543 		/* GPIO-15-18 cx23417 READY, CS, RD, WR */
1544 		/* GPIO-19 IR_RX */
1545 
1546 		/* CX23417 GPIO's */
1547 		/* EIO15 Zilog Reset */
1548 		/* EIO14 S5H1409/CX24227 Reset */
1549 		mc417_gpio_enable(dev, GPIO_15 | GPIO_14, 1);
1550 
1551 		/* Put the demod into reset and protect the eeprom */
1552 		mc417_gpio_clear(dev, GPIO_15 | GPIO_14);
1553 		msleep(100);
1554 
1555 		/* Bring the demod and blaster out of reset */
1556 		mc417_gpio_set(dev, GPIO_15 | GPIO_14);
1557 		msleep(100);
1558 
1559 		/* Force the TDA8295A into reset and back */
1560 		cx23885_gpio_enable(dev, GPIO_2, 1);
1561 		cx23885_gpio_set(dev, GPIO_2);
1562 		msleep(20);
1563 		cx23885_gpio_clear(dev, GPIO_2);
1564 		msleep(20);
1565 		cx23885_gpio_set(dev, GPIO_2);
1566 		msleep(20);
1567 		break;
1568 	case CX23885_BOARD_HAUPPAUGE_HVR1200:
1569 		/* GPIO-0 tda10048 demodulator reset */
1570 		/* GPIO-2 tda18271 tuner reset */
1571 
1572 		/* Put the parts into reset and back */
1573 		cx_set(GP0_IO, 0x00050000);
1574 		msleep(20);
1575 		cx_clear(GP0_IO, 0x00000005);
1576 		msleep(20);
1577 		cx_set(GP0_IO, 0x00050005);
1578 		break;
1579 	case CX23885_BOARD_HAUPPAUGE_HVR1700:
1580 		/* GPIO-0 TDA10048 demodulator reset */
1581 		/* GPIO-2 TDA8295A Reset */
1582 		/* GPIO-3-10 cx23417 data0-7 */
1583 		/* GPIO-11-14 cx23417 addr0-3 */
1584 		/* GPIO-15-18 cx23417 READY, CS, RD, WR */
1585 
1586 		/* The following GPIO's are on the interna AVCore (cx25840) */
1587 		/* GPIO-19 IR_RX */
1588 		/* GPIO-20 IR_TX 416/DVBT Select */
1589 		/* GPIO-21 IIS DAT */
1590 		/* GPIO-22 IIS WCLK */
1591 		/* GPIO-23 IIS BCLK */
1592 
1593 		/* Put the parts into reset and back */
1594 		cx_set(GP0_IO, 0x00050000);
1595 		msleep(20);
1596 		cx_clear(GP0_IO, 0x00000005);
1597 		msleep(20);
1598 		cx_set(GP0_IO, 0x00050005);
1599 		break;
1600 	case CX23885_BOARD_HAUPPAUGE_HVR1400:
1601 		/* GPIO-0  Dibcom7000p demodulator reset */
1602 		/* GPIO-2  xc3028L tuner reset */
1603 		/* GPIO-13 LED */
1604 
1605 		/* Put the parts into reset and back */
1606 		cx_set(GP0_IO, 0x00050000);
1607 		msleep(20);
1608 		cx_clear(GP0_IO, 0x00000005);
1609 		msleep(20);
1610 		cx_set(GP0_IO, 0x00050005);
1611 		break;
1612 	case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1613 		/* GPIO-0 xc5000 tuner reset i2c bus 0 */
1614 		/* GPIO-1 s5h1409 demod reset i2c bus 0 */
1615 		/* GPIO-2 xc5000 tuner reset i2c bus 1 */
1616 		/* GPIO-3 s5h1409 demod reset i2c bus 0 */
1617 
1618 		/* Put the parts into reset and back */
1619 		cx_set(GP0_IO, 0x000f0000);
1620 		msleep(20);
1621 		cx_clear(GP0_IO, 0x0000000f);
1622 		msleep(20);
1623 		cx_set(GP0_IO, 0x000f000f);
1624 		break;
1625 	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
1626 	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
1627 		/* GPIO-0 portb xc3028 reset */
1628 		/* GPIO-1 portb zl10353 reset */
1629 		/* GPIO-2 portc xc3028 reset */
1630 		/* GPIO-3 portc zl10353 reset */
1631 
1632 		/* Put the parts into reset and back */
1633 		cx_set(GP0_IO, 0x000f0000);
1634 		msleep(20);
1635 		cx_clear(GP0_IO, 0x0000000f);
1636 		msleep(20);
1637 		cx_set(GP0_IO, 0x000f000f);
1638 		break;
1639 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1640 	case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
1641 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1642 	case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1643 	case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1644 	case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
1645 		/* GPIO-2  xc3028 tuner reset */
1646 
1647 		/* The following GPIO's are on the internal AVCore (cx25840) */
1648 		/* GPIO-?  zl10353 demod reset */
1649 
1650 		/* Put the parts into reset and back */
1651 		cx_set(GP0_IO, 0x00040000);
1652 		msleep(20);
1653 		cx_clear(GP0_IO, 0x00000004);
1654 		msleep(20);
1655 		cx_set(GP0_IO, 0x00040004);
1656 		break;
1657 	case CX23885_BOARD_TBS_6920:
1658 	case CX23885_BOARD_TBS_6980:
1659 	case CX23885_BOARD_TBS_6981:
1660 	case CX23885_BOARD_PROF_8000:
1661 		cx_write(MC417_CTL, 0x00000036);
1662 		cx_write(MC417_OEN, 0x00001000);
1663 		cx_set(MC417_RWD, 0x00000002);
1664 		msleep(200);
1665 		cx_clear(MC417_RWD, 0x00000800);
1666 		msleep(200);
1667 		cx_set(MC417_RWD, 0x00000800);
1668 		msleep(200);
1669 		break;
1670 	case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1671 		/* GPIO-0 INTA from CiMax1
1672 		   GPIO-1 INTB from CiMax2
1673 		   GPIO-2 reset chips
1674 		   GPIO-3 to GPIO-10 data/addr for CA
1675 		   GPIO-11 ~CS0 to CiMax1
1676 		   GPIO-12 ~CS1 to CiMax2
1677 		   GPIO-13 ADL0 load LSB addr
1678 		   GPIO-14 ADL1 load MSB addr
1679 		   GPIO-15 ~RDY from CiMax
1680 		   GPIO-17 ~RD to CiMax
1681 		   GPIO-18 ~WR to CiMax
1682 		 */
1683 		cx_set(GP0_IO, 0x00040000); /* GPIO as out */
1684 		/* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
1685 		cx_clear(GP0_IO, 0x00030004);
1686 		msleep(100);/* reset delay */
1687 		cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */
1688 		cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */
1689 		/* GPIO-15 IN as ~ACK, rest as OUT */
1690 		cx_write(MC417_OEN, 0x00001000);
1691 		/* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
1692 		cx_write(MC417_RWD, 0x0000c300);
1693 		/* enable irq */
1694 		cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
1695 		break;
1696 	case CX23885_BOARD_HAUPPAUGE_HVR1270:
1697 	case CX23885_BOARD_HAUPPAUGE_HVR1275:
1698 	case CX23885_BOARD_HAUPPAUGE_HVR1255:
1699 	case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
1700 	case CX23885_BOARD_HAUPPAUGE_HVR1210:
1701 		/* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */
1702 		/* GPIO-6 I2C Gate which can isolate the demod from the bus */
1703 		/* GPIO-9 Demod reset */
1704 
1705 		/* Put the parts into reset and back */
1706 		cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1);
1707 		cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5);
1708 		cx23885_gpio_clear(dev, GPIO_9);
1709 		msleep(20);
1710 		cx23885_gpio_set(dev, GPIO_9);
1711 		break;
1712 	case CX23885_BOARD_MYGICA_X8506:
1713 	case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1714 	case CX23885_BOARD_MYGICA_X8507:
1715 		/* GPIO-0 (0)Analog / (1)Digital TV */
1716 		/* GPIO-1 reset XC5000 */
1717 		/* GPIO-2 demod reset */
1718 		cx23885_gpio_enable(dev, GPIO_0 | GPIO_1 | GPIO_2, 1);
1719 		cx23885_gpio_clear(dev, GPIO_1 | GPIO_2);
1720 		msleep(100);
1721 		cx23885_gpio_set(dev, GPIO_0 | GPIO_1 | GPIO_2);
1722 		msleep(100);
1723 		break;
1724 	case CX23885_BOARD_MYGICA_X8558PRO:
1725 		/* GPIO-0 reset first ATBM8830 */
1726 		/* GPIO-1 reset second ATBM8830 */
1727 		cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1);
1728 		cx23885_gpio_clear(dev, GPIO_0 | GPIO_1);
1729 		msleep(100);
1730 		cx23885_gpio_set(dev, GPIO_0 | GPIO_1);
1731 		msleep(100);
1732 		break;
1733 	case CX23885_BOARD_HAUPPAUGE_HVR1850:
1734 	case CX23885_BOARD_HAUPPAUGE_HVR1290:
1735 		/* GPIO-0 656_CLK */
1736 		/* GPIO-1 656_D0 */
1737 		/* GPIO-2 Wake# */
1738 		/* GPIO-3-10 cx23417 data0-7 */
1739 		/* GPIO-11-14 cx23417 addr0-3 */
1740 		/* GPIO-15-18 cx23417 READY, CS, RD, WR */
1741 		/* GPIO-19 IR_RX */
1742 		/* GPIO-20 C_IR_TX */
1743 		/* GPIO-21 I2S DAT */
1744 		/* GPIO-22 I2S WCLK */
1745 		/* GPIO-23 I2S BCLK */
1746 		/* ALT GPIO: EXP GPIO LATCH */
1747 
1748 		/* CX23417 GPIO's */
1749 		/* GPIO-14 S5H1411/CX24228 Reset */
1750 		/* GPIO-13 EEPROM write protect */
1751 		mc417_gpio_enable(dev, GPIO_14 | GPIO_13, 1);
1752 
1753 		/* Put the demod into reset and protect the eeprom */
1754 		mc417_gpio_clear(dev, GPIO_14 | GPIO_13);
1755 		msleep(100);
1756 
1757 		/* Bring the demod out of reset */
1758 		mc417_gpio_set(dev, GPIO_14);
1759 		msleep(100);
1760 
1761 		/* CX24228 GPIO */
1762 		/* Connected to IF / Mux */
1763 		break;
1764 	case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1765 		cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
1766 		break;
1767 	case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1768 		/* GPIO-0 ~INT in
1769 		   GPIO-1 TMS out
1770 		   GPIO-2 ~reset chips out
1771 		   GPIO-3 to GPIO-10 data/addr for CA in/out
1772 		   GPIO-11 ~CS out
1773 		   GPIO-12 ADDR out
1774 		   GPIO-13 ~WR out
1775 		   GPIO-14 ~RD out
1776 		   GPIO-15 ~RDY in
1777 		   GPIO-16 TCK out
1778 		   GPIO-17 TDO in
1779 		   GPIO-18 TDI out
1780 		 */
1781 		cx_set(GP0_IO, 0x00060000); /* GPIO-1,2 as out */
1782 		/* GPIO-0 as INT, reset & TMS low */
1783 		cx_clear(GP0_IO, 0x00010006);
1784 		msleep(100);/* reset delay */
1785 		cx_set(GP0_IO, 0x00000004); /* reset high */
1786 		cx_write(MC417_CTL, 0x00000037);/* enable GPIO-3..18 pins */
1787 		/* GPIO-17 is TDO in, GPIO-15 is ~RDY in, rest is out */
1788 		cx_write(MC417_OEN, 0x00005000);
1789 		/* ~RD, ~WR high; ADDR low; ~CS high */
1790 		cx_write(MC417_RWD, 0x00000d00);
1791 		/* enable irq */
1792 		cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
1793 		break;
1794 	case CX23885_BOARD_HAUPPAUGE_HVR4400:
1795 	case CX23885_BOARD_HAUPPAUGE_STARBURST:
1796 		/* GPIO-8 tda10071 demod reset */
1797 		/* GPIO-9 si2165 demod reset (only HVR4400/HVR5500)*/
1798 
1799 		/* Put the parts into reset and back */
1800 		cx23885_gpio_enable(dev, GPIO_8 | GPIO_9, 1);
1801 
1802 		cx23885_gpio_clear(dev, GPIO_8 | GPIO_9);
1803 		msleep(100);
1804 		cx23885_gpio_set(dev, GPIO_8 | GPIO_9);
1805 		msleep(100);
1806 
1807 		break;
1808 	case CX23885_BOARD_AVERMEDIA_HC81R:
1809 		cx_clear(MC417_CTL, 1);
1810 		/* GPIO-0,1,2 setup direction as output */
1811 		cx_set(GP0_IO, 0x00070000);
1812 		usleep_range(10000, 11000);
1813 		/* AF9013 demod reset */
1814 		cx_set(GP0_IO, 0x00010001);
1815 		usleep_range(10000, 11000);
1816 		cx_clear(GP0_IO, 0x00010001);
1817 		usleep_range(10000, 11000);
1818 		cx_set(GP0_IO, 0x00010001);
1819 		usleep_range(10000, 11000);
1820 		/* demod tune? */
1821 		cx_clear(GP0_IO, 0x00030003);
1822 		usleep_range(10000, 11000);
1823 		cx_set(GP0_IO, 0x00020002);
1824 		usleep_range(10000, 11000);
1825 		cx_set(GP0_IO, 0x00010001);
1826 		usleep_range(10000, 11000);
1827 		cx_clear(GP0_IO, 0x00020002);
1828 		/* XC3028L tuner reset */
1829 		cx_set(GP0_IO, 0x00040004);
1830 		cx_clear(GP0_IO, 0x00040004);
1831 		cx_set(GP0_IO, 0x00040004);
1832 		msleep(60);
1833 		break;
1834 	case CX23885_BOARD_DVBSKY_T9580:
1835 	case CX23885_BOARD_DVBSKY_S952:
1836 	case CX23885_BOARD_DVBSKY_T982:
1837 		/* enable GPIO3-18 pins */
1838 		cx_write(MC417_CTL, 0x00000037);
1839 		cx23885_gpio_enable(dev, GPIO_2 | GPIO_11, 1);
1840 		cx23885_gpio_clear(dev, GPIO_2 | GPIO_11);
1841 		msleep(100);
1842 		cx23885_gpio_set(dev, GPIO_2 | GPIO_11);
1843 		break;
1844 	case CX23885_BOARD_DVBSKY_T980C:
1845 	case CX23885_BOARD_DVBSKY_S950C:
1846 	case CX23885_BOARD_TT_CT2_4500_CI:
1847 		/*
1848 		 * GPIO-0 INTA from CiMax, input
1849 		 * GPIO-1 reset CiMax, output, high active
1850 		 * GPIO-2 reset demod, output, low active
1851 		 * GPIO-3 to GPIO-10 data/addr for CAM
1852 		 * GPIO-11 ~CS0 to CiMax1
1853 		 * GPIO-12 ~CS1 to CiMax2
1854 		 * GPIO-13 ADL0 load LSB addr
1855 		 * GPIO-14 ADL1 load MSB addr
1856 		 * GPIO-15 ~RDY from CiMax
1857 		 * GPIO-17 ~RD to CiMax
1858 		 * GPIO-18 ~WR to CiMax
1859 		 */
1860 
1861 		cx_set(GP0_IO, 0x00060002); /* GPIO 1/2 as output */
1862 		cx_clear(GP0_IO, 0x00010004); /* GPIO 0 as input */
1863 		msleep(100); /* reset delay */
1864 		cx_set(GP0_IO, 0x00060004); /* GPIO as out, reset high */
1865 		cx_clear(GP0_IO, 0x00010002);
1866 		cx_write(MC417_CTL, 0x00000037); /* enable GPIO3-18 pins */
1867 
1868 		/* GPIO-15 IN as ~ACK, rest as OUT */
1869 		cx_write(MC417_OEN, 0x00001000);
1870 
1871 		/* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
1872 		cx_write(MC417_RWD, 0x0000c300);
1873 
1874 		/* enable irq */
1875 		cx_write(GPIO_ISM, 0x00000000); /* INTERRUPTS active low */
1876 		break;
1877 	case CX23885_BOARD_DVBSKY_S950:
1878 		cx23885_gpio_enable(dev, GPIO_2, 1);
1879 		cx23885_gpio_clear(dev, GPIO_2);
1880 		msleep(100);
1881 		cx23885_gpio_set(dev, GPIO_2);
1882 		break;
1883 	case CX23885_BOARD_HAUPPAUGE_HVR5525:
1884 	case CX23885_BOARD_HAUPPAUGE_STARBURST2:
1885 		/*
1886 		 * HVR5525 GPIO Details:
1887 		 *  GPIO-00 IR_WIDE
1888 		 *  GPIO-02 wake#
1889 		 *  GPIO-03 VAUX Pres.
1890 		 *  GPIO-07 PROG#
1891 		 *  GPIO-08 SAT_RESN
1892 		 *  GPIO-09 TER_RESN
1893 		 *  GPIO-10 B2_SENSE
1894 		 *  GPIO-11 B1_SENSE
1895 		 *  GPIO-15 IR_LED_STATUS
1896 		 *  GPIO-19 IR_NARROW
1897 		 *  GPIO-20 Blauster1
1898 		 *  ALTGPIO VAUX_SWITCH
1899 		 *  AUX_PLL_CLK : Blaster2
1900 		 */
1901 		/* Put the parts into reset and back */
1902 		cx23885_gpio_enable(dev, GPIO_8 | GPIO_9, 1);
1903 		cx23885_gpio_clear(dev, GPIO_8 | GPIO_9);
1904 		msleep(100);
1905 		cx23885_gpio_set(dev, GPIO_8 | GPIO_9);
1906 		msleep(100);
1907 		break;
1908 	case CX23885_BOARD_VIEWCAST_260E:
1909 	case CX23885_BOARD_VIEWCAST_460E:
1910 		/* For documentation purposes, it's worth noting that this
1911 		 * card does not have any GPIO's connected to subcomponents.
1912 		 */
1913 		break;
1914 	case CX23885_BOARD_HAUPPAUGE_HVR1265_K4:
1915 	case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
1916 	case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB_885:
1917 	case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
1918 	case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC_885:
1919 		/*
1920 		 * GPIO-08 TER1_RESN
1921 		 * GPIO-09 TER2_RESN
1922 		 */
1923 		/* Put the parts into reset and back */
1924 		cx23885_gpio_enable(dev, GPIO_8 | GPIO_9, 1);
1925 		cx23885_gpio_clear(dev, GPIO_8 | GPIO_9);
1926 		msleep(100);
1927 		cx23885_gpio_set(dev, GPIO_8 | GPIO_9);
1928 		msleep(100);
1929 		break;
1930 	}
1931 }
1932 
1933 int cx23885_ir_init(struct cx23885_dev *dev)
1934 {
1935 	static struct v4l2_subdev_io_pin_config ir_rxtx_pin_cfg[] = {
1936 		{
1937 			.flags	  = BIT(V4L2_SUBDEV_IO_PIN_INPUT),
1938 			.pin	  = CX23885_PIN_IR_RX_GPIO19,
1939 			.function = CX23885_PAD_IR_RX,
1940 			.value	  = 0,
1941 			.strength = CX25840_PIN_DRIVE_MEDIUM,
1942 		}, {
1943 			.flags	  = BIT(V4L2_SUBDEV_IO_PIN_OUTPUT),
1944 			.pin	  = CX23885_PIN_IR_TX_GPIO20,
1945 			.function = CX23885_PAD_IR_TX,
1946 			.value	  = 0,
1947 			.strength = CX25840_PIN_DRIVE_MEDIUM,
1948 		}
1949 	};
1950 	const size_t ir_rxtx_pin_cfg_count = ARRAY_SIZE(ir_rxtx_pin_cfg);
1951 
1952 	static struct v4l2_subdev_io_pin_config ir_rx_pin_cfg[] = {
1953 		{
1954 			.flags	  = BIT(V4L2_SUBDEV_IO_PIN_INPUT),
1955 			.pin	  = CX23885_PIN_IR_RX_GPIO19,
1956 			.function = CX23885_PAD_IR_RX,
1957 			.value	  = 0,
1958 			.strength = CX25840_PIN_DRIVE_MEDIUM,
1959 		}
1960 	};
1961 	const size_t ir_rx_pin_cfg_count = ARRAY_SIZE(ir_rx_pin_cfg);
1962 
1963 	struct v4l2_subdev_ir_parameters params;
1964 	int ret = 0;
1965 	switch (dev->board) {
1966 	case CX23885_BOARD_HAUPPAUGE_HVR1500:
1967 	case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1968 	case CX23885_BOARD_HAUPPAUGE_HVR1800:
1969 	case CX23885_BOARD_HAUPPAUGE_HVR1200:
1970 	case CX23885_BOARD_HAUPPAUGE_HVR1400:
1971 	case CX23885_BOARD_HAUPPAUGE_HVR1275:
1972 	case CX23885_BOARD_HAUPPAUGE_HVR1255:
1973 	case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
1974 	case CX23885_BOARD_HAUPPAUGE_HVR1210:
1975 	case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
1976 	case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
1977 		/* FIXME: Implement me */
1978 		break;
1979 	case CX23885_BOARD_HAUPPAUGE_HVR1270:
1980 		ret = cx23888_ir_probe(dev);
1981 		if (ret)
1982 			break;
1983 		dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
1984 		v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1985 				 ir_rx_pin_cfg_count, ir_rx_pin_cfg);
1986 		break;
1987 	case CX23885_BOARD_HAUPPAUGE_HVR1850:
1988 	case CX23885_BOARD_HAUPPAUGE_HVR1290:
1989 		ret = cx23888_ir_probe(dev);
1990 		if (ret)
1991 			break;
1992 		dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
1993 		v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1994 				 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
1995 		/*
1996 		 * For these boards we need to invert the Tx output via the
1997 		 * IR controller to have the LED off while idle
1998 		 */
1999 		v4l2_subdev_call(dev->sd_ir, ir, tx_g_parameters, &params);
2000 		params.enable = false;
2001 		params.shutdown = false;
2002 		params.invert_level = true;
2003 		v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, &params);
2004 		params.shutdown = true;
2005 		v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, &params);
2006 		break;
2007 	case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
2008 	case CX23885_BOARD_TEVII_S470:
2009 	case CX23885_BOARD_MYGICA_X8507:
2010 	case CX23885_BOARD_TBS_6980:
2011 	case CX23885_BOARD_TBS_6981:
2012 	case CX23885_BOARD_DVBSKY_T9580:
2013 	case CX23885_BOARD_DVBSKY_T980C:
2014 	case CX23885_BOARD_DVBSKY_S950C:
2015 	case CX23885_BOARD_TT_CT2_4500_CI:
2016 	case CX23885_BOARD_DVBSKY_S950:
2017 	case CX23885_BOARD_DVBSKY_S952:
2018 	case CX23885_BOARD_DVBSKY_T982:
2019 		if (!enable_885_ir)
2020 			break;
2021 		dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
2022 		if (dev->sd_ir == NULL) {
2023 			ret = -ENODEV;
2024 			break;
2025 		}
2026 		v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
2027 				 ir_rx_pin_cfg_count, ir_rx_pin_cfg);
2028 		break;
2029 	case CX23885_BOARD_HAUPPAUGE_HVR1250:
2030 		if (!enable_885_ir)
2031 			break;
2032 		dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
2033 		if (dev->sd_ir == NULL) {
2034 			ret = -ENODEV;
2035 			break;
2036 		}
2037 		v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
2038 				 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
2039 		break;
2040 	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
2041 	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
2042 		request_module("ir-kbd-i2c");
2043 		break;
2044 	}
2045 
2046 	return ret;
2047 }
2048 
2049 void cx23885_ir_fini(struct cx23885_dev *dev)
2050 {
2051 	switch (dev->board) {
2052 	case CX23885_BOARD_HAUPPAUGE_HVR1270:
2053 	case CX23885_BOARD_HAUPPAUGE_HVR1850:
2054 	case CX23885_BOARD_HAUPPAUGE_HVR1290:
2055 		cx23885_irq_remove(dev, PCI_MSK_IR);
2056 		cx23888_ir_remove(dev);
2057 		dev->sd_ir = NULL;
2058 		break;
2059 	case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
2060 	case CX23885_BOARD_TEVII_S470:
2061 	case CX23885_BOARD_HAUPPAUGE_HVR1250:
2062 	case CX23885_BOARD_MYGICA_X8507:
2063 	case CX23885_BOARD_TBS_6980:
2064 	case CX23885_BOARD_TBS_6981:
2065 	case CX23885_BOARD_DVBSKY_T9580:
2066 	case CX23885_BOARD_DVBSKY_T980C:
2067 	case CX23885_BOARD_DVBSKY_S950C:
2068 	case CX23885_BOARD_TT_CT2_4500_CI:
2069 	case CX23885_BOARD_DVBSKY_S950:
2070 	case CX23885_BOARD_DVBSKY_S952:
2071 	case CX23885_BOARD_DVBSKY_T982:
2072 		cx23885_irq_remove(dev, PCI_MSK_AV_CORE);
2073 		/* sd_ir is a duplicate pointer to the AV Core, just clear it */
2074 		dev->sd_ir = NULL;
2075 		break;
2076 	}
2077 }
2078 
2079 static int netup_jtag_io(void *device, int tms, int tdi, int read_tdo)
2080 {
2081 	int data;
2082 	int tdo = 0;
2083 	struct cx23885_dev *dev = (struct cx23885_dev *)device;
2084 	/*TMS*/
2085 	data = ((cx_read(GP0_IO)) & (~0x00000002));
2086 	data |= (tms ? 0x00020002 : 0x00020000);
2087 	cx_write(GP0_IO, data);
2088 
2089 	/*TDI*/
2090 	data = ((cx_read(MC417_RWD)) & (~0x0000a000));
2091 	data |= (tdi ? 0x00008000 : 0);
2092 	cx_write(MC417_RWD, data);
2093 	if (read_tdo)
2094 		tdo = (data & 0x00004000) ? 1 : 0; /*TDO*/
2095 
2096 	cx_write(MC417_RWD, data | 0x00002000);
2097 	udelay(1);
2098 	/*TCK*/
2099 	cx_write(MC417_RWD, data);
2100 
2101 	return tdo;
2102 }
2103 
2104 void cx23885_ir_pci_int_enable(struct cx23885_dev *dev)
2105 {
2106 	switch (dev->board) {
2107 	case CX23885_BOARD_HAUPPAUGE_HVR1270:
2108 	case CX23885_BOARD_HAUPPAUGE_HVR1850:
2109 	case CX23885_BOARD_HAUPPAUGE_HVR1290:
2110 		if (dev->sd_ir)
2111 			cx23885_irq_add_enable(dev, PCI_MSK_IR);
2112 		break;
2113 	case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
2114 	case CX23885_BOARD_TEVII_S470:
2115 	case CX23885_BOARD_HAUPPAUGE_HVR1250:
2116 	case CX23885_BOARD_MYGICA_X8507:
2117 	case CX23885_BOARD_TBS_6980:
2118 	case CX23885_BOARD_TBS_6981:
2119 	case CX23885_BOARD_DVBSKY_T9580:
2120 	case CX23885_BOARD_DVBSKY_T980C:
2121 	case CX23885_BOARD_DVBSKY_S950C:
2122 	case CX23885_BOARD_TT_CT2_4500_CI:
2123 	case CX23885_BOARD_DVBSKY_S950:
2124 	case CX23885_BOARD_DVBSKY_S952:
2125 	case CX23885_BOARD_DVBSKY_T982:
2126 		if (dev->sd_ir)
2127 			cx23885_irq_add_enable(dev, PCI_MSK_AV_CORE);
2128 		break;
2129 	}
2130 }
2131 
2132 void cx23885_card_setup(struct cx23885_dev *dev)
2133 {
2134 	struct cx23885_tsport *ts1 = &dev->ts1;
2135 	struct cx23885_tsport *ts2 = &dev->ts2;
2136 
2137 	static u8 eeprom[256];
2138 
2139 	if (dev->i2c_bus[0].i2c_rc == 0) {
2140 		dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
2141 		tveeprom_read(&dev->i2c_bus[0].i2c_client,
2142 			      eeprom, sizeof(eeprom));
2143 	}
2144 
2145 	switch (dev->board) {
2146 	case CX23885_BOARD_HAUPPAUGE_HVR1250:
2147 		if (dev->i2c_bus[0].i2c_rc == 0) {
2148 			if (eeprom[0x80] != 0x84)
2149 				hauppauge_eeprom(dev, eeprom+0xc0);
2150 			else
2151 				hauppauge_eeprom(dev, eeprom+0x80);
2152 		}
2153 		break;
2154 	case CX23885_BOARD_HAUPPAUGE_HVR1500:
2155 	case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
2156 	case CX23885_BOARD_HAUPPAUGE_HVR1400:
2157 		if (dev->i2c_bus[0].i2c_rc == 0)
2158 			hauppauge_eeprom(dev, eeprom+0x80);
2159 		break;
2160 	case CX23885_BOARD_HAUPPAUGE_HVR1800:
2161 	case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
2162 	case CX23885_BOARD_HAUPPAUGE_HVR1200:
2163 	case CX23885_BOARD_HAUPPAUGE_HVR1700:
2164 	case CX23885_BOARD_HAUPPAUGE_HVR1270:
2165 	case CX23885_BOARD_HAUPPAUGE_HVR1275:
2166 	case CX23885_BOARD_HAUPPAUGE_HVR1255:
2167 	case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
2168 	case CX23885_BOARD_HAUPPAUGE_HVR1210:
2169 	case CX23885_BOARD_HAUPPAUGE_HVR1850:
2170 	case CX23885_BOARD_HAUPPAUGE_HVR1290:
2171 	case CX23885_BOARD_HAUPPAUGE_HVR4400:
2172 	case CX23885_BOARD_HAUPPAUGE_STARBURST:
2173 	case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE:
2174 	case CX23885_BOARD_HAUPPAUGE_HVR5525:
2175 	case CX23885_BOARD_HAUPPAUGE_HVR1265_K4:
2176 	case CX23885_BOARD_HAUPPAUGE_STARBURST2:
2177 	case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
2178 	case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB_885:
2179 	case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
2180 	case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC_885:
2181 		if (dev->i2c_bus[0].i2c_rc == 0)
2182 			hauppauge_eeprom(dev, eeprom+0xc0);
2183 		break;
2184 	case CX23885_BOARD_VIEWCAST_260E:
2185 	case CX23885_BOARD_VIEWCAST_460E:
2186 		dev->i2c_bus[1].i2c_client.addr = 0xa0 >> 1;
2187 		tveeprom_read(&dev->i2c_bus[1].i2c_client,
2188 			      eeprom, sizeof(eeprom));
2189 		if (dev->i2c_bus[0].i2c_rc == 0)
2190 			viewcast_eeprom(dev, eeprom);
2191 		break;
2192 	}
2193 
2194 	switch (dev->board) {
2195 	case CX23885_BOARD_AVERMEDIA_HC81R:
2196 		/* Defaults for VID B */
2197 		ts1->gen_ctrl_val  = 0x4; /* Parallel */
2198 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2199 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2200 		/* Defaults for VID C */
2201 		/* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
2202 		ts2->gen_ctrl_val  = 0x10e;
2203 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2204 		ts2->src_sel_val     = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2205 		break;
2206 	case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
2207 	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
2208 	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
2209 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
2210 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2211 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2212 		fallthrough;
2213 	case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
2214 		ts1->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
2215 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2216 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2217 		break;
2218 	case CX23885_BOARD_HAUPPAUGE_HVR1850:
2219 	case CX23885_BOARD_HAUPPAUGE_HVR1800:
2220 		/* Defaults for VID B - Analog encoder */
2221 		/* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
2222 		ts1->gen_ctrl_val    = 0x10e;
2223 		ts1->ts_clk_en_val   = 0x1; /* Enable TS_CLK */
2224 		ts1->src_sel_val     = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2225 
2226 		/* APB_TSVALERR_POL (active low)*/
2227 		ts1->vld_misc_val    = 0x2000;
2228 		ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
2229 		cx_write(0x130184, 0xc);
2230 
2231 		/* Defaults for VID C */
2232 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
2233 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2234 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2235 		break;
2236 	case CX23885_BOARD_TBS_6920:
2237 		ts1->gen_ctrl_val  = 0x4; /* Parallel */
2238 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2239 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2240 		break;
2241 	case CX23885_BOARD_TEVII_S470:
2242 	case CX23885_BOARD_TEVII_S471:
2243 	case CX23885_BOARD_DVBWORLD_2005:
2244 	case CX23885_BOARD_PROF_8000:
2245 	case CX23885_BOARD_DVBSKY_T980C:
2246 	case CX23885_BOARD_DVBSKY_S950C:
2247 	case CX23885_BOARD_TT_CT2_4500_CI:
2248 	case CX23885_BOARD_DVBSKY_S950:
2249 		ts1->gen_ctrl_val  = 0x5; /* Parallel */
2250 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2251 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2252 		break;
2253 	case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
2254 	case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
2255 	case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
2256 		ts1->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
2257 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2258 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2259 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
2260 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2261 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2262 		break;
2263 	case CX23885_BOARD_TBS_6980:
2264 	case CX23885_BOARD_TBS_6981:
2265 		ts1->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
2266 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2267 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2268 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
2269 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2270 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2271 		tbs_card_init(dev);
2272 		break;
2273 	case CX23885_BOARD_MYGICA_X8506:
2274 	case CX23885_BOARD_MAGICPRO_PROHDTVE2:
2275 	case CX23885_BOARD_MYGICA_X8507:
2276 		ts1->gen_ctrl_val  = 0x5; /* Parallel */
2277 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2278 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2279 		break;
2280 	case CX23885_BOARD_MYGICA_X8558PRO:
2281 		ts1->gen_ctrl_val  = 0x5; /* Parallel */
2282 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2283 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2284 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
2285 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2286 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2287 		break;
2288 	case CX23885_BOARD_HAUPPAUGE_HVR4400:
2289 		ts1->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
2290 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2291 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2292 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
2293 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2294 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2295 		break;
2296 	case CX23885_BOARD_HAUPPAUGE_STARBURST:
2297 		ts1->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
2298 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2299 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2300 		break;
2301 	case CX23885_BOARD_DVBSKY_T9580:
2302 	case CX23885_BOARD_DVBSKY_T982:
2303 		ts1->gen_ctrl_val  = 0x5; /* Parallel */
2304 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2305 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2306 		ts2->gen_ctrl_val  = 0x8; /* Serial bus */
2307 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2308 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2309 		break;
2310 	case CX23885_BOARD_DVBSKY_S952:
2311 		ts1->gen_ctrl_val  = 0x5; /* Parallel */
2312 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2313 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2314 		ts2->gen_ctrl_val  = 0xe; /* Serial bus */
2315 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2316 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2317 		break;
2318 	case CX23885_BOARD_HAUPPAUGE_HVR5525:
2319 	case CX23885_BOARD_HAUPPAUGE_STARBURST2:
2320 		ts1->gen_ctrl_val  = 0x5; /* Parallel */
2321 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2322 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2323 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
2324 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2325 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2326 		break;
2327 	case CX23885_BOARD_HAUPPAUGE_HVR1265_K4:
2328 	case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
2329 	case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB_885:
2330 	case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
2331 	case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC_885:
2332 		ts1->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
2333 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2334 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2335 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
2336 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2337 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2338 		break;
2339 	case CX23885_BOARD_HAUPPAUGE_HVR1250:
2340 	case CX23885_BOARD_HAUPPAUGE_HVR1500:
2341 	case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
2342 	case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
2343 	case CX23885_BOARD_HAUPPAUGE_HVR1200:
2344 	case CX23885_BOARD_HAUPPAUGE_HVR1700:
2345 	case CX23885_BOARD_HAUPPAUGE_HVR1400:
2346 	case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE:
2347 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
2348 	case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
2349 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
2350 	case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
2351 	case CX23885_BOARD_HAUPPAUGE_HVR1270:
2352 	case CX23885_BOARD_HAUPPAUGE_HVR1275:
2353 	case CX23885_BOARD_HAUPPAUGE_HVR1255:
2354 	case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
2355 	case CX23885_BOARD_HAUPPAUGE_HVR1210:
2356 	case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
2357 	case CX23885_BOARD_HAUPPAUGE_HVR1290:
2358 	case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
2359 	default:
2360 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
2361 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2362 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2363 	}
2364 
2365 	/* Certain boards support analog, or require the avcore to be
2366 	 * loaded, ensure this happens.
2367 	 */
2368 	switch (dev->board) {
2369 	case CX23885_BOARD_TEVII_S470:
2370 		/* Currently only enabled for the integrated IR controller */
2371 		if (!enable_885_ir)
2372 			break;
2373 		fallthrough;
2374 	case CX23885_BOARD_HAUPPAUGE_HVR1250:
2375 	case CX23885_BOARD_HAUPPAUGE_HVR1800:
2376 	case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE:
2377 	case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
2378 	case CX23885_BOARD_HAUPPAUGE_HVR1700:
2379 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
2380 	case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
2381 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
2382 	case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
2383 	case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
2384 	case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
2385 	case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
2386 	case CX23885_BOARD_HAUPPAUGE_HVR1255:
2387 	case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
2388 	case CX23885_BOARD_HAUPPAUGE_HVR1265_K4:
2389 	case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
2390 	case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
2391 	case CX23885_BOARD_HAUPPAUGE_HVR1270:
2392 	case CX23885_BOARD_HAUPPAUGE_HVR1850:
2393 	case CX23885_BOARD_HAUPPAUGE_HVR5525:
2394 	case CX23885_BOARD_MYGICA_X8506:
2395 	case CX23885_BOARD_MAGICPRO_PROHDTVE2:
2396 	case CX23885_BOARD_HAUPPAUGE_HVR1290:
2397 	case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
2398 	case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
2399 	case CX23885_BOARD_HAUPPAUGE_HVR1500:
2400 	case CX23885_BOARD_MPX885:
2401 	case CX23885_BOARD_MYGICA_X8507:
2402 	case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
2403 	case CX23885_BOARD_AVERMEDIA_HC81R:
2404 	case CX23885_BOARD_TBS_6980:
2405 	case CX23885_BOARD_TBS_6981:
2406 	case CX23885_BOARD_DVBSKY_T9580:
2407 	case CX23885_BOARD_DVBSKY_T980C:
2408 	case CX23885_BOARD_DVBSKY_S950C:
2409 	case CX23885_BOARD_TT_CT2_4500_CI:
2410 	case CX23885_BOARD_DVBSKY_S950:
2411 	case CX23885_BOARD_DVBSKY_S952:
2412 	case CX23885_BOARD_DVBSKY_T982:
2413 	case CX23885_BOARD_VIEWCAST_260E:
2414 	case CX23885_BOARD_VIEWCAST_460E:
2415 	case CX23885_BOARD_AVERMEDIA_CE310B:
2416 		dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
2417 				&dev->i2c_bus[2].i2c_adap,
2418 				"cx25840", 0x88 >> 1, NULL);
2419 		if (dev->sd_cx25840) {
2420 			/* set host data for clk_freq configuration */
2421 			v4l2_set_subdev_hostdata(dev->sd_cx25840,
2422 						&dev->clk_freq);
2423 
2424 			dev->sd_cx25840->grp_id = CX23885_HW_AV_CORE;
2425 			v4l2_subdev_call(dev->sd_cx25840, core, load_fw);
2426 		}
2427 		break;
2428 	}
2429 
2430 	switch (dev->board) {
2431 	case CX23885_BOARD_VIEWCAST_260E:
2432 		v4l2_i2c_new_subdev(&dev->v4l2_dev,
2433 				&dev->i2c_bus[0].i2c_adap,
2434 				"cs3308", 0x82 >> 1, NULL);
2435 		break;
2436 	case CX23885_BOARD_VIEWCAST_460E:
2437 		/* This cs3308 controls the audio from the breakout cable */
2438 		v4l2_i2c_new_subdev(&dev->v4l2_dev,
2439 				&dev->i2c_bus[0].i2c_adap,
2440 				"cs3308", 0x80 >> 1, NULL);
2441 		/* This cs3308 controls the audio from the onboard header */
2442 		v4l2_i2c_new_subdev(&dev->v4l2_dev,
2443 				&dev->i2c_bus[0].i2c_adap,
2444 				"cs3308", 0x82 >> 1, NULL);
2445 		break;
2446 	}
2447 
2448 	/* AUX-PLL 27MHz CLK */
2449 	switch (dev->board) {
2450 	case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
2451 		netup_initialize(dev);
2452 		break;
2453 	case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: {
2454 		int ret;
2455 		const struct firmware *fw;
2456 		const char *filename = "dvb-netup-altera-01.fw";
2457 		char *action = "configure";
2458 		static struct netup_card_info cinfo;
2459 		struct altera_config netup_config = {
2460 			.dev = dev,
2461 			.action = action,
2462 			.jtag_io = netup_jtag_io,
2463 		};
2464 
2465 		netup_initialize(dev);
2466 
2467 		netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo);
2468 		if (netup_card_rev)
2469 			cinfo.rev = netup_card_rev;
2470 
2471 		switch (cinfo.rev) {
2472 		case 0x4:
2473 			filename = "dvb-netup-altera-04.fw";
2474 			break;
2475 		default:
2476 			filename = "dvb-netup-altera-01.fw";
2477 			break;
2478 		}
2479 		pr_info("NetUP card rev=0x%x fw_filename=%s\n",
2480 			cinfo.rev, filename);
2481 
2482 		ret = request_firmware(&fw, filename, &dev->pci->dev);
2483 		if (ret != 0)
2484 			pr_err("did not find the firmware file '%s'. You can use <kernel_dir>/scripts/get_dvb_firmware to get the firmware.",
2485 			       filename);
2486 		else
2487 			altera_init(&netup_config, fw);
2488 
2489 		release_firmware(fw);
2490 		break;
2491 	}
2492 	}
2493 }
2494