1b285192aSMauro Carvalho Chehab /*
2b285192aSMauro Carvalho Chehab  *  Driver for the Conexant CX23885 PCIe bridge
3b285192aSMauro Carvalho Chehab  *
4b285192aSMauro Carvalho Chehab  *  Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
5b285192aSMauro Carvalho Chehab  *
6b285192aSMauro Carvalho Chehab  *  This program is free software; you can redistribute it and/or modify
7b285192aSMauro Carvalho Chehab  *  it under the terms of the GNU General Public License as published by
8b285192aSMauro Carvalho Chehab  *  the Free Software Foundation; either version 2 of the License, or
9b285192aSMauro Carvalho Chehab  *  (at your option) any later version.
10b285192aSMauro Carvalho Chehab  *
11b285192aSMauro Carvalho Chehab  *  This program is distributed in the hope that it will be useful,
12b285192aSMauro Carvalho Chehab  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
13b285192aSMauro Carvalho Chehab  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14b285192aSMauro Carvalho Chehab  *
15b285192aSMauro Carvalho Chehab  *  GNU General Public License for more details.
16b285192aSMauro Carvalho Chehab  */
17b285192aSMauro Carvalho Chehab 
18b285192aSMauro Carvalho Chehab #include <linux/init.h>
19b285192aSMauro Carvalho Chehab #include <linux/module.h>
20b285192aSMauro Carvalho Chehab #include <linux/pci.h>
21b285192aSMauro Carvalho Chehab #include <linux/delay.h>
22b285192aSMauro Carvalho Chehab #include <media/cx25840.h>
23b285192aSMauro Carvalho Chehab #include <linux/firmware.h>
24b285192aSMauro Carvalho Chehab #include <misc/altera.h>
25b285192aSMauro Carvalho Chehab 
26b285192aSMauro Carvalho Chehab #include "cx23885.h"
27b285192aSMauro Carvalho Chehab #include "tuner-xc2028.h"
28b285192aSMauro Carvalho Chehab #include "netup-eeprom.h"
29b285192aSMauro Carvalho Chehab #include "netup-init.h"
30b285192aSMauro Carvalho Chehab #include "altera-ci.h"
31b285192aSMauro Carvalho Chehab #include "xc4000.h"
32b285192aSMauro Carvalho Chehab #include "xc5000.h"
33b285192aSMauro Carvalho Chehab #include "cx23888-ir.h"
34b285192aSMauro Carvalho Chehab 
3589343055SAnton Nurkin static unsigned int netup_card_rev = 4;
36b285192aSMauro Carvalho Chehab module_param(netup_card_rev, int, 0644);
37b285192aSMauro Carvalho Chehab MODULE_PARM_DESC(netup_card_rev,
38b285192aSMauro Carvalho Chehab 		"NetUP Dual DVB-T/C CI card revision");
39b285192aSMauro Carvalho Chehab static unsigned int enable_885_ir;
40b285192aSMauro Carvalho Chehab module_param(enable_885_ir, int, 0644);
41b285192aSMauro Carvalho Chehab MODULE_PARM_DESC(enable_885_ir,
42b285192aSMauro Carvalho Chehab 		 "Enable integrated IR controller for supported\n"
43b285192aSMauro Carvalho Chehab 		 "\t\t    CX2388[57] boards that are wired for it:\n"
44b285192aSMauro Carvalho Chehab 		 "\t\t\tHVR-1250 (reported safe)\n"
45b285192aSMauro Carvalho Chehab 		 "\t\t\tTerraTec Cinergy T PCIe Dual (not well tested, appears to be safe)\n"
46b285192aSMauro Carvalho Chehab 		 "\t\t\tTeVii S470 (reported unsafe)\n"
47b285192aSMauro Carvalho Chehab 		 "\t\t    This can cause an interrupt storm with some cards.\n"
48b285192aSMauro Carvalho Chehab 		 "\t\t    Default: 0 [Disabled]");
49b285192aSMauro Carvalho Chehab 
50b285192aSMauro Carvalho Chehab /* ------------------------------------------------------------------ */
51b285192aSMauro Carvalho Chehab /* board config info                                                  */
52b285192aSMauro Carvalho Chehab 
53b285192aSMauro Carvalho Chehab struct cx23885_board cx23885_boards[] = {
54b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_UNKNOWN] = {
55b285192aSMauro Carvalho Chehab 		.name		= "UNKNOWN/GENERIC",
56b285192aSMauro Carvalho Chehab 		/* Ensure safe default for unknown boards */
57b285192aSMauro Carvalho Chehab 		.clk_freq       = 0,
58b285192aSMauro Carvalho Chehab 		.input          = {{
59b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
60b285192aSMauro Carvalho Chehab 			.vmux   = 0,
61b285192aSMauro Carvalho Chehab 		}, {
62b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE2,
63b285192aSMauro Carvalho Chehab 			.vmux   = 1,
64b285192aSMauro Carvalho Chehab 		}, {
65b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE3,
66b285192aSMauro Carvalho Chehab 			.vmux   = 2,
67b285192aSMauro Carvalho Chehab 		}, {
68b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE4,
69b285192aSMauro Carvalho Chehab 			.vmux   = 3,
70b285192aSMauro Carvalho Chehab 		} },
71b285192aSMauro Carvalho Chehab 	},
72b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
73b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1800lp",
74b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
75b285192aSMauro Carvalho Chehab 		.input          = {{
76b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
77b285192aSMauro Carvalho Chehab 			.vmux   = 0,
78b285192aSMauro Carvalho Chehab 			.gpio0  = 0xff00,
79b285192aSMauro Carvalho Chehab 		}, {
80b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_DEBUG,
81b285192aSMauro Carvalho Chehab 			.vmux   = 0,
82b285192aSMauro Carvalho Chehab 			.gpio0  = 0xff01,
83b285192aSMauro Carvalho Chehab 		}, {
84b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
85b285192aSMauro Carvalho Chehab 			.vmux   = 1,
86b285192aSMauro Carvalho Chehab 			.gpio0  = 0xff02,
87b285192aSMauro Carvalho Chehab 		}, {
88b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
89b285192aSMauro Carvalho Chehab 			.vmux   = 2,
90b285192aSMauro Carvalho Chehab 			.gpio0  = 0xff02,
91b285192aSMauro Carvalho Chehab 		} },
92b285192aSMauro Carvalho Chehab 	},
93b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1800] = {
94b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1800",
95b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
96b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_ENCODER,
97b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
98b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_PHILIPS_TDA8290,
99b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x42, /* 0x84 >> 1 */
100b285192aSMauro Carvalho Chehab 		.tuner_bus	= 1,
101b285192aSMauro Carvalho Chehab 		.input          = {{
102b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
103b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
104b285192aSMauro Carvalho Chehab 					CX25840_VIN5_CH2 |
105b285192aSMauro Carvalho Chehab 					CX25840_VIN2_CH1,
106b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO8,
107b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
108b285192aSMauro Carvalho Chehab 		}, {
109b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
110b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
111b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
112b285192aSMauro Carvalho Chehab 					CX25840_VIN6_CH1,
113b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
114b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
115b285192aSMauro Carvalho Chehab 		}, {
116b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
117b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
118b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
119b285192aSMauro Carvalho Chehab 					CX25840_VIN8_CH1 |
120b285192aSMauro Carvalho Chehab 					CX25840_SVIDEO_ON,
121b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
122b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
123b285192aSMauro Carvalho Chehab 		} },
124b285192aSMauro Carvalho Chehab 	},
125b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1250] = {
126b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1250",
127b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
128b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
129b285192aSMauro Carvalho Chehab #ifdef MT2131_NO_ANALOG_SUPPORT_YET
130b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_PHILIPS_TDA8290,
131b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x42, /* 0x84 >> 1 */
132b285192aSMauro Carvalho Chehab 		.tuner_bus	= 1,
133b285192aSMauro Carvalho Chehab #endif
134b285192aSMauro Carvalho Chehab 		.force_bff	= 1,
135b285192aSMauro Carvalho Chehab 		.input          = {{
136b285192aSMauro Carvalho Chehab #ifdef MT2131_NO_ANALOG_SUPPORT_YET
137b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
138b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
139b285192aSMauro Carvalho Chehab 					CX25840_VIN5_CH2 |
140b285192aSMauro Carvalho Chehab 					CX25840_VIN2_CH1,
141b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO8,
142b285192aSMauro Carvalho Chehab 			.gpio0  = 0xff00,
143b285192aSMauro Carvalho Chehab 		}, {
144b285192aSMauro Carvalho Chehab #endif
145b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
146b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
147b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
148b285192aSMauro Carvalho Chehab 					CX25840_VIN6_CH1,
149b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
150b285192aSMauro Carvalho Chehab 			.gpio0  = 0xff02,
151b285192aSMauro Carvalho Chehab 		}, {
152b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
153b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
154b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
155b285192aSMauro Carvalho Chehab 					CX25840_VIN8_CH1 |
156b285192aSMauro Carvalho Chehab 					CX25840_SVIDEO_ON,
157b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
158b285192aSMauro Carvalho Chehab 			.gpio0  = 0xff02,
159b285192aSMauro Carvalho Chehab 		} },
160b285192aSMauro Carvalho Chehab 	},
161b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
162b285192aSMauro Carvalho Chehab 		.name		= "DViCO FusionHDTV5 Express",
163b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
164b285192aSMauro Carvalho Chehab 	},
165b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
166b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1500Q",
167b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
168b285192aSMauro Carvalho Chehab 	},
169b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1500] = {
170b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1500",
171b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
172b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
173b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_XC2028,
174b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x61, /* 0xc2 >> 1 */
175b285192aSMauro Carvalho Chehab 		.input          = {{
176b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
177b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
178b285192aSMauro Carvalho Chehab 					CX25840_VIN5_CH2 |
179b285192aSMauro Carvalho Chehab 					CX25840_VIN2_CH1,
180b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
181b285192aSMauro Carvalho Chehab 		}, {
182b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
183b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
184b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
185b285192aSMauro Carvalho Chehab 					CX25840_VIN6_CH1,
186b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
187b285192aSMauro Carvalho Chehab 		}, {
188b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
189b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
190b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
191b285192aSMauro Carvalho Chehab 					CX25840_VIN8_CH1 |
192b285192aSMauro Carvalho Chehab 					CX25840_SVIDEO_ON,
193b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
194b285192aSMauro Carvalho Chehab 		} },
195b285192aSMauro Carvalho Chehab 	},
196b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1200] = {
197b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1200",
198b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
199b285192aSMauro Carvalho Chehab 	},
200b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1700] = {
201b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1700",
202b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
203b285192aSMauro Carvalho Chehab 	},
204b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1400] = {
205b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1400",
206b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
207b285192aSMauro Carvalho Chehab 	},
208b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
209b285192aSMauro Carvalho Chehab 		.name		= "DViCO FusionHDTV7 Dual Express",
210b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
211b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
212b285192aSMauro Carvalho Chehab 	},
213b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
214b285192aSMauro Carvalho Chehab 		.name		= "DViCO FusionHDTV DVB-T Dual Express",
215b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
216b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
217b285192aSMauro Carvalho Chehab 	},
218b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
219b285192aSMauro Carvalho Chehab 		.name		= "Leadtek Winfast PxDVR3200 H",
220b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
221b285192aSMauro Carvalho Chehab 	},
222642ca1a0SAnca Emanuel 	[CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200] = {
223642ca1a0SAnca Emanuel 		.name		= "Leadtek Winfast PxPVR2200",
224642ca1a0SAnca Emanuel 		.porta		= CX23885_ANALOG_VIDEO,
225642ca1a0SAnca Emanuel 		.tuner_type	= TUNER_XC2028,
226642ca1a0SAnca Emanuel 		.tuner_addr	= 0x61,
227642ca1a0SAnca Emanuel 		.tuner_bus	= 1,
228642ca1a0SAnca Emanuel 		.input		= {{
229642ca1a0SAnca Emanuel 			.type	= CX23885_VMUX_TELEVISION,
230642ca1a0SAnca Emanuel 			.vmux	= CX25840_VIN2_CH1 |
231642ca1a0SAnca Emanuel 				  CX25840_VIN5_CH2,
232642ca1a0SAnca Emanuel 			.amux	= CX25840_AUDIO8,
233642ca1a0SAnca Emanuel 			.gpio0	= 0x704040,
234642ca1a0SAnca Emanuel 		}, {
235642ca1a0SAnca Emanuel 			.type	= CX23885_VMUX_COMPOSITE1,
236642ca1a0SAnca Emanuel 			.vmux	= CX25840_COMPOSITE1,
237642ca1a0SAnca Emanuel 			.amux	= CX25840_AUDIO7,
238642ca1a0SAnca Emanuel 			.gpio0	= 0x704040,
239642ca1a0SAnca Emanuel 		}, {
240642ca1a0SAnca Emanuel 			.type	= CX23885_VMUX_SVIDEO,
241642ca1a0SAnca Emanuel 			.vmux	= CX25840_SVIDEO_LUMA3 |
242642ca1a0SAnca Emanuel 				  CX25840_SVIDEO_CHROMA4,
243642ca1a0SAnca Emanuel 			.amux	= CX25840_AUDIO7,
244642ca1a0SAnca Emanuel 			.gpio0	= 0x704040,
245642ca1a0SAnca Emanuel 		}, {
246642ca1a0SAnca Emanuel 			.type	= CX23885_VMUX_COMPONENT,
247642ca1a0SAnca Emanuel 			.vmux	= CX25840_VIN7_CH1 |
248642ca1a0SAnca Emanuel 				  CX25840_VIN6_CH2 |
249642ca1a0SAnca Emanuel 				  CX25840_VIN8_CH3 |
250642ca1a0SAnca Emanuel 				  CX25840_COMPONENT_ON,
251642ca1a0SAnca Emanuel 			.amux	= CX25840_AUDIO7,
252642ca1a0SAnca Emanuel 			.gpio0	= 0x704040,
253642ca1a0SAnca Emanuel 		} },
254642ca1a0SAnca Emanuel 	},
255b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000] = {
256b285192aSMauro Carvalho Chehab 		.name		= "Leadtek Winfast PxDVR3200 H XC4000",
257b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
258b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
259b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_XC4000,
260b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x61,
261b285192aSMauro Carvalho Chehab 		.radio_type	= UNSET,
262b285192aSMauro Carvalho Chehab 		.radio_addr	= ADDR_UNSET,
263b285192aSMauro Carvalho Chehab 		.input		= {{
264b285192aSMauro Carvalho Chehab 			.type	= CX23885_VMUX_TELEVISION,
265b285192aSMauro Carvalho Chehab 			.vmux	= CX25840_VIN2_CH1 |
266b285192aSMauro Carvalho Chehab 				  CX25840_VIN5_CH2 |
267b285192aSMauro Carvalho Chehab 				  CX25840_NONE0_CH3,
268b285192aSMauro Carvalho Chehab 		}, {
269b285192aSMauro Carvalho Chehab 			.type	= CX23885_VMUX_COMPOSITE1,
270b285192aSMauro Carvalho Chehab 			.vmux	= CX25840_COMPOSITE1,
271b285192aSMauro Carvalho Chehab 		}, {
272b285192aSMauro Carvalho Chehab 			.type	= CX23885_VMUX_SVIDEO,
273b285192aSMauro Carvalho Chehab 			.vmux	= CX25840_SVIDEO_LUMA3 |
274b285192aSMauro Carvalho Chehab 				  CX25840_SVIDEO_CHROMA4,
275b285192aSMauro Carvalho Chehab 		}, {
276b285192aSMauro Carvalho Chehab 			.type	= CX23885_VMUX_COMPONENT,
277b285192aSMauro Carvalho Chehab 			.vmux	= CX25840_VIN7_CH1 |
278b285192aSMauro Carvalho Chehab 				  CX25840_VIN6_CH2 |
279b285192aSMauro Carvalho Chehab 				  CX25840_VIN8_CH3 |
280b285192aSMauro Carvalho Chehab 				  CX25840_COMPONENT_ON,
281b285192aSMauro Carvalho Chehab 		} },
282b285192aSMauro Carvalho Chehab 	},
283b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = {
284b285192aSMauro Carvalho Chehab 		.name		= "Compro VideoMate E650F",
285b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
286b285192aSMauro Carvalho Chehab 	},
287b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_TBS_6920] = {
288b285192aSMauro Carvalho Chehab 		.name		= "TurboSight TBS 6920",
289b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
290b285192aSMauro Carvalho Chehab 	},
291e6001482SLuis Alves 	[CX23885_BOARD_TBS_6980] = {
292e6001482SLuis Alves 		.name		= "TurboSight TBS 6980",
293e6001482SLuis Alves 		.portb		= CX23885_MPEG_DVB,
294e6001482SLuis Alves 		.portc		= CX23885_MPEG_DVB,
295e6001482SLuis Alves 	},
296e6001482SLuis Alves 	[CX23885_BOARD_TBS_6981] = {
297e6001482SLuis Alves 		.name		= "TurboSight TBS 6981",
298e6001482SLuis Alves 		.portb		= CX23885_MPEG_DVB,
299e6001482SLuis Alves 		.portc		= CX23885_MPEG_DVB,
300e6001482SLuis Alves 	},
301b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_TEVII_S470] = {
302b285192aSMauro Carvalho Chehab 		.name		= "TeVii S470",
303b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
304b285192aSMauro Carvalho Chehab 	},
305b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_DVBWORLD_2005] = {
306b285192aSMauro Carvalho Chehab 		.name		= "DVBWorld DVB-S2 2005",
307b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
308b285192aSMauro Carvalho Chehab 	},
309b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = {
310b285192aSMauro Carvalho Chehab 		.ci_type	= 1,
311b285192aSMauro Carvalho Chehab 		.name		= "NetUP Dual DVB-S2 CI",
312b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
313b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
314b285192aSMauro Carvalho Chehab 	},
315b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1270] = {
316b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1270",
317b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
318b285192aSMauro Carvalho Chehab 	},
319b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1275] = {
320b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1275",
321b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
322b285192aSMauro Carvalho Chehab 	},
323b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1255] = {
324b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1255",
325b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
326b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
327b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_ABSENT,
328b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x42, /* 0x84 >> 1 */
329b285192aSMauro Carvalho Chehab 		.force_bff	= 1,
330b285192aSMauro Carvalho Chehab 		.input          = {{
331b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
332b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
333b285192aSMauro Carvalho Chehab 					CX25840_VIN5_CH2 |
334b285192aSMauro Carvalho Chehab 					CX25840_VIN2_CH1 |
335b285192aSMauro Carvalho Chehab 					CX25840_DIF_ON,
336b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO8,
337b285192aSMauro Carvalho Chehab 		}, {
338b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
339b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
340b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
341b285192aSMauro Carvalho Chehab 					CX25840_VIN6_CH1,
342b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
343b285192aSMauro Carvalho Chehab 		}, {
344b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
345b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
346b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
347b285192aSMauro Carvalho Chehab 					CX25840_VIN8_CH1 |
348b285192aSMauro Carvalho Chehab 					CX25840_SVIDEO_ON,
349b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
350b285192aSMauro Carvalho Chehab 		} },
351b285192aSMauro Carvalho Chehab 	},
352b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1255_22111] = {
353b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1255",
354b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
355b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
356b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_ABSENT,
357b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x42, /* 0x84 >> 1 */
358b285192aSMauro Carvalho Chehab 		.force_bff	= 1,
359b285192aSMauro Carvalho Chehab 		.input          = {{
360b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
361b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
362b285192aSMauro Carvalho Chehab 					CX25840_VIN5_CH2 |
363b285192aSMauro Carvalho Chehab 					CX25840_VIN2_CH1 |
364b285192aSMauro Carvalho Chehab 					CX25840_DIF_ON,
365b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO8,
366b285192aSMauro Carvalho Chehab 		}, {
367b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
368b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
369b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
370b285192aSMauro Carvalho Chehab 					CX25840_VIN8_CH1 |
371b285192aSMauro Carvalho Chehab 					CX25840_SVIDEO_ON,
372b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
373b285192aSMauro Carvalho Chehab 		} },
374b285192aSMauro Carvalho Chehab 	},
375b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1210] = {
376b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1210",
377b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
378b285192aSMauro Carvalho Chehab 	},
379b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_MYGICA_X8506] = {
380b285192aSMauro Carvalho Chehab 		.name		= "Mygica X8506 DMB-TH",
381b285192aSMauro Carvalho Chehab 		.tuner_type = TUNER_XC5000,
382b285192aSMauro Carvalho Chehab 		.tuner_addr = 0x61,
383b285192aSMauro Carvalho Chehab 		.tuner_bus	= 1,
384b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
385b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
386b285192aSMauro Carvalho Chehab 		.input		= {
387b285192aSMauro Carvalho Chehab 			{
388b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_TELEVISION,
389b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPOSITE2,
390b285192aSMauro Carvalho Chehab 			},
391b285192aSMauro Carvalho Chehab 			{
392b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_COMPOSITE1,
393b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPOSITE8,
394b285192aSMauro Carvalho Chehab 			},
395b285192aSMauro Carvalho Chehab 			{
396b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_SVIDEO,
397b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_SVIDEO_LUMA3 |
398b285192aSMauro Carvalho Chehab 						CX25840_SVIDEO_CHROMA4,
399b285192aSMauro Carvalho Chehab 			},
400b285192aSMauro Carvalho Chehab 			{
401b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_COMPONENT,
402b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPONENT_ON |
403b285192aSMauro Carvalho Chehab 					CX25840_VIN1_CH1 |
404b285192aSMauro Carvalho Chehab 					CX25840_VIN6_CH2 |
405b285192aSMauro Carvalho Chehab 					CX25840_VIN7_CH3,
406b285192aSMauro Carvalho Chehab 			},
407b285192aSMauro Carvalho Chehab 		},
408b285192aSMauro Carvalho Chehab 	},
409b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_MAGICPRO_PROHDTVE2] = {
410b285192aSMauro Carvalho Chehab 		.name		= "Magic-Pro ProHDTV Extreme 2",
411b285192aSMauro Carvalho Chehab 		.tuner_type = TUNER_XC5000,
412b285192aSMauro Carvalho Chehab 		.tuner_addr = 0x61,
413b285192aSMauro Carvalho Chehab 		.tuner_bus	= 1,
414b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
415b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
416b285192aSMauro Carvalho Chehab 		.input		= {
417b285192aSMauro Carvalho Chehab 			{
418b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_TELEVISION,
419b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPOSITE2,
420b285192aSMauro Carvalho Chehab 			},
421b285192aSMauro Carvalho Chehab 			{
422b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_COMPOSITE1,
423b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPOSITE8,
424b285192aSMauro Carvalho Chehab 			},
425b285192aSMauro Carvalho Chehab 			{
426b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_SVIDEO,
427b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_SVIDEO_LUMA3 |
428b285192aSMauro Carvalho Chehab 						CX25840_SVIDEO_CHROMA4,
429b285192aSMauro Carvalho Chehab 			},
430b285192aSMauro Carvalho Chehab 			{
431b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_COMPONENT,
432b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPONENT_ON |
433b285192aSMauro Carvalho Chehab 					CX25840_VIN1_CH1 |
434b285192aSMauro Carvalho Chehab 					CX25840_VIN6_CH2 |
435b285192aSMauro Carvalho Chehab 					CX25840_VIN7_CH3,
436b285192aSMauro Carvalho Chehab 			},
437b285192aSMauro Carvalho Chehab 		},
438b285192aSMauro Carvalho Chehab 	},
439b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1850] = {
440b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1850",
441b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
442b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_ENCODER,
443b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
444b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_ABSENT,
445b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x42, /* 0x84 >> 1 */
446b285192aSMauro Carvalho Chehab 		.force_bff	= 1,
447b285192aSMauro Carvalho Chehab 		.input          = {{
448b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
449b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
450b285192aSMauro Carvalho Chehab 					CX25840_VIN5_CH2 |
451b285192aSMauro Carvalho Chehab 					CX25840_VIN2_CH1 |
452b285192aSMauro Carvalho Chehab 					CX25840_DIF_ON,
453b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO8,
454b285192aSMauro Carvalho Chehab 		}, {
455b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
456b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
457b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
458b285192aSMauro Carvalho Chehab 					CX25840_VIN6_CH1,
459b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
460b285192aSMauro Carvalho Chehab 		}, {
461b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
462b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
463b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
464b285192aSMauro Carvalho Chehab 					CX25840_VIN8_CH1 |
465b285192aSMauro Carvalho Chehab 					CX25840_SVIDEO_ON,
466b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
467b285192aSMauro Carvalho Chehab 		} },
468b285192aSMauro Carvalho Chehab 	},
469b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_COMPRO_VIDEOMATE_E800] = {
470b285192aSMauro Carvalho Chehab 		.name		= "Compro VideoMate E800",
471b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
472b285192aSMauro Carvalho Chehab 	},
473b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1290] = {
474b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1290",
475b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
476b285192aSMauro Carvalho Chehab 	},
477b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_MYGICA_X8558PRO] = {
478b285192aSMauro Carvalho Chehab 		.name		= "Mygica X8558 PRO DMB-TH",
479b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
480b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
481b285192aSMauro Carvalho Chehab 	},
482b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_LEADTEK_WINFAST_PXTV1200] = {
483b285192aSMauro Carvalho Chehab 		.name           = "LEADTEK WinFast PxTV1200",
484b285192aSMauro Carvalho Chehab 		.porta          = CX23885_ANALOG_VIDEO,
485b285192aSMauro Carvalho Chehab 		.tuner_type     = TUNER_XC2028,
486b285192aSMauro Carvalho Chehab 		.tuner_addr     = 0x61,
487b285192aSMauro Carvalho Chehab 		.tuner_bus	= 1,
488b285192aSMauro Carvalho Chehab 		.input          = {{
489b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
490b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_VIN2_CH1 |
491b285192aSMauro Carvalho Chehab 				  CX25840_VIN5_CH2 |
492b285192aSMauro Carvalho Chehab 				  CX25840_NONE0_CH3,
493b285192aSMauro Carvalho Chehab 		}, {
494b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
495b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_COMPOSITE1,
496b285192aSMauro Carvalho Chehab 		}, {
497b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
498b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_SVIDEO_LUMA3 |
499b285192aSMauro Carvalho Chehab 				  CX25840_SVIDEO_CHROMA4,
500b285192aSMauro Carvalho Chehab 		}, {
501b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPONENT,
502b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_VIN7_CH1 |
503b285192aSMauro Carvalho Chehab 				  CX25840_VIN6_CH2 |
504b285192aSMauro Carvalho Chehab 				  CX25840_VIN8_CH3 |
505b285192aSMauro Carvalho Chehab 				  CX25840_COMPONENT_ON,
506b285192aSMauro Carvalho Chehab 		} },
507b285192aSMauro Carvalho Chehab 	},
508b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_GOTVIEW_X5_3D_HYBRID] = {
509b285192aSMauro Carvalho Chehab 		.name		= "GoTView X5 3D Hybrid",
510b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_XC5000,
511b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x64,
512b285192aSMauro Carvalho Chehab 		.tuner_bus	= 1,
513b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
514b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
515b285192aSMauro Carvalho Chehab 		.input          = {{
516b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
517b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_VIN2_CH1 |
518b285192aSMauro Carvalho Chehab 				  CX25840_VIN5_CH2,
519b285192aSMauro Carvalho Chehab 			.gpio0	= 0x02,
520b285192aSMauro Carvalho Chehab 		}, {
521b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
522b285192aSMauro Carvalho Chehab 			.vmux   = CX23885_VMUX_COMPOSITE1,
523b285192aSMauro Carvalho Chehab 		}, {
524b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
525b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_SVIDEO_LUMA3 |
526b285192aSMauro Carvalho Chehab 				  CX25840_SVIDEO_CHROMA4,
527b285192aSMauro Carvalho Chehab 		} },
528b285192aSMauro Carvalho Chehab 	},
529b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF] = {
530b285192aSMauro Carvalho Chehab 		.ci_type	= 2,
531b285192aSMauro Carvalho Chehab 		.name		= "NetUP Dual DVB-T/C-CI RF",
532b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
533b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
534b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
535b285192aSMauro Carvalho Chehab 		.num_fds_portb	= 2,
536b285192aSMauro Carvalho Chehab 		.num_fds_portc	= 2,
537b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_XC5000,
538b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x64,
539b285192aSMauro Carvalho Chehab 		.input          = { {
540b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_TELEVISION,
541b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPOSITE1,
542b285192aSMauro Carvalho Chehab 		} },
543b285192aSMauro Carvalho Chehab 	},
544b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_MPX885] = {
545b285192aSMauro Carvalho Chehab 		.name		= "MPX-885",
546b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
547b285192aSMauro Carvalho Chehab 		.input          = {{
548b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
549b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_COMPOSITE1,
550b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO6,
551b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
552b285192aSMauro Carvalho Chehab 		}, {
553b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE2,
554b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_COMPOSITE2,
555b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO6,
556b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
557b285192aSMauro Carvalho Chehab 		}, {
558b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE3,
559b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_COMPOSITE3,
560b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
561b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
562b285192aSMauro Carvalho Chehab 		}, {
563b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE4,
564b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_COMPOSITE4,
565b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
566b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
567b285192aSMauro Carvalho Chehab 		} },
568b285192aSMauro Carvalho Chehab 	},
569b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_MYGICA_X8507] = {
5700d1b5265SMauro Carvalho Chehab 		.name		= "Mygica X8502/X8507 ISDB-T",
571b285192aSMauro Carvalho Chehab 		.tuner_type = TUNER_XC5000,
572b285192aSMauro Carvalho Chehab 		.tuner_addr = 0x61,
573b285192aSMauro Carvalho Chehab 		.tuner_bus	= 1,
574b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
5750d1b5265SMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
576b285192aSMauro Carvalho Chehab 		.input		= {
577b285192aSMauro Carvalho Chehab 			{
578b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_TELEVISION,
579b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPOSITE2,
580b285192aSMauro Carvalho Chehab 				.amux   = CX25840_AUDIO8,
581b285192aSMauro Carvalho Chehab 			},
582b285192aSMauro Carvalho Chehab 			{
583b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_COMPOSITE1,
584b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPOSITE8,
585082c0576SAlfredo Jesús Delaiti 				.amux   = CX25840_AUDIO7,
586b285192aSMauro Carvalho Chehab 			},
587b285192aSMauro Carvalho Chehab 			{
588b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_SVIDEO,
589b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_SVIDEO_LUMA3 |
590b285192aSMauro Carvalho Chehab 						CX25840_SVIDEO_CHROMA4,
591082c0576SAlfredo Jesús Delaiti 				.amux   = CX25840_AUDIO7,
592b285192aSMauro Carvalho Chehab 			},
593b285192aSMauro Carvalho Chehab 			{
594b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_COMPONENT,
595b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPONENT_ON |
596b285192aSMauro Carvalho Chehab 					CX25840_VIN1_CH1 |
597b285192aSMauro Carvalho Chehab 					CX25840_VIN6_CH2 |
598b285192aSMauro Carvalho Chehab 					CX25840_VIN7_CH3,
599082c0576SAlfredo Jesús Delaiti 				.amux   = CX25840_AUDIO7,
600b285192aSMauro Carvalho Chehab 			},
601b285192aSMauro Carvalho Chehab 		},
602b285192aSMauro Carvalho Chehab 	},
603b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL] = {
604b285192aSMauro Carvalho Chehab 		.name		= "TerraTec Cinergy T PCIe Dual",
605b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
606b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
607b285192aSMauro Carvalho Chehab 	},
608b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_TEVII_S471] = {
609b285192aSMauro Carvalho Chehab 		.name		= "TeVii S471",
610b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
611f667190bSMariusz Bia?o?czyk 	},
612f667190bSMariusz Bia?o?czyk 	[CX23885_BOARD_PROF_8000] = {
613f667190bSMariusz Bia?o?czyk 		.name		= "Prof Revolution DVB-S2 8000",
614f667190bSMariusz Bia?o?czyk 		.portb		= CX23885_MPEG_DVB,
6157c62f5a1SMichael Krufky 	},
6167c62f5a1SMichael Krufky 	[CX23885_BOARD_HAUPPAUGE_HVR4400] = {
6177c62f5a1SMichael Krufky 		.name		= "Hauppauge WinTV-HVR4400",
61836efec48SMatthias Schwarzott 		.porta		= CX23885_ANALOG_VIDEO,
6197c62f5a1SMichael Krufky 		.portb		= CX23885_MPEG_DVB,
62036efec48SMatthias Schwarzott 		.portc		= CX23885_MPEG_DVB,
62136efec48SMatthias Schwarzott 		.tuner_type	= TUNER_NXP_TDA18271,
62236efec48SMatthias Schwarzott 		.tuner_addr	= 0x60, /* 0xc0 >> 1 */
62336efec48SMatthias Schwarzott 		.tuner_bus	= 1,
6247c62f5a1SMichael Krufky 	},
625e8d42373SOleh Kravchenko 	[CX23885_BOARD_AVERMEDIA_HC81R] = {
626e8d42373SOleh Kravchenko 		.name		= "AVerTV Hybrid Express Slim HC81R",
627e8d42373SOleh Kravchenko 		.tuner_type	= TUNER_XC2028,
628e8d42373SOleh Kravchenko 		.tuner_addr	= 0x61, /* 0xc2 >> 1 */
629e8d42373SOleh Kravchenko 		.tuner_bus	= 1,
630e8d42373SOleh Kravchenko 		.porta		= CX23885_ANALOG_VIDEO,
631e8d42373SOleh Kravchenko 		.input          = {{
632e8d42373SOleh Kravchenko 			.type   = CX23885_VMUX_TELEVISION,
633e8d42373SOleh Kravchenko 			.vmux   = CX25840_VIN2_CH1 |
634e8d42373SOleh Kravchenko 				  CX25840_VIN5_CH2 |
635e8d42373SOleh Kravchenko 				  CX25840_NONE0_CH3 |
636e8d42373SOleh Kravchenko 				  CX25840_NONE1_CH3,
637e8d42373SOleh Kravchenko 			.amux   = CX25840_AUDIO8,
638e8d42373SOleh Kravchenko 		}, {
639e8d42373SOleh Kravchenko 			.type   = CX23885_VMUX_SVIDEO,
640e8d42373SOleh Kravchenko 			.vmux   = CX25840_VIN8_CH1 |
641e8d42373SOleh Kravchenko 				  CX25840_NONE_CH2 |
642e8d42373SOleh Kravchenko 				  CX25840_VIN7_CH3 |
643e8d42373SOleh Kravchenko 				  CX25840_SVIDEO_ON,
644e8d42373SOleh Kravchenko 			.amux   = CX25840_AUDIO6,
645e8d42373SOleh Kravchenko 		}, {
646e8d42373SOleh Kravchenko 			.type   = CX23885_VMUX_COMPONENT,
647e8d42373SOleh Kravchenko 			.vmux   = CX25840_VIN1_CH1 |
648e8d42373SOleh Kravchenko 				  CX25840_NONE_CH2 |
649e8d42373SOleh Kravchenko 				  CX25840_NONE0_CH3 |
650e8d42373SOleh Kravchenko 				  CX25840_NONE1_CH3,
651e8d42373SOleh Kravchenko 			.amux   = CX25840_AUDIO6,
652e8d42373SOleh Kravchenko 		} },
653cce11b09SHans Verkuil 	},
65446b21bbaSJames Harper 	[CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2] = {
65546b21bbaSJames Harper 		.name		= "DViCO FusionHDTV DVB-T Dual Express2",
65646b21bbaSJames Harper 		.portb		= CX23885_MPEG_DVB,
65746b21bbaSJames Harper 		.portc		= CX23885_MPEG_DVB,
65846b21bbaSJames Harper 	},
659cce11b09SHans Verkuil 	[CX23885_BOARD_HAUPPAUGE_IMPACTVCBE] = {
660cce11b09SHans Verkuil 		.name		= "Hauppauge ImpactVCB-e",
661cce11b09SHans Verkuil 		.tuner_type	= TUNER_ABSENT,
662cce11b09SHans Verkuil 		.porta		= CX23885_ANALOG_VIDEO,
663cce11b09SHans Verkuil 		.input          = {{
664cce11b09SHans Verkuil 			.type   = CX23885_VMUX_COMPOSITE1,
665cce11b09SHans Verkuil 			.vmux   = CX25840_VIN7_CH3 |
666cce11b09SHans Verkuil 				  CX25840_VIN4_CH2 |
667cce11b09SHans Verkuil 				  CX25840_VIN6_CH1,
668cce11b09SHans Verkuil 			.amux   = CX25840_AUDIO7,
669cce11b09SHans Verkuil 		}, {
670cce11b09SHans Verkuil 			.type   = CX23885_VMUX_SVIDEO,
671cce11b09SHans Verkuil 			.vmux   = CX25840_VIN7_CH3 |
672cce11b09SHans Verkuil 				  CX25840_VIN4_CH2 |
673cce11b09SHans Verkuil 				  CX25840_VIN8_CH1 |
674cce11b09SHans Verkuil 				  CX25840_SVIDEO_ON,
675cce11b09SHans Verkuil 			.amux   = CX25840_AUDIO7,
676cce11b09SHans Verkuil 		} },
677cce11b09SHans Verkuil 	},
67829442266SOlli Salonen 	[CX23885_BOARD_DVBSKY_T9580] = {
67929442266SOlli Salonen 		.name		= "DVBSky T9580",
68029442266SOlli Salonen 		.portb		= CX23885_MPEG_DVB,
68129442266SOlli Salonen 		.portc		= CX23885_MPEG_DVB,
68229442266SOlli Salonen 	},
68382c10276SOlli Salonen 	[CX23885_BOARD_DVBSKY_T980C] = {
68482c10276SOlli Salonen 		.name		= "DVBSky T980C",
68582c10276SOlli Salonen 		.portb		= CX23885_MPEG_DVB,
68682c10276SOlli Salonen 	},
687b285192aSMauro Carvalho Chehab };
688b285192aSMauro Carvalho Chehab const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
689b285192aSMauro Carvalho Chehab 
690b285192aSMauro Carvalho Chehab /* ------------------------------------------------------------------ */
691b285192aSMauro Carvalho Chehab /* PCI subsystem IDs                                                  */
692b285192aSMauro Carvalho Chehab 
693b285192aSMauro Carvalho Chehab struct cx23885_subid cx23885_subids[] = {
694b285192aSMauro Carvalho Chehab 	{
695b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
696b285192aSMauro Carvalho Chehab 		.subdevice = 0x3400,
697b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_UNKNOWN,
698b285192aSMauro Carvalho Chehab 	}, {
699b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
700b285192aSMauro Carvalho Chehab 		.subdevice = 0x7600,
701b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
702b285192aSMauro Carvalho Chehab 	}, {
703b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
704b285192aSMauro Carvalho Chehab 		.subdevice = 0x7800,
705b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1800,
706b285192aSMauro Carvalho Chehab 	}, {
707b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
708b285192aSMauro Carvalho Chehab 		.subdevice = 0x7801,
709b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1800,
710b285192aSMauro Carvalho Chehab 	}, {
711b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
712b285192aSMauro Carvalho Chehab 		.subdevice = 0x7809,
713b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1800,
714b285192aSMauro Carvalho Chehab 	}, {
715b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
716b285192aSMauro Carvalho Chehab 		.subdevice = 0x7911,
717b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1250,
718b285192aSMauro Carvalho Chehab 	}, {
719b285192aSMauro Carvalho Chehab 		.subvendor = 0x18ac,
720b285192aSMauro Carvalho Chehab 		.subdevice = 0xd500,
721b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
722b285192aSMauro Carvalho Chehab 	}, {
723b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
724b285192aSMauro Carvalho Chehab 		.subdevice = 0x7790,
725b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
726b285192aSMauro Carvalho Chehab 	}, {
727b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
728b285192aSMauro Carvalho Chehab 		.subdevice = 0x7797,
729b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
730b285192aSMauro Carvalho Chehab 	}, {
731b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
732b285192aSMauro Carvalho Chehab 		.subdevice = 0x7710,
733b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1500,
734b285192aSMauro Carvalho Chehab 	}, {
735b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
736b285192aSMauro Carvalho Chehab 		.subdevice = 0x7717,
737b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1500,
738b285192aSMauro Carvalho Chehab 	}, {
739b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
740b285192aSMauro Carvalho Chehab 		.subdevice = 0x71d1,
741b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1200,
742b285192aSMauro Carvalho Chehab 	}, {
743b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
744b285192aSMauro Carvalho Chehab 		.subdevice = 0x71d3,
745b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1200,
746b285192aSMauro Carvalho Chehab 	}, {
747b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
748b285192aSMauro Carvalho Chehab 		.subdevice = 0x8101,
749b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1700,
750b285192aSMauro Carvalho Chehab 	}, {
751b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
752b285192aSMauro Carvalho Chehab 		.subdevice = 0x8010,
753b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1400,
754b285192aSMauro Carvalho Chehab 	}, {
755b285192aSMauro Carvalho Chehab 		.subvendor = 0x18ac,
756b285192aSMauro Carvalho Chehab 		.subdevice = 0xd618,
757b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
758b285192aSMauro Carvalho Chehab 	}, {
759b285192aSMauro Carvalho Chehab 		.subvendor = 0x18ac,
760b285192aSMauro Carvalho Chehab 		.subdevice = 0xdb78,
761b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
762b285192aSMauro Carvalho Chehab 	}, {
763b285192aSMauro Carvalho Chehab 		.subvendor = 0x107d,
764b285192aSMauro Carvalho Chehab 		.subdevice = 0x6681,
765b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
766b285192aSMauro Carvalho Chehab 	}, {
767b285192aSMauro Carvalho Chehab 		.subvendor = 0x107d,
768642ca1a0SAnca Emanuel 		.subdevice = 0x6f21,
769642ca1a0SAnca Emanuel 		.card      = CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200,
770642ca1a0SAnca Emanuel 	}, {
771642ca1a0SAnca Emanuel 		.subvendor = 0x107d,
772b285192aSMauro Carvalho Chehab 		.subdevice = 0x6f39,
773b285192aSMauro Carvalho Chehab 		.card	   = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000,
774b285192aSMauro Carvalho Chehab 	}, {
775b285192aSMauro Carvalho Chehab 		.subvendor = 0x185b,
776b285192aSMauro Carvalho Chehab 		.subdevice = 0xe800,
777b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_COMPRO_VIDEOMATE_E650F,
778b285192aSMauro Carvalho Chehab 	}, {
779b285192aSMauro Carvalho Chehab 		.subvendor = 0x6920,
780b285192aSMauro Carvalho Chehab 		.subdevice = 0x8888,
781b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_TBS_6920,
782b285192aSMauro Carvalho Chehab 	}, {
783e6001482SLuis Alves 		.subvendor = 0x6980,
784e6001482SLuis Alves 		.subdevice = 0x8888,
785e6001482SLuis Alves 		.card      = CX23885_BOARD_TBS_6980,
786e6001482SLuis Alves 	}, {
787e6001482SLuis Alves 		.subvendor = 0x6981,
788e6001482SLuis Alves 		.subdevice = 0x8888,
789e6001482SLuis Alves 		.card      = CX23885_BOARD_TBS_6981,
790e6001482SLuis Alves 	}, {
791b285192aSMauro Carvalho Chehab 		.subvendor = 0xd470,
792b285192aSMauro Carvalho Chehab 		.subdevice = 0x9022,
793b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_TEVII_S470,
794b285192aSMauro Carvalho Chehab 	}, {
795b285192aSMauro Carvalho Chehab 		.subvendor = 0x0001,
796b285192aSMauro Carvalho Chehab 		.subdevice = 0x2005,
797b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_DVBWORLD_2005,
798b285192aSMauro Carvalho Chehab 	}, {
799b285192aSMauro Carvalho Chehab 		.subvendor = 0x1b55,
800b285192aSMauro Carvalho Chehab 		.subdevice = 0x2a2c,
801b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_NETUP_DUAL_DVBS2_CI,
802b285192aSMauro Carvalho Chehab 	}, {
803b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
804b285192aSMauro Carvalho Chehab 		.subdevice = 0x2211,
805b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1270,
806b285192aSMauro Carvalho Chehab 	}, {
807b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
808b285192aSMauro Carvalho Chehab 		.subdevice = 0x2215,
809b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1275,
810b285192aSMauro Carvalho Chehab 	}, {
811b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
812b285192aSMauro Carvalho Chehab 		.subdevice = 0x221d,
813b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1275,
814b285192aSMauro Carvalho Chehab 	}, {
815b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
816b285192aSMauro Carvalho Chehab 		.subdevice = 0x2251,
817b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1255,
818b285192aSMauro Carvalho Chehab 	}, {
819b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
820b285192aSMauro Carvalho Chehab 		.subdevice = 0x2259,
821b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1255_22111,
822b285192aSMauro Carvalho Chehab 	}, {
823b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
824b285192aSMauro Carvalho Chehab 		.subdevice = 0x2291,
825b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210,
826b285192aSMauro Carvalho Chehab 	}, {
827b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
828b285192aSMauro Carvalho Chehab 		.subdevice = 0x2295,
829b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210,
830b285192aSMauro Carvalho Chehab 	}, {
831b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
832b285192aSMauro Carvalho Chehab 		.subdevice = 0x2299,
833b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210,
834b285192aSMauro Carvalho Chehab 	}, {
835b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
836b285192aSMauro Carvalho Chehab 		.subdevice = 0x229d,
837b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
838b285192aSMauro Carvalho Chehab 	}, {
839b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
840b285192aSMauro Carvalho Chehab 		.subdevice = 0x22f0,
841b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210,
842b285192aSMauro Carvalho Chehab 	}, {
843b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
844b285192aSMauro Carvalho Chehab 		.subdevice = 0x22f1,
845b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1255,
846b285192aSMauro Carvalho Chehab 	}, {
847b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
848b285192aSMauro Carvalho Chehab 		.subdevice = 0x22f2,
849b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1275,
850b285192aSMauro Carvalho Chehab 	}, {
851b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
852b285192aSMauro Carvalho Chehab 		.subdevice = 0x22f3,
853b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
854b285192aSMauro Carvalho Chehab 	}, {
855b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
856b285192aSMauro Carvalho Chehab 		.subdevice = 0x22f4,
857b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210,
858b285192aSMauro Carvalho Chehab 	}, {
859b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
860b285192aSMauro Carvalho Chehab 		.subdevice = 0x22f5,
861b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
862b285192aSMauro Carvalho Chehab 	}, {
863b285192aSMauro Carvalho Chehab 		.subvendor = 0x14f1,
864b285192aSMauro Carvalho Chehab 		.subdevice = 0x8651,
865b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_MYGICA_X8506,
866b285192aSMauro Carvalho Chehab 	}, {
867b285192aSMauro Carvalho Chehab 		.subvendor = 0x14f1,
868b285192aSMauro Carvalho Chehab 		.subdevice = 0x8657,
869b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_MAGICPRO_PROHDTVE2,
870b285192aSMauro Carvalho Chehab 	}, {
871b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
872b285192aSMauro Carvalho Chehab 		.subdevice = 0x8541,
873b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1850,
874b285192aSMauro Carvalho Chehab 	}, {
875b285192aSMauro Carvalho Chehab 		.subvendor = 0x1858,
876b285192aSMauro Carvalho Chehab 		.subdevice = 0xe800,
877b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_COMPRO_VIDEOMATE_E800,
878b285192aSMauro Carvalho Chehab 	}, {
879b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
880b285192aSMauro Carvalho Chehab 		.subdevice = 0x8551,
881b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1290,
882b285192aSMauro Carvalho Chehab 	}, {
883b285192aSMauro Carvalho Chehab 		.subvendor = 0x14f1,
884b285192aSMauro Carvalho Chehab 		.subdevice = 0x8578,
885b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_MYGICA_X8558PRO,
886b285192aSMauro Carvalho Chehab 	}, {
887b285192aSMauro Carvalho Chehab 		.subvendor = 0x107d,
888b285192aSMauro Carvalho Chehab 		.subdevice = 0x6f22,
889b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_LEADTEK_WINFAST_PXTV1200,
890b285192aSMauro Carvalho Chehab 	}, {
891b285192aSMauro Carvalho Chehab 		.subvendor = 0x5654,
892b285192aSMauro Carvalho Chehab 		.subdevice = 0x2390,
893b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_GOTVIEW_X5_3D_HYBRID,
894b285192aSMauro Carvalho Chehab 	}, {
895b285192aSMauro Carvalho Chehab 		.subvendor = 0x1b55,
896b285192aSMauro Carvalho Chehab 		.subdevice = 0xe2e4,
897b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF,
898b285192aSMauro Carvalho Chehab 	}, {
899b285192aSMauro Carvalho Chehab 		.subvendor = 0x14f1,
900b285192aSMauro Carvalho Chehab 		.subdevice = 0x8502,
901b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_MYGICA_X8507,
902b285192aSMauro Carvalho Chehab 	}, {
903b285192aSMauro Carvalho Chehab 		.subvendor = 0x153b,
904b285192aSMauro Carvalho Chehab 		.subdevice = 0x117e,
905b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL,
906b285192aSMauro Carvalho Chehab 	}, {
907b285192aSMauro Carvalho Chehab 		.subvendor = 0xd471,
908b285192aSMauro Carvalho Chehab 		.subdevice = 0x9022,
909b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_TEVII_S471,
910f667190bSMariusz Bia?o?czyk 	}, {
911f667190bSMariusz Bia?o?czyk 		.subvendor = 0x8000,
912f667190bSMariusz Bia?o?czyk 		.subdevice = 0x3034,
913f667190bSMariusz Bia?o?czyk 		.card      = CX23885_BOARD_PROF_8000,
9147c62f5a1SMichael Krufky 	}, {
9157c62f5a1SMichael Krufky 		.subvendor = 0x0070,
9167c62f5a1SMichael Krufky 		.subdevice = 0xc108,
9177c62f5a1SMichael Krufky 		.card      = CX23885_BOARD_HAUPPAUGE_HVR4400,
9187c62f5a1SMichael Krufky 	}, {
9197c62f5a1SMichael Krufky 		.subvendor = 0x0070,
9207c62f5a1SMichael Krufky 		.subdevice = 0xc138,
9217c62f5a1SMichael Krufky 		.card      = CX23885_BOARD_HAUPPAUGE_HVR4400,
9227c62f5a1SMichael Krufky 	}, {
9237c62f5a1SMichael Krufky 		.subvendor = 0x0070,
9247c62f5a1SMichael Krufky 		.subdevice = 0xc12a,
9257c62f5a1SMichael Krufky 		.card      = CX23885_BOARD_HAUPPAUGE_HVR4400,
9267c62f5a1SMichael Krufky 	}, {
9277c62f5a1SMichael Krufky 		.subvendor = 0x0070,
9287c62f5a1SMichael Krufky 		.subdevice = 0xc1f8,
9297c62f5a1SMichael Krufky 		.card      = CX23885_BOARD_HAUPPAUGE_HVR4400,
930e8d42373SOleh Kravchenko 	}, {
931e8d42373SOleh Kravchenko 		.subvendor = 0x1461,
932e8d42373SOleh Kravchenko 		.subdevice = 0xd939,
933e8d42373SOleh Kravchenko 		.card      = CX23885_BOARD_AVERMEDIA_HC81R,
934cce11b09SHans Verkuil 	}, {
935cce11b09SHans Verkuil 		.subvendor = 0x0070,
936cce11b09SHans Verkuil 		.subdevice = 0x7133,
937cce11b09SHans Verkuil 		.card      = CX23885_BOARD_HAUPPAUGE_IMPACTVCBE,
93846b21bbaSJames Harper 	}, {
93946b21bbaSJames Harper 		.subvendor = 0x18ac,
94046b21bbaSJames Harper 		.subdevice = 0xdb98,
94146b21bbaSJames Harper 		.card      = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2,
94229442266SOlli Salonen 	}, {
94329442266SOlli Salonen 		.subvendor = 0x4254,
94429442266SOlli Salonen 		.subdevice = 0x9580,
94529442266SOlli Salonen 		.card      = CX23885_BOARD_DVBSKY_T9580,
94682c10276SOlli Salonen 	}, {
94782c10276SOlli Salonen 		.subvendor = 0x4254,
94882c10276SOlli Salonen 		.subdevice = 0x980c,
94982c10276SOlli Salonen 		.card      = CX23885_BOARD_DVBSKY_T980C,
950b285192aSMauro Carvalho Chehab 	},
951b285192aSMauro Carvalho Chehab };
952b285192aSMauro Carvalho Chehab const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
953b285192aSMauro Carvalho Chehab 
954b285192aSMauro Carvalho Chehab void cx23885_card_list(struct cx23885_dev *dev)
955b285192aSMauro Carvalho Chehab {
956b285192aSMauro Carvalho Chehab 	int i;
957b285192aSMauro Carvalho Chehab 
958b285192aSMauro Carvalho Chehab 	if (0 == dev->pci->subsystem_vendor &&
959b285192aSMauro Carvalho Chehab 	    0 == dev->pci->subsystem_device) {
960b285192aSMauro Carvalho Chehab 		printk(KERN_INFO
961b285192aSMauro Carvalho Chehab 			"%s: Board has no valid PCIe Subsystem ID and can't\n"
962b285192aSMauro Carvalho Chehab 		       "%s: be autodetected. Pass card=<n> insmod option\n"
963b285192aSMauro Carvalho Chehab 		       "%s: to workaround that. Redirect complaints to the\n"
964b285192aSMauro Carvalho Chehab 		       "%s: vendor of the TV card.  Best regards,\n"
965b285192aSMauro Carvalho Chehab 		       "%s:         -- tux\n",
966b285192aSMauro Carvalho Chehab 		       dev->name, dev->name, dev->name, dev->name, dev->name);
967b285192aSMauro Carvalho Chehab 	} else {
968b285192aSMauro Carvalho Chehab 		printk(KERN_INFO
969b285192aSMauro Carvalho Chehab 			"%s: Your board isn't known (yet) to the driver.\n"
970b285192aSMauro Carvalho Chehab 		       "%s: Try to pick one of the existing card configs via\n"
971b285192aSMauro Carvalho Chehab 		       "%s: card=<n> insmod option.  Updating to the latest\n"
972b285192aSMauro Carvalho Chehab 		       "%s: version might help as well.\n",
973b285192aSMauro Carvalho Chehab 		       dev->name, dev->name, dev->name, dev->name);
974b285192aSMauro Carvalho Chehab 	}
975b285192aSMauro Carvalho Chehab 	printk(KERN_INFO "%s: Here is a list of valid choices for the card=<n> insmod option:\n",
976b285192aSMauro Carvalho Chehab 	       dev->name);
977b285192aSMauro Carvalho Chehab 	for (i = 0; i < cx23885_bcount; i++)
978b285192aSMauro Carvalho Chehab 		printk(KERN_INFO "%s:    card=%d -> %s\n",
979b285192aSMauro Carvalho Chehab 		       dev->name, i, cx23885_boards[i].name);
980b285192aSMauro Carvalho Chehab }
981b285192aSMauro Carvalho Chehab 
982b285192aSMauro Carvalho Chehab static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
983b285192aSMauro Carvalho Chehab {
984b285192aSMauro Carvalho Chehab 	struct tveeprom tv;
985b285192aSMauro Carvalho Chehab 
986b285192aSMauro Carvalho Chehab 	tveeprom_hauppauge_analog(&dev->i2c_bus[0].i2c_client, &tv,
987b285192aSMauro Carvalho Chehab 		eeprom_data);
988b285192aSMauro Carvalho Chehab 
989b285192aSMauro Carvalho Chehab 	/* Make sure we support the board model */
990b285192aSMauro Carvalho Chehab 	switch (tv.model) {
991b285192aSMauro Carvalho Chehab 	case 22001:
992b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1270 (PCIe, Retail, half height)
993b285192aSMauro Carvalho Chehab 		 * ATSC/QAM and basic analog, IR Blast */
994b285192aSMauro Carvalho Chehab 	case 22009:
995b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1210 (PCIe, Retail, half height)
996b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog, IR Blast */
997b285192aSMauro Carvalho Chehab 	case 22011:
998b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1270 (PCIe, Retail, half height)
999b285192aSMauro Carvalho Chehab 		 * ATSC/QAM and basic analog, IR Recv */
1000b285192aSMauro Carvalho Chehab 	case 22019:
1001b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1210 (PCIe, Retail, half height)
1002b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog, IR Recv */
1003b285192aSMauro Carvalho Chehab 	case 22021:
1004b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1275 (PCIe, Retail, half height)
1005b285192aSMauro Carvalho Chehab 		 * ATSC/QAM and basic analog, IR Recv */
1006b285192aSMauro Carvalho Chehab 	case 22029:
1007b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1210 (PCIe, Retail, half height)
1008b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog, IR Recv */
1009b285192aSMauro Carvalho Chehab 	case 22101:
1010b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1270 (PCIe, Retail, full height)
1011b285192aSMauro Carvalho Chehab 		 * ATSC/QAM and basic analog, IR Blast */
1012b285192aSMauro Carvalho Chehab 	case 22109:
1013b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1210 (PCIe, Retail, full height)
1014b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog, IR Blast */
1015b285192aSMauro Carvalho Chehab 	case 22111:
1016b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1270 (PCIe, Retail, full height)
1017b285192aSMauro Carvalho Chehab 		 * ATSC/QAM and basic analog, IR Recv */
1018b285192aSMauro Carvalho Chehab 	case 22119:
1019b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1210 (PCIe, Retail, full height)
1020b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog, IR Recv */
1021b285192aSMauro Carvalho Chehab 	case 22121:
1022b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1275 (PCIe, Retail, full height)
1023b285192aSMauro Carvalho Chehab 		 * ATSC/QAM and basic analog, IR Recv */
1024b285192aSMauro Carvalho Chehab 	case 22129:
1025b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1210 (PCIe, Retail, full height)
1026b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog, IR Recv */
1027b285192aSMauro Carvalho Chehab 	case 71009:
1028b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, Retail, full height)
1029b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
1030cce11b09SHans Verkuil 	case 71100:
1031cce11b09SHans Verkuil 		/* WinTV-ImpactVCB-e (PCIe, Retail, half height)
1032cce11b09SHans Verkuil 		 * Basic analog */
1033b285192aSMauro Carvalho Chehab 	case 71359:
1034b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, OEM, half height)
1035b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
1036b285192aSMauro Carvalho Chehab 	case 71439:
1037b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, OEM, half height)
1038b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
1039b285192aSMauro Carvalho Chehab 	case 71449:
1040b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, OEM, full height)
1041b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
1042b285192aSMauro Carvalho Chehab 	case 71939:
1043b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, OEM, half height)
1044b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
1045b285192aSMauro Carvalho Chehab 	case 71949:
1046b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, OEM, full height)
1047b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
1048b285192aSMauro Carvalho Chehab 	case 71959:
1049b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, OEM, full height)
1050b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
1051b285192aSMauro Carvalho Chehab 	case 71979:
1052b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, OEM, half height)
1053b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
1054b285192aSMauro Carvalho Chehab 	case 71999:
1055b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, OEM, full height)
1056b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
1057b285192aSMauro Carvalho Chehab 	case 76601:
1058b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
1059b285192aSMauro Carvalho Chehab 			channel ATSC and MPEG2 HW Encoder */
1060b285192aSMauro Carvalho Chehab 	case 77001:
1061b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
1062b285192aSMauro Carvalho Chehab 			and Basic analog */
1063b285192aSMauro Carvalho Chehab 	case 77011:
1064b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
1065b285192aSMauro Carvalho Chehab 			and Basic analog */
1066b285192aSMauro Carvalho Chehab 	case 77041:
1067b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
1068b285192aSMauro Carvalho Chehab 			and Basic analog */
1069b285192aSMauro Carvalho Chehab 	case 77051:
1070b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
1071b285192aSMauro Carvalho Chehab 			and Basic analog */
1072b285192aSMauro Carvalho Chehab 	case 78011:
1073b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
1074b285192aSMauro Carvalho Chehab 			Dual channel ATSC and MPEG2 HW Encoder */
1075b285192aSMauro Carvalho Chehab 	case 78501:
1076b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
1077b285192aSMauro Carvalho Chehab 			Dual channel ATSC and MPEG2 HW Encoder */
1078b285192aSMauro Carvalho Chehab 	case 78521:
1079b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
1080b285192aSMauro Carvalho Chehab 			Dual channel ATSC and MPEG2 HW Encoder */
1081b285192aSMauro Carvalho Chehab 	case 78531:
1082b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
1083b285192aSMauro Carvalho Chehab 			Dual channel ATSC and MPEG2 HW Encoder */
1084b285192aSMauro Carvalho Chehab 	case 78631:
1085b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
1086b285192aSMauro Carvalho Chehab 			Dual channel ATSC and MPEG2 HW Encoder */
1087b285192aSMauro Carvalho Chehab 	case 79001:
1088b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1250 (PCIe, Retail, IR, full height,
1089b285192aSMauro Carvalho Chehab 			ATSC and Basic analog */
1090b285192aSMauro Carvalho Chehab 	case 79101:
1091b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1250 (PCIe, Retail, IR, half height,
1092b285192aSMauro Carvalho Chehab 			ATSC and Basic analog */
1093b285192aSMauro Carvalho Chehab 	case 79501:
1094b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1250 (PCIe, No IR, half height,
1095b285192aSMauro Carvalho Chehab 			ATSC [at least] and Basic analog) */
1096b285192aSMauro Carvalho Chehab 	case 79561:
1097b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
1098b285192aSMauro Carvalho Chehab 			ATSC and Basic analog */
1099b285192aSMauro Carvalho Chehab 	case 79571:
1100b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
1101b285192aSMauro Carvalho Chehab 		 ATSC and Basic analog */
1102b285192aSMauro Carvalho Chehab 	case 79671:
1103b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
1104b285192aSMauro Carvalho Chehab 			ATSC and Basic analog */
1105b285192aSMauro Carvalho Chehab 	case 80019:
1106b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1400 (Express Card, Retail, IR,
1107b285192aSMauro Carvalho Chehab 		 * DVB-T and Basic analog */
1108b285192aSMauro Carvalho Chehab 	case 81509:
1109b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
1110b285192aSMauro Carvalho Chehab 		 * DVB-T and MPEG2 HW Encoder */
1111b285192aSMauro Carvalho Chehab 	case 81519:
1112b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
1113b285192aSMauro Carvalho Chehab 		 * DVB-T and MPEG2 HW Encoder */
1114b285192aSMauro Carvalho Chehab 		break;
1115b285192aSMauro Carvalho Chehab 	case 85021:
1116b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1850 (PCIe, Retail, 3.5mm in, IR, FM,
1117b285192aSMauro Carvalho Chehab 			Dual channel ATSC and MPEG2 HW Encoder */
1118b285192aSMauro Carvalho Chehab 		break;
1119b285192aSMauro Carvalho Chehab 	case 85721:
1120b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1290 (PCIe, OEM, RCA in, IR,
1121b285192aSMauro Carvalho Chehab 			Dual channel ATSC and Basic analog */
1122b285192aSMauro Carvalho Chehab 		break;
1123b285192aSMauro Carvalho Chehab 	default:
1124b285192aSMauro Carvalho Chehab 		printk(KERN_WARNING "%s: warning: "
1125b285192aSMauro Carvalho Chehab 			"unknown hauppauge model #%d\n",
1126b285192aSMauro Carvalho Chehab 			dev->name, tv.model);
1127b285192aSMauro Carvalho Chehab 		break;
1128b285192aSMauro Carvalho Chehab 	}
1129b285192aSMauro Carvalho Chehab 
1130b285192aSMauro Carvalho Chehab 	printk(KERN_INFO "%s: hauppauge eeprom: model=%d\n",
1131b285192aSMauro Carvalho Chehab 			dev->name, tv.model);
1132b285192aSMauro Carvalho Chehab }
1133b285192aSMauro Carvalho Chehab 
1134e6001482SLuis Alves /* Some TBS cards require initing a chip using a bitbanged SPI attached
1135e6001482SLuis Alves    to the cx23885 gpio's. If this chip doesn't get init'ed the demod
1136e6001482SLuis Alves    doesn't respond to any command. */
1137e6001482SLuis Alves static void tbs_card_init(struct cx23885_dev *dev)
1138e6001482SLuis Alves {
1139e6001482SLuis Alves 	int i;
1140e6001482SLuis Alves 	const u8 buf[] = {
1141e6001482SLuis Alves 		0xe0, 0x06, 0x66, 0x33, 0x65,
1142e6001482SLuis Alves 		0x01, 0x17, 0x06, 0xde};
1143e6001482SLuis Alves 
1144e6001482SLuis Alves 	switch (dev->board) {
1145e6001482SLuis Alves 	case CX23885_BOARD_TBS_6980:
1146e6001482SLuis Alves 	case CX23885_BOARD_TBS_6981:
1147e6001482SLuis Alves 		cx_set(GP0_IO, 0x00070007);
1148e6001482SLuis Alves 		usleep_range(1000, 10000);
1149e6001482SLuis Alves 		cx_clear(GP0_IO, 2);
1150e6001482SLuis Alves 		usleep_range(1000, 10000);
1151e6001482SLuis Alves 		for (i = 0; i < 9 * 8; i++) {
1152e6001482SLuis Alves 			cx_clear(GP0_IO, 7);
1153e6001482SLuis Alves 			usleep_range(1000, 10000);
1154e6001482SLuis Alves 			cx_set(GP0_IO,
1155e6001482SLuis Alves 				((buf[i >> 3] >> (7 - (i & 7))) & 1) | 4);
1156e6001482SLuis Alves 			usleep_range(1000, 10000);
1157e6001482SLuis Alves 		}
1158e6001482SLuis Alves 		cx_set(GP0_IO, 7);
1159e6001482SLuis Alves 		break;
1160e6001482SLuis Alves 	}
1161e6001482SLuis Alves }
1162e6001482SLuis Alves 
1163b285192aSMauro Carvalho Chehab int cx23885_tuner_callback(void *priv, int component, int command, int arg)
1164b285192aSMauro Carvalho Chehab {
1165b285192aSMauro Carvalho Chehab 	struct cx23885_tsport *port = priv;
1166b285192aSMauro Carvalho Chehab 	struct cx23885_dev *dev = port->dev;
1167b285192aSMauro Carvalho Chehab 	u32 bitmask = 0;
1168b285192aSMauro Carvalho Chehab 
1169b285192aSMauro Carvalho Chehab 	if ((command == XC2028_RESET_CLK) || (command == XC2028_I2C_FLUSH))
1170b285192aSMauro Carvalho Chehab 		return 0;
1171b285192aSMauro Carvalho Chehab 
1172b285192aSMauro Carvalho Chehab 	if (command != 0) {
1173b285192aSMauro Carvalho Chehab 		printk(KERN_ERR "%s(): Unknown command 0x%x.\n",
1174b285192aSMauro Carvalho Chehab 			__func__, command);
1175b285192aSMauro Carvalho Chehab 		return -EINVAL;
1176b285192aSMauro Carvalho Chehab 	}
1177b285192aSMauro Carvalho Chehab 
1178b285192aSMauro Carvalho Chehab 	switch (dev->board) {
1179b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1400:
1180b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500:
1181b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1182b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1183642ca1a0SAnca Emanuel 	case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
1184b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1185b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1186b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1187b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
1188b285192aSMauro Carvalho Chehab 		/* Tuner Reset Command */
1189b285192aSMauro Carvalho Chehab 		bitmask = 0x04;
1190b285192aSMauro Carvalho Chehab 		break;
1191b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1192b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
119346b21bbaSJames Harper 	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
1194b285192aSMauro Carvalho Chehab 		/* Two identical tuners on two different i2c buses,
1195b285192aSMauro Carvalho Chehab 		 * we need to reset the correct gpio. */
1196b285192aSMauro Carvalho Chehab 		if (port->nr == 1)
1197b285192aSMauro Carvalho Chehab 			bitmask = 0x01;
1198b285192aSMauro Carvalho Chehab 		else if (port->nr == 2)
1199b285192aSMauro Carvalho Chehab 			bitmask = 0x04;
1200b285192aSMauro Carvalho Chehab 		break;
1201b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1202b285192aSMauro Carvalho Chehab 		/* Tuner Reset Command */
1203b285192aSMauro Carvalho Chehab 		bitmask = 0x02;
1204b285192aSMauro Carvalho Chehab 		break;
1205b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1206b285192aSMauro Carvalho Chehab 		altera_ci_tuner_reset(dev, port->nr);
1207b285192aSMauro Carvalho Chehab 		break;
1208e8d42373SOleh Kravchenko 	case CX23885_BOARD_AVERMEDIA_HC81R:
1209e8d42373SOleh Kravchenko 		/* XC3028L Reset Command */
1210e8d42373SOleh Kravchenko 		bitmask = 1 << 2;
1211e8d42373SOleh Kravchenko 		break;
1212b285192aSMauro Carvalho Chehab 	}
1213b285192aSMauro Carvalho Chehab 
1214b285192aSMauro Carvalho Chehab 	if (bitmask) {
1215b285192aSMauro Carvalho Chehab 		/* Drive the tuner into reset and back out */
1216b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, bitmask);
1217b285192aSMauro Carvalho Chehab 		mdelay(200);
1218b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, bitmask);
1219b285192aSMauro Carvalho Chehab 	}
1220b285192aSMauro Carvalho Chehab 
1221b285192aSMauro Carvalho Chehab 	return 0;
1222b285192aSMauro Carvalho Chehab }
1223b285192aSMauro Carvalho Chehab 
1224b285192aSMauro Carvalho Chehab void cx23885_gpio_setup(struct cx23885_dev *dev)
1225b285192aSMauro Carvalho Chehab {
1226b285192aSMauro Carvalho Chehab 	switch (dev->board) {
1227b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1250:
1228b285192aSMauro Carvalho Chehab 		/* GPIO-0 cx24227 demodulator reset */
1229b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
1230b285192aSMauro Carvalho Chehab 		break;
1231b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500:
1232b285192aSMauro Carvalho Chehab 		/* GPIO-0 cx24227 demodulator */
1233b285192aSMauro Carvalho Chehab 		/* GPIO-2 xc3028 tuner */
1234b285192aSMauro Carvalho Chehab 
1235b285192aSMauro Carvalho Chehab 		/* Put the parts into reset */
1236b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050000);
1237b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x00000005);
1238b285192aSMauro Carvalho Chehab 		msleep(5);
1239b285192aSMauro Carvalho Chehab 
1240b285192aSMauro Carvalho Chehab 		/* Bring the parts out of reset */
1241b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050005);
1242b285192aSMauro Carvalho Chehab 		break;
1243b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1244b285192aSMauro Carvalho Chehab 		/* GPIO-0 cx24227 demodulator reset */
1245b285192aSMauro Carvalho Chehab 		/* GPIO-2 xc5000 tuner reset */
1246b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
1247b285192aSMauro Carvalho Chehab 		break;
1248b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1800:
1249b285192aSMauro Carvalho Chehab 		/* GPIO-0 656_CLK */
1250b285192aSMauro Carvalho Chehab 		/* GPIO-1 656_D0 */
1251b285192aSMauro Carvalho Chehab 		/* GPIO-2 8295A Reset */
1252b285192aSMauro Carvalho Chehab 		/* GPIO-3-10 cx23417 data0-7 */
1253b285192aSMauro Carvalho Chehab 		/* GPIO-11-14 cx23417 addr0-3 */
1254b285192aSMauro Carvalho Chehab 		/* GPIO-15-18 cx23417 READY, CS, RD, WR */
1255b285192aSMauro Carvalho Chehab 		/* GPIO-19 IR_RX */
1256b285192aSMauro Carvalho Chehab 
1257b285192aSMauro Carvalho Chehab 		/* CX23417 GPIO's */
1258b285192aSMauro Carvalho Chehab 		/* EIO15 Zilog Reset */
1259b285192aSMauro Carvalho Chehab 		/* EIO14 S5H1409/CX24227 Reset */
1260b285192aSMauro Carvalho Chehab 		mc417_gpio_enable(dev, GPIO_15 | GPIO_14, 1);
1261b285192aSMauro Carvalho Chehab 
1262b285192aSMauro Carvalho Chehab 		/* Put the demod into reset and protect the eeprom */
1263b285192aSMauro Carvalho Chehab 		mc417_gpio_clear(dev, GPIO_15 | GPIO_14);
1264b285192aSMauro Carvalho Chehab 		mdelay(100);
1265b285192aSMauro Carvalho Chehab 
1266b285192aSMauro Carvalho Chehab 		/* Bring the demod and blaster out of reset */
1267b285192aSMauro Carvalho Chehab 		mc417_gpio_set(dev, GPIO_15 | GPIO_14);
1268b285192aSMauro Carvalho Chehab 		mdelay(100);
1269b285192aSMauro Carvalho Chehab 
1270b285192aSMauro Carvalho Chehab 		/* Force the TDA8295A into reset and back */
1271b285192aSMauro Carvalho Chehab 		cx23885_gpio_enable(dev, GPIO_2, 1);
1272b285192aSMauro Carvalho Chehab 		cx23885_gpio_set(dev, GPIO_2);
1273b285192aSMauro Carvalho Chehab 		mdelay(20);
1274b285192aSMauro Carvalho Chehab 		cx23885_gpio_clear(dev, GPIO_2);
1275b285192aSMauro Carvalho Chehab 		mdelay(20);
1276b285192aSMauro Carvalho Chehab 		cx23885_gpio_set(dev, GPIO_2);
1277b285192aSMauro Carvalho Chehab 		mdelay(20);
1278b285192aSMauro Carvalho Chehab 		break;
1279b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1200:
1280b285192aSMauro Carvalho Chehab 		/* GPIO-0 tda10048 demodulator reset */
1281b285192aSMauro Carvalho Chehab 		/* GPIO-2 tda18271 tuner reset */
1282b285192aSMauro Carvalho Chehab 
1283b285192aSMauro Carvalho Chehab 		/* Put the parts into reset and back */
1284b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050000);
1285b285192aSMauro Carvalho Chehab 		mdelay(20);
1286b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x00000005);
1287b285192aSMauro Carvalho Chehab 		mdelay(20);
1288b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050005);
1289b285192aSMauro Carvalho Chehab 		break;
1290b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1700:
1291b285192aSMauro Carvalho Chehab 		/* GPIO-0 TDA10048 demodulator reset */
1292b285192aSMauro Carvalho Chehab 		/* GPIO-2 TDA8295A Reset */
1293b285192aSMauro Carvalho Chehab 		/* GPIO-3-10 cx23417 data0-7 */
1294b285192aSMauro Carvalho Chehab 		/* GPIO-11-14 cx23417 addr0-3 */
1295b285192aSMauro Carvalho Chehab 		/* GPIO-15-18 cx23417 READY, CS, RD, WR */
1296b285192aSMauro Carvalho Chehab 
1297b285192aSMauro Carvalho Chehab 		/* The following GPIO's are on the interna AVCore (cx25840) */
1298b285192aSMauro Carvalho Chehab 		/* GPIO-19 IR_RX */
1299b285192aSMauro Carvalho Chehab 		/* GPIO-20 IR_TX 416/DVBT Select */
1300b285192aSMauro Carvalho Chehab 		/* GPIO-21 IIS DAT */
1301b285192aSMauro Carvalho Chehab 		/* GPIO-22 IIS WCLK */
1302b285192aSMauro Carvalho Chehab 		/* GPIO-23 IIS BCLK */
1303b285192aSMauro Carvalho Chehab 
1304b285192aSMauro Carvalho Chehab 		/* Put the parts into reset and back */
1305b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050000);
1306b285192aSMauro Carvalho Chehab 		mdelay(20);
1307b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x00000005);
1308b285192aSMauro Carvalho Chehab 		mdelay(20);
1309b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050005);
1310b285192aSMauro Carvalho Chehab 		break;
1311b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1400:
1312b285192aSMauro Carvalho Chehab 		/* GPIO-0  Dibcom7000p demodulator reset */
1313b285192aSMauro Carvalho Chehab 		/* GPIO-2  xc3028L tuner reset */
1314b285192aSMauro Carvalho Chehab 		/* GPIO-13 LED */
1315b285192aSMauro Carvalho Chehab 
1316b285192aSMauro Carvalho Chehab 		/* Put the parts into reset and back */
1317b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050000);
1318b285192aSMauro Carvalho Chehab 		mdelay(20);
1319b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x00000005);
1320b285192aSMauro Carvalho Chehab 		mdelay(20);
1321b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050005);
1322b285192aSMauro Carvalho Chehab 		break;
1323b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1324b285192aSMauro Carvalho Chehab 		/* GPIO-0 xc5000 tuner reset i2c bus 0 */
1325b285192aSMauro Carvalho Chehab 		/* GPIO-1 s5h1409 demod reset i2c bus 0 */
1326b285192aSMauro Carvalho Chehab 		/* GPIO-2 xc5000 tuner reset i2c bus 1 */
1327b285192aSMauro Carvalho Chehab 		/* GPIO-3 s5h1409 demod reset i2c bus 0 */
1328b285192aSMauro Carvalho Chehab 
1329b285192aSMauro Carvalho Chehab 		/* Put the parts into reset and back */
1330b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x000f0000);
1331b285192aSMauro Carvalho Chehab 		mdelay(20);
1332b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x0000000f);
1333b285192aSMauro Carvalho Chehab 		mdelay(20);
1334b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x000f000f);
1335b285192aSMauro Carvalho Chehab 		break;
1336b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
133746b21bbaSJames Harper 	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
1338b285192aSMauro Carvalho Chehab 		/* GPIO-0 portb xc3028 reset */
1339b285192aSMauro Carvalho Chehab 		/* GPIO-1 portb zl10353 reset */
1340b285192aSMauro Carvalho Chehab 		/* GPIO-2 portc xc3028 reset */
1341b285192aSMauro Carvalho Chehab 		/* GPIO-3 portc zl10353 reset */
1342b285192aSMauro Carvalho Chehab 
1343b285192aSMauro Carvalho Chehab 		/* Put the parts into reset and back */
1344b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x000f0000);
1345b285192aSMauro Carvalho Chehab 		mdelay(20);
1346b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x0000000f);
1347b285192aSMauro Carvalho Chehab 		mdelay(20);
1348b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x000f000f);
1349b285192aSMauro Carvalho Chehab 		break;
1350b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1351642ca1a0SAnca Emanuel 	case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
1352b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1353b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1354b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1355b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
1356b285192aSMauro Carvalho Chehab 		/* GPIO-2  xc3028 tuner reset */
1357b285192aSMauro Carvalho Chehab 
1358b285192aSMauro Carvalho Chehab 		/* The following GPIO's are on the internal AVCore (cx25840) */
1359b285192aSMauro Carvalho Chehab 		/* GPIO-?  zl10353 demod reset */
1360b285192aSMauro Carvalho Chehab 
1361b285192aSMauro Carvalho Chehab 		/* Put the parts into reset and back */
1362b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00040000);
1363b285192aSMauro Carvalho Chehab 		mdelay(20);
1364b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x00000004);
1365b285192aSMauro Carvalho Chehab 		mdelay(20);
1366b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00040004);
1367b285192aSMauro Carvalho Chehab 		break;
1368b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TBS_6920:
1369e6001482SLuis Alves 	case CX23885_BOARD_TBS_6980:
1370e6001482SLuis Alves 	case CX23885_BOARD_TBS_6981:
1371f667190bSMariusz Bia?o?czyk 	case CX23885_BOARD_PROF_8000:
1372b285192aSMauro Carvalho Chehab 		cx_write(MC417_CTL, 0x00000036);
1373b285192aSMauro Carvalho Chehab 		cx_write(MC417_OEN, 0x00001000);
1374b285192aSMauro Carvalho Chehab 		cx_set(MC417_RWD, 0x00000002);
1375b285192aSMauro Carvalho Chehab 		mdelay(200);
1376b285192aSMauro Carvalho Chehab 		cx_clear(MC417_RWD, 0x00000800);
1377b285192aSMauro Carvalho Chehab 		mdelay(200);
1378b285192aSMauro Carvalho Chehab 		cx_set(MC417_RWD, 0x00000800);
1379b285192aSMauro Carvalho Chehab 		mdelay(200);
1380b285192aSMauro Carvalho Chehab 		break;
1381b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1382b285192aSMauro Carvalho Chehab 		/* GPIO-0 INTA from CiMax1
1383b285192aSMauro Carvalho Chehab 		   GPIO-1 INTB from CiMax2
1384b285192aSMauro Carvalho Chehab 		   GPIO-2 reset chips
1385b285192aSMauro Carvalho Chehab 		   GPIO-3 to GPIO-10 data/addr for CA
1386b285192aSMauro Carvalho Chehab 		   GPIO-11 ~CS0 to CiMax1
1387b285192aSMauro Carvalho Chehab 		   GPIO-12 ~CS1 to CiMax2
1388b285192aSMauro Carvalho Chehab 		   GPIO-13 ADL0 load LSB addr
1389b285192aSMauro Carvalho Chehab 		   GPIO-14 ADL1 load MSB addr
1390b285192aSMauro Carvalho Chehab 		   GPIO-15 ~RDY from CiMax
1391b285192aSMauro Carvalho Chehab 		   GPIO-17 ~RD to CiMax
1392b285192aSMauro Carvalho Chehab 		   GPIO-18 ~WR to CiMax
1393b285192aSMauro Carvalho Chehab 		 */
1394b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00040000); /* GPIO as out */
1395b285192aSMauro Carvalho Chehab 		/* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
1396b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x00030004);
1397b285192aSMauro Carvalho Chehab 		mdelay(100);/* reset delay */
1398b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */
1399b285192aSMauro Carvalho Chehab 		cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */
1400b285192aSMauro Carvalho Chehab 		/* GPIO-15 IN as ~ACK, rest as OUT */
1401b285192aSMauro Carvalho Chehab 		cx_write(MC417_OEN, 0x00001000);
1402b285192aSMauro Carvalho Chehab 		/* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
1403b285192aSMauro Carvalho Chehab 		cx_write(MC417_RWD, 0x0000c300);
1404b285192aSMauro Carvalho Chehab 		/* enable irq */
1405b285192aSMauro Carvalho Chehab 		cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
1406b285192aSMauro Carvalho Chehab 		break;
1407b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1270:
1408b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1275:
1409b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255:
1410b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
1411b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1210:
1412b285192aSMauro Carvalho Chehab 		/* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */
1413b285192aSMauro Carvalho Chehab 		/* GPIO-6 I2C Gate which can isolate the demod from the bus */
1414b285192aSMauro Carvalho Chehab 		/* GPIO-9 Demod reset */
1415b285192aSMauro Carvalho Chehab 
1416b285192aSMauro Carvalho Chehab 		/* Put the parts into reset and back */
1417b285192aSMauro Carvalho Chehab 		cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1);
1418b285192aSMauro Carvalho Chehab 		cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5);
1419b285192aSMauro Carvalho Chehab 		cx23885_gpio_clear(dev, GPIO_9);
1420b285192aSMauro Carvalho Chehab 		mdelay(20);
1421b285192aSMauro Carvalho Chehab 		cx23885_gpio_set(dev, GPIO_9);
1422b285192aSMauro Carvalho Chehab 		break;
1423b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MYGICA_X8506:
1424b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1425b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MYGICA_X8507:
1426b285192aSMauro Carvalho Chehab 		/* GPIO-0 (0)Analog / (1)Digital TV */
1427b285192aSMauro Carvalho Chehab 		/* GPIO-1 reset XC5000 */
14280d1b5265SMauro Carvalho Chehab 		/* GPIO-2 demod reset */
1429b285192aSMauro Carvalho Chehab 		cx23885_gpio_enable(dev, GPIO_0 | GPIO_1 | GPIO_2, 1);
1430b285192aSMauro Carvalho Chehab 		cx23885_gpio_clear(dev, GPIO_1 | GPIO_2);
1431b285192aSMauro Carvalho Chehab 		mdelay(100);
1432b285192aSMauro Carvalho Chehab 		cx23885_gpio_set(dev, GPIO_0 | GPIO_1 | GPIO_2);
1433b285192aSMauro Carvalho Chehab 		mdelay(100);
1434b285192aSMauro Carvalho Chehab 		break;
1435b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MYGICA_X8558PRO:
1436b285192aSMauro Carvalho Chehab 		/* GPIO-0 reset first ATBM8830 */
1437b285192aSMauro Carvalho Chehab 		/* GPIO-1 reset second ATBM8830 */
1438b285192aSMauro Carvalho Chehab 		cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1);
1439b285192aSMauro Carvalho Chehab 		cx23885_gpio_clear(dev, GPIO_0 | GPIO_1);
1440b285192aSMauro Carvalho Chehab 		mdelay(100);
1441b285192aSMauro Carvalho Chehab 		cx23885_gpio_set(dev, GPIO_0 | GPIO_1);
1442b285192aSMauro Carvalho Chehab 		mdelay(100);
1443b285192aSMauro Carvalho Chehab 		break;
1444b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1850:
1445b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1290:
1446b285192aSMauro Carvalho Chehab 		/* GPIO-0 656_CLK */
1447b285192aSMauro Carvalho Chehab 		/* GPIO-1 656_D0 */
1448b285192aSMauro Carvalho Chehab 		/* GPIO-2 Wake# */
1449b285192aSMauro Carvalho Chehab 		/* GPIO-3-10 cx23417 data0-7 */
1450b285192aSMauro Carvalho Chehab 		/* GPIO-11-14 cx23417 addr0-3 */
1451b285192aSMauro Carvalho Chehab 		/* GPIO-15-18 cx23417 READY, CS, RD, WR */
1452b285192aSMauro Carvalho Chehab 		/* GPIO-19 IR_RX */
1453b285192aSMauro Carvalho Chehab 		/* GPIO-20 C_IR_TX */
1454b285192aSMauro Carvalho Chehab 		/* GPIO-21 I2S DAT */
1455b285192aSMauro Carvalho Chehab 		/* GPIO-22 I2S WCLK */
1456b285192aSMauro Carvalho Chehab 		/* GPIO-23 I2S BCLK */
1457b285192aSMauro Carvalho Chehab 		/* ALT GPIO: EXP GPIO LATCH */
1458b285192aSMauro Carvalho Chehab 
1459b285192aSMauro Carvalho Chehab 		/* CX23417 GPIO's */
1460b285192aSMauro Carvalho Chehab 		/* GPIO-14 S5H1411/CX24228 Reset */
1461b285192aSMauro Carvalho Chehab 		/* GPIO-13 EEPROM write protect */
1462b285192aSMauro Carvalho Chehab 		mc417_gpio_enable(dev, GPIO_14 | GPIO_13, 1);
1463b285192aSMauro Carvalho Chehab 
1464b285192aSMauro Carvalho Chehab 		/* Put the demod into reset and protect the eeprom */
1465b285192aSMauro Carvalho Chehab 		mc417_gpio_clear(dev, GPIO_14 | GPIO_13);
1466b285192aSMauro Carvalho Chehab 		mdelay(100);
1467b285192aSMauro Carvalho Chehab 
1468b285192aSMauro Carvalho Chehab 		/* Bring the demod out of reset */
1469b285192aSMauro Carvalho Chehab 		mc417_gpio_set(dev, GPIO_14);
1470b285192aSMauro Carvalho Chehab 		mdelay(100);
1471b285192aSMauro Carvalho Chehab 
1472b285192aSMauro Carvalho Chehab 		/* CX24228 GPIO */
1473b285192aSMauro Carvalho Chehab 		/* Connected to IF / Mux */
1474b285192aSMauro Carvalho Chehab 		break;
1475b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1476b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
1477b285192aSMauro Carvalho Chehab 		break;
1478b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1479b285192aSMauro Carvalho Chehab 		/* GPIO-0 ~INT in
1480b285192aSMauro Carvalho Chehab 		   GPIO-1 TMS out
1481b285192aSMauro Carvalho Chehab 		   GPIO-2 ~reset chips out
1482b285192aSMauro Carvalho Chehab 		   GPIO-3 to GPIO-10 data/addr for CA in/out
1483b285192aSMauro Carvalho Chehab 		   GPIO-11 ~CS out
1484b285192aSMauro Carvalho Chehab 		   GPIO-12 ADDR out
1485b285192aSMauro Carvalho Chehab 		   GPIO-13 ~WR out
1486b285192aSMauro Carvalho Chehab 		   GPIO-14 ~RD out
1487b285192aSMauro Carvalho Chehab 		   GPIO-15 ~RDY in
1488b285192aSMauro Carvalho Chehab 		   GPIO-16 TCK out
1489b285192aSMauro Carvalho Chehab 		   GPIO-17 TDO in
1490b285192aSMauro Carvalho Chehab 		   GPIO-18 TDI out
1491b285192aSMauro Carvalho Chehab 		 */
1492b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00060000); /* GPIO-1,2 as out */
1493b285192aSMauro Carvalho Chehab 		/* GPIO-0 as INT, reset & TMS low */
1494b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x00010006);
1495b285192aSMauro Carvalho Chehab 		mdelay(100);/* reset delay */
1496b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00000004); /* reset high */
1497b285192aSMauro Carvalho Chehab 		cx_write(MC417_CTL, 0x00000037);/* enable GPIO-3..18 pins */
1498b285192aSMauro Carvalho Chehab 		/* GPIO-17 is TDO in, GPIO-15 is ~RDY in, rest is out */
1499b285192aSMauro Carvalho Chehab 		cx_write(MC417_OEN, 0x00005000);
1500b285192aSMauro Carvalho Chehab 		/* ~RD, ~WR high; ADDR low; ~CS high */
1501b285192aSMauro Carvalho Chehab 		cx_write(MC417_RWD, 0x00000d00);
1502b285192aSMauro Carvalho Chehab 		/* enable irq */
1503b285192aSMauro Carvalho Chehab 		cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
1504b285192aSMauro Carvalho Chehab 		break;
15057c62f5a1SMichael Krufky 	case CX23885_BOARD_HAUPPAUGE_HVR4400:
15067c62f5a1SMichael Krufky 		/* GPIO-8 tda10071 demod reset */
150736efec48SMatthias Schwarzott 		/* GPIO-9 si2165 demod reset */
15087c62f5a1SMichael Krufky 
15097c62f5a1SMichael Krufky 		/* Put the parts into reset and back */
151036efec48SMatthias Schwarzott 		cx23885_gpio_enable(dev, GPIO_8 | GPIO_9, 1);
151136efec48SMatthias Schwarzott 
151236efec48SMatthias Schwarzott 		cx23885_gpio_clear(dev, GPIO_8 | GPIO_9);
15137c62f5a1SMichael Krufky 		mdelay(100);
151436efec48SMatthias Schwarzott 		cx23885_gpio_set(dev, GPIO_8 | GPIO_9);
15157c62f5a1SMichael Krufky 		mdelay(100);
151636efec48SMatthias Schwarzott 
15177c62f5a1SMichael Krufky 		break;
1518e8d42373SOleh Kravchenko 	case CX23885_BOARD_AVERMEDIA_HC81R:
1519e8d42373SOleh Kravchenko 		cx_clear(MC417_CTL, 1);
1520e8d42373SOleh Kravchenko 		/* GPIO-0,1,2 setup direction as output */
1521e8d42373SOleh Kravchenko 		cx_set(GP0_IO, 0x00070000);
1522e8d42373SOleh Kravchenko 		mdelay(10);
1523e8d42373SOleh Kravchenko 		/* AF9013 demod reset */
1524e8d42373SOleh Kravchenko 		cx_set(GP0_IO, 0x00010001);
1525e8d42373SOleh Kravchenko 		mdelay(10);
1526e8d42373SOleh Kravchenko 		cx_clear(GP0_IO, 0x00010001);
1527e8d42373SOleh Kravchenko 		mdelay(10);
1528e8d42373SOleh Kravchenko 		cx_set(GP0_IO, 0x00010001);
1529e8d42373SOleh Kravchenko 		mdelay(10);
1530e8d42373SOleh Kravchenko 		/* demod tune? */
1531e8d42373SOleh Kravchenko 		cx_clear(GP0_IO, 0x00030003);
1532e8d42373SOleh Kravchenko 		mdelay(10);
1533e8d42373SOleh Kravchenko 		cx_set(GP0_IO, 0x00020002);
1534e8d42373SOleh Kravchenko 		mdelay(10);
1535e8d42373SOleh Kravchenko 		cx_set(GP0_IO, 0x00010001);
1536e8d42373SOleh Kravchenko 		mdelay(10);
1537e8d42373SOleh Kravchenko 		cx_clear(GP0_IO, 0x00020002);
1538e8d42373SOleh Kravchenko 		/* XC3028L tuner reset */
1539e8d42373SOleh Kravchenko 		cx_set(GP0_IO, 0x00040004);
1540e8d42373SOleh Kravchenko 		cx_clear(GP0_IO, 0x00040004);
1541e8d42373SOleh Kravchenko 		cx_set(GP0_IO, 0x00040004);
1542e8d42373SOleh Kravchenko 		mdelay(60);
1543e8d42373SOleh Kravchenko 		break;
154429442266SOlli Salonen 	case CX23885_BOARD_DVBSKY_T9580:
154529442266SOlli Salonen 		/* enable GPIO3-18 pins */
154629442266SOlli Salonen 		cx_write(MC417_CTL, 0x00000037);
154729442266SOlli Salonen 		cx23885_gpio_enable(dev, GPIO_2 | GPIO_11, 1);
154829442266SOlli Salonen 		cx23885_gpio_clear(dev, GPIO_2 | GPIO_11);
154929442266SOlli Salonen 		mdelay(100);
155029442266SOlli Salonen 		cx23885_gpio_set(dev, GPIO_2 | GPIO_11);
155129442266SOlli Salonen 		break;
155282c10276SOlli Salonen 	case CX23885_BOARD_DVBSKY_T980C:
155382c10276SOlli Salonen 		/*
155482c10276SOlli Salonen 		 * GPIO-0 INTA from CiMax, input
155582c10276SOlli Salonen 		 * GPIO-1 reset CiMax, output, high active
155682c10276SOlli Salonen 		 * GPIO-2 reset demod, output, low active
155782c10276SOlli Salonen 		 * GPIO-3 to GPIO-10 data/addr for CAM
155882c10276SOlli Salonen 		 * GPIO-11 ~CS0 to CiMax1
155982c10276SOlli Salonen 		 * GPIO-12 ~CS1 to CiMax2
156082c10276SOlli Salonen 		 * GPIO-13 ADL0 load LSB addr
156182c10276SOlli Salonen 		 * GPIO-14 ADL1 load MSB addr
156282c10276SOlli Salonen 		 * GPIO-15 ~RDY from CiMax
156382c10276SOlli Salonen 		 * GPIO-17 ~RD to CiMax
156482c10276SOlli Salonen 		 * GPIO-18 ~WR to CiMax
156582c10276SOlli Salonen 		 */
156682c10276SOlli Salonen 
156782c10276SOlli Salonen 		cx_set(GP0_IO, 0x00060002); /* GPIO 1/2 as output */
156882c10276SOlli Salonen 		cx_clear(GP0_IO, 0x00010004); /* GPIO 0 as input */
156982c10276SOlli Salonen 		mdelay(100); /* reset delay */
157082c10276SOlli Salonen 		cx_set(GP0_IO, 0x00060004); /* GPIO as out, reset high */
157182c10276SOlli Salonen 		cx_clear(GP0_IO, 0x00010002);
157282c10276SOlli Salonen 		cx_write(MC417_CTL, 0x00000037); /* enable GPIO3-18 pins */
157382c10276SOlli Salonen 
157482c10276SOlli Salonen 		/* GPIO-15 IN as ~ACK, rest as OUT */
157582c10276SOlli Salonen 		cx_write(MC417_OEN, 0x00001000);
157682c10276SOlli Salonen 
157782c10276SOlli Salonen 		/* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
157882c10276SOlli Salonen 		cx_write(MC417_RWD, 0x0000c300);
157982c10276SOlli Salonen 
158082c10276SOlli Salonen 		/* enable irq */
158182c10276SOlli Salonen 		cx_write(GPIO_ISM, 0x00000000); /* INTERRUPTS active low */
1582b285192aSMauro Carvalho Chehab 	}
1583b285192aSMauro Carvalho Chehab }
1584b285192aSMauro Carvalho Chehab 
1585b285192aSMauro Carvalho Chehab int cx23885_ir_init(struct cx23885_dev *dev)
1586b285192aSMauro Carvalho Chehab {
1587b285192aSMauro Carvalho Chehab 	static struct v4l2_subdev_io_pin_config ir_rxtx_pin_cfg[] = {
1588b285192aSMauro Carvalho Chehab 		{
1589b285192aSMauro Carvalho Chehab 			.flags	  = V4L2_SUBDEV_IO_PIN_INPUT,
1590b285192aSMauro Carvalho Chehab 			.pin	  = CX23885_PIN_IR_RX_GPIO19,
1591b285192aSMauro Carvalho Chehab 			.function = CX23885_PAD_IR_RX,
1592b285192aSMauro Carvalho Chehab 			.value	  = 0,
1593b285192aSMauro Carvalho Chehab 			.strength = CX25840_PIN_DRIVE_MEDIUM,
1594b285192aSMauro Carvalho Chehab 		}, {
1595b285192aSMauro Carvalho Chehab 			.flags	  = V4L2_SUBDEV_IO_PIN_OUTPUT,
1596b285192aSMauro Carvalho Chehab 			.pin	  = CX23885_PIN_IR_TX_GPIO20,
1597b285192aSMauro Carvalho Chehab 			.function = CX23885_PAD_IR_TX,
1598b285192aSMauro Carvalho Chehab 			.value	  = 0,
1599b285192aSMauro Carvalho Chehab 			.strength = CX25840_PIN_DRIVE_MEDIUM,
1600b285192aSMauro Carvalho Chehab 		}
1601b285192aSMauro Carvalho Chehab 	};
1602b285192aSMauro Carvalho Chehab 	const size_t ir_rxtx_pin_cfg_count = ARRAY_SIZE(ir_rxtx_pin_cfg);
1603b285192aSMauro Carvalho Chehab 
1604b285192aSMauro Carvalho Chehab 	static struct v4l2_subdev_io_pin_config ir_rx_pin_cfg[] = {
1605b285192aSMauro Carvalho Chehab 		{
1606b285192aSMauro Carvalho Chehab 			.flags	  = V4L2_SUBDEV_IO_PIN_INPUT,
1607b285192aSMauro Carvalho Chehab 			.pin	  = CX23885_PIN_IR_RX_GPIO19,
1608b285192aSMauro Carvalho Chehab 			.function = CX23885_PAD_IR_RX,
1609b285192aSMauro Carvalho Chehab 			.value	  = 0,
1610b285192aSMauro Carvalho Chehab 			.strength = CX25840_PIN_DRIVE_MEDIUM,
1611b285192aSMauro Carvalho Chehab 		}
1612b285192aSMauro Carvalho Chehab 	};
1613b285192aSMauro Carvalho Chehab 	const size_t ir_rx_pin_cfg_count = ARRAY_SIZE(ir_rx_pin_cfg);
1614b285192aSMauro Carvalho Chehab 
1615b285192aSMauro Carvalho Chehab 	struct v4l2_subdev_ir_parameters params;
1616b285192aSMauro Carvalho Chehab 	int ret = 0;
1617b285192aSMauro Carvalho Chehab 	switch (dev->board) {
1618b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500:
1619b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1620b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1800:
1621b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1200:
1622b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1400:
1623b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1275:
1624b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255:
1625b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
1626b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1210:
1627b285192aSMauro Carvalho Chehab 		/* FIXME: Implement me */
1628b285192aSMauro Carvalho Chehab 		break;
1629b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1270:
1630b285192aSMauro Carvalho Chehab 		ret = cx23888_ir_probe(dev);
1631b285192aSMauro Carvalho Chehab 		if (ret)
1632b285192aSMauro Carvalho Chehab 			break;
1633b285192aSMauro Carvalho Chehab 		dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
1634b285192aSMauro Carvalho Chehab 		v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1635b285192aSMauro Carvalho Chehab 				 ir_rx_pin_cfg_count, ir_rx_pin_cfg);
1636b285192aSMauro Carvalho Chehab 		break;
1637b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1850:
1638b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1290:
1639b285192aSMauro Carvalho Chehab 		ret = cx23888_ir_probe(dev);
1640b285192aSMauro Carvalho Chehab 		if (ret)
1641b285192aSMauro Carvalho Chehab 			break;
1642b285192aSMauro Carvalho Chehab 		dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
1643b285192aSMauro Carvalho Chehab 		v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1644b285192aSMauro Carvalho Chehab 				 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
1645b285192aSMauro Carvalho Chehab 		/*
1646b285192aSMauro Carvalho Chehab 		 * For these boards we need to invert the Tx output via the
1647b285192aSMauro Carvalho Chehab 		 * IR controller to have the LED off while idle
1648b285192aSMauro Carvalho Chehab 		 */
1649b285192aSMauro Carvalho Chehab 		v4l2_subdev_call(dev->sd_ir, ir, tx_g_parameters, &params);
1650b285192aSMauro Carvalho Chehab 		params.enable = false;
1651b285192aSMauro Carvalho Chehab 		params.shutdown = false;
1652b285192aSMauro Carvalho Chehab 		params.invert_level = true;
1653b285192aSMauro Carvalho Chehab 		v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, &params);
1654b285192aSMauro Carvalho Chehab 		params.shutdown = true;
1655b285192aSMauro Carvalho Chehab 		v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, &params);
1656b285192aSMauro Carvalho Chehab 		break;
1657b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1658b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TEVII_S470:
1659e5f670b7SAlfredo Jesús Delaiti 	case CX23885_BOARD_MYGICA_X8507:
1660e6001482SLuis Alves 	case CX23885_BOARD_TBS_6980:
1661e6001482SLuis Alves 	case CX23885_BOARD_TBS_6981:
1662d11a3835Snibble.max 	case CX23885_BOARD_DVBSKY_T9580:
1663b285192aSMauro Carvalho Chehab 		if (!enable_885_ir)
1664b285192aSMauro Carvalho Chehab 			break;
1665b285192aSMauro Carvalho Chehab 		dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
1666b285192aSMauro Carvalho Chehab 		if (dev->sd_ir == NULL) {
1667b285192aSMauro Carvalho Chehab 			ret = -ENODEV;
1668b285192aSMauro Carvalho Chehab 			break;
1669b285192aSMauro Carvalho Chehab 		}
1670b285192aSMauro Carvalho Chehab 		v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1671b285192aSMauro Carvalho Chehab 				 ir_rx_pin_cfg_count, ir_rx_pin_cfg);
1672b285192aSMauro Carvalho Chehab 		break;
1673b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1250:
1674b285192aSMauro Carvalho Chehab 		if (!enable_885_ir)
1675b285192aSMauro Carvalho Chehab 			break;
1676b285192aSMauro Carvalho Chehab 		dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
1677b285192aSMauro Carvalho Chehab 		if (dev->sd_ir == NULL) {
1678b285192aSMauro Carvalho Chehab 			ret = -ENODEV;
1679b285192aSMauro Carvalho Chehab 			break;
1680b285192aSMauro Carvalho Chehab 		}
1681b285192aSMauro Carvalho Chehab 		v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1682b285192aSMauro Carvalho Chehab 				 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
1683b285192aSMauro Carvalho Chehab 		break;
1684b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
168546b21bbaSJames Harper 	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
1686b285192aSMauro Carvalho Chehab 		request_module("ir-kbd-i2c");
1687b285192aSMauro Carvalho Chehab 		break;
1688b285192aSMauro Carvalho Chehab 	}
1689b285192aSMauro Carvalho Chehab 
1690b285192aSMauro Carvalho Chehab 	return ret;
1691b285192aSMauro Carvalho Chehab }
1692b285192aSMauro Carvalho Chehab 
1693b285192aSMauro Carvalho Chehab void cx23885_ir_fini(struct cx23885_dev *dev)
1694b285192aSMauro Carvalho Chehab {
1695b285192aSMauro Carvalho Chehab 	switch (dev->board) {
1696b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1270:
1697b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1850:
1698b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1290:
1699b285192aSMauro Carvalho Chehab 		cx23885_irq_remove(dev, PCI_MSK_IR);
1700b285192aSMauro Carvalho Chehab 		cx23888_ir_remove(dev);
1701b285192aSMauro Carvalho Chehab 		dev->sd_ir = NULL;
1702b285192aSMauro Carvalho Chehab 		break;
1703b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1704b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TEVII_S470:
1705b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1250:
1706e5f670b7SAlfredo Jesús Delaiti 	case CX23885_BOARD_MYGICA_X8507:
1707e6001482SLuis Alves 	case CX23885_BOARD_TBS_6980:
1708e6001482SLuis Alves 	case CX23885_BOARD_TBS_6981:
1709d11a3835Snibble.max 	case CX23885_BOARD_DVBSKY_T9580:
1710b285192aSMauro Carvalho Chehab 		cx23885_irq_remove(dev, PCI_MSK_AV_CORE);
1711b285192aSMauro Carvalho Chehab 		/* sd_ir is a duplicate pointer to the AV Core, just clear it */
1712b285192aSMauro Carvalho Chehab 		dev->sd_ir = NULL;
1713b285192aSMauro Carvalho Chehab 		break;
1714b285192aSMauro Carvalho Chehab 	}
1715b285192aSMauro Carvalho Chehab }
1716b285192aSMauro Carvalho Chehab 
1717ada73eeeSMauro Carvalho Chehab static int netup_jtag_io(void *device, int tms, int tdi, int read_tdo)
1718b285192aSMauro Carvalho Chehab {
1719b285192aSMauro Carvalho Chehab 	int data;
1720b285192aSMauro Carvalho Chehab 	int tdo = 0;
1721b285192aSMauro Carvalho Chehab 	struct cx23885_dev *dev = (struct cx23885_dev *)device;
1722b285192aSMauro Carvalho Chehab 	/*TMS*/
1723b285192aSMauro Carvalho Chehab 	data = ((cx_read(GP0_IO)) & (~0x00000002));
1724b285192aSMauro Carvalho Chehab 	data |= (tms ? 0x00020002 : 0x00020000);
1725b285192aSMauro Carvalho Chehab 	cx_write(GP0_IO, data);
1726b285192aSMauro Carvalho Chehab 
1727b285192aSMauro Carvalho Chehab 	/*TDI*/
1728b285192aSMauro Carvalho Chehab 	data = ((cx_read(MC417_RWD)) & (~0x0000a000));
1729b285192aSMauro Carvalho Chehab 	data |= (tdi ? 0x00008000 : 0);
1730b285192aSMauro Carvalho Chehab 	cx_write(MC417_RWD, data);
1731b285192aSMauro Carvalho Chehab 	if (read_tdo)
1732b285192aSMauro Carvalho Chehab 		tdo = (data & 0x00004000) ? 1 : 0; /*TDO*/
1733b285192aSMauro Carvalho Chehab 
1734b285192aSMauro Carvalho Chehab 	cx_write(MC417_RWD, data | 0x00002000);
1735b285192aSMauro Carvalho Chehab 	udelay(1);
1736b285192aSMauro Carvalho Chehab 	/*TCK*/
1737b285192aSMauro Carvalho Chehab 	cx_write(MC417_RWD, data);
1738b285192aSMauro Carvalho Chehab 
1739b285192aSMauro Carvalho Chehab 	return tdo;
1740b285192aSMauro Carvalho Chehab }
1741b285192aSMauro Carvalho Chehab 
1742b285192aSMauro Carvalho Chehab void cx23885_ir_pci_int_enable(struct cx23885_dev *dev)
1743b285192aSMauro Carvalho Chehab {
1744b285192aSMauro Carvalho Chehab 	switch (dev->board) {
1745b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1270:
1746b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1850:
1747b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1290:
1748b285192aSMauro Carvalho Chehab 		if (dev->sd_ir)
1749b285192aSMauro Carvalho Chehab 			cx23885_irq_add_enable(dev, PCI_MSK_IR);
1750b285192aSMauro Carvalho Chehab 		break;
1751b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1752b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TEVII_S470:
1753b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1250:
1754e5f670b7SAlfredo Jesús Delaiti 	case CX23885_BOARD_MYGICA_X8507:
1755e6001482SLuis Alves 	case CX23885_BOARD_TBS_6980:
1756e6001482SLuis Alves 	case CX23885_BOARD_TBS_6981:
1757d11a3835Snibble.max 	case CX23885_BOARD_DVBSKY_T9580:
1758b285192aSMauro Carvalho Chehab 		if (dev->sd_ir)
1759b285192aSMauro Carvalho Chehab 			cx23885_irq_add_enable(dev, PCI_MSK_AV_CORE);
1760b285192aSMauro Carvalho Chehab 		break;
1761b285192aSMauro Carvalho Chehab 	}
1762b285192aSMauro Carvalho Chehab }
1763b285192aSMauro Carvalho Chehab 
1764b285192aSMauro Carvalho Chehab void cx23885_card_setup(struct cx23885_dev *dev)
1765b285192aSMauro Carvalho Chehab {
1766b285192aSMauro Carvalho Chehab 	struct cx23885_tsport *ts1 = &dev->ts1;
1767b285192aSMauro Carvalho Chehab 	struct cx23885_tsport *ts2 = &dev->ts2;
1768b285192aSMauro Carvalho Chehab 
1769b285192aSMauro Carvalho Chehab 	static u8 eeprom[256];
1770b285192aSMauro Carvalho Chehab 
1771b285192aSMauro Carvalho Chehab 	if (dev->i2c_bus[0].i2c_rc == 0) {
1772b285192aSMauro Carvalho Chehab 		dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
1773b285192aSMauro Carvalho Chehab 		tveeprom_read(&dev->i2c_bus[0].i2c_client,
1774b285192aSMauro Carvalho Chehab 			      eeprom, sizeof(eeprom));
1775b285192aSMauro Carvalho Chehab 	}
1776b285192aSMauro Carvalho Chehab 
1777b285192aSMauro Carvalho Chehab 	switch (dev->board) {
1778b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1250:
1779b285192aSMauro Carvalho Chehab 		if (dev->i2c_bus[0].i2c_rc == 0) {
1780b285192aSMauro Carvalho Chehab 			if (eeprom[0x80] != 0x84)
1781b285192aSMauro Carvalho Chehab 				hauppauge_eeprom(dev, eeprom+0xc0);
1782b285192aSMauro Carvalho Chehab 			else
1783b285192aSMauro Carvalho Chehab 				hauppauge_eeprom(dev, eeprom+0x80);
1784b285192aSMauro Carvalho Chehab 		}
1785b285192aSMauro Carvalho Chehab 		break;
1786b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500:
1787b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1788b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1400:
1789b285192aSMauro Carvalho Chehab 		if (dev->i2c_bus[0].i2c_rc == 0)
1790b285192aSMauro Carvalho Chehab 			hauppauge_eeprom(dev, eeprom+0x80);
1791b285192aSMauro Carvalho Chehab 		break;
1792b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1800:
1793b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
1794b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1200:
1795b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1700:
1796b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1270:
1797b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1275:
1798b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255:
1799b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
1800b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1210:
1801b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1850:
1802b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1290:
18037c62f5a1SMichael Krufky 	case CX23885_BOARD_HAUPPAUGE_HVR4400:
1804cce11b09SHans Verkuil 	case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE:
1805b285192aSMauro Carvalho Chehab 		if (dev->i2c_bus[0].i2c_rc == 0)
1806b285192aSMauro Carvalho Chehab 			hauppauge_eeprom(dev, eeprom+0xc0);
1807b285192aSMauro Carvalho Chehab 		break;
1808b285192aSMauro Carvalho Chehab 	}
1809b285192aSMauro Carvalho Chehab 
1810b285192aSMauro Carvalho Chehab 	switch (dev->board) {
1811e8d42373SOleh Kravchenko 	case CX23885_BOARD_AVERMEDIA_HC81R:
1812e8d42373SOleh Kravchenko 		/* Defaults for VID B */
1813e8d42373SOleh Kravchenko 		ts1->gen_ctrl_val  = 0x4; /* Parallel */
1814e8d42373SOleh Kravchenko 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1815e8d42373SOleh Kravchenko 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1816e8d42373SOleh Kravchenko 		/* Defaults for VID C */
1817e8d42373SOleh Kravchenko 		/* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
1818e8d42373SOleh Kravchenko 		ts2->gen_ctrl_val  = 0x10e;
1819e8d42373SOleh Kravchenko 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1820e8d42373SOleh Kravchenko 		ts2->src_sel_val     = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1821e8d42373SOleh Kravchenko 		break;
1822b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1823b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
182446b21bbaSJames Harper 	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
1825b285192aSMauro Carvalho Chehab 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
1826b285192aSMauro Carvalho Chehab 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1827b285192aSMauro Carvalho Chehab 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1828b285192aSMauro Carvalho Chehab 		/* break omitted intentionally */
1829b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
1830b285192aSMauro Carvalho Chehab 		ts1->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
1831b285192aSMauro Carvalho Chehab 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1832b285192aSMauro Carvalho Chehab 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1833b285192aSMauro Carvalho Chehab 		break;
1834b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1850:
1835b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1800:
1836b285192aSMauro Carvalho Chehab 		/* Defaults for VID B - Analog encoder */
1837b285192aSMauro Carvalho Chehab 		/* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
1838b285192aSMauro Carvalho Chehab 		ts1->gen_ctrl_val    = 0x10e;
1839b285192aSMauro Carvalho Chehab 		ts1->ts_clk_en_val   = 0x1; /* Enable TS_CLK */
1840b285192aSMauro Carvalho Chehab 		ts1->src_sel_val     = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1841b285192aSMauro Carvalho Chehab 
1842b285192aSMauro Carvalho Chehab 		/* APB_TSVALERR_POL (active low)*/
1843b285192aSMauro Carvalho Chehab 		ts1->vld_misc_val    = 0x2000;
1844b285192aSMauro Carvalho Chehab 		ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
1845b285192aSMauro Carvalho Chehab 		cx_write(0x130184, 0xc);
1846b285192aSMauro Carvalho Chehab 
1847b285192aSMauro Carvalho Chehab 		/* Defaults for VID C */
1848b285192aSMauro Carvalho Chehab 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
1849b285192aSMauro Carvalho Chehab 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1850b285192aSMauro Carvalho Chehab 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1851b285192aSMauro Carvalho Chehab 		break;
1852b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TBS_6920:
1853b285192aSMauro Carvalho Chehab 		ts1->gen_ctrl_val  = 0x4; /* Parallel */
1854b285192aSMauro Carvalho Chehab 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1855b285192aSMauro Carvalho Chehab 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1856b285192aSMauro Carvalho Chehab 		break;
1857b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TEVII_S470:
1858b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TEVII_S471:
1859b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVBWORLD_2005:
1860f667190bSMariusz Bia?o?czyk 	case CX23885_BOARD_PROF_8000:
186182c10276SOlli Salonen 	case CX23885_BOARD_DVBSKY_T980C:
1862b285192aSMauro Carvalho Chehab 		ts1->gen_ctrl_val  = 0x5; /* Parallel */
1863b285192aSMauro Carvalho Chehab 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1864b285192aSMauro Carvalho Chehab 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1865b285192aSMauro Carvalho Chehab 		break;
1866b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1867b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1868b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1869b285192aSMauro Carvalho Chehab 		ts1->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
1870b285192aSMauro Carvalho Chehab 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1871b285192aSMauro Carvalho Chehab 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1872b285192aSMauro Carvalho Chehab 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
1873b285192aSMauro Carvalho Chehab 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1874b285192aSMauro Carvalho Chehab 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1875b285192aSMauro Carvalho Chehab 		break;
1876e6001482SLuis Alves 	case CX23885_BOARD_TBS_6980:
1877e6001482SLuis Alves 	case CX23885_BOARD_TBS_6981:
1878e6001482SLuis Alves 		ts1->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
1879e6001482SLuis Alves 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1880e6001482SLuis Alves 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1881e6001482SLuis Alves 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
1882e6001482SLuis Alves 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1883e6001482SLuis Alves 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1884e6001482SLuis Alves 		tbs_card_init(dev);
1885e6001482SLuis Alves 		break;
1886b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MYGICA_X8506:
1887b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MAGICPRO_PROHDTVE2:
18880d1b5265SMauro Carvalho Chehab 	case CX23885_BOARD_MYGICA_X8507:
1889b285192aSMauro Carvalho Chehab 		ts1->gen_ctrl_val  = 0x5; /* Parallel */
1890b285192aSMauro Carvalho Chehab 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1891b285192aSMauro Carvalho Chehab 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1892b285192aSMauro Carvalho Chehab 		break;
1893b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MYGICA_X8558PRO:
1894b285192aSMauro Carvalho Chehab 		ts1->gen_ctrl_val  = 0x5; /* Parallel */
1895b285192aSMauro Carvalho Chehab 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1896b285192aSMauro Carvalho Chehab 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1897b285192aSMauro Carvalho Chehab 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
1898b285192aSMauro Carvalho Chehab 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1899b285192aSMauro Carvalho Chehab 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1900b285192aSMauro Carvalho Chehab 		break;
19017c62f5a1SMichael Krufky 	case CX23885_BOARD_HAUPPAUGE_HVR4400:
19027c62f5a1SMichael Krufky 		ts1->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
19037c62f5a1SMichael Krufky 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
19047c62f5a1SMichael Krufky 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
190536efec48SMatthias Schwarzott 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
190636efec48SMatthias Schwarzott 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
190736efec48SMatthias Schwarzott 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
19087c62f5a1SMichael Krufky 		break;
190929442266SOlli Salonen 	case CX23885_BOARD_DVBSKY_T9580:
191029442266SOlli Salonen 		ts1->gen_ctrl_val  = 0x5; /* Parallel */
191129442266SOlli Salonen 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
191229442266SOlli Salonen 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
191329442266SOlli Salonen 		ts2->gen_ctrl_val  = 0x8; /* Serial bus */
191429442266SOlli Salonen 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
191529442266SOlli Salonen 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
191629442266SOlli Salonen 		break;
1917b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1250:
1918b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500:
1919b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1920b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
1921b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1200:
1922b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1700:
1923b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1400:
1924cce11b09SHans Verkuil 	case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE:
1925b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1926642ca1a0SAnca Emanuel 	case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
1927b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1928b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1929b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1270:
1930b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1275:
1931b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255:
1932b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
1933b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1210:
1934b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1935b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1290:
1936b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1937b285192aSMauro Carvalho Chehab 	default:
1938b285192aSMauro Carvalho Chehab 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
1939b285192aSMauro Carvalho Chehab 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1940b285192aSMauro Carvalho Chehab 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1941b285192aSMauro Carvalho Chehab 	}
1942b285192aSMauro Carvalho Chehab 
1943b285192aSMauro Carvalho Chehab 	/* Certain boards support analog, or require the avcore to be
1944b285192aSMauro Carvalho Chehab 	 * loaded, ensure this happens.
1945b285192aSMauro Carvalho Chehab 	 */
1946b285192aSMauro Carvalho Chehab 	switch (dev->board) {
1947b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TEVII_S470:
1948b285192aSMauro Carvalho Chehab 		/* Currently only enabled for the integrated IR controller */
1949b285192aSMauro Carvalho Chehab 		if (!enable_885_ir)
1950b285192aSMauro Carvalho Chehab 			break;
1951b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1250:
1952b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1800:
1953cce11b09SHans Verkuil 	case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE:
1954b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
1955b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1700:
1956b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1957642ca1a0SAnca Emanuel 	case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
1958b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1959b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1960b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1961b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1962b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1963b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255:
1964b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
1965b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1270:
1966b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1850:
1967b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MYGICA_X8506:
1968b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1969b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1290:
1970b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
1971b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1972b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500:
1973b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MPX885:
1974b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MYGICA_X8507:
1975b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1976e8d42373SOleh Kravchenko 	case CX23885_BOARD_AVERMEDIA_HC81R:
1977e6001482SLuis Alves 	case CX23885_BOARD_TBS_6980:
1978e6001482SLuis Alves 	case CX23885_BOARD_TBS_6981:
197929442266SOlli Salonen 	case CX23885_BOARD_DVBSKY_T9580:
198082c10276SOlli Salonen 	case CX23885_BOARD_DVBSKY_T980C:
1981b285192aSMauro Carvalho Chehab 		dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
1982b285192aSMauro Carvalho Chehab 				&dev->i2c_bus[2].i2c_adap,
1983b285192aSMauro Carvalho Chehab 				"cx25840", 0x88 >> 1, NULL);
1984b285192aSMauro Carvalho Chehab 		if (dev->sd_cx25840) {
1985b285192aSMauro Carvalho Chehab 			dev->sd_cx25840->grp_id = CX23885_HW_AV_CORE;
1986b285192aSMauro Carvalho Chehab 			v4l2_subdev_call(dev->sd_cx25840, core, load_fw);
1987b285192aSMauro Carvalho Chehab 		}
1988b285192aSMauro Carvalho Chehab 		break;
1989b285192aSMauro Carvalho Chehab 	}
1990b285192aSMauro Carvalho Chehab 
1991b285192aSMauro Carvalho Chehab 	/* AUX-PLL 27MHz CLK */
1992b285192aSMauro Carvalho Chehab 	switch (dev->board) {
1993b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1994b285192aSMauro Carvalho Chehab 		netup_initialize(dev);
1995b285192aSMauro Carvalho Chehab 		break;
1996b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: {
1997b285192aSMauro Carvalho Chehab 		int ret;
1998b285192aSMauro Carvalho Chehab 		const struct firmware *fw;
1999b285192aSMauro Carvalho Chehab 		const char *filename = "dvb-netup-altera-01.fw";
2000b285192aSMauro Carvalho Chehab 		char *action = "configure";
2001b285192aSMauro Carvalho Chehab 		static struct netup_card_info cinfo;
2002b285192aSMauro Carvalho Chehab 		struct altera_config netup_config = {
2003b285192aSMauro Carvalho Chehab 			.dev = dev,
2004b285192aSMauro Carvalho Chehab 			.action = action,
2005b285192aSMauro Carvalho Chehab 			.jtag_io = netup_jtag_io,
2006b285192aSMauro Carvalho Chehab 		};
2007b285192aSMauro Carvalho Chehab 
2008b285192aSMauro Carvalho Chehab 		netup_initialize(dev);
2009b285192aSMauro Carvalho Chehab 
2010b285192aSMauro Carvalho Chehab 		netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo);
2011b285192aSMauro Carvalho Chehab 		if (netup_card_rev)
2012b285192aSMauro Carvalho Chehab 			cinfo.rev = netup_card_rev;
2013b285192aSMauro Carvalho Chehab 
2014b285192aSMauro Carvalho Chehab 		switch (cinfo.rev) {
2015b285192aSMauro Carvalho Chehab 		case 0x4:
2016b285192aSMauro Carvalho Chehab 			filename = "dvb-netup-altera-04.fw";
2017b285192aSMauro Carvalho Chehab 			break;
2018b285192aSMauro Carvalho Chehab 		default:
2019b285192aSMauro Carvalho Chehab 			filename = "dvb-netup-altera-01.fw";
2020b285192aSMauro Carvalho Chehab 			break;
2021b285192aSMauro Carvalho Chehab 		}
2022b285192aSMauro Carvalho Chehab 		printk(KERN_INFO "NetUP card rev=0x%x fw_filename=%s\n",
2023b285192aSMauro Carvalho Chehab 				cinfo.rev, filename);
2024b285192aSMauro Carvalho Chehab 
2025b285192aSMauro Carvalho Chehab 		ret = request_firmware(&fw, filename, &dev->pci->dev);
2026b285192aSMauro Carvalho Chehab 		if (ret != 0)
2027b285192aSMauro Carvalho Chehab 			printk(KERN_ERR "did not find the firmware file. (%s) "
2028b285192aSMauro Carvalho Chehab 			"Please see linux/Documentation/dvb/ for more details "
2029b285192aSMauro Carvalho Chehab 			"on firmware-problems.", filename);
2030b285192aSMauro Carvalho Chehab 		else
2031b285192aSMauro Carvalho Chehab 			altera_init(&netup_config, fw);
2032b285192aSMauro Carvalho Chehab 
2033b285192aSMauro Carvalho Chehab 		release_firmware(fw);
2034b285192aSMauro Carvalho Chehab 		break;
2035b285192aSMauro Carvalho Chehab 	}
2036b285192aSMauro Carvalho Chehab 	}
2037b285192aSMauro Carvalho Chehab }
2038