1b285192aSMauro Carvalho Chehab /*
2b285192aSMauro Carvalho Chehab  *  Driver for the Conexant CX23885 PCIe bridge
3b285192aSMauro Carvalho Chehab  *
4b285192aSMauro Carvalho Chehab  *  Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
5b285192aSMauro Carvalho Chehab  *
6b285192aSMauro Carvalho Chehab  *  This program is free software; you can redistribute it and/or modify
7b285192aSMauro Carvalho Chehab  *  it under the terms of the GNU General Public License as published by
8b285192aSMauro Carvalho Chehab  *  the Free Software Foundation; either version 2 of the License, or
9b285192aSMauro Carvalho Chehab  *  (at your option) any later version.
10b285192aSMauro Carvalho Chehab  *
11b285192aSMauro Carvalho Chehab  *  This program is distributed in the hope that it will be useful,
12b285192aSMauro Carvalho Chehab  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
13b285192aSMauro Carvalho Chehab  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14b285192aSMauro Carvalho Chehab  *
15b285192aSMauro Carvalho Chehab  *  GNU General Public License for more details.
16b285192aSMauro Carvalho Chehab  *
17b285192aSMauro Carvalho Chehab  *  You should have received a copy of the GNU General Public License
18b285192aSMauro Carvalho Chehab  *  along with this program; if not, write to the Free Software
19b285192aSMauro Carvalho Chehab  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20b285192aSMauro Carvalho Chehab  */
21b285192aSMauro Carvalho Chehab 
22b285192aSMauro Carvalho Chehab #include <linux/init.h>
23b285192aSMauro Carvalho Chehab #include <linux/module.h>
24b285192aSMauro Carvalho Chehab #include <linux/pci.h>
25b285192aSMauro Carvalho Chehab #include <linux/delay.h>
26b285192aSMauro Carvalho Chehab #include <media/cx25840.h>
27b285192aSMauro Carvalho Chehab #include <linux/firmware.h>
28b285192aSMauro Carvalho Chehab #include <misc/altera.h>
29b285192aSMauro Carvalho Chehab 
30b285192aSMauro Carvalho Chehab #include "cx23885.h"
31b285192aSMauro Carvalho Chehab #include "tuner-xc2028.h"
32b285192aSMauro Carvalho Chehab #include "netup-eeprom.h"
33b285192aSMauro Carvalho Chehab #include "netup-init.h"
34b285192aSMauro Carvalho Chehab #include "altera-ci.h"
35b285192aSMauro Carvalho Chehab #include "xc4000.h"
36b285192aSMauro Carvalho Chehab #include "xc5000.h"
37b285192aSMauro Carvalho Chehab #include "cx23888-ir.h"
38b285192aSMauro Carvalho Chehab 
3989343055SAnton Nurkin static unsigned int netup_card_rev = 4;
40b285192aSMauro Carvalho Chehab module_param(netup_card_rev, int, 0644);
41b285192aSMauro Carvalho Chehab MODULE_PARM_DESC(netup_card_rev,
42b285192aSMauro Carvalho Chehab 		"NetUP Dual DVB-T/C CI card revision");
43b285192aSMauro Carvalho Chehab static unsigned int enable_885_ir;
44b285192aSMauro Carvalho Chehab module_param(enable_885_ir, int, 0644);
45b285192aSMauro Carvalho Chehab MODULE_PARM_DESC(enable_885_ir,
46b285192aSMauro Carvalho Chehab 		 "Enable integrated IR controller for supported\n"
47b285192aSMauro Carvalho Chehab 		 "\t\t    CX2388[57] boards that are wired for it:\n"
48b285192aSMauro Carvalho Chehab 		 "\t\t\tHVR-1250 (reported safe)\n"
49b285192aSMauro Carvalho Chehab 		 "\t\t\tTerraTec Cinergy T PCIe Dual (not well tested, appears to be safe)\n"
50b285192aSMauro Carvalho Chehab 		 "\t\t\tTeVii S470 (reported unsafe)\n"
51b285192aSMauro Carvalho Chehab 		 "\t\t    This can cause an interrupt storm with some cards.\n"
52b285192aSMauro Carvalho Chehab 		 "\t\t    Default: 0 [Disabled]");
53b285192aSMauro Carvalho Chehab 
54b285192aSMauro Carvalho Chehab /* ------------------------------------------------------------------ */
55b285192aSMauro Carvalho Chehab /* board config info                                                  */
56b285192aSMauro Carvalho Chehab 
57b285192aSMauro Carvalho Chehab struct cx23885_board cx23885_boards[] = {
58b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_UNKNOWN] = {
59b285192aSMauro Carvalho Chehab 		.name		= "UNKNOWN/GENERIC",
60b285192aSMauro Carvalho Chehab 		/* Ensure safe default for unknown boards */
61b285192aSMauro Carvalho Chehab 		.clk_freq       = 0,
62b285192aSMauro Carvalho Chehab 		.input          = {{
63b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
64b285192aSMauro Carvalho Chehab 			.vmux   = 0,
65b285192aSMauro Carvalho Chehab 		}, {
66b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE2,
67b285192aSMauro Carvalho Chehab 			.vmux   = 1,
68b285192aSMauro Carvalho Chehab 		}, {
69b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE3,
70b285192aSMauro Carvalho Chehab 			.vmux   = 2,
71b285192aSMauro Carvalho Chehab 		}, {
72b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE4,
73b285192aSMauro Carvalho Chehab 			.vmux   = 3,
74b285192aSMauro Carvalho Chehab 		} },
75b285192aSMauro Carvalho Chehab 	},
76b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
77b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1800lp",
78b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
79b285192aSMauro Carvalho Chehab 		.input          = {{
80b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
81b285192aSMauro Carvalho Chehab 			.vmux   = 0,
82b285192aSMauro Carvalho Chehab 			.gpio0  = 0xff00,
83b285192aSMauro Carvalho Chehab 		}, {
84b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_DEBUG,
85b285192aSMauro Carvalho Chehab 			.vmux   = 0,
86b285192aSMauro Carvalho Chehab 			.gpio0  = 0xff01,
87b285192aSMauro Carvalho Chehab 		}, {
88b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
89b285192aSMauro Carvalho Chehab 			.vmux   = 1,
90b285192aSMauro Carvalho Chehab 			.gpio0  = 0xff02,
91b285192aSMauro Carvalho Chehab 		}, {
92b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
93b285192aSMauro Carvalho Chehab 			.vmux   = 2,
94b285192aSMauro Carvalho Chehab 			.gpio0  = 0xff02,
95b285192aSMauro Carvalho Chehab 		} },
96b285192aSMauro Carvalho Chehab 	},
97b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1800] = {
98b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1800",
99b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
100b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_ENCODER,
101b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
102b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_PHILIPS_TDA8290,
103b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x42, /* 0x84 >> 1 */
104b285192aSMauro Carvalho Chehab 		.tuner_bus	= 1,
105b285192aSMauro Carvalho Chehab 		.input          = {{
106b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
107b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
108b285192aSMauro Carvalho Chehab 					CX25840_VIN5_CH2 |
109b285192aSMauro Carvalho Chehab 					CX25840_VIN2_CH1,
110b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO8,
111b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
112b285192aSMauro Carvalho Chehab 		}, {
113b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
114b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
115b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
116b285192aSMauro Carvalho Chehab 					CX25840_VIN6_CH1,
117b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
118b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
119b285192aSMauro Carvalho Chehab 		}, {
120b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
121b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
122b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
123b285192aSMauro Carvalho Chehab 					CX25840_VIN8_CH1 |
124b285192aSMauro Carvalho Chehab 					CX25840_SVIDEO_ON,
125b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
126b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
127b285192aSMauro Carvalho Chehab 		} },
128b285192aSMauro Carvalho Chehab 	},
129b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1250] = {
130b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1250",
131b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
132b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
133b285192aSMauro Carvalho Chehab #ifdef MT2131_NO_ANALOG_SUPPORT_YET
134b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_PHILIPS_TDA8290,
135b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x42, /* 0x84 >> 1 */
136b285192aSMauro Carvalho Chehab 		.tuner_bus	= 1,
137b285192aSMauro Carvalho Chehab #endif
138b285192aSMauro Carvalho Chehab 		.force_bff	= 1,
139b285192aSMauro Carvalho Chehab 		.input          = {{
140b285192aSMauro Carvalho Chehab #ifdef MT2131_NO_ANALOG_SUPPORT_YET
141b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
142b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
143b285192aSMauro Carvalho Chehab 					CX25840_VIN5_CH2 |
144b285192aSMauro Carvalho Chehab 					CX25840_VIN2_CH1,
145b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO8,
146b285192aSMauro Carvalho Chehab 			.gpio0  = 0xff00,
147b285192aSMauro Carvalho Chehab 		}, {
148b285192aSMauro Carvalho Chehab #endif
149b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
150b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
151b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
152b285192aSMauro Carvalho Chehab 					CX25840_VIN6_CH1,
153b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
154b285192aSMauro Carvalho Chehab 			.gpio0  = 0xff02,
155b285192aSMauro Carvalho Chehab 		}, {
156b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
157b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
158b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
159b285192aSMauro Carvalho Chehab 					CX25840_VIN8_CH1 |
160b285192aSMauro Carvalho Chehab 					CX25840_SVIDEO_ON,
161b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
162b285192aSMauro Carvalho Chehab 			.gpio0  = 0xff02,
163b285192aSMauro Carvalho Chehab 		} },
164b285192aSMauro Carvalho Chehab 	},
165b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
166b285192aSMauro Carvalho Chehab 		.name		= "DViCO FusionHDTV5 Express",
167b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
168b285192aSMauro Carvalho Chehab 	},
169b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
170b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1500Q",
171b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
172b285192aSMauro Carvalho Chehab 	},
173b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1500] = {
174b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1500",
175b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
176b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
177b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_XC2028,
178b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x61, /* 0xc2 >> 1 */
179b285192aSMauro Carvalho Chehab 		.input          = {{
180b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
181b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
182b285192aSMauro Carvalho Chehab 					CX25840_VIN5_CH2 |
183b285192aSMauro Carvalho Chehab 					CX25840_VIN2_CH1,
184b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
185b285192aSMauro Carvalho Chehab 		}, {
186b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
187b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
188b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
189b285192aSMauro Carvalho Chehab 					CX25840_VIN6_CH1,
190b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
191b285192aSMauro Carvalho Chehab 		}, {
192b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
193b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
194b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
195b285192aSMauro Carvalho Chehab 					CX25840_VIN8_CH1 |
196b285192aSMauro Carvalho Chehab 					CX25840_SVIDEO_ON,
197b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
198b285192aSMauro Carvalho Chehab 		} },
199b285192aSMauro Carvalho Chehab 	},
200b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1200] = {
201b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1200",
202b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
203b285192aSMauro Carvalho Chehab 	},
204b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1700] = {
205b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1700",
206b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
207b285192aSMauro Carvalho Chehab 	},
208b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1400] = {
209b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1400",
210b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
211b285192aSMauro Carvalho Chehab 	},
212b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
213b285192aSMauro Carvalho Chehab 		.name		= "DViCO FusionHDTV7 Dual Express",
214b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
215b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
216b285192aSMauro Carvalho Chehab 	},
217b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
218b285192aSMauro Carvalho Chehab 		.name		= "DViCO FusionHDTV DVB-T Dual Express",
219b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
220b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
221b285192aSMauro Carvalho Chehab 	},
222b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
223b285192aSMauro Carvalho Chehab 		.name		= "Leadtek Winfast PxDVR3200 H",
224b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
225b285192aSMauro Carvalho Chehab 	},
226b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000] = {
227b285192aSMauro Carvalho Chehab 		.name		= "Leadtek Winfast PxDVR3200 H XC4000",
228b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
229b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
230b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_XC4000,
231b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x61,
232b285192aSMauro Carvalho Chehab 		.radio_type	= UNSET,
233b285192aSMauro Carvalho Chehab 		.radio_addr	= ADDR_UNSET,
234b285192aSMauro Carvalho Chehab 		.input		= {{
235b285192aSMauro Carvalho Chehab 			.type	= CX23885_VMUX_TELEVISION,
236b285192aSMauro Carvalho Chehab 			.vmux	= CX25840_VIN2_CH1 |
237b285192aSMauro Carvalho Chehab 				  CX25840_VIN5_CH2 |
238b285192aSMauro Carvalho Chehab 				  CX25840_NONE0_CH3,
239b285192aSMauro Carvalho Chehab 		}, {
240b285192aSMauro Carvalho Chehab 			.type	= CX23885_VMUX_COMPOSITE1,
241b285192aSMauro Carvalho Chehab 			.vmux	= CX25840_COMPOSITE1,
242b285192aSMauro Carvalho Chehab 		}, {
243b285192aSMauro Carvalho Chehab 			.type	= CX23885_VMUX_SVIDEO,
244b285192aSMauro Carvalho Chehab 			.vmux	= CX25840_SVIDEO_LUMA3 |
245b285192aSMauro Carvalho Chehab 				  CX25840_SVIDEO_CHROMA4,
246b285192aSMauro Carvalho Chehab 		}, {
247b285192aSMauro Carvalho Chehab 			.type	= CX23885_VMUX_COMPONENT,
248b285192aSMauro Carvalho Chehab 			.vmux	= CX25840_VIN7_CH1 |
249b285192aSMauro Carvalho Chehab 				  CX25840_VIN6_CH2 |
250b285192aSMauro Carvalho Chehab 				  CX25840_VIN8_CH3 |
251b285192aSMauro Carvalho Chehab 				  CX25840_COMPONENT_ON,
252b285192aSMauro Carvalho Chehab 		} },
253b285192aSMauro Carvalho Chehab 	},
254b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = {
255b285192aSMauro Carvalho Chehab 		.name		= "Compro VideoMate E650F",
256b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
257b285192aSMauro Carvalho Chehab 	},
258b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_TBS_6920] = {
259b285192aSMauro Carvalho Chehab 		.name		= "TurboSight TBS 6920",
260b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
261b285192aSMauro Carvalho Chehab 	},
262b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_TEVII_S470] = {
263b285192aSMauro Carvalho Chehab 		.name		= "TeVii S470",
264b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
265b285192aSMauro Carvalho Chehab 	},
266b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_DVBWORLD_2005] = {
267b285192aSMauro Carvalho Chehab 		.name		= "DVBWorld DVB-S2 2005",
268b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
269b285192aSMauro Carvalho Chehab 	},
270b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = {
271b285192aSMauro Carvalho Chehab 		.ci_type	= 1,
272b285192aSMauro Carvalho Chehab 		.name		= "NetUP Dual DVB-S2 CI",
273b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
274b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
275b285192aSMauro Carvalho Chehab 	},
276b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1270] = {
277b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1270",
278b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
279b285192aSMauro Carvalho Chehab 	},
280b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1275] = {
281b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1275",
282b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
283b285192aSMauro Carvalho Chehab 	},
284b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1255] = {
285b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1255",
286b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
287b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
288b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_ABSENT,
289b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x42, /* 0x84 >> 1 */
290b285192aSMauro Carvalho Chehab 		.force_bff	= 1,
291b285192aSMauro Carvalho Chehab 		.input          = {{
292b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
293b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
294b285192aSMauro Carvalho Chehab 					CX25840_VIN5_CH2 |
295b285192aSMauro Carvalho Chehab 					CX25840_VIN2_CH1 |
296b285192aSMauro Carvalho Chehab 					CX25840_DIF_ON,
297b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO8,
298b285192aSMauro Carvalho Chehab 		}, {
299b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
300b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
301b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
302b285192aSMauro Carvalho Chehab 					CX25840_VIN6_CH1,
303b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
304b285192aSMauro Carvalho Chehab 		}, {
305b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
306b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
307b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
308b285192aSMauro Carvalho Chehab 					CX25840_VIN8_CH1 |
309b285192aSMauro Carvalho Chehab 					CX25840_SVIDEO_ON,
310b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
311b285192aSMauro Carvalho Chehab 		} },
312b285192aSMauro Carvalho Chehab 	},
313b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1255_22111] = {
314b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1255",
315b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
316b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
317b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_ABSENT,
318b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x42, /* 0x84 >> 1 */
319b285192aSMauro Carvalho Chehab 		.force_bff	= 1,
320b285192aSMauro Carvalho Chehab 		.input          = {{
321b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
322b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
323b285192aSMauro Carvalho Chehab 					CX25840_VIN5_CH2 |
324b285192aSMauro Carvalho Chehab 					CX25840_VIN2_CH1 |
325b285192aSMauro Carvalho Chehab 					CX25840_DIF_ON,
326b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO8,
327b285192aSMauro Carvalho Chehab 		}, {
328b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
329b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
330b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
331b285192aSMauro Carvalho Chehab 					CX25840_VIN8_CH1 |
332b285192aSMauro Carvalho Chehab 					CX25840_SVIDEO_ON,
333b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
334b285192aSMauro Carvalho Chehab 		} },
335b285192aSMauro Carvalho Chehab 	},
336b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1210] = {
337b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1210",
338b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
339b285192aSMauro Carvalho Chehab 	},
340b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_MYGICA_X8506] = {
341b285192aSMauro Carvalho Chehab 		.name		= "Mygica X8506 DMB-TH",
342b285192aSMauro Carvalho Chehab 		.tuner_type = TUNER_XC5000,
343b285192aSMauro Carvalho Chehab 		.tuner_addr = 0x61,
344b285192aSMauro Carvalho Chehab 		.tuner_bus	= 1,
345b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
346b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
347b285192aSMauro Carvalho Chehab 		.input		= {
348b285192aSMauro Carvalho Chehab 			{
349b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_TELEVISION,
350b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPOSITE2,
351b285192aSMauro Carvalho Chehab 			},
352b285192aSMauro Carvalho Chehab 			{
353b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_COMPOSITE1,
354b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPOSITE8,
355b285192aSMauro Carvalho Chehab 			},
356b285192aSMauro Carvalho Chehab 			{
357b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_SVIDEO,
358b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_SVIDEO_LUMA3 |
359b285192aSMauro Carvalho Chehab 						CX25840_SVIDEO_CHROMA4,
360b285192aSMauro Carvalho Chehab 			},
361b285192aSMauro Carvalho Chehab 			{
362b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_COMPONENT,
363b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPONENT_ON |
364b285192aSMauro Carvalho Chehab 					CX25840_VIN1_CH1 |
365b285192aSMauro Carvalho Chehab 					CX25840_VIN6_CH2 |
366b285192aSMauro Carvalho Chehab 					CX25840_VIN7_CH3,
367b285192aSMauro Carvalho Chehab 			},
368b285192aSMauro Carvalho Chehab 		},
369b285192aSMauro Carvalho Chehab 	},
370b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_MAGICPRO_PROHDTVE2] = {
371b285192aSMauro Carvalho Chehab 		.name		= "Magic-Pro ProHDTV Extreme 2",
372b285192aSMauro Carvalho Chehab 		.tuner_type = TUNER_XC5000,
373b285192aSMauro Carvalho Chehab 		.tuner_addr = 0x61,
374b285192aSMauro Carvalho Chehab 		.tuner_bus	= 1,
375b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
376b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
377b285192aSMauro Carvalho Chehab 		.input		= {
378b285192aSMauro Carvalho Chehab 			{
379b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_TELEVISION,
380b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPOSITE2,
381b285192aSMauro Carvalho Chehab 			},
382b285192aSMauro Carvalho Chehab 			{
383b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_COMPOSITE1,
384b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPOSITE8,
385b285192aSMauro Carvalho Chehab 			},
386b285192aSMauro Carvalho Chehab 			{
387b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_SVIDEO,
388b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_SVIDEO_LUMA3 |
389b285192aSMauro Carvalho Chehab 						CX25840_SVIDEO_CHROMA4,
390b285192aSMauro Carvalho Chehab 			},
391b285192aSMauro Carvalho Chehab 			{
392b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_COMPONENT,
393b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPONENT_ON |
394b285192aSMauro Carvalho Chehab 					CX25840_VIN1_CH1 |
395b285192aSMauro Carvalho Chehab 					CX25840_VIN6_CH2 |
396b285192aSMauro Carvalho Chehab 					CX25840_VIN7_CH3,
397b285192aSMauro Carvalho Chehab 			},
398b285192aSMauro Carvalho Chehab 		},
399b285192aSMauro Carvalho Chehab 	},
400b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1850] = {
401b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1850",
402b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
403b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_ENCODER,
404b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
405b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_ABSENT,
406b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x42, /* 0x84 >> 1 */
407b285192aSMauro Carvalho Chehab 		.force_bff	= 1,
408b285192aSMauro Carvalho Chehab 		.input          = {{
409b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
410b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
411b285192aSMauro Carvalho Chehab 					CX25840_VIN5_CH2 |
412b285192aSMauro Carvalho Chehab 					CX25840_VIN2_CH1 |
413b285192aSMauro Carvalho Chehab 					CX25840_DIF_ON,
414b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO8,
415b285192aSMauro Carvalho Chehab 		}, {
416b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
417b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
418b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
419b285192aSMauro Carvalho Chehab 					CX25840_VIN6_CH1,
420b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
421b285192aSMauro Carvalho Chehab 		}, {
422b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
423b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
424b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
425b285192aSMauro Carvalho Chehab 					CX25840_VIN8_CH1 |
426b285192aSMauro Carvalho Chehab 					CX25840_SVIDEO_ON,
427b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
428b285192aSMauro Carvalho Chehab 		} },
429b285192aSMauro Carvalho Chehab 	},
430b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_COMPRO_VIDEOMATE_E800] = {
431b285192aSMauro Carvalho Chehab 		.name		= "Compro VideoMate E800",
432b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
433b285192aSMauro Carvalho Chehab 	},
434b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1290] = {
435b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1290",
436b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
437b285192aSMauro Carvalho Chehab 	},
438b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_MYGICA_X8558PRO] = {
439b285192aSMauro Carvalho Chehab 		.name		= "Mygica X8558 PRO DMB-TH",
440b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
441b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
442b285192aSMauro Carvalho Chehab 	},
443b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_LEADTEK_WINFAST_PXTV1200] = {
444b285192aSMauro Carvalho Chehab 		.name           = "LEADTEK WinFast PxTV1200",
445b285192aSMauro Carvalho Chehab 		.porta          = CX23885_ANALOG_VIDEO,
446b285192aSMauro Carvalho Chehab 		.tuner_type     = TUNER_XC2028,
447b285192aSMauro Carvalho Chehab 		.tuner_addr     = 0x61,
448b285192aSMauro Carvalho Chehab 		.tuner_bus	= 1,
449b285192aSMauro Carvalho Chehab 		.input          = {{
450b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
451b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_VIN2_CH1 |
452b285192aSMauro Carvalho Chehab 				  CX25840_VIN5_CH2 |
453b285192aSMauro Carvalho Chehab 				  CX25840_NONE0_CH3,
454b285192aSMauro Carvalho Chehab 		}, {
455b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
456b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_COMPOSITE1,
457b285192aSMauro Carvalho Chehab 		}, {
458b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
459b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_SVIDEO_LUMA3 |
460b285192aSMauro Carvalho Chehab 				  CX25840_SVIDEO_CHROMA4,
461b285192aSMauro Carvalho Chehab 		}, {
462b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPONENT,
463b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_VIN7_CH1 |
464b285192aSMauro Carvalho Chehab 				  CX25840_VIN6_CH2 |
465b285192aSMauro Carvalho Chehab 				  CX25840_VIN8_CH3 |
466b285192aSMauro Carvalho Chehab 				  CX25840_COMPONENT_ON,
467b285192aSMauro Carvalho Chehab 		} },
468b285192aSMauro Carvalho Chehab 	},
469b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_GOTVIEW_X5_3D_HYBRID] = {
470b285192aSMauro Carvalho Chehab 		.name		= "GoTView X5 3D Hybrid",
471b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_XC5000,
472b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x64,
473b285192aSMauro Carvalho Chehab 		.tuner_bus	= 1,
474b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
475b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
476b285192aSMauro Carvalho Chehab 		.input          = {{
477b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
478b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_VIN2_CH1 |
479b285192aSMauro Carvalho Chehab 				  CX25840_VIN5_CH2,
480b285192aSMauro Carvalho Chehab 			.gpio0	= 0x02,
481b285192aSMauro Carvalho Chehab 		}, {
482b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
483b285192aSMauro Carvalho Chehab 			.vmux   = CX23885_VMUX_COMPOSITE1,
484b285192aSMauro Carvalho Chehab 		}, {
485b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
486b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_SVIDEO_LUMA3 |
487b285192aSMauro Carvalho Chehab 				  CX25840_SVIDEO_CHROMA4,
488b285192aSMauro Carvalho Chehab 		} },
489b285192aSMauro Carvalho Chehab 	},
490b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF] = {
491b285192aSMauro Carvalho Chehab 		.ci_type	= 2,
492b285192aSMauro Carvalho Chehab 		.name		= "NetUP Dual DVB-T/C-CI RF",
493b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
494b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
495b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
496b285192aSMauro Carvalho Chehab 		.num_fds_portb	= 2,
497b285192aSMauro Carvalho Chehab 		.num_fds_portc	= 2,
498b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_XC5000,
499b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x64,
500b285192aSMauro Carvalho Chehab 		.input          = { {
501b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_TELEVISION,
502b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPOSITE1,
503b285192aSMauro Carvalho Chehab 		} },
504b285192aSMauro Carvalho Chehab 	},
505b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_MPX885] = {
506b285192aSMauro Carvalho Chehab 		.name		= "MPX-885",
507b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
508b285192aSMauro Carvalho Chehab 		.input          = {{
509b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
510b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_COMPOSITE1,
511b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO6,
512b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
513b285192aSMauro Carvalho Chehab 		}, {
514b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE2,
515b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_COMPOSITE2,
516b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO6,
517b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
518b285192aSMauro Carvalho Chehab 		}, {
519b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE3,
520b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_COMPOSITE3,
521b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
522b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
523b285192aSMauro Carvalho Chehab 		}, {
524b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE4,
525b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_COMPOSITE4,
526b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
527b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
528b285192aSMauro Carvalho Chehab 		} },
529b285192aSMauro Carvalho Chehab 	},
530b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_MYGICA_X8507] = {
531b285192aSMauro Carvalho Chehab 		.name		= "Mygica X8507",
532b285192aSMauro Carvalho Chehab 		.tuner_type = TUNER_XC5000,
533b285192aSMauro Carvalho Chehab 		.tuner_addr = 0x61,
534b285192aSMauro Carvalho Chehab 		.tuner_bus	= 1,
535b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
536b285192aSMauro Carvalho Chehab 		.input		= {
537b285192aSMauro Carvalho Chehab 			{
538b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_TELEVISION,
539b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPOSITE2,
540b285192aSMauro Carvalho Chehab 				.amux   = CX25840_AUDIO8,
541b285192aSMauro Carvalho Chehab 			},
542b285192aSMauro Carvalho Chehab 			{
543b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_COMPOSITE1,
544b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPOSITE8,
545082c0576SAlfredo Jesús Delaiti 				.amux   = CX25840_AUDIO7,
546b285192aSMauro Carvalho Chehab 			},
547b285192aSMauro Carvalho Chehab 			{
548b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_SVIDEO,
549b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_SVIDEO_LUMA3 |
550b285192aSMauro Carvalho Chehab 						CX25840_SVIDEO_CHROMA4,
551082c0576SAlfredo Jesús Delaiti 				.amux   = CX25840_AUDIO7,
552b285192aSMauro Carvalho Chehab 			},
553b285192aSMauro Carvalho Chehab 			{
554b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_COMPONENT,
555b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPONENT_ON |
556b285192aSMauro Carvalho Chehab 					CX25840_VIN1_CH1 |
557b285192aSMauro Carvalho Chehab 					CX25840_VIN6_CH2 |
558b285192aSMauro Carvalho Chehab 					CX25840_VIN7_CH3,
559082c0576SAlfredo Jesús Delaiti 				.amux   = CX25840_AUDIO7,
560b285192aSMauro Carvalho Chehab 			},
561b285192aSMauro Carvalho Chehab 		},
562b285192aSMauro Carvalho Chehab 	},
563b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL] = {
564b285192aSMauro Carvalho Chehab 		.name		= "TerraTec Cinergy T PCIe Dual",
565b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
566b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
567b285192aSMauro Carvalho Chehab 	},
568b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_TEVII_S471] = {
569b285192aSMauro Carvalho Chehab 		.name		= "TeVii S471",
570b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
571f667190bSMariusz Bia?o?czyk 	},
572f667190bSMariusz Bia?o?czyk 	[CX23885_BOARD_PROF_8000] = {
573f667190bSMariusz Bia?o?czyk 		.name		= "Prof Revolution DVB-S2 8000",
574f667190bSMariusz Bia?o?czyk 		.portb		= CX23885_MPEG_DVB,
575b285192aSMauro Carvalho Chehab 	}
576b285192aSMauro Carvalho Chehab };
577b285192aSMauro Carvalho Chehab const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
578b285192aSMauro Carvalho Chehab 
579b285192aSMauro Carvalho Chehab /* ------------------------------------------------------------------ */
580b285192aSMauro Carvalho Chehab /* PCI subsystem IDs                                                  */
581b285192aSMauro Carvalho Chehab 
582b285192aSMauro Carvalho Chehab struct cx23885_subid cx23885_subids[] = {
583b285192aSMauro Carvalho Chehab 	{
584b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
585b285192aSMauro Carvalho Chehab 		.subdevice = 0x3400,
586b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_UNKNOWN,
587b285192aSMauro Carvalho Chehab 	}, {
588b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
589b285192aSMauro Carvalho Chehab 		.subdevice = 0x7600,
590b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
591b285192aSMauro Carvalho Chehab 	}, {
592b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
593b285192aSMauro Carvalho Chehab 		.subdevice = 0x7800,
594b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1800,
595b285192aSMauro Carvalho Chehab 	}, {
596b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
597b285192aSMauro Carvalho Chehab 		.subdevice = 0x7801,
598b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1800,
599b285192aSMauro Carvalho Chehab 	}, {
600b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
601b285192aSMauro Carvalho Chehab 		.subdevice = 0x7809,
602b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1800,
603b285192aSMauro Carvalho Chehab 	}, {
604b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
605b285192aSMauro Carvalho Chehab 		.subdevice = 0x7911,
606b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1250,
607b285192aSMauro Carvalho Chehab 	}, {
608b285192aSMauro Carvalho Chehab 		.subvendor = 0x18ac,
609b285192aSMauro Carvalho Chehab 		.subdevice = 0xd500,
610b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
611b285192aSMauro Carvalho Chehab 	}, {
612b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
613b285192aSMauro Carvalho Chehab 		.subdevice = 0x7790,
614b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
615b285192aSMauro Carvalho Chehab 	}, {
616b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
617b285192aSMauro Carvalho Chehab 		.subdevice = 0x7797,
618b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
619b285192aSMauro Carvalho Chehab 	}, {
620b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
621b285192aSMauro Carvalho Chehab 		.subdevice = 0x7710,
622b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1500,
623b285192aSMauro Carvalho Chehab 	}, {
624b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
625b285192aSMauro Carvalho Chehab 		.subdevice = 0x7717,
626b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1500,
627b285192aSMauro Carvalho Chehab 	}, {
628b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
629b285192aSMauro Carvalho Chehab 		.subdevice = 0x71d1,
630b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1200,
631b285192aSMauro Carvalho Chehab 	}, {
632b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
633b285192aSMauro Carvalho Chehab 		.subdevice = 0x71d3,
634b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1200,
635b285192aSMauro Carvalho Chehab 	}, {
636b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
637b285192aSMauro Carvalho Chehab 		.subdevice = 0x8101,
638b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1700,
639b285192aSMauro Carvalho Chehab 	}, {
640b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
641b285192aSMauro Carvalho Chehab 		.subdevice = 0x8010,
642b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1400,
643b285192aSMauro Carvalho Chehab 	}, {
644b285192aSMauro Carvalho Chehab 		.subvendor = 0x18ac,
645b285192aSMauro Carvalho Chehab 		.subdevice = 0xd618,
646b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
647b285192aSMauro Carvalho Chehab 	}, {
648b285192aSMauro Carvalho Chehab 		.subvendor = 0x18ac,
649b285192aSMauro Carvalho Chehab 		.subdevice = 0xdb78,
650b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
651b285192aSMauro Carvalho Chehab 	}, {
652b285192aSMauro Carvalho Chehab 		.subvendor = 0x107d,
653b285192aSMauro Carvalho Chehab 		.subdevice = 0x6681,
654b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
655b285192aSMauro Carvalho Chehab 	}, {
656b285192aSMauro Carvalho Chehab 		.subvendor = 0x107d,
657b285192aSMauro Carvalho Chehab 		.subdevice = 0x6f39,
658b285192aSMauro Carvalho Chehab 		.card	   = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000,
659b285192aSMauro Carvalho Chehab 	}, {
660b285192aSMauro Carvalho Chehab 		.subvendor = 0x185b,
661b285192aSMauro Carvalho Chehab 		.subdevice = 0xe800,
662b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_COMPRO_VIDEOMATE_E650F,
663b285192aSMauro Carvalho Chehab 	}, {
664b285192aSMauro Carvalho Chehab 		.subvendor = 0x6920,
665b285192aSMauro Carvalho Chehab 		.subdevice = 0x8888,
666b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_TBS_6920,
667b285192aSMauro Carvalho Chehab 	}, {
668b285192aSMauro Carvalho Chehab 		.subvendor = 0xd470,
669b285192aSMauro Carvalho Chehab 		.subdevice = 0x9022,
670b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_TEVII_S470,
671b285192aSMauro Carvalho Chehab 	}, {
672b285192aSMauro Carvalho Chehab 		.subvendor = 0x0001,
673b285192aSMauro Carvalho Chehab 		.subdevice = 0x2005,
674b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_DVBWORLD_2005,
675b285192aSMauro Carvalho Chehab 	}, {
676b285192aSMauro Carvalho Chehab 		.subvendor = 0x1b55,
677b285192aSMauro Carvalho Chehab 		.subdevice = 0x2a2c,
678b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_NETUP_DUAL_DVBS2_CI,
679b285192aSMauro Carvalho Chehab 	}, {
680b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
681b285192aSMauro Carvalho Chehab 		.subdevice = 0x2211,
682b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1270,
683b285192aSMauro Carvalho Chehab 	}, {
684b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
685b285192aSMauro Carvalho Chehab 		.subdevice = 0x2215,
686b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1275,
687b285192aSMauro Carvalho Chehab 	}, {
688b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
689b285192aSMauro Carvalho Chehab 		.subdevice = 0x221d,
690b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1275,
691b285192aSMauro Carvalho Chehab 	}, {
692b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
693b285192aSMauro Carvalho Chehab 		.subdevice = 0x2251,
694b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1255,
695b285192aSMauro Carvalho Chehab 	}, {
696b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
697b285192aSMauro Carvalho Chehab 		.subdevice = 0x2259,
698b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1255_22111,
699b285192aSMauro Carvalho Chehab 	}, {
700b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
701b285192aSMauro Carvalho Chehab 		.subdevice = 0x2291,
702b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210,
703b285192aSMauro Carvalho Chehab 	}, {
704b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
705b285192aSMauro Carvalho Chehab 		.subdevice = 0x2295,
706b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210,
707b285192aSMauro Carvalho Chehab 	}, {
708b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
709b285192aSMauro Carvalho Chehab 		.subdevice = 0x2299,
710b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210,
711b285192aSMauro Carvalho Chehab 	}, {
712b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
713b285192aSMauro Carvalho Chehab 		.subdevice = 0x229d,
714b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
715b285192aSMauro Carvalho Chehab 	}, {
716b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
717b285192aSMauro Carvalho Chehab 		.subdevice = 0x22f0,
718b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210,
719b285192aSMauro Carvalho Chehab 	}, {
720b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
721b285192aSMauro Carvalho Chehab 		.subdevice = 0x22f1,
722b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1255,
723b285192aSMauro Carvalho Chehab 	}, {
724b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
725b285192aSMauro Carvalho Chehab 		.subdevice = 0x22f2,
726b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1275,
727b285192aSMauro Carvalho Chehab 	}, {
728b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
729b285192aSMauro Carvalho Chehab 		.subdevice = 0x22f3,
730b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
731b285192aSMauro Carvalho Chehab 	}, {
732b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
733b285192aSMauro Carvalho Chehab 		.subdevice = 0x22f4,
734b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210,
735b285192aSMauro Carvalho Chehab 	}, {
736b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
737b285192aSMauro Carvalho Chehab 		.subdevice = 0x22f5,
738b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
739b285192aSMauro Carvalho Chehab 	}, {
740b285192aSMauro Carvalho Chehab 		.subvendor = 0x14f1,
741b285192aSMauro Carvalho Chehab 		.subdevice = 0x8651,
742b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_MYGICA_X8506,
743b285192aSMauro Carvalho Chehab 	}, {
744b285192aSMauro Carvalho Chehab 		.subvendor = 0x14f1,
745b285192aSMauro Carvalho Chehab 		.subdevice = 0x8657,
746b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_MAGICPRO_PROHDTVE2,
747b285192aSMauro Carvalho Chehab 	}, {
748b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
749b285192aSMauro Carvalho Chehab 		.subdevice = 0x8541,
750b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1850,
751b285192aSMauro Carvalho Chehab 	}, {
752b285192aSMauro Carvalho Chehab 		.subvendor = 0x1858,
753b285192aSMauro Carvalho Chehab 		.subdevice = 0xe800,
754b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_COMPRO_VIDEOMATE_E800,
755b285192aSMauro Carvalho Chehab 	}, {
756b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
757b285192aSMauro Carvalho Chehab 		.subdevice = 0x8551,
758b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1290,
759b285192aSMauro Carvalho Chehab 	}, {
760b285192aSMauro Carvalho Chehab 		.subvendor = 0x14f1,
761b285192aSMauro Carvalho Chehab 		.subdevice = 0x8578,
762b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_MYGICA_X8558PRO,
763b285192aSMauro Carvalho Chehab 	}, {
764b285192aSMauro Carvalho Chehab 		.subvendor = 0x107d,
765b285192aSMauro Carvalho Chehab 		.subdevice = 0x6f22,
766b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_LEADTEK_WINFAST_PXTV1200,
767b285192aSMauro Carvalho Chehab 	}, {
768b285192aSMauro Carvalho Chehab 		.subvendor = 0x5654,
769b285192aSMauro Carvalho Chehab 		.subdevice = 0x2390,
770b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_GOTVIEW_X5_3D_HYBRID,
771b285192aSMauro Carvalho Chehab 	}, {
772b285192aSMauro Carvalho Chehab 		.subvendor = 0x1b55,
773b285192aSMauro Carvalho Chehab 		.subdevice = 0xe2e4,
774b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF,
775b285192aSMauro Carvalho Chehab 	}, {
776b285192aSMauro Carvalho Chehab 		.subvendor = 0x14f1,
777b285192aSMauro Carvalho Chehab 		.subdevice = 0x8502,
778b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_MYGICA_X8507,
779b285192aSMauro Carvalho Chehab 	}, {
780b285192aSMauro Carvalho Chehab 		.subvendor = 0x153b,
781b285192aSMauro Carvalho Chehab 		.subdevice = 0x117e,
782b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL,
783b285192aSMauro Carvalho Chehab 	}, {
784b285192aSMauro Carvalho Chehab 		.subvendor = 0xd471,
785b285192aSMauro Carvalho Chehab 		.subdevice = 0x9022,
786b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_TEVII_S471,
787f667190bSMariusz Bia?o?czyk 	}, {
788f667190bSMariusz Bia?o?czyk 		.subvendor = 0x8000,
789f667190bSMariusz Bia?o?czyk 		.subdevice = 0x3034,
790f667190bSMariusz Bia?o?czyk 		.card      = CX23885_BOARD_PROF_8000,
791b285192aSMauro Carvalho Chehab 	},
792b285192aSMauro Carvalho Chehab };
793b285192aSMauro Carvalho Chehab const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
794b285192aSMauro Carvalho Chehab 
795b285192aSMauro Carvalho Chehab void cx23885_card_list(struct cx23885_dev *dev)
796b285192aSMauro Carvalho Chehab {
797b285192aSMauro Carvalho Chehab 	int i;
798b285192aSMauro Carvalho Chehab 
799b285192aSMauro Carvalho Chehab 	if (0 == dev->pci->subsystem_vendor &&
800b285192aSMauro Carvalho Chehab 	    0 == dev->pci->subsystem_device) {
801b285192aSMauro Carvalho Chehab 		printk(KERN_INFO
802b285192aSMauro Carvalho Chehab 			"%s: Board has no valid PCIe Subsystem ID and can't\n"
803b285192aSMauro Carvalho Chehab 		       "%s: be autodetected. Pass card=<n> insmod option\n"
804b285192aSMauro Carvalho Chehab 		       "%s: to workaround that. Redirect complaints to the\n"
805b285192aSMauro Carvalho Chehab 		       "%s: vendor of the TV card.  Best regards,\n"
806b285192aSMauro Carvalho Chehab 		       "%s:         -- tux\n",
807b285192aSMauro Carvalho Chehab 		       dev->name, dev->name, dev->name, dev->name, dev->name);
808b285192aSMauro Carvalho Chehab 	} else {
809b285192aSMauro Carvalho Chehab 		printk(KERN_INFO
810b285192aSMauro Carvalho Chehab 			"%s: Your board isn't known (yet) to the driver.\n"
811b285192aSMauro Carvalho Chehab 		       "%s: Try to pick one of the existing card configs via\n"
812b285192aSMauro Carvalho Chehab 		       "%s: card=<n> insmod option.  Updating to the latest\n"
813b285192aSMauro Carvalho Chehab 		       "%s: version might help as well.\n",
814b285192aSMauro Carvalho Chehab 		       dev->name, dev->name, dev->name, dev->name);
815b285192aSMauro Carvalho Chehab 	}
816b285192aSMauro Carvalho Chehab 	printk(KERN_INFO "%s: Here is a list of valid choices for the card=<n> insmod option:\n",
817b285192aSMauro Carvalho Chehab 	       dev->name);
818b285192aSMauro Carvalho Chehab 	for (i = 0; i < cx23885_bcount; i++)
819b285192aSMauro Carvalho Chehab 		printk(KERN_INFO "%s:    card=%d -> %s\n",
820b285192aSMauro Carvalho Chehab 		       dev->name, i, cx23885_boards[i].name);
821b285192aSMauro Carvalho Chehab }
822b285192aSMauro Carvalho Chehab 
823b285192aSMauro Carvalho Chehab static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
824b285192aSMauro Carvalho Chehab {
825b285192aSMauro Carvalho Chehab 	struct tveeprom tv;
826b285192aSMauro Carvalho Chehab 
827b285192aSMauro Carvalho Chehab 	tveeprom_hauppauge_analog(&dev->i2c_bus[0].i2c_client, &tv,
828b285192aSMauro Carvalho Chehab 		eeprom_data);
829b285192aSMauro Carvalho Chehab 
830b285192aSMauro Carvalho Chehab 	/* Make sure we support the board model */
831b285192aSMauro Carvalho Chehab 	switch (tv.model) {
832b285192aSMauro Carvalho Chehab 	case 22001:
833b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1270 (PCIe, Retail, half height)
834b285192aSMauro Carvalho Chehab 		 * ATSC/QAM and basic analog, IR Blast */
835b285192aSMauro Carvalho Chehab 	case 22009:
836b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1210 (PCIe, Retail, half height)
837b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog, IR Blast */
838b285192aSMauro Carvalho Chehab 	case 22011:
839b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1270 (PCIe, Retail, half height)
840b285192aSMauro Carvalho Chehab 		 * ATSC/QAM and basic analog, IR Recv */
841b285192aSMauro Carvalho Chehab 	case 22019:
842b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1210 (PCIe, Retail, half height)
843b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog, IR Recv */
844b285192aSMauro Carvalho Chehab 	case 22021:
845b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1275 (PCIe, Retail, half height)
846b285192aSMauro Carvalho Chehab 		 * ATSC/QAM and basic analog, IR Recv */
847b285192aSMauro Carvalho Chehab 	case 22029:
848b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1210 (PCIe, Retail, half height)
849b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog, IR Recv */
850b285192aSMauro Carvalho Chehab 	case 22101:
851b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1270 (PCIe, Retail, full height)
852b285192aSMauro Carvalho Chehab 		 * ATSC/QAM and basic analog, IR Blast */
853b285192aSMauro Carvalho Chehab 	case 22109:
854b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1210 (PCIe, Retail, full height)
855b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog, IR Blast */
856b285192aSMauro Carvalho Chehab 	case 22111:
857b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1270 (PCIe, Retail, full height)
858b285192aSMauro Carvalho Chehab 		 * ATSC/QAM and basic analog, IR Recv */
859b285192aSMauro Carvalho Chehab 	case 22119:
860b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1210 (PCIe, Retail, full height)
861b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog, IR Recv */
862b285192aSMauro Carvalho Chehab 	case 22121:
863b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1275 (PCIe, Retail, full height)
864b285192aSMauro Carvalho Chehab 		 * ATSC/QAM and basic analog, IR Recv */
865b285192aSMauro Carvalho Chehab 	case 22129:
866b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1210 (PCIe, Retail, full height)
867b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog, IR Recv */
868b285192aSMauro Carvalho Chehab 	case 71009:
869b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, Retail, full height)
870b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
871b285192aSMauro Carvalho Chehab 	case 71359:
872b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, OEM, half height)
873b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
874b285192aSMauro Carvalho Chehab 	case 71439:
875b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, OEM, half height)
876b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
877b285192aSMauro Carvalho Chehab 	case 71449:
878b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, OEM, full height)
879b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
880b285192aSMauro Carvalho Chehab 	case 71939:
881b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, OEM, half height)
882b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
883b285192aSMauro Carvalho Chehab 	case 71949:
884b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, OEM, full height)
885b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
886b285192aSMauro Carvalho Chehab 	case 71959:
887b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, OEM, full height)
888b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
889b285192aSMauro Carvalho Chehab 	case 71979:
890b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, OEM, half height)
891b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
892b285192aSMauro Carvalho Chehab 	case 71999:
893b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, OEM, full height)
894b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
895b285192aSMauro Carvalho Chehab 	case 76601:
896b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
897b285192aSMauro Carvalho Chehab 			channel ATSC and MPEG2 HW Encoder */
898b285192aSMauro Carvalho Chehab 	case 77001:
899b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
900b285192aSMauro Carvalho Chehab 			and Basic analog */
901b285192aSMauro Carvalho Chehab 	case 77011:
902b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
903b285192aSMauro Carvalho Chehab 			and Basic analog */
904b285192aSMauro Carvalho Chehab 	case 77041:
905b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
906b285192aSMauro Carvalho Chehab 			and Basic analog */
907b285192aSMauro Carvalho Chehab 	case 77051:
908b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
909b285192aSMauro Carvalho Chehab 			and Basic analog */
910b285192aSMauro Carvalho Chehab 	case 78011:
911b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
912b285192aSMauro Carvalho Chehab 			Dual channel ATSC and MPEG2 HW Encoder */
913b285192aSMauro Carvalho Chehab 	case 78501:
914b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
915b285192aSMauro Carvalho Chehab 			Dual channel ATSC and MPEG2 HW Encoder */
916b285192aSMauro Carvalho Chehab 	case 78521:
917b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
918b285192aSMauro Carvalho Chehab 			Dual channel ATSC and MPEG2 HW Encoder */
919b285192aSMauro Carvalho Chehab 	case 78531:
920b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
921b285192aSMauro Carvalho Chehab 			Dual channel ATSC and MPEG2 HW Encoder */
922b285192aSMauro Carvalho Chehab 	case 78631:
923b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
924b285192aSMauro Carvalho Chehab 			Dual channel ATSC and MPEG2 HW Encoder */
925b285192aSMauro Carvalho Chehab 	case 79001:
926b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1250 (PCIe, Retail, IR, full height,
927b285192aSMauro Carvalho Chehab 			ATSC and Basic analog */
928b285192aSMauro Carvalho Chehab 	case 79101:
929b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1250 (PCIe, Retail, IR, half height,
930b285192aSMauro Carvalho Chehab 			ATSC and Basic analog */
931b285192aSMauro Carvalho Chehab 	case 79501:
932b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1250 (PCIe, No IR, half height,
933b285192aSMauro Carvalho Chehab 			ATSC [at least] and Basic analog) */
934b285192aSMauro Carvalho Chehab 	case 79561:
935b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
936b285192aSMauro Carvalho Chehab 			ATSC and Basic analog */
937b285192aSMauro Carvalho Chehab 	case 79571:
938b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
939b285192aSMauro Carvalho Chehab 		 ATSC and Basic analog */
940b285192aSMauro Carvalho Chehab 	case 79671:
941b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
942b285192aSMauro Carvalho Chehab 			ATSC and Basic analog */
943b285192aSMauro Carvalho Chehab 	case 80019:
944b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1400 (Express Card, Retail, IR,
945b285192aSMauro Carvalho Chehab 		 * DVB-T and Basic analog */
946b285192aSMauro Carvalho Chehab 	case 81509:
947b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
948b285192aSMauro Carvalho Chehab 		 * DVB-T and MPEG2 HW Encoder */
949b285192aSMauro Carvalho Chehab 	case 81519:
950b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
951b285192aSMauro Carvalho Chehab 		 * DVB-T and MPEG2 HW Encoder */
952b285192aSMauro Carvalho Chehab 		break;
953b285192aSMauro Carvalho Chehab 	case 85021:
954b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1850 (PCIe, Retail, 3.5mm in, IR, FM,
955b285192aSMauro Carvalho Chehab 			Dual channel ATSC and MPEG2 HW Encoder */
956b285192aSMauro Carvalho Chehab 		break;
957b285192aSMauro Carvalho Chehab 	case 85721:
958b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1290 (PCIe, OEM, RCA in, IR,
959b285192aSMauro Carvalho Chehab 			Dual channel ATSC and Basic analog */
960b285192aSMauro Carvalho Chehab 		break;
961b285192aSMauro Carvalho Chehab 	default:
962b285192aSMauro Carvalho Chehab 		printk(KERN_WARNING "%s: warning: "
963b285192aSMauro Carvalho Chehab 			"unknown hauppauge model #%d\n",
964b285192aSMauro Carvalho Chehab 			dev->name, tv.model);
965b285192aSMauro Carvalho Chehab 		break;
966b285192aSMauro Carvalho Chehab 	}
967b285192aSMauro Carvalho Chehab 
968b285192aSMauro Carvalho Chehab 	printk(KERN_INFO "%s: hauppauge eeprom: model=%d\n",
969b285192aSMauro Carvalho Chehab 			dev->name, tv.model);
970b285192aSMauro Carvalho Chehab }
971b285192aSMauro Carvalho Chehab 
972b285192aSMauro Carvalho Chehab int cx23885_tuner_callback(void *priv, int component, int command, int arg)
973b285192aSMauro Carvalho Chehab {
974b285192aSMauro Carvalho Chehab 	struct cx23885_tsport *port = priv;
975b285192aSMauro Carvalho Chehab 	struct cx23885_dev *dev = port->dev;
976b285192aSMauro Carvalho Chehab 	u32 bitmask = 0;
977b285192aSMauro Carvalho Chehab 
978b285192aSMauro Carvalho Chehab 	if ((command == XC2028_RESET_CLK) || (command == XC2028_I2C_FLUSH))
979b285192aSMauro Carvalho Chehab 		return 0;
980b285192aSMauro Carvalho Chehab 
981b285192aSMauro Carvalho Chehab 	if (command != 0) {
982b285192aSMauro Carvalho Chehab 		printk(KERN_ERR "%s(): Unknown command 0x%x.\n",
983b285192aSMauro Carvalho Chehab 			__func__, command);
984b285192aSMauro Carvalho Chehab 		return -EINVAL;
985b285192aSMauro Carvalho Chehab 	}
986b285192aSMauro Carvalho Chehab 
987b285192aSMauro Carvalho Chehab 	switch (dev->board) {
988b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1400:
989b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500:
990b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
991b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
992b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
993b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
994b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
995b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
996b285192aSMauro Carvalho Chehab 		/* Tuner Reset Command */
997b285192aSMauro Carvalho Chehab 		bitmask = 0x04;
998b285192aSMauro Carvalho Chehab 		break;
999b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1000b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
1001b285192aSMauro Carvalho Chehab 		/* Two identical tuners on two different i2c buses,
1002b285192aSMauro Carvalho Chehab 		 * we need to reset the correct gpio. */
1003b285192aSMauro Carvalho Chehab 		if (port->nr == 1)
1004b285192aSMauro Carvalho Chehab 			bitmask = 0x01;
1005b285192aSMauro Carvalho Chehab 		else if (port->nr == 2)
1006b285192aSMauro Carvalho Chehab 			bitmask = 0x04;
1007b285192aSMauro Carvalho Chehab 		break;
1008b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1009b285192aSMauro Carvalho Chehab 		/* Tuner Reset Command */
1010b285192aSMauro Carvalho Chehab 		bitmask = 0x02;
1011b285192aSMauro Carvalho Chehab 		break;
1012b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1013b285192aSMauro Carvalho Chehab 		altera_ci_tuner_reset(dev, port->nr);
1014b285192aSMauro Carvalho Chehab 		break;
1015b285192aSMauro Carvalho Chehab 	}
1016b285192aSMauro Carvalho Chehab 
1017b285192aSMauro Carvalho Chehab 	if (bitmask) {
1018b285192aSMauro Carvalho Chehab 		/* Drive the tuner into reset and back out */
1019b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, bitmask);
1020b285192aSMauro Carvalho Chehab 		mdelay(200);
1021b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, bitmask);
1022b285192aSMauro Carvalho Chehab 	}
1023b285192aSMauro Carvalho Chehab 
1024b285192aSMauro Carvalho Chehab 	return 0;
1025b285192aSMauro Carvalho Chehab }
1026b285192aSMauro Carvalho Chehab 
1027b285192aSMauro Carvalho Chehab void cx23885_gpio_setup(struct cx23885_dev *dev)
1028b285192aSMauro Carvalho Chehab {
1029b285192aSMauro Carvalho Chehab 	switch (dev->board) {
1030b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1250:
1031b285192aSMauro Carvalho Chehab 		/* GPIO-0 cx24227 demodulator reset */
1032b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
1033b285192aSMauro Carvalho Chehab 		break;
1034b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500:
1035b285192aSMauro Carvalho Chehab 		/* GPIO-0 cx24227 demodulator */
1036b285192aSMauro Carvalho Chehab 		/* GPIO-2 xc3028 tuner */
1037b285192aSMauro Carvalho Chehab 
1038b285192aSMauro Carvalho Chehab 		/* Put the parts into reset */
1039b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050000);
1040b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x00000005);
1041b285192aSMauro Carvalho Chehab 		msleep(5);
1042b285192aSMauro Carvalho Chehab 
1043b285192aSMauro Carvalho Chehab 		/* Bring the parts out of reset */
1044b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050005);
1045b285192aSMauro Carvalho Chehab 		break;
1046b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1047b285192aSMauro Carvalho Chehab 		/* GPIO-0 cx24227 demodulator reset */
1048b285192aSMauro Carvalho Chehab 		/* GPIO-2 xc5000 tuner reset */
1049b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
1050b285192aSMauro Carvalho Chehab 		break;
1051b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1800:
1052b285192aSMauro Carvalho Chehab 		/* GPIO-0 656_CLK */
1053b285192aSMauro Carvalho Chehab 		/* GPIO-1 656_D0 */
1054b285192aSMauro Carvalho Chehab 		/* GPIO-2 8295A Reset */
1055b285192aSMauro Carvalho Chehab 		/* GPIO-3-10 cx23417 data0-7 */
1056b285192aSMauro Carvalho Chehab 		/* GPIO-11-14 cx23417 addr0-3 */
1057b285192aSMauro Carvalho Chehab 		/* GPIO-15-18 cx23417 READY, CS, RD, WR */
1058b285192aSMauro Carvalho Chehab 		/* GPIO-19 IR_RX */
1059b285192aSMauro Carvalho Chehab 
1060b285192aSMauro Carvalho Chehab 		/* CX23417 GPIO's */
1061b285192aSMauro Carvalho Chehab 		/* EIO15 Zilog Reset */
1062b285192aSMauro Carvalho Chehab 		/* EIO14 S5H1409/CX24227 Reset */
1063b285192aSMauro Carvalho Chehab 		mc417_gpio_enable(dev, GPIO_15 | GPIO_14, 1);
1064b285192aSMauro Carvalho Chehab 
1065b285192aSMauro Carvalho Chehab 		/* Put the demod into reset and protect the eeprom */
1066b285192aSMauro Carvalho Chehab 		mc417_gpio_clear(dev, GPIO_15 | GPIO_14);
1067b285192aSMauro Carvalho Chehab 		mdelay(100);
1068b285192aSMauro Carvalho Chehab 
1069b285192aSMauro Carvalho Chehab 		/* Bring the demod and blaster out of reset */
1070b285192aSMauro Carvalho Chehab 		mc417_gpio_set(dev, GPIO_15 | GPIO_14);
1071b285192aSMauro Carvalho Chehab 		mdelay(100);
1072b285192aSMauro Carvalho Chehab 
1073b285192aSMauro Carvalho Chehab 		/* Force the TDA8295A into reset and back */
1074b285192aSMauro Carvalho Chehab 		cx23885_gpio_enable(dev, GPIO_2, 1);
1075b285192aSMauro Carvalho Chehab 		cx23885_gpio_set(dev, GPIO_2);
1076b285192aSMauro Carvalho Chehab 		mdelay(20);
1077b285192aSMauro Carvalho Chehab 		cx23885_gpio_clear(dev, GPIO_2);
1078b285192aSMauro Carvalho Chehab 		mdelay(20);
1079b285192aSMauro Carvalho Chehab 		cx23885_gpio_set(dev, GPIO_2);
1080b285192aSMauro Carvalho Chehab 		mdelay(20);
1081b285192aSMauro Carvalho Chehab 		break;
1082b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1200:
1083b285192aSMauro Carvalho Chehab 		/* GPIO-0 tda10048 demodulator reset */
1084b285192aSMauro Carvalho Chehab 		/* GPIO-2 tda18271 tuner reset */
1085b285192aSMauro Carvalho Chehab 
1086b285192aSMauro Carvalho Chehab 		/* Put the parts into reset and back */
1087b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050000);
1088b285192aSMauro Carvalho Chehab 		mdelay(20);
1089b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x00000005);
1090b285192aSMauro Carvalho Chehab 		mdelay(20);
1091b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050005);
1092b285192aSMauro Carvalho Chehab 		break;
1093b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1700:
1094b285192aSMauro Carvalho Chehab 		/* GPIO-0 TDA10048 demodulator reset */
1095b285192aSMauro Carvalho Chehab 		/* GPIO-2 TDA8295A Reset */
1096b285192aSMauro Carvalho Chehab 		/* GPIO-3-10 cx23417 data0-7 */
1097b285192aSMauro Carvalho Chehab 		/* GPIO-11-14 cx23417 addr0-3 */
1098b285192aSMauro Carvalho Chehab 		/* GPIO-15-18 cx23417 READY, CS, RD, WR */
1099b285192aSMauro Carvalho Chehab 
1100b285192aSMauro Carvalho Chehab 		/* The following GPIO's are on the interna AVCore (cx25840) */
1101b285192aSMauro Carvalho Chehab 		/* GPIO-19 IR_RX */
1102b285192aSMauro Carvalho Chehab 		/* GPIO-20 IR_TX 416/DVBT Select */
1103b285192aSMauro Carvalho Chehab 		/* GPIO-21 IIS DAT */
1104b285192aSMauro Carvalho Chehab 		/* GPIO-22 IIS WCLK */
1105b285192aSMauro Carvalho Chehab 		/* GPIO-23 IIS BCLK */
1106b285192aSMauro Carvalho Chehab 
1107b285192aSMauro Carvalho Chehab 		/* Put the parts into reset and back */
1108b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050000);
1109b285192aSMauro Carvalho Chehab 		mdelay(20);
1110b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x00000005);
1111b285192aSMauro Carvalho Chehab 		mdelay(20);
1112b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050005);
1113b285192aSMauro Carvalho Chehab 		break;
1114b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1400:
1115b285192aSMauro Carvalho Chehab 		/* GPIO-0  Dibcom7000p demodulator reset */
1116b285192aSMauro Carvalho Chehab 		/* GPIO-2  xc3028L tuner reset */
1117b285192aSMauro Carvalho Chehab 		/* GPIO-13 LED */
1118b285192aSMauro Carvalho Chehab 
1119b285192aSMauro Carvalho Chehab 		/* Put the parts into reset and back */
1120b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050000);
1121b285192aSMauro Carvalho Chehab 		mdelay(20);
1122b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x00000005);
1123b285192aSMauro Carvalho Chehab 		mdelay(20);
1124b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050005);
1125b285192aSMauro Carvalho Chehab 		break;
1126b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1127b285192aSMauro Carvalho Chehab 		/* GPIO-0 xc5000 tuner reset i2c bus 0 */
1128b285192aSMauro Carvalho Chehab 		/* GPIO-1 s5h1409 demod reset i2c bus 0 */
1129b285192aSMauro Carvalho Chehab 		/* GPIO-2 xc5000 tuner reset i2c bus 1 */
1130b285192aSMauro Carvalho Chehab 		/* GPIO-3 s5h1409 demod reset i2c bus 0 */
1131b285192aSMauro Carvalho Chehab 
1132b285192aSMauro Carvalho Chehab 		/* Put the parts into reset and back */
1133b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x000f0000);
1134b285192aSMauro Carvalho Chehab 		mdelay(20);
1135b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x0000000f);
1136b285192aSMauro Carvalho Chehab 		mdelay(20);
1137b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x000f000f);
1138b285192aSMauro Carvalho Chehab 		break;
1139b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
1140b285192aSMauro Carvalho Chehab 		/* GPIO-0 portb xc3028 reset */
1141b285192aSMauro Carvalho Chehab 		/* GPIO-1 portb zl10353 reset */
1142b285192aSMauro Carvalho Chehab 		/* GPIO-2 portc xc3028 reset */
1143b285192aSMauro Carvalho Chehab 		/* GPIO-3 portc zl10353 reset */
1144b285192aSMauro Carvalho Chehab 
1145b285192aSMauro Carvalho Chehab 		/* Put the parts into reset and back */
1146b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x000f0000);
1147b285192aSMauro Carvalho Chehab 		mdelay(20);
1148b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x0000000f);
1149b285192aSMauro Carvalho Chehab 		mdelay(20);
1150b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x000f000f);
1151b285192aSMauro Carvalho Chehab 		break;
1152b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1153b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1154b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1155b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1156b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
1157b285192aSMauro Carvalho Chehab 		/* GPIO-2  xc3028 tuner reset */
1158b285192aSMauro Carvalho Chehab 
1159b285192aSMauro Carvalho Chehab 		/* The following GPIO's are on the internal AVCore (cx25840) */
1160b285192aSMauro Carvalho Chehab 		/* GPIO-?  zl10353 demod reset */
1161b285192aSMauro Carvalho Chehab 
1162b285192aSMauro Carvalho Chehab 		/* Put the parts into reset and back */
1163b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00040000);
1164b285192aSMauro Carvalho Chehab 		mdelay(20);
1165b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x00000004);
1166b285192aSMauro Carvalho Chehab 		mdelay(20);
1167b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00040004);
1168b285192aSMauro Carvalho Chehab 		break;
1169b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TBS_6920:
1170f667190bSMariusz Bia?o?czyk 	case CX23885_BOARD_PROF_8000:
1171b285192aSMauro Carvalho Chehab 		cx_write(MC417_CTL, 0x00000036);
1172b285192aSMauro Carvalho Chehab 		cx_write(MC417_OEN, 0x00001000);
1173b285192aSMauro Carvalho Chehab 		cx_set(MC417_RWD, 0x00000002);
1174b285192aSMauro Carvalho Chehab 		mdelay(200);
1175b285192aSMauro Carvalho Chehab 		cx_clear(MC417_RWD, 0x00000800);
1176b285192aSMauro Carvalho Chehab 		mdelay(200);
1177b285192aSMauro Carvalho Chehab 		cx_set(MC417_RWD, 0x00000800);
1178b285192aSMauro Carvalho Chehab 		mdelay(200);
1179b285192aSMauro Carvalho Chehab 		break;
1180b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1181b285192aSMauro Carvalho Chehab 		/* GPIO-0 INTA from CiMax1
1182b285192aSMauro Carvalho Chehab 		   GPIO-1 INTB from CiMax2
1183b285192aSMauro Carvalho Chehab 		   GPIO-2 reset chips
1184b285192aSMauro Carvalho Chehab 		   GPIO-3 to GPIO-10 data/addr for CA
1185b285192aSMauro Carvalho Chehab 		   GPIO-11 ~CS0 to CiMax1
1186b285192aSMauro Carvalho Chehab 		   GPIO-12 ~CS1 to CiMax2
1187b285192aSMauro Carvalho Chehab 		   GPIO-13 ADL0 load LSB addr
1188b285192aSMauro Carvalho Chehab 		   GPIO-14 ADL1 load MSB addr
1189b285192aSMauro Carvalho Chehab 		   GPIO-15 ~RDY from CiMax
1190b285192aSMauro Carvalho Chehab 		   GPIO-17 ~RD to CiMax
1191b285192aSMauro Carvalho Chehab 		   GPIO-18 ~WR to CiMax
1192b285192aSMauro Carvalho Chehab 		 */
1193b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00040000); /* GPIO as out */
1194b285192aSMauro Carvalho Chehab 		/* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
1195b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x00030004);
1196b285192aSMauro Carvalho Chehab 		mdelay(100);/* reset delay */
1197b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */
1198b285192aSMauro Carvalho Chehab 		cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */
1199b285192aSMauro Carvalho Chehab 		/* GPIO-15 IN as ~ACK, rest as OUT */
1200b285192aSMauro Carvalho Chehab 		cx_write(MC417_OEN, 0x00001000);
1201b285192aSMauro Carvalho Chehab 		/* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
1202b285192aSMauro Carvalho Chehab 		cx_write(MC417_RWD, 0x0000c300);
1203b285192aSMauro Carvalho Chehab 		/* enable irq */
1204b285192aSMauro Carvalho Chehab 		cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
1205b285192aSMauro Carvalho Chehab 		break;
1206b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1270:
1207b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1275:
1208b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255:
1209b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
1210b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1210:
1211b285192aSMauro Carvalho Chehab 		/* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */
1212b285192aSMauro Carvalho Chehab 		/* GPIO-6 I2C Gate which can isolate the demod from the bus */
1213b285192aSMauro Carvalho Chehab 		/* GPIO-9 Demod reset */
1214b285192aSMauro Carvalho Chehab 
1215b285192aSMauro Carvalho Chehab 		/* Put the parts into reset and back */
1216b285192aSMauro Carvalho Chehab 		cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1);
1217b285192aSMauro Carvalho Chehab 		cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5);
1218b285192aSMauro Carvalho Chehab 		cx23885_gpio_clear(dev, GPIO_9);
1219b285192aSMauro Carvalho Chehab 		mdelay(20);
1220b285192aSMauro Carvalho Chehab 		cx23885_gpio_set(dev, GPIO_9);
1221b285192aSMauro Carvalho Chehab 		break;
1222b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MYGICA_X8506:
1223b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1224b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MYGICA_X8507:
1225b285192aSMauro Carvalho Chehab 		/* GPIO-0 (0)Analog / (1)Digital TV */
1226b285192aSMauro Carvalho Chehab 		/* GPIO-1 reset XC5000 */
1227b285192aSMauro Carvalho Chehab 		/* GPIO-2 reset LGS8GL5 / LGS8G75 */
1228b285192aSMauro Carvalho Chehab 		cx23885_gpio_enable(dev, GPIO_0 | GPIO_1 | GPIO_2, 1);
1229b285192aSMauro Carvalho Chehab 		cx23885_gpio_clear(dev, GPIO_1 | GPIO_2);
1230b285192aSMauro Carvalho Chehab 		mdelay(100);
1231b285192aSMauro Carvalho Chehab 		cx23885_gpio_set(dev, GPIO_0 | GPIO_1 | GPIO_2);
1232b285192aSMauro Carvalho Chehab 		mdelay(100);
1233b285192aSMauro Carvalho Chehab 		break;
1234b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MYGICA_X8558PRO:
1235b285192aSMauro Carvalho Chehab 		/* GPIO-0 reset first ATBM8830 */
1236b285192aSMauro Carvalho Chehab 		/* GPIO-1 reset second ATBM8830 */
1237b285192aSMauro Carvalho Chehab 		cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1);
1238b285192aSMauro Carvalho Chehab 		cx23885_gpio_clear(dev, GPIO_0 | GPIO_1);
1239b285192aSMauro Carvalho Chehab 		mdelay(100);
1240b285192aSMauro Carvalho Chehab 		cx23885_gpio_set(dev, GPIO_0 | GPIO_1);
1241b285192aSMauro Carvalho Chehab 		mdelay(100);
1242b285192aSMauro Carvalho Chehab 		break;
1243b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1850:
1244b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1290:
1245b285192aSMauro Carvalho Chehab 		/* GPIO-0 656_CLK */
1246b285192aSMauro Carvalho Chehab 		/* GPIO-1 656_D0 */
1247b285192aSMauro Carvalho Chehab 		/* GPIO-2 Wake# */
1248b285192aSMauro Carvalho Chehab 		/* GPIO-3-10 cx23417 data0-7 */
1249b285192aSMauro Carvalho Chehab 		/* GPIO-11-14 cx23417 addr0-3 */
1250b285192aSMauro Carvalho Chehab 		/* GPIO-15-18 cx23417 READY, CS, RD, WR */
1251b285192aSMauro Carvalho Chehab 		/* GPIO-19 IR_RX */
1252b285192aSMauro Carvalho Chehab 		/* GPIO-20 C_IR_TX */
1253b285192aSMauro Carvalho Chehab 		/* GPIO-21 I2S DAT */
1254b285192aSMauro Carvalho Chehab 		/* GPIO-22 I2S WCLK */
1255b285192aSMauro Carvalho Chehab 		/* GPIO-23 I2S BCLK */
1256b285192aSMauro Carvalho Chehab 		/* ALT GPIO: EXP GPIO LATCH */
1257b285192aSMauro Carvalho Chehab 
1258b285192aSMauro Carvalho Chehab 		/* CX23417 GPIO's */
1259b285192aSMauro Carvalho Chehab 		/* GPIO-14 S5H1411/CX24228 Reset */
1260b285192aSMauro Carvalho Chehab 		/* GPIO-13 EEPROM write protect */
1261b285192aSMauro Carvalho Chehab 		mc417_gpio_enable(dev, GPIO_14 | GPIO_13, 1);
1262b285192aSMauro Carvalho Chehab 
1263b285192aSMauro Carvalho Chehab 		/* Put the demod into reset and protect the eeprom */
1264b285192aSMauro Carvalho Chehab 		mc417_gpio_clear(dev, GPIO_14 | GPIO_13);
1265b285192aSMauro Carvalho Chehab 		mdelay(100);
1266b285192aSMauro Carvalho Chehab 
1267b285192aSMauro Carvalho Chehab 		/* Bring the demod out of reset */
1268b285192aSMauro Carvalho Chehab 		mc417_gpio_set(dev, GPIO_14);
1269b285192aSMauro Carvalho Chehab 		mdelay(100);
1270b285192aSMauro Carvalho Chehab 
1271b285192aSMauro Carvalho Chehab 		/* CX24228 GPIO */
1272b285192aSMauro Carvalho Chehab 		/* Connected to IF / Mux */
1273b285192aSMauro Carvalho Chehab 		break;
1274b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1275b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
1276b285192aSMauro Carvalho Chehab 		break;
1277b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1278b285192aSMauro Carvalho Chehab 		/* GPIO-0 ~INT in
1279b285192aSMauro Carvalho Chehab 		   GPIO-1 TMS out
1280b285192aSMauro Carvalho Chehab 		   GPIO-2 ~reset chips out
1281b285192aSMauro Carvalho Chehab 		   GPIO-3 to GPIO-10 data/addr for CA in/out
1282b285192aSMauro Carvalho Chehab 		   GPIO-11 ~CS out
1283b285192aSMauro Carvalho Chehab 		   GPIO-12 ADDR out
1284b285192aSMauro Carvalho Chehab 		   GPIO-13 ~WR out
1285b285192aSMauro Carvalho Chehab 		   GPIO-14 ~RD out
1286b285192aSMauro Carvalho Chehab 		   GPIO-15 ~RDY in
1287b285192aSMauro Carvalho Chehab 		   GPIO-16 TCK out
1288b285192aSMauro Carvalho Chehab 		   GPIO-17 TDO in
1289b285192aSMauro Carvalho Chehab 		   GPIO-18 TDI out
1290b285192aSMauro Carvalho Chehab 		 */
1291b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00060000); /* GPIO-1,2 as out */
1292b285192aSMauro Carvalho Chehab 		/* GPIO-0 as INT, reset & TMS low */
1293b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x00010006);
1294b285192aSMauro Carvalho Chehab 		mdelay(100);/* reset delay */
1295b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00000004); /* reset high */
1296b285192aSMauro Carvalho Chehab 		cx_write(MC417_CTL, 0x00000037);/* enable GPIO-3..18 pins */
1297b285192aSMauro Carvalho Chehab 		/* GPIO-17 is TDO in, GPIO-15 is ~RDY in, rest is out */
1298b285192aSMauro Carvalho Chehab 		cx_write(MC417_OEN, 0x00005000);
1299b285192aSMauro Carvalho Chehab 		/* ~RD, ~WR high; ADDR low; ~CS high */
1300b285192aSMauro Carvalho Chehab 		cx_write(MC417_RWD, 0x00000d00);
1301b285192aSMauro Carvalho Chehab 		/* enable irq */
1302b285192aSMauro Carvalho Chehab 		cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
1303b285192aSMauro Carvalho Chehab 		break;
1304b285192aSMauro Carvalho Chehab 	}
1305b285192aSMauro Carvalho Chehab }
1306b285192aSMauro Carvalho Chehab 
1307b285192aSMauro Carvalho Chehab int cx23885_ir_init(struct cx23885_dev *dev)
1308b285192aSMauro Carvalho Chehab {
1309b285192aSMauro Carvalho Chehab 	static struct v4l2_subdev_io_pin_config ir_rxtx_pin_cfg[] = {
1310b285192aSMauro Carvalho Chehab 		{
1311b285192aSMauro Carvalho Chehab 			.flags	  = V4L2_SUBDEV_IO_PIN_INPUT,
1312b285192aSMauro Carvalho Chehab 			.pin	  = CX23885_PIN_IR_RX_GPIO19,
1313b285192aSMauro Carvalho Chehab 			.function = CX23885_PAD_IR_RX,
1314b285192aSMauro Carvalho Chehab 			.value	  = 0,
1315b285192aSMauro Carvalho Chehab 			.strength = CX25840_PIN_DRIVE_MEDIUM,
1316b285192aSMauro Carvalho Chehab 		}, {
1317b285192aSMauro Carvalho Chehab 			.flags	  = V4L2_SUBDEV_IO_PIN_OUTPUT,
1318b285192aSMauro Carvalho Chehab 			.pin	  = CX23885_PIN_IR_TX_GPIO20,
1319b285192aSMauro Carvalho Chehab 			.function = CX23885_PAD_IR_TX,
1320b285192aSMauro Carvalho Chehab 			.value	  = 0,
1321b285192aSMauro Carvalho Chehab 			.strength = CX25840_PIN_DRIVE_MEDIUM,
1322b285192aSMauro Carvalho Chehab 		}
1323b285192aSMauro Carvalho Chehab 	};
1324b285192aSMauro Carvalho Chehab 	const size_t ir_rxtx_pin_cfg_count = ARRAY_SIZE(ir_rxtx_pin_cfg);
1325b285192aSMauro Carvalho Chehab 
1326b285192aSMauro Carvalho Chehab 	static struct v4l2_subdev_io_pin_config ir_rx_pin_cfg[] = {
1327b285192aSMauro Carvalho Chehab 		{
1328b285192aSMauro Carvalho Chehab 			.flags	  = V4L2_SUBDEV_IO_PIN_INPUT,
1329b285192aSMauro Carvalho Chehab 			.pin	  = CX23885_PIN_IR_RX_GPIO19,
1330b285192aSMauro Carvalho Chehab 			.function = CX23885_PAD_IR_RX,
1331b285192aSMauro Carvalho Chehab 			.value	  = 0,
1332b285192aSMauro Carvalho Chehab 			.strength = CX25840_PIN_DRIVE_MEDIUM,
1333b285192aSMauro Carvalho Chehab 		}
1334b285192aSMauro Carvalho Chehab 	};
1335b285192aSMauro Carvalho Chehab 	const size_t ir_rx_pin_cfg_count = ARRAY_SIZE(ir_rx_pin_cfg);
1336b285192aSMauro Carvalho Chehab 
1337b285192aSMauro Carvalho Chehab 	struct v4l2_subdev_ir_parameters params;
1338b285192aSMauro Carvalho Chehab 	int ret = 0;
1339b285192aSMauro Carvalho Chehab 	switch (dev->board) {
1340b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500:
1341b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1342b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1800:
1343b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1200:
1344b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1400:
1345b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1275:
1346b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255:
1347b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
1348b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1210:
1349b285192aSMauro Carvalho Chehab 		/* FIXME: Implement me */
1350b285192aSMauro Carvalho Chehab 		break;
1351b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1270:
1352b285192aSMauro Carvalho Chehab 		ret = cx23888_ir_probe(dev);
1353b285192aSMauro Carvalho Chehab 		if (ret)
1354b285192aSMauro Carvalho Chehab 			break;
1355b285192aSMauro Carvalho Chehab 		dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
1356b285192aSMauro Carvalho Chehab 		v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1357b285192aSMauro Carvalho Chehab 				 ir_rx_pin_cfg_count, ir_rx_pin_cfg);
1358b285192aSMauro Carvalho Chehab 		break;
1359b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1850:
1360b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1290:
1361b285192aSMauro Carvalho Chehab 		ret = cx23888_ir_probe(dev);
1362b285192aSMauro Carvalho Chehab 		if (ret)
1363b285192aSMauro Carvalho Chehab 			break;
1364b285192aSMauro Carvalho Chehab 		dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
1365b285192aSMauro Carvalho Chehab 		v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1366b285192aSMauro Carvalho Chehab 				 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
1367b285192aSMauro Carvalho Chehab 		/*
1368b285192aSMauro Carvalho Chehab 		 * For these boards we need to invert the Tx output via the
1369b285192aSMauro Carvalho Chehab 		 * IR controller to have the LED off while idle
1370b285192aSMauro Carvalho Chehab 		 */
1371b285192aSMauro Carvalho Chehab 		v4l2_subdev_call(dev->sd_ir, ir, tx_g_parameters, &params);
1372b285192aSMauro Carvalho Chehab 		params.enable = false;
1373b285192aSMauro Carvalho Chehab 		params.shutdown = false;
1374b285192aSMauro Carvalho Chehab 		params.invert_level = true;
1375b285192aSMauro Carvalho Chehab 		v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, &params);
1376b285192aSMauro Carvalho Chehab 		params.shutdown = true;
1377b285192aSMauro Carvalho Chehab 		v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, &params);
1378b285192aSMauro Carvalho Chehab 		break;
1379b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1380b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TEVII_S470:
1381b285192aSMauro Carvalho Chehab 		if (!enable_885_ir)
1382b285192aSMauro Carvalho Chehab 			break;
1383b285192aSMauro Carvalho Chehab 		dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
1384b285192aSMauro Carvalho Chehab 		if (dev->sd_ir == NULL) {
1385b285192aSMauro Carvalho Chehab 			ret = -ENODEV;
1386b285192aSMauro Carvalho Chehab 			break;
1387b285192aSMauro Carvalho Chehab 		}
1388b285192aSMauro Carvalho Chehab 		v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1389b285192aSMauro Carvalho Chehab 				 ir_rx_pin_cfg_count, ir_rx_pin_cfg);
1390b285192aSMauro Carvalho Chehab 		break;
1391b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1250:
1392b285192aSMauro Carvalho Chehab 		if (!enable_885_ir)
1393b285192aSMauro Carvalho Chehab 			break;
1394b285192aSMauro Carvalho Chehab 		dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
1395b285192aSMauro Carvalho Chehab 		if (dev->sd_ir == NULL) {
1396b285192aSMauro Carvalho Chehab 			ret = -ENODEV;
1397b285192aSMauro Carvalho Chehab 			break;
1398b285192aSMauro Carvalho Chehab 		}
1399b285192aSMauro Carvalho Chehab 		v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1400b285192aSMauro Carvalho Chehab 				 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
1401b285192aSMauro Carvalho Chehab 		break;
1402b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
1403b285192aSMauro Carvalho Chehab 		request_module("ir-kbd-i2c");
1404b285192aSMauro Carvalho Chehab 		break;
1405b285192aSMauro Carvalho Chehab 	}
1406b285192aSMauro Carvalho Chehab 
1407b285192aSMauro Carvalho Chehab 	return ret;
1408b285192aSMauro Carvalho Chehab }
1409b285192aSMauro Carvalho Chehab 
1410b285192aSMauro Carvalho Chehab void cx23885_ir_fini(struct cx23885_dev *dev)
1411b285192aSMauro Carvalho Chehab {
1412b285192aSMauro Carvalho Chehab 	switch (dev->board) {
1413b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1270:
1414b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1850:
1415b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1290:
1416b285192aSMauro Carvalho Chehab 		cx23885_irq_remove(dev, PCI_MSK_IR);
1417b285192aSMauro Carvalho Chehab 		cx23888_ir_remove(dev);
1418b285192aSMauro Carvalho Chehab 		dev->sd_ir = NULL;
1419b285192aSMauro Carvalho Chehab 		break;
1420b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1421b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TEVII_S470:
1422b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1250:
1423b285192aSMauro Carvalho Chehab 		cx23885_irq_remove(dev, PCI_MSK_AV_CORE);
1424b285192aSMauro Carvalho Chehab 		/* sd_ir is a duplicate pointer to the AV Core, just clear it */
1425b285192aSMauro Carvalho Chehab 		dev->sd_ir = NULL;
1426b285192aSMauro Carvalho Chehab 		break;
1427b285192aSMauro Carvalho Chehab 	}
1428b285192aSMauro Carvalho Chehab }
1429b285192aSMauro Carvalho Chehab 
1430ada73eeeSMauro Carvalho Chehab static int netup_jtag_io(void *device, int tms, int tdi, int read_tdo)
1431b285192aSMauro Carvalho Chehab {
1432b285192aSMauro Carvalho Chehab 	int data;
1433b285192aSMauro Carvalho Chehab 	int tdo = 0;
1434b285192aSMauro Carvalho Chehab 	struct cx23885_dev *dev = (struct cx23885_dev *)device;
1435b285192aSMauro Carvalho Chehab 	/*TMS*/
1436b285192aSMauro Carvalho Chehab 	data = ((cx_read(GP0_IO)) & (~0x00000002));
1437b285192aSMauro Carvalho Chehab 	data |= (tms ? 0x00020002 : 0x00020000);
1438b285192aSMauro Carvalho Chehab 	cx_write(GP0_IO, data);
1439b285192aSMauro Carvalho Chehab 
1440b285192aSMauro Carvalho Chehab 	/*TDI*/
1441b285192aSMauro Carvalho Chehab 	data = ((cx_read(MC417_RWD)) & (~0x0000a000));
1442b285192aSMauro Carvalho Chehab 	data |= (tdi ? 0x00008000 : 0);
1443b285192aSMauro Carvalho Chehab 	cx_write(MC417_RWD, data);
1444b285192aSMauro Carvalho Chehab 	if (read_tdo)
1445b285192aSMauro Carvalho Chehab 		tdo = (data & 0x00004000) ? 1 : 0; /*TDO*/
1446b285192aSMauro Carvalho Chehab 
1447b285192aSMauro Carvalho Chehab 	cx_write(MC417_RWD, data | 0x00002000);
1448b285192aSMauro Carvalho Chehab 	udelay(1);
1449b285192aSMauro Carvalho Chehab 	/*TCK*/
1450b285192aSMauro Carvalho Chehab 	cx_write(MC417_RWD, data);
1451b285192aSMauro Carvalho Chehab 
1452b285192aSMauro Carvalho Chehab 	return tdo;
1453b285192aSMauro Carvalho Chehab }
1454b285192aSMauro Carvalho Chehab 
1455b285192aSMauro Carvalho Chehab void cx23885_ir_pci_int_enable(struct cx23885_dev *dev)
1456b285192aSMauro Carvalho Chehab {
1457b285192aSMauro Carvalho Chehab 	switch (dev->board) {
1458b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1270:
1459b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1850:
1460b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1290:
1461b285192aSMauro Carvalho Chehab 		if (dev->sd_ir)
1462b285192aSMauro Carvalho Chehab 			cx23885_irq_add_enable(dev, PCI_MSK_IR);
1463b285192aSMauro Carvalho Chehab 		break;
1464b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1465b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TEVII_S470:
1466b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1250:
1467b285192aSMauro Carvalho Chehab 		if (dev->sd_ir)
1468b285192aSMauro Carvalho Chehab 			cx23885_irq_add_enable(dev, PCI_MSK_AV_CORE);
1469b285192aSMauro Carvalho Chehab 		break;
1470b285192aSMauro Carvalho Chehab 	}
1471b285192aSMauro Carvalho Chehab }
1472b285192aSMauro Carvalho Chehab 
1473b285192aSMauro Carvalho Chehab void cx23885_card_setup(struct cx23885_dev *dev)
1474b285192aSMauro Carvalho Chehab {
1475b285192aSMauro Carvalho Chehab 	struct cx23885_tsport *ts1 = &dev->ts1;
1476b285192aSMauro Carvalho Chehab 	struct cx23885_tsport *ts2 = &dev->ts2;
1477b285192aSMauro Carvalho Chehab 
1478b285192aSMauro Carvalho Chehab 	static u8 eeprom[256];
1479b285192aSMauro Carvalho Chehab 
1480b285192aSMauro Carvalho Chehab 	if (dev->i2c_bus[0].i2c_rc == 0) {
1481b285192aSMauro Carvalho Chehab 		dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
1482b285192aSMauro Carvalho Chehab 		tveeprom_read(&dev->i2c_bus[0].i2c_client,
1483b285192aSMauro Carvalho Chehab 			      eeprom, sizeof(eeprom));
1484b285192aSMauro Carvalho Chehab 	}
1485b285192aSMauro Carvalho Chehab 
1486b285192aSMauro Carvalho Chehab 	switch (dev->board) {
1487b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1250:
1488b285192aSMauro Carvalho Chehab 		if (dev->i2c_bus[0].i2c_rc == 0) {
1489b285192aSMauro Carvalho Chehab 			if (eeprom[0x80] != 0x84)
1490b285192aSMauro Carvalho Chehab 				hauppauge_eeprom(dev, eeprom+0xc0);
1491b285192aSMauro Carvalho Chehab 			else
1492b285192aSMauro Carvalho Chehab 				hauppauge_eeprom(dev, eeprom+0x80);
1493b285192aSMauro Carvalho Chehab 		}
1494b285192aSMauro Carvalho Chehab 		break;
1495b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500:
1496b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1497b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1400:
1498b285192aSMauro Carvalho Chehab 		if (dev->i2c_bus[0].i2c_rc == 0)
1499b285192aSMauro Carvalho Chehab 			hauppauge_eeprom(dev, eeprom+0x80);
1500b285192aSMauro Carvalho Chehab 		break;
1501b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1800:
1502b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
1503b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1200:
1504b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1700:
1505b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1270:
1506b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1275:
1507b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255:
1508b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
1509b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1210:
1510b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1850:
1511b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1290:
1512b285192aSMauro Carvalho Chehab 		if (dev->i2c_bus[0].i2c_rc == 0)
1513b285192aSMauro Carvalho Chehab 			hauppauge_eeprom(dev, eeprom+0xc0);
1514b285192aSMauro Carvalho Chehab 		break;
1515b285192aSMauro Carvalho Chehab 	}
1516b285192aSMauro Carvalho Chehab 
1517b285192aSMauro Carvalho Chehab 	switch (dev->board) {
1518b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1519b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
1520b285192aSMauro Carvalho Chehab 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
1521b285192aSMauro Carvalho Chehab 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1522b285192aSMauro Carvalho Chehab 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1523b285192aSMauro Carvalho Chehab 		/* break omitted intentionally */
1524b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
1525b285192aSMauro Carvalho Chehab 		ts1->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
1526b285192aSMauro Carvalho Chehab 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1527b285192aSMauro Carvalho Chehab 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1528b285192aSMauro Carvalho Chehab 		break;
1529b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1850:
1530b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1800:
1531b285192aSMauro Carvalho Chehab 		/* Defaults for VID B - Analog encoder */
1532b285192aSMauro Carvalho Chehab 		/* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
1533b285192aSMauro Carvalho Chehab 		ts1->gen_ctrl_val    = 0x10e;
1534b285192aSMauro Carvalho Chehab 		ts1->ts_clk_en_val   = 0x1; /* Enable TS_CLK */
1535b285192aSMauro Carvalho Chehab 		ts1->src_sel_val     = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1536b285192aSMauro Carvalho Chehab 
1537b285192aSMauro Carvalho Chehab 		/* APB_TSVALERR_POL (active low)*/
1538b285192aSMauro Carvalho Chehab 		ts1->vld_misc_val    = 0x2000;
1539b285192aSMauro Carvalho Chehab 		ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
1540b285192aSMauro Carvalho Chehab 		cx_write(0x130184, 0xc);
1541b285192aSMauro Carvalho Chehab 
1542b285192aSMauro Carvalho Chehab 		/* Defaults for VID C */
1543b285192aSMauro Carvalho Chehab 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
1544b285192aSMauro Carvalho Chehab 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1545b285192aSMauro Carvalho Chehab 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1546b285192aSMauro Carvalho Chehab 		break;
1547b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TBS_6920:
1548b285192aSMauro Carvalho Chehab 		ts1->gen_ctrl_val  = 0x4; /* Parallel */
1549b285192aSMauro Carvalho Chehab 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1550b285192aSMauro Carvalho Chehab 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1551b285192aSMauro Carvalho Chehab 		break;
1552b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TEVII_S470:
1553b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TEVII_S471:
1554b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVBWORLD_2005:
1555f667190bSMariusz Bia?o?czyk 	case CX23885_BOARD_PROF_8000:
1556b285192aSMauro Carvalho Chehab 		ts1->gen_ctrl_val  = 0x5; /* Parallel */
1557b285192aSMauro Carvalho Chehab 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1558b285192aSMauro Carvalho Chehab 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1559b285192aSMauro Carvalho Chehab 		break;
1560b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1561b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1562b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1563b285192aSMauro Carvalho Chehab 		ts1->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
1564b285192aSMauro Carvalho Chehab 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1565b285192aSMauro Carvalho Chehab 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1566b285192aSMauro Carvalho Chehab 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
1567b285192aSMauro Carvalho Chehab 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1568b285192aSMauro Carvalho Chehab 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1569b285192aSMauro Carvalho Chehab 		break;
1570b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MYGICA_X8506:
1571b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1572b285192aSMauro Carvalho Chehab 		ts1->gen_ctrl_val  = 0x5; /* Parallel */
1573b285192aSMauro Carvalho Chehab 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1574b285192aSMauro Carvalho Chehab 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1575b285192aSMauro Carvalho Chehab 		break;
1576b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MYGICA_X8558PRO:
1577b285192aSMauro Carvalho Chehab 		ts1->gen_ctrl_val  = 0x5; /* Parallel */
1578b285192aSMauro Carvalho Chehab 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1579b285192aSMauro Carvalho Chehab 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1580b285192aSMauro Carvalho Chehab 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
1581b285192aSMauro Carvalho Chehab 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1582b285192aSMauro Carvalho Chehab 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1583b285192aSMauro Carvalho Chehab 		break;
1584b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1250:
1585b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500:
1586b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1587b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
1588b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1200:
1589b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1700:
1590b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1400:
1591b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1592b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1593b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1594b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1270:
1595b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1275:
1596b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255:
1597b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
1598b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1210:
1599b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1600b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1290:
1601b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1602b285192aSMauro Carvalho Chehab 	default:
1603b285192aSMauro Carvalho Chehab 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
1604b285192aSMauro Carvalho Chehab 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1605b285192aSMauro Carvalho Chehab 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1606b285192aSMauro Carvalho Chehab 	}
1607b285192aSMauro Carvalho Chehab 
1608b285192aSMauro Carvalho Chehab 	/* Certain boards support analog, or require the avcore to be
1609b285192aSMauro Carvalho Chehab 	 * loaded, ensure this happens.
1610b285192aSMauro Carvalho Chehab 	 */
1611b285192aSMauro Carvalho Chehab 	switch (dev->board) {
1612b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TEVII_S470:
1613b285192aSMauro Carvalho Chehab 		/* Currently only enabled for the integrated IR controller */
1614b285192aSMauro Carvalho Chehab 		if (!enable_885_ir)
1615b285192aSMauro Carvalho Chehab 			break;
1616b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1250:
1617b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1800:
1618b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
1619b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1700:
1620b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1621b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1622b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1623b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1624b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1625b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1626b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255:
1627b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
1628b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1270:
1629b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1850:
1630b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MYGICA_X8506:
1631b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1632b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1290:
1633b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
1634b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1635b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500:
1636b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MPX885:
1637b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MYGICA_X8507:
1638b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1639b285192aSMauro Carvalho Chehab 		dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
1640b285192aSMauro Carvalho Chehab 				&dev->i2c_bus[2].i2c_adap,
1641b285192aSMauro Carvalho Chehab 				"cx25840", 0x88 >> 1, NULL);
1642b285192aSMauro Carvalho Chehab 		if (dev->sd_cx25840) {
1643b285192aSMauro Carvalho Chehab 			dev->sd_cx25840->grp_id = CX23885_HW_AV_CORE;
1644b285192aSMauro Carvalho Chehab 			v4l2_subdev_call(dev->sd_cx25840, core, load_fw);
1645b285192aSMauro Carvalho Chehab 		}
1646b285192aSMauro Carvalho Chehab 		break;
1647b285192aSMauro Carvalho Chehab 	}
1648b285192aSMauro Carvalho Chehab 
1649b285192aSMauro Carvalho Chehab 	/* AUX-PLL 27MHz CLK */
1650b285192aSMauro Carvalho Chehab 	switch (dev->board) {
1651b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1652b285192aSMauro Carvalho Chehab 		netup_initialize(dev);
1653b285192aSMauro Carvalho Chehab 		break;
1654b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: {
1655b285192aSMauro Carvalho Chehab 		int ret;
1656b285192aSMauro Carvalho Chehab 		const struct firmware *fw;
1657b285192aSMauro Carvalho Chehab 		const char *filename = "dvb-netup-altera-01.fw";
1658b285192aSMauro Carvalho Chehab 		char *action = "configure";
1659b285192aSMauro Carvalho Chehab 		static struct netup_card_info cinfo;
1660b285192aSMauro Carvalho Chehab 		struct altera_config netup_config = {
1661b285192aSMauro Carvalho Chehab 			.dev = dev,
1662b285192aSMauro Carvalho Chehab 			.action = action,
1663b285192aSMauro Carvalho Chehab 			.jtag_io = netup_jtag_io,
1664b285192aSMauro Carvalho Chehab 		};
1665b285192aSMauro Carvalho Chehab 
1666b285192aSMauro Carvalho Chehab 		netup_initialize(dev);
1667b285192aSMauro Carvalho Chehab 
1668b285192aSMauro Carvalho Chehab 		netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo);
1669b285192aSMauro Carvalho Chehab 		if (netup_card_rev)
1670b285192aSMauro Carvalho Chehab 			cinfo.rev = netup_card_rev;
1671b285192aSMauro Carvalho Chehab 
1672b285192aSMauro Carvalho Chehab 		switch (cinfo.rev) {
1673b285192aSMauro Carvalho Chehab 		case 0x4:
1674b285192aSMauro Carvalho Chehab 			filename = "dvb-netup-altera-04.fw";
1675b285192aSMauro Carvalho Chehab 			break;
1676b285192aSMauro Carvalho Chehab 		default:
1677b285192aSMauro Carvalho Chehab 			filename = "dvb-netup-altera-01.fw";
1678b285192aSMauro Carvalho Chehab 			break;
1679b285192aSMauro Carvalho Chehab 		}
1680b285192aSMauro Carvalho Chehab 		printk(KERN_INFO "NetUP card rev=0x%x fw_filename=%s\n",
1681b285192aSMauro Carvalho Chehab 				cinfo.rev, filename);
1682b285192aSMauro Carvalho Chehab 
1683b285192aSMauro Carvalho Chehab 		ret = request_firmware(&fw, filename, &dev->pci->dev);
1684b285192aSMauro Carvalho Chehab 		if (ret != 0)
1685b285192aSMauro Carvalho Chehab 			printk(KERN_ERR "did not find the firmware file. (%s) "
1686b285192aSMauro Carvalho Chehab 			"Please see linux/Documentation/dvb/ for more details "
1687b285192aSMauro Carvalho Chehab 			"on firmware-problems.", filename);
1688b285192aSMauro Carvalho Chehab 		else
1689b285192aSMauro Carvalho Chehab 			altera_init(&netup_config, fw);
1690b285192aSMauro Carvalho Chehab 
1691b285192aSMauro Carvalho Chehab 		release_firmware(fw);
1692b285192aSMauro Carvalho Chehab 		break;
1693b285192aSMauro Carvalho Chehab 	}
1694b285192aSMauro Carvalho Chehab 	}
1695b285192aSMauro Carvalho Chehab }
1696b285192aSMauro Carvalho Chehab 
1697b285192aSMauro Carvalho Chehab /* ------------------------------------------------------------------ */
1698