1b285192aSMauro Carvalho Chehab /*
2b285192aSMauro Carvalho Chehab  *  Driver for the Conexant CX23885 PCIe bridge
3b285192aSMauro Carvalho Chehab  *
4b285192aSMauro Carvalho Chehab  *  Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
5b285192aSMauro Carvalho Chehab  *
6b285192aSMauro Carvalho Chehab  *  This program is free software; you can redistribute it and/or modify
7b285192aSMauro Carvalho Chehab  *  it under the terms of the GNU General Public License as published by
8b285192aSMauro Carvalho Chehab  *  the Free Software Foundation; either version 2 of the License, or
9b285192aSMauro Carvalho Chehab  *  (at your option) any later version.
10b285192aSMauro Carvalho Chehab  *
11b285192aSMauro Carvalho Chehab  *  This program is distributed in the hope that it will be useful,
12b285192aSMauro Carvalho Chehab  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
13b285192aSMauro Carvalho Chehab  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14b285192aSMauro Carvalho Chehab  *
15b285192aSMauro Carvalho Chehab  *  GNU General Public License for more details.
16b285192aSMauro Carvalho Chehab  */
17b285192aSMauro Carvalho Chehab 
18b285192aSMauro Carvalho Chehab #include <linux/init.h>
19b285192aSMauro Carvalho Chehab #include <linux/module.h>
20b285192aSMauro Carvalho Chehab #include <linux/pci.h>
21b285192aSMauro Carvalho Chehab #include <linux/delay.h>
22b285192aSMauro Carvalho Chehab #include <media/cx25840.h>
23b285192aSMauro Carvalho Chehab #include <linux/firmware.h>
24b285192aSMauro Carvalho Chehab #include <misc/altera.h>
25b285192aSMauro Carvalho Chehab 
26b285192aSMauro Carvalho Chehab #include "cx23885.h"
27b285192aSMauro Carvalho Chehab #include "tuner-xc2028.h"
28b285192aSMauro Carvalho Chehab #include "netup-eeprom.h"
29b285192aSMauro Carvalho Chehab #include "netup-init.h"
30b285192aSMauro Carvalho Chehab #include "altera-ci.h"
31b285192aSMauro Carvalho Chehab #include "xc4000.h"
32b285192aSMauro Carvalho Chehab #include "xc5000.h"
33b285192aSMauro Carvalho Chehab #include "cx23888-ir.h"
34b285192aSMauro Carvalho Chehab 
3589343055SAnton Nurkin static unsigned int netup_card_rev = 4;
36b285192aSMauro Carvalho Chehab module_param(netup_card_rev, int, 0644);
37b285192aSMauro Carvalho Chehab MODULE_PARM_DESC(netup_card_rev,
38b285192aSMauro Carvalho Chehab 		"NetUP Dual DVB-T/C CI card revision");
39b285192aSMauro Carvalho Chehab static unsigned int enable_885_ir;
40b285192aSMauro Carvalho Chehab module_param(enable_885_ir, int, 0644);
41b285192aSMauro Carvalho Chehab MODULE_PARM_DESC(enable_885_ir,
42b285192aSMauro Carvalho Chehab 		 "Enable integrated IR controller for supported\n"
43b285192aSMauro Carvalho Chehab 		 "\t\t    CX2388[57] boards that are wired for it:\n"
44b285192aSMauro Carvalho Chehab 		 "\t\t\tHVR-1250 (reported safe)\n"
45b285192aSMauro Carvalho Chehab 		 "\t\t\tTerraTec Cinergy T PCIe Dual (not well tested, appears to be safe)\n"
46b285192aSMauro Carvalho Chehab 		 "\t\t\tTeVii S470 (reported unsafe)\n"
47b285192aSMauro Carvalho Chehab 		 "\t\t    This can cause an interrupt storm with some cards.\n"
48b285192aSMauro Carvalho Chehab 		 "\t\t    Default: 0 [Disabled]");
49b285192aSMauro Carvalho Chehab 
50b285192aSMauro Carvalho Chehab /* ------------------------------------------------------------------ */
51b285192aSMauro Carvalho Chehab /* board config info                                                  */
52b285192aSMauro Carvalho Chehab 
53b285192aSMauro Carvalho Chehab struct cx23885_board cx23885_boards[] = {
54b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_UNKNOWN] = {
55b285192aSMauro Carvalho Chehab 		.name		= "UNKNOWN/GENERIC",
56b285192aSMauro Carvalho Chehab 		/* Ensure safe default for unknown boards */
57b285192aSMauro Carvalho Chehab 		.clk_freq       = 0,
58b285192aSMauro Carvalho Chehab 		.input          = {{
59b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
60b285192aSMauro Carvalho Chehab 			.vmux   = 0,
61b285192aSMauro Carvalho Chehab 		}, {
62b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE2,
63b285192aSMauro Carvalho Chehab 			.vmux   = 1,
64b285192aSMauro Carvalho Chehab 		}, {
65b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE3,
66b285192aSMauro Carvalho Chehab 			.vmux   = 2,
67b285192aSMauro Carvalho Chehab 		}, {
68b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE4,
69b285192aSMauro Carvalho Chehab 			.vmux   = 3,
70b285192aSMauro Carvalho Chehab 		} },
71b285192aSMauro Carvalho Chehab 	},
72b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
73b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1800lp",
74b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
75b285192aSMauro Carvalho Chehab 		.input          = {{
76b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
77b285192aSMauro Carvalho Chehab 			.vmux   = 0,
78b285192aSMauro Carvalho Chehab 			.gpio0  = 0xff00,
79b285192aSMauro Carvalho Chehab 		}, {
80b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_DEBUG,
81b285192aSMauro Carvalho Chehab 			.vmux   = 0,
82b285192aSMauro Carvalho Chehab 			.gpio0  = 0xff01,
83b285192aSMauro Carvalho Chehab 		}, {
84b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
85b285192aSMauro Carvalho Chehab 			.vmux   = 1,
86b285192aSMauro Carvalho Chehab 			.gpio0  = 0xff02,
87b285192aSMauro Carvalho Chehab 		}, {
88b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
89b285192aSMauro Carvalho Chehab 			.vmux   = 2,
90b285192aSMauro Carvalho Chehab 			.gpio0  = 0xff02,
91b285192aSMauro Carvalho Chehab 		} },
92b285192aSMauro Carvalho Chehab 	},
93b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1800] = {
94b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1800",
95b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
96b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_ENCODER,
97b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
98b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_PHILIPS_TDA8290,
99b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x42, /* 0x84 >> 1 */
100b285192aSMauro Carvalho Chehab 		.tuner_bus	= 1,
101b285192aSMauro Carvalho Chehab 		.input          = {{
102b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
103b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
104b285192aSMauro Carvalho Chehab 					CX25840_VIN5_CH2 |
105b285192aSMauro Carvalho Chehab 					CX25840_VIN2_CH1,
106b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO8,
107b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
108b285192aSMauro Carvalho Chehab 		}, {
109b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
110b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
111b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
112b285192aSMauro Carvalho Chehab 					CX25840_VIN6_CH1,
113b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
114b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
115b285192aSMauro Carvalho Chehab 		}, {
116b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
117b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
118b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
119b285192aSMauro Carvalho Chehab 					CX25840_VIN8_CH1 |
120b285192aSMauro Carvalho Chehab 					CX25840_SVIDEO_ON,
121b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
122b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
123b285192aSMauro Carvalho Chehab 		} },
124b285192aSMauro Carvalho Chehab 	},
125b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1250] = {
126b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1250",
127b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
128b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
129b285192aSMauro Carvalho Chehab #ifdef MT2131_NO_ANALOG_SUPPORT_YET
130b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_PHILIPS_TDA8290,
131b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x42, /* 0x84 >> 1 */
132b285192aSMauro Carvalho Chehab 		.tuner_bus	= 1,
133b285192aSMauro Carvalho Chehab #endif
134b285192aSMauro Carvalho Chehab 		.force_bff	= 1,
135b285192aSMauro Carvalho Chehab 		.input          = {{
136b285192aSMauro Carvalho Chehab #ifdef MT2131_NO_ANALOG_SUPPORT_YET
137b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
138b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
139b285192aSMauro Carvalho Chehab 					CX25840_VIN5_CH2 |
140b285192aSMauro Carvalho Chehab 					CX25840_VIN2_CH1,
141b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO8,
142b285192aSMauro Carvalho Chehab 			.gpio0  = 0xff00,
143b285192aSMauro Carvalho Chehab 		}, {
144b285192aSMauro Carvalho Chehab #endif
145b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
146b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
147b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
148b285192aSMauro Carvalho Chehab 					CX25840_VIN6_CH1,
149b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
150b285192aSMauro Carvalho Chehab 			.gpio0  = 0xff02,
151b285192aSMauro Carvalho Chehab 		}, {
152b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
153b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
154b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
155b285192aSMauro Carvalho Chehab 					CX25840_VIN8_CH1 |
156b285192aSMauro Carvalho Chehab 					CX25840_SVIDEO_ON,
157b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
158b285192aSMauro Carvalho Chehab 			.gpio0  = 0xff02,
159b285192aSMauro Carvalho Chehab 		} },
160b285192aSMauro Carvalho Chehab 	},
161b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
162b285192aSMauro Carvalho Chehab 		.name		= "DViCO FusionHDTV5 Express",
163b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
164b285192aSMauro Carvalho Chehab 	},
165b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
166b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1500Q",
167b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
168b285192aSMauro Carvalho Chehab 	},
169b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1500] = {
170b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1500",
171b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
172b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
173b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_XC2028,
174b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x61, /* 0xc2 >> 1 */
175b285192aSMauro Carvalho Chehab 		.input          = {{
176b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
177b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
178b285192aSMauro Carvalho Chehab 					CX25840_VIN5_CH2 |
179b285192aSMauro Carvalho Chehab 					CX25840_VIN2_CH1,
180b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
181b285192aSMauro Carvalho Chehab 		}, {
182b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
183b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
184b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
185b285192aSMauro Carvalho Chehab 					CX25840_VIN6_CH1,
186b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
187b285192aSMauro Carvalho Chehab 		}, {
188b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
189b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
190b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
191b285192aSMauro Carvalho Chehab 					CX25840_VIN8_CH1 |
192b285192aSMauro Carvalho Chehab 					CX25840_SVIDEO_ON,
193b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
194b285192aSMauro Carvalho Chehab 		} },
195b285192aSMauro Carvalho Chehab 	},
196b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1200] = {
197b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1200",
198b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
199b285192aSMauro Carvalho Chehab 	},
200b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1700] = {
201b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1700",
202b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
203b285192aSMauro Carvalho Chehab 	},
204b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1400] = {
205b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1400",
206b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
207b285192aSMauro Carvalho Chehab 	},
208b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
209b285192aSMauro Carvalho Chehab 		.name		= "DViCO FusionHDTV7 Dual Express",
210b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
211b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
212b285192aSMauro Carvalho Chehab 	},
213b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
214b285192aSMauro Carvalho Chehab 		.name		= "DViCO FusionHDTV DVB-T Dual Express",
215b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
216b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
217b285192aSMauro Carvalho Chehab 	},
218b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
219b285192aSMauro Carvalho Chehab 		.name		= "Leadtek Winfast PxDVR3200 H",
220b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
221b285192aSMauro Carvalho Chehab 	},
222642ca1a0SAnca Emanuel 	[CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200] = {
223642ca1a0SAnca Emanuel 		.name		= "Leadtek Winfast PxPVR2200",
224642ca1a0SAnca Emanuel 		.porta		= CX23885_ANALOG_VIDEO,
225642ca1a0SAnca Emanuel 		.tuner_type	= TUNER_XC2028,
226642ca1a0SAnca Emanuel 		.tuner_addr	= 0x61,
227642ca1a0SAnca Emanuel 		.tuner_bus	= 1,
228642ca1a0SAnca Emanuel 		.input		= {{
229642ca1a0SAnca Emanuel 			.type	= CX23885_VMUX_TELEVISION,
230642ca1a0SAnca Emanuel 			.vmux	= CX25840_VIN2_CH1 |
231642ca1a0SAnca Emanuel 				  CX25840_VIN5_CH2,
232642ca1a0SAnca Emanuel 			.amux	= CX25840_AUDIO8,
233642ca1a0SAnca Emanuel 			.gpio0	= 0x704040,
234642ca1a0SAnca Emanuel 		}, {
235642ca1a0SAnca Emanuel 			.type	= CX23885_VMUX_COMPOSITE1,
236642ca1a0SAnca Emanuel 			.vmux	= CX25840_COMPOSITE1,
237642ca1a0SAnca Emanuel 			.amux	= CX25840_AUDIO7,
238642ca1a0SAnca Emanuel 			.gpio0	= 0x704040,
239642ca1a0SAnca Emanuel 		}, {
240642ca1a0SAnca Emanuel 			.type	= CX23885_VMUX_SVIDEO,
241642ca1a0SAnca Emanuel 			.vmux	= CX25840_SVIDEO_LUMA3 |
242642ca1a0SAnca Emanuel 				  CX25840_SVIDEO_CHROMA4,
243642ca1a0SAnca Emanuel 			.amux	= CX25840_AUDIO7,
244642ca1a0SAnca Emanuel 			.gpio0	= 0x704040,
245642ca1a0SAnca Emanuel 		}, {
246642ca1a0SAnca Emanuel 			.type	= CX23885_VMUX_COMPONENT,
247642ca1a0SAnca Emanuel 			.vmux	= CX25840_VIN7_CH1 |
248642ca1a0SAnca Emanuel 				  CX25840_VIN6_CH2 |
249642ca1a0SAnca Emanuel 				  CX25840_VIN8_CH3 |
250642ca1a0SAnca Emanuel 				  CX25840_COMPONENT_ON,
251642ca1a0SAnca Emanuel 			.amux	= CX25840_AUDIO7,
252642ca1a0SAnca Emanuel 			.gpio0	= 0x704040,
253642ca1a0SAnca Emanuel 		} },
254642ca1a0SAnca Emanuel 	},
255b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000] = {
256b285192aSMauro Carvalho Chehab 		.name		= "Leadtek Winfast PxDVR3200 H XC4000",
257b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
258b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
259b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_XC4000,
260b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x61,
261b285192aSMauro Carvalho Chehab 		.radio_type	= UNSET,
262b285192aSMauro Carvalho Chehab 		.radio_addr	= ADDR_UNSET,
263b285192aSMauro Carvalho Chehab 		.input		= {{
264b285192aSMauro Carvalho Chehab 			.type	= CX23885_VMUX_TELEVISION,
265b285192aSMauro Carvalho Chehab 			.vmux	= CX25840_VIN2_CH1 |
266b285192aSMauro Carvalho Chehab 				  CX25840_VIN5_CH2 |
267b285192aSMauro Carvalho Chehab 				  CX25840_NONE0_CH3,
268b285192aSMauro Carvalho Chehab 		}, {
269b285192aSMauro Carvalho Chehab 			.type	= CX23885_VMUX_COMPOSITE1,
270b285192aSMauro Carvalho Chehab 			.vmux	= CX25840_COMPOSITE1,
271b285192aSMauro Carvalho Chehab 		}, {
272b285192aSMauro Carvalho Chehab 			.type	= CX23885_VMUX_SVIDEO,
273b285192aSMauro Carvalho Chehab 			.vmux	= CX25840_SVIDEO_LUMA3 |
274b285192aSMauro Carvalho Chehab 				  CX25840_SVIDEO_CHROMA4,
275b285192aSMauro Carvalho Chehab 		}, {
276b285192aSMauro Carvalho Chehab 			.type	= CX23885_VMUX_COMPONENT,
277b285192aSMauro Carvalho Chehab 			.vmux	= CX25840_VIN7_CH1 |
278b285192aSMauro Carvalho Chehab 				  CX25840_VIN6_CH2 |
279b285192aSMauro Carvalho Chehab 				  CX25840_VIN8_CH3 |
280b285192aSMauro Carvalho Chehab 				  CX25840_COMPONENT_ON,
281b285192aSMauro Carvalho Chehab 		} },
282b285192aSMauro Carvalho Chehab 	},
283b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = {
284b285192aSMauro Carvalho Chehab 		.name		= "Compro VideoMate E650F",
285b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
286b285192aSMauro Carvalho Chehab 	},
287b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_TBS_6920] = {
288b285192aSMauro Carvalho Chehab 		.name		= "TurboSight TBS 6920",
289b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
290b285192aSMauro Carvalho Chehab 	},
291e6001482SLuis Alves 	[CX23885_BOARD_TBS_6980] = {
292e6001482SLuis Alves 		.name		= "TurboSight TBS 6980",
293e6001482SLuis Alves 		.portb		= CX23885_MPEG_DVB,
294e6001482SLuis Alves 		.portc		= CX23885_MPEG_DVB,
295e6001482SLuis Alves 	},
296e6001482SLuis Alves 	[CX23885_BOARD_TBS_6981] = {
297e6001482SLuis Alves 		.name		= "TurboSight TBS 6981",
298e6001482SLuis Alves 		.portb		= CX23885_MPEG_DVB,
299e6001482SLuis Alves 		.portc		= CX23885_MPEG_DVB,
300e6001482SLuis Alves 	},
301b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_TEVII_S470] = {
302b285192aSMauro Carvalho Chehab 		.name		= "TeVii S470",
303b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
304b285192aSMauro Carvalho Chehab 	},
305b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_DVBWORLD_2005] = {
306b285192aSMauro Carvalho Chehab 		.name		= "DVBWorld DVB-S2 2005",
307b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
308b285192aSMauro Carvalho Chehab 	},
309b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = {
310b285192aSMauro Carvalho Chehab 		.ci_type	= 1,
311b285192aSMauro Carvalho Chehab 		.name		= "NetUP Dual DVB-S2 CI",
312b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
313b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
314b285192aSMauro Carvalho Chehab 	},
315b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1270] = {
316b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1270",
317b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
318b285192aSMauro Carvalho Chehab 	},
319b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1275] = {
320b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1275",
321b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
322b285192aSMauro Carvalho Chehab 	},
323b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1255] = {
324b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1255",
325b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
326b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
327b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_ABSENT,
328b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x42, /* 0x84 >> 1 */
329b285192aSMauro Carvalho Chehab 		.force_bff	= 1,
330b285192aSMauro Carvalho Chehab 		.input          = {{
331b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
332b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
333b285192aSMauro Carvalho Chehab 					CX25840_VIN5_CH2 |
334b285192aSMauro Carvalho Chehab 					CX25840_VIN2_CH1 |
335b285192aSMauro Carvalho Chehab 					CX25840_DIF_ON,
336b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO8,
337b285192aSMauro Carvalho Chehab 		}, {
338b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
339b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
340b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
341b285192aSMauro Carvalho Chehab 					CX25840_VIN6_CH1,
342b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
343b285192aSMauro Carvalho Chehab 		}, {
344b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
345b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
346b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
347b285192aSMauro Carvalho Chehab 					CX25840_VIN8_CH1 |
348b285192aSMauro Carvalho Chehab 					CX25840_SVIDEO_ON,
349b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
350b285192aSMauro Carvalho Chehab 		} },
351b285192aSMauro Carvalho Chehab 	},
352b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1255_22111] = {
353b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1255",
354b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
355b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
356b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_ABSENT,
357b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x42, /* 0x84 >> 1 */
358b285192aSMauro Carvalho Chehab 		.force_bff	= 1,
359b285192aSMauro Carvalho Chehab 		.input          = {{
360b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
361b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
362b285192aSMauro Carvalho Chehab 					CX25840_VIN5_CH2 |
363b285192aSMauro Carvalho Chehab 					CX25840_VIN2_CH1 |
364b285192aSMauro Carvalho Chehab 					CX25840_DIF_ON,
365b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO8,
366b285192aSMauro Carvalho Chehab 		}, {
367b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
368b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
369b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
370b285192aSMauro Carvalho Chehab 					CX25840_VIN8_CH1 |
371b285192aSMauro Carvalho Chehab 					CX25840_SVIDEO_ON,
372b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
373b285192aSMauro Carvalho Chehab 		} },
374b285192aSMauro Carvalho Chehab 	},
375b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1210] = {
376b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1210",
377b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
378b285192aSMauro Carvalho Chehab 	},
379b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_MYGICA_X8506] = {
380b285192aSMauro Carvalho Chehab 		.name		= "Mygica X8506 DMB-TH",
381b285192aSMauro Carvalho Chehab 		.tuner_type = TUNER_XC5000,
382b285192aSMauro Carvalho Chehab 		.tuner_addr = 0x61,
383b285192aSMauro Carvalho Chehab 		.tuner_bus	= 1,
384b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
385b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
386b285192aSMauro Carvalho Chehab 		.input		= {
387b285192aSMauro Carvalho Chehab 			{
388b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_TELEVISION,
389b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPOSITE2,
390b285192aSMauro Carvalho Chehab 			},
391b285192aSMauro Carvalho Chehab 			{
392b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_COMPOSITE1,
393b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPOSITE8,
394b285192aSMauro Carvalho Chehab 			},
395b285192aSMauro Carvalho Chehab 			{
396b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_SVIDEO,
397b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_SVIDEO_LUMA3 |
398b285192aSMauro Carvalho Chehab 						CX25840_SVIDEO_CHROMA4,
399b285192aSMauro Carvalho Chehab 			},
400b285192aSMauro Carvalho Chehab 			{
401b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_COMPONENT,
402b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPONENT_ON |
403b285192aSMauro Carvalho Chehab 					CX25840_VIN1_CH1 |
404b285192aSMauro Carvalho Chehab 					CX25840_VIN6_CH2 |
405b285192aSMauro Carvalho Chehab 					CX25840_VIN7_CH3,
406b285192aSMauro Carvalho Chehab 			},
407b285192aSMauro Carvalho Chehab 		},
408b285192aSMauro Carvalho Chehab 	},
409b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_MAGICPRO_PROHDTVE2] = {
410b285192aSMauro Carvalho Chehab 		.name		= "Magic-Pro ProHDTV Extreme 2",
411b285192aSMauro Carvalho Chehab 		.tuner_type = TUNER_XC5000,
412b285192aSMauro Carvalho Chehab 		.tuner_addr = 0x61,
413b285192aSMauro Carvalho Chehab 		.tuner_bus	= 1,
414b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
415b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
416b285192aSMauro Carvalho Chehab 		.input		= {
417b285192aSMauro Carvalho Chehab 			{
418b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_TELEVISION,
419b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPOSITE2,
420b285192aSMauro Carvalho Chehab 			},
421b285192aSMauro Carvalho Chehab 			{
422b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_COMPOSITE1,
423b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPOSITE8,
424b285192aSMauro Carvalho Chehab 			},
425b285192aSMauro Carvalho Chehab 			{
426b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_SVIDEO,
427b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_SVIDEO_LUMA3 |
428b285192aSMauro Carvalho Chehab 						CX25840_SVIDEO_CHROMA4,
429b285192aSMauro Carvalho Chehab 			},
430b285192aSMauro Carvalho Chehab 			{
431b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_COMPONENT,
432b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPONENT_ON |
433b285192aSMauro Carvalho Chehab 					CX25840_VIN1_CH1 |
434b285192aSMauro Carvalho Chehab 					CX25840_VIN6_CH2 |
435b285192aSMauro Carvalho Chehab 					CX25840_VIN7_CH3,
436b285192aSMauro Carvalho Chehab 			},
437b285192aSMauro Carvalho Chehab 		},
438b285192aSMauro Carvalho Chehab 	},
439b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1850] = {
440b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1850",
441b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
442b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_ENCODER,
443b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
444b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_ABSENT,
445b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x42, /* 0x84 >> 1 */
446b285192aSMauro Carvalho Chehab 		.force_bff	= 1,
447b285192aSMauro Carvalho Chehab 		.input          = {{
448b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
449b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
450b285192aSMauro Carvalho Chehab 					CX25840_VIN5_CH2 |
451b285192aSMauro Carvalho Chehab 					CX25840_VIN2_CH1 |
452b285192aSMauro Carvalho Chehab 					CX25840_DIF_ON,
453b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO8,
454b285192aSMauro Carvalho Chehab 		}, {
455b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
456b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
457b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
458b285192aSMauro Carvalho Chehab 					CX25840_VIN6_CH1,
459b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
460b285192aSMauro Carvalho Chehab 		}, {
461b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
462b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
463b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
464b285192aSMauro Carvalho Chehab 					CX25840_VIN8_CH1 |
465b285192aSMauro Carvalho Chehab 					CX25840_SVIDEO_ON,
466b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
467b285192aSMauro Carvalho Chehab 		} },
468b285192aSMauro Carvalho Chehab 	},
469b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_COMPRO_VIDEOMATE_E800] = {
470b285192aSMauro Carvalho Chehab 		.name		= "Compro VideoMate E800",
471b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
472b285192aSMauro Carvalho Chehab 	},
473b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1290] = {
474b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1290",
475b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
476b285192aSMauro Carvalho Chehab 	},
477b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_MYGICA_X8558PRO] = {
478b285192aSMauro Carvalho Chehab 		.name		= "Mygica X8558 PRO DMB-TH",
479b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
480b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
481b285192aSMauro Carvalho Chehab 	},
482b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_LEADTEK_WINFAST_PXTV1200] = {
483b285192aSMauro Carvalho Chehab 		.name           = "LEADTEK WinFast PxTV1200",
484b285192aSMauro Carvalho Chehab 		.porta          = CX23885_ANALOG_VIDEO,
485b285192aSMauro Carvalho Chehab 		.tuner_type     = TUNER_XC2028,
486b285192aSMauro Carvalho Chehab 		.tuner_addr     = 0x61,
487b285192aSMauro Carvalho Chehab 		.tuner_bus	= 1,
488b285192aSMauro Carvalho Chehab 		.input          = {{
489b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
490b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_VIN2_CH1 |
491b285192aSMauro Carvalho Chehab 				  CX25840_VIN5_CH2 |
492b285192aSMauro Carvalho Chehab 				  CX25840_NONE0_CH3,
493b285192aSMauro Carvalho Chehab 		}, {
494b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
495b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_COMPOSITE1,
496b285192aSMauro Carvalho Chehab 		}, {
497b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
498b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_SVIDEO_LUMA3 |
499b285192aSMauro Carvalho Chehab 				  CX25840_SVIDEO_CHROMA4,
500b285192aSMauro Carvalho Chehab 		}, {
501b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPONENT,
502b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_VIN7_CH1 |
503b285192aSMauro Carvalho Chehab 				  CX25840_VIN6_CH2 |
504b285192aSMauro Carvalho Chehab 				  CX25840_VIN8_CH3 |
505b285192aSMauro Carvalho Chehab 				  CX25840_COMPONENT_ON,
506b285192aSMauro Carvalho Chehab 		} },
507b285192aSMauro Carvalho Chehab 	},
508b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_GOTVIEW_X5_3D_HYBRID] = {
509b285192aSMauro Carvalho Chehab 		.name		= "GoTView X5 3D Hybrid",
510b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_XC5000,
511b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x64,
512b285192aSMauro Carvalho Chehab 		.tuner_bus	= 1,
513b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
514b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
515b285192aSMauro Carvalho Chehab 		.input          = {{
516b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
517b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_VIN2_CH1 |
518b285192aSMauro Carvalho Chehab 				  CX25840_VIN5_CH2,
519b285192aSMauro Carvalho Chehab 			.gpio0	= 0x02,
520b285192aSMauro Carvalho Chehab 		}, {
521b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
522b285192aSMauro Carvalho Chehab 			.vmux   = CX23885_VMUX_COMPOSITE1,
523b285192aSMauro Carvalho Chehab 		}, {
524b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
525b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_SVIDEO_LUMA3 |
526b285192aSMauro Carvalho Chehab 				  CX25840_SVIDEO_CHROMA4,
527b285192aSMauro Carvalho Chehab 		} },
528b285192aSMauro Carvalho Chehab 	},
529b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF] = {
530b285192aSMauro Carvalho Chehab 		.ci_type	= 2,
531b285192aSMauro Carvalho Chehab 		.name		= "NetUP Dual DVB-T/C-CI RF",
532b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
533b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
534b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
535b285192aSMauro Carvalho Chehab 		.num_fds_portb	= 2,
536b285192aSMauro Carvalho Chehab 		.num_fds_portc	= 2,
537b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_XC5000,
538b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x64,
539b285192aSMauro Carvalho Chehab 		.input          = { {
540b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_TELEVISION,
541b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPOSITE1,
542b285192aSMauro Carvalho Chehab 		} },
543b285192aSMauro Carvalho Chehab 	},
544b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_MPX885] = {
545b285192aSMauro Carvalho Chehab 		.name		= "MPX-885",
546b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
547b285192aSMauro Carvalho Chehab 		.input          = {{
548b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
549b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_COMPOSITE1,
550b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO6,
551b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
552b285192aSMauro Carvalho Chehab 		}, {
553b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE2,
554b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_COMPOSITE2,
555b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO6,
556b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
557b285192aSMauro Carvalho Chehab 		}, {
558b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE3,
559b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_COMPOSITE3,
560b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
561b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
562b285192aSMauro Carvalho Chehab 		}, {
563b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE4,
564b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_COMPOSITE4,
565b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
566b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
567b285192aSMauro Carvalho Chehab 		} },
568b285192aSMauro Carvalho Chehab 	},
569b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_MYGICA_X8507] = {
5700d1b5265SMauro Carvalho Chehab 		.name		= "Mygica X8502/X8507 ISDB-T",
571b285192aSMauro Carvalho Chehab 		.tuner_type = TUNER_XC5000,
572b285192aSMauro Carvalho Chehab 		.tuner_addr = 0x61,
573b285192aSMauro Carvalho Chehab 		.tuner_bus	= 1,
574b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
5750d1b5265SMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
576b285192aSMauro Carvalho Chehab 		.input		= {
577b285192aSMauro Carvalho Chehab 			{
578b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_TELEVISION,
579b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPOSITE2,
580b285192aSMauro Carvalho Chehab 				.amux   = CX25840_AUDIO8,
581b285192aSMauro Carvalho Chehab 			},
582b285192aSMauro Carvalho Chehab 			{
583b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_COMPOSITE1,
584b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPOSITE8,
585082c0576SAlfredo Jesús Delaiti 				.amux   = CX25840_AUDIO7,
586b285192aSMauro Carvalho Chehab 			},
587b285192aSMauro Carvalho Chehab 			{
588b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_SVIDEO,
589b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_SVIDEO_LUMA3 |
590b285192aSMauro Carvalho Chehab 						CX25840_SVIDEO_CHROMA4,
591082c0576SAlfredo Jesús Delaiti 				.amux   = CX25840_AUDIO7,
592b285192aSMauro Carvalho Chehab 			},
593b285192aSMauro Carvalho Chehab 			{
594b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_COMPONENT,
595b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPONENT_ON |
596b285192aSMauro Carvalho Chehab 					CX25840_VIN1_CH1 |
597b285192aSMauro Carvalho Chehab 					CX25840_VIN6_CH2 |
598b285192aSMauro Carvalho Chehab 					CX25840_VIN7_CH3,
599082c0576SAlfredo Jesús Delaiti 				.amux   = CX25840_AUDIO7,
600b285192aSMauro Carvalho Chehab 			},
601b285192aSMauro Carvalho Chehab 		},
602b285192aSMauro Carvalho Chehab 	},
603b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL] = {
604b285192aSMauro Carvalho Chehab 		.name		= "TerraTec Cinergy T PCIe Dual",
605b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
606b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
607b285192aSMauro Carvalho Chehab 	},
608b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_TEVII_S471] = {
609b285192aSMauro Carvalho Chehab 		.name		= "TeVii S471",
610b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
611f667190bSMariusz Bia?o?czyk 	},
612f667190bSMariusz Bia?o?czyk 	[CX23885_BOARD_PROF_8000] = {
613f667190bSMariusz Bia?o?czyk 		.name		= "Prof Revolution DVB-S2 8000",
614f667190bSMariusz Bia?o?czyk 		.portb		= CX23885_MPEG_DVB,
6157c62f5a1SMichael Krufky 	},
6167c62f5a1SMichael Krufky 	[CX23885_BOARD_HAUPPAUGE_HVR4400] = {
617721f3223SMatthias Schwarzott 		.name		= "Hauppauge WinTV-HVR4400/HVR5500",
61836efec48SMatthias Schwarzott 		.porta		= CX23885_ANALOG_VIDEO,
6197c62f5a1SMichael Krufky 		.portb		= CX23885_MPEG_DVB,
62036efec48SMatthias Schwarzott 		.portc		= CX23885_MPEG_DVB,
62136efec48SMatthias Schwarzott 		.tuner_type	= TUNER_NXP_TDA18271,
62236efec48SMatthias Schwarzott 		.tuner_addr	= 0x60, /* 0xc0 >> 1 */
62336efec48SMatthias Schwarzott 		.tuner_bus	= 1,
6247c62f5a1SMichael Krufky 	},
625721f3223SMatthias Schwarzott 	[CX23885_BOARD_HAUPPAUGE_STARBURST] = {
626721f3223SMatthias Schwarzott 		.name		= "Hauppauge WinTV Starburst",
627721f3223SMatthias Schwarzott 		.portb		= CX23885_MPEG_DVB,
628721f3223SMatthias Schwarzott 	},
629e8d42373SOleh Kravchenko 	[CX23885_BOARD_AVERMEDIA_HC81R] = {
630e8d42373SOleh Kravchenko 		.name		= "AVerTV Hybrid Express Slim HC81R",
631e8d42373SOleh Kravchenko 		.tuner_type	= TUNER_XC2028,
632e8d42373SOleh Kravchenko 		.tuner_addr	= 0x61, /* 0xc2 >> 1 */
633e8d42373SOleh Kravchenko 		.tuner_bus	= 1,
634e8d42373SOleh Kravchenko 		.porta		= CX23885_ANALOG_VIDEO,
635e8d42373SOleh Kravchenko 		.input          = {{
636e8d42373SOleh Kravchenko 			.type   = CX23885_VMUX_TELEVISION,
637e8d42373SOleh Kravchenko 			.vmux   = CX25840_VIN2_CH1 |
638e8d42373SOleh Kravchenko 				  CX25840_VIN5_CH2 |
639e8d42373SOleh Kravchenko 				  CX25840_NONE0_CH3 |
640e8d42373SOleh Kravchenko 				  CX25840_NONE1_CH3,
641e8d42373SOleh Kravchenko 			.amux   = CX25840_AUDIO8,
642e8d42373SOleh Kravchenko 		}, {
643e8d42373SOleh Kravchenko 			.type   = CX23885_VMUX_SVIDEO,
644e8d42373SOleh Kravchenko 			.vmux   = CX25840_VIN8_CH1 |
645e8d42373SOleh Kravchenko 				  CX25840_NONE_CH2 |
646e8d42373SOleh Kravchenko 				  CX25840_VIN7_CH3 |
647e8d42373SOleh Kravchenko 				  CX25840_SVIDEO_ON,
648e8d42373SOleh Kravchenko 			.amux   = CX25840_AUDIO6,
649e8d42373SOleh Kravchenko 		}, {
650e8d42373SOleh Kravchenko 			.type   = CX23885_VMUX_COMPONENT,
651e8d42373SOleh Kravchenko 			.vmux   = CX25840_VIN1_CH1 |
652e8d42373SOleh Kravchenko 				  CX25840_NONE_CH2 |
653e8d42373SOleh Kravchenko 				  CX25840_NONE0_CH3 |
654e8d42373SOleh Kravchenko 				  CX25840_NONE1_CH3,
655e8d42373SOleh Kravchenko 			.amux   = CX25840_AUDIO6,
656e8d42373SOleh Kravchenko 		} },
657cce11b09SHans Verkuil 	},
65846b21bbaSJames Harper 	[CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2] = {
65946b21bbaSJames Harper 		.name		= "DViCO FusionHDTV DVB-T Dual Express2",
66046b21bbaSJames Harper 		.portb		= CX23885_MPEG_DVB,
66146b21bbaSJames Harper 		.portc		= CX23885_MPEG_DVB,
66246b21bbaSJames Harper 	},
663cce11b09SHans Verkuil 	[CX23885_BOARD_HAUPPAUGE_IMPACTVCBE] = {
664cce11b09SHans Verkuil 		.name		= "Hauppauge ImpactVCB-e",
665cce11b09SHans Verkuil 		.tuner_type	= TUNER_ABSENT,
666cce11b09SHans Verkuil 		.porta		= CX23885_ANALOG_VIDEO,
667cce11b09SHans Verkuil 		.input          = {{
668cce11b09SHans Verkuil 			.type   = CX23885_VMUX_COMPOSITE1,
669cce11b09SHans Verkuil 			.vmux   = CX25840_VIN7_CH3 |
670cce11b09SHans Verkuil 				  CX25840_VIN4_CH2 |
671cce11b09SHans Verkuil 				  CX25840_VIN6_CH1,
672cce11b09SHans Verkuil 			.amux   = CX25840_AUDIO7,
673cce11b09SHans Verkuil 		}, {
674cce11b09SHans Verkuil 			.type   = CX23885_VMUX_SVIDEO,
675cce11b09SHans Verkuil 			.vmux   = CX25840_VIN7_CH3 |
676cce11b09SHans Verkuil 				  CX25840_VIN4_CH2 |
677cce11b09SHans Verkuil 				  CX25840_VIN8_CH1 |
678cce11b09SHans Verkuil 				  CX25840_SVIDEO_ON,
679cce11b09SHans Verkuil 			.amux   = CX25840_AUDIO7,
680cce11b09SHans Verkuil 		} },
681cce11b09SHans Verkuil 	},
68229442266SOlli Salonen 	[CX23885_BOARD_DVBSKY_T9580] = {
68329442266SOlli Salonen 		.name		= "DVBSky T9580",
68429442266SOlli Salonen 		.portb		= CX23885_MPEG_DVB,
68529442266SOlli Salonen 		.portc		= CX23885_MPEG_DVB,
68629442266SOlli Salonen 	},
68782c10276SOlli Salonen 	[CX23885_BOARD_DVBSKY_T980C] = {
68882c10276SOlli Salonen 		.name		= "DVBSky T980C",
68982c10276SOlli Salonen 		.portb		= CX23885_MPEG_DVB,
69082c10276SOlli Salonen 	},
6910e6c7b01Snibble.max 	[CX23885_BOARD_DVBSKY_S950C] = {
6920e6c7b01Snibble.max 		.name		= "DVBSky S950C",
6930e6c7b01Snibble.max 		.portb		= CX23885_MPEG_DVB,
6940e6c7b01Snibble.max 	},
69561b103e8SOlli Salonen 	[CX23885_BOARD_TT_CT2_4500_CI] = {
69661b103e8SOlli Salonen 		.name		= "Technotrend TT-budget CT2-4500 CI",
69761b103e8SOlli Salonen 		.portb		= CX23885_MPEG_DVB,
69861b103e8SOlli Salonen 	},
699cba5480cSnibble.max 	[CX23885_BOARD_DVBSKY_S950] = {
700cba5480cSnibble.max 		.name		= "DVBSky S950",
701cba5480cSnibble.max 		.portb		= CX23885_MPEG_DVB,
702cba5480cSnibble.max 	},
703c29d6a83Snibble.max 	[CX23885_BOARD_DVBSKY_S952] = {
704c29d6a83Snibble.max 		.name		= "DVBSky S952",
705c29d6a83Snibble.max 		.portb		= CX23885_MPEG_DVB,
706c29d6a83Snibble.max 		.portc		= CX23885_MPEG_DVB,
707c29d6a83Snibble.max 	},
708c02ef64aSNibble Max 	[CX23885_BOARD_DVBSKY_T982] = {
709c02ef64aSNibble Max 		.name		= "DVBSky T982",
710c02ef64aSNibble Max 		.portb		= CX23885_MPEG_DVB,
711c02ef64aSNibble Max 		.portc		= CX23885_MPEG_DVB,
712c02ef64aSNibble Max 	},
713b285192aSMauro Carvalho Chehab };
714b285192aSMauro Carvalho Chehab const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
715b285192aSMauro Carvalho Chehab 
716b285192aSMauro Carvalho Chehab /* ------------------------------------------------------------------ */
717b285192aSMauro Carvalho Chehab /* PCI subsystem IDs                                                  */
718b285192aSMauro Carvalho Chehab 
719b285192aSMauro Carvalho Chehab struct cx23885_subid cx23885_subids[] = {
720b285192aSMauro Carvalho Chehab 	{
721b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
722b285192aSMauro Carvalho Chehab 		.subdevice = 0x3400,
723b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_UNKNOWN,
724b285192aSMauro Carvalho Chehab 	}, {
725b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
726b285192aSMauro Carvalho Chehab 		.subdevice = 0x7600,
727b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
728b285192aSMauro Carvalho Chehab 	}, {
729b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
730b285192aSMauro Carvalho Chehab 		.subdevice = 0x7800,
731b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1800,
732b285192aSMauro Carvalho Chehab 	}, {
733b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
734b285192aSMauro Carvalho Chehab 		.subdevice = 0x7801,
735b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1800,
736b285192aSMauro Carvalho Chehab 	}, {
737b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
738b285192aSMauro Carvalho Chehab 		.subdevice = 0x7809,
739b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1800,
740b285192aSMauro Carvalho Chehab 	}, {
741b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
742b285192aSMauro Carvalho Chehab 		.subdevice = 0x7911,
743b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1250,
744b285192aSMauro Carvalho Chehab 	}, {
745b285192aSMauro Carvalho Chehab 		.subvendor = 0x18ac,
746b285192aSMauro Carvalho Chehab 		.subdevice = 0xd500,
747b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
748b285192aSMauro Carvalho Chehab 	}, {
749b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
750b285192aSMauro Carvalho Chehab 		.subdevice = 0x7790,
751b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
752b285192aSMauro Carvalho Chehab 	}, {
753b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
754b285192aSMauro Carvalho Chehab 		.subdevice = 0x7797,
755b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
756b285192aSMauro Carvalho Chehab 	}, {
757b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
758b285192aSMauro Carvalho Chehab 		.subdevice = 0x7710,
759b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1500,
760b285192aSMauro Carvalho Chehab 	}, {
761b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
762b285192aSMauro Carvalho Chehab 		.subdevice = 0x7717,
763b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1500,
764b285192aSMauro Carvalho Chehab 	}, {
765b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
766b285192aSMauro Carvalho Chehab 		.subdevice = 0x71d1,
767b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1200,
768b285192aSMauro Carvalho Chehab 	}, {
769b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
770b285192aSMauro Carvalho Chehab 		.subdevice = 0x71d3,
771b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1200,
772b285192aSMauro Carvalho Chehab 	}, {
773b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
774b285192aSMauro Carvalho Chehab 		.subdevice = 0x8101,
775b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1700,
776b285192aSMauro Carvalho Chehab 	}, {
777b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
778b285192aSMauro Carvalho Chehab 		.subdevice = 0x8010,
779b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1400,
780b285192aSMauro Carvalho Chehab 	}, {
781b285192aSMauro Carvalho Chehab 		.subvendor = 0x18ac,
782b285192aSMauro Carvalho Chehab 		.subdevice = 0xd618,
783b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
784b285192aSMauro Carvalho Chehab 	}, {
785b285192aSMauro Carvalho Chehab 		.subvendor = 0x18ac,
786b285192aSMauro Carvalho Chehab 		.subdevice = 0xdb78,
787b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
788b285192aSMauro Carvalho Chehab 	}, {
789b285192aSMauro Carvalho Chehab 		.subvendor = 0x107d,
790b285192aSMauro Carvalho Chehab 		.subdevice = 0x6681,
791b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
792b285192aSMauro Carvalho Chehab 	}, {
793b285192aSMauro Carvalho Chehab 		.subvendor = 0x107d,
794642ca1a0SAnca Emanuel 		.subdevice = 0x6f21,
795642ca1a0SAnca Emanuel 		.card      = CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200,
796642ca1a0SAnca Emanuel 	}, {
797642ca1a0SAnca Emanuel 		.subvendor = 0x107d,
798b285192aSMauro Carvalho Chehab 		.subdevice = 0x6f39,
799b285192aSMauro Carvalho Chehab 		.card	   = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000,
800b285192aSMauro Carvalho Chehab 	}, {
801b285192aSMauro Carvalho Chehab 		.subvendor = 0x185b,
802b285192aSMauro Carvalho Chehab 		.subdevice = 0xe800,
803b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_COMPRO_VIDEOMATE_E650F,
804b285192aSMauro Carvalho Chehab 	}, {
805b285192aSMauro Carvalho Chehab 		.subvendor = 0x6920,
806b285192aSMauro Carvalho Chehab 		.subdevice = 0x8888,
807b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_TBS_6920,
808b285192aSMauro Carvalho Chehab 	}, {
809e6001482SLuis Alves 		.subvendor = 0x6980,
810e6001482SLuis Alves 		.subdevice = 0x8888,
811e6001482SLuis Alves 		.card      = CX23885_BOARD_TBS_6980,
812e6001482SLuis Alves 	}, {
813e6001482SLuis Alves 		.subvendor = 0x6981,
814e6001482SLuis Alves 		.subdevice = 0x8888,
815e6001482SLuis Alves 		.card      = CX23885_BOARD_TBS_6981,
816e6001482SLuis Alves 	}, {
817b285192aSMauro Carvalho Chehab 		.subvendor = 0xd470,
818b285192aSMauro Carvalho Chehab 		.subdevice = 0x9022,
819b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_TEVII_S470,
820b285192aSMauro Carvalho Chehab 	}, {
821b285192aSMauro Carvalho Chehab 		.subvendor = 0x0001,
822b285192aSMauro Carvalho Chehab 		.subdevice = 0x2005,
823b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_DVBWORLD_2005,
824b285192aSMauro Carvalho Chehab 	}, {
825b285192aSMauro Carvalho Chehab 		.subvendor = 0x1b55,
826b285192aSMauro Carvalho Chehab 		.subdevice = 0x2a2c,
827b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_NETUP_DUAL_DVBS2_CI,
828b285192aSMauro Carvalho Chehab 	}, {
829b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
830b285192aSMauro Carvalho Chehab 		.subdevice = 0x2211,
831b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1270,
832b285192aSMauro Carvalho Chehab 	}, {
833b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
834b285192aSMauro Carvalho Chehab 		.subdevice = 0x2215,
835b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1275,
836b285192aSMauro Carvalho Chehab 	}, {
837b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
838b285192aSMauro Carvalho Chehab 		.subdevice = 0x221d,
839b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1275,
840b285192aSMauro Carvalho Chehab 	}, {
841b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
842b285192aSMauro Carvalho Chehab 		.subdevice = 0x2251,
843b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1255,
844b285192aSMauro Carvalho Chehab 	}, {
845b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
846b285192aSMauro Carvalho Chehab 		.subdevice = 0x2259,
847b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1255_22111,
848b285192aSMauro Carvalho Chehab 	}, {
849b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
850b285192aSMauro Carvalho Chehab 		.subdevice = 0x2291,
851b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210,
852b285192aSMauro Carvalho Chehab 	}, {
853b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
854b285192aSMauro Carvalho Chehab 		.subdevice = 0x2295,
855b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210,
856b285192aSMauro Carvalho Chehab 	}, {
857b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
858b285192aSMauro Carvalho Chehab 		.subdevice = 0x2299,
859b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210,
860b285192aSMauro Carvalho Chehab 	}, {
861b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
862b285192aSMauro Carvalho Chehab 		.subdevice = 0x229d,
863b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
864b285192aSMauro Carvalho Chehab 	}, {
865b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
866b285192aSMauro Carvalho Chehab 		.subdevice = 0x22f0,
867b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210,
868b285192aSMauro Carvalho Chehab 	}, {
869b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
870b285192aSMauro Carvalho Chehab 		.subdevice = 0x22f1,
871b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1255,
872b285192aSMauro Carvalho Chehab 	}, {
873b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
874b285192aSMauro Carvalho Chehab 		.subdevice = 0x22f2,
875b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1275,
876b285192aSMauro Carvalho Chehab 	}, {
877b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
878b285192aSMauro Carvalho Chehab 		.subdevice = 0x22f3,
879b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
880b285192aSMauro Carvalho Chehab 	}, {
881b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
882b285192aSMauro Carvalho Chehab 		.subdevice = 0x22f4,
883b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210,
884b285192aSMauro Carvalho Chehab 	}, {
885b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
886b285192aSMauro Carvalho Chehab 		.subdevice = 0x22f5,
887b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
888b285192aSMauro Carvalho Chehab 	}, {
889b285192aSMauro Carvalho Chehab 		.subvendor = 0x14f1,
890b285192aSMauro Carvalho Chehab 		.subdevice = 0x8651,
891b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_MYGICA_X8506,
892b285192aSMauro Carvalho Chehab 	}, {
893b285192aSMauro Carvalho Chehab 		.subvendor = 0x14f1,
894b285192aSMauro Carvalho Chehab 		.subdevice = 0x8657,
895b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_MAGICPRO_PROHDTVE2,
896b285192aSMauro Carvalho Chehab 	}, {
897b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
898b285192aSMauro Carvalho Chehab 		.subdevice = 0x8541,
899b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1850,
900b285192aSMauro Carvalho Chehab 	}, {
901b285192aSMauro Carvalho Chehab 		.subvendor = 0x1858,
902b285192aSMauro Carvalho Chehab 		.subdevice = 0xe800,
903b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_COMPRO_VIDEOMATE_E800,
904b285192aSMauro Carvalho Chehab 	}, {
905b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
906b285192aSMauro Carvalho Chehab 		.subdevice = 0x8551,
907b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1290,
908b285192aSMauro Carvalho Chehab 	}, {
909b285192aSMauro Carvalho Chehab 		.subvendor = 0x14f1,
910b285192aSMauro Carvalho Chehab 		.subdevice = 0x8578,
911b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_MYGICA_X8558PRO,
912b285192aSMauro Carvalho Chehab 	}, {
913b285192aSMauro Carvalho Chehab 		.subvendor = 0x107d,
914b285192aSMauro Carvalho Chehab 		.subdevice = 0x6f22,
915b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_LEADTEK_WINFAST_PXTV1200,
916b285192aSMauro Carvalho Chehab 	}, {
917b285192aSMauro Carvalho Chehab 		.subvendor = 0x5654,
918b285192aSMauro Carvalho Chehab 		.subdevice = 0x2390,
919b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_GOTVIEW_X5_3D_HYBRID,
920b285192aSMauro Carvalho Chehab 	}, {
921b285192aSMauro Carvalho Chehab 		.subvendor = 0x1b55,
922b285192aSMauro Carvalho Chehab 		.subdevice = 0xe2e4,
923b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF,
924b285192aSMauro Carvalho Chehab 	}, {
925b285192aSMauro Carvalho Chehab 		.subvendor = 0x14f1,
926b285192aSMauro Carvalho Chehab 		.subdevice = 0x8502,
927b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_MYGICA_X8507,
928b285192aSMauro Carvalho Chehab 	}, {
929b285192aSMauro Carvalho Chehab 		.subvendor = 0x153b,
930b285192aSMauro Carvalho Chehab 		.subdevice = 0x117e,
931b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL,
932b285192aSMauro Carvalho Chehab 	}, {
933b285192aSMauro Carvalho Chehab 		.subvendor = 0xd471,
934b285192aSMauro Carvalho Chehab 		.subdevice = 0x9022,
935b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_TEVII_S471,
936f667190bSMariusz Bia?o?czyk 	}, {
937f667190bSMariusz Bia?o?czyk 		.subvendor = 0x8000,
938f667190bSMariusz Bia?o?czyk 		.subdevice = 0x3034,
939f667190bSMariusz Bia?o?czyk 		.card      = CX23885_BOARD_PROF_8000,
9407c62f5a1SMichael Krufky 	}, {
9417c62f5a1SMichael Krufky 		.subvendor = 0x0070,
9427c62f5a1SMichael Krufky 		.subdevice = 0xc108,
943721f3223SMatthias Schwarzott 		.card      = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-4400 (Model 121xxx, Hybrid DVB-T/S2, IR) */
9447c62f5a1SMichael Krufky 	}, {
9457c62f5a1SMichael Krufky 		.subvendor = 0x0070,
9467c62f5a1SMichael Krufky 		.subdevice = 0xc138,
947721f3223SMatthias Schwarzott 		.card      = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-5500 (Model 121xxx, Hybrid DVB-T/C/S2, IR) */
9487c62f5a1SMichael Krufky 	}, {
9497c62f5a1SMichael Krufky 		.subvendor = 0x0070,
9507c62f5a1SMichael Krufky 		.subdevice = 0xc12a,
951721f3223SMatthias Schwarzott 		.card      = CX23885_BOARD_HAUPPAUGE_STARBURST, /* Hauppauge WinTV Starburst (Model 121x00, DVB-S2, IR) */
9527c62f5a1SMichael Krufky 	}, {
9537c62f5a1SMichael Krufky 		.subvendor = 0x0070,
9547c62f5a1SMichael Krufky 		.subdevice = 0xc1f8,
955721f3223SMatthias Schwarzott 		.card      = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-5500 (Model 121xxx, Hybrid DVB-T/C/S2, IR) */
956e8d42373SOleh Kravchenko 	}, {
957e8d42373SOleh Kravchenko 		.subvendor = 0x1461,
958e8d42373SOleh Kravchenko 		.subdevice = 0xd939,
959e8d42373SOleh Kravchenko 		.card      = CX23885_BOARD_AVERMEDIA_HC81R,
960cce11b09SHans Verkuil 	}, {
961cce11b09SHans Verkuil 		.subvendor = 0x0070,
962cce11b09SHans Verkuil 		.subdevice = 0x7133,
963cce11b09SHans Verkuil 		.card      = CX23885_BOARD_HAUPPAUGE_IMPACTVCBE,
96446b21bbaSJames Harper 	}, {
96546b21bbaSJames Harper 		.subvendor = 0x18ac,
96646b21bbaSJames Harper 		.subdevice = 0xdb98,
96746b21bbaSJames Harper 		.card      = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2,
96829442266SOlli Salonen 	}, {
96929442266SOlli Salonen 		.subvendor = 0x4254,
97029442266SOlli Salonen 		.subdevice = 0x9580,
97129442266SOlli Salonen 		.card      = CX23885_BOARD_DVBSKY_T9580,
97282c10276SOlli Salonen 	}, {
97382c10276SOlli Salonen 		.subvendor = 0x4254,
97482c10276SOlli Salonen 		.subdevice = 0x980c,
97582c10276SOlli Salonen 		.card      = CX23885_BOARD_DVBSKY_T980C,
9760e6c7b01Snibble.max 	}, {
9770e6c7b01Snibble.max 		.subvendor = 0x4254,
9780e6c7b01Snibble.max 		.subdevice = 0x950c,
9790e6c7b01Snibble.max 		.card      = CX23885_BOARD_DVBSKY_S950C,
98061b103e8SOlli Salonen 	}, {
98161b103e8SOlli Salonen 		.subvendor = 0x13c2,
98261b103e8SOlli Salonen 		.subdevice = 0x3013,
98361b103e8SOlli Salonen 		.card      = CX23885_BOARD_TT_CT2_4500_CI,
984cba5480cSnibble.max 	}, {
985cba5480cSnibble.max 		.subvendor = 0x4254,
986cba5480cSnibble.max 		.subdevice = 0x0950,
987cba5480cSnibble.max 		.card      = CX23885_BOARD_DVBSKY_S950,
988c29d6a83Snibble.max 	}, {
989c29d6a83Snibble.max 		.subvendor = 0x4254,
990c29d6a83Snibble.max 		.subdevice = 0x0952,
991c29d6a83Snibble.max 		.card      = CX23885_BOARD_DVBSKY_S952,
992c02ef64aSNibble Max 	}, {
993c02ef64aSNibble Max 		.subvendor = 0x4254,
994c02ef64aSNibble Max 		.subdevice = 0x0982,
995c02ef64aSNibble Max 		.card      = CX23885_BOARD_DVBSKY_T982,
996b285192aSMauro Carvalho Chehab 	},
997b285192aSMauro Carvalho Chehab };
998b285192aSMauro Carvalho Chehab const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
999b285192aSMauro Carvalho Chehab 
1000b285192aSMauro Carvalho Chehab void cx23885_card_list(struct cx23885_dev *dev)
1001b285192aSMauro Carvalho Chehab {
1002b285192aSMauro Carvalho Chehab 	int i;
1003b285192aSMauro Carvalho Chehab 
1004b285192aSMauro Carvalho Chehab 	if (0 == dev->pci->subsystem_vendor &&
1005b285192aSMauro Carvalho Chehab 	    0 == dev->pci->subsystem_device) {
1006b285192aSMauro Carvalho Chehab 		printk(KERN_INFO
1007b285192aSMauro Carvalho Chehab 			"%s: Board has no valid PCIe Subsystem ID and can't\n"
1008b285192aSMauro Carvalho Chehab 		       "%s: be autodetected. Pass card=<n> insmod option\n"
1009b285192aSMauro Carvalho Chehab 		       "%s: to workaround that. Redirect complaints to the\n"
1010b285192aSMauro Carvalho Chehab 		       "%s: vendor of the TV card.  Best regards,\n"
1011b285192aSMauro Carvalho Chehab 		       "%s:         -- tux\n",
1012b285192aSMauro Carvalho Chehab 		       dev->name, dev->name, dev->name, dev->name, dev->name);
1013b285192aSMauro Carvalho Chehab 	} else {
1014b285192aSMauro Carvalho Chehab 		printk(KERN_INFO
1015b285192aSMauro Carvalho Chehab 			"%s: Your board isn't known (yet) to the driver.\n"
1016b285192aSMauro Carvalho Chehab 		       "%s: Try to pick one of the existing card configs via\n"
1017b285192aSMauro Carvalho Chehab 		       "%s: card=<n> insmod option.  Updating to the latest\n"
1018b285192aSMauro Carvalho Chehab 		       "%s: version might help as well.\n",
1019b285192aSMauro Carvalho Chehab 		       dev->name, dev->name, dev->name, dev->name);
1020b285192aSMauro Carvalho Chehab 	}
1021b285192aSMauro Carvalho Chehab 	printk(KERN_INFO "%s: Here is a list of valid choices for the card=<n> insmod option:\n",
1022b285192aSMauro Carvalho Chehab 	       dev->name);
1023b285192aSMauro Carvalho Chehab 	for (i = 0; i < cx23885_bcount; i++)
1024b285192aSMauro Carvalho Chehab 		printk(KERN_INFO "%s:    card=%d -> %s\n",
1025b285192aSMauro Carvalho Chehab 		       dev->name, i, cx23885_boards[i].name);
1026b285192aSMauro Carvalho Chehab }
1027b285192aSMauro Carvalho Chehab 
1028b285192aSMauro Carvalho Chehab static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
1029b285192aSMauro Carvalho Chehab {
1030b285192aSMauro Carvalho Chehab 	struct tveeprom tv;
1031b285192aSMauro Carvalho Chehab 
1032b285192aSMauro Carvalho Chehab 	tveeprom_hauppauge_analog(&dev->i2c_bus[0].i2c_client, &tv,
1033b285192aSMauro Carvalho Chehab 		eeprom_data);
1034b285192aSMauro Carvalho Chehab 
1035b285192aSMauro Carvalho Chehab 	/* Make sure we support the board model */
1036b285192aSMauro Carvalho Chehab 	switch (tv.model) {
1037b285192aSMauro Carvalho Chehab 	case 22001:
1038b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1270 (PCIe, Retail, half height)
1039b285192aSMauro Carvalho Chehab 		 * ATSC/QAM and basic analog, IR Blast */
1040b285192aSMauro Carvalho Chehab 	case 22009:
1041b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1210 (PCIe, Retail, half height)
1042b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog, IR Blast */
1043b285192aSMauro Carvalho Chehab 	case 22011:
1044b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1270 (PCIe, Retail, half height)
1045b285192aSMauro Carvalho Chehab 		 * ATSC/QAM and basic analog, IR Recv */
1046b285192aSMauro Carvalho Chehab 	case 22019:
1047b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1210 (PCIe, Retail, half height)
1048b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog, IR Recv */
1049b285192aSMauro Carvalho Chehab 	case 22021:
1050b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1275 (PCIe, Retail, half height)
1051b285192aSMauro Carvalho Chehab 		 * ATSC/QAM and basic analog, IR Recv */
1052b285192aSMauro Carvalho Chehab 	case 22029:
1053b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1210 (PCIe, Retail, half height)
1054b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog, IR Recv */
1055b285192aSMauro Carvalho Chehab 	case 22101:
1056b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1270 (PCIe, Retail, full height)
1057b285192aSMauro Carvalho Chehab 		 * ATSC/QAM and basic analog, IR Blast */
1058b285192aSMauro Carvalho Chehab 	case 22109:
1059b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1210 (PCIe, Retail, full height)
1060b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog, IR Blast */
1061b285192aSMauro Carvalho Chehab 	case 22111:
1062b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1270 (PCIe, Retail, full height)
1063b285192aSMauro Carvalho Chehab 		 * ATSC/QAM and basic analog, IR Recv */
1064b285192aSMauro Carvalho Chehab 	case 22119:
1065b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1210 (PCIe, Retail, full height)
1066b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog, IR Recv */
1067b285192aSMauro Carvalho Chehab 	case 22121:
1068b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1275 (PCIe, Retail, full height)
1069b285192aSMauro Carvalho Chehab 		 * ATSC/QAM and basic analog, IR Recv */
1070b285192aSMauro Carvalho Chehab 	case 22129:
1071b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1210 (PCIe, Retail, full height)
1072b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog, IR Recv */
1073b285192aSMauro Carvalho Chehab 	case 71009:
1074b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, Retail, full height)
1075b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
1076cce11b09SHans Verkuil 	case 71100:
1077cce11b09SHans Verkuil 		/* WinTV-ImpactVCB-e (PCIe, Retail, half height)
1078cce11b09SHans Verkuil 		 * Basic analog */
1079b285192aSMauro Carvalho Chehab 	case 71359:
1080b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, OEM, half height)
1081b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
1082b285192aSMauro Carvalho Chehab 	case 71439:
1083b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, OEM, half height)
1084b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
1085b285192aSMauro Carvalho Chehab 	case 71449:
1086b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, OEM, full height)
1087b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
1088b285192aSMauro Carvalho Chehab 	case 71939:
1089b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, OEM, half height)
1090b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
1091b285192aSMauro Carvalho Chehab 	case 71949:
1092b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, OEM, full height)
1093b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
1094b285192aSMauro Carvalho Chehab 	case 71959:
1095b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, OEM, full height)
1096b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
1097b285192aSMauro Carvalho Chehab 	case 71979:
1098b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, OEM, half height)
1099b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
1100b285192aSMauro Carvalho Chehab 	case 71999:
1101b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, OEM, full height)
1102b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
1103b285192aSMauro Carvalho Chehab 	case 76601:
1104b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
1105b285192aSMauro Carvalho Chehab 			channel ATSC and MPEG2 HW Encoder */
1106b285192aSMauro Carvalho Chehab 	case 77001:
1107b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
1108b285192aSMauro Carvalho Chehab 			and Basic analog */
1109b285192aSMauro Carvalho Chehab 	case 77011:
1110b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
1111b285192aSMauro Carvalho Chehab 			and Basic analog */
1112b285192aSMauro Carvalho Chehab 	case 77041:
1113b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
1114b285192aSMauro Carvalho Chehab 			and Basic analog */
1115b285192aSMauro Carvalho Chehab 	case 77051:
1116b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
1117b285192aSMauro Carvalho Chehab 			and Basic analog */
1118b285192aSMauro Carvalho Chehab 	case 78011:
1119b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
1120b285192aSMauro Carvalho Chehab 			Dual channel ATSC and MPEG2 HW Encoder */
1121b285192aSMauro Carvalho Chehab 	case 78501:
1122b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
1123b285192aSMauro Carvalho Chehab 			Dual channel ATSC and MPEG2 HW Encoder */
1124b285192aSMauro Carvalho Chehab 	case 78521:
1125b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
1126b285192aSMauro Carvalho Chehab 			Dual channel ATSC and MPEG2 HW Encoder */
1127b285192aSMauro Carvalho Chehab 	case 78531:
1128b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
1129b285192aSMauro Carvalho Chehab 			Dual channel ATSC and MPEG2 HW Encoder */
1130b285192aSMauro Carvalho Chehab 	case 78631:
1131b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
1132b285192aSMauro Carvalho Chehab 			Dual channel ATSC and MPEG2 HW Encoder */
1133b285192aSMauro Carvalho Chehab 	case 79001:
1134b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1250 (PCIe, Retail, IR, full height,
1135b285192aSMauro Carvalho Chehab 			ATSC and Basic analog */
1136b285192aSMauro Carvalho Chehab 	case 79101:
1137b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1250 (PCIe, Retail, IR, half height,
1138b285192aSMauro Carvalho Chehab 			ATSC and Basic analog */
1139b285192aSMauro Carvalho Chehab 	case 79501:
1140b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1250 (PCIe, No IR, half height,
1141b285192aSMauro Carvalho Chehab 			ATSC [at least] and Basic analog) */
1142b285192aSMauro Carvalho Chehab 	case 79561:
1143b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
1144b285192aSMauro Carvalho Chehab 			ATSC and Basic analog */
1145b285192aSMauro Carvalho Chehab 	case 79571:
1146b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
1147b285192aSMauro Carvalho Chehab 		 ATSC and Basic analog */
1148b285192aSMauro Carvalho Chehab 	case 79671:
1149b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
1150b285192aSMauro Carvalho Chehab 			ATSC and Basic analog */
1151b285192aSMauro Carvalho Chehab 	case 80019:
1152b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1400 (Express Card, Retail, IR,
1153b285192aSMauro Carvalho Chehab 		 * DVB-T and Basic analog */
1154b285192aSMauro Carvalho Chehab 	case 81509:
1155b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
1156b285192aSMauro Carvalho Chehab 		 * DVB-T and MPEG2 HW Encoder */
1157b285192aSMauro Carvalho Chehab 	case 81519:
1158b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
1159b285192aSMauro Carvalho Chehab 		 * DVB-T and MPEG2 HW Encoder */
1160b285192aSMauro Carvalho Chehab 		break;
1161b285192aSMauro Carvalho Chehab 	case 85021:
1162b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1850 (PCIe, Retail, 3.5mm in, IR, FM,
1163b285192aSMauro Carvalho Chehab 			Dual channel ATSC and MPEG2 HW Encoder */
1164b285192aSMauro Carvalho Chehab 		break;
1165b285192aSMauro Carvalho Chehab 	case 85721:
1166b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1290 (PCIe, OEM, RCA in, IR,
1167b285192aSMauro Carvalho Chehab 			Dual channel ATSC and Basic analog */
1168b285192aSMauro Carvalho Chehab 		break;
1169b285192aSMauro Carvalho Chehab 	default:
1170b285192aSMauro Carvalho Chehab 		printk(KERN_WARNING "%s: warning: "
1171b285192aSMauro Carvalho Chehab 			"unknown hauppauge model #%d\n",
1172b285192aSMauro Carvalho Chehab 			dev->name, tv.model);
1173b285192aSMauro Carvalho Chehab 		break;
1174b285192aSMauro Carvalho Chehab 	}
1175b285192aSMauro Carvalho Chehab 
1176b285192aSMauro Carvalho Chehab 	printk(KERN_INFO "%s: hauppauge eeprom: model=%d\n",
1177b285192aSMauro Carvalho Chehab 			dev->name, tv.model);
1178b285192aSMauro Carvalho Chehab }
1179b285192aSMauro Carvalho Chehab 
1180e6001482SLuis Alves /* Some TBS cards require initing a chip using a bitbanged SPI attached
1181e6001482SLuis Alves    to the cx23885 gpio's. If this chip doesn't get init'ed the demod
1182e6001482SLuis Alves    doesn't respond to any command. */
1183e6001482SLuis Alves static void tbs_card_init(struct cx23885_dev *dev)
1184e6001482SLuis Alves {
1185e6001482SLuis Alves 	int i;
1186e6001482SLuis Alves 	const u8 buf[] = {
1187e6001482SLuis Alves 		0xe0, 0x06, 0x66, 0x33, 0x65,
1188e6001482SLuis Alves 		0x01, 0x17, 0x06, 0xde};
1189e6001482SLuis Alves 
1190e6001482SLuis Alves 	switch (dev->board) {
1191e6001482SLuis Alves 	case CX23885_BOARD_TBS_6980:
1192e6001482SLuis Alves 	case CX23885_BOARD_TBS_6981:
1193e6001482SLuis Alves 		cx_set(GP0_IO, 0x00070007);
1194e6001482SLuis Alves 		usleep_range(1000, 10000);
1195e6001482SLuis Alves 		cx_clear(GP0_IO, 2);
1196e6001482SLuis Alves 		usleep_range(1000, 10000);
1197e6001482SLuis Alves 		for (i = 0; i < 9 * 8; i++) {
1198e6001482SLuis Alves 			cx_clear(GP0_IO, 7);
1199e6001482SLuis Alves 			usleep_range(1000, 10000);
1200e6001482SLuis Alves 			cx_set(GP0_IO,
1201e6001482SLuis Alves 				((buf[i >> 3] >> (7 - (i & 7))) & 1) | 4);
1202e6001482SLuis Alves 			usleep_range(1000, 10000);
1203e6001482SLuis Alves 		}
1204e6001482SLuis Alves 		cx_set(GP0_IO, 7);
1205e6001482SLuis Alves 		break;
1206e6001482SLuis Alves 	}
1207e6001482SLuis Alves }
1208e6001482SLuis Alves 
1209b285192aSMauro Carvalho Chehab int cx23885_tuner_callback(void *priv, int component, int command, int arg)
1210b285192aSMauro Carvalho Chehab {
1211b285192aSMauro Carvalho Chehab 	struct cx23885_tsport *port = priv;
1212b285192aSMauro Carvalho Chehab 	struct cx23885_dev *dev = port->dev;
1213b285192aSMauro Carvalho Chehab 	u32 bitmask = 0;
1214b285192aSMauro Carvalho Chehab 
1215b285192aSMauro Carvalho Chehab 	if ((command == XC2028_RESET_CLK) || (command == XC2028_I2C_FLUSH))
1216b285192aSMauro Carvalho Chehab 		return 0;
1217b285192aSMauro Carvalho Chehab 
1218b285192aSMauro Carvalho Chehab 	if (command != 0) {
1219b285192aSMauro Carvalho Chehab 		printk(KERN_ERR "%s(): Unknown command 0x%x.\n",
1220b285192aSMauro Carvalho Chehab 			__func__, command);
1221b285192aSMauro Carvalho Chehab 		return -EINVAL;
1222b285192aSMauro Carvalho Chehab 	}
1223b285192aSMauro Carvalho Chehab 
1224b285192aSMauro Carvalho Chehab 	switch (dev->board) {
1225b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1400:
1226b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500:
1227b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1228b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1229642ca1a0SAnca Emanuel 	case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
1230b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1231b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1232b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1233b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
1234b285192aSMauro Carvalho Chehab 		/* Tuner Reset Command */
1235b285192aSMauro Carvalho Chehab 		bitmask = 0x04;
1236b285192aSMauro Carvalho Chehab 		break;
1237b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1238b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
123946b21bbaSJames Harper 	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
1240b285192aSMauro Carvalho Chehab 		/* Two identical tuners on two different i2c buses,
1241b285192aSMauro Carvalho Chehab 		 * we need to reset the correct gpio. */
1242b285192aSMauro Carvalho Chehab 		if (port->nr == 1)
1243b285192aSMauro Carvalho Chehab 			bitmask = 0x01;
1244b285192aSMauro Carvalho Chehab 		else if (port->nr == 2)
1245b285192aSMauro Carvalho Chehab 			bitmask = 0x04;
1246b285192aSMauro Carvalho Chehab 		break;
1247b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1248b285192aSMauro Carvalho Chehab 		/* Tuner Reset Command */
1249b285192aSMauro Carvalho Chehab 		bitmask = 0x02;
1250b285192aSMauro Carvalho Chehab 		break;
1251b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1252b285192aSMauro Carvalho Chehab 		altera_ci_tuner_reset(dev, port->nr);
1253b285192aSMauro Carvalho Chehab 		break;
1254e8d42373SOleh Kravchenko 	case CX23885_BOARD_AVERMEDIA_HC81R:
1255e8d42373SOleh Kravchenko 		/* XC3028L Reset Command */
1256e8d42373SOleh Kravchenko 		bitmask = 1 << 2;
1257e8d42373SOleh Kravchenko 		break;
1258b285192aSMauro Carvalho Chehab 	}
1259b285192aSMauro Carvalho Chehab 
1260b285192aSMauro Carvalho Chehab 	if (bitmask) {
1261b285192aSMauro Carvalho Chehab 		/* Drive the tuner into reset and back out */
1262b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, bitmask);
1263b285192aSMauro Carvalho Chehab 		mdelay(200);
1264b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, bitmask);
1265b285192aSMauro Carvalho Chehab 	}
1266b285192aSMauro Carvalho Chehab 
1267b285192aSMauro Carvalho Chehab 	return 0;
1268b285192aSMauro Carvalho Chehab }
1269b285192aSMauro Carvalho Chehab 
1270b285192aSMauro Carvalho Chehab void cx23885_gpio_setup(struct cx23885_dev *dev)
1271b285192aSMauro Carvalho Chehab {
1272b285192aSMauro Carvalho Chehab 	switch (dev->board) {
1273b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1250:
1274b285192aSMauro Carvalho Chehab 		/* GPIO-0 cx24227 demodulator reset */
1275b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
1276b285192aSMauro Carvalho Chehab 		break;
1277b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500:
1278b285192aSMauro Carvalho Chehab 		/* GPIO-0 cx24227 demodulator */
1279b285192aSMauro Carvalho Chehab 		/* GPIO-2 xc3028 tuner */
1280b285192aSMauro Carvalho Chehab 
1281b285192aSMauro Carvalho Chehab 		/* Put the parts into reset */
1282b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050000);
1283b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x00000005);
1284b285192aSMauro Carvalho Chehab 		msleep(5);
1285b285192aSMauro Carvalho Chehab 
1286b285192aSMauro Carvalho Chehab 		/* Bring the parts out of reset */
1287b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050005);
1288b285192aSMauro Carvalho Chehab 		break;
1289b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1290b285192aSMauro Carvalho Chehab 		/* GPIO-0 cx24227 demodulator reset */
1291b285192aSMauro Carvalho Chehab 		/* GPIO-2 xc5000 tuner reset */
1292b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
1293b285192aSMauro Carvalho Chehab 		break;
1294b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1800:
1295b285192aSMauro Carvalho Chehab 		/* GPIO-0 656_CLK */
1296b285192aSMauro Carvalho Chehab 		/* GPIO-1 656_D0 */
1297b285192aSMauro Carvalho Chehab 		/* GPIO-2 8295A Reset */
1298b285192aSMauro Carvalho Chehab 		/* GPIO-3-10 cx23417 data0-7 */
1299b285192aSMauro Carvalho Chehab 		/* GPIO-11-14 cx23417 addr0-3 */
1300b285192aSMauro Carvalho Chehab 		/* GPIO-15-18 cx23417 READY, CS, RD, WR */
1301b285192aSMauro Carvalho Chehab 		/* GPIO-19 IR_RX */
1302b285192aSMauro Carvalho Chehab 
1303b285192aSMauro Carvalho Chehab 		/* CX23417 GPIO's */
1304b285192aSMauro Carvalho Chehab 		/* EIO15 Zilog Reset */
1305b285192aSMauro Carvalho Chehab 		/* EIO14 S5H1409/CX24227 Reset */
1306b285192aSMauro Carvalho Chehab 		mc417_gpio_enable(dev, GPIO_15 | GPIO_14, 1);
1307b285192aSMauro Carvalho Chehab 
1308b285192aSMauro Carvalho Chehab 		/* Put the demod into reset and protect the eeprom */
1309b285192aSMauro Carvalho Chehab 		mc417_gpio_clear(dev, GPIO_15 | GPIO_14);
1310b285192aSMauro Carvalho Chehab 		mdelay(100);
1311b285192aSMauro Carvalho Chehab 
1312b285192aSMauro Carvalho Chehab 		/* Bring the demod and blaster out of reset */
1313b285192aSMauro Carvalho Chehab 		mc417_gpio_set(dev, GPIO_15 | GPIO_14);
1314b285192aSMauro Carvalho Chehab 		mdelay(100);
1315b285192aSMauro Carvalho Chehab 
1316b285192aSMauro Carvalho Chehab 		/* Force the TDA8295A into reset and back */
1317b285192aSMauro Carvalho Chehab 		cx23885_gpio_enable(dev, GPIO_2, 1);
1318b285192aSMauro Carvalho Chehab 		cx23885_gpio_set(dev, GPIO_2);
1319b285192aSMauro Carvalho Chehab 		mdelay(20);
1320b285192aSMauro Carvalho Chehab 		cx23885_gpio_clear(dev, GPIO_2);
1321b285192aSMauro Carvalho Chehab 		mdelay(20);
1322b285192aSMauro Carvalho Chehab 		cx23885_gpio_set(dev, GPIO_2);
1323b285192aSMauro Carvalho Chehab 		mdelay(20);
1324b285192aSMauro Carvalho Chehab 		break;
1325b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1200:
1326b285192aSMauro Carvalho Chehab 		/* GPIO-0 tda10048 demodulator reset */
1327b285192aSMauro Carvalho Chehab 		/* GPIO-2 tda18271 tuner reset */
1328b285192aSMauro Carvalho Chehab 
1329b285192aSMauro Carvalho Chehab 		/* Put the parts into reset and back */
1330b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050000);
1331b285192aSMauro Carvalho Chehab 		mdelay(20);
1332b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x00000005);
1333b285192aSMauro Carvalho Chehab 		mdelay(20);
1334b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050005);
1335b285192aSMauro Carvalho Chehab 		break;
1336b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1700:
1337b285192aSMauro Carvalho Chehab 		/* GPIO-0 TDA10048 demodulator reset */
1338b285192aSMauro Carvalho Chehab 		/* GPIO-2 TDA8295A Reset */
1339b285192aSMauro Carvalho Chehab 		/* GPIO-3-10 cx23417 data0-7 */
1340b285192aSMauro Carvalho Chehab 		/* GPIO-11-14 cx23417 addr0-3 */
1341b285192aSMauro Carvalho Chehab 		/* GPIO-15-18 cx23417 READY, CS, RD, WR */
1342b285192aSMauro Carvalho Chehab 
1343b285192aSMauro Carvalho Chehab 		/* The following GPIO's are on the interna AVCore (cx25840) */
1344b285192aSMauro Carvalho Chehab 		/* GPIO-19 IR_RX */
1345b285192aSMauro Carvalho Chehab 		/* GPIO-20 IR_TX 416/DVBT Select */
1346b285192aSMauro Carvalho Chehab 		/* GPIO-21 IIS DAT */
1347b285192aSMauro Carvalho Chehab 		/* GPIO-22 IIS WCLK */
1348b285192aSMauro Carvalho Chehab 		/* GPIO-23 IIS BCLK */
1349b285192aSMauro Carvalho Chehab 
1350b285192aSMauro Carvalho Chehab 		/* Put the parts into reset and back */
1351b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050000);
1352b285192aSMauro Carvalho Chehab 		mdelay(20);
1353b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x00000005);
1354b285192aSMauro Carvalho Chehab 		mdelay(20);
1355b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050005);
1356b285192aSMauro Carvalho Chehab 		break;
1357b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1400:
1358b285192aSMauro Carvalho Chehab 		/* GPIO-0  Dibcom7000p demodulator reset */
1359b285192aSMauro Carvalho Chehab 		/* GPIO-2  xc3028L tuner reset */
1360b285192aSMauro Carvalho Chehab 		/* GPIO-13 LED */
1361b285192aSMauro Carvalho Chehab 
1362b285192aSMauro Carvalho Chehab 		/* Put the parts into reset and back */
1363b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050000);
1364b285192aSMauro Carvalho Chehab 		mdelay(20);
1365b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x00000005);
1366b285192aSMauro Carvalho Chehab 		mdelay(20);
1367b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050005);
1368b285192aSMauro Carvalho Chehab 		break;
1369b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1370b285192aSMauro Carvalho Chehab 		/* GPIO-0 xc5000 tuner reset i2c bus 0 */
1371b285192aSMauro Carvalho Chehab 		/* GPIO-1 s5h1409 demod reset i2c bus 0 */
1372b285192aSMauro Carvalho Chehab 		/* GPIO-2 xc5000 tuner reset i2c bus 1 */
1373b285192aSMauro Carvalho Chehab 		/* GPIO-3 s5h1409 demod reset i2c bus 0 */
1374b285192aSMauro Carvalho Chehab 
1375b285192aSMauro Carvalho Chehab 		/* Put the parts into reset and back */
1376b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x000f0000);
1377b285192aSMauro Carvalho Chehab 		mdelay(20);
1378b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x0000000f);
1379b285192aSMauro Carvalho Chehab 		mdelay(20);
1380b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x000f000f);
1381b285192aSMauro Carvalho Chehab 		break;
1382b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
138346b21bbaSJames Harper 	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
1384b285192aSMauro Carvalho Chehab 		/* GPIO-0 portb xc3028 reset */
1385b285192aSMauro Carvalho Chehab 		/* GPIO-1 portb zl10353 reset */
1386b285192aSMauro Carvalho Chehab 		/* GPIO-2 portc xc3028 reset */
1387b285192aSMauro Carvalho Chehab 		/* GPIO-3 portc zl10353 reset */
1388b285192aSMauro Carvalho Chehab 
1389b285192aSMauro Carvalho Chehab 		/* Put the parts into reset and back */
1390b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x000f0000);
1391b285192aSMauro Carvalho Chehab 		mdelay(20);
1392b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x0000000f);
1393b285192aSMauro Carvalho Chehab 		mdelay(20);
1394b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x000f000f);
1395b285192aSMauro Carvalho Chehab 		break;
1396b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1397642ca1a0SAnca Emanuel 	case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
1398b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1399b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1400b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1401b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
1402b285192aSMauro Carvalho Chehab 		/* GPIO-2  xc3028 tuner reset */
1403b285192aSMauro Carvalho Chehab 
1404b285192aSMauro Carvalho Chehab 		/* The following GPIO's are on the internal AVCore (cx25840) */
1405b285192aSMauro Carvalho Chehab 		/* GPIO-?  zl10353 demod reset */
1406b285192aSMauro Carvalho Chehab 
1407b285192aSMauro Carvalho Chehab 		/* Put the parts into reset and back */
1408b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00040000);
1409b285192aSMauro Carvalho Chehab 		mdelay(20);
1410b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x00000004);
1411b285192aSMauro Carvalho Chehab 		mdelay(20);
1412b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00040004);
1413b285192aSMauro Carvalho Chehab 		break;
1414b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TBS_6920:
1415e6001482SLuis Alves 	case CX23885_BOARD_TBS_6980:
1416e6001482SLuis Alves 	case CX23885_BOARD_TBS_6981:
1417f667190bSMariusz Bia?o?czyk 	case CX23885_BOARD_PROF_8000:
1418b285192aSMauro Carvalho Chehab 		cx_write(MC417_CTL, 0x00000036);
1419b285192aSMauro Carvalho Chehab 		cx_write(MC417_OEN, 0x00001000);
1420b285192aSMauro Carvalho Chehab 		cx_set(MC417_RWD, 0x00000002);
1421b285192aSMauro Carvalho Chehab 		mdelay(200);
1422b285192aSMauro Carvalho Chehab 		cx_clear(MC417_RWD, 0x00000800);
1423b285192aSMauro Carvalho Chehab 		mdelay(200);
1424b285192aSMauro Carvalho Chehab 		cx_set(MC417_RWD, 0x00000800);
1425b285192aSMauro Carvalho Chehab 		mdelay(200);
1426b285192aSMauro Carvalho Chehab 		break;
1427b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1428b285192aSMauro Carvalho Chehab 		/* GPIO-0 INTA from CiMax1
1429b285192aSMauro Carvalho Chehab 		   GPIO-1 INTB from CiMax2
1430b285192aSMauro Carvalho Chehab 		   GPIO-2 reset chips
1431b285192aSMauro Carvalho Chehab 		   GPIO-3 to GPIO-10 data/addr for CA
1432b285192aSMauro Carvalho Chehab 		   GPIO-11 ~CS0 to CiMax1
1433b285192aSMauro Carvalho Chehab 		   GPIO-12 ~CS1 to CiMax2
1434b285192aSMauro Carvalho Chehab 		   GPIO-13 ADL0 load LSB addr
1435b285192aSMauro Carvalho Chehab 		   GPIO-14 ADL1 load MSB addr
1436b285192aSMauro Carvalho Chehab 		   GPIO-15 ~RDY from CiMax
1437b285192aSMauro Carvalho Chehab 		   GPIO-17 ~RD to CiMax
1438b285192aSMauro Carvalho Chehab 		   GPIO-18 ~WR to CiMax
1439b285192aSMauro Carvalho Chehab 		 */
1440b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00040000); /* GPIO as out */
1441b285192aSMauro Carvalho Chehab 		/* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
1442b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x00030004);
1443b285192aSMauro Carvalho Chehab 		mdelay(100);/* reset delay */
1444b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */
1445b285192aSMauro Carvalho Chehab 		cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */
1446b285192aSMauro Carvalho Chehab 		/* GPIO-15 IN as ~ACK, rest as OUT */
1447b285192aSMauro Carvalho Chehab 		cx_write(MC417_OEN, 0x00001000);
1448b285192aSMauro Carvalho Chehab 		/* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
1449b285192aSMauro Carvalho Chehab 		cx_write(MC417_RWD, 0x0000c300);
1450b285192aSMauro Carvalho Chehab 		/* enable irq */
1451b285192aSMauro Carvalho Chehab 		cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
1452b285192aSMauro Carvalho Chehab 		break;
1453b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1270:
1454b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1275:
1455b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255:
1456b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
1457b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1210:
1458b285192aSMauro Carvalho Chehab 		/* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */
1459b285192aSMauro Carvalho Chehab 		/* GPIO-6 I2C Gate which can isolate the demod from the bus */
1460b285192aSMauro Carvalho Chehab 		/* GPIO-9 Demod reset */
1461b285192aSMauro Carvalho Chehab 
1462b285192aSMauro Carvalho Chehab 		/* Put the parts into reset and back */
1463b285192aSMauro Carvalho Chehab 		cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1);
1464b285192aSMauro Carvalho Chehab 		cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5);
1465b285192aSMauro Carvalho Chehab 		cx23885_gpio_clear(dev, GPIO_9);
1466b285192aSMauro Carvalho Chehab 		mdelay(20);
1467b285192aSMauro Carvalho Chehab 		cx23885_gpio_set(dev, GPIO_9);
1468b285192aSMauro Carvalho Chehab 		break;
1469b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MYGICA_X8506:
1470b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1471b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MYGICA_X8507:
1472b285192aSMauro Carvalho Chehab 		/* GPIO-0 (0)Analog / (1)Digital TV */
1473b285192aSMauro Carvalho Chehab 		/* GPIO-1 reset XC5000 */
14740d1b5265SMauro Carvalho Chehab 		/* GPIO-2 demod reset */
1475b285192aSMauro Carvalho Chehab 		cx23885_gpio_enable(dev, GPIO_0 | GPIO_1 | GPIO_2, 1);
1476b285192aSMauro Carvalho Chehab 		cx23885_gpio_clear(dev, GPIO_1 | GPIO_2);
1477b285192aSMauro Carvalho Chehab 		mdelay(100);
1478b285192aSMauro Carvalho Chehab 		cx23885_gpio_set(dev, GPIO_0 | GPIO_1 | GPIO_2);
1479b285192aSMauro Carvalho Chehab 		mdelay(100);
1480b285192aSMauro Carvalho Chehab 		break;
1481b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MYGICA_X8558PRO:
1482b285192aSMauro Carvalho Chehab 		/* GPIO-0 reset first ATBM8830 */
1483b285192aSMauro Carvalho Chehab 		/* GPIO-1 reset second ATBM8830 */
1484b285192aSMauro Carvalho Chehab 		cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1);
1485b285192aSMauro Carvalho Chehab 		cx23885_gpio_clear(dev, GPIO_0 | GPIO_1);
1486b285192aSMauro Carvalho Chehab 		mdelay(100);
1487b285192aSMauro Carvalho Chehab 		cx23885_gpio_set(dev, GPIO_0 | GPIO_1);
1488b285192aSMauro Carvalho Chehab 		mdelay(100);
1489b285192aSMauro Carvalho Chehab 		break;
1490b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1850:
1491b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1290:
1492b285192aSMauro Carvalho Chehab 		/* GPIO-0 656_CLK */
1493b285192aSMauro Carvalho Chehab 		/* GPIO-1 656_D0 */
1494b285192aSMauro Carvalho Chehab 		/* GPIO-2 Wake# */
1495b285192aSMauro Carvalho Chehab 		/* GPIO-3-10 cx23417 data0-7 */
1496b285192aSMauro Carvalho Chehab 		/* GPIO-11-14 cx23417 addr0-3 */
1497b285192aSMauro Carvalho Chehab 		/* GPIO-15-18 cx23417 READY, CS, RD, WR */
1498b285192aSMauro Carvalho Chehab 		/* GPIO-19 IR_RX */
1499b285192aSMauro Carvalho Chehab 		/* GPIO-20 C_IR_TX */
1500b285192aSMauro Carvalho Chehab 		/* GPIO-21 I2S DAT */
1501b285192aSMauro Carvalho Chehab 		/* GPIO-22 I2S WCLK */
1502b285192aSMauro Carvalho Chehab 		/* GPIO-23 I2S BCLK */
1503b285192aSMauro Carvalho Chehab 		/* ALT GPIO: EXP GPIO LATCH */
1504b285192aSMauro Carvalho Chehab 
1505b285192aSMauro Carvalho Chehab 		/* CX23417 GPIO's */
1506b285192aSMauro Carvalho Chehab 		/* GPIO-14 S5H1411/CX24228 Reset */
1507b285192aSMauro Carvalho Chehab 		/* GPIO-13 EEPROM write protect */
1508b285192aSMauro Carvalho Chehab 		mc417_gpio_enable(dev, GPIO_14 | GPIO_13, 1);
1509b285192aSMauro Carvalho Chehab 
1510b285192aSMauro Carvalho Chehab 		/* Put the demod into reset and protect the eeprom */
1511b285192aSMauro Carvalho Chehab 		mc417_gpio_clear(dev, GPIO_14 | GPIO_13);
1512b285192aSMauro Carvalho Chehab 		mdelay(100);
1513b285192aSMauro Carvalho Chehab 
1514b285192aSMauro Carvalho Chehab 		/* Bring the demod out of reset */
1515b285192aSMauro Carvalho Chehab 		mc417_gpio_set(dev, GPIO_14);
1516b285192aSMauro Carvalho Chehab 		mdelay(100);
1517b285192aSMauro Carvalho Chehab 
1518b285192aSMauro Carvalho Chehab 		/* CX24228 GPIO */
1519b285192aSMauro Carvalho Chehab 		/* Connected to IF / Mux */
1520b285192aSMauro Carvalho Chehab 		break;
1521b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1522b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
1523b285192aSMauro Carvalho Chehab 		break;
1524b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1525b285192aSMauro Carvalho Chehab 		/* GPIO-0 ~INT in
1526b285192aSMauro Carvalho Chehab 		   GPIO-1 TMS out
1527b285192aSMauro Carvalho Chehab 		   GPIO-2 ~reset chips out
1528b285192aSMauro Carvalho Chehab 		   GPIO-3 to GPIO-10 data/addr for CA in/out
1529b285192aSMauro Carvalho Chehab 		   GPIO-11 ~CS out
1530b285192aSMauro Carvalho Chehab 		   GPIO-12 ADDR out
1531b285192aSMauro Carvalho Chehab 		   GPIO-13 ~WR out
1532b285192aSMauro Carvalho Chehab 		   GPIO-14 ~RD out
1533b285192aSMauro Carvalho Chehab 		   GPIO-15 ~RDY in
1534b285192aSMauro Carvalho Chehab 		   GPIO-16 TCK out
1535b285192aSMauro Carvalho Chehab 		   GPIO-17 TDO in
1536b285192aSMauro Carvalho Chehab 		   GPIO-18 TDI out
1537b285192aSMauro Carvalho Chehab 		 */
1538b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00060000); /* GPIO-1,2 as out */
1539b285192aSMauro Carvalho Chehab 		/* GPIO-0 as INT, reset & TMS low */
1540b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x00010006);
1541b285192aSMauro Carvalho Chehab 		mdelay(100);/* reset delay */
1542b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00000004); /* reset high */
1543b285192aSMauro Carvalho Chehab 		cx_write(MC417_CTL, 0x00000037);/* enable GPIO-3..18 pins */
1544b285192aSMauro Carvalho Chehab 		/* GPIO-17 is TDO in, GPIO-15 is ~RDY in, rest is out */
1545b285192aSMauro Carvalho Chehab 		cx_write(MC417_OEN, 0x00005000);
1546b285192aSMauro Carvalho Chehab 		/* ~RD, ~WR high; ADDR low; ~CS high */
1547b285192aSMauro Carvalho Chehab 		cx_write(MC417_RWD, 0x00000d00);
1548b285192aSMauro Carvalho Chehab 		/* enable irq */
1549b285192aSMauro Carvalho Chehab 		cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
1550b285192aSMauro Carvalho Chehab 		break;
15517c62f5a1SMichael Krufky 	case CX23885_BOARD_HAUPPAUGE_HVR4400:
1552721f3223SMatthias Schwarzott 	case CX23885_BOARD_HAUPPAUGE_STARBURST:
15537c62f5a1SMichael Krufky 		/* GPIO-8 tda10071 demod reset */
1554721f3223SMatthias Schwarzott 		/* GPIO-9 si2165 demod reset (only HVR4400/HVR5500)*/
15557c62f5a1SMichael Krufky 
15567c62f5a1SMichael Krufky 		/* Put the parts into reset and back */
155736efec48SMatthias Schwarzott 		cx23885_gpio_enable(dev, GPIO_8 | GPIO_9, 1);
155836efec48SMatthias Schwarzott 
155936efec48SMatthias Schwarzott 		cx23885_gpio_clear(dev, GPIO_8 | GPIO_9);
15607c62f5a1SMichael Krufky 		mdelay(100);
156136efec48SMatthias Schwarzott 		cx23885_gpio_set(dev, GPIO_8 | GPIO_9);
15627c62f5a1SMichael Krufky 		mdelay(100);
156336efec48SMatthias Schwarzott 
15647c62f5a1SMichael Krufky 		break;
1565e8d42373SOleh Kravchenko 	case CX23885_BOARD_AVERMEDIA_HC81R:
1566e8d42373SOleh Kravchenko 		cx_clear(MC417_CTL, 1);
1567e8d42373SOleh Kravchenko 		/* GPIO-0,1,2 setup direction as output */
1568e8d42373SOleh Kravchenko 		cx_set(GP0_IO, 0x00070000);
1569e8d42373SOleh Kravchenko 		mdelay(10);
1570e8d42373SOleh Kravchenko 		/* AF9013 demod reset */
1571e8d42373SOleh Kravchenko 		cx_set(GP0_IO, 0x00010001);
1572e8d42373SOleh Kravchenko 		mdelay(10);
1573e8d42373SOleh Kravchenko 		cx_clear(GP0_IO, 0x00010001);
1574e8d42373SOleh Kravchenko 		mdelay(10);
1575e8d42373SOleh Kravchenko 		cx_set(GP0_IO, 0x00010001);
1576e8d42373SOleh Kravchenko 		mdelay(10);
1577e8d42373SOleh Kravchenko 		/* demod tune? */
1578e8d42373SOleh Kravchenko 		cx_clear(GP0_IO, 0x00030003);
1579e8d42373SOleh Kravchenko 		mdelay(10);
1580e8d42373SOleh Kravchenko 		cx_set(GP0_IO, 0x00020002);
1581e8d42373SOleh Kravchenko 		mdelay(10);
1582e8d42373SOleh Kravchenko 		cx_set(GP0_IO, 0x00010001);
1583e8d42373SOleh Kravchenko 		mdelay(10);
1584e8d42373SOleh Kravchenko 		cx_clear(GP0_IO, 0x00020002);
1585e8d42373SOleh Kravchenko 		/* XC3028L tuner reset */
1586e8d42373SOleh Kravchenko 		cx_set(GP0_IO, 0x00040004);
1587e8d42373SOleh Kravchenko 		cx_clear(GP0_IO, 0x00040004);
1588e8d42373SOleh Kravchenko 		cx_set(GP0_IO, 0x00040004);
1589e8d42373SOleh Kravchenko 		mdelay(60);
1590e8d42373SOleh Kravchenko 		break;
159129442266SOlli Salonen 	case CX23885_BOARD_DVBSKY_T9580:
1592c29d6a83Snibble.max 	case CX23885_BOARD_DVBSKY_S952:
1593c02ef64aSNibble Max 	case CX23885_BOARD_DVBSKY_T982:
159429442266SOlli Salonen 		/* enable GPIO3-18 pins */
159529442266SOlli Salonen 		cx_write(MC417_CTL, 0x00000037);
159629442266SOlli Salonen 		cx23885_gpio_enable(dev, GPIO_2 | GPIO_11, 1);
159729442266SOlli Salonen 		cx23885_gpio_clear(dev, GPIO_2 | GPIO_11);
159829442266SOlli Salonen 		mdelay(100);
159929442266SOlli Salonen 		cx23885_gpio_set(dev, GPIO_2 | GPIO_11);
160029442266SOlli Salonen 		break;
160182c10276SOlli Salonen 	case CX23885_BOARD_DVBSKY_T980C:
16020e6c7b01Snibble.max 	case CX23885_BOARD_DVBSKY_S950C:
160361b103e8SOlli Salonen 	case CX23885_BOARD_TT_CT2_4500_CI:
160482c10276SOlli Salonen 		/*
160582c10276SOlli Salonen 		 * GPIO-0 INTA from CiMax, input
160682c10276SOlli Salonen 		 * GPIO-1 reset CiMax, output, high active
160782c10276SOlli Salonen 		 * GPIO-2 reset demod, output, low active
160882c10276SOlli Salonen 		 * GPIO-3 to GPIO-10 data/addr for CAM
160982c10276SOlli Salonen 		 * GPIO-11 ~CS0 to CiMax1
161082c10276SOlli Salonen 		 * GPIO-12 ~CS1 to CiMax2
161182c10276SOlli Salonen 		 * GPIO-13 ADL0 load LSB addr
161282c10276SOlli Salonen 		 * GPIO-14 ADL1 load MSB addr
161382c10276SOlli Salonen 		 * GPIO-15 ~RDY from CiMax
161482c10276SOlli Salonen 		 * GPIO-17 ~RD to CiMax
161582c10276SOlli Salonen 		 * GPIO-18 ~WR to CiMax
161682c10276SOlli Salonen 		 */
161782c10276SOlli Salonen 
161882c10276SOlli Salonen 		cx_set(GP0_IO, 0x00060002); /* GPIO 1/2 as output */
161982c10276SOlli Salonen 		cx_clear(GP0_IO, 0x00010004); /* GPIO 0 as input */
162082c10276SOlli Salonen 		mdelay(100); /* reset delay */
162182c10276SOlli Salonen 		cx_set(GP0_IO, 0x00060004); /* GPIO as out, reset high */
162282c10276SOlli Salonen 		cx_clear(GP0_IO, 0x00010002);
162382c10276SOlli Salonen 		cx_write(MC417_CTL, 0x00000037); /* enable GPIO3-18 pins */
162482c10276SOlli Salonen 
162582c10276SOlli Salonen 		/* GPIO-15 IN as ~ACK, rest as OUT */
162682c10276SOlli Salonen 		cx_write(MC417_OEN, 0x00001000);
162782c10276SOlli Salonen 
162882c10276SOlli Salonen 		/* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
162982c10276SOlli Salonen 		cx_write(MC417_RWD, 0x0000c300);
163082c10276SOlli Salonen 
163182c10276SOlli Salonen 		/* enable irq */
163282c10276SOlli Salonen 		cx_write(GPIO_ISM, 0x00000000); /* INTERRUPTS active low */
1633cba5480cSnibble.max 		break;
1634cba5480cSnibble.max 	case CX23885_BOARD_DVBSKY_S950:
1635cba5480cSnibble.max 		cx23885_gpio_enable(dev, GPIO_2, 1);
1636cba5480cSnibble.max 		cx23885_gpio_clear(dev, GPIO_2);
1637cba5480cSnibble.max 		msleep(100);
1638cba5480cSnibble.max 		cx23885_gpio_set(dev, GPIO_2);
1639cba5480cSnibble.max 		break;
1640b285192aSMauro Carvalho Chehab 	}
1641b285192aSMauro Carvalho Chehab }
1642b285192aSMauro Carvalho Chehab 
1643b285192aSMauro Carvalho Chehab int cx23885_ir_init(struct cx23885_dev *dev)
1644b285192aSMauro Carvalho Chehab {
1645b285192aSMauro Carvalho Chehab 	static struct v4l2_subdev_io_pin_config ir_rxtx_pin_cfg[] = {
1646b285192aSMauro Carvalho Chehab 		{
1647b285192aSMauro Carvalho Chehab 			.flags	  = V4L2_SUBDEV_IO_PIN_INPUT,
1648b285192aSMauro Carvalho Chehab 			.pin	  = CX23885_PIN_IR_RX_GPIO19,
1649b285192aSMauro Carvalho Chehab 			.function = CX23885_PAD_IR_RX,
1650b285192aSMauro Carvalho Chehab 			.value	  = 0,
1651b285192aSMauro Carvalho Chehab 			.strength = CX25840_PIN_DRIVE_MEDIUM,
1652b285192aSMauro Carvalho Chehab 		}, {
1653b285192aSMauro Carvalho Chehab 			.flags	  = V4L2_SUBDEV_IO_PIN_OUTPUT,
1654b285192aSMauro Carvalho Chehab 			.pin	  = CX23885_PIN_IR_TX_GPIO20,
1655b285192aSMauro Carvalho Chehab 			.function = CX23885_PAD_IR_TX,
1656b285192aSMauro Carvalho Chehab 			.value	  = 0,
1657b285192aSMauro Carvalho Chehab 			.strength = CX25840_PIN_DRIVE_MEDIUM,
1658b285192aSMauro Carvalho Chehab 		}
1659b285192aSMauro Carvalho Chehab 	};
1660b285192aSMauro Carvalho Chehab 	const size_t ir_rxtx_pin_cfg_count = ARRAY_SIZE(ir_rxtx_pin_cfg);
1661b285192aSMauro Carvalho Chehab 
1662b285192aSMauro Carvalho Chehab 	static struct v4l2_subdev_io_pin_config ir_rx_pin_cfg[] = {
1663b285192aSMauro Carvalho Chehab 		{
1664b285192aSMauro Carvalho Chehab 			.flags	  = V4L2_SUBDEV_IO_PIN_INPUT,
1665b285192aSMauro Carvalho Chehab 			.pin	  = CX23885_PIN_IR_RX_GPIO19,
1666b285192aSMauro Carvalho Chehab 			.function = CX23885_PAD_IR_RX,
1667b285192aSMauro Carvalho Chehab 			.value	  = 0,
1668b285192aSMauro Carvalho Chehab 			.strength = CX25840_PIN_DRIVE_MEDIUM,
1669b285192aSMauro Carvalho Chehab 		}
1670b285192aSMauro Carvalho Chehab 	};
1671b285192aSMauro Carvalho Chehab 	const size_t ir_rx_pin_cfg_count = ARRAY_SIZE(ir_rx_pin_cfg);
1672b285192aSMauro Carvalho Chehab 
1673b285192aSMauro Carvalho Chehab 	struct v4l2_subdev_ir_parameters params;
1674b285192aSMauro Carvalho Chehab 	int ret = 0;
1675b285192aSMauro Carvalho Chehab 	switch (dev->board) {
1676b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500:
1677b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1678b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1800:
1679b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1200:
1680b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1400:
1681b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1275:
1682b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255:
1683b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
1684b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1210:
1685b285192aSMauro Carvalho Chehab 		/* FIXME: Implement me */
1686b285192aSMauro Carvalho Chehab 		break;
1687b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1270:
1688b285192aSMauro Carvalho Chehab 		ret = cx23888_ir_probe(dev);
1689b285192aSMauro Carvalho Chehab 		if (ret)
1690b285192aSMauro Carvalho Chehab 			break;
1691b285192aSMauro Carvalho Chehab 		dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
1692b285192aSMauro Carvalho Chehab 		v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1693b285192aSMauro Carvalho Chehab 				 ir_rx_pin_cfg_count, ir_rx_pin_cfg);
1694b285192aSMauro Carvalho Chehab 		break;
1695b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1850:
1696b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1290:
1697b285192aSMauro Carvalho Chehab 		ret = cx23888_ir_probe(dev);
1698b285192aSMauro Carvalho Chehab 		if (ret)
1699b285192aSMauro Carvalho Chehab 			break;
1700b285192aSMauro Carvalho Chehab 		dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
1701b285192aSMauro Carvalho Chehab 		v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1702b285192aSMauro Carvalho Chehab 				 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
1703b285192aSMauro Carvalho Chehab 		/*
1704b285192aSMauro Carvalho Chehab 		 * For these boards we need to invert the Tx output via the
1705b285192aSMauro Carvalho Chehab 		 * IR controller to have the LED off while idle
1706b285192aSMauro Carvalho Chehab 		 */
1707b285192aSMauro Carvalho Chehab 		v4l2_subdev_call(dev->sd_ir, ir, tx_g_parameters, &params);
1708b285192aSMauro Carvalho Chehab 		params.enable = false;
1709b285192aSMauro Carvalho Chehab 		params.shutdown = false;
1710b285192aSMauro Carvalho Chehab 		params.invert_level = true;
1711b285192aSMauro Carvalho Chehab 		v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, &params);
1712b285192aSMauro Carvalho Chehab 		params.shutdown = true;
1713b285192aSMauro Carvalho Chehab 		v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, &params);
1714b285192aSMauro Carvalho Chehab 		break;
1715b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1716b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TEVII_S470:
1717e5f670b7SAlfredo Jesús Delaiti 	case CX23885_BOARD_MYGICA_X8507:
1718e6001482SLuis Alves 	case CX23885_BOARD_TBS_6980:
1719e6001482SLuis Alves 	case CX23885_BOARD_TBS_6981:
1720d11a3835Snibble.max 	case CX23885_BOARD_DVBSKY_T9580:
1721070e6661Snibble.max 	case CX23885_BOARD_DVBSKY_T980C:
1722070e6661Snibble.max 	case CX23885_BOARD_DVBSKY_S950C:
172361b103e8SOlli Salonen 	case CX23885_BOARD_TT_CT2_4500_CI:
1724cba5480cSnibble.max 	case CX23885_BOARD_DVBSKY_S950:
1725c29d6a83Snibble.max 	case CX23885_BOARD_DVBSKY_S952:
1726c02ef64aSNibble Max 	case CX23885_BOARD_DVBSKY_T982:
1727b285192aSMauro Carvalho Chehab 		if (!enable_885_ir)
1728b285192aSMauro Carvalho Chehab 			break;
1729b285192aSMauro Carvalho Chehab 		dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
1730b285192aSMauro Carvalho Chehab 		if (dev->sd_ir == NULL) {
1731b285192aSMauro Carvalho Chehab 			ret = -ENODEV;
1732b285192aSMauro Carvalho Chehab 			break;
1733b285192aSMauro Carvalho Chehab 		}
1734b285192aSMauro Carvalho Chehab 		v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1735b285192aSMauro Carvalho Chehab 				 ir_rx_pin_cfg_count, ir_rx_pin_cfg);
1736b285192aSMauro Carvalho Chehab 		break;
1737b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1250:
1738b285192aSMauro Carvalho Chehab 		if (!enable_885_ir)
1739b285192aSMauro Carvalho Chehab 			break;
1740b285192aSMauro Carvalho Chehab 		dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
1741b285192aSMauro Carvalho Chehab 		if (dev->sd_ir == NULL) {
1742b285192aSMauro Carvalho Chehab 			ret = -ENODEV;
1743b285192aSMauro Carvalho Chehab 			break;
1744b285192aSMauro Carvalho Chehab 		}
1745b285192aSMauro Carvalho Chehab 		v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1746b285192aSMauro Carvalho Chehab 				 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
1747b285192aSMauro Carvalho Chehab 		break;
1748b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
174946b21bbaSJames Harper 	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
1750b285192aSMauro Carvalho Chehab 		request_module("ir-kbd-i2c");
1751b285192aSMauro Carvalho Chehab 		break;
1752b285192aSMauro Carvalho Chehab 	}
1753b285192aSMauro Carvalho Chehab 
1754b285192aSMauro Carvalho Chehab 	return ret;
1755b285192aSMauro Carvalho Chehab }
1756b285192aSMauro Carvalho Chehab 
1757b285192aSMauro Carvalho Chehab void cx23885_ir_fini(struct cx23885_dev *dev)
1758b285192aSMauro Carvalho Chehab {
1759b285192aSMauro Carvalho Chehab 	switch (dev->board) {
1760b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1270:
1761b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1850:
1762b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1290:
1763b285192aSMauro Carvalho Chehab 		cx23885_irq_remove(dev, PCI_MSK_IR);
1764b285192aSMauro Carvalho Chehab 		cx23888_ir_remove(dev);
1765b285192aSMauro Carvalho Chehab 		dev->sd_ir = NULL;
1766b285192aSMauro Carvalho Chehab 		break;
1767b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1768b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TEVII_S470:
1769b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1250:
1770e5f670b7SAlfredo Jesús Delaiti 	case CX23885_BOARD_MYGICA_X8507:
1771e6001482SLuis Alves 	case CX23885_BOARD_TBS_6980:
1772e6001482SLuis Alves 	case CX23885_BOARD_TBS_6981:
1773d11a3835Snibble.max 	case CX23885_BOARD_DVBSKY_T9580:
1774070e6661Snibble.max 	case CX23885_BOARD_DVBSKY_T980C:
1775070e6661Snibble.max 	case CX23885_BOARD_DVBSKY_S950C:
177661b103e8SOlli Salonen 	case CX23885_BOARD_TT_CT2_4500_CI:
1777cba5480cSnibble.max 	case CX23885_BOARD_DVBSKY_S950:
1778c29d6a83Snibble.max 	case CX23885_BOARD_DVBSKY_S952:
1779c02ef64aSNibble Max 	case CX23885_BOARD_DVBSKY_T982:
1780b285192aSMauro Carvalho Chehab 		cx23885_irq_remove(dev, PCI_MSK_AV_CORE);
1781b285192aSMauro Carvalho Chehab 		/* sd_ir is a duplicate pointer to the AV Core, just clear it */
1782b285192aSMauro Carvalho Chehab 		dev->sd_ir = NULL;
1783b285192aSMauro Carvalho Chehab 		break;
1784b285192aSMauro Carvalho Chehab 	}
1785b285192aSMauro Carvalho Chehab }
1786b285192aSMauro Carvalho Chehab 
1787ada73eeeSMauro Carvalho Chehab static int netup_jtag_io(void *device, int tms, int tdi, int read_tdo)
1788b285192aSMauro Carvalho Chehab {
1789b285192aSMauro Carvalho Chehab 	int data;
1790b285192aSMauro Carvalho Chehab 	int tdo = 0;
1791b285192aSMauro Carvalho Chehab 	struct cx23885_dev *dev = (struct cx23885_dev *)device;
1792b285192aSMauro Carvalho Chehab 	/*TMS*/
1793b285192aSMauro Carvalho Chehab 	data = ((cx_read(GP0_IO)) & (~0x00000002));
1794b285192aSMauro Carvalho Chehab 	data |= (tms ? 0x00020002 : 0x00020000);
1795b285192aSMauro Carvalho Chehab 	cx_write(GP0_IO, data);
1796b285192aSMauro Carvalho Chehab 
1797b285192aSMauro Carvalho Chehab 	/*TDI*/
1798b285192aSMauro Carvalho Chehab 	data = ((cx_read(MC417_RWD)) & (~0x0000a000));
1799b285192aSMauro Carvalho Chehab 	data |= (tdi ? 0x00008000 : 0);
1800b285192aSMauro Carvalho Chehab 	cx_write(MC417_RWD, data);
1801b285192aSMauro Carvalho Chehab 	if (read_tdo)
1802b285192aSMauro Carvalho Chehab 		tdo = (data & 0x00004000) ? 1 : 0; /*TDO*/
1803b285192aSMauro Carvalho Chehab 
1804b285192aSMauro Carvalho Chehab 	cx_write(MC417_RWD, data | 0x00002000);
1805b285192aSMauro Carvalho Chehab 	udelay(1);
1806b285192aSMauro Carvalho Chehab 	/*TCK*/
1807b285192aSMauro Carvalho Chehab 	cx_write(MC417_RWD, data);
1808b285192aSMauro Carvalho Chehab 
1809b285192aSMauro Carvalho Chehab 	return tdo;
1810b285192aSMauro Carvalho Chehab }
1811b285192aSMauro Carvalho Chehab 
1812b285192aSMauro Carvalho Chehab void cx23885_ir_pci_int_enable(struct cx23885_dev *dev)
1813b285192aSMauro Carvalho Chehab {
1814b285192aSMauro Carvalho Chehab 	switch (dev->board) {
1815b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1270:
1816b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1850:
1817b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1290:
1818b285192aSMauro Carvalho Chehab 		if (dev->sd_ir)
1819b285192aSMauro Carvalho Chehab 			cx23885_irq_add_enable(dev, PCI_MSK_IR);
1820b285192aSMauro Carvalho Chehab 		break;
1821b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1822b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TEVII_S470:
1823b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1250:
1824e5f670b7SAlfredo Jesús Delaiti 	case CX23885_BOARD_MYGICA_X8507:
1825e6001482SLuis Alves 	case CX23885_BOARD_TBS_6980:
1826e6001482SLuis Alves 	case CX23885_BOARD_TBS_6981:
1827d11a3835Snibble.max 	case CX23885_BOARD_DVBSKY_T9580:
1828070e6661Snibble.max 	case CX23885_BOARD_DVBSKY_T980C:
1829070e6661Snibble.max 	case CX23885_BOARD_DVBSKY_S950C:
183061b103e8SOlli Salonen 	case CX23885_BOARD_TT_CT2_4500_CI:
1831cba5480cSnibble.max 	case CX23885_BOARD_DVBSKY_S950:
1832c29d6a83Snibble.max 	case CX23885_BOARD_DVBSKY_S952:
1833c02ef64aSNibble Max 	case CX23885_BOARD_DVBSKY_T982:
1834b285192aSMauro Carvalho Chehab 		if (dev->sd_ir)
1835b285192aSMauro Carvalho Chehab 			cx23885_irq_add_enable(dev, PCI_MSK_AV_CORE);
1836b285192aSMauro Carvalho Chehab 		break;
1837b285192aSMauro Carvalho Chehab 	}
1838b285192aSMauro Carvalho Chehab }
1839b285192aSMauro Carvalho Chehab 
1840b285192aSMauro Carvalho Chehab void cx23885_card_setup(struct cx23885_dev *dev)
1841b285192aSMauro Carvalho Chehab {
1842b285192aSMauro Carvalho Chehab 	struct cx23885_tsport *ts1 = &dev->ts1;
1843b285192aSMauro Carvalho Chehab 	struct cx23885_tsport *ts2 = &dev->ts2;
1844b285192aSMauro Carvalho Chehab 
1845b285192aSMauro Carvalho Chehab 	static u8 eeprom[256];
1846b285192aSMauro Carvalho Chehab 
1847b285192aSMauro Carvalho Chehab 	if (dev->i2c_bus[0].i2c_rc == 0) {
1848b285192aSMauro Carvalho Chehab 		dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
1849b285192aSMauro Carvalho Chehab 		tveeprom_read(&dev->i2c_bus[0].i2c_client,
1850b285192aSMauro Carvalho Chehab 			      eeprom, sizeof(eeprom));
1851b285192aSMauro Carvalho Chehab 	}
1852b285192aSMauro Carvalho Chehab 
1853b285192aSMauro Carvalho Chehab 	switch (dev->board) {
1854b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1250:
1855b285192aSMauro Carvalho Chehab 		if (dev->i2c_bus[0].i2c_rc == 0) {
1856b285192aSMauro Carvalho Chehab 			if (eeprom[0x80] != 0x84)
1857b285192aSMauro Carvalho Chehab 				hauppauge_eeprom(dev, eeprom+0xc0);
1858b285192aSMauro Carvalho Chehab 			else
1859b285192aSMauro Carvalho Chehab 				hauppauge_eeprom(dev, eeprom+0x80);
1860b285192aSMauro Carvalho Chehab 		}
1861b285192aSMauro Carvalho Chehab 		break;
1862b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500:
1863b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1864b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1400:
1865b285192aSMauro Carvalho Chehab 		if (dev->i2c_bus[0].i2c_rc == 0)
1866b285192aSMauro Carvalho Chehab 			hauppauge_eeprom(dev, eeprom+0x80);
1867b285192aSMauro Carvalho Chehab 		break;
1868b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1800:
1869b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
1870b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1200:
1871b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1700:
1872b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1270:
1873b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1275:
1874b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255:
1875b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
1876b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1210:
1877b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1850:
1878b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1290:
18797c62f5a1SMichael Krufky 	case CX23885_BOARD_HAUPPAUGE_HVR4400:
1880721f3223SMatthias Schwarzott 	case CX23885_BOARD_HAUPPAUGE_STARBURST:
1881cce11b09SHans Verkuil 	case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE:
1882b285192aSMauro Carvalho Chehab 		if (dev->i2c_bus[0].i2c_rc == 0)
1883b285192aSMauro Carvalho Chehab 			hauppauge_eeprom(dev, eeprom+0xc0);
1884b285192aSMauro Carvalho Chehab 		break;
1885b285192aSMauro Carvalho Chehab 	}
1886b285192aSMauro Carvalho Chehab 
1887b285192aSMauro Carvalho Chehab 	switch (dev->board) {
1888e8d42373SOleh Kravchenko 	case CX23885_BOARD_AVERMEDIA_HC81R:
1889e8d42373SOleh Kravchenko 		/* Defaults for VID B */
1890e8d42373SOleh Kravchenko 		ts1->gen_ctrl_val  = 0x4; /* Parallel */
1891e8d42373SOleh Kravchenko 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1892e8d42373SOleh Kravchenko 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1893e8d42373SOleh Kravchenko 		/* Defaults for VID C */
1894e8d42373SOleh Kravchenko 		/* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
1895e8d42373SOleh Kravchenko 		ts2->gen_ctrl_val  = 0x10e;
1896e8d42373SOleh Kravchenko 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1897e8d42373SOleh Kravchenko 		ts2->src_sel_val     = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1898e8d42373SOleh Kravchenko 		break;
1899b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1900b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
190146b21bbaSJames Harper 	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
1902b285192aSMauro Carvalho Chehab 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
1903b285192aSMauro Carvalho Chehab 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1904b285192aSMauro Carvalho Chehab 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1905b285192aSMauro Carvalho Chehab 		/* break omitted intentionally */
1906b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
1907b285192aSMauro Carvalho Chehab 		ts1->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
1908b285192aSMauro Carvalho Chehab 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1909b285192aSMauro Carvalho Chehab 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1910b285192aSMauro Carvalho Chehab 		break;
1911b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1850:
1912b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1800:
1913b285192aSMauro Carvalho Chehab 		/* Defaults for VID B - Analog encoder */
1914b285192aSMauro Carvalho Chehab 		/* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
1915b285192aSMauro Carvalho Chehab 		ts1->gen_ctrl_val    = 0x10e;
1916b285192aSMauro Carvalho Chehab 		ts1->ts_clk_en_val   = 0x1; /* Enable TS_CLK */
1917b285192aSMauro Carvalho Chehab 		ts1->src_sel_val     = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1918b285192aSMauro Carvalho Chehab 
1919b285192aSMauro Carvalho Chehab 		/* APB_TSVALERR_POL (active low)*/
1920b285192aSMauro Carvalho Chehab 		ts1->vld_misc_val    = 0x2000;
1921b285192aSMauro Carvalho Chehab 		ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
1922b285192aSMauro Carvalho Chehab 		cx_write(0x130184, 0xc);
1923b285192aSMauro Carvalho Chehab 
1924b285192aSMauro Carvalho Chehab 		/* Defaults for VID C */
1925b285192aSMauro Carvalho Chehab 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
1926b285192aSMauro Carvalho Chehab 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1927b285192aSMauro Carvalho Chehab 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1928b285192aSMauro Carvalho Chehab 		break;
1929b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TBS_6920:
1930b285192aSMauro Carvalho Chehab 		ts1->gen_ctrl_val  = 0x4; /* Parallel */
1931b285192aSMauro Carvalho Chehab 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1932b285192aSMauro Carvalho Chehab 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1933b285192aSMauro Carvalho Chehab 		break;
1934b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TEVII_S470:
1935b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TEVII_S471:
1936b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVBWORLD_2005:
1937f667190bSMariusz Bia?o?czyk 	case CX23885_BOARD_PROF_8000:
193882c10276SOlli Salonen 	case CX23885_BOARD_DVBSKY_T980C:
19390e6c7b01Snibble.max 	case CX23885_BOARD_DVBSKY_S950C:
194061b103e8SOlli Salonen 	case CX23885_BOARD_TT_CT2_4500_CI:
1941cba5480cSnibble.max 	case CX23885_BOARD_DVBSKY_S950:
1942b285192aSMauro Carvalho Chehab 		ts1->gen_ctrl_val  = 0x5; /* Parallel */
1943b285192aSMauro Carvalho Chehab 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1944b285192aSMauro Carvalho Chehab 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1945b285192aSMauro Carvalho Chehab 		break;
1946b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1947b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1948b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1949b285192aSMauro Carvalho Chehab 		ts1->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
1950b285192aSMauro Carvalho Chehab 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1951b285192aSMauro Carvalho Chehab 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1952b285192aSMauro Carvalho Chehab 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
1953b285192aSMauro Carvalho Chehab 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1954b285192aSMauro Carvalho Chehab 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1955b285192aSMauro Carvalho Chehab 		break;
1956e6001482SLuis Alves 	case CX23885_BOARD_TBS_6980:
1957e6001482SLuis Alves 	case CX23885_BOARD_TBS_6981:
1958e6001482SLuis Alves 		ts1->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
1959e6001482SLuis Alves 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1960e6001482SLuis Alves 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1961e6001482SLuis Alves 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
1962e6001482SLuis Alves 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1963e6001482SLuis Alves 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1964e6001482SLuis Alves 		tbs_card_init(dev);
1965e6001482SLuis Alves 		break;
1966b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MYGICA_X8506:
1967b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MAGICPRO_PROHDTVE2:
19680d1b5265SMauro Carvalho Chehab 	case CX23885_BOARD_MYGICA_X8507:
1969b285192aSMauro Carvalho Chehab 		ts1->gen_ctrl_val  = 0x5; /* Parallel */
1970b285192aSMauro Carvalho Chehab 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1971b285192aSMauro Carvalho Chehab 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1972b285192aSMauro Carvalho Chehab 		break;
1973b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MYGICA_X8558PRO:
1974b285192aSMauro Carvalho Chehab 		ts1->gen_ctrl_val  = 0x5; /* Parallel */
1975b285192aSMauro Carvalho Chehab 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1976b285192aSMauro Carvalho Chehab 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1977b285192aSMauro Carvalho Chehab 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
1978b285192aSMauro Carvalho Chehab 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1979b285192aSMauro Carvalho Chehab 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1980b285192aSMauro Carvalho Chehab 		break;
19817c62f5a1SMichael Krufky 	case CX23885_BOARD_HAUPPAUGE_HVR4400:
19827c62f5a1SMichael Krufky 		ts1->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
19837c62f5a1SMichael Krufky 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
19847c62f5a1SMichael Krufky 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
198536efec48SMatthias Schwarzott 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
198636efec48SMatthias Schwarzott 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
198736efec48SMatthias Schwarzott 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
19887c62f5a1SMichael Krufky 		break;
1989721f3223SMatthias Schwarzott 	case CX23885_BOARD_HAUPPAUGE_STARBURST:
1990721f3223SMatthias Schwarzott 		ts1->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
1991721f3223SMatthias Schwarzott 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1992721f3223SMatthias Schwarzott 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1993721f3223SMatthias Schwarzott 		break;
199429442266SOlli Salonen 	case CX23885_BOARD_DVBSKY_T9580:
1995c02ef64aSNibble Max 	case CX23885_BOARD_DVBSKY_T982:
199629442266SOlli Salonen 		ts1->gen_ctrl_val  = 0x5; /* Parallel */
199729442266SOlli Salonen 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
199829442266SOlli Salonen 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
199929442266SOlli Salonen 		ts2->gen_ctrl_val  = 0x8; /* Serial bus */
200029442266SOlli Salonen 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
200129442266SOlli Salonen 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
200229442266SOlli Salonen 		break;
2003c29d6a83Snibble.max 	case CX23885_BOARD_DVBSKY_S952:
2004c29d6a83Snibble.max 		ts1->gen_ctrl_val  = 0x5; /* Parallel */
2005c29d6a83Snibble.max 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2006c29d6a83Snibble.max 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2007c29d6a83Snibble.max 		ts2->gen_ctrl_val  = 0xe; /* Serial bus */
2008c29d6a83Snibble.max 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2009c29d6a83Snibble.max 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2010c29d6a83Snibble.max 		break;
2011b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1250:
2012b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500:
2013b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
2014b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
2015b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1200:
2016b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1700:
2017b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1400:
2018cce11b09SHans Verkuil 	case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE:
2019b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
2020642ca1a0SAnca Emanuel 	case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
2021b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
2022b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
2023b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1270:
2024b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1275:
2025b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255:
2026b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
2027b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1210:
2028b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
2029b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1290:
2030b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
2031b285192aSMauro Carvalho Chehab 	default:
2032b285192aSMauro Carvalho Chehab 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
2033b285192aSMauro Carvalho Chehab 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2034b285192aSMauro Carvalho Chehab 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2035b285192aSMauro Carvalho Chehab 	}
2036b285192aSMauro Carvalho Chehab 
2037b285192aSMauro Carvalho Chehab 	/* Certain boards support analog, or require the avcore to be
2038b285192aSMauro Carvalho Chehab 	 * loaded, ensure this happens.
2039b285192aSMauro Carvalho Chehab 	 */
2040b285192aSMauro Carvalho Chehab 	switch (dev->board) {
2041b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TEVII_S470:
2042b285192aSMauro Carvalho Chehab 		/* Currently only enabled for the integrated IR controller */
2043b285192aSMauro Carvalho Chehab 		if (!enable_885_ir)
2044b285192aSMauro Carvalho Chehab 			break;
2045b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1250:
2046b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1800:
2047cce11b09SHans Verkuil 	case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE:
2048b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
2049b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1700:
2050b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
2051642ca1a0SAnca Emanuel 	case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
2052b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
2053b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
2054b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
2055b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
2056b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
2057b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255:
2058b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
2059b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1270:
2060b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1850:
2061b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MYGICA_X8506:
2062b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MAGICPRO_PROHDTVE2:
2063b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1290:
2064b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
2065b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
2066b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500:
2067b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MPX885:
2068b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MYGICA_X8507:
2069b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
2070e8d42373SOleh Kravchenko 	case CX23885_BOARD_AVERMEDIA_HC81R:
2071e6001482SLuis Alves 	case CX23885_BOARD_TBS_6980:
2072e6001482SLuis Alves 	case CX23885_BOARD_TBS_6981:
207329442266SOlli Salonen 	case CX23885_BOARD_DVBSKY_T9580:
207482c10276SOlli Salonen 	case CX23885_BOARD_DVBSKY_T980C:
20750e6c7b01Snibble.max 	case CX23885_BOARD_DVBSKY_S950C:
207661b103e8SOlli Salonen 	case CX23885_BOARD_TT_CT2_4500_CI:
2077cba5480cSnibble.max 	case CX23885_BOARD_DVBSKY_S950:
2078c29d6a83Snibble.max 	case CX23885_BOARD_DVBSKY_S952:
2079c02ef64aSNibble Max 	case CX23885_BOARD_DVBSKY_T982:
2080b285192aSMauro Carvalho Chehab 		dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
2081b285192aSMauro Carvalho Chehab 				&dev->i2c_bus[2].i2c_adap,
2082b285192aSMauro Carvalho Chehab 				"cx25840", 0x88 >> 1, NULL);
2083b285192aSMauro Carvalho Chehab 		if (dev->sd_cx25840) {
2084b285192aSMauro Carvalho Chehab 			dev->sd_cx25840->grp_id = CX23885_HW_AV_CORE;
2085b285192aSMauro Carvalho Chehab 			v4l2_subdev_call(dev->sd_cx25840, core, load_fw);
2086b285192aSMauro Carvalho Chehab 		}
2087b285192aSMauro Carvalho Chehab 		break;
2088b285192aSMauro Carvalho Chehab 	}
2089b285192aSMauro Carvalho Chehab 
2090b285192aSMauro Carvalho Chehab 	/* AUX-PLL 27MHz CLK */
2091b285192aSMauro Carvalho Chehab 	switch (dev->board) {
2092b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
2093b285192aSMauro Carvalho Chehab 		netup_initialize(dev);
2094b285192aSMauro Carvalho Chehab 		break;
2095b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: {
2096b285192aSMauro Carvalho Chehab 		int ret;
2097b285192aSMauro Carvalho Chehab 		const struct firmware *fw;
2098b285192aSMauro Carvalho Chehab 		const char *filename = "dvb-netup-altera-01.fw";
2099b285192aSMauro Carvalho Chehab 		char *action = "configure";
2100b285192aSMauro Carvalho Chehab 		static struct netup_card_info cinfo;
2101b285192aSMauro Carvalho Chehab 		struct altera_config netup_config = {
2102b285192aSMauro Carvalho Chehab 			.dev = dev,
2103b285192aSMauro Carvalho Chehab 			.action = action,
2104b285192aSMauro Carvalho Chehab 			.jtag_io = netup_jtag_io,
2105b285192aSMauro Carvalho Chehab 		};
2106b285192aSMauro Carvalho Chehab 
2107b285192aSMauro Carvalho Chehab 		netup_initialize(dev);
2108b285192aSMauro Carvalho Chehab 
2109b285192aSMauro Carvalho Chehab 		netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo);
2110b285192aSMauro Carvalho Chehab 		if (netup_card_rev)
2111b285192aSMauro Carvalho Chehab 			cinfo.rev = netup_card_rev;
2112b285192aSMauro Carvalho Chehab 
2113b285192aSMauro Carvalho Chehab 		switch (cinfo.rev) {
2114b285192aSMauro Carvalho Chehab 		case 0x4:
2115b285192aSMauro Carvalho Chehab 			filename = "dvb-netup-altera-04.fw";
2116b285192aSMauro Carvalho Chehab 			break;
2117b285192aSMauro Carvalho Chehab 		default:
2118b285192aSMauro Carvalho Chehab 			filename = "dvb-netup-altera-01.fw";
2119b285192aSMauro Carvalho Chehab 			break;
2120b285192aSMauro Carvalho Chehab 		}
2121b285192aSMauro Carvalho Chehab 		printk(KERN_INFO "NetUP card rev=0x%x fw_filename=%s\n",
2122b285192aSMauro Carvalho Chehab 				cinfo.rev, filename);
2123b285192aSMauro Carvalho Chehab 
2124b285192aSMauro Carvalho Chehab 		ret = request_firmware(&fw, filename, &dev->pci->dev);
2125b285192aSMauro Carvalho Chehab 		if (ret != 0)
2126b285192aSMauro Carvalho Chehab 			printk(KERN_ERR "did not find the firmware file. (%s) "
2127b285192aSMauro Carvalho Chehab 			"Please see linux/Documentation/dvb/ for more details "
2128b285192aSMauro Carvalho Chehab 			"on firmware-problems.", filename);
2129b285192aSMauro Carvalho Chehab 		else
2130b285192aSMauro Carvalho Chehab 			altera_init(&netup_config, fw);
2131b285192aSMauro Carvalho Chehab 
2132b285192aSMauro Carvalho Chehab 		release_firmware(fw);
2133b285192aSMauro Carvalho Chehab 		break;
2134b285192aSMauro Carvalho Chehab 	}
2135b285192aSMauro Carvalho Chehab 	}
2136b285192aSMauro Carvalho Chehab }
2137