1b285192aSMauro Carvalho Chehab /*
2b285192aSMauro Carvalho Chehab  *  Driver for the Conexant CX23885 PCIe bridge
3b285192aSMauro Carvalho Chehab  *
4b285192aSMauro Carvalho Chehab  *  Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
5b285192aSMauro Carvalho Chehab  *
6b285192aSMauro Carvalho Chehab  *  This program is free software; you can redistribute it and/or modify
7b285192aSMauro Carvalho Chehab  *  it under the terms of the GNU General Public License as published by
8b285192aSMauro Carvalho Chehab  *  the Free Software Foundation; either version 2 of the License, or
9b285192aSMauro Carvalho Chehab  *  (at your option) any later version.
10b285192aSMauro Carvalho Chehab  *
11b285192aSMauro Carvalho Chehab  *  This program is distributed in the hope that it will be useful,
12b285192aSMauro Carvalho Chehab  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
13b285192aSMauro Carvalho Chehab  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14b285192aSMauro Carvalho Chehab  *
15b285192aSMauro Carvalho Chehab  *  GNU General Public License for more details.
16b285192aSMauro Carvalho Chehab  *
17b285192aSMauro Carvalho Chehab  *  You should have received a copy of the GNU General Public License
18b285192aSMauro Carvalho Chehab  *  along with this program; if not, write to the Free Software
19b285192aSMauro Carvalho Chehab  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20b285192aSMauro Carvalho Chehab  */
21b285192aSMauro Carvalho Chehab 
22b285192aSMauro Carvalho Chehab #include <linux/init.h>
23b285192aSMauro Carvalho Chehab #include <linux/module.h>
24b285192aSMauro Carvalho Chehab #include <linux/pci.h>
25b285192aSMauro Carvalho Chehab #include <linux/delay.h>
26b285192aSMauro Carvalho Chehab #include <media/cx25840.h>
27b285192aSMauro Carvalho Chehab #include <linux/firmware.h>
28b285192aSMauro Carvalho Chehab #include <misc/altera.h>
29b285192aSMauro Carvalho Chehab 
30b285192aSMauro Carvalho Chehab #include "cx23885.h"
31b285192aSMauro Carvalho Chehab #include "tuner-xc2028.h"
32b285192aSMauro Carvalho Chehab #include "netup-eeprom.h"
33b285192aSMauro Carvalho Chehab #include "netup-init.h"
34b285192aSMauro Carvalho Chehab #include "altera-ci.h"
35b285192aSMauro Carvalho Chehab #include "xc4000.h"
36b285192aSMauro Carvalho Chehab #include "xc5000.h"
37b285192aSMauro Carvalho Chehab #include "cx23888-ir.h"
38b285192aSMauro Carvalho Chehab 
3989343055SAnton Nurkin static unsigned int netup_card_rev = 4;
40b285192aSMauro Carvalho Chehab module_param(netup_card_rev, int, 0644);
41b285192aSMauro Carvalho Chehab MODULE_PARM_DESC(netup_card_rev,
42b285192aSMauro Carvalho Chehab 		"NetUP Dual DVB-T/C CI card revision");
43b285192aSMauro Carvalho Chehab static unsigned int enable_885_ir;
44b285192aSMauro Carvalho Chehab module_param(enable_885_ir, int, 0644);
45b285192aSMauro Carvalho Chehab MODULE_PARM_DESC(enable_885_ir,
46b285192aSMauro Carvalho Chehab 		 "Enable integrated IR controller for supported\n"
47b285192aSMauro Carvalho Chehab 		 "\t\t    CX2388[57] boards that are wired for it:\n"
48b285192aSMauro Carvalho Chehab 		 "\t\t\tHVR-1250 (reported safe)\n"
49b285192aSMauro Carvalho Chehab 		 "\t\t\tTerraTec Cinergy T PCIe Dual (not well tested, appears to be safe)\n"
50b285192aSMauro Carvalho Chehab 		 "\t\t\tTeVii S470 (reported unsafe)\n"
51b285192aSMauro Carvalho Chehab 		 "\t\t    This can cause an interrupt storm with some cards.\n"
52b285192aSMauro Carvalho Chehab 		 "\t\t    Default: 0 [Disabled]");
53b285192aSMauro Carvalho Chehab 
54b285192aSMauro Carvalho Chehab /* ------------------------------------------------------------------ */
55b285192aSMauro Carvalho Chehab /* board config info                                                  */
56b285192aSMauro Carvalho Chehab 
57b285192aSMauro Carvalho Chehab struct cx23885_board cx23885_boards[] = {
58b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_UNKNOWN] = {
59b285192aSMauro Carvalho Chehab 		.name		= "UNKNOWN/GENERIC",
60b285192aSMauro Carvalho Chehab 		/* Ensure safe default for unknown boards */
61b285192aSMauro Carvalho Chehab 		.clk_freq       = 0,
62b285192aSMauro Carvalho Chehab 		.input          = {{
63b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
64b285192aSMauro Carvalho Chehab 			.vmux   = 0,
65b285192aSMauro Carvalho Chehab 		}, {
66b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE2,
67b285192aSMauro Carvalho Chehab 			.vmux   = 1,
68b285192aSMauro Carvalho Chehab 		}, {
69b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE3,
70b285192aSMauro Carvalho Chehab 			.vmux   = 2,
71b285192aSMauro Carvalho Chehab 		}, {
72b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE4,
73b285192aSMauro Carvalho Chehab 			.vmux   = 3,
74b285192aSMauro Carvalho Chehab 		} },
75b285192aSMauro Carvalho Chehab 	},
76b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
77b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1800lp",
78b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
79b285192aSMauro Carvalho Chehab 		.input          = {{
80b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
81b285192aSMauro Carvalho Chehab 			.vmux   = 0,
82b285192aSMauro Carvalho Chehab 			.gpio0  = 0xff00,
83b285192aSMauro Carvalho Chehab 		}, {
84b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_DEBUG,
85b285192aSMauro Carvalho Chehab 			.vmux   = 0,
86b285192aSMauro Carvalho Chehab 			.gpio0  = 0xff01,
87b285192aSMauro Carvalho Chehab 		}, {
88b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
89b285192aSMauro Carvalho Chehab 			.vmux   = 1,
90b285192aSMauro Carvalho Chehab 			.gpio0  = 0xff02,
91b285192aSMauro Carvalho Chehab 		}, {
92b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
93b285192aSMauro Carvalho Chehab 			.vmux   = 2,
94b285192aSMauro Carvalho Chehab 			.gpio0  = 0xff02,
95b285192aSMauro Carvalho Chehab 		} },
96b285192aSMauro Carvalho Chehab 	},
97b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1800] = {
98b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1800",
99b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
100b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_ENCODER,
101b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
102b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_PHILIPS_TDA8290,
103b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x42, /* 0x84 >> 1 */
104b285192aSMauro Carvalho Chehab 		.tuner_bus	= 1,
105b285192aSMauro Carvalho Chehab 		.input          = {{
106b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
107b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
108b285192aSMauro Carvalho Chehab 					CX25840_VIN5_CH2 |
109b285192aSMauro Carvalho Chehab 					CX25840_VIN2_CH1,
110b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO8,
111b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
112b285192aSMauro Carvalho Chehab 		}, {
113b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
114b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
115b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
116b285192aSMauro Carvalho Chehab 					CX25840_VIN6_CH1,
117b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
118b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
119b285192aSMauro Carvalho Chehab 		}, {
120b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
121b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
122b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
123b285192aSMauro Carvalho Chehab 					CX25840_VIN8_CH1 |
124b285192aSMauro Carvalho Chehab 					CX25840_SVIDEO_ON,
125b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
126b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
127b285192aSMauro Carvalho Chehab 		} },
128b285192aSMauro Carvalho Chehab 	},
129b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1250] = {
130b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1250",
131b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
132b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
133b285192aSMauro Carvalho Chehab #ifdef MT2131_NO_ANALOG_SUPPORT_YET
134b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_PHILIPS_TDA8290,
135b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x42, /* 0x84 >> 1 */
136b285192aSMauro Carvalho Chehab 		.tuner_bus	= 1,
137b285192aSMauro Carvalho Chehab #endif
138b285192aSMauro Carvalho Chehab 		.force_bff	= 1,
139b285192aSMauro Carvalho Chehab 		.input          = {{
140b285192aSMauro Carvalho Chehab #ifdef MT2131_NO_ANALOG_SUPPORT_YET
141b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
142b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
143b285192aSMauro Carvalho Chehab 					CX25840_VIN5_CH2 |
144b285192aSMauro Carvalho Chehab 					CX25840_VIN2_CH1,
145b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO8,
146b285192aSMauro Carvalho Chehab 			.gpio0  = 0xff00,
147b285192aSMauro Carvalho Chehab 		}, {
148b285192aSMauro Carvalho Chehab #endif
149b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
150b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
151b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
152b285192aSMauro Carvalho Chehab 					CX25840_VIN6_CH1,
153b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
154b285192aSMauro Carvalho Chehab 			.gpio0  = 0xff02,
155b285192aSMauro Carvalho Chehab 		}, {
156b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
157b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
158b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
159b285192aSMauro Carvalho Chehab 					CX25840_VIN8_CH1 |
160b285192aSMauro Carvalho Chehab 					CX25840_SVIDEO_ON,
161b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
162b285192aSMauro Carvalho Chehab 			.gpio0  = 0xff02,
163b285192aSMauro Carvalho Chehab 		} },
164b285192aSMauro Carvalho Chehab 	},
165b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
166b285192aSMauro Carvalho Chehab 		.name		= "DViCO FusionHDTV5 Express",
167b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
168b285192aSMauro Carvalho Chehab 	},
169b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
170b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1500Q",
171b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
172b285192aSMauro Carvalho Chehab 	},
173b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1500] = {
174b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1500",
175b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
176b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
177b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_XC2028,
178b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x61, /* 0xc2 >> 1 */
179b285192aSMauro Carvalho Chehab 		.input          = {{
180b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
181b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
182b285192aSMauro Carvalho Chehab 					CX25840_VIN5_CH2 |
183b285192aSMauro Carvalho Chehab 					CX25840_VIN2_CH1,
184b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
185b285192aSMauro Carvalho Chehab 		}, {
186b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
187b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
188b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
189b285192aSMauro Carvalho Chehab 					CX25840_VIN6_CH1,
190b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
191b285192aSMauro Carvalho Chehab 		}, {
192b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
193b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
194b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
195b285192aSMauro Carvalho Chehab 					CX25840_VIN8_CH1 |
196b285192aSMauro Carvalho Chehab 					CX25840_SVIDEO_ON,
197b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
198b285192aSMauro Carvalho Chehab 		} },
199b285192aSMauro Carvalho Chehab 	},
200b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1200] = {
201b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1200",
202b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
203b285192aSMauro Carvalho Chehab 	},
204b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1700] = {
205b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1700",
206b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
207b285192aSMauro Carvalho Chehab 	},
208b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1400] = {
209b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1400",
210b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
211b285192aSMauro Carvalho Chehab 	},
212b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
213b285192aSMauro Carvalho Chehab 		.name		= "DViCO FusionHDTV7 Dual Express",
214b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
215b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
216b285192aSMauro Carvalho Chehab 	},
217b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
218b285192aSMauro Carvalho Chehab 		.name		= "DViCO FusionHDTV DVB-T Dual Express",
219b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
220b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
221b285192aSMauro Carvalho Chehab 	},
222b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
223b285192aSMauro Carvalho Chehab 		.name		= "Leadtek Winfast PxDVR3200 H",
224b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
225b285192aSMauro Carvalho Chehab 	},
226642ca1a0SAnca Emanuel 	[CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200] = {
227642ca1a0SAnca Emanuel 		.name		= "Leadtek Winfast PxPVR2200",
228642ca1a0SAnca Emanuel 		.porta		= CX23885_ANALOG_VIDEO,
229642ca1a0SAnca Emanuel 		.tuner_type	= TUNER_XC2028,
230642ca1a0SAnca Emanuel 		.tuner_addr	= 0x61,
231642ca1a0SAnca Emanuel 		.tuner_bus	= 1,
232642ca1a0SAnca Emanuel 		.input		= {{
233642ca1a0SAnca Emanuel 			.type	= CX23885_VMUX_TELEVISION,
234642ca1a0SAnca Emanuel 			.vmux	= CX25840_VIN2_CH1 |
235642ca1a0SAnca Emanuel 				  CX25840_VIN5_CH2,
236642ca1a0SAnca Emanuel 			.amux	= CX25840_AUDIO8,
237642ca1a0SAnca Emanuel 			.gpio0	= 0x704040,
238642ca1a0SAnca Emanuel 		}, {
239642ca1a0SAnca Emanuel 			.type	= CX23885_VMUX_COMPOSITE1,
240642ca1a0SAnca Emanuel 			.vmux	= CX25840_COMPOSITE1,
241642ca1a0SAnca Emanuel 			.amux	= CX25840_AUDIO7,
242642ca1a0SAnca Emanuel 			.gpio0	= 0x704040,
243642ca1a0SAnca Emanuel 		}, {
244642ca1a0SAnca Emanuel 			.type	= CX23885_VMUX_SVIDEO,
245642ca1a0SAnca Emanuel 			.vmux	= CX25840_SVIDEO_LUMA3 |
246642ca1a0SAnca Emanuel 				  CX25840_SVIDEO_CHROMA4,
247642ca1a0SAnca Emanuel 			.amux	= CX25840_AUDIO7,
248642ca1a0SAnca Emanuel 			.gpio0	= 0x704040,
249642ca1a0SAnca Emanuel 		}, {
250642ca1a0SAnca Emanuel 			.type	= CX23885_VMUX_COMPONENT,
251642ca1a0SAnca Emanuel 			.vmux	= CX25840_VIN7_CH1 |
252642ca1a0SAnca Emanuel 				  CX25840_VIN6_CH2 |
253642ca1a0SAnca Emanuel 				  CX25840_VIN8_CH3 |
254642ca1a0SAnca Emanuel 				  CX25840_COMPONENT_ON,
255642ca1a0SAnca Emanuel 			.amux	= CX25840_AUDIO7,
256642ca1a0SAnca Emanuel 			.gpio0	= 0x704040,
257642ca1a0SAnca Emanuel 		} },
258642ca1a0SAnca Emanuel 	},
259b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000] = {
260b285192aSMauro Carvalho Chehab 		.name		= "Leadtek Winfast PxDVR3200 H XC4000",
261b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
262b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
263b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_XC4000,
264b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x61,
265b285192aSMauro Carvalho Chehab 		.radio_type	= UNSET,
266b285192aSMauro Carvalho Chehab 		.radio_addr	= ADDR_UNSET,
267b285192aSMauro Carvalho Chehab 		.input		= {{
268b285192aSMauro Carvalho Chehab 			.type	= CX23885_VMUX_TELEVISION,
269b285192aSMauro Carvalho Chehab 			.vmux	= CX25840_VIN2_CH1 |
270b285192aSMauro Carvalho Chehab 				  CX25840_VIN5_CH2 |
271b285192aSMauro Carvalho Chehab 				  CX25840_NONE0_CH3,
272b285192aSMauro Carvalho Chehab 		}, {
273b285192aSMauro Carvalho Chehab 			.type	= CX23885_VMUX_COMPOSITE1,
274b285192aSMauro Carvalho Chehab 			.vmux	= CX25840_COMPOSITE1,
275b285192aSMauro Carvalho Chehab 		}, {
276b285192aSMauro Carvalho Chehab 			.type	= CX23885_VMUX_SVIDEO,
277b285192aSMauro Carvalho Chehab 			.vmux	= CX25840_SVIDEO_LUMA3 |
278b285192aSMauro Carvalho Chehab 				  CX25840_SVIDEO_CHROMA4,
279b285192aSMauro Carvalho Chehab 		}, {
280b285192aSMauro Carvalho Chehab 			.type	= CX23885_VMUX_COMPONENT,
281b285192aSMauro Carvalho Chehab 			.vmux	= CX25840_VIN7_CH1 |
282b285192aSMauro Carvalho Chehab 				  CX25840_VIN6_CH2 |
283b285192aSMauro Carvalho Chehab 				  CX25840_VIN8_CH3 |
284b285192aSMauro Carvalho Chehab 				  CX25840_COMPONENT_ON,
285b285192aSMauro Carvalho Chehab 		} },
286b285192aSMauro Carvalho Chehab 	},
287b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = {
288b285192aSMauro Carvalho Chehab 		.name		= "Compro VideoMate E650F",
289b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
290b285192aSMauro Carvalho Chehab 	},
291b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_TBS_6920] = {
292b285192aSMauro Carvalho Chehab 		.name		= "TurboSight TBS 6920",
293b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
294b285192aSMauro Carvalho Chehab 	},
295e6001482SLuis Alves 	[CX23885_BOARD_TBS_6980] = {
296e6001482SLuis Alves 		.name		= "TurboSight TBS 6980",
297e6001482SLuis Alves 		.portb		= CX23885_MPEG_DVB,
298e6001482SLuis Alves 		.portc		= CX23885_MPEG_DVB,
299e6001482SLuis Alves 	},
300e6001482SLuis Alves 	[CX23885_BOARD_TBS_6981] = {
301e6001482SLuis Alves 		.name		= "TurboSight TBS 6981",
302e6001482SLuis Alves 		.portb		= CX23885_MPEG_DVB,
303e6001482SLuis Alves 		.portc		= CX23885_MPEG_DVB,
304e6001482SLuis Alves 	},
305b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_TEVII_S470] = {
306b285192aSMauro Carvalho Chehab 		.name		= "TeVii S470",
307b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
308b285192aSMauro Carvalho Chehab 	},
309b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_DVBWORLD_2005] = {
310b285192aSMauro Carvalho Chehab 		.name		= "DVBWorld DVB-S2 2005",
311b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
312b285192aSMauro Carvalho Chehab 	},
313b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = {
314b285192aSMauro Carvalho Chehab 		.ci_type	= 1,
315b285192aSMauro Carvalho Chehab 		.name		= "NetUP Dual DVB-S2 CI",
316b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
317b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
318b285192aSMauro Carvalho Chehab 	},
319b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1270] = {
320b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1270",
321b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
322b285192aSMauro Carvalho Chehab 	},
323b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1275] = {
324b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1275",
325b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
326b285192aSMauro Carvalho Chehab 	},
327b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1255] = {
328b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1255",
329b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
330b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
331b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_ABSENT,
332b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x42, /* 0x84 >> 1 */
333b285192aSMauro Carvalho Chehab 		.force_bff	= 1,
334b285192aSMauro Carvalho Chehab 		.input          = {{
335b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
336b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
337b285192aSMauro Carvalho Chehab 					CX25840_VIN5_CH2 |
338b285192aSMauro Carvalho Chehab 					CX25840_VIN2_CH1 |
339b285192aSMauro Carvalho Chehab 					CX25840_DIF_ON,
340b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO8,
341b285192aSMauro Carvalho Chehab 		}, {
342b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
343b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
344b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
345b285192aSMauro Carvalho Chehab 					CX25840_VIN6_CH1,
346b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
347b285192aSMauro Carvalho Chehab 		}, {
348b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
349b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
350b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
351b285192aSMauro Carvalho Chehab 					CX25840_VIN8_CH1 |
352b285192aSMauro Carvalho Chehab 					CX25840_SVIDEO_ON,
353b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
354b285192aSMauro Carvalho Chehab 		} },
355b285192aSMauro Carvalho Chehab 	},
356b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1255_22111] = {
357b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1255",
358b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
359b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
360b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_ABSENT,
361b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x42, /* 0x84 >> 1 */
362b285192aSMauro Carvalho Chehab 		.force_bff	= 1,
363b285192aSMauro Carvalho Chehab 		.input          = {{
364b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
365b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
366b285192aSMauro Carvalho Chehab 					CX25840_VIN5_CH2 |
367b285192aSMauro Carvalho Chehab 					CX25840_VIN2_CH1 |
368b285192aSMauro Carvalho Chehab 					CX25840_DIF_ON,
369b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO8,
370b285192aSMauro Carvalho Chehab 		}, {
371b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
372b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
373b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
374b285192aSMauro Carvalho Chehab 					CX25840_VIN8_CH1 |
375b285192aSMauro Carvalho Chehab 					CX25840_SVIDEO_ON,
376b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
377b285192aSMauro Carvalho Chehab 		} },
378b285192aSMauro Carvalho Chehab 	},
379b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1210] = {
380b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1210",
381b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
382b285192aSMauro Carvalho Chehab 	},
383b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_MYGICA_X8506] = {
384b285192aSMauro Carvalho Chehab 		.name		= "Mygica X8506 DMB-TH",
385b285192aSMauro Carvalho Chehab 		.tuner_type = TUNER_XC5000,
386b285192aSMauro Carvalho Chehab 		.tuner_addr = 0x61,
387b285192aSMauro Carvalho Chehab 		.tuner_bus	= 1,
388b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
389b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
390b285192aSMauro Carvalho Chehab 		.input		= {
391b285192aSMauro Carvalho Chehab 			{
392b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_TELEVISION,
393b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPOSITE2,
394b285192aSMauro Carvalho Chehab 			},
395b285192aSMauro Carvalho Chehab 			{
396b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_COMPOSITE1,
397b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPOSITE8,
398b285192aSMauro Carvalho Chehab 			},
399b285192aSMauro Carvalho Chehab 			{
400b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_SVIDEO,
401b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_SVIDEO_LUMA3 |
402b285192aSMauro Carvalho Chehab 						CX25840_SVIDEO_CHROMA4,
403b285192aSMauro Carvalho Chehab 			},
404b285192aSMauro Carvalho Chehab 			{
405b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_COMPONENT,
406b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPONENT_ON |
407b285192aSMauro Carvalho Chehab 					CX25840_VIN1_CH1 |
408b285192aSMauro Carvalho Chehab 					CX25840_VIN6_CH2 |
409b285192aSMauro Carvalho Chehab 					CX25840_VIN7_CH3,
410b285192aSMauro Carvalho Chehab 			},
411b285192aSMauro Carvalho Chehab 		},
412b285192aSMauro Carvalho Chehab 	},
413b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_MAGICPRO_PROHDTVE2] = {
414b285192aSMauro Carvalho Chehab 		.name		= "Magic-Pro ProHDTV Extreme 2",
415b285192aSMauro Carvalho Chehab 		.tuner_type = TUNER_XC5000,
416b285192aSMauro Carvalho Chehab 		.tuner_addr = 0x61,
417b285192aSMauro Carvalho Chehab 		.tuner_bus	= 1,
418b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
419b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
420b285192aSMauro Carvalho Chehab 		.input		= {
421b285192aSMauro Carvalho Chehab 			{
422b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_TELEVISION,
423b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPOSITE2,
424b285192aSMauro Carvalho Chehab 			},
425b285192aSMauro Carvalho Chehab 			{
426b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_COMPOSITE1,
427b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPOSITE8,
428b285192aSMauro Carvalho Chehab 			},
429b285192aSMauro Carvalho Chehab 			{
430b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_SVIDEO,
431b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_SVIDEO_LUMA3 |
432b285192aSMauro Carvalho Chehab 						CX25840_SVIDEO_CHROMA4,
433b285192aSMauro Carvalho Chehab 			},
434b285192aSMauro Carvalho Chehab 			{
435b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_COMPONENT,
436b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPONENT_ON |
437b285192aSMauro Carvalho Chehab 					CX25840_VIN1_CH1 |
438b285192aSMauro Carvalho Chehab 					CX25840_VIN6_CH2 |
439b285192aSMauro Carvalho Chehab 					CX25840_VIN7_CH3,
440b285192aSMauro Carvalho Chehab 			},
441b285192aSMauro Carvalho Chehab 		},
442b285192aSMauro Carvalho Chehab 	},
443b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1850] = {
444b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1850",
445b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
446b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_ENCODER,
447b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
448b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_ABSENT,
449b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x42, /* 0x84 >> 1 */
450b285192aSMauro Carvalho Chehab 		.force_bff	= 1,
451b285192aSMauro Carvalho Chehab 		.input          = {{
452b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
453b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
454b285192aSMauro Carvalho Chehab 					CX25840_VIN5_CH2 |
455b285192aSMauro Carvalho Chehab 					CX25840_VIN2_CH1 |
456b285192aSMauro Carvalho Chehab 					CX25840_DIF_ON,
457b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO8,
458b285192aSMauro Carvalho Chehab 		}, {
459b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
460b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
461b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
462b285192aSMauro Carvalho Chehab 					CX25840_VIN6_CH1,
463b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
464b285192aSMauro Carvalho Chehab 		}, {
465b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
466b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
467b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
468b285192aSMauro Carvalho Chehab 					CX25840_VIN8_CH1 |
469b285192aSMauro Carvalho Chehab 					CX25840_SVIDEO_ON,
470b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
471b285192aSMauro Carvalho Chehab 		} },
472b285192aSMauro Carvalho Chehab 	},
473b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_COMPRO_VIDEOMATE_E800] = {
474b285192aSMauro Carvalho Chehab 		.name		= "Compro VideoMate E800",
475b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
476b285192aSMauro Carvalho Chehab 	},
477b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1290] = {
478b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1290",
479b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
480b285192aSMauro Carvalho Chehab 	},
481b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_MYGICA_X8558PRO] = {
482b285192aSMauro Carvalho Chehab 		.name		= "Mygica X8558 PRO DMB-TH",
483b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
484b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
485b285192aSMauro Carvalho Chehab 	},
486b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_LEADTEK_WINFAST_PXTV1200] = {
487b285192aSMauro Carvalho Chehab 		.name           = "LEADTEK WinFast PxTV1200",
488b285192aSMauro Carvalho Chehab 		.porta          = CX23885_ANALOG_VIDEO,
489b285192aSMauro Carvalho Chehab 		.tuner_type     = TUNER_XC2028,
490b285192aSMauro Carvalho Chehab 		.tuner_addr     = 0x61,
491b285192aSMauro Carvalho Chehab 		.tuner_bus	= 1,
492b285192aSMauro Carvalho Chehab 		.input          = {{
493b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
494b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_VIN2_CH1 |
495b285192aSMauro Carvalho Chehab 				  CX25840_VIN5_CH2 |
496b285192aSMauro Carvalho Chehab 				  CX25840_NONE0_CH3,
497b285192aSMauro Carvalho Chehab 		}, {
498b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
499b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_COMPOSITE1,
500b285192aSMauro Carvalho Chehab 		}, {
501b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
502b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_SVIDEO_LUMA3 |
503b285192aSMauro Carvalho Chehab 				  CX25840_SVIDEO_CHROMA4,
504b285192aSMauro Carvalho Chehab 		}, {
505b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPONENT,
506b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_VIN7_CH1 |
507b285192aSMauro Carvalho Chehab 				  CX25840_VIN6_CH2 |
508b285192aSMauro Carvalho Chehab 				  CX25840_VIN8_CH3 |
509b285192aSMauro Carvalho Chehab 				  CX25840_COMPONENT_ON,
510b285192aSMauro Carvalho Chehab 		} },
511b285192aSMauro Carvalho Chehab 	},
512b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_GOTVIEW_X5_3D_HYBRID] = {
513b285192aSMauro Carvalho Chehab 		.name		= "GoTView X5 3D Hybrid",
514b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_XC5000,
515b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x64,
516b285192aSMauro Carvalho Chehab 		.tuner_bus	= 1,
517b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
518b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
519b285192aSMauro Carvalho Chehab 		.input          = {{
520b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
521b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_VIN2_CH1 |
522b285192aSMauro Carvalho Chehab 				  CX25840_VIN5_CH2,
523b285192aSMauro Carvalho Chehab 			.gpio0	= 0x02,
524b285192aSMauro Carvalho Chehab 		}, {
525b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
526b285192aSMauro Carvalho Chehab 			.vmux   = CX23885_VMUX_COMPOSITE1,
527b285192aSMauro Carvalho Chehab 		}, {
528b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
529b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_SVIDEO_LUMA3 |
530b285192aSMauro Carvalho Chehab 				  CX25840_SVIDEO_CHROMA4,
531b285192aSMauro Carvalho Chehab 		} },
532b285192aSMauro Carvalho Chehab 	},
533b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF] = {
534b285192aSMauro Carvalho Chehab 		.ci_type	= 2,
535b285192aSMauro Carvalho Chehab 		.name		= "NetUP Dual DVB-T/C-CI RF",
536b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
537b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
538b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
539b285192aSMauro Carvalho Chehab 		.num_fds_portb	= 2,
540b285192aSMauro Carvalho Chehab 		.num_fds_portc	= 2,
541b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_XC5000,
542b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x64,
543b285192aSMauro Carvalho Chehab 		.input          = { {
544b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_TELEVISION,
545b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPOSITE1,
546b285192aSMauro Carvalho Chehab 		} },
547b285192aSMauro Carvalho Chehab 	},
548b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_MPX885] = {
549b285192aSMauro Carvalho Chehab 		.name		= "MPX-885",
550b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
551b285192aSMauro Carvalho Chehab 		.input          = {{
552b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
553b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_COMPOSITE1,
554b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO6,
555b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
556b285192aSMauro Carvalho Chehab 		}, {
557b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE2,
558b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_COMPOSITE2,
559b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO6,
560b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
561b285192aSMauro Carvalho Chehab 		}, {
562b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE3,
563b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_COMPOSITE3,
564b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
565b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
566b285192aSMauro Carvalho Chehab 		}, {
567b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE4,
568b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_COMPOSITE4,
569b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
570b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
571b285192aSMauro Carvalho Chehab 		} },
572b285192aSMauro Carvalho Chehab 	},
573b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_MYGICA_X8507] = {
5740d1b5265SMauro Carvalho Chehab 		.name		= "Mygica X8502/X8507 ISDB-T",
575b285192aSMauro Carvalho Chehab 		.tuner_type = TUNER_XC5000,
576b285192aSMauro Carvalho Chehab 		.tuner_addr = 0x61,
577b285192aSMauro Carvalho Chehab 		.tuner_bus	= 1,
578b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
5790d1b5265SMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
580b285192aSMauro Carvalho Chehab 		.input		= {
581b285192aSMauro Carvalho Chehab 			{
582b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_TELEVISION,
583b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPOSITE2,
584b285192aSMauro Carvalho Chehab 				.amux   = CX25840_AUDIO8,
585b285192aSMauro Carvalho Chehab 			},
586b285192aSMauro Carvalho Chehab 			{
587b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_COMPOSITE1,
588b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPOSITE8,
589082c0576SAlfredo Jesús Delaiti 				.amux   = CX25840_AUDIO7,
590b285192aSMauro Carvalho Chehab 			},
591b285192aSMauro Carvalho Chehab 			{
592b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_SVIDEO,
593b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_SVIDEO_LUMA3 |
594b285192aSMauro Carvalho Chehab 						CX25840_SVIDEO_CHROMA4,
595082c0576SAlfredo Jesús Delaiti 				.amux   = CX25840_AUDIO7,
596b285192aSMauro Carvalho Chehab 			},
597b285192aSMauro Carvalho Chehab 			{
598b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_COMPONENT,
599b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPONENT_ON |
600b285192aSMauro Carvalho Chehab 					CX25840_VIN1_CH1 |
601b285192aSMauro Carvalho Chehab 					CX25840_VIN6_CH2 |
602b285192aSMauro Carvalho Chehab 					CX25840_VIN7_CH3,
603082c0576SAlfredo Jesús Delaiti 				.amux   = CX25840_AUDIO7,
604b285192aSMauro Carvalho Chehab 			},
605b285192aSMauro Carvalho Chehab 		},
606b285192aSMauro Carvalho Chehab 	},
607b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL] = {
608b285192aSMauro Carvalho Chehab 		.name		= "TerraTec Cinergy T PCIe Dual",
609b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
610b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
611b285192aSMauro Carvalho Chehab 	},
612b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_TEVII_S471] = {
613b285192aSMauro Carvalho Chehab 		.name		= "TeVii S471",
614b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
615f667190bSMariusz Bia?o?czyk 	},
616f667190bSMariusz Bia?o?czyk 	[CX23885_BOARD_PROF_8000] = {
617f667190bSMariusz Bia?o?czyk 		.name		= "Prof Revolution DVB-S2 8000",
618f667190bSMariusz Bia?o?czyk 		.portb		= CX23885_MPEG_DVB,
6197c62f5a1SMichael Krufky 	},
6207c62f5a1SMichael Krufky 	[CX23885_BOARD_HAUPPAUGE_HVR4400] = {
6217c62f5a1SMichael Krufky 		.name		= "Hauppauge WinTV-HVR4400",
6227c62f5a1SMichael Krufky 		.portb		= CX23885_MPEG_DVB,
6237c62f5a1SMichael Krufky 	},
624e8d42373SOleh Kravchenko 	[CX23885_BOARD_AVERMEDIA_HC81R] = {
625e8d42373SOleh Kravchenko 		.name		= "AVerTV Hybrid Express Slim HC81R",
626e8d42373SOleh Kravchenko 		.tuner_type	= TUNER_XC2028,
627e8d42373SOleh Kravchenko 		.tuner_addr	= 0x61, /* 0xc2 >> 1 */
628e8d42373SOleh Kravchenko 		.tuner_bus	= 1,
629e8d42373SOleh Kravchenko 		.porta		= CX23885_ANALOG_VIDEO,
630e8d42373SOleh Kravchenko 		.input          = {{
631e8d42373SOleh Kravchenko 			.type   = CX23885_VMUX_TELEVISION,
632e8d42373SOleh Kravchenko 			.vmux   = CX25840_VIN2_CH1 |
633e8d42373SOleh Kravchenko 				  CX25840_VIN5_CH2 |
634e8d42373SOleh Kravchenko 				  CX25840_NONE0_CH3 |
635e8d42373SOleh Kravchenko 				  CX25840_NONE1_CH3,
636e8d42373SOleh Kravchenko 			.amux   = CX25840_AUDIO8,
637e8d42373SOleh Kravchenko 		}, {
638e8d42373SOleh Kravchenko 			.type   = CX23885_VMUX_SVIDEO,
639e8d42373SOleh Kravchenko 			.vmux   = CX25840_VIN8_CH1 |
640e8d42373SOleh Kravchenko 				  CX25840_NONE_CH2 |
641e8d42373SOleh Kravchenko 				  CX25840_VIN7_CH3 |
642e8d42373SOleh Kravchenko 				  CX25840_SVIDEO_ON,
643e8d42373SOleh Kravchenko 			.amux   = CX25840_AUDIO6,
644e8d42373SOleh Kravchenko 		}, {
645e8d42373SOleh Kravchenko 			.type   = CX23885_VMUX_COMPONENT,
646e8d42373SOleh Kravchenko 			.vmux   = CX25840_VIN1_CH1 |
647e8d42373SOleh Kravchenko 				  CX25840_NONE_CH2 |
648e8d42373SOleh Kravchenko 				  CX25840_NONE0_CH3 |
649e8d42373SOleh Kravchenko 				  CX25840_NONE1_CH3,
650e8d42373SOleh Kravchenko 			.amux   = CX25840_AUDIO6,
651e8d42373SOleh Kravchenko 		} },
652e8d42373SOleh Kravchenko 	}
653b285192aSMauro Carvalho Chehab };
654b285192aSMauro Carvalho Chehab const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
655b285192aSMauro Carvalho Chehab 
656b285192aSMauro Carvalho Chehab /* ------------------------------------------------------------------ */
657b285192aSMauro Carvalho Chehab /* PCI subsystem IDs                                                  */
658b285192aSMauro Carvalho Chehab 
659b285192aSMauro Carvalho Chehab struct cx23885_subid cx23885_subids[] = {
660b285192aSMauro Carvalho Chehab 	{
661b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
662b285192aSMauro Carvalho Chehab 		.subdevice = 0x3400,
663b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_UNKNOWN,
664b285192aSMauro Carvalho Chehab 	}, {
665b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
666b285192aSMauro Carvalho Chehab 		.subdevice = 0x7600,
667b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
668b285192aSMauro Carvalho Chehab 	}, {
669b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
670b285192aSMauro Carvalho Chehab 		.subdevice = 0x7800,
671b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1800,
672b285192aSMauro Carvalho Chehab 	}, {
673b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
674b285192aSMauro Carvalho Chehab 		.subdevice = 0x7801,
675b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1800,
676b285192aSMauro Carvalho Chehab 	}, {
677b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
678b285192aSMauro Carvalho Chehab 		.subdevice = 0x7809,
679b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1800,
680b285192aSMauro Carvalho Chehab 	}, {
681b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
682b285192aSMauro Carvalho Chehab 		.subdevice = 0x7911,
683b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1250,
684b285192aSMauro Carvalho Chehab 	}, {
685b285192aSMauro Carvalho Chehab 		.subvendor = 0x18ac,
686b285192aSMauro Carvalho Chehab 		.subdevice = 0xd500,
687b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
688b285192aSMauro Carvalho Chehab 	}, {
689b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
690b285192aSMauro Carvalho Chehab 		.subdevice = 0x7790,
691b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
692b285192aSMauro Carvalho Chehab 	}, {
693b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
694b285192aSMauro Carvalho Chehab 		.subdevice = 0x7797,
695b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
696b285192aSMauro Carvalho Chehab 	}, {
697b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
698b285192aSMauro Carvalho Chehab 		.subdevice = 0x7710,
699b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1500,
700b285192aSMauro Carvalho Chehab 	}, {
701b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
702b285192aSMauro Carvalho Chehab 		.subdevice = 0x7717,
703b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1500,
704b285192aSMauro Carvalho Chehab 	}, {
705b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
706b285192aSMauro Carvalho Chehab 		.subdevice = 0x71d1,
707b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1200,
708b285192aSMauro Carvalho Chehab 	}, {
709b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
710b285192aSMauro Carvalho Chehab 		.subdevice = 0x71d3,
711b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1200,
712b285192aSMauro Carvalho Chehab 	}, {
713b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
714b285192aSMauro Carvalho Chehab 		.subdevice = 0x8101,
715b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1700,
716b285192aSMauro Carvalho Chehab 	}, {
717b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
718b285192aSMauro Carvalho Chehab 		.subdevice = 0x8010,
719b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1400,
720b285192aSMauro Carvalho Chehab 	}, {
721b285192aSMauro Carvalho Chehab 		.subvendor = 0x18ac,
722b285192aSMauro Carvalho Chehab 		.subdevice = 0xd618,
723b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
724b285192aSMauro Carvalho Chehab 	}, {
725b285192aSMauro Carvalho Chehab 		.subvendor = 0x18ac,
726b285192aSMauro Carvalho Chehab 		.subdevice = 0xdb78,
727b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
728b285192aSMauro Carvalho Chehab 	}, {
729b285192aSMauro Carvalho Chehab 		.subvendor = 0x107d,
730b285192aSMauro Carvalho Chehab 		.subdevice = 0x6681,
731b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
732b285192aSMauro Carvalho Chehab 	}, {
733b285192aSMauro Carvalho Chehab 		.subvendor = 0x107d,
734642ca1a0SAnca Emanuel 		.subdevice = 0x6f21,
735642ca1a0SAnca Emanuel 		.card      = CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200,
736642ca1a0SAnca Emanuel 	}, {
737642ca1a0SAnca Emanuel 		.subvendor = 0x107d,
738b285192aSMauro Carvalho Chehab 		.subdevice = 0x6f39,
739b285192aSMauro Carvalho Chehab 		.card	   = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000,
740b285192aSMauro Carvalho Chehab 	}, {
741b285192aSMauro Carvalho Chehab 		.subvendor = 0x185b,
742b285192aSMauro Carvalho Chehab 		.subdevice = 0xe800,
743b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_COMPRO_VIDEOMATE_E650F,
744b285192aSMauro Carvalho Chehab 	}, {
745b285192aSMauro Carvalho Chehab 		.subvendor = 0x6920,
746b285192aSMauro Carvalho Chehab 		.subdevice = 0x8888,
747b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_TBS_6920,
748b285192aSMauro Carvalho Chehab 	}, {
749e6001482SLuis Alves 		.subvendor = 0x6980,
750e6001482SLuis Alves 		.subdevice = 0x8888,
751e6001482SLuis Alves 		.card      = CX23885_BOARD_TBS_6980,
752e6001482SLuis Alves 	}, {
753e6001482SLuis Alves 		.subvendor = 0x6981,
754e6001482SLuis Alves 		.subdevice = 0x8888,
755e6001482SLuis Alves 		.card      = CX23885_BOARD_TBS_6981,
756e6001482SLuis Alves 	}, {
757b285192aSMauro Carvalho Chehab 		.subvendor = 0xd470,
758b285192aSMauro Carvalho Chehab 		.subdevice = 0x9022,
759b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_TEVII_S470,
760b285192aSMauro Carvalho Chehab 	}, {
761b285192aSMauro Carvalho Chehab 		.subvendor = 0x0001,
762b285192aSMauro Carvalho Chehab 		.subdevice = 0x2005,
763b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_DVBWORLD_2005,
764b285192aSMauro Carvalho Chehab 	}, {
765b285192aSMauro Carvalho Chehab 		.subvendor = 0x1b55,
766b285192aSMauro Carvalho Chehab 		.subdevice = 0x2a2c,
767b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_NETUP_DUAL_DVBS2_CI,
768b285192aSMauro Carvalho Chehab 	}, {
769b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
770b285192aSMauro Carvalho Chehab 		.subdevice = 0x2211,
771b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1270,
772b285192aSMauro Carvalho Chehab 	}, {
773b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
774b285192aSMauro Carvalho Chehab 		.subdevice = 0x2215,
775b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1275,
776b285192aSMauro Carvalho Chehab 	}, {
777b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
778b285192aSMauro Carvalho Chehab 		.subdevice = 0x221d,
779b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1275,
780b285192aSMauro Carvalho Chehab 	}, {
781b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
782b285192aSMauro Carvalho Chehab 		.subdevice = 0x2251,
783b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1255,
784b285192aSMauro Carvalho Chehab 	}, {
785b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
786b285192aSMauro Carvalho Chehab 		.subdevice = 0x2259,
787b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1255_22111,
788b285192aSMauro Carvalho Chehab 	}, {
789b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
790b285192aSMauro Carvalho Chehab 		.subdevice = 0x2291,
791b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210,
792b285192aSMauro Carvalho Chehab 	}, {
793b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
794b285192aSMauro Carvalho Chehab 		.subdevice = 0x2295,
795b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210,
796b285192aSMauro Carvalho Chehab 	}, {
797b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
798b285192aSMauro Carvalho Chehab 		.subdevice = 0x2299,
799b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210,
800b285192aSMauro Carvalho Chehab 	}, {
801b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
802b285192aSMauro Carvalho Chehab 		.subdevice = 0x229d,
803b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
804b285192aSMauro Carvalho Chehab 	}, {
805b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
806b285192aSMauro Carvalho Chehab 		.subdevice = 0x22f0,
807b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210,
808b285192aSMauro Carvalho Chehab 	}, {
809b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
810b285192aSMauro Carvalho Chehab 		.subdevice = 0x22f1,
811b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1255,
812b285192aSMauro Carvalho Chehab 	}, {
813b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
814b285192aSMauro Carvalho Chehab 		.subdevice = 0x22f2,
815b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1275,
816b285192aSMauro Carvalho Chehab 	}, {
817b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
818b285192aSMauro Carvalho Chehab 		.subdevice = 0x22f3,
819b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
820b285192aSMauro Carvalho Chehab 	}, {
821b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
822b285192aSMauro Carvalho Chehab 		.subdevice = 0x22f4,
823b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210,
824b285192aSMauro Carvalho Chehab 	}, {
825b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
826b285192aSMauro Carvalho Chehab 		.subdevice = 0x22f5,
827b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
828b285192aSMauro Carvalho Chehab 	}, {
829b285192aSMauro Carvalho Chehab 		.subvendor = 0x14f1,
830b285192aSMauro Carvalho Chehab 		.subdevice = 0x8651,
831b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_MYGICA_X8506,
832b285192aSMauro Carvalho Chehab 	}, {
833b285192aSMauro Carvalho Chehab 		.subvendor = 0x14f1,
834b285192aSMauro Carvalho Chehab 		.subdevice = 0x8657,
835b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_MAGICPRO_PROHDTVE2,
836b285192aSMauro Carvalho Chehab 	}, {
837b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
838b285192aSMauro Carvalho Chehab 		.subdevice = 0x8541,
839b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1850,
840b285192aSMauro Carvalho Chehab 	}, {
841b285192aSMauro Carvalho Chehab 		.subvendor = 0x1858,
842b285192aSMauro Carvalho Chehab 		.subdevice = 0xe800,
843b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_COMPRO_VIDEOMATE_E800,
844b285192aSMauro Carvalho Chehab 	}, {
845b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
846b285192aSMauro Carvalho Chehab 		.subdevice = 0x8551,
847b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1290,
848b285192aSMauro Carvalho Chehab 	}, {
849b285192aSMauro Carvalho Chehab 		.subvendor = 0x14f1,
850b285192aSMauro Carvalho Chehab 		.subdevice = 0x8578,
851b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_MYGICA_X8558PRO,
852b285192aSMauro Carvalho Chehab 	}, {
853b285192aSMauro Carvalho Chehab 		.subvendor = 0x107d,
854b285192aSMauro Carvalho Chehab 		.subdevice = 0x6f22,
855b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_LEADTEK_WINFAST_PXTV1200,
856b285192aSMauro Carvalho Chehab 	}, {
857b285192aSMauro Carvalho Chehab 		.subvendor = 0x5654,
858b285192aSMauro Carvalho Chehab 		.subdevice = 0x2390,
859b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_GOTVIEW_X5_3D_HYBRID,
860b285192aSMauro Carvalho Chehab 	}, {
861b285192aSMauro Carvalho Chehab 		.subvendor = 0x1b55,
862b285192aSMauro Carvalho Chehab 		.subdevice = 0xe2e4,
863b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF,
864b285192aSMauro Carvalho Chehab 	}, {
865b285192aSMauro Carvalho Chehab 		.subvendor = 0x14f1,
866b285192aSMauro Carvalho Chehab 		.subdevice = 0x8502,
867b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_MYGICA_X8507,
868b285192aSMauro Carvalho Chehab 	}, {
869b285192aSMauro Carvalho Chehab 		.subvendor = 0x153b,
870b285192aSMauro Carvalho Chehab 		.subdevice = 0x117e,
871b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL,
872b285192aSMauro Carvalho Chehab 	}, {
873b285192aSMauro Carvalho Chehab 		.subvendor = 0xd471,
874b285192aSMauro Carvalho Chehab 		.subdevice = 0x9022,
875b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_TEVII_S471,
876f667190bSMariusz Bia?o?czyk 	}, {
877f667190bSMariusz Bia?o?czyk 		.subvendor = 0x8000,
878f667190bSMariusz Bia?o?czyk 		.subdevice = 0x3034,
879f667190bSMariusz Bia?o?czyk 		.card      = CX23885_BOARD_PROF_8000,
8807c62f5a1SMichael Krufky 	}, {
8817c62f5a1SMichael Krufky 		.subvendor = 0x0070,
8827c62f5a1SMichael Krufky 		.subdevice = 0xc108,
8837c62f5a1SMichael Krufky 		.card      = CX23885_BOARD_HAUPPAUGE_HVR4400,
8847c62f5a1SMichael Krufky 	}, {
8857c62f5a1SMichael Krufky 		.subvendor = 0x0070,
8867c62f5a1SMichael Krufky 		.subdevice = 0xc138,
8877c62f5a1SMichael Krufky 		.card      = CX23885_BOARD_HAUPPAUGE_HVR4400,
8887c62f5a1SMichael Krufky 	}, {
8897c62f5a1SMichael Krufky 		.subvendor = 0x0070,
8907c62f5a1SMichael Krufky 		.subdevice = 0xc12a,
8917c62f5a1SMichael Krufky 		.card      = CX23885_BOARD_HAUPPAUGE_HVR4400,
8927c62f5a1SMichael Krufky 	}, {
8937c62f5a1SMichael Krufky 		.subvendor = 0x0070,
8947c62f5a1SMichael Krufky 		.subdevice = 0xc1f8,
8957c62f5a1SMichael Krufky 		.card      = CX23885_BOARD_HAUPPAUGE_HVR4400,
896e8d42373SOleh Kravchenko 	}, {
897e8d42373SOleh Kravchenko 		.subvendor = 0x1461,
898e8d42373SOleh Kravchenko 		.subdevice = 0xd939,
899e8d42373SOleh Kravchenko 		.card      = CX23885_BOARD_AVERMEDIA_HC81R,
900b285192aSMauro Carvalho Chehab 	},
901b285192aSMauro Carvalho Chehab };
902b285192aSMauro Carvalho Chehab const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
903b285192aSMauro Carvalho Chehab 
904b285192aSMauro Carvalho Chehab void cx23885_card_list(struct cx23885_dev *dev)
905b285192aSMauro Carvalho Chehab {
906b285192aSMauro Carvalho Chehab 	int i;
907b285192aSMauro Carvalho Chehab 
908b285192aSMauro Carvalho Chehab 	if (0 == dev->pci->subsystem_vendor &&
909b285192aSMauro Carvalho Chehab 	    0 == dev->pci->subsystem_device) {
910b285192aSMauro Carvalho Chehab 		printk(KERN_INFO
911b285192aSMauro Carvalho Chehab 			"%s: Board has no valid PCIe Subsystem ID and can't\n"
912b285192aSMauro Carvalho Chehab 		       "%s: be autodetected. Pass card=<n> insmod option\n"
913b285192aSMauro Carvalho Chehab 		       "%s: to workaround that. Redirect complaints to the\n"
914b285192aSMauro Carvalho Chehab 		       "%s: vendor of the TV card.  Best regards,\n"
915b285192aSMauro Carvalho Chehab 		       "%s:         -- tux\n",
916b285192aSMauro Carvalho Chehab 		       dev->name, dev->name, dev->name, dev->name, dev->name);
917b285192aSMauro Carvalho Chehab 	} else {
918b285192aSMauro Carvalho Chehab 		printk(KERN_INFO
919b285192aSMauro Carvalho Chehab 			"%s: Your board isn't known (yet) to the driver.\n"
920b285192aSMauro Carvalho Chehab 		       "%s: Try to pick one of the existing card configs via\n"
921b285192aSMauro Carvalho Chehab 		       "%s: card=<n> insmod option.  Updating to the latest\n"
922b285192aSMauro Carvalho Chehab 		       "%s: version might help as well.\n",
923b285192aSMauro Carvalho Chehab 		       dev->name, dev->name, dev->name, dev->name);
924b285192aSMauro Carvalho Chehab 	}
925b285192aSMauro Carvalho Chehab 	printk(KERN_INFO "%s: Here is a list of valid choices for the card=<n> insmod option:\n",
926b285192aSMauro Carvalho Chehab 	       dev->name);
927b285192aSMauro Carvalho Chehab 	for (i = 0; i < cx23885_bcount; i++)
928b285192aSMauro Carvalho Chehab 		printk(KERN_INFO "%s:    card=%d -> %s\n",
929b285192aSMauro Carvalho Chehab 		       dev->name, i, cx23885_boards[i].name);
930b285192aSMauro Carvalho Chehab }
931b285192aSMauro Carvalho Chehab 
932b285192aSMauro Carvalho Chehab static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
933b285192aSMauro Carvalho Chehab {
934b285192aSMauro Carvalho Chehab 	struct tveeprom tv;
935b285192aSMauro Carvalho Chehab 
936b285192aSMauro Carvalho Chehab 	tveeprom_hauppauge_analog(&dev->i2c_bus[0].i2c_client, &tv,
937b285192aSMauro Carvalho Chehab 		eeprom_data);
938b285192aSMauro Carvalho Chehab 
939b285192aSMauro Carvalho Chehab 	/* Make sure we support the board model */
940b285192aSMauro Carvalho Chehab 	switch (tv.model) {
941b285192aSMauro Carvalho Chehab 	case 22001:
942b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1270 (PCIe, Retail, half height)
943b285192aSMauro Carvalho Chehab 		 * ATSC/QAM and basic analog, IR Blast */
944b285192aSMauro Carvalho Chehab 	case 22009:
945b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1210 (PCIe, Retail, half height)
946b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog, IR Blast */
947b285192aSMauro Carvalho Chehab 	case 22011:
948b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1270 (PCIe, Retail, half height)
949b285192aSMauro Carvalho Chehab 		 * ATSC/QAM and basic analog, IR Recv */
950b285192aSMauro Carvalho Chehab 	case 22019:
951b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1210 (PCIe, Retail, half height)
952b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog, IR Recv */
953b285192aSMauro Carvalho Chehab 	case 22021:
954b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1275 (PCIe, Retail, half height)
955b285192aSMauro Carvalho Chehab 		 * ATSC/QAM and basic analog, IR Recv */
956b285192aSMauro Carvalho Chehab 	case 22029:
957b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1210 (PCIe, Retail, half height)
958b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog, IR Recv */
959b285192aSMauro Carvalho Chehab 	case 22101:
960b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1270 (PCIe, Retail, full height)
961b285192aSMauro Carvalho Chehab 		 * ATSC/QAM and basic analog, IR Blast */
962b285192aSMauro Carvalho Chehab 	case 22109:
963b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1210 (PCIe, Retail, full height)
964b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog, IR Blast */
965b285192aSMauro Carvalho Chehab 	case 22111:
966b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1270 (PCIe, Retail, full height)
967b285192aSMauro Carvalho Chehab 		 * ATSC/QAM and basic analog, IR Recv */
968b285192aSMauro Carvalho Chehab 	case 22119:
969b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1210 (PCIe, Retail, full height)
970b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog, IR Recv */
971b285192aSMauro Carvalho Chehab 	case 22121:
972b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1275 (PCIe, Retail, full height)
973b285192aSMauro Carvalho Chehab 		 * ATSC/QAM and basic analog, IR Recv */
974b285192aSMauro Carvalho Chehab 	case 22129:
975b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1210 (PCIe, Retail, full height)
976b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog, IR Recv */
977b285192aSMauro Carvalho Chehab 	case 71009:
978b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, Retail, full height)
979b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
980b285192aSMauro Carvalho Chehab 	case 71359:
981b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, OEM, half height)
982b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
983b285192aSMauro Carvalho Chehab 	case 71439:
984b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, OEM, half height)
985b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
986b285192aSMauro Carvalho Chehab 	case 71449:
987b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, OEM, full height)
988b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
989b285192aSMauro Carvalho Chehab 	case 71939:
990b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, OEM, half height)
991b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
992b285192aSMauro Carvalho Chehab 	case 71949:
993b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, OEM, full height)
994b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
995b285192aSMauro Carvalho Chehab 	case 71959:
996b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, OEM, full height)
997b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
998b285192aSMauro Carvalho Chehab 	case 71979:
999b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, OEM, half height)
1000b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
1001b285192aSMauro Carvalho Chehab 	case 71999:
1002b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, OEM, full height)
1003b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
1004b285192aSMauro Carvalho Chehab 	case 76601:
1005b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
1006b285192aSMauro Carvalho Chehab 			channel ATSC and MPEG2 HW Encoder */
1007b285192aSMauro Carvalho Chehab 	case 77001:
1008b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
1009b285192aSMauro Carvalho Chehab 			and Basic analog */
1010b285192aSMauro Carvalho Chehab 	case 77011:
1011b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
1012b285192aSMauro Carvalho Chehab 			and Basic analog */
1013b285192aSMauro Carvalho Chehab 	case 77041:
1014b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
1015b285192aSMauro Carvalho Chehab 			and Basic analog */
1016b285192aSMauro Carvalho Chehab 	case 77051:
1017b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
1018b285192aSMauro Carvalho Chehab 			and Basic analog */
1019b285192aSMauro Carvalho Chehab 	case 78011:
1020b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
1021b285192aSMauro Carvalho Chehab 			Dual channel ATSC and MPEG2 HW Encoder */
1022b285192aSMauro Carvalho Chehab 	case 78501:
1023b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
1024b285192aSMauro Carvalho Chehab 			Dual channel ATSC and MPEG2 HW Encoder */
1025b285192aSMauro Carvalho Chehab 	case 78521:
1026b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
1027b285192aSMauro Carvalho Chehab 			Dual channel ATSC and MPEG2 HW Encoder */
1028b285192aSMauro Carvalho Chehab 	case 78531:
1029b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
1030b285192aSMauro Carvalho Chehab 			Dual channel ATSC and MPEG2 HW Encoder */
1031b285192aSMauro Carvalho Chehab 	case 78631:
1032b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
1033b285192aSMauro Carvalho Chehab 			Dual channel ATSC and MPEG2 HW Encoder */
1034b285192aSMauro Carvalho Chehab 	case 79001:
1035b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1250 (PCIe, Retail, IR, full height,
1036b285192aSMauro Carvalho Chehab 			ATSC and Basic analog */
1037b285192aSMauro Carvalho Chehab 	case 79101:
1038b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1250 (PCIe, Retail, IR, half height,
1039b285192aSMauro Carvalho Chehab 			ATSC and Basic analog */
1040b285192aSMauro Carvalho Chehab 	case 79501:
1041b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1250 (PCIe, No IR, half height,
1042b285192aSMauro Carvalho Chehab 			ATSC [at least] and Basic analog) */
1043b285192aSMauro Carvalho Chehab 	case 79561:
1044b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
1045b285192aSMauro Carvalho Chehab 			ATSC and Basic analog */
1046b285192aSMauro Carvalho Chehab 	case 79571:
1047b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
1048b285192aSMauro Carvalho Chehab 		 ATSC and Basic analog */
1049b285192aSMauro Carvalho Chehab 	case 79671:
1050b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
1051b285192aSMauro Carvalho Chehab 			ATSC and Basic analog */
1052b285192aSMauro Carvalho Chehab 	case 80019:
1053b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1400 (Express Card, Retail, IR,
1054b285192aSMauro Carvalho Chehab 		 * DVB-T and Basic analog */
1055b285192aSMauro Carvalho Chehab 	case 81509:
1056b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
1057b285192aSMauro Carvalho Chehab 		 * DVB-T and MPEG2 HW Encoder */
1058b285192aSMauro Carvalho Chehab 	case 81519:
1059b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
1060b285192aSMauro Carvalho Chehab 		 * DVB-T and MPEG2 HW Encoder */
1061b285192aSMauro Carvalho Chehab 		break;
1062b285192aSMauro Carvalho Chehab 	case 85021:
1063b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1850 (PCIe, Retail, 3.5mm in, IR, FM,
1064b285192aSMauro Carvalho Chehab 			Dual channel ATSC and MPEG2 HW Encoder */
1065b285192aSMauro Carvalho Chehab 		break;
1066b285192aSMauro Carvalho Chehab 	case 85721:
1067b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1290 (PCIe, OEM, RCA in, IR,
1068b285192aSMauro Carvalho Chehab 			Dual channel ATSC and Basic analog */
1069b285192aSMauro Carvalho Chehab 		break;
1070b285192aSMauro Carvalho Chehab 	default:
1071b285192aSMauro Carvalho Chehab 		printk(KERN_WARNING "%s: warning: "
1072b285192aSMauro Carvalho Chehab 			"unknown hauppauge model #%d\n",
1073b285192aSMauro Carvalho Chehab 			dev->name, tv.model);
1074b285192aSMauro Carvalho Chehab 		break;
1075b285192aSMauro Carvalho Chehab 	}
1076b285192aSMauro Carvalho Chehab 
1077b285192aSMauro Carvalho Chehab 	printk(KERN_INFO "%s: hauppauge eeprom: model=%d\n",
1078b285192aSMauro Carvalho Chehab 			dev->name, tv.model);
1079b285192aSMauro Carvalho Chehab }
1080b285192aSMauro Carvalho Chehab 
1081e6001482SLuis Alves /* Some TBS cards require initing a chip using a bitbanged SPI attached
1082e6001482SLuis Alves    to the cx23885 gpio's. If this chip doesn't get init'ed the demod
1083e6001482SLuis Alves    doesn't respond to any command. */
1084e6001482SLuis Alves static void tbs_card_init(struct cx23885_dev *dev)
1085e6001482SLuis Alves {
1086e6001482SLuis Alves 	int i;
1087e6001482SLuis Alves 	const u8 buf[] = {
1088e6001482SLuis Alves 		0xe0, 0x06, 0x66, 0x33, 0x65,
1089e6001482SLuis Alves 		0x01, 0x17, 0x06, 0xde};
1090e6001482SLuis Alves 
1091e6001482SLuis Alves 	switch (dev->board) {
1092e6001482SLuis Alves 	case CX23885_BOARD_TBS_6980:
1093e6001482SLuis Alves 	case CX23885_BOARD_TBS_6981:
1094e6001482SLuis Alves 		cx_set(GP0_IO, 0x00070007);
1095e6001482SLuis Alves 		usleep_range(1000, 10000);
1096e6001482SLuis Alves 		cx_clear(GP0_IO, 2);
1097e6001482SLuis Alves 		usleep_range(1000, 10000);
1098e6001482SLuis Alves 		for (i = 0; i < 9 * 8; i++) {
1099e6001482SLuis Alves 			cx_clear(GP0_IO, 7);
1100e6001482SLuis Alves 			usleep_range(1000, 10000);
1101e6001482SLuis Alves 			cx_set(GP0_IO,
1102e6001482SLuis Alves 				((buf[i >> 3] >> (7 - (i & 7))) & 1) | 4);
1103e6001482SLuis Alves 			usleep_range(1000, 10000);
1104e6001482SLuis Alves 		}
1105e6001482SLuis Alves 		cx_set(GP0_IO, 7);
1106e6001482SLuis Alves 		break;
1107e6001482SLuis Alves 	}
1108e6001482SLuis Alves }
1109e6001482SLuis Alves 
1110b285192aSMauro Carvalho Chehab int cx23885_tuner_callback(void *priv, int component, int command, int arg)
1111b285192aSMauro Carvalho Chehab {
1112b285192aSMauro Carvalho Chehab 	struct cx23885_tsport *port = priv;
1113b285192aSMauro Carvalho Chehab 	struct cx23885_dev *dev = port->dev;
1114b285192aSMauro Carvalho Chehab 	u32 bitmask = 0;
1115b285192aSMauro Carvalho Chehab 
1116b285192aSMauro Carvalho Chehab 	if ((command == XC2028_RESET_CLK) || (command == XC2028_I2C_FLUSH))
1117b285192aSMauro Carvalho Chehab 		return 0;
1118b285192aSMauro Carvalho Chehab 
1119b285192aSMauro Carvalho Chehab 	if (command != 0) {
1120b285192aSMauro Carvalho Chehab 		printk(KERN_ERR "%s(): Unknown command 0x%x.\n",
1121b285192aSMauro Carvalho Chehab 			__func__, command);
1122b285192aSMauro Carvalho Chehab 		return -EINVAL;
1123b285192aSMauro Carvalho Chehab 	}
1124b285192aSMauro Carvalho Chehab 
1125b285192aSMauro Carvalho Chehab 	switch (dev->board) {
1126b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1400:
1127b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500:
1128b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1129b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1130642ca1a0SAnca Emanuel 	case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
1131b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1132b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1133b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1134b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
1135b285192aSMauro Carvalho Chehab 		/* Tuner Reset Command */
1136b285192aSMauro Carvalho Chehab 		bitmask = 0x04;
1137b285192aSMauro Carvalho Chehab 		break;
1138b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1139b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
1140b285192aSMauro Carvalho Chehab 		/* Two identical tuners on two different i2c buses,
1141b285192aSMauro Carvalho Chehab 		 * we need to reset the correct gpio. */
1142b285192aSMauro Carvalho Chehab 		if (port->nr == 1)
1143b285192aSMauro Carvalho Chehab 			bitmask = 0x01;
1144b285192aSMauro Carvalho Chehab 		else if (port->nr == 2)
1145b285192aSMauro Carvalho Chehab 			bitmask = 0x04;
1146b285192aSMauro Carvalho Chehab 		break;
1147b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1148b285192aSMauro Carvalho Chehab 		/* Tuner Reset Command */
1149b285192aSMauro Carvalho Chehab 		bitmask = 0x02;
1150b285192aSMauro Carvalho Chehab 		break;
1151b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1152b285192aSMauro Carvalho Chehab 		altera_ci_tuner_reset(dev, port->nr);
1153b285192aSMauro Carvalho Chehab 		break;
1154e8d42373SOleh Kravchenko 	case CX23885_BOARD_AVERMEDIA_HC81R:
1155e8d42373SOleh Kravchenko 		/* XC3028L Reset Command */
1156e8d42373SOleh Kravchenko 		bitmask = 1 << 2;
1157e8d42373SOleh Kravchenko 		break;
1158b285192aSMauro Carvalho Chehab 	}
1159b285192aSMauro Carvalho Chehab 
1160b285192aSMauro Carvalho Chehab 	if (bitmask) {
1161b285192aSMauro Carvalho Chehab 		/* Drive the tuner into reset and back out */
1162b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, bitmask);
1163b285192aSMauro Carvalho Chehab 		mdelay(200);
1164b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, bitmask);
1165b285192aSMauro Carvalho Chehab 	}
1166b285192aSMauro Carvalho Chehab 
1167b285192aSMauro Carvalho Chehab 	return 0;
1168b285192aSMauro Carvalho Chehab }
1169b285192aSMauro Carvalho Chehab 
1170b285192aSMauro Carvalho Chehab void cx23885_gpio_setup(struct cx23885_dev *dev)
1171b285192aSMauro Carvalho Chehab {
1172b285192aSMauro Carvalho Chehab 	switch (dev->board) {
1173b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1250:
1174b285192aSMauro Carvalho Chehab 		/* GPIO-0 cx24227 demodulator reset */
1175b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
1176b285192aSMauro Carvalho Chehab 		break;
1177b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500:
1178b285192aSMauro Carvalho Chehab 		/* GPIO-0 cx24227 demodulator */
1179b285192aSMauro Carvalho Chehab 		/* GPIO-2 xc3028 tuner */
1180b285192aSMauro Carvalho Chehab 
1181b285192aSMauro Carvalho Chehab 		/* Put the parts into reset */
1182b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050000);
1183b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x00000005);
1184b285192aSMauro Carvalho Chehab 		msleep(5);
1185b285192aSMauro Carvalho Chehab 
1186b285192aSMauro Carvalho Chehab 		/* Bring the parts out of reset */
1187b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050005);
1188b285192aSMauro Carvalho Chehab 		break;
1189b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1190b285192aSMauro Carvalho Chehab 		/* GPIO-0 cx24227 demodulator reset */
1191b285192aSMauro Carvalho Chehab 		/* GPIO-2 xc5000 tuner reset */
1192b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
1193b285192aSMauro Carvalho Chehab 		break;
1194b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1800:
1195b285192aSMauro Carvalho Chehab 		/* GPIO-0 656_CLK */
1196b285192aSMauro Carvalho Chehab 		/* GPIO-1 656_D0 */
1197b285192aSMauro Carvalho Chehab 		/* GPIO-2 8295A Reset */
1198b285192aSMauro Carvalho Chehab 		/* GPIO-3-10 cx23417 data0-7 */
1199b285192aSMauro Carvalho Chehab 		/* GPIO-11-14 cx23417 addr0-3 */
1200b285192aSMauro Carvalho Chehab 		/* GPIO-15-18 cx23417 READY, CS, RD, WR */
1201b285192aSMauro Carvalho Chehab 		/* GPIO-19 IR_RX */
1202b285192aSMauro Carvalho Chehab 
1203b285192aSMauro Carvalho Chehab 		/* CX23417 GPIO's */
1204b285192aSMauro Carvalho Chehab 		/* EIO15 Zilog Reset */
1205b285192aSMauro Carvalho Chehab 		/* EIO14 S5H1409/CX24227 Reset */
1206b285192aSMauro Carvalho Chehab 		mc417_gpio_enable(dev, GPIO_15 | GPIO_14, 1);
1207b285192aSMauro Carvalho Chehab 
1208b285192aSMauro Carvalho Chehab 		/* Put the demod into reset and protect the eeprom */
1209b285192aSMauro Carvalho Chehab 		mc417_gpio_clear(dev, GPIO_15 | GPIO_14);
1210b285192aSMauro Carvalho Chehab 		mdelay(100);
1211b285192aSMauro Carvalho Chehab 
1212b285192aSMauro Carvalho Chehab 		/* Bring the demod and blaster out of reset */
1213b285192aSMauro Carvalho Chehab 		mc417_gpio_set(dev, GPIO_15 | GPIO_14);
1214b285192aSMauro Carvalho Chehab 		mdelay(100);
1215b285192aSMauro Carvalho Chehab 
1216b285192aSMauro Carvalho Chehab 		/* Force the TDA8295A into reset and back */
1217b285192aSMauro Carvalho Chehab 		cx23885_gpio_enable(dev, GPIO_2, 1);
1218b285192aSMauro Carvalho Chehab 		cx23885_gpio_set(dev, GPIO_2);
1219b285192aSMauro Carvalho Chehab 		mdelay(20);
1220b285192aSMauro Carvalho Chehab 		cx23885_gpio_clear(dev, GPIO_2);
1221b285192aSMauro Carvalho Chehab 		mdelay(20);
1222b285192aSMauro Carvalho Chehab 		cx23885_gpio_set(dev, GPIO_2);
1223b285192aSMauro Carvalho Chehab 		mdelay(20);
1224b285192aSMauro Carvalho Chehab 		break;
1225b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1200:
1226b285192aSMauro Carvalho Chehab 		/* GPIO-0 tda10048 demodulator reset */
1227b285192aSMauro Carvalho Chehab 		/* GPIO-2 tda18271 tuner reset */
1228b285192aSMauro Carvalho Chehab 
1229b285192aSMauro Carvalho Chehab 		/* Put the parts into reset and back */
1230b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050000);
1231b285192aSMauro Carvalho Chehab 		mdelay(20);
1232b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x00000005);
1233b285192aSMauro Carvalho Chehab 		mdelay(20);
1234b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050005);
1235b285192aSMauro Carvalho Chehab 		break;
1236b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1700:
1237b285192aSMauro Carvalho Chehab 		/* GPIO-0 TDA10048 demodulator reset */
1238b285192aSMauro Carvalho Chehab 		/* GPIO-2 TDA8295A Reset */
1239b285192aSMauro Carvalho Chehab 		/* GPIO-3-10 cx23417 data0-7 */
1240b285192aSMauro Carvalho Chehab 		/* GPIO-11-14 cx23417 addr0-3 */
1241b285192aSMauro Carvalho Chehab 		/* GPIO-15-18 cx23417 READY, CS, RD, WR */
1242b285192aSMauro Carvalho Chehab 
1243b285192aSMauro Carvalho Chehab 		/* The following GPIO's are on the interna AVCore (cx25840) */
1244b285192aSMauro Carvalho Chehab 		/* GPIO-19 IR_RX */
1245b285192aSMauro Carvalho Chehab 		/* GPIO-20 IR_TX 416/DVBT Select */
1246b285192aSMauro Carvalho Chehab 		/* GPIO-21 IIS DAT */
1247b285192aSMauro Carvalho Chehab 		/* GPIO-22 IIS WCLK */
1248b285192aSMauro Carvalho Chehab 		/* GPIO-23 IIS BCLK */
1249b285192aSMauro Carvalho Chehab 
1250b285192aSMauro Carvalho Chehab 		/* Put the parts into reset and back */
1251b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050000);
1252b285192aSMauro Carvalho Chehab 		mdelay(20);
1253b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x00000005);
1254b285192aSMauro Carvalho Chehab 		mdelay(20);
1255b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050005);
1256b285192aSMauro Carvalho Chehab 		break;
1257b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1400:
1258b285192aSMauro Carvalho Chehab 		/* GPIO-0  Dibcom7000p demodulator reset */
1259b285192aSMauro Carvalho Chehab 		/* GPIO-2  xc3028L tuner reset */
1260b285192aSMauro Carvalho Chehab 		/* GPIO-13 LED */
1261b285192aSMauro Carvalho Chehab 
1262b285192aSMauro Carvalho Chehab 		/* Put the parts into reset and back */
1263b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050000);
1264b285192aSMauro Carvalho Chehab 		mdelay(20);
1265b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x00000005);
1266b285192aSMauro Carvalho Chehab 		mdelay(20);
1267b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050005);
1268b285192aSMauro Carvalho Chehab 		break;
1269b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1270b285192aSMauro Carvalho Chehab 		/* GPIO-0 xc5000 tuner reset i2c bus 0 */
1271b285192aSMauro Carvalho Chehab 		/* GPIO-1 s5h1409 demod reset i2c bus 0 */
1272b285192aSMauro Carvalho Chehab 		/* GPIO-2 xc5000 tuner reset i2c bus 1 */
1273b285192aSMauro Carvalho Chehab 		/* GPIO-3 s5h1409 demod reset i2c bus 0 */
1274b285192aSMauro Carvalho Chehab 
1275b285192aSMauro Carvalho Chehab 		/* Put the parts into reset and back */
1276b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x000f0000);
1277b285192aSMauro Carvalho Chehab 		mdelay(20);
1278b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x0000000f);
1279b285192aSMauro Carvalho Chehab 		mdelay(20);
1280b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x000f000f);
1281b285192aSMauro Carvalho Chehab 		break;
1282b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
1283b285192aSMauro Carvalho Chehab 		/* GPIO-0 portb xc3028 reset */
1284b285192aSMauro Carvalho Chehab 		/* GPIO-1 portb zl10353 reset */
1285b285192aSMauro Carvalho Chehab 		/* GPIO-2 portc xc3028 reset */
1286b285192aSMauro Carvalho Chehab 		/* GPIO-3 portc zl10353 reset */
1287b285192aSMauro Carvalho Chehab 
1288b285192aSMauro Carvalho Chehab 		/* Put the parts into reset and back */
1289b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x000f0000);
1290b285192aSMauro Carvalho Chehab 		mdelay(20);
1291b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x0000000f);
1292b285192aSMauro Carvalho Chehab 		mdelay(20);
1293b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x000f000f);
1294b285192aSMauro Carvalho Chehab 		break;
1295b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1296642ca1a0SAnca Emanuel 	case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
1297b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1298b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1299b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1300b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
1301b285192aSMauro Carvalho Chehab 		/* GPIO-2  xc3028 tuner reset */
1302b285192aSMauro Carvalho Chehab 
1303b285192aSMauro Carvalho Chehab 		/* The following GPIO's are on the internal AVCore (cx25840) */
1304b285192aSMauro Carvalho Chehab 		/* GPIO-?  zl10353 demod reset */
1305b285192aSMauro Carvalho Chehab 
1306b285192aSMauro Carvalho Chehab 		/* Put the parts into reset and back */
1307b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00040000);
1308b285192aSMauro Carvalho Chehab 		mdelay(20);
1309b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x00000004);
1310b285192aSMauro Carvalho Chehab 		mdelay(20);
1311b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00040004);
1312b285192aSMauro Carvalho Chehab 		break;
1313b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TBS_6920:
1314e6001482SLuis Alves 	case CX23885_BOARD_TBS_6980:
1315e6001482SLuis Alves 	case CX23885_BOARD_TBS_6981:
1316f667190bSMariusz Bia?o?czyk 	case CX23885_BOARD_PROF_8000:
1317b285192aSMauro Carvalho Chehab 		cx_write(MC417_CTL, 0x00000036);
1318b285192aSMauro Carvalho Chehab 		cx_write(MC417_OEN, 0x00001000);
1319b285192aSMauro Carvalho Chehab 		cx_set(MC417_RWD, 0x00000002);
1320b285192aSMauro Carvalho Chehab 		mdelay(200);
1321b285192aSMauro Carvalho Chehab 		cx_clear(MC417_RWD, 0x00000800);
1322b285192aSMauro Carvalho Chehab 		mdelay(200);
1323b285192aSMauro Carvalho Chehab 		cx_set(MC417_RWD, 0x00000800);
1324b285192aSMauro Carvalho Chehab 		mdelay(200);
1325b285192aSMauro Carvalho Chehab 		break;
1326b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1327b285192aSMauro Carvalho Chehab 		/* GPIO-0 INTA from CiMax1
1328b285192aSMauro Carvalho Chehab 		   GPIO-1 INTB from CiMax2
1329b285192aSMauro Carvalho Chehab 		   GPIO-2 reset chips
1330b285192aSMauro Carvalho Chehab 		   GPIO-3 to GPIO-10 data/addr for CA
1331b285192aSMauro Carvalho Chehab 		   GPIO-11 ~CS0 to CiMax1
1332b285192aSMauro Carvalho Chehab 		   GPIO-12 ~CS1 to CiMax2
1333b285192aSMauro Carvalho Chehab 		   GPIO-13 ADL0 load LSB addr
1334b285192aSMauro Carvalho Chehab 		   GPIO-14 ADL1 load MSB addr
1335b285192aSMauro Carvalho Chehab 		   GPIO-15 ~RDY from CiMax
1336b285192aSMauro Carvalho Chehab 		   GPIO-17 ~RD to CiMax
1337b285192aSMauro Carvalho Chehab 		   GPIO-18 ~WR to CiMax
1338b285192aSMauro Carvalho Chehab 		 */
1339b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00040000); /* GPIO as out */
1340b285192aSMauro Carvalho Chehab 		/* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
1341b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x00030004);
1342b285192aSMauro Carvalho Chehab 		mdelay(100);/* reset delay */
1343b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */
1344b285192aSMauro Carvalho Chehab 		cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */
1345b285192aSMauro Carvalho Chehab 		/* GPIO-15 IN as ~ACK, rest as OUT */
1346b285192aSMauro Carvalho Chehab 		cx_write(MC417_OEN, 0x00001000);
1347b285192aSMauro Carvalho Chehab 		/* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
1348b285192aSMauro Carvalho Chehab 		cx_write(MC417_RWD, 0x0000c300);
1349b285192aSMauro Carvalho Chehab 		/* enable irq */
1350b285192aSMauro Carvalho Chehab 		cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
1351b285192aSMauro Carvalho Chehab 		break;
1352b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1270:
1353b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1275:
1354b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255:
1355b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
1356b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1210:
1357b285192aSMauro Carvalho Chehab 		/* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */
1358b285192aSMauro Carvalho Chehab 		/* GPIO-6 I2C Gate which can isolate the demod from the bus */
1359b285192aSMauro Carvalho Chehab 		/* GPIO-9 Demod reset */
1360b285192aSMauro Carvalho Chehab 
1361b285192aSMauro Carvalho Chehab 		/* Put the parts into reset and back */
1362b285192aSMauro Carvalho Chehab 		cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1);
1363b285192aSMauro Carvalho Chehab 		cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5);
1364b285192aSMauro Carvalho Chehab 		cx23885_gpio_clear(dev, GPIO_9);
1365b285192aSMauro Carvalho Chehab 		mdelay(20);
1366b285192aSMauro Carvalho Chehab 		cx23885_gpio_set(dev, GPIO_9);
1367b285192aSMauro Carvalho Chehab 		break;
1368b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MYGICA_X8506:
1369b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1370b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MYGICA_X8507:
1371b285192aSMauro Carvalho Chehab 		/* GPIO-0 (0)Analog / (1)Digital TV */
1372b285192aSMauro Carvalho Chehab 		/* GPIO-1 reset XC5000 */
13730d1b5265SMauro Carvalho Chehab 		/* GPIO-2 demod reset */
1374b285192aSMauro Carvalho Chehab 		cx23885_gpio_enable(dev, GPIO_0 | GPIO_1 | GPIO_2, 1);
1375b285192aSMauro Carvalho Chehab 		cx23885_gpio_clear(dev, GPIO_1 | GPIO_2);
1376b285192aSMauro Carvalho Chehab 		mdelay(100);
1377b285192aSMauro Carvalho Chehab 		cx23885_gpio_set(dev, GPIO_0 | GPIO_1 | GPIO_2);
1378b285192aSMauro Carvalho Chehab 		mdelay(100);
1379b285192aSMauro Carvalho Chehab 		break;
1380b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MYGICA_X8558PRO:
1381b285192aSMauro Carvalho Chehab 		/* GPIO-0 reset first ATBM8830 */
1382b285192aSMauro Carvalho Chehab 		/* GPIO-1 reset second ATBM8830 */
1383b285192aSMauro Carvalho Chehab 		cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1);
1384b285192aSMauro Carvalho Chehab 		cx23885_gpio_clear(dev, GPIO_0 | GPIO_1);
1385b285192aSMauro Carvalho Chehab 		mdelay(100);
1386b285192aSMauro Carvalho Chehab 		cx23885_gpio_set(dev, GPIO_0 | GPIO_1);
1387b285192aSMauro Carvalho Chehab 		mdelay(100);
1388b285192aSMauro Carvalho Chehab 		break;
1389b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1850:
1390b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1290:
1391b285192aSMauro Carvalho Chehab 		/* GPIO-0 656_CLK */
1392b285192aSMauro Carvalho Chehab 		/* GPIO-1 656_D0 */
1393b285192aSMauro Carvalho Chehab 		/* GPIO-2 Wake# */
1394b285192aSMauro Carvalho Chehab 		/* GPIO-3-10 cx23417 data0-7 */
1395b285192aSMauro Carvalho Chehab 		/* GPIO-11-14 cx23417 addr0-3 */
1396b285192aSMauro Carvalho Chehab 		/* GPIO-15-18 cx23417 READY, CS, RD, WR */
1397b285192aSMauro Carvalho Chehab 		/* GPIO-19 IR_RX */
1398b285192aSMauro Carvalho Chehab 		/* GPIO-20 C_IR_TX */
1399b285192aSMauro Carvalho Chehab 		/* GPIO-21 I2S DAT */
1400b285192aSMauro Carvalho Chehab 		/* GPIO-22 I2S WCLK */
1401b285192aSMauro Carvalho Chehab 		/* GPIO-23 I2S BCLK */
1402b285192aSMauro Carvalho Chehab 		/* ALT GPIO: EXP GPIO LATCH */
1403b285192aSMauro Carvalho Chehab 
1404b285192aSMauro Carvalho Chehab 		/* CX23417 GPIO's */
1405b285192aSMauro Carvalho Chehab 		/* GPIO-14 S5H1411/CX24228 Reset */
1406b285192aSMauro Carvalho Chehab 		/* GPIO-13 EEPROM write protect */
1407b285192aSMauro Carvalho Chehab 		mc417_gpio_enable(dev, GPIO_14 | GPIO_13, 1);
1408b285192aSMauro Carvalho Chehab 
1409b285192aSMauro Carvalho Chehab 		/* Put the demod into reset and protect the eeprom */
1410b285192aSMauro Carvalho Chehab 		mc417_gpio_clear(dev, GPIO_14 | GPIO_13);
1411b285192aSMauro Carvalho Chehab 		mdelay(100);
1412b285192aSMauro Carvalho Chehab 
1413b285192aSMauro Carvalho Chehab 		/* Bring the demod out of reset */
1414b285192aSMauro Carvalho Chehab 		mc417_gpio_set(dev, GPIO_14);
1415b285192aSMauro Carvalho Chehab 		mdelay(100);
1416b285192aSMauro Carvalho Chehab 
1417b285192aSMauro Carvalho Chehab 		/* CX24228 GPIO */
1418b285192aSMauro Carvalho Chehab 		/* Connected to IF / Mux */
1419b285192aSMauro Carvalho Chehab 		break;
1420b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1421b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
1422b285192aSMauro Carvalho Chehab 		break;
1423b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1424b285192aSMauro Carvalho Chehab 		/* GPIO-0 ~INT in
1425b285192aSMauro Carvalho Chehab 		   GPIO-1 TMS out
1426b285192aSMauro Carvalho Chehab 		   GPIO-2 ~reset chips out
1427b285192aSMauro Carvalho Chehab 		   GPIO-3 to GPIO-10 data/addr for CA in/out
1428b285192aSMauro Carvalho Chehab 		   GPIO-11 ~CS out
1429b285192aSMauro Carvalho Chehab 		   GPIO-12 ADDR out
1430b285192aSMauro Carvalho Chehab 		   GPIO-13 ~WR out
1431b285192aSMauro Carvalho Chehab 		   GPIO-14 ~RD out
1432b285192aSMauro Carvalho Chehab 		   GPIO-15 ~RDY in
1433b285192aSMauro Carvalho Chehab 		   GPIO-16 TCK out
1434b285192aSMauro Carvalho Chehab 		   GPIO-17 TDO in
1435b285192aSMauro Carvalho Chehab 		   GPIO-18 TDI out
1436b285192aSMauro Carvalho Chehab 		 */
1437b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00060000); /* GPIO-1,2 as out */
1438b285192aSMauro Carvalho Chehab 		/* GPIO-0 as INT, reset & TMS low */
1439b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x00010006);
1440b285192aSMauro Carvalho Chehab 		mdelay(100);/* reset delay */
1441b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00000004); /* reset high */
1442b285192aSMauro Carvalho Chehab 		cx_write(MC417_CTL, 0x00000037);/* enable GPIO-3..18 pins */
1443b285192aSMauro Carvalho Chehab 		/* GPIO-17 is TDO in, GPIO-15 is ~RDY in, rest is out */
1444b285192aSMauro Carvalho Chehab 		cx_write(MC417_OEN, 0x00005000);
1445b285192aSMauro Carvalho Chehab 		/* ~RD, ~WR high; ADDR low; ~CS high */
1446b285192aSMauro Carvalho Chehab 		cx_write(MC417_RWD, 0x00000d00);
1447b285192aSMauro Carvalho Chehab 		/* enable irq */
1448b285192aSMauro Carvalho Chehab 		cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
1449b285192aSMauro Carvalho Chehab 		break;
14507c62f5a1SMichael Krufky 	case CX23885_BOARD_HAUPPAUGE_HVR4400:
14517c62f5a1SMichael Krufky 		/* GPIO-8 tda10071 demod reset */
14527c62f5a1SMichael Krufky 
14537c62f5a1SMichael Krufky 		/* Put the parts into reset and back */
14547c62f5a1SMichael Krufky 		cx23885_gpio_enable(dev, GPIO_8, 1);
14557c62f5a1SMichael Krufky 		cx23885_gpio_clear(dev, GPIO_8);
14567c62f5a1SMichael Krufky 		mdelay(100);
14577c62f5a1SMichael Krufky 		cx23885_gpio_set(dev, GPIO_8);
14587c62f5a1SMichael Krufky 		mdelay(100);
14597c62f5a1SMichael Krufky 		break;
1460e8d42373SOleh Kravchenko 	case CX23885_BOARD_AVERMEDIA_HC81R:
1461e8d42373SOleh Kravchenko 		cx_clear(MC417_CTL, 1);
1462e8d42373SOleh Kravchenko 		/* GPIO-0,1,2 setup direction as output */
1463e8d42373SOleh Kravchenko 		cx_set(GP0_IO, 0x00070000);
1464e8d42373SOleh Kravchenko 		mdelay(10);
1465e8d42373SOleh Kravchenko 		/* AF9013 demod reset */
1466e8d42373SOleh Kravchenko 		cx_set(GP0_IO, 0x00010001);
1467e8d42373SOleh Kravchenko 		mdelay(10);
1468e8d42373SOleh Kravchenko 		cx_clear(GP0_IO, 0x00010001);
1469e8d42373SOleh Kravchenko 		mdelay(10);
1470e8d42373SOleh Kravchenko 		cx_set(GP0_IO, 0x00010001);
1471e8d42373SOleh Kravchenko 		mdelay(10);
1472e8d42373SOleh Kravchenko 		/* demod tune? */
1473e8d42373SOleh Kravchenko 		cx_clear(GP0_IO, 0x00030003);
1474e8d42373SOleh Kravchenko 		mdelay(10);
1475e8d42373SOleh Kravchenko 		cx_set(GP0_IO, 0x00020002);
1476e8d42373SOleh Kravchenko 		mdelay(10);
1477e8d42373SOleh Kravchenko 		cx_set(GP0_IO, 0x00010001);
1478e8d42373SOleh Kravchenko 		mdelay(10);
1479e8d42373SOleh Kravchenko 		cx_clear(GP0_IO, 0x00020002);
1480e8d42373SOleh Kravchenko 		/* XC3028L tuner reset */
1481e8d42373SOleh Kravchenko 		cx_set(GP0_IO, 0x00040004);
1482e8d42373SOleh Kravchenko 		cx_clear(GP0_IO, 0x00040004);
1483e8d42373SOleh Kravchenko 		cx_set(GP0_IO, 0x00040004);
1484e8d42373SOleh Kravchenko 		mdelay(60);
1485e8d42373SOleh Kravchenko 		break;
1486b285192aSMauro Carvalho Chehab 	}
1487b285192aSMauro Carvalho Chehab }
1488b285192aSMauro Carvalho Chehab 
1489b285192aSMauro Carvalho Chehab int cx23885_ir_init(struct cx23885_dev *dev)
1490b285192aSMauro Carvalho Chehab {
1491b285192aSMauro Carvalho Chehab 	static struct v4l2_subdev_io_pin_config ir_rxtx_pin_cfg[] = {
1492b285192aSMauro Carvalho Chehab 		{
1493b285192aSMauro Carvalho Chehab 			.flags	  = V4L2_SUBDEV_IO_PIN_INPUT,
1494b285192aSMauro Carvalho Chehab 			.pin	  = CX23885_PIN_IR_RX_GPIO19,
1495b285192aSMauro Carvalho Chehab 			.function = CX23885_PAD_IR_RX,
1496b285192aSMauro Carvalho Chehab 			.value	  = 0,
1497b285192aSMauro Carvalho Chehab 			.strength = CX25840_PIN_DRIVE_MEDIUM,
1498b285192aSMauro Carvalho Chehab 		}, {
1499b285192aSMauro Carvalho Chehab 			.flags	  = V4L2_SUBDEV_IO_PIN_OUTPUT,
1500b285192aSMauro Carvalho Chehab 			.pin	  = CX23885_PIN_IR_TX_GPIO20,
1501b285192aSMauro Carvalho Chehab 			.function = CX23885_PAD_IR_TX,
1502b285192aSMauro Carvalho Chehab 			.value	  = 0,
1503b285192aSMauro Carvalho Chehab 			.strength = CX25840_PIN_DRIVE_MEDIUM,
1504b285192aSMauro Carvalho Chehab 		}
1505b285192aSMauro Carvalho Chehab 	};
1506b285192aSMauro Carvalho Chehab 	const size_t ir_rxtx_pin_cfg_count = ARRAY_SIZE(ir_rxtx_pin_cfg);
1507b285192aSMauro Carvalho Chehab 
1508b285192aSMauro Carvalho Chehab 	static struct v4l2_subdev_io_pin_config ir_rx_pin_cfg[] = {
1509b285192aSMauro Carvalho Chehab 		{
1510b285192aSMauro Carvalho Chehab 			.flags	  = V4L2_SUBDEV_IO_PIN_INPUT,
1511b285192aSMauro Carvalho Chehab 			.pin	  = CX23885_PIN_IR_RX_GPIO19,
1512b285192aSMauro Carvalho Chehab 			.function = CX23885_PAD_IR_RX,
1513b285192aSMauro Carvalho Chehab 			.value	  = 0,
1514b285192aSMauro Carvalho Chehab 			.strength = CX25840_PIN_DRIVE_MEDIUM,
1515b285192aSMauro Carvalho Chehab 		}
1516b285192aSMauro Carvalho Chehab 	};
1517b285192aSMauro Carvalho Chehab 	const size_t ir_rx_pin_cfg_count = ARRAY_SIZE(ir_rx_pin_cfg);
1518b285192aSMauro Carvalho Chehab 
1519b285192aSMauro Carvalho Chehab 	struct v4l2_subdev_ir_parameters params;
1520b285192aSMauro Carvalho Chehab 	int ret = 0;
1521b285192aSMauro Carvalho Chehab 	switch (dev->board) {
1522b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500:
1523b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1524b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1800:
1525b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1200:
1526b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1400:
1527b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1275:
1528b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255:
1529b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
1530b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1210:
1531b285192aSMauro Carvalho Chehab 		/* FIXME: Implement me */
1532b285192aSMauro Carvalho Chehab 		break;
1533b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1270:
1534b285192aSMauro Carvalho Chehab 		ret = cx23888_ir_probe(dev);
1535b285192aSMauro Carvalho Chehab 		if (ret)
1536b285192aSMauro Carvalho Chehab 			break;
1537b285192aSMauro Carvalho Chehab 		dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
1538b285192aSMauro Carvalho Chehab 		v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1539b285192aSMauro Carvalho Chehab 				 ir_rx_pin_cfg_count, ir_rx_pin_cfg);
1540b285192aSMauro Carvalho Chehab 		break;
1541b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1850:
1542b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1290:
1543b285192aSMauro Carvalho Chehab 		ret = cx23888_ir_probe(dev);
1544b285192aSMauro Carvalho Chehab 		if (ret)
1545b285192aSMauro Carvalho Chehab 			break;
1546b285192aSMauro Carvalho Chehab 		dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
1547b285192aSMauro Carvalho Chehab 		v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1548b285192aSMauro Carvalho Chehab 				 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
1549b285192aSMauro Carvalho Chehab 		/*
1550b285192aSMauro Carvalho Chehab 		 * For these boards we need to invert the Tx output via the
1551b285192aSMauro Carvalho Chehab 		 * IR controller to have the LED off while idle
1552b285192aSMauro Carvalho Chehab 		 */
1553b285192aSMauro Carvalho Chehab 		v4l2_subdev_call(dev->sd_ir, ir, tx_g_parameters, &params);
1554b285192aSMauro Carvalho Chehab 		params.enable = false;
1555b285192aSMauro Carvalho Chehab 		params.shutdown = false;
1556b285192aSMauro Carvalho Chehab 		params.invert_level = true;
1557b285192aSMauro Carvalho Chehab 		v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, &params);
1558b285192aSMauro Carvalho Chehab 		params.shutdown = true;
1559b285192aSMauro Carvalho Chehab 		v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, &params);
1560b285192aSMauro Carvalho Chehab 		break;
1561b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1562b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TEVII_S470:
1563e5f670b7SAlfredo Jesús Delaiti 	case CX23885_BOARD_MYGICA_X8507:
1564e6001482SLuis Alves 	case CX23885_BOARD_TBS_6980:
1565e6001482SLuis Alves 	case CX23885_BOARD_TBS_6981:
1566b285192aSMauro Carvalho Chehab 		if (!enable_885_ir)
1567b285192aSMauro Carvalho Chehab 			break;
1568b285192aSMauro Carvalho Chehab 		dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
1569b285192aSMauro Carvalho Chehab 		if (dev->sd_ir == NULL) {
1570b285192aSMauro Carvalho Chehab 			ret = -ENODEV;
1571b285192aSMauro Carvalho Chehab 			break;
1572b285192aSMauro Carvalho Chehab 		}
1573b285192aSMauro Carvalho Chehab 		v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1574b285192aSMauro Carvalho Chehab 				 ir_rx_pin_cfg_count, ir_rx_pin_cfg);
1575b285192aSMauro Carvalho Chehab 		break;
1576b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1250:
1577b285192aSMauro Carvalho Chehab 		if (!enable_885_ir)
1578b285192aSMauro Carvalho Chehab 			break;
1579b285192aSMauro Carvalho Chehab 		dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
1580b285192aSMauro Carvalho Chehab 		if (dev->sd_ir == NULL) {
1581b285192aSMauro Carvalho Chehab 			ret = -ENODEV;
1582b285192aSMauro Carvalho Chehab 			break;
1583b285192aSMauro Carvalho Chehab 		}
1584b285192aSMauro Carvalho Chehab 		v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1585b285192aSMauro Carvalho Chehab 				 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
1586b285192aSMauro Carvalho Chehab 		break;
1587b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
1588b285192aSMauro Carvalho Chehab 		request_module("ir-kbd-i2c");
1589b285192aSMauro Carvalho Chehab 		break;
1590b285192aSMauro Carvalho Chehab 	}
1591b285192aSMauro Carvalho Chehab 
1592b285192aSMauro Carvalho Chehab 	return ret;
1593b285192aSMauro Carvalho Chehab }
1594b285192aSMauro Carvalho Chehab 
1595b285192aSMauro Carvalho Chehab void cx23885_ir_fini(struct cx23885_dev *dev)
1596b285192aSMauro Carvalho Chehab {
1597b285192aSMauro Carvalho Chehab 	switch (dev->board) {
1598b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1270:
1599b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1850:
1600b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1290:
1601b285192aSMauro Carvalho Chehab 		cx23885_irq_remove(dev, PCI_MSK_IR);
1602b285192aSMauro Carvalho Chehab 		cx23888_ir_remove(dev);
1603b285192aSMauro Carvalho Chehab 		dev->sd_ir = NULL;
1604b285192aSMauro Carvalho Chehab 		break;
1605b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1606b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TEVII_S470:
1607b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1250:
1608e5f670b7SAlfredo Jesús Delaiti 	case CX23885_BOARD_MYGICA_X8507:
1609e6001482SLuis Alves 	case CX23885_BOARD_TBS_6980:
1610e6001482SLuis Alves 	case CX23885_BOARD_TBS_6981:
1611b285192aSMauro Carvalho Chehab 		cx23885_irq_remove(dev, PCI_MSK_AV_CORE);
1612b285192aSMauro Carvalho Chehab 		/* sd_ir is a duplicate pointer to the AV Core, just clear it */
1613b285192aSMauro Carvalho Chehab 		dev->sd_ir = NULL;
1614b285192aSMauro Carvalho Chehab 		break;
1615b285192aSMauro Carvalho Chehab 	}
1616b285192aSMauro Carvalho Chehab }
1617b285192aSMauro Carvalho Chehab 
1618ada73eeeSMauro Carvalho Chehab static int netup_jtag_io(void *device, int tms, int tdi, int read_tdo)
1619b285192aSMauro Carvalho Chehab {
1620b285192aSMauro Carvalho Chehab 	int data;
1621b285192aSMauro Carvalho Chehab 	int tdo = 0;
1622b285192aSMauro Carvalho Chehab 	struct cx23885_dev *dev = (struct cx23885_dev *)device;
1623b285192aSMauro Carvalho Chehab 	/*TMS*/
1624b285192aSMauro Carvalho Chehab 	data = ((cx_read(GP0_IO)) & (~0x00000002));
1625b285192aSMauro Carvalho Chehab 	data |= (tms ? 0x00020002 : 0x00020000);
1626b285192aSMauro Carvalho Chehab 	cx_write(GP0_IO, data);
1627b285192aSMauro Carvalho Chehab 
1628b285192aSMauro Carvalho Chehab 	/*TDI*/
1629b285192aSMauro Carvalho Chehab 	data = ((cx_read(MC417_RWD)) & (~0x0000a000));
1630b285192aSMauro Carvalho Chehab 	data |= (tdi ? 0x00008000 : 0);
1631b285192aSMauro Carvalho Chehab 	cx_write(MC417_RWD, data);
1632b285192aSMauro Carvalho Chehab 	if (read_tdo)
1633b285192aSMauro Carvalho Chehab 		tdo = (data & 0x00004000) ? 1 : 0; /*TDO*/
1634b285192aSMauro Carvalho Chehab 
1635b285192aSMauro Carvalho Chehab 	cx_write(MC417_RWD, data | 0x00002000);
1636b285192aSMauro Carvalho Chehab 	udelay(1);
1637b285192aSMauro Carvalho Chehab 	/*TCK*/
1638b285192aSMauro Carvalho Chehab 	cx_write(MC417_RWD, data);
1639b285192aSMauro Carvalho Chehab 
1640b285192aSMauro Carvalho Chehab 	return tdo;
1641b285192aSMauro Carvalho Chehab }
1642b285192aSMauro Carvalho Chehab 
1643b285192aSMauro Carvalho Chehab void cx23885_ir_pci_int_enable(struct cx23885_dev *dev)
1644b285192aSMauro Carvalho Chehab {
1645b285192aSMauro Carvalho Chehab 	switch (dev->board) {
1646b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1270:
1647b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1850:
1648b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1290:
1649b285192aSMauro Carvalho Chehab 		if (dev->sd_ir)
1650b285192aSMauro Carvalho Chehab 			cx23885_irq_add_enable(dev, PCI_MSK_IR);
1651b285192aSMauro Carvalho Chehab 		break;
1652b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1653b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TEVII_S470:
1654b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1250:
1655e5f670b7SAlfredo Jesús Delaiti 	case CX23885_BOARD_MYGICA_X8507:
1656e6001482SLuis Alves 	case CX23885_BOARD_TBS_6980:
1657e6001482SLuis Alves 	case CX23885_BOARD_TBS_6981:
1658b285192aSMauro Carvalho Chehab 		if (dev->sd_ir)
1659b285192aSMauro Carvalho Chehab 			cx23885_irq_add_enable(dev, PCI_MSK_AV_CORE);
1660b285192aSMauro Carvalho Chehab 		break;
1661b285192aSMauro Carvalho Chehab 	}
1662b285192aSMauro Carvalho Chehab }
1663b285192aSMauro Carvalho Chehab 
1664b285192aSMauro Carvalho Chehab void cx23885_card_setup(struct cx23885_dev *dev)
1665b285192aSMauro Carvalho Chehab {
1666b285192aSMauro Carvalho Chehab 	struct cx23885_tsport *ts1 = &dev->ts1;
1667b285192aSMauro Carvalho Chehab 	struct cx23885_tsport *ts2 = &dev->ts2;
1668b285192aSMauro Carvalho Chehab 
1669b285192aSMauro Carvalho Chehab 	static u8 eeprom[256];
1670b285192aSMauro Carvalho Chehab 
1671b285192aSMauro Carvalho Chehab 	if (dev->i2c_bus[0].i2c_rc == 0) {
1672b285192aSMauro Carvalho Chehab 		dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
1673b285192aSMauro Carvalho Chehab 		tveeprom_read(&dev->i2c_bus[0].i2c_client,
1674b285192aSMauro Carvalho Chehab 			      eeprom, sizeof(eeprom));
1675b285192aSMauro Carvalho Chehab 	}
1676b285192aSMauro Carvalho Chehab 
1677b285192aSMauro Carvalho Chehab 	switch (dev->board) {
1678b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1250:
1679b285192aSMauro Carvalho Chehab 		if (dev->i2c_bus[0].i2c_rc == 0) {
1680b285192aSMauro Carvalho Chehab 			if (eeprom[0x80] != 0x84)
1681b285192aSMauro Carvalho Chehab 				hauppauge_eeprom(dev, eeprom+0xc0);
1682b285192aSMauro Carvalho Chehab 			else
1683b285192aSMauro Carvalho Chehab 				hauppauge_eeprom(dev, eeprom+0x80);
1684b285192aSMauro Carvalho Chehab 		}
1685b285192aSMauro Carvalho Chehab 		break;
1686b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500:
1687b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1688b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1400:
1689b285192aSMauro Carvalho Chehab 		if (dev->i2c_bus[0].i2c_rc == 0)
1690b285192aSMauro Carvalho Chehab 			hauppauge_eeprom(dev, eeprom+0x80);
1691b285192aSMauro Carvalho Chehab 		break;
1692b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1800:
1693b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
1694b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1200:
1695b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1700:
1696b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1270:
1697b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1275:
1698b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255:
1699b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
1700b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1210:
1701b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1850:
1702b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1290:
17037c62f5a1SMichael Krufky 	case CX23885_BOARD_HAUPPAUGE_HVR4400:
1704b285192aSMauro Carvalho Chehab 		if (dev->i2c_bus[0].i2c_rc == 0)
1705b285192aSMauro Carvalho Chehab 			hauppauge_eeprom(dev, eeprom+0xc0);
1706b285192aSMauro Carvalho Chehab 		break;
1707b285192aSMauro Carvalho Chehab 	}
1708b285192aSMauro Carvalho Chehab 
1709b285192aSMauro Carvalho Chehab 	switch (dev->board) {
1710e8d42373SOleh Kravchenko 	case CX23885_BOARD_AVERMEDIA_HC81R:
1711e8d42373SOleh Kravchenko 		/* Defaults for VID B */
1712e8d42373SOleh Kravchenko 		ts1->gen_ctrl_val  = 0x4; /* Parallel */
1713e8d42373SOleh Kravchenko 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1714e8d42373SOleh Kravchenko 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1715e8d42373SOleh Kravchenko 		/* Defaults for VID C */
1716e8d42373SOleh Kravchenko 		/* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
1717e8d42373SOleh Kravchenko 		ts2->gen_ctrl_val  = 0x10e;
1718e8d42373SOleh Kravchenko 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1719e8d42373SOleh Kravchenko 		ts2->src_sel_val     = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1720e8d42373SOleh Kravchenko 		break;
1721b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1722b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
1723b285192aSMauro Carvalho Chehab 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
1724b285192aSMauro Carvalho Chehab 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1725b285192aSMauro Carvalho Chehab 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1726b285192aSMauro Carvalho Chehab 		/* break omitted intentionally */
1727b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
1728b285192aSMauro Carvalho Chehab 		ts1->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
1729b285192aSMauro Carvalho Chehab 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1730b285192aSMauro Carvalho Chehab 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1731b285192aSMauro Carvalho Chehab 		break;
1732b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1850:
1733b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1800:
1734b285192aSMauro Carvalho Chehab 		/* Defaults for VID B - Analog encoder */
1735b285192aSMauro Carvalho Chehab 		/* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
1736b285192aSMauro Carvalho Chehab 		ts1->gen_ctrl_val    = 0x10e;
1737b285192aSMauro Carvalho Chehab 		ts1->ts_clk_en_val   = 0x1; /* Enable TS_CLK */
1738b285192aSMauro Carvalho Chehab 		ts1->src_sel_val     = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1739b285192aSMauro Carvalho Chehab 
1740b285192aSMauro Carvalho Chehab 		/* APB_TSVALERR_POL (active low)*/
1741b285192aSMauro Carvalho Chehab 		ts1->vld_misc_val    = 0x2000;
1742b285192aSMauro Carvalho Chehab 		ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
1743b285192aSMauro Carvalho Chehab 		cx_write(0x130184, 0xc);
1744b285192aSMauro Carvalho Chehab 
1745b285192aSMauro Carvalho Chehab 		/* Defaults for VID C */
1746b285192aSMauro Carvalho Chehab 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
1747b285192aSMauro Carvalho Chehab 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1748b285192aSMauro Carvalho Chehab 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1749b285192aSMauro Carvalho Chehab 		break;
1750b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TBS_6920:
1751b285192aSMauro Carvalho Chehab 		ts1->gen_ctrl_val  = 0x4; /* Parallel */
1752b285192aSMauro Carvalho Chehab 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1753b285192aSMauro Carvalho Chehab 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1754b285192aSMauro Carvalho Chehab 		break;
1755b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TEVII_S470:
1756b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TEVII_S471:
1757b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVBWORLD_2005:
1758f667190bSMariusz Bia?o?czyk 	case CX23885_BOARD_PROF_8000:
1759b285192aSMauro Carvalho Chehab 		ts1->gen_ctrl_val  = 0x5; /* Parallel */
1760b285192aSMauro Carvalho Chehab 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1761b285192aSMauro Carvalho Chehab 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1762b285192aSMauro Carvalho Chehab 		break;
1763b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1764b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1765b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1766b285192aSMauro Carvalho Chehab 		ts1->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
1767b285192aSMauro Carvalho Chehab 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1768b285192aSMauro Carvalho Chehab 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1769b285192aSMauro Carvalho Chehab 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
1770b285192aSMauro Carvalho Chehab 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1771b285192aSMauro Carvalho Chehab 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1772b285192aSMauro Carvalho Chehab 		break;
1773e6001482SLuis Alves 	case CX23885_BOARD_TBS_6980:
1774e6001482SLuis Alves 	case CX23885_BOARD_TBS_6981:
1775e6001482SLuis Alves 		ts1->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
1776e6001482SLuis Alves 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1777e6001482SLuis Alves 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1778e6001482SLuis Alves 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
1779e6001482SLuis Alves 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1780e6001482SLuis Alves 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1781e6001482SLuis Alves 		tbs_card_init(dev);
1782e6001482SLuis Alves 		break;
1783b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MYGICA_X8506:
1784b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MAGICPRO_PROHDTVE2:
17850d1b5265SMauro Carvalho Chehab 	case CX23885_BOARD_MYGICA_X8507:
1786b285192aSMauro Carvalho Chehab 		ts1->gen_ctrl_val  = 0x5; /* Parallel */
1787b285192aSMauro Carvalho Chehab 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1788b285192aSMauro Carvalho Chehab 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1789b285192aSMauro Carvalho Chehab 		break;
1790b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MYGICA_X8558PRO:
1791b285192aSMauro Carvalho Chehab 		ts1->gen_ctrl_val  = 0x5; /* Parallel */
1792b285192aSMauro Carvalho Chehab 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1793b285192aSMauro Carvalho Chehab 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1794b285192aSMauro Carvalho Chehab 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
1795b285192aSMauro Carvalho Chehab 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1796b285192aSMauro Carvalho Chehab 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1797b285192aSMauro Carvalho Chehab 		break;
17987c62f5a1SMichael Krufky 	case CX23885_BOARD_HAUPPAUGE_HVR4400:
17997c62f5a1SMichael Krufky 		ts1->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
18007c62f5a1SMichael Krufky 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
18017c62f5a1SMichael Krufky 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
18027c62f5a1SMichael Krufky 		break;
1803b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1250:
1804b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500:
1805b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1806b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
1807b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1200:
1808b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1700:
1809b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1400:
1810b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1811642ca1a0SAnca Emanuel 	case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
1812b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1813b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1814b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1270:
1815b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1275:
1816b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255:
1817b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
1818b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1210:
1819b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1820b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1290:
1821b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1822b285192aSMauro Carvalho Chehab 	default:
1823b285192aSMauro Carvalho Chehab 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
1824b285192aSMauro Carvalho Chehab 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1825b285192aSMauro Carvalho Chehab 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1826b285192aSMauro Carvalho Chehab 	}
1827b285192aSMauro Carvalho Chehab 
1828b285192aSMauro Carvalho Chehab 	/* Certain boards support analog, or require the avcore to be
1829b285192aSMauro Carvalho Chehab 	 * loaded, ensure this happens.
1830b285192aSMauro Carvalho Chehab 	 */
1831b285192aSMauro Carvalho Chehab 	switch (dev->board) {
1832b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TEVII_S470:
1833b285192aSMauro Carvalho Chehab 		/* Currently only enabled for the integrated IR controller */
1834b285192aSMauro Carvalho Chehab 		if (!enable_885_ir)
1835b285192aSMauro Carvalho Chehab 			break;
1836b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1250:
1837b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1800:
1838b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
1839b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1700:
1840b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1841642ca1a0SAnca Emanuel 	case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
1842b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1843b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1844b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1845b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1846b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1847b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255:
1848b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
1849b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1270:
1850b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1850:
1851b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MYGICA_X8506:
1852b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1853b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1290:
1854b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
1855b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1856b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500:
1857b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MPX885:
1858b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MYGICA_X8507:
1859b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1860e8d42373SOleh Kravchenko 	case CX23885_BOARD_AVERMEDIA_HC81R:
1861e6001482SLuis Alves 	case CX23885_BOARD_TBS_6980:
1862e6001482SLuis Alves 	case CX23885_BOARD_TBS_6981:
1863b285192aSMauro Carvalho Chehab 		dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
1864b285192aSMauro Carvalho Chehab 				&dev->i2c_bus[2].i2c_adap,
1865b285192aSMauro Carvalho Chehab 				"cx25840", 0x88 >> 1, NULL);
1866b285192aSMauro Carvalho Chehab 		if (dev->sd_cx25840) {
1867b285192aSMauro Carvalho Chehab 			dev->sd_cx25840->grp_id = CX23885_HW_AV_CORE;
1868b285192aSMauro Carvalho Chehab 			v4l2_subdev_call(dev->sd_cx25840, core, load_fw);
1869b285192aSMauro Carvalho Chehab 		}
1870b285192aSMauro Carvalho Chehab 		break;
1871b285192aSMauro Carvalho Chehab 	}
1872b285192aSMauro Carvalho Chehab 
1873b285192aSMauro Carvalho Chehab 	/* AUX-PLL 27MHz CLK */
1874b285192aSMauro Carvalho Chehab 	switch (dev->board) {
1875b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1876b285192aSMauro Carvalho Chehab 		netup_initialize(dev);
1877b285192aSMauro Carvalho Chehab 		break;
1878b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: {
1879b285192aSMauro Carvalho Chehab 		int ret;
1880b285192aSMauro Carvalho Chehab 		const struct firmware *fw;
1881b285192aSMauro Carvalho Chehab 		const char *filename = "dvb-netup-altera-01.fw";
1882b285192aSMauro Carvalho Chehab 		char *action = "configure";
1883b285192aSMauro Carvalho Chehab 		static struct netup_card_info cinfo;
1884b285192aSMauro Carvalho Chehab 		struct altera_config netup_config = {
1885b285192aSMauro Carvalho Chehab 			.dev = dev,
1886b285192aSMauro Carvalho Chehab 			.action = action,
1887b285192aSMauro Carvalho Chehab 			.jtag_io = netup_jtag_io,
1888b285192aSMauro Carvalho Chehab 		};
1889b285192aSMauro Carvalho Chehab 
1890b285192aSMauro Carvalho Chehab 		netup_initialize(dev);
1891b285192aSMauro Carvalho Chehab 
1892b285192aSMauro Carvalho Chehab 		netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo);
1893b285192aSMauro Carvalho Chehab 		if (netup_card_rev)
1894b285192aSMauro Carvalho Chehab 			cinfo.rev = netup_card_rev;
1895b285192aSMauro Carvalho Chehab 
1896b285192aSMauro Carvalho Chehab 		switch (cinfo.rev) {
1897b285192aSMauro Carvalho Chehab 		case 0x4:
1898b285192aSMauro Carvalho Chehab 			filename = "dvb-netup-altera-04.fw";
1899b285192aSMauro Carvalho Chehab 			break;
1900b285192aSMauro Carvalho Chehab 		default:
1901b285192aSMauro Carvalho Chehab 			filename = "dvb-netup-altera-01.fw";
1902b285192aSMauro Carvalho Chehab 			break;
1903b285192aSMauro Carvalho Chehab 		}
1904b285192aSMauro Carvalho Chehab 		printk(KERN_INFO "NetUP card rev=0x%x fw_filename=%s\n",
1905b285192aSMauro Carvalho Chehab 				cinfo.rev, filename);
1906b285192aSMauro Carvalho Chehab 
1907b285192aSMauro Carvalho Chehab 		ret = request_firmware(&fw, filename, &dev->pci->dev);
1908b285192aSMauro Carvalho Chehab 		if (ret != 0)
1909b285192aSMauro Carvalho Chehab 			printk(KERN_ERR "did not find the firmware file. (%s) "
1910b285192aSMauro Carvalho Chehab 			"Please see linux/Documentation/dvb/ for more details "
1911b285192aSMauro Carvalho Chehab 			"on firmware-problems.", filename);
1912b285192aSMauro Carvalho Chehab 		else
1913b285192aSMauro Carvalho Chehab 			altera_init(&netup_config, fw);
1914b285192aSMauro Carvalho Chehab 
1915b285192aSMauro Carvalho Chehab 		release_firmware(fw);
1916b285192aSMauro Carvalho Chehab 		break;
1917b285192aSMauro Carvalho Chehab 	}
1918b285192aSMauro Carvalho Chehab 	}
1919b285192aSMauro Carvalho Chehab }
1920b285192aSMauro Carvalho Chehab 
1921b285192aSMauro Carvalho Chehab /* ------------------------------------------------------------------ */
1922