1b285192aSMauro Carvalho Chehab /*
2b285192aSMauro Carvalho Chehab  *  Driver for the Conexant CX23885 PCIe bridge
3b285192aSMauro Carvalho Chehab  *
4b285192aSMauro Carvalho Chehab  *  Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
5b285192aSMauro Carvalho Chehab  *
6b285192aSMauro Carvalho Chehab  *  This program is free software; you can redistribute it and/or modify
7b285192aSMauro Carvalho Chehab  *  it under the terms of the GNU General Public License as published by
8b285192aSMauro Carvalho Chehab  *  the Free Software Foundation; either version 2 of the License, or
9b285192aSMauro Carvalho Chehab  *  (at your option) any later version.
10b285192aSMauro Carvalho Chehab  *
11b285192aSMauro Carvalho Chehab  *  This program is distributed in the hope that it will be useful,
12b285192aSMauro Carvalho Chehab  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
13b285192aSMauro Carvalho Chehab  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14b285192aSMauro Carvalho Chehab  *
15b285192aSMauro Carvalho Chehab  *  GNU General Public License for more details.
16b285192aSMauro Carvalho Chehab  */
17b285192aSMauro Carvalho Chehab 
18b285192aSMauro Carvalho Chehab #include <linux/init.h>
19b285192aSMauro Carvalho Chehab #include <linux/module.h>
20b285192aSMauro Carvalho Chehab #include <linux/pci.h>
21b285192aSMauro Carvalho Chehab #include <linux/delay.h>
22d647f0b7SMauro Carvalho Chehab #include <media/drv-intf/cx25840.h>
23b285192aSMauro Carvalho Chehab #include <linux/firmware.h>
24b285192aSMauro Carvalho Chehab #include <misc/altera.h>
25b285192aSMauro Carvalho Chehab 
26b285192aSMauro Carvalho Chehab #include "cx23885.h"
27b285192aSMauro Carvalho Chehab #include "tuner-xc2028.h"
28b285192aSMauro Carvalho Chehab #include "netup-eeprom.h"
29b285192aSMauro Carvalho Chehab #include "netup-init.h"
30b285192aSMauro Carvalho Chehab #include "altera-ci.h"
31b285192aSMauro Carvalho Chehab #include "xc4000.h"
32b285192aSMauro Carvalho Chehab #include "xc5000.h"
33b285192aSMauro Carvalho Chehab #include "cx23888-ir.h"
34b285192aSMauro Carvalho Chehab 
3589343055SAnton Nurkin static unsigned int netup_card_rev = 4;
36b285192aSMauro Carvalho Chehab module_param(netup_card_rev, int, 0644);
37b285192aSMauro Carvalho Chehab MODULE_PARM_DESC(netup_card_rev,
38b285192aSMauro Carvalho Chehab 		"NetUP Dual DVB-T/C CI card revision");
39b285192aSMauro Carvalho Chehab static unsigned int enable_885_ir;
40b285192aSMauro Carvalho Chehab module_param(enable_885_ir, int, 0644);
41b285192aSMauro Carvalho Chehab MODULE_PARM_DESC(enable_885_ir,
42b285192aSMauro Carvalho Chehab 		 "Enable integrated IR controller for supported\n"
43b285192aSMauro Carvalho Chehab 		 "\t\t    CX2388[57] boards that are wired for it:\n"
44b285192aSMauro Carvalho Chehab 		 "\t\t\tHVR-1250 (reported safe)\n"
45b285192aSMauro Carvalho Chehab 		 "\t\t\tTerraTec Cinergy T PCIe Dual (not well tested, appears to be safe)\n"
46b285192aSMauro Carvalho Chehab 		 "\t\t\tTeVii S470 (reported unsafe)\n"
47b285192aSMauro Carvalho Chehab 		 "\t\t    This can cause an interrupt storm with some cards.\n"
48b285192aSMauro Carvalho Chehab 		 "\t\t    Default: 0 [Disabled]");
49b285192aSMauro Carvalho Chehab 
50b285192aSMauro Carvalho Chehab /* ------------------------------------------------------------------ */
51b285192aSMauro Carvalho Chehab /* board config info                                                  */
52b285192aSMauro Carvalho Chehab 
53b285192aSMauro Carvalho Chehab struct cx23885_board cx23885_boards[] = {
54b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_UNKNOWN] = {
55b285192aSMauro Carvalho Chehab 		.name		= "UNKNOWN/GENERIC",
56b285192aSMauro Carvalho Chehab 		/* Ensure safe default for unknown boards */
57b285192aSMauro Carvalho Chehab 		.clk_freq       = 0,
58b285192aSMauro Carvalho Chehab 		.input          = {{
59b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
60b285192aSMauro Carvalho Chehab 			.vmux   = 0,
61b285192aSMauro Carvalho Chehab 		}, {
62b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE2,
63b285192aSMauro Carvalho Chehab 			.vmux   = 1,
64b285192aSMauro Carvalho Chehab 		}, {
65b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE3,
66b285192aSMauro Carvalho Chehab 			.vmux   = 2,
67b285192aSMauro Carvalho Chehab 		}, {
68b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE4,
69b285192aSMauro Carvalho Chehab 			.vmux   = 3,
70b285192aSMauro Carvalho Chehab 		} },
71b285192aSMauro Carvalho Chehab 	},
72b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
73b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1800lp",
74b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
75b285192aSMauro Carvalho Chehab 		.input          = {{
76b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
77b285192aSMauro Carvalho Chehab 			.vmux   = 0,
78b285192aSMauro Carvalho Chehab 			.gpio0  = 0xff00,
79b285192aSMauro Carvalho Chehab 		}, {
80b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_DEBUG,
81b285192aSMauro Carvalho Chehab 			.vmux   = 0,
82b285192aSMauro Carvalho Chehab 			.gpio0  = 0xff01,
83b285192aSMauro Carvalho Chehab 		}, {
84b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
85b285192aSMauro Carvalho Chehab 			.vmux   = 1,
86b285192aSMauro Carvalho Chehab 			.gpio0  = 0xff02,
87b285192aSMauro Carvalho Chehab 		}, {
88b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
89b285192aSMauro Carvalho Chehab 			.vmux   = 2,
90b285192aSMauro Carvalho Chehab 			.gpio0  = 0xff02,
91b285192aSMauro Carvalho Chehab 		} },
92b285192aSMauro Carvalho Chehab 	},
93b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1800] = {
94b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1800",
95b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
96b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_ENCODER,
97b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
98b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_PHILIPS_TDA8290,
99b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x42, /* 0x84 >> 1 */
100b285192aSMauro Carvalho Chehab 		.tuner_bus	= 1,
101b285192aSMauro Carvalho Chehab 		.input          = {{
102b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
103b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
104b285192aSMauro Carvalho Chehab 					CX25840_VIN5_CH2 |
105b285192aSMauro Carvalho Chehab 					CX25840_VIN2_CH1,
106b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO8,
107b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
108b285192aSMauro Carvalho Chehab 		}, {
109b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
110b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
111b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
112b285192aSMauro Carvalho Chehab 					CX25840_VIN6_CH1,
113b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
114b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
115b285192aSMauro Carvalho Chehab 		}, {
116b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
117b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
118b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
119b285192aSMauro Carvalho Chehab 					CX25840_VIN8_CH1 |
120b285192aSMauro Carvalho Chehab 					CX25840_SVIDEO_ON,
121b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
122b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
123b285192aSMauro Carvalho Chehab 		} },
124b285192aSMauro Carvalho Chehab 	},
125b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1250] = {
126b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1250",
127b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
128b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
129b285192aSMauro Carvalho Chehab #ifdef MT2131_NO_ANALOG_SUPPORT_YET
130b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_PHILIPS_TDA8290,
131b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x42, /* 0x84 >> 1 */
132b285192aSMauro Carvalho Chehab 		.tuner_bus	= 1,
133b285192aSMauro Carvalho Chehab #endif
134b285192aSMauro Carvalho Chehab 		.force_bff	= 1,
135b285192aSMauro Carvalho Chehab 		.input          = {{
136b285192aSMauro Carvalho Chehab #ifdef MT2131_NO_ANALOG_SUPPORT_YET
137b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
138b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
139b285192aSMauro Carvalho Chehab 					CX25840_VIN5_CH2 |
140b285192aSMauro Carvalho Chehab 					CX25840_VIN2_CH1,
141b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO8,
142b285192aSMauro Carvalho Chehab 			.gpio0  = 0xff00,
143b285192aSMauro Carvalho Chehab 		}, {
144b285192aSMauro Carvalho Chehab #endif
145b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
146b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
147b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
148b285192aSMauro Carvalho Chehab 					CX25840_VIN6_CH1,
149b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
150b285192aSMauro Carvalho Chehab 			.gpio0  = 0xff02,
151b285192aSMauro Carvalho Chehab 		}, {
152b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
153b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
154b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
155b285192aSMauro Carvalho Chehab 					CX25840_VIN8_CH1 |
156b285192aSMauro Carvalho Chehab 					CX25840_SVIDEO_ON,
157b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
158b285192aSMauro Carvalho Chehab 			.gpio0  = 0xff02,
159b285192aSMauro Carvalho Chehab 		} },
160b285192aSMauro Carvalho Chehab 	},
161b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
162b285192aSMauro Carvalho Chehab 		.name		= "DViCO FusionHDTV5 Express",
163b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
164b285192aSMauro Carvalho Chehab 	},
165b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
166b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1500Q",
167b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
168b285192aSMauro Carvalho Chehab 	},
169b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1500] = {
170b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1500",
171b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
172b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
173b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_XC2028,
174b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x61, /* 0xc2 >> 1 */
175b285192aSMauro Carvalho Chehab 		.input          = {{
176b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
177b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
178b285192aSMauro Carvalho Chehab 					CX25840_VIN5_CH2 |
179b285192aSMauro Carvalho Chehab 					CX25840_VIN2_CH1,
180b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
181b285192aSMauro Carvalho Chehab 		}, {
182b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
183b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
184b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
185b285192aSMauro Carvalho Chehab 					CX25840_VIN6_CH1,
186b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
187b285192aSMauro Carvalho Chehab 		}, {
188b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
189b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
190b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
191b285192aSMauro Carvalho Chehab 					CX25840_VIN8_CH1 |
192b285192aSMauro Carvalho Chehab 					CX25840_SVIDEO_ON,
193b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
194b285192aSMauro Carvalho Chehab 		} },
195b285192aSMauro Carvalho Chehab 	},
196b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1200] = {
197b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1200",
198b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
199b285192aSMauro Carvalho Chehab 	},
200b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1700] = {
201b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1700",
202b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
203b285192aSMauro Carvalho Chehab 	},
204b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1400] = {
205b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1400",
206b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
207b285192aSMauro Carvalho Chehab 	},
208b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
209b285192aSMauro Carvalho Chehab 		.name		= "DViCO FusionHDTV7 Dual Express",
210b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
211b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
212b285192aSMauro Carvalho Chehab 	},
213b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
214b285192aSMauro Carvalho Chehab 		.name		= "DViCO FusionHDTV DVB-T Dual Express",
215b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
216b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
217b285192aSMauro Carvalho Chehab 	},
218b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
219b285192aSMauro Carvalho Chehab 		.name		= "Leadtek Winfast PxDVR3200 H",
220b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
221b285192aSMauro Carvalho Chehab 	},
222642ca1a0SAnca Emanuel 	[CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200] = {
223642ca1a0SAnca Emanuel 		.name		= "Leadtek Winfast PxPVR2200",
224642ca1a0SAnca Emanuel 		.porta		= CX23885_ANALOG_VIDEO,
225642ca1a0SAnca Emanuel 		.tuner_type	= TUNER_XC2028,
226642ca1a0SAnca Emanuel 		.tuner_addr	= 0x61,
227642ca1a0SAnca Emanuel 		.tuner_bus	= 1,
228642ca1a0SAnca Emanuel 		.input		= {{
229642ca1a0SAnca Emanuel 			.type	= CX23885_VMUX_TELEVISION,
230642ca1a0SAnca Emanuel 			.vmux	= CX25840_VIN2_CH1 |
231642ca1a0SAnca Emanuel 				  CX25840_VIN5_CH2,
232642ca1a0SAnca Emanuel 			.amux	= CX25840_AUDIO8,
233642ca1a0SAnca Emanuel 			.gpio0	= 0x704040,
234642ca1a0SAnca Emanuel 		}, {
235642ca1a0SAnca Emanuel 			.type	= CX23885_VMUX_COMPOSITE1,
236642ca1a0SAnca Emanuel 			.vmux	= CX25840_COMPOSITE1,
237642ca1a0SAnca Emanuel 			.amux	= CX25840_AUDIO7,
238642ca1a0SAnca Emanuel 			.gpio0	= 0x704040,
239642ca1a0SAnca Emanuel 		}, {
240642ca1a0SAnca Emanuel 			.type	= CX23885_VMUX_SVIDEO,
241642ca1a0SAnca Emanuel 			.vmux	= CX25840_SVIDEO_LUMA3 |
242642ca1a0SAnca Emanuel 				  CX25840_SVIDEO_CHROMA4,
243642ca1a0SAnca Emanuel 			.amux	= CX25840_AUDIO7,
244642ca1a0SAnca Emanuel 			.gpio0	= 0x704040,
245642ca1a0SAnca Emanuel 		}, {
246642ca1a0SAnca Emanuel 			.type	= CX23885_VMUX_COMPONENT,
247642ca1a0SAnca Emanuel 			.vmux	= CX25840_VIN7_CH1 |
248642ca1a0SAnca Emanuel 				  CX25840_VIN6_CH2 |
249642ca1a0SAnca Emanuel 				  CX25840_VIN8_CH3 |
250642ca1a0SAnca Emanuel 				  CX25840_COMPONENT_ON,
251642ca1a0SAnca Emanuel 			.amux	= CX25840_AUDIO7,
252642ca1a0SAnca Emanuel 			.gpio0	= 0x704040,
253642ca1a0SAnca Emanuel 		} },
254642ca1a0SAnca Emanuel 	},
255b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000] = {
256b285192aSMauro Carvalho Chehab 		.name		= "Leadtek Winfast PxDVR3200 H XC4000",
257b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
258b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
259b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_XC4000,
260b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x61,
261b285192aSMauro Carvalho Chehab 		.radio_type	= UNSET,
262b285192aSMauro Carvalho Chehab 		.radio_addr	= ADDR_UNSET,
263b285192aSMauro Carvalho Chehab 		.input		= {{
264b285192aSMauro Carvalho Chehab 			.type	= CX23885_VMUX_TELEVISION,
265b285192aSMauro Carvalho Chehab 			.vmux	= CX25840_VIN2_CH1 |
266b285192aSMauro Carvalho Chehab 				  CX25840_VIN5_CH2 |
267b285192aSMauro Carvalho Chehab 				  CX25840_NONE0_CH3,
268b285192aSMauro Carvalho Chehab 		}, {
269b285192aSMauro Carvalho Chehab 			.type	= CX23885_VMUX_COMPOSITE1,
270b285192aSMauro Carvalho Chehab 			.vmux	= CX25840_COMPOSITE1,
271b285192aSMauro Carvalho Chehab 		}, {
272b285192aSMauro Carvalho Chehab 			.type	= CX23885_VMUX_SVIDEO,
273b285192aSMauro Carvalho Chehab 			.vmux	= CX25840_SVIDEO_LUMA3 |
274b285192aSMauro Carvalho Chehab 				  CX25840_SVIDEO_CHROMA4,
275b285192aSMauro Carvalho Chehab 		}, {
276b285192aSMauro Carvalho Chehab 			.type	= CX23885_VMUX_COMPONENT,
277b285192aSMauro Carvalho Chehab 			.vmux	= CX25840_VIN7_CH1 |
278b285192aSMauro Carvalho Chehab 				  CX25840_VIN6_CH2 |
279b285192aSMauro Carvalho Chehab 				  CX25840_VIN8_CH3 |
280b285192aSMauro Carvalho Chehab 				  CX25840_COMPONENT_ON,
281b285192aSMauro Carvalho Chehab 		} },
282b285192aSMauro Carvalho Chehab 	},
283b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = {
284b285192aSMauro Carvalho Chehab 		.name		= "Compro VideoMate E650F",
285b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
286b285192aSMauro Carvalho Chehab 	},
287b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_TBS_6920] = {
288b285192aSMauro Carvalho Chehab 		.name		= "TurboSight TBS 6920",
289b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
290b285192aSMauro Carvalho Chehab 	},
291e6001482SLuis Alves 	[CX23885_BOARD_TBS_6980] = {
292e6001482SLuis Alves 		.name		= "TurboSight TBS 6980",
293e6001482SLuis Alves 		.portb		= CX23885_MPEG_DVB,
294e6001482SLuis Alves 		.portc		= CX23885_MPEG_DVB,
295e6001482SLuis Alves 	},
296e6001482SLuis Alves 	[CX23885_BOARD_TBS_6981] = {
297e6001482SLuis Alves 		.name		= "TurboSight TBS 6981",
298e6001482SLuis Alves 		.portb		= CX23885_MPEG_DVB,
299e6001482SLuis Alves 		.portc		= CX23885_MPEG_DVB,
300e6001482SLuis Alves 	},
301b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_TEVII_S470] = {
302b285192aSMauro Carvalho Chehab 		.name		= "TeVii S470",
303b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
304b285192aSMauro Carvalho Chehab 	},
305b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_DVBWORLD_2005] = {
306b285192aSMauro Carvalho Chehab 		.name		= "DVBWorld DVB-S2 2005",
307b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
308b285192aSMauro Carvalho Chehab 	},
309b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = {
310b285192aSMauro Carvalho Chehab 		.ci_type	= 1,
311b285192aSMauro Carvalho Chehab 		.name		= "NetUP Dual DVB-S2 CI",
312b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
313b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
314b285192aSMauro Carvalho Chehab 	},
315b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1270] = {
316b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1270",
317b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
318b285192aSMauro Carvalho Chehab 	},
319b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1275] = {
320b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1275",
321b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
322b285192aSMauro Carvalho Chehab 	},
323b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1255] = {
324b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1255",
325b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
326b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
327b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_ABSENT,
328b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x42, /* 0x84 >> 1 */
329b285192aSMauro Carvalho Chehab 		.force_bff	= 1,
330b285192aSMauro Carvalho Chehab 		.input          = {{
331b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
332b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
333b285192aSMauro Carvalho Chehab 					CX25840_VIN5_CH2 |
334b285192aSMauro Carvalho Chehab 					CX25840_VIN2_CH1 |
335b285192aSMauro Carvalho Chehab 					CX25840_DIF_ON,
336b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO8,
337b285192aSMauro Carvalho Chehab 		}, {
338b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
339b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
340b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
341b285192aSMauro Carvalho Chehab 					CX25840_VIN6_CH1,
342b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
343b285192aSMauro Carvalho Chehab 		}, {
344b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
345b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
346b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
347b285192aSMauro Carvalho Chehab 					CX25840_VIN8_CH1 |
348b285192aSMauro Carvalho Chehab 					CX25840_SVIDEO_ON,
349b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
350b285192aSMauro Carvalho Chehab 		} },
351b285192aSMauro Carvalho Chehab 	},
352b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1255_22111] = {
353b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1255",
354b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
355b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
356b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_ABSENT,
357b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x42, /* 0x84 >> 1 */
358b285192aSMauro Carvalho Chehab 		.force_bff	= 1,
359b285192aSMauro Carvalho Chehab 		.input          = {{
360b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
361b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
362b285192aSMauro Carvalho Chehab 					CX25840_VIN5_CH2 |
363b285192aSMauro Carvalho Chehab 					CX25840_VIN2_CH1 |
364b285192aSMauro Carvalho Chehab 					CX25840_DIF_ON,
365b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO8,
366b285192aSMauro Carvalho Chehab 		}, {
367b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
368b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
369b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
370b285192aSMauro Carvalho Chehab 					CX25840_VIN8_CH1 |
371b285192aSMauro Carvalho Chehab 					CX25840_SVIDEO_ON,
372b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
373b285192aSMauro Carvalho Chehab 		} },
374b285192aSMauro Carvalho Chehab 	},
375b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1210] = {
376b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1210",
377b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
378b285192aSMauro Carvalho Chehab 	},
379b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_MYGICA_X8506] = {
380b285192aSMauro Carvalho Chehab 		.name		= "Mygica X8506 DMB-TH",
381b285192aSMauro Carvalho Chehab 		.tuner_type = TUNER_XC5000,
382b285192aSMauro Carvalho Chehab 		.tuner_addr = 0x61,
383b285192aSMauro Carvalho Chehab 		.tuner_bus	= 1,
384b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
385b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
386b285192aSMauro Carvalho Chehab 		.input		= {
387b285192aSMauro Carvalho Chehab 			{
388b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_TELEVISION,
389b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPOSITE2,
390b285192aSMauro Carvalho Chehab 			},
391b285192aSMauro Carvalho Chehab 			{
392b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_COMPOSITE1,
393b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPOSITE8,
394b285192aSMauro Carvalho Chehab 			},
395b285192aSMauro Carvalho Chehab 			{
396b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_SVIDEO,
397b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_SVIDEO_LUMA3 |
398b285192aSMauro Carvalho Chehab 						CX25840_SVIDEO_CHROMA4,
399b285192aSMauro Carvalho Chehab 			},
400b285192aSMauro Carvalho Chehab 			{
401b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_COMPONENT,
402b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPONENT_ON |
403b285192aSMauro Carvalho Chehab 					CX25840_VIN1_CH1 |
404b285192aSMauro Carvalho Chehab 					CX25840_VIN6_CH2 |
405b285192aSMauro Carvalho Chehab 					CX25840_VIN7_CH3,
406b285192aSMauro Carvalho Chehab 			},
407b285192aSMauro Carvalho Chehab 		},
408b285192aSMauro Carvalho Chehab 	},
409b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_MAGICPRO_PROHDTVE2] = {
410b285192aSMauro Carvalho Chehab 		.name		= "Magic-Pro ProHDTV Extreme 2",
411b285192aSMauro Carvalho Chehab 		.tuner_type = TUNER_XC5000,
412b285192aSMauro Carvalho Chehab 		.tuner_addr = 0x61,
413b285192aSMauro Carvalho Chehab 		.tuner_bus	= 1,
414b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
415b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
416b285192aSMauro Carvalho Chehab 		.input		= {
417b285192aSMauro Carvalho Chehab 			{
418b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_TELEVISION,
419b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPOSITE2,
420b285192aSMauro Carvalho Chehab 			},
421b285192aSMauro Carvalho Chehab 			{
422b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_COMPOSITE1,
423b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPOSITE8,
424b285192aSMauro Carvalho Chehab 			},
425b285192aSMauro Carvalho Chehab 			{
426b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_SVIDEO,
427b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_SVIDEO_LUMA3 |
428b285192aSMauro Carvalho Chehab 						CX25840_SVIDEO_CHROMA4,
429b285192aSMauro Carvalho Chehab 			},
430b285192aSMauro Carvalho Chehab 			{
431b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_COMPONENT,
432b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPONENT_ON |
433b285192aSMauro Carvalho Chehab 					CX25840_VIN1_CH1 |
434b285192aSMauro Carvalho Chehab 					CX25840_VIN6_CH2 |
435b285192aSMauro Carvalho Chehab 					CX25840_VIN7_CH3,
436b285192aSMauro Carvalho Chehab 			},
437b285192aSMauro Carvalho Chehab 		},
438b285192aSMauro Carvalho Chehab 	},
439b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1850] = {
440b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1850",
441b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
442b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_ENCODER,
443b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
444b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_ABSENT,
445b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x42, /* 0x84 >> 1 */
446b285192aSMauro Carvalho Chehab 		.force_bff	= 1,
447b285192aSMauro Carvalho Chehab 		.input          = {{
448b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
449b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
450b285192aSMauro Carvalho Chehab 					CX25840_VIN5_CH2 |
451b285192aSMauro Carvalho Chehab 					CX25840_VIN2_CH1 |
452b285192aSMauro Carvalho Chehab 					CX25840_DIF_ON,
453b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO8,
454b285192aSMauro Carvalho Chehab 		}, {
455b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
456b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
457b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
458b285192aSMauro Carvalho Chehab 					CX25840_VIN6_CH1,
459b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
460b285192aSMauro Carvalho Chehab 		}, {
461b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
462b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
463b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
464b285192aSMauro Carvalho Chehab 					CX25840_VIN8_CH1 |
465b285192aSMauro Carvalho Chehab 					CX25840_SVIDEO_ON,
466b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
467b285192aSMauro Carvalho Chehab 		} },
468b285192aSMauro Carvalho Chehab 	},
469b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_COMPRO_VIDEOMATE_E800] = {
470b285192aSMauro Carvalho Chehab 		.name		= "Compro VideoMate E800",
471b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
472b285192aSMauro Carvalho Chehab 	},
473b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1290] = {
474b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1290",
475b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
476b285192aSMauro Carvalho Chehab 	},
477b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_MYGICA_X8558PRO] = {
478b285192aSMauro Carvalho Chehab 		.name		= "Mygica X8558 PRO DMB-TH",
479b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
480b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
481b285192aSMauro Carvalho Chehab 	},
482b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_LEADTEK_WINFAST_PXTV1200] = {
483b285192aSMauro Carvalho Chehab 		.name           = "LEADTEK WinFast PxTV1200",
484b285192aSMauro Carvalho Chehab 		.porta          = CX23885_ANALOG_VIDEO,
485b285192aSMauro Carvalho Chehab 		.tuner_type     = TUNER_XC2028,
486b285192aSMauro Carvalho Chehab 		.tuner_addr     = 0x61,
487b285192aSMauro Carvalho Chehab 		.tuner_bus	= 1,
488b285192aSMauro Carvalho Chehab 		.input          = {{
489b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
490b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_VIN2_CH1 |
491b285192aSMauro Carvalho Chehab 				  CX25840_VIN5_CH2 |
492b285192aSMauro Carvalho Chehab 				  CX25840_NONE0_CH3,
493b285192aSMauro Carvalho Chehab 		}, {
494b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
495b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_COMPOSITE1,
496b285192aSMauro Carvalho Chehab 		}, {
497b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
498b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_SVIDEO_LUMA3 |
499b285192aSMauro Carvalho Chehab 				  CX25840_SVIDEO_CHROMA4,
500b285192aSMauro Carvalho Chehab 		}, {
501b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPONENT,
502b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_VIN7_CH1 |
503b285192aSMauro Carvalho Chehab 				  CX25840_VIN6_CH2 |
504b285192aSMauro Carvalho Chehab 				  CX25840_VIN8_CH3 |
505b285192aSMauro Carvalho Chehab 				  CX25840_COMPONENT_ON,
506b285192aSMauro Carvalho Chehab 		} },
507b285192aSMauro Carvalho Chehab 	},
508b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_GOTVIEW_X5_3D_HYBRID] = {
509b285192aSMauro Carvalho Chehab 		.name		= "GoTView X5 3D Hybrid",
510b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_XC5000,
511b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x64,
512b285192aSMauro Carvalho Chehab 		.tuner_bus	= 1,
513b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
514b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
515b285192aSMauro Carvalho Chehab 		.input          = {{
516b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
517b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_VIN2_CH1 |
518b285192aSMauro Carvalho Chehab 				  CX25840_VIN5_CH2,
519b285192aSMauro Carvalho Chehab 			.gpio0	= 0x02,
520b285192aSMauro Carvalho Chehab 		}, {
521b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
522b285192aSMauro Carvalho Chehab 			.vmux   = CX23885_VMUX_COMPOSITE1,
523b285192aSMauro Carvalho Chehab 		}, {
524b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
525b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_SVIDEO_LUMA3 |
526b285192aSMauro Carvalho Chehab 				  CX25840_SVIDEO_CHROMA4,
527b285192aSMauro Carvalho Chehab 		} },
528b285192aSMauro Carvalho Chehab 	},
529b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF] = {
530b285192aSMauro Carvalho Chehab 		.ci_type	= 2,
531b285192aSMauro Carvalho Chehab 		.name		= "NetUP Dual DVB-T/C-CI RF",
532b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
533b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
534b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
535b285192aSMauro Carvalho Chehab 		.num_fds_portb	= 2,
536b285192aSMauro Carvalho Chehab 		.num_fds_portc	= 2,
537b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_XC5000,
538b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x64,
539b285192aSMauro Carvalho Chehab 		.input          = { {
540b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_TELEVISION,
541b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPOSITE1,
542b285192aSMauro Carvalho Chehab 		} },
543b285192aSMauro Carvalho Chehab 	},
544b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_MPX885] = {
545b285192aSMauro Carvalho Chehab 		.name		= "MPX-885",
546b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
547b285192aSMauro Carvalho Chehab 		.input          = {{
548b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
549b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_COMPOSITE1,
550b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO6,
551b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
552b285192aSMauro Carvalho Chehab 		}, {
553b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE2,
554b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_COMPOSITE2,
555b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO6,
556b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
557b285192aSMauro Carvalho Chehab 		}, {
558b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE3,
559b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_COMPOSITE3,
560b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
561b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
562b285192aSMauro Carvalho Chehab 		}, {
563b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE4,
564b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_COMPOSITE4,
565b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
566b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
567b285192aSMauro Carvalho Chehab 		} },
568b285192aSMauro Carvalho Chehab 	},
569b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_MYGICA_X8507] = {
5700d1b5265SMauro Carvalho Chehab 		.name		= "Mygica X8502/X8507 ISDB-T",
571b285192aSMauro Carvalho Chehab 		.tuner_type = TUNER_XC5000,
572b285192aSMauro Carvalho Chehab 		.tuner_addr = 0x61,
573b285192aSMauro Carvalho Chehab 		.tuner_bus	= 1,
574b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
5750d1b5265SMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
576b285192aSMauro Carvalho Chehab 		.input		= {
577b285192aSMauro Carvalho Chehab 			{
578b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_TELEVISION,
579b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPOSITE2,
580b285192aSMauro Carvalho Chehab 				.amux   = CX25840_AUDIO8,
581b285192aSMauro Carvalho Chehab 			},
582b285192aSMauro Carvalho Chehab 			{
583b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_COMPOSITE1,
584b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPOSITE8,
585082c0576SAlfredo Jesús Delaiti 				.amux   = CX25840_AUDIO7,
586b285192aSMauro Carvalho Chehab 			},
587b285192aSMauro Carvalho Chehab 			{
588b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_SVIDEO,
589b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_SVIDEO_LUMA3 |
590b285192aSMauro Carvalho Chehab 						CX25840_SVIDEO_CHROMA4,
591082c0576SAlfredo Jesús Delaiti 				.amux   = CX25840_AUDIO7,
592b285192aSMauro Carvalho Chehab 			},
593b285192aSMauro Carvalho Chehab 			{
594b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_COMPONENT,
595b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPONENT_ON |
596b285192aSMauro Carvalho Chehab 					CX25840_VIN1_CH1 |
597b285192aSMauro Carvalho Chehab 					CX25840_VIN6_CH2 |
598b285192aSMauro Carvalho Chehab 					CX25840_VIN7_CH3,
599082c0576SAlfredo Jesús Delaiti 				.amux   = CX25840_AUDIO7,
600b285192aSMauro Carvalho Chehab 			},
601b285192aSMauro Carvalho Chehab 		},
602b285192aSMauro Carvalho Chehab 	},
603b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL] = {
604b285192aSMauro Carvalho Chehab 		.name		= "TerraTec Cinergy T PCIe Dual",
605b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
606b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
607b285192aSMauro Carvalho Chehab 	},
608b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_TEVII_S471] = {
609b285192aSMauro Carvalho Chehab 		.name		= "TeVii S471",
610b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
611f667190bSMariusz Bia?o?czyk 	},
612f667190bSMariusz Bia?o?czyk 	[CX23885_BOARD_PROF_8000] = {
613f667190bSMariusz Bia?o?czyk 		.name		= "Prof Revolution DVB-S2 8000",
614f667190bSMariusz Bia?o?czyk 		.portb		= CX23885_MPEG_DVB,
6157c62f5a1SMichael Krufky 	},
6167c62f5a1SMichael Krufky 	[CX23885_BOARD_HAUPPAUGE_HVR4400] = {
617721f3223SMatthias Schwarzott 		.name		= "Hauppauge WinTV-HVR4400/HVR5500",
61836efec48SMatthias Schwarzott 		.porta		= CX23885_ANALOG_VIDEO,
6197c62f5a1SMichael Krufky 		.portb		= CX23885_MPEG_DVB,
62036efec48SMatthias Schwarzott 		.portc		= CX23885_MPEG_DVB,
62136efec48SMatthias Schwarzott 		.tuner_type	= TUNER_NXP_TDA18271,
62236efec48SMatthias Schwarzott 		.tuner_addr	= 0x60, /* 0xc0 >> 1 */
62336efec48SMatthias Schwarzott 		.tuner_bus	= 1,
6247c62f5a1SMichael Krufky 	},
625721f3223SMatthias Schwarzott 	[CX23885_BOARD_HAUPPAUGE_STARBURST] = {
626721f3223SMatthias Schwarzott 		.name		= "Hauppauge WinTV Starburst",
627721f3223SMatthias Schwarzott 		.portb		= CX23885_MPEG_DVB,
628721f3223SMatthias Schwarzott 	},
629e8d42373SOleh Kravchenko 	[CX23885_BOARD_AVERMEDIA_HC81R] = {
630e8d42373SOleh Kravchenko 		.name		= "AVerTV Hybrid Express Slim HC81R",
631e8d42373SOleh Kravchenko 		.tuner_type	= TUNER_XC2028,
632e8d42373SOleh Kravchenko 		.tuner_addr	= 0x61, /* 0xc2 >> 1 */
633e8d42373SOleh Kravchenko 		.tuner_bus	= 1,
634e8d42373SOleh Kravchenko 		.porta		= CX23885_ANALOG_VIDEO,
635e8d42373SOleh Kravchenko 		.input          = {{
636e8d42373SOleh Kravchenko 			.type   = CX23885_VMUX_TELEVISION,
637e8d42373SOleh Kravchenko 			.vmux   = CX25840_VIN2_CH1 |
638e8d42373SOleh Kravchenko 				  CX25840_VIN5_CH2 |
639e8d42373SOleh Kravchenko 				  CX25840_NONE0_CH3 |
640e8d42373SOleh Kravchenko 				  CX25840_NONE1_CH3,
641e8d42373SOleh Kravchenko 			.amux   = CX25840_AUDIO8,
642e8d42373SOleh Kravchenko 		}, {
643e8d42373SOleh Kravchenko 			.type   = CX23885_VMUX_SVIDEO,
644e8d42373SOleh Kravchenko 			.vmux   = CX25840_VIN8_CH1 |
645e8d42373SOleh Kravchenko 				  CX25840_NONE_CH2 |
646e8d42373SOleh Kravchenko 				  CX25840_VIN7_CH3 |
647e8d42373SOleh Kravchenko 				  CX25840_SVIDEO_ON,
648e8d42373SOleh Kravchenko 			.amux   = CX25840_AUDIO6,
649e8d42373SOleh Kravchenko 		}, {
650e8d42373SOleh Kravchenko 			.type   = CX23885_VMUX_COMPONENT,
651e8d42373SOleh Kravchenko 			.vmux   = CX25840_VIN1_CH1 |
652e8d42373SOleh Kravchenko 				  CX25840_NONE_CH2 |
653e8d42373SOleh Kravchenko 				  CX25840_NONE0_CH3 |
654e8d42373SOleh Kravchenko 				  CX25840_NONE1_CH3,
655e8d42373SOleh Kravchenko 			.amux   = CX25840_AUDIO6,
656e8d42373SOleh Kravchenko 		} },
657cce11b09SHans Verkuil 	},
65846b21bbaSJames Harper 	[CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2] = {
65946b21bbaSJames Harper 		.name		= "DViCO FusionHDTV DVB-T Dual Express2",
66046b21bbaSJames Harper 		.portb		= CX23885_MPEG_DVB,
66146b21bbaSJames Harper 		.portc		= CX23885_MPEG_DVB,
66246b21bbaSJames Harper 	},
663cce11b09SHans Verkuil 	[CX23885_BOARD_HAUPPAUGE_IMPACTVCBE] = {
664cce11b09SHans Verkuil 		.name		= "Hauppauge ImpactVCB-e",
665cce11b09SHans Verkuil 		.tuner_type	= TUNER_ABSENT,
666cce11b09SHans Verkuil 		.porta		= CX23885_ANALOG_VIDEO,
667cce11b09SHans Verkuil 		.input          = {{
668cce11b09SHans Verkuil 			.type   = CX23885_VMUX_COMPOSITE1,
669cce11b09SHans Verkuil 			.vmux   = CX25840_VIN7_CH3 |
670cce11b09SHans Verkuil 				  CX25840_VIN4_CH2 |
671cce11b09SHans Verkuil 				  CX25840_VIN6_CH1,
672cce11b09SHans Verkuil 			.amux   = CX25840_AUDIO7,
673cce11b09SHans Verkuil 		}, {
674cce11b09SHans Verkuil 			.type   = CX23885_VMUX_SVIDEO,
675cce11b09SHans Verkuil 			.vmux   = CX25840_VIN7_CH3 |
676cce11b09SHans Verkuil 				  CX25840_VIN4_CH2 |
677cce11b09SHans Verkuil 				  CX25840_VIN8_CH1 |
678cce11b09SHans Verkuil 				  CX25840_SVIDEO_ON,
679cce11b09SHans Verkuil 			.amux   = CX25840_AUDIO7,
680cce11b09SHans Verkuil 		} },
681cce11b09SHans Verkuil 	},
68229442266SOlli Salonen 	[CX23885_BOARD_DVBSKY_T9580] = {
68329442266SOlli Salonen 		.name		= "DVBSky T9580",
68429442266SOlli Salonen 		.portb		= CX23885_MPEG_DVB,
68529442266SOlli Salonen 		.portc		= CX23885_MPEG_DVB,
68629442266SOlli Salonen 	},
68782c10276SOlli Salonen 	[CX23885_BOARD_DVBSKY_T980C] = {
68882c10276SOlli Salonen 		.name		= "DVBSky T980C",
68982c10276SOlli Salonen 		.portb		= CX23885_MPEG_DVB,
69082c10276SOlli Salonen 	},
6910e6c7b01Snibble.max 	[CX23885_BOARD_DVBSKY_S950C] = {
6920e6c7b01Snibble.max 		.name		= "DVBSky S950C",
6930e6c7b01Snibble.max 		.portb		= CX23885_MPEG_DVB,
6940e6c7b01Snibble.max 	},
69561b103e8SOlli Salonen 	[CX23885_BOARD_TT_CT2_4500_CI] = {
69661b103e8SOlli Salonen 		.name		= "Technotrend TT-budget CT2-4500 CI",
69761b103e8SOlli Salonen 		.portb		= CX23885_MPEG_DVB,
69861b103e8SOlli Salonen 	},
699cba5480cSnibble.max 	[CX23885_BOARD_DVBSKY_S950] = {
700cba5480cSnibble.max 		.name		= "DVBSky S950",
701cba5480cSnibble.max 		.portb		= CX23885_MPEG_DVB,
702cba5480cSnibble.max 	},
703c29d6a83Snibble.max 	[CX23885_BOARD_DVBSKY_S952] = {
704c29d6a83Snibble.max 		.name		= "DVBSky S952",
705c29d6a83Snibble.max 		.portb		= CX23885_MPEG_DVB,
706c29d6a83Snibble.max 		.portc		= CX23885_MPEG_DVB,
707c29d6a83Snibble.max 	},
708c02ef64aSNibble Max 	[CX23885_BOARD_DVBSKY_T982] = {
709c02ef64aSNibble Max 		.name		= "DVBSky T982",
710c02ef64aSNibble Max 		.portb		= CX23885_MPEG_DVB,
711c02ef64aSNibble Max 		.portc		= CX23885_MPEG_DVB,
712c02ef64aSNibble Max 	},
7131fc77d01SAntti Palosaari 	[CX23885_BOARD_HAUPPAUGE_HVR5525] = {
7141fc77d01SAntti Palosaari 		.name		= "Hauppauge WinTV-HVR5525",
7151fc77d01SAntti Palosaari 		.portb		= CX23885_MPEG_DVB,
7161fc77d01SAntti Palosaari 		.portc		= CX23885_MPEG_DVB,
7171fc77d01SAntti Palosaari 	},
7186c43a217SHans Verkuil 	[CX23885_BOARD_VIEWCAST_260E] = {
7196c43a217SHans Verkuil 		.name		= "ViewCast 260e",
7206c43a217SHans Verkuil 		.porta		= CX23885_ANALOG_VIDEO,
7216c43a217SHans Verkuil 		.force_bff	= 1,
7226c43a217SHans Verkuil 		.input          = {{
7236c43a217SHans Verkuil 			.type   = CX23885_VMUX_COMPOSITE1,
7246c43a217SHans Verkuil 			.vmux   = CX25840_VIN6_CH1,
7256c43a217SHans Verkuil 			.amux   = CX25840_AUDIO7,
7266c43a217SHans Verkuil 		}, {
7276c43a217SHans Verkuil 			.type   = CX23885_VMUX_SVIDEO,
7286c43a217SHans Verkuil 			.vmux   = CX25840_VIN7_CH3 |
7296c43a217SHans Verkuil 					CX25840_VIN5_CH1 |
7306c43a217SHans Verkuil 					CX25840_SVIDEO_ON,
7316c43a217SHans Verkuil 			.amux   = CX25840_AUDIO7,
7326c43a217SHans Verkuil 		}, {
7336c43a217SHans Verkuil 			.type   = CX23885_VMUX_COMPONENT,
7346c43a217SHans Verkuil 			.vmux   = CX25840_VIN7_CH3 |
7356c43a217SHans Verkuil 					CX25840_VIN6_CH2 |
7366c43a217SHans Verkuil 					CX25840_VIN5_CH1 |
7376c43a217SHans Verkuil 					CX25840_COMPONENT_ON,
7386c43a217SHans Verkuil 			.amux   = CX25840_AUDIO7,
7396c43a217SHans Verkuil 		} },
7406c43a217SHans Verkuil 	},
7416c43a217SHans Verkuil 	[CX23885_BOARD_VIEWCAST_460E] = {
7426c43a217SHans Verkuil 		.name		= "ViewCast 460e",
7436c43a217SHans Verkuil 		.porta		= CX23885_ANALOG_VIDEO,
7446c43a217SHans Verkuil 		.force_bff	= 1,
7456c43a217SHans Verkuil 		.input          = {{
7466c43a217SHans Verkuil 			.type   = CX23885_VMUX_COMPOSITE1,
7476c43a217SHans Verkuil 			.vmux   = CX25840_VIN4_CH1,
7486c43a217SHans Verkuil 			.amux   = CX25840_AUDIO7,
7496c43a217SHans Verkuil 		}, {
7506c43a217SHans Verkuil 			.type   = CX23885_VMUX_SVIDEO,
7516c43a217SHans Verkuil 			.vmux   = CX25840_VIN7_CH3 |
7526c43a217SHans Verkuil 					CX25840_VIN6_CH1 |
7536c43a217SHans Verkuil 					CX25840_SVIDEO_ON,
7546c43a217SHans Verkuil 			.amux   = CX25840_AUDIO7,
7556c43a217SHans Verkuil 		}, {
7566c43a217SHans Verkuil 			.type   = CX23885_VMUX_COMPONENT,
7576c43a217SHans Verkuil 			.vmux   = CX25840_VIN7_CH3 |
7586c43a217SHans Verkuil 					CX25840_VIN6_CH1 |
7596c43a217SHans Verkuil 					CX25840_VIN5_CH2 |
7606c43a217SHans Verkuil 					CX25840_COMPONENT_ON,
7616c43a217SHans Verkuil 			.amux   = CX25840_AUDIO7,
7626c43a217SHans Verkuil 		}, {
7636c43a217SHans Verkuil 			.type   = CX23885_VMUX_COMPOSITE2,
7646c43a217SHans Verkuil 			.vmux   = CX25840_VIN6_CH1,
7656c43a217SHans Verkuil 			.amux   = CX25840_AUDIO7,
7666c43a217SHans Verkuil 		} },
7676c43a217SHans Verkuil 	},
76810a5210eSStephen Backway 	[CX23885_BOARD_HAUPPAUGE_QUADHD_DVB] = {
76910a5210eSStephen Backway 		.name        = "Hauppauge WinTV-QuadHD-DVB",
77010a5210eSStephen Backway 		.portb        = CX23885_MPEG_DVB,
77110a5210eSStephen Backway 		.portc        = CX23885_MPEG_DVB,
77210a5210eSStephen Backway 	},
773dd9ad4fbSStephen Backway 	[CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC] = {
774dd9ad4fbSStephen Backway 		.name        = "Hauppauge WinTV-QuadHD-ATSC",
775dd9ad4fbSStephen Backway 		.portb        = CX23885_MPEG_DVB,
776dd9ad4fbSStephen Backway 		.portc        = CX23885_MPEG_DVB,
777dd9ad4fbSStephen Backway 	},
778b285192aSMauro Carvalho Chehab };
779b285192aSMauro Carvalho Chehab const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
780b285192aSMauro Carvalho Chehab 
781b285192aSMauro Carvalho Chehab /* ------------------------------------------------------------------ */
782b285192aSMauro Carvalho Chehab /* PCI subsystem IDs                                                  */
783b285192aSMauro Carvalho Chehab 
784b285192aSMauro Carvalho Chehab struct cx23885_subid cx23885_subids[] = {
785b285192aSMauro Carvalho Chehab 	{
786b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
787b285192aSMauro Carvalho Chehab 		.subdevice = 0x3400,
788b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_UNKNOWN,
789b285192aSMauro Carvalho Chehab 	}, {
790b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
791b285192aSMauro Carvalho Chehab 		.subdevice = 0x7600,
792b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
793b285192aSMauro Carvalho Chehab 	}, {
794b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
795b285192aSMauro Carvalho Chehab 		.subdevice = 0x7800,
796b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1800,
797b285192aSMauro Carvalho Chehab 	}, {
798b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
799b285192aSMauro Carvalho Chehab 		.subdevice = 0x7801,
800b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1800,
801b285192aSMauro Carvalho Chehab 	}, {
802b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
803b285192aSMauro Carvalho Chehab 		.subdevice = 0x7809,
804b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1800,
805b285192aSMauro Carvalho Chehab 	}, {
806b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
807b285192aSMauro Carvalho Chehab 		.subdevice = 0x7911,
808b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1250,
809b285192aSMauro Carvalho Chehab 	}, {
810b285192aSMauro Carvalho Chehab 		.subvendor = 0x18ac,
811b285192aSMauro Carvalho Chehab 		.subdevice = 0xd500,
812b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
813b285192aSMauro Carvalho Chehab 	}, {
814b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
815b285192aSMauro Carvalho Chehab 		.subdevice = 0x7790,
816b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
817b285192aSMauro Carvalho Chehab 	}, {
818b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
819b285192aSMauro Carvalho Chehab 		.subdevice = 0x7797,
820b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
821b285192aSMauro Carvalho Chehab 	}, {
822b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
823b285192aSMauro Carvalho Chehab 		.subdevice = 0x7710,
824b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1500,
825b285192aSMauro Carvalho Chehab 	}, {
826b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
827b285192aSMauro Carvalho Chehab 		.subdevice = 0x7717,
828b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1500,
829b285192aSMauro Carvalho Chehab 	}, {
830b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
831b285192aSMauro Carvalho Chehab 		.subdevice = 0x71d1,
832b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1200,
833b285192aSMauro Carvalho Chehab 	}, {
834b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
835b285192aSMauro Carvalho Chehab 		.subdevice = 0x71d3,
836b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1200,
837b285192aSMauro Carvalho Chehab 	}, {
838b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
839b285192aSMauro Carvalho Chehab 		.subdevice = 0x8101,
840b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1700,
841b285192aSMauro Carvalho Chehab 	}, {
842b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
843b285192aSMauro Carvalho Chehab 		.subdevice = 0x8010,
844b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1400,
845b285192aSMauro Carvalho Chehab 	}, {
846b285192aSMauro Carvalho Chehab 		.subvendor = 0x18ac,
847b285192aSMauro Carvalho Chehab 		.subdevice = 0xd618,
848b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
849b285192aSMauro Carvalho Chehab 	}, {
850b285192aSMauro Carvalho Chehab 		.subvendor = 0x18ac,
851b285192aSMauro Carvalho Chehab 		.subdevice = 0xdb78,
852b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
853b285192aSMauro Carvalho Chehab 	}, {
854b285192aSMauro Carvalho Chehab 		.subvendor = 0x107d,
855b285192aSMauro Carvalho Chehab 		.subdevice = 0x6681,
856b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
857b285192aSMauro Carvalho Chehab 	}, {
858b285192aSMauro Carvalho Chehab 		.subvendor = 0x107d,
859642ca1a0SAnca Emanuel 		.subdevice = 0x6f21,
860642ca1a0SAnca Emanuel 		.card      = CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200,
861642ca1a0SAnca Emanuel 	}, {
862642ca1a0SAnca Emanuel 		.subvendor = 0x107d,
863b285192aSMauro Carvalho Chehab 		.subdevice = 0x6f39,
864b285192aSMauro Carvalho Chehab 		.card	   = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000,
865b285192aSMauro Carvalho Chehab 	}, {
866b285192aSMauro Carvalho Chehab 		.subvendor = 0x185b,
867b285192aSMauro Carvalho Chehab 		.subdevice = 0xe800,
868b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_COMPRO_VIDEOMATE_E650F,
869b285192aSMauro Carvalho Chehab 	}, {
870b285192aSMauro Carvalho Chehab 		.subvendor = 0x6920,
871b285192aSMauro Carvalho Chehab 		.subdevice = 0x8888,
872b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_TBS_6920,
873b285192aSMauro Carvalho Chehab 	}, {
874e6001482SLuis Alves 		.subvendor = 0x6980,
875e6001482SLuis Alves 		.subdevice = 0x8888,
876e6001482SLuis Alves 		.card      = CX23885_BOARD_TBS_6980,
877e6001482SLuis Alves 	}, {
878e6001482SLuis Alves 		.subvendor = 0x6981,
879e6001482SLuis Alves 		.subdevice = 0x8888,
880e6001482SLuis Alves 		.card      = CX23885_BOARD_TBS_6981,
881e6001482SLuis Alves 	}, {
882b285192aSMauro Carvalho Chehab 		.subvendor = 0xd470,
883b285192aSMauro Carvalho Chehab 		.subdevice = 0x9022,
884b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_TEVII_S470,
885b285192aSMauro Carvalho Chehab 	}, {
886b285192aSMauro Carvalho Chehab 		.subvendor = 0x0001,
887b285192aSMauro Carvalho Chehab 		.subdevice = 0x2005,
888b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_DVBWORLD_2005,
889b285192aSMauro Carvalho Chehab 	}, {
890b285192aSMauro Carvalho Chehab 		.subvendor = 0x1b55,
891b285192aSMauro Carvalho Chehab 		.subdevice = 0x2a2c,
892b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_NETUP_DUAL_DVBS2_CI,
893b285192aSMauro Carvalho Chehab 	}, {
894b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
895b285192aSMauro Carvalho Chehab 		.subdevice = 0x2211,
896b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1270,
897b285192aSMauro Carvalho Chehab 	}, {
898b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
899b285192aSMauro Carvalho Chehab 		.subdevice = 0x2215,
900b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1275,
901b285192aSMauro Carvalho Chehab 	}, {
902b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
903b285192aSMauro Carvalho Chehab 		.subdevice = 0x221d,
904b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1275,
905b285192aSMauro Carvalho Chehab 	}, {
906b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
907b285192aSMauro Carvalho Chehab 		.subdevice = 0x2251,
908b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1255,
909b285192aSMauro Carvalho Chehab 	}, {
910b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
911b285192aSMauro Carvalho Chehab 		.subdevice = 0x2259,
912b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1255_22111,
913b285192aSMauro Carvalho Chehab 	}, {
914b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
915b285192aSMauro Carvalho Chehab 		.subdevice = 0x2291,
916b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210,
917b285192aSMauro Carvalho Chehab 	}, {
918b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
919b285192aSMauro Carvalho Chehab 		.subdevice = 0x2295,
920b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210,
921b285192aSMauro Carvalho Chehab 	}, {
922b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
923b285192aSMauro Carvalho Chehab 		.subdevice = 0x2299,
924b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210,
925b285192aSMauro Carvalho Chehab 	}, {
926b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
927b285192aSMauro Carvalho Chehab 		.subdevice = 0x229d,
928b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
929b285192aSMauro Carvalho Chehab 	}, {
930b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
931b285192aSMauro Carvalho Chehab 		.subdevice = 0x22f0,
932b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210,
933b285192aSMauro Carvalho Chehab 	}, {
934b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
935b285192aSMauro Carvalho Chehab 		.subdevice = 0x22f1,
936b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1255,
937b285192aSMauro Carvalho Chehab 	}, {
938b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
939b285192aSMauro Carvalho Chehab 		.subdevice = 0x22f2,
940b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1275,
941b285192aSMauro Carvalho Chehab 	}, {
942b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
943b285192aSMauro Carvalho Chehab 		.subdevice = 0x22f3,
944b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
945b285192aSMauro Carvalho Chehab 	}, {
946b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
947b285192aSMauro Carvalho Chehab 		.subdevice = 0x22f4,
948b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210,
949b285192aSMauro Carvalho Chehab 	}, {
950b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
951b285192aSMauro Carvalho Chehab 		.subdevice = 0x22f5,
952b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
953b285192aSMauro Carvalho Chehab 	}, {
954b285192aSMauro Carvalho Chehab 		.subvendor = 0x14f1,
955b285192aSMauro Carvalho Chehab 		.subdevice = 0x8651,
956b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_MYGICA_X8506,
957b285192aSMauro Carvalho Chehab 	}, {
958b285192aSMauro Carvalho Chehab 		.subvendor = 0x14f1,
959b285192aSMauro Carvalho Chehab 		.subdevice = 0x8657,
960b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_MAGICPRO_PROHDTVE2,
961b285192aSMauro Carvalho Chehab 	}, {
962b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
963b285192aSMauro Carvalho Chehab 		.subdevice = 0x8541,
964b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1850,
965b285192aSMauro Carvalho Chehab 	}, {
966b285192aSMauro Carvalho Chehab 		.subvendor = 0x1858,
967b285192aSMauro Carvalho Chehab 		.subdevice = 0xe800,
968b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_COMPRO_VIDEOMATE_E800,
969b285192aSMauro Carvalho Chehab 	}, {
970b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
971b285192aSMauro Carvalho Chehab 		.subdevice = 0x8551,
972b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1290,
973b285192aSMauro Carvalho Chehab 	}, {
974b285192aSMauro Carvalho Chehab 		.subvendor = 0x14f1,
975b285192aSMauro Carvalho Chehab 		.subdevice = 0x8578,
976b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_MYGICA_X8558PRO,
977b285192aSMauro Carvalho Chehab 	}, {
978b285192aSMauro Carvalho Chehab 		.subvendor = 0x107d,
979b285192aSMauro Carvalho Chehab 		.subdevice = 0x6f22,
980b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_LEADTEK_WINFAST_PXTV1200,
981b285192aSMauro Carvalho Chehab 	}, {
982b285192aSMauro Carvalho Chehab 		.subvendor = 0x5654,
983b285192aSMauro Carvalho Chehab 		.subdevice = 0x2390,
984b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_GOTVIEW_X5_3D_HYBRID,
985b285192aSMauro Carvalho Chehab 	}, {
986b285192aSMauro Carvalho Chehab 		.subvendor = 0x1b55,
987b285192aSMauro Carvalho Chehab 		.subdevice = 0xe2e4,
988b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF,
989b285192aSMauro Carvalho Chehab 	}, {
990b285192aSMauro Carvalho Chehab 		.subvendor = 0x14f1,
991b285192aSMauro Carvalho Chehab 		.subdevice = 0x8502,
992b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_MYGICA_X8507,
993b285192aSMauro Carvalho Chehab 	}, {
994b285192aSMauro Carvalho Chehab 		.subvendor = 0x153b,
995b285192aSMauro Carvalho Chehab 		.subdevice = 0x117e,
996b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL,
997b285192aSMauro Carvalho Chehab 	}, {
998b285192aSMauro Carvalho Chehab 		.subvendor = 0xd471,
999b285192aSMauro Carvalho Chehab 		.subdevice = 0x9022,
1000b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_TEVII_S471,
1001f667190bSMariusz Bia?o?czyk 	}, {
1002f667190bSMariusz Bia?o?czyk 		.subvendor = 0x8000,
1003f667190bSMariusz Bia?o?czyk 		.subdevice = 0x3034,
1004f667190bSMariusz Bia?o?czyk 		.card      = CX23885_BOARD_PROF_8000,
10057c62f5a1SMichael Krufky 	}, {
10067c62f5a1SMichael Krufky 		.subvendor = 0x0070,
10077c62f5a1SMichael Krufky 		.subdevice = 0xc108,
1008721f3223SMatthias Schwarzott 		.card      = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-4400 (Model 121xxx, Hybrid DVB-T/S2, IR) */
10097c62f5a1SMichael Krufky 	}, {
10107c62f5a1SMichael Krufky 		.subvendor = 0x0070,
10117c62f5a1SMichael Krufky 		.subdevice = 0xc138,
1012721f3223SMatthias Schwarzott 		.card      = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-5500 (Model 121xxx, Hybrid DVB-T/C/S2, IR) */
10137c62f5a1SMichael Krufky 	}, {
10147c62f5a1SMichael Krufky 		.subvendor = 0x0070,
10157c62f5a1SMichael Krufky 		.subdevice = 0xc12a,
1016721f3223SMatthias Schwarzott 		.card      = CX23885_BOARD_HAUPPAUGE_STARBURST, /* Hauppauge WinTV Starburst (Model 121x00, DVB-S2, IR) */
10177c62f5a1SMichael Krufky 	}, {
10187c62f5a1SMichael Krufky 		.subvendor = 0x0070,
10197c62f5a1SMichael Krufky 		.subdevice = 0xc1f8,
1020721f3223SMatthias Schwarzott 		.card      = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-5500 (Model 121xxx, Hybrid DVB-T/C/S2, IR) */
1021e8d42373SOleh Kravchenko 	}, {
1022e8d42373SOleh Kravchenko 		.subvendor = 0x1461,
1023e8d42373SOleh Kravchenko 		.subdevice = 0xd939,
1024e8d42373SOleh Kravchenko 		.card      = CX23885_BOARD_AVERMEDIA_HC81R,
1025cce11b09SHans Verkuil 	}, {
1026cce11b09SHans Verkuil 		.subvendor = 0x0070,
1027cce11b09SHans Verkuil 		.subdevice = 0x7133,
1028cce11b09SHans Verkuil 		.card      = CX23885_BOARD_HAUPPAUGE_IMPACTVCBE,
102946b21bbaSJames Harper 	}, {
103046b21bbaSJames Harper 		.subvendor = 0x18ac,
103146b21bbaSJames Harper 		.subdevice = 0xdb98,
103246b21bbaSJames Harper 		.card      = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2,
103329442266SOlli Salonen 	}, {
103429442266SOlli Salonen 		.subvendor = 0x4254,
103529442266SOlli Salonen 		.subdevice = 0x9580,
103629442266SOlli Salonen 		.card      = CX23885_BOARD_DVBSKY_T9580,
103782c10276SOlli Salonen 	}, {
103882c10276SOlli Salonen 		.subvendor = 0x4254,
103982c10276SOlli Salonen 		.subdevice = 0x980c,
104082c10276SOlli Salonen 		.card      = CX23885_BOARD_DVBSKY_T980C,
10410e6c7b01Snibble.max 	}, {
10420e6c7b01Snibble.max 		.subvendor = 0x4254,
10430e6c7b01Snibble.max 		.subdevice = 0x950c,
10440e6c7b01Snibble.max 		.card      = CX23885_BOARD_DVBSKY_S950C,
104561b103e8SOlli Salonen 	}, {
104661b103e8SOlli Salonen 		.subvendor = 0x13c2,
104761b103e8SOlli Salonen 		.subdevice = 0x3013,
104861b103e8SOlli Salonen 		.card      = CX23885_BOARD_TT_CT2_4500_CI,
1049cba5480cSnibble.max 	}, {
1050cba5480cSnibble.max 		.subvendor = 0x4254,
1051cba5480cSnibble.max 		.subdevice = 0x0950,
1052cba5480cSnibble.max 		.card      = CX23885_BOARD_DVBSKY_S950,
1053c29d6a83Snibble.max 	}, {
1054c29d6a83Snibble.max 		.subvendor = 0x4254,
1055c29d6a83Snibble.max 		.subdevice = 0x0952,
1056c29d6a83Snibble.max 		.card      = CX23885_BOARD_DVBSKY_S952,
1057c02ef64aSNibble Max 	}, {
1058c02ef64aSNibble Max 		.subvendor = 0x4254,
1059c02ef64aSNibble Max 		.subdevice = 0x0982,
1060c02ef64aSNibble Max 		.card      = CX23885_BOARD_DVBSKY_T982,
10611fc77d01SAntti Palosaari 	}, {
10621fc77d01SAntti Palosaari 		.subvendor = 0x0070,
10631fc77d01SAntti Palosaari 		.subdevice = 0xf038,
10641fc77d01SAntti Palosaari 		.card      = CX23885_BOARD_HAUPPAUGE_HVR5525,
10656c43a217SHans Verkuil 	}, {
10666c43a217SHans Verkuil 		.subvendor = 0x1576,
10676c43a217SHans Verkuil 		.subdevice = 0x0260,
10686c43a217SHans Verkuil 		.card      = CX23885_BOARD_VIEWCAST_260E,
10696c43a217SHans Verkuil 	}, {
10706c43a217SHans Verkuil 		.subvendor = 0x1576,
10716c43a217SHans Verkuil 		.subdevice = 0x0460,
10726c43a217SHans Verkuil 		.card      = CX23885_BOARD_VIEWCAST_460E,
107310a5210eSStephen Backway 	}, {
107410a5210eSStephen Backway 		.subvendor = 0x0070,
107510a5210eSStephen Backway 		.subdevice = 0x6a28,
107610a5210eSStephen Backway 		.card      = CX23885_BOARD_HAUPPAUGE_QUADHD_DVB, /* Tuner Pair 1 */
107710a5210eSStephen Backway 	}, {
107810a5210eSStephen Backway 		.subvendor = 0x0070,
107910a5210eSStephen Backway 		.subdevice = 0x6b28,
108010a5210eSStephen Backway 		.card      = CX23885_BOARD_HAUPPAUGE_QUADHD_DVB, /* Tuner Pair 2 */
1081dd9ad4fbSStephen Backway 	}, {
1082dd9ad4fbSStephen Backway 		.subvendor = 0x0070,
1083dd9ad4fbSStephen Backway 		.subdevice = 0x6a18,
1084dd9ad4fbSStephen Backway 		.card      = CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC, /* Tuner Pair 1 */
1085dd9ad4fbSStephen Backway 	}, {
1086dd9ad4fbSStephen Backway 		.subvendor = 0x0070,
1087dd9ad4fbSStephen Backway 		.subdevice = 0x6b18,
1088dd9ad4fbSStephen Backway 		.card      = CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC, /* Tuner Pair 2 */
1089b285192aSMauro Carvalho Chehab 	},
1090b285192aSMauro Carvalho Chehab };
1091b285192aSMauro Carvalho Chehab const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
1092b285192aSMauro Carvalho Chehab 
1093b285192aSMauro Carvalho Chehab void cx23885_card_list(struct cx23885_dev *dev)
1094b285192aSMauro Carvalho Chehab {
1095b285192aSMauro Carvalho Chehab 	int i;
1096b285192aSMauro Carvalho Chehab 
1097b285192aSMauro Carvalho Chehab 	if (0 == dev->pci->subsystem_vendor &&
1098b285192aSMauro Carvalho Chehab 	    0 == dev->pci->subsystem_device) {
1099b285192aSMauro Carvalho Chehab 		printk(KERN_INFO
1100b285192aSMauro Carvalho Chehab 			"%s: Board has no valid PCIe Subsystem ID and can't\n"
1101b285192aSMauro Carvalho Chehab 		       "%s: be autodetected. Pass card=<n> insmod option\n"
1102b285192aSMauro Carvalho Chehab 		       "%s: to workaround that. Redirect complaints to the\n"
1103b285192aSMauro Carvalho Chehab 		       "%s: vendor of the TV card.  Best regards,\n"
1104b285192aSMauro Carvalho Chehab 		       "%s:         -- tux\n",
1105b285192aSMauro Carvalho Chehab 		       dev->name, dev->name, dev->name, dev->name, dev->name);
1106b285192aSMauro Carvalho Chehab 	} else {
1107b285192aSMauro Carvalho Chehab 		printk(KERN_INFO
1108b285192aSMauro Carvalho Chehab 			"%s: Your board isn't known (yet) to the driver.\n"
1109b285192aSMauro Carvalho Chehab 		       "%s: Try to pick one of the existing card configs via\n"
1110b285192aSMauro Carvalho Chehab 		       "%s: card=<n> insmod option.  Updating to the latest\n"
1111b285192aSMauro Carvalho Chehab 		       "%s: version might help as well.\n",
1112b285192aSMauro Carvalho Chehab 		       dev->name, dev->name, dev->name, dev->name);
1113b285192aSMauro Carvalho Chehab 	}
1114b285192aSMauro Carvalho Chehab 	printk(KERN_INFO "%s: Here is a list of valid choices for the card=<n> insmod option:\n",
1115b285192aSMauro Carvalho Chehab 	       dev->name);
1116b285192aSMauro Carvalho Chehab 	for (i = 0; i < cx23885_bcount; i++)
1117b285192aSMauro Carvalho Chehab 		printk(KERN_INFO "%s:    card=%d -> %s\n",
1118b285192aSMauro Carvalho Chehab 		       dev->name, i, cx23885_boards[i].name);
1119b285192aSMauro Carvalho Chehab }
1120b285192aSMauro Carvalho Chehab 
11216c43a217SHans Verkuil static void viewcast_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
11226c43a217SHans Verkuil {
11236c43a217SHans Verkuil 	u32 sn;
11246c43a217SHans Verkuil 
11256c43a217SHans Verkuil 	/* The serial number record begins with tag 0x59 */
11266c43a217SHans Verkuil 	if (*(eeprom_data + 0x00) != 0x59) {
11276c43a217SHans Verkuil 		pr_info("%s() eeprom records are undefined, no serial number\n",
11286c43a217SHans Verkuil 			__func__);
11296c43a217SHans Verkuil 		return;
11306c43a217SHans Verkuil 	}
11316c43a217SHans Verkuil 
11326c43a217SHans Verkuil 	sn =	(*(eeprom_data + 0x06) << 24) |
11336c43a217SHans Verkuil 		(*(eeprom_data + 0x05) << 16) |
11346c43a217SHans Verkuil 		(*(eeprom_data + 0x04) << 8) |
11356c43a217SHans Verkuil 		(*(eeprom_data + 0x03));
11366c43a217SHans Verkuil 
11376c43a217SHans Verkuil 	pr_info("%s: card '%s' sn# MM%d\n",
11386c43a217SHans Verkuil 		dev->name,
11396c43a217SHans Verkuil 		cx23885_boards[dev->board].name,
11406c43a217SHans Verkuil 		sn);
11416c43a217SHans Verkuil }
11426c43a217SHans Verkuil 
1143b285192aSMauro Carvalho Chehab static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
1144b285192aSMauro Carvalho Chehab {
1145b285192aSMauro Carvalho Chehab 	struct tveeprom tv;
1146b285192aSMauro Carvalho Chehab 
1147b285192aSMauro Carvalho Chehab 	tveeprom_hauppauge_analog(&dev->i2c_bus[0].i2c_client, &tv,
1148b285192aSMauro Carvalho Chehab 		eeprom_data);
1149b285192aSMauro Carvalho Chehab 
1150b285192aSMauro Carvalho Chehab 	/* Make sure we support the board model */
1151b285192aSMauro Carvalho Chehab 	switch (tv.model) {
1152b285192aSMauro Carvalho Chehab 	case 22001:
1153b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1270 (PCIe, Retail, half height)
1154b285192aSMauro Carvalho Chehab 		 * ATSC/QAM and basic analog, IR Blast */
1155b285192aSMauro Carvalho Chehab 	case 22009:
1156b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1210 (PCIe, Retail, half height)
1157b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog, IR Blast */
1158b285192aSMauro Carvalho Chehab 	case 22011:
1159b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1270 (PCIe, Retail, half height)
1160b285192aSMauro Carvalho Chehab 		 * ATSC/QAM and basic analog, IR Recv */
1161b285192aSMauro Carvalho Chehab 	case 22019:
1162b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1210 (PCIe, Retail, half height)
1163b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog, IR Recv */
1164b285192aSMauro Carvalho Chehab 	case 22021:
1165b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1275 (PCIe, Retail, half height)
1166b285192aSMauro Carvalho Chehab 		 * ATSC/QAM and basic analog, IR Recv */
1167b285192aSMauro Carvalho Chehab 	case 22029:
1168b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1210 (PCIe, Retail, half height)
1169b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog, IR Recv */
1170b285192aSMauro Carvalho Chehab 	case 22101:
1171b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1270 (PCIe, Retail, full height)
1172b285192aSMauro Carvalho Chehab 		 * ATSC/QAM and basic analog, IR Blast */
1173b285192aSMauro Carvalho Chehab 	case 22109:
1174b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1210 (PCIe, Retail, full height)
1175b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog, IR Blast */
1176b285192aSMauro Carvalho Chehab 	case 22111:
1177b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1270 (PCIe, Retail, full height)
1178b285192aSMauro Carvalho Chehab 		 * ATSC/QAM and basic analog, IR Recv */
1179b285192aSMauro Carvalho Chehab 	case 22119:
1180b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1210 (PCIe, Retail, full height)
1181b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog, IR Recv */
1182b285192aSMauro Carvalho Chehab 	case 22121:
1183b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1275 (PCIe, Retail, full height)
1184b285192aSMauro Carvalho Chehab 		 * ATSC/QAM and basic analog, IR Recv */
1185b285192aSMauro Carvalho Chehab 	case 22129:
1186b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1210 (PCIe, Retail, full height)
1187b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog, IR Recv */
1188b285192aSMauro Carvalho Chehab 	case 71009:
1189b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, Retail, full height)
1190b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
1191cce11b09SHans Verkuil 	case 71100:
1192cce11b09SHans Verkuil 		/* WinTV-ImpactVCB-e (PCIe, Retail, half height)
1193cce11b09SHans Verkuil 		 * Basic analog */
1194b285192aSMauro Carvalho Chehab 	case 71359:
1195b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, OEM, half height)
1196b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
1197b285192aSMauro Carvalho Chehab 	case 71439:
1198b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, OEM, half height)
1199b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
1200b285192aSMauro Carvalho Chehab 	case 71449:
1201b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, OEM, full height)
1202b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
1203b285192aSMauro Carvalho Chehab 	case 71939:
1204b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, OEM, half height)
1205b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
1206b285192aSMauro Carvalho Chehab 	case 71949:
1207b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, OEM, full height)
1208b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
1209b285192aSMauro Carvalho Chehab 	case 71959:
1210b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, OEM, full height)
1211b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
1212b285192aSMauro Carvalho Chehab 	case 71979:
1213b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, OEM, half height)
1214b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
1215b285192aSMauro Carvalho Chehab 	case 71999:
1216b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, OEM, full height)
1217b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
1218b285192aSMauro Carvalho Chehab 	case 76601:
1219b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
1220b285192aSMauro Carvalho Chehab 			channel ATSC and MPEG2 HW Encoder */
1221b285192aSMauro Carvalho Chehab 	case 77001:
1222b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
1223b285192aSMauro Carvalho Chehab 			and Basic analog */
1224b285192aSMauro Carvalho Chehab 	case 77011:
1225b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
1226b285192aSMauro Carvalho Chehab 			and Basic analog */
1227b285192aSMauro Carvalho Chehab 	case 77041:
1228b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
1229b285192aSMauro Carvalho Chehab 			and Basic analog */
1230b285192aSMauro Carvalho Chehab 	case 77051:
1231b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
1232b285192aSMauro Carvalho Chehab 			and Basic analog */
1233b285192aSMauro Carvalho Chehab 	case 78011:
1234b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
1235b285192aSMauro Carvalho Chehab 			Dual channel ATSC and MPEG2 HW Encoder */
1236b285192aSMauro Carvalho Chehab 	case 78501:
1237b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
1238b285192aSMauro Carvalho Chehab 			Dual channel ATSC and MPEG2 HW Encoder */
1239b285192aSMauro Carvalho Chehab 	case 78521:
1240b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
1241b285192aSMauro Carvalho Chehab 			Dual channel ATSC and MPEG2 HW Encoder */
1242b285192aSMauro Carvalho Chehab 	case 78531:
1243b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
1244b285192aSMauro Carvalho Chehab 			Dual channel ATSC and MPEG2 HW Encoder */
1245b285192aSMauro Carvalho Chehab 	case 78631:
1246b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
1247b285192aSMauro Carvalho Chehab 			Dual channel ATSC and MPEG2 HW Encoder */
1248b285192aSMauro Carvalho Chehab 	case 79001:
1249b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1250 (PCIe, Retail, IR, full height,
1250b285192aSMauro Carvalho Chehab 			ATSC and Basic analog */
1251b285192aSMauro Carvalho Chehab 	case 79101:
1252b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1250 (PCIe, Retail, IR, half height,
1253b285192aSMauro Carvalho Chehab 			ATSC and Basic analog */
1254b285192aSMauro Carvalho Chehab 	case 79501:
1255b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1250 (PCIe, No IR, half height,
1256b285192aSMauro Carvalho Chehab 			ATSC [at least] and Basic analog) */
1257b285192aSMauro Carvalho Chehab 	case 79561:
1258b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
1259b285192aSMauro Carvalho Chehab 			ATSC and Basic analog */
1260b285192aSMauro Carvalho Chehab 	case 79571:
1261b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
1262b285192aSMauro Carvalho Chehab 		 ATSC and Basic analog */
1263b285192aSMauro Carvalho Chehab 	case 79671:
1264b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
1265b285192aSMauro Carvalho Chehab 			ATSC and Basic analog */
1266b285192aSMauro Carvalho Chehab 	case 80019:
1267b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1400 (Express Card, Retail, IR,
1268b285192aSMauro Carvalho Chehab 		 * DVB-T and Basic analog */
1269b285192aSMauro Carvalho Chehab 	case 81509:
1270b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
1271b285192aSMauro Carvalho Chehab 		 * DVB-T and MPEG2 HW Encoder */
1272b285192aSMauro Carvalho Chehab 	case 81519:
1273b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
1274b285192aSMauro Carvalho Chehab 		 * DVB-T and MPEG2 HW Encoder */
1275b285192aSMauro Carvalho Chehab 		break;
1276b285192aSMauro Carvalho Chehab 	case 85021:
1277b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1850 (PCIe, Retail, 3.5mm in, IR, FM,
1278b285192aSMauro Carvalho Chehab 			Dual channel ATSC and MPEG2 HW Encoder */
1279b285192aSMauro Carvalho Chehab 		break;
1280b285192aSMauro Carvalho Chehab 	case 85721:
1281b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1290 (PCIe, OEM, RCA in, IR,
1282b285192aSMauro Carvalho Chehab 			Dual channel ATSC and Basic analog */
12831fc77d01SAntti Palosaari 	case 150329:
12841fc77d01SAntti Palosaari 		/* WinTV-HVR5525 (PCIe, DVB-S/S2, DVB-T/T2/C) */
1285b285192aSMauro Carvalho Chehab 		break;
128610a5210eSStephen Backway 	case 166100:
128710a5210eSStephen Backway 		/* WinTV-QuadHD (DVB) Tuner Pair 1 (PCIe, IR, half height,
128810a5210eSStephen Backway 		   DVB-T/T2/C, DVB-T/T2/C */
128910a5210eSStephen Backway 		break;
129010a5210eSStephen Backway 	case 166101:
129110a5210eSStephen Backway 		/* WinTV-QuadHD (DVB) Tuner Pair 2 (PCIe, IR, half height,
129210a5210eSStephen Backway 		   DVB-T/T2/C, DVB-T/T2/C */
129310a5210eSStephen Backway 		break;
1294dd9ad4fbSStephen Backway 	case 165100:
1295dd9ad4fbSStephen Backway 		/*
1296dd9ad4fbSStephen Backway 		 * WinTV-QuadHD (ATSC) Tuner Pair 1 (PCIe, IR, half height,
1297dd9ad4fbSStephen Backway 		 * ATSC, ATSC
1298dd9ad4fbSStephen Backway 		 */
1299dd9ad4fbSStephen Backway 		break;
1300dd9ad4fbSStephen Backway 	case 165101:
1301dd9ad4fbSStephen Backway 		/*
1302dd9ad4fbSStephen Backway 		 * WinTV-QuadHD (DVB) Tuner Pair 2 (PCIe, IR, half height,
1303dd9ad4fbSStephen Backway 		 * ATSC, ATSC
1304dd9ad4fbSStephen Backway 		 */
1305dd9ad4fbSStephen Backway 		break;
1306b285192aSMauro Carvalho Chehab 	default:
130707ab29e1SMauro Carvalho Chehab 		printk(KERN_WARNING "%s: warning: unknown hauppauge model #%d\n",
1308b285192aSMauro Carvalho Chehab 			dev->name, tv.model);
1309b285192aSMauro Carvalho Chehab 		break;
1310b285192aSMauro Carvalho Chehab 	}
1311b285192aSMauro Carvalho Chehab 
1312b285192aSMauro Carvalho Chehab 	printk(KERN_INFO "%s: hauppauge eeprom: model=%d\n",
1313b285192aSMauro Carvalho Chehab 			dev->name, tv.model);
1314b285192aSMauro Carvalho Chehab }
1315b285192aSMauro Carvalho Chehab 
1316e6001482SLuis Alves /* Some TBS cards require initing a chip using a bitbanged SPI attached
1317e6001482SLuis Alves    to the cx23885 gpio's. If this chip doesn't get init'ed the demod
1318e6001482SLuis Alves    doesn't respond to any command. */
1319e6001482SLuis Alves static void tbs_card_init(struct cx23885_dev *dev)
1320e6001482SLuis Alves {
1321e6001482SLuis Alves 	int i;
1322e6001482SLuis Alves 	const u8 buf[] = {
1323e6001482SLuis Alves 		0xe0, 0x06, 0x66, 0x33, 0x65,
1324e6001482SLuis Alves 		0x01, 0x17, 0x06, 0xde};
1325e6001482SLuis Alves 
1326e6001482SLuis Alves 	switch (dev->board) {
1327e6001482SLuis Alves 	case CX23885_BOARD_TBS_6980:
1328e6001482SLuis Alves 	case CX23885_BOARD_TBS_6981:
1329e6001482SLuis Alves 		cx_set(GP0_IO, 0x00070007);
1330e6001482SLuis Alves 		usleep_range(1000, 10000);
1331e6001482SLuis Alves 		cx_clear(GP0_IO, 2);
1332e6001482SLuis Alves 		usleep_range(1000, 10000);
1333e6001482SLuis Alves 		for (i = 0; i < 9 * 8; i++) {
1334e6001482SLuis Alves 			cx_clear(GP0_IO, 7);
1335e6001482SLuis Alves 			usleep_range(1000, 10000);
1336e6001482SLuis Alves 			cx_set(GP0_IO,
1337e6001482SLuis Alves 				((buf[i >> 3] >> (7 - (i & 7))) & 1) | 4);
1338e6001482SLuis Alves 			usleep_range(1000, 10000);
1339e6001482SLuis Alves 		}
1340e6001482SLuis Alves 		cx_set(GP0_IO, 7);
1341e6001482SLuis Alves 		break;
1342e6001482SLuis Alves 	}
1343e6001482SLuis Alves }
1344e6001482SLuis Alves 
1345b285192aSMauro Carvalho Chehab int cx23885_tuner_callback(void *priv, int component, int command, int arg)
1346b285192aSMauro Carvalho Chehab {
1347b285192aSMauro Carvalho Chehab 	struct cx23885_tsport *port = priv;
1348b285192aSMauro Carvalho Chehab 	struct cx23885_dev *dev = port->dev;
1349b285192aSMauro Carvalho Chehab 	u32 bitmask = 0;
1350b285192aSMauro Carvalho Chehab 
1351b285192aSMauro Carvalho Chehab 	if ((command == XC2028_RESET_CLK) || (command == XC2028_I2C_FLUSH))
1352b285192aSMauro Carvalho Chehab 		return 0;
1353b285192aSMauro Carvalho Chehab 
1354b285192aSMauro Carvalho Chehab 	if (command != 0) {
1355b285192aSMauro Carvalho Chehab 		printk(KERN_ERR "%s(): Unknown command 0x%x.\n",
1356b285192aSMauro Carvalho Chehab 			__func__, command);
1357b285192aSMauro Carvalho Chehab 		return -EINVAL;
1358b285192aSMauro Carvalho Chehab 	}
1359b285192aSMauro Carvalho Chehab 
1360b285192aSMauro Carvalho Chehab 	switch (dev->board) {
1361b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1400:
1362b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500:
1363b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1364b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1365642ca1a0SAnca Emanuel 	case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
1366b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1367b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1368b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1369b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
1370b285192aSMauro Carvalho Chehab 		/* Tuner Reset Command */
1371b285192aSMauro Carvalho Chehab 		bitmask = 0x04;
1372b285192aSMauro Carvalho Chehab 		break;
1373b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1374b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
137546b21bbaSJames Harper 	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
1376b285192aSMauro Carvalho Chehab 		/* Two identical tuners on two different i2c buses,
1377b285192aSMauro Carvalho Chehab 		 * we need to reset the correct gpio. */
1378b285192aSMauro Carvalho Chehab 		if (port->nr == 1)
1379b285192aSMauro Carvalho Chehab 			bitmask = 0x01;
1380b285192aSMauro Carvalho Chehab 		else if (port->nr == 2)
1381b285192aSMauro Carvalho Chehab 			bitmask = 0x04;
1382b285192aSMauro Carvalho Chehab 		break;
1383b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1384b285192aSMauro Carvalho Chehab 		/* Tuner Reset Command */
1385b285192aSMauro Carvalho Chehab 		bitmask = 0x02;
1386b285192aSMauro Carvalho Chehab 		break;
1387b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1388b285192aSMauro Carvalho Chehab 		altera_ci_tuner_reset(dev, port->nr);
1389b285192aSMauro Carvalho Chehab 		break;
1390e8d42373SOleh Kravchenko 	case CX23885_BOARD_AVERMEDIA_HC81R:
1391e8d42373SOleh Kravchenko 		/* XC3028L Reset Command */
1392e8d42373SOleh Kravchenko 		bitmask = 1 << 2;
1393e8d42373SOleh Kravchenko 		break;
1394b285192aSMauro Carvalho Chehab 	}
1395b285192aSMauro Carvalho Chehab 
1396b285192aSMauro Carvalho Chehab 	if (bitmask) {
1397b285192aSMauro Carvalho Chehab 		/* Drive the tuner into reset and back out */
1398b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, bitmask);
1399b285192aSMauro Carvalho Chehab 		mdelay(200);
1400b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, bitmask);
1401b285192aSMauro Carvalho Chehab 	}
1402b285192aSMauro Carvalho Chehab 
1403b285192aSMauro Carvalho Chehab 	return 0;
1404b285192aSMauro Carvalho Chehab }
1405b285192aSMauro Carvalho Chehab 
1406b285192aSMauro Carvalho Chehab void cx23885_gpio_setup(struct cx23885_dev *dev)
1407b285192aSMauro Carvalho Chehab {
1408b285192aSMauro Carvalho Chehab 	switch (dev->board) {
1409b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1250:
1410b285192aSMauro Carvalho Chehab 		/* GPIO-0 cx24227 demodulator reset */
1411b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
1412b285192aSMauro Carvalho Chehab 		break;
1413b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500:
1414b285192aSMauro Carvalho Chehab 		/* GPIO-0 cx24227 demodulator */
1415b285192aSMauro Carvalho Chehab 		/* GPIO-2 xc3028 tuner */
1416b285192aSMauro Carvalho Chehab 
1417b285192aSMauro Carvalho Chehab 		/* Put the parts into reset */
1418b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050000);
1419b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x00000005);
1420b285192aSMauro Carvalho Chehab 		msleep(5);
1421b285192aSMauro Carvalho Chehab 
1422b285192aSMauro Carvalho Chehab 		/* Bring the parts out of reset */
1423b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050005);
1424b285192aSMauro Carvalho Chehab 		break;
1425b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1426b285192aSMauro Carvalho Chehab 		/* GPIO-0 cx24227 demodulator reset */
1427b285192aSMauro Carvalho Chehab 		/* GPIO-2 xc5000 tuner reset */
1428b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
1429b285192aSMauro Carvalho Chehab 		break;
1430b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1800:
1431b285192aSMauro Carvalho Chehab 		/* GPIO-0 656_CLK */
1432b285192aSMauro Carvalho Chehab 		/* GPIO-1 656_D0 */
1433b285192aSMauro Carvalho Chehab 		/* GPIO-2 8295A Reset */
1434b285192aSMauro Carvalho Chehab 		/* GPIO-3-10 cx23417 data0-7 */
1435b285192aSMauro Carvalho Chehab 		/* GPIO-11-14 cx23417 addr0-3 */
1436b285192aSMauro Carvalho Chehab 		/* GPIO-15-18 cx23417 READY, CS, RD, WR */
1437b285192aSMauro Carvalho Chehab 		/* GPIO-19 IR_RX */
1438b285192aSMauro Carvalho Chehab 
1439b285192aSMauro Carvalho Chehab 		/* CX23417 GPIO's */
1440b285192aSMauro Carvalho Chehab 		/* EIO15 Zilog Reset */
1441b285192aSMauro Carvalho Chehab 		/* EIO14 S5H1409/CX24227 Reset */
1442b285192aSMauro Carvalho Chehab 		mc417_gpio_enable(dev, GPIO_15 | GPIO_14, 1);
1443b285192aSMauro Carvalho Chehab 
1444b285192aSMauro Carvalho Chehab 		/* Put the demod into reset and protect the eeprom */
1445b285192aSMauro Carvalho Chehab 		mc417_gpio_clear(dev, GPIO_15 | GPIO_14);
1446b285192aSMauro Carvalho Chehab 		mdelay(100);
1447b285192aSMauro Carvalho Chehab 
1448b285192aSMauro Carvalho Chehab 		/* Bring the demod and blaster out of reset */
1449b285192aSMauro Carvalho Chehab 		mc417_gpio_set(dev, GPIO_15 | GPIO_14);
1450b285192aSMauro Carvalho Chehab 		mdelay(100);
1451b285192aSMauro Carvalho Chehab 
1452b285192aSMauro Carvalho Chehab 		/* Force the TDA8295A into reset and back */
1453b285192aSMauro Carvalho Chehab 		cx23885_gpio_enable(dev, GPIO_2, 1);
1454b285192aSMauro Carvalho Chehab 		cx23885_gpio_set(dev, GPIO_2);
1455b285192aSMauro Carvalho Chehab 		mdelay(20);
1456b285192aSMauro Carvalho Chehab 		cx23885_gpio_clear(dev, GPIO_2);
1457b285192aSMauro Carvalho Chehab 		mdelay(20);
1458b285192aSMauro Carvalho Chehab 		cx23885_gpio_set(dev, GPIO_2);
1459b285192aSMauro Carvalho Chehab 		mdelay(20);
1460b285192aSMauro Carvalho Chehab 		break;
1461b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1200:
1462b285192aSMauro Carvalho Chehab 		/* GPIO-0 tda10048 demodulator reset */
1463b285192aSMauro Carvalho Chehab 		/* GPIO-2 tda18271 tuner reset */
1464b285192aSMauro Carvalho Chehab 
1465b285192aSMauro Carvalho Chehab 		/* Put the parts into reset and back */
1466b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050000);
1467b285192aSMauro Carvalho Chehab 		mdelay(20);
1468b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x00000005);
1469b285192aSMauro Carvalho Chehab 		mdelay(20);
1470b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050005);
1471b285192aSMauro Carvalho Chehab 		break;
1472b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1700:
1473b285192aSMauro Carvalho Chehab 		/* GPIO-0 TDA10048 demodulator reset */
1474b285192aSMauro Carvalho Chehab 		/* GPIO-2 TDA8295A Reset */
1475b285192aSMauro Carvalho Chehab 		/* GPIO-3-10 cx23417 data0-7 */
1476b285192aSMauro Carvalho Chehab 		/* GPIO-11-14 cx23417 addr0-3 */
1477b285192aSMauro Carvalho Chehab 		/* GPIO-15-18 cx23417 READY, CS, RD, WR */
1478b285192aSMauro Carvalho Chehab 
1479b285192aSMauro Carvalho Chehab 		/* The following GPIO's are on the interna AVCore (cx25840) */
1480b285192aSMauro Carvalho Chehab 		/* GPIO-19 IR_RX */
1481b285192aSMauro Carvalho Chehab 		/* GPIO-20 IR_TX 416/DVBT Select */
1482b285192aSMauro Carvalho Chehab 		/* GPIO-21 IIS DAT */
1483b285192aSMauro Carvalho Chehab 		/* GPIO-22 IIS WCLK */
1484b285192aSMauro Carvalho Chehab 		/* GPIO-23 IIS BCLK */
1485b285192aSMauro Carvalho Chehab 
1486b285192aSMauro Carvalho Chehab 		/* Put the parts into reset and back */
1487b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050000);
1488b285192aSMauro Carvalho Chehab 		mdelay(20);
1489b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x00000005);
1490b285192aSMauro Carvalho Chehab 		mdelay(20);
1491b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050005);
1492b285192aSMauro Carvalho Chehab 		break;
1493b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1400:
1494b285192aSMauro Carvalho Chehab 		/* GPIO-0  Dibcom7000p demodulator reset */
1495b285192aSMauro Carvalho Chehab 		/* GPIO-2  xc3028L tuner reset */
1496b285192aSMauro Carvalho Chehab 		/* GPIO-13 LED */
1497b285192aSMauro Carvalho Chehab 
1498b285192aSMauro Carvalho Chehab 		/* Put the parts into reset and back */
1499b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050000);
1500b285192aSMauro Carvalho Chehab 		mdelay(20);
1501b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x00000005);
1502b285192aSMauro Carvalho Chehab 		mdelay(20);
1503b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050005);
1504b285192aSMauro Carvalho Chehab 		break;
1505b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1506b285192aSMauro Carvalho Chehab 		/* GPIO-0 xc5000 tuner reset i2c bus 0 */
1507b285192aSMauro Carvalho Chehab 		/* GPIO-1 s5h1409 demod reset i2c bus 0 */
1508b285192aSMauro Carvalho Chehab 		/* GPIO-2 xc5000 tuner reset i2c bus 1 */
1509b285192aSMauro Carvalho Chehab 		/* GPIO-3 s5h1409 demod reset i2c bus 0 */
1510b285192aSMauro Carvalho Chehab 
1511b285192aSMauro Carvalho Chehab 		/* Put the parts into reset and back */
1512b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x000f0000);
1513b285192aSMauro Carvalho Chehab 		mdelay(20);
1514b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x0000000f);
1515b285192aSMauro Carvalho Chehab 		mdelay(20);
1516b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x000f000f);
1517b285192aSMauro Carvalho Chehab 		break;
1518b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
151946b21bbaSJames Harper 	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
1520b285192aSMauro Carvalho Chehab 		/* GPIO-0 portb xc3028 reset */
1521b285192aSMauro Carvalho Chehab 		/* GPIO-1 portb zl10353 reset */
1522b285192aSMauro Carvalho Chehab 		/* GPIO-2 portc xc3028 reset */
1523b285192aSMauro Carvalho Chehab 		/* GPIO-3 portc zl10353 reset */
1524b285192aSMauro Carvalho Chehab 
1525b285192aSMauro Carvalho Chehab 		/* Put the parts into reset and back */
1526b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x000f0000);
1527b285192aSMauro Carvalho Chehab 		mdelay(20);
1528b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x0000000f);
1529b285192aSMauro Carvalho Chehab 		mdelay(20);
1530b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x000f000f);
1531b285192aSMauro Carvalho Chehab 		break;
1532b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1533642ca1a0SAnca Emanuel 	case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
1534b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1535b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1536b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1537b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
1538b285192aSMauro Carvalho Chehab 		/* GPIO-2  xc3028 tuner reset */
1539b285192aSMauro Carvalho Chehab 
1540b285192aSMauro Carvalho Chehab 		/* The following GPIO's are on the internal AVCore (cx25840) */
1541b285192aSMauro Carvalho Chehab 		/* GPIO-?  zl10353 demod reset */
1542b285192aSMauro Carvalho Chehab 
1543b285192aSMauro Carvalho Chehab 		/* Put the parts into reset and back */
1544b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00040000);
1545b285192aSMauro Carvalho Chehab 		mdelay(20);
1546b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x00000004);
1547b285192aSMauro Carvalho Chehab 		mdelay(20);
1548b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00040004);
1549b285192aSMauro Carvalho Chehab 		break;
1550b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TBS_6920:
1551e6001482SLuis Alves 	case CX23885_BOARD_TBS_6980:
1552e6001482SLuis Alves 	case CX23885_BOARD_TBS_6981:
1553f667190bSMariusz Bia?o?czyk 	case CX23885_BOARD_PROF_8000:
1554b285192aSMauro Carvalho Chehab 		cx_write(MC417_CTL, 0x00000036);
1555b285192aSMauro Carvalho Chehab 		cx_write(MC417_OEN, 0x00001000);
1556b285192aSMauro Carvalho Chehab 		cx_set(MC417_RWD, 0x00000002);
1557b285192aSMauro Carvalho Chehab 		mdelay(200);
1558b285192aSMauro Carvalho Chehab 		cx_clear(MC417_RWD, 0x00000800);
1559b285192aSMauro Carvalho Chehab 		mdelay(200);
1560b285192aSMauro Carvalho Chehab 		cx_set(MC417_RWD, 0x00000800);
1561b285192aSMauro Carvalho Chehab 		mdelay(200);
1562b285192aSMauro Carvalho Chehab 		break;
1563b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1564b285192aSMauro Carvalho Chehab 		/* GPIO-0 INTA from CiMax1
1565b285192aSMauro Carvalho Chehab 		   GPIO-1 INTB from CiMax2
1566b285192aSMauro Carvalho Chehab 		   GPIO-2 reset chips
1567b285192aSMauro Carvalho Chehab 		   GPIO-3 to GPIO-10 data/addr for CA
1568b285192aSMauro Carvalho Chehab 		   GPIO-11 ~CS0 to CiMax1
1569b285192aSMauro Carvalho Chehab 		   GPIO-12 ~CS1 to CiMax2
1570b285192aSMauro Carvalho Chehab 		   GPIO-13 ADL0 load LSB addr
1571b285192aSMauro Carvalho Chehab 		   GPIO-14 ADL1 load MSB addr
1572b285192aSMauro Carvalho Chehab 		   GPIO-15 ~RDY from CiMax
1573b285192aSMauro Carvalho Chehab 		   GPIO-17 ~RD to CiMax
1574b285192aSMauro Carvalho Chehab 		   GPIO-18 ~WR to CiMax
1575b285192aSMauro Carvalho Chehab 		 */
1576b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00040000); /* GPIO as out */
1577b285192aSMauro Carvalho Chehab 		/* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
1578b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x00030004);
1579b285192aSMauro Carvalho Chehab 		mdelay(100);/* reset delay */
1580b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */
1581b285192aSMauro Carvalho Chehab 		cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */
1582b285192aSMauro Carvalho Chehab 		/* GPIO-15 IN as ~ACK, rest as OUT */
1583b285192aSMauro Carvalho Chehab 		cx_write(MC417_OEN, 0x00001000);
1584b285192aSMauro Carvalho Chehab 		/* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
1585b285192aSMauro Carvalho Chehab 		cx_write(MC417_RWD, 0x0000c300);
1586b285192aSMauro Carvalho Chehab 		/* enable irq */
1587b285192aSMauro Carvalho Chehab 		cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
1588b285192aSMauro Carvalho Chehab 		break;
1589b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1270:
1590b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1275:
1591b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255:
1592b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
1593b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1210:
1594b285192aSMauro Carvalho Chehab 		/* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */
1595b285192aSMauro Carvalho Chehab 		/* GPIO-6 I2C Gate which can isolate the demod from the bus */
1596b285192aSMauro Carvalho Chehab 		/* GPIO-9 Demod reset */
1597b285192aSMauro Carvalho Chehab 
1598b285192aSMauro Carvalho Chehab 		/* Put the parts into reset and back */
1599b285192aSMauro Carvalho Chehab 		cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1);
1600b285192aSMauro Carvalho Chehab 		cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5);
1601b285192aSMauro Carvalho Chehab 		cx23885_gpio_clear(dev, GPIO_9);
1602b285192aSMauro Carvalho Chehab 		mdelay(20);
1603b285192aSMauro Carvalho Chehab 		cx23885_gpio_set(dev, GPIO_9);
1604b285192aSMauro Carvalho Chehab 		break;
1605b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MYGICA_X8506:
1606b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1607b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MYGICA_X8507:
1608b285192aSMauro Carvalho Chehab 		/* GPIO-0 (0)Analog / (1)Digital TV */
1609b285192aSMauro Carvalho Chehab 		/* GPIO-1 reset XC5000 */
16100d1b5265SMauro Carvalho Chehab 		/* GPIO-2 demod reset */
1611b285192aSMauro Carvalho Chehab 		cx23885_gpio_enable(dev, GPIO_0 | GPIO_1 | GPIO_2, 1);
1612b285192aSMauro Carvalho Chehab 		cx23885_gpio_clear(dev, GPIO_1 | GPIO_2);
1613b285192aSMauro Carvalho Chehab 		mdelay(100);
1614b285192aSMauro Carvalho Chehab 		cx23885_gpio_set(dev, GPIO_0 | GPIO_1 | GPIO_2);
1615b285192aSMauro Carvalho Chehab 		mdelay(100);
1616b285192aSMauro Carvalho Chehab 		break;
1617b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MYGICA_X8558PRO:
1618b285192aSMauro Carvalho Chehab 		/* GPIO-0 reset first ATBM8830 */
1619b285192aSMauro Carvalho Chehab 		/* GPIO-1 reset second ATBM8830 */
1620b285192aSMauro Carvalho Chehab 		cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1);
1621b285192aSMauro Carvalho Chehab 		cx23885_gpio_clear(dev, GPIO_0 | GPIO_1);
1622b285192aSMauro Carvalho Chehab 		mdelay(100);
1623b285192aSMauro Carvalho Chehab 		cx23885_gpio_set(dev, GPIO_0 | GPIO_1);
1624b285192aSMauro Carvalho Chehab 		mdelay(100);
1625b285192aSMauro Carvalho Chehab 		break;
1626b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1850:
1627b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1290:
1628b285192aSMauro Carvalho Chehab 		/* GPIO-0 656_CLK */
1629b285192aSMauro Carvalho Chehab 		/* GPIO-1 656_D0 */
1630b285192aSMauro Carvalho Chehab 		/* GPIO-2 Wake# */
1631b285192aSMauro Carvalho Chehab 		/* GPIO-3-10 cx23417 data0-7 */
1632b285192aSMauro Carvalho Chehab 		/* GPIO-11-14 cx23417 addr0-3 */
1633b285192aSMauro Carvalho Chehab 		/* GPIO-15-18 cx23417 READY, CS, RD, WR */
1634b285192aSMauro Carvalho Chehab 		/* GPIO-19 IR_RX */
1635b285192aSMauro Carvalho Chehab 		/* GPIO-20 C_IR_TX */
1636b285192aSMauro Carvalho Chehab 		/* GPIO-21 I2S DAT */
1637b285192aSMauro Carvalho Chehab 		/* GPIO-22 I2S WCLK */
1638b285192aSMauro Carvalho Chehab 		/* GPIO-23 I2S BCLK */
1639b285192aSMauro Carvalho Chehab 		/* ALT GPIO: EXP GPIO LATCH */
1640b285192aSMauro Carvalho Chehab 
1641b285192aSMauro Carvalho Chehab 		/* CX23417 GPIO's */
1642b285192aSMauro Carvalho Chehab 		/* GPIO-14 S5H1411/CX24228 Reset */
1643b285192aSMauro Carvalho Chehab 		/* GPIO-13 EEPROM write protect */
1644b285192aSMauro Carvalho Chehab 		mc417_gpio_enable(dev, GPIO_14 | GPIO_13, 1);
1645b285192aSMauro Carvalho Chehab 
1646b285192aSMauro Carvalho Chehab 		/* Put the demod into reset and protect the eeprom */
1647b285192aSMauro Carvalho Chehab 		mc417_gpio_clear(dev, GPIO_14 | GPIO_13);
1648b285192aSMauro Carvalho Chehab 		mdelay(100);
1649b285192aSMauro Carvalho Chehab 
1650b285192aSMauro Carvalho Chehab 		/* Bring the demod out of reset */
1651b285192aSMauro Carvalho Chehab 		mc417_gpio_set(dev, GPIO_14);
1652b285192aSMauro Carvalho Chehab 		mdelay(100);
1653b285192aSMauro Carvalho Chehab 
1654b285192aSMauro Carvalho Chehab 		/* CX24228 GPIO */
1655b285192aSMauro Carvalho Chehab 		/* Connected to IF / Mux */
1656b285192aSMauro Carvalho Chehab 		break;
1657b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1658b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
1659b285192aSMauro Carvalho Chehab 		break;
1660b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1661b285192aSMauro Carvalho Chehab 		/* GPIO-0 ~INT in
1662b285192aSMauro Carvalho Chehab 		   GPIO-1 TMS out
1663b285192aSMauro Carvalho Chehab 		   GPIO-2 ~reset chips out
1664b285192aSMauro Carvalho Chehab 		   GPIO-3 to GPIO-10 data/addr for CA in/out
1665b285192aSMauro Carvalho Chehab 		   GPIO-11 ~CS out
1666b285192aSMauro Carvalho Chehab 		   GPIO-12 ADDR out
1667b285192aSMauro Carvalho Chehab 		   GPIO-13 ~WR out
1668b285192aSMauro Carvalho Chehab 		   GPIO-14 ~RD out
1669b285192aSMauro Carvalho Chehab 		   GPIO-15 ~RDY in
1670b285192aSMauro Carvalho Chehab 		   GPIO-16 TCK out
1671b285192aSMauro Carvalho Chehab 		   GPIO-17 TDO in
1672b285192aSMauro Carvalho Chehab 		   GPIO-18 TDI out
1673b285192aSMauro Carvalho Chehab 		 */
1674b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00060000); /* GPIO-1,2 as out */
1675b285192aSMauro Carvalho Chehab 		/* GPIO-0 as INT, reset & TMS low */
1676b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x00010006);
1677b285192aSMauro Carvalho Chehab 		mdelay(100);/* reset delay */
1678b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00000004); /* reset high */
1679b285192aSMauro Carvalho Chehab 		cx_write(MC417_CTL, 0x00000037);/* enable GPIO-3..18 pins */
1680b285192aSMauro Carvalho Chehab 		/* GPIO-17 is TDO in, GPIO-15 is ~RDY in, rest is out */
1681b285192aSMauro Carvalho Chehab 		cx_write(MC417_OEN, 0x00005000);
1682b285192aSMauro Carvalho Chehab 		/* ~RD, ~WR high; ADDR low; ~CS high */
1683b285192aSMauro Carvalho Chehab 		cx_write(MC417_RWD, 0x00000d00);
1684b285192aSMauro Carvalho Chehab 		/* enable irq */
1685b285192aSMauro Carvalho Chehab 		cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
1686b285192aSMauro Carvalho Chehab 		break;
16877c62f5a1SMichael Krufky 	case CX23885_BOARD_HAUPPAUGE_HVR4400:
1688721f3223SMatthias Schwarzott 	case CX23885_BOARD_HAUPPAUGE_STARBURST:
16897c62f5a1SMichael Krufky 		/* GPIO-8 tda10071 demod reset */
1690721f3223SMatthias Schwarzott 		/* GPIO-9 si2165 demod reset (only HVR4400/HVR5500)*/
16917c62f5a1SMichael Krufky 
16927c62f5a1SMichael Krufky 		/* Put the parts into reset and back */
169336efec48SMatthias Schwarzott 		cx23885_gpio_enable(dev, GPIO_8 | GPIO_9, 1);
169436efec48SMatthias Schwarzott 
169536efec48SMatthias Schwarzott 		cx23885_gpio_clear(dev, GPIO_8 | GPIO_9);
16967c62f5a1SMichael Krufky 		mdelay(100);
169736efec48SMatthias Schwarzott 		cx23885_gpio_set(dev, GPIO_8 | GPIO_9);
16987c62f5a1SMichael Krufky 		mdelay(100);
169936efec48SMatthias Schwarzott 
17007c62f5a1SMichael Krufky 		break;
1701e8d42373SOleh Kravchenko 	case CX23885_BOARD_AVERMEDIA_HC81R:
1702e8d42373SOleh Kravchenko 		cx_clear(MC417_CTL, 1);
1703e8d42373SOleh Kravchenko 		/* GPIO-0,1,2 setup direction as output */
1704e8d42373SOleh Kravchenko 		cx_set(GP0_IO, 0x00070000);
1705e8d42373SOleh Kravchenko 		mdelay(10);
1706e8d42373SOleh Kravchenko 		/* AF9013 demod reset */
1707e8d42373SOleh Kravchenko 		cx_set(GP0_IO, 0x00010001);
1708e8d42373SOleh Kravchenko 		mdelay(10);
1709e8d42373SOleh Kravchenko 		cx_clear(GP0_IO, 0x00010001);
1710e8d42373SOleh Kravchenko 		mdelay(10);
1711e8d42373SOleh Kravchenko 		cx_set(GP0_IO, 0x00010001);
1712e8d42373SOleh Kravchenko 		mdelay(10);
1713e8d42373SOleh Kravchenko 		/* demod tune? */
1714e8d42373SOleh Kravchenko 		cx_clear(GP0_IO, 0x00030003);
1715e8d42373SOleh Kravchenko 		mdelay(10);
1716e8d42373SOleh Kravchenko 		cx_set(GP0_IO, 0x00020002);
1717e8d42373SOleh Kravchenko 		mdelay(10);
1718e8d42373SOleh Kravchenko 		cx_set(GP0_IO, 0x00010001);
1719e8d42373SOleh Kravchenko 		mdelay(10);
1720e8d42373SOleh Kravchenko 		cx_clear(GP0_IO, 0x00020002);
1721e8d42373SOleh Kravchenko 		/* XC3028L tuner reset */
1722e8d42373SOleh Kravchenko 		cx_set(GP0_IO, 0x00040004);
1723e8d42373SOleh Kravchenko 		cx_clear(GP0_IO, 0x00040004);
1724e8d42373SOleh Kravchenko 		cx_set(GP0_IO, 0x00040004);
1725e8d42373SOleh Kravchenko 		mdelay(60);
1726e8d42373SOleh Kravchenko 		break;
172729442266SOlli Salonen 	case CX23885_BOARD_DVBSKY_T9580:
1728c29d6a83Snibble.max 	case CX23885_BOARD_DVBSKY_S952:
1729c02ef64aSNibble Max 	case CX23885_BOARD_DVBSKY_T982:
173029442266SOlli Salonen 		/* enable GPIO3-18 pins */
173129442266SOlli Salonen 		cx_write(MC417_CTL, 0x00000037);
173229442266SOlli Salonen 		cx23885_gpio_enable(dev, GPIO_2 | GPIO_11, 1);
173329442266SOlli Salonen 		cx23885_gpio_clear(dev, GPIO_2 | GPIO_11);
173429442266SOlli Salonen 		mdelay(100);
173529442266SOlli Salonen 		cx23885_gpio_set(dev, GPIO_2 | GPIO_11);
173629442266SOlli Salonen 		break;
173782c10276SOlli Salonen 	case CX23885_BOARD_DVBSKY_T980C:
17380e6c7b01Snibble.max 	case CX23885_BOARD_DVBSKY_S950C:
173961b103e8SOlli Salonen 	case CX23885_BOARD_TT_CT2_4500_CI:
174082c10276SOlli Salonen 		/*
174182c10276SOlli Salonen 		 * GPIO-0 INTA from CiMax, input
174282c10276SOlli Salonen 		 * GPIO-1 reset CiMax, output, high active
174382c10276SOlli Salonen 		 * GPIO-2 reset demod, output, low active
174482c10276SOlli Salonen 		 * GPIO-3 to GPIO-10 data/addr for CAM
174582c10276SOlli Salonen 		 * GPIO-11 ~CS0 to CiMax1
174682c10276SOlli Salonen 		 * GPIO-12 ~CS1 to CiMax2
174782c10276SOlli Salonen 		 * GPIO-13 ADL0 load LSB addr
174882c10276SOlli Salonen 		 * GPIO-14 ADL1 load MSB addr
174982c10276SOlli Salonen 		 * GPIO-15 ~RDY from CiMax
175082c10276SOlli Salonen 		 * GPIO-17 ~RD to CiMax
175182c10276SOlli Salonen 		 * GPIO-18 ~WR to CiMax
175282c10276SOlli Salonen 		 */
175382c10276SOlli Salonen 
175482c10276SOlli Salonen 		cx_set(GP0_IO, 0x00060002); /* GPIO 1/2 as output */
175582c10276SOlli Salonen 		cx_clear(GP0_IO, 0x00010004); /* GPIO 0 as input */
175682c10276SOlli Salonen 		mdelay(100); /* reset delay */
175782c10276SOlli Salonen 		cx_set(GP0_IO, 0x00060004); /* GPIO as out, reset high */
175882c10276SOlli Salonen 		cx_clear(GP0_IO, 0x00010002);
175982c10276SOlli Salonen 		cx_write(MC417_CTL, 0x00000037); /* enable GPIO3-18 pins */
176082c10276SOlli Salonen 
176182c10276SOlli Salonen 		/* GPIO-15 IN as ~ACK, rest as OUT */
176282c10276SOlli Salonen 		cx_write(MC417_OEN, 0x00001000);
176382c10276SOlli Salonen 
176482c10276SOlli Salonen 		/* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
176582c10276SOlli Salonen 		cx_write(MC417_RWD, 0x0000c300);
176682c10276SOlli Salonen 
176782c10276SOlli Salonen 		/* enable irq */
176882c10276SOlli Salonen 		cx_write(GPIO_ISM, 0x00000000); /* INTERRUPTS active low */
1769cba5480cSnibble.max 		break;
1770cba5480cSnibble.max 	case CX23885_BOARD_DVBSKY_S950:
1771cba5480cSnibble.max 		cx23885_gpio_enable(dev, GPIO_2, 1);
1772cba5480cSnibble.max 		cx23885_gpio_clear(dev, GPIO_2);
1773cba5480cSnibble.max 		msleep(100);
1774cba5480cSnibble.max 		cx23885_gpio_set(dev, GPIO_2);
1775cba5480cSnibble.max 		break;
17761fc77d01SAntti Palosaari 	case CX23885_BOARD_HAUPPAUGE_HVR5525:
177710a5210eSStephen Backway 	case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
1778dd9ad4fbSStephen Backway 	case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
17791fc77d01SAntti Palosaari 		/*
178010a5210eSStephen Backway 		 * HVR5525 GPIO Details:
17811fc77d01SAntti Palosaari 		 *  GPIO-00 IR_WIDE
17821fc77d01SAntti Palosaari 		 *  GPIO-02 wake#
17831fc77d01SAntti Palosaari 		 *  GPIO-03 VAUX Pres.
17841fc77d01SAntti Palosaari 		 *  GPIO-07 PROG#
17851fc77d01SAntti Palosaari 		 *  GPIO-08 SAT_RESN
17861fc77d01SAntti Palosaari 		 *  GPIO-09 TER_RESN
17871fc77d01SAntti Palosaari 		 *  GPIO-10 B2_SENSE
17881fc77d01SAntti Palosaari 		 *  GPIO-11 B1_SENSE
17891fc77d01SAntti Palosaari 		 *  GPIO-15 IR_LED_STATUS
17901fc77d01SAntti Palosaari 		 *  GPIO-19 IR_NARROW
17911fc77d01SAntti Palosaari 		 *  GPIO-20 Blauster1
17921fc77d01SAntti Palosaari 		 *  ALTGPIO VAUX_SWITCH
17931fc77d01SAntti Palosaari 		 *  AUX_PLL_CLK : Blaster2
17941fc77d01SAntti Palosaari 		 */
17951fc77d01SAntti Palosaari 		/* Put the parts into reset and back */
17961fc77d01SAntti Palosaari 		cx23885_gpio_enable(dev, GPIO_8 | GPIO_9, 1);
17971fc77d01SAntti Palosaari 		cx23885_gpio_clear(dev, GPIO_8 | GPIO_9);
17981fc77d01SAntti Palosaari 		msleep(100);
17991fc77d01SAntti Palosaari 		cx23885_gpio_set(dev, GPIO_8 | GPIO_9);
18001fc77d01SAntti Palosaari 		msleep(100);
18011fc77d01SAntti Palosaari 		break;
18026c43a217SHans Verkuil 	case CX23885_BOARD_VIEWCAST_260E:
18036c43a217SHans Verkuil 	case CX23885_BOARD_VIEWCAST_460E:
18046c43a217SHans Verkuil 		/* For documentation purposes, it's worth noting that this
18056c43a217SHans Verkuil 		 * card does not have any GPIO's connected to subcomponents.
18066c43a217SHans Verkuil 		 */
18076c43a217SHans Verkuil 		break;
1808b285192aSMauro Carvalho Chehab 	}
1809b285192aSMauro Carvalho Chehab }
1810b285192aSMauro Carvalho Chehab 
1811b285192aSMauro Carvalho Chehab int cx23885_ir_init(struct cx23885_dev *dev)
1812b285192aSMauro Carvalho Chehab {
1813b285192aSMauro Carvalho Chehab 	static struct v4l2_subdev_io_pin_config ir_rxtx_pin_cfg[] = {
1814b285192aSMauro Carvalho Chehab 		{
1815b285192aSMauro Carvalho Chehab 			.flags	  = V4L2_SUBDEV_IO_PIN_INPUT,
1816b285192aSMauro Carvalho Chehab 			.pin	  = CX23885_PIN_IR_RX_GPIO19,
1817b285192aSMauro Carvalho Chehab 			.function = CX23885_PAD_IR_RX,
1818b285192aSMauro Carvalho Chehab 			.value	  = 0,
1819b285192aSMauro Carvalho Chehab 			.strength = CX25840_PIN_DRIVE_MEDIUM,
1820b285192aSMauro Carvalho Chehab 		}, {
1821b285192aSMauro Carvalho Chehab 			.flags	  = V4L2_SUBDEV_IO_PIN_OUTPUT,
1822b285192aSMauro Carvalho Chehab 			.pin	  = CX23885_PIN_IR_TX_GPIO20,
1823b285192aSMauro Carvalho Chehab 			.function = CX23885_PAD_IR_TX,
1824b285192aSMauro Carvalho Chehab 			.value	  = 0,
1825b285192aSMauro Carvalho Chehab 			.strength = CX25840_PIN_DRIVE_MEDIUM,
1826b285192aSMauro Carvalho Chehab 		}
1827b285192aSMauro Carvalho Chehab 	};
1828b285192aSMauro Carvalho Chehab 	const size_t ir_rxtx_pin_cfg_count = ARRAY_SIZE(ir_rxtx_pin_cfg);
1829b285192aSMauro Carvalho Chehab 
1830b285192aSMauro Carvalho Chehab 	static struct v4l2_subdev_io_pin_config ir_rx_pin_cfg[] = {
1831b285192aSMauro Carvalho Chehab 		{
1832b285192aSMauro Carvalho Chehab 			.flags	  = V4L2_SUBDEV_IO_PIN_INPUT,
1833b285192aSMauro Carvalho Chehab 			.pin	  = CX23885_PIN_IR_RX_GPIO19,
1834b285192aSMauro Carvalho Chehab 			.function = CX23885_PAD_IR_RX,
1835b285192aSMauro Carvalho Chehab 			.value	  = 0,
1836b285192aSMauro Carvalho Chehab 			.strength = CX25840_PIN_DRIVE_MEDIUM,
1837b285192aSMauro Carvalho Chehab 		}
1838b285192aSMauro Carvalho Chehab 	};
1839b285192aSMauro Carvalho Chehab 	const size_t ir_rx_pin_cfg_count = ARRAY_SIZE(ir_rx_pin_cfg);
1840b285192aSMauro Carvalho Chehab 
1841b285192aSMauro Carvalho Chehab 	struct v4l2_subdev_ir_parameters params;
1842b285192aSMauro Carvalho Chehab 	int ret = 0;
1843b285192aSMauro Carvalho Chehab 	switch (dev->board) {
1844b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500:
1845b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1846b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1800:
1847b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1200:
1848b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1400:
1849b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1275:
1850b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255:
1851b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
1852b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1210:
185310a5210eSStephen Backway 	case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
1854dd9ad4fbSStephen Backway 	case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
1855b285192aSMauro Carvalho Chehab 		/* FIXME: Implement me */
1856b285192aSMauro Carvalho Chehab 		break;
1857b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1270:
1858b285192aSMauro Carvalho Chehab 		ret = cx23888_ir_probe(dev);
1859b285192aSMauro Carvalho Chehab 		if (ret)
1860b285192aSMauro Carvalho Chehab 			break;
1861b285192aSMauro Carvalho Chehab 		dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
1862b285192aSMauro Carvalho Chehab 		v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1863b285192aSMauro Carvalho Chehab 				 ir_rx_pin_cfg_count, ir_rx_pin_cfg);
1864b285192aSMauro Carvalho Chehab 		break;
1865b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1850:
1866b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1290:
1867b285192aSMauro Carvalho Chehab 		ret = cx23888_ir_probe(dev);
1868b285192aSMauro Carvalho Chehab 		if (ret)
1869b285192aSMauro Carvalho Chehab 			break;
1870b285192aSMauro Carvalho Chehab 		dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
1871b285192aSMauro Carvalho Chehab 		v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1872b285192aSMauro Carvalho Chehab 				 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
1873b285192aSMauro Carvalho Chehab 		/*
1874b285192aSMauro Carvalho Chehab 		 * For these boards we need to invert the Tx output via the
1875b285192aSMauro Carvalho Chehab 		 * IR controller to have the LED off while idle
1876b285192aSMauro Carvalho Chehab 		 */
1877b285192aSMauro Carvalho Chehab 		v4l2_subdev_call(dev->sd_ir, ir, tx_g_parameters, &params);
1878b285192aSMauro Carvalho Chehab 		params.enable = false;
1879b285192aSMauro Carvalho Chehab 		params.shutdown = false;
1880b285192aSMauro Carvalho Chehab 		params.invert_level = true;
1881b285192aSMauro Carvalho Chehab 		v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, &params);
1882b285192aSMauro Carvalho Chehab 		params.shutdown = true;
1883b285192aSMauro Carvalho Chehab 		v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, &params);
1884b285192aSMauro Carvalho Chehab 		break;
1885b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1886b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TEVII_S470:
1887e5f670b7SAlfredo Jesús Delaiti 	case CX23885_BOARD_MYGICA_X8507:
1888e6001482SLuis Alves 	case CX23885_BOARD_TBS_6980:
1889e6001482SLuis Alves 	case CX23885_BOARD_TBS_6981:
1890d11a3835Snibble.max 	case CX23885_BOARD_DVBSKY_T9580:
1891070e6661Snibble.max 	case CX23885_BOARD_DVBSKY_T980C:
1892070e6661Snibble.max 	case CX23885_BOARD_DVBSKY_S950C:
189361b103e8SOlli Salonen 	case CX23885_BOARD_TT_CT2_4500_CI:
1894cba5480cSnibble.max 	case CX23885_BOARD_DVBSKY_S950:
1895c29d6a83Snibble.max 	case CX23885_BOARD_DVBSKY_S952:
1896c02ef64aSNibble Max 	case CX23885_BOARD_DVBSKY_T982:
1897b285192aSMauro Carvalho Chehab 		if (!enable_885_ir)
1898b285192aSMauro Carvalho Chehab 			break;
1899b285192aSMauro Carvalho Chehab 		dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
1900b285192aSMauro Carvalho Chehab 		if (dev->sd_ir == NULL) {
1901b285192aSMauro Carvalho Chehab 			ret = -ENODEV;
1902b285192aSMauro Carvalho Chehab 			break;
1903b285192aSMauro Carvalho Chehab 		}
1904b285192aSMauro Carvalho Chehab 		v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1905b285192aSMauro Carvalho Chehab 				 ir_rx_pin_cfg_count, ir_rx_pin_cfg);
1906b285192aSMauro Carvalho Chehab 		break;
1907b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1250:
1908b285192aSMauro Carvalho Chehab 		if (!enable_885_ir)
1909b285192aSMauro Carvalho Chehab 			break;
1910b285192aSMauro Carvalho Chehab 		dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
1911b285192aSMauro Carvalho Chehab 		if (dev->sd_ir == NULL) {
1912b285192aSMauro Carvalho Chehab 			ret = -ENODEV;
1913b285192aSMauro Carvalho Chehab 			break;
1914b285192aSMauro Carvalho Chehab 		}
1915b285192aSMauro Carvalho Chehab 		v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1916b285192aSMauro Carvalho Chehab 				 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
1917b285192aSMauro Carvalho Chehab 		break;
1918b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
191946b21bbaSJames Harper 	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
1920b285192aSMauro Carvalho Chehab 		request_module("ir-kbd-i2c");
1921b285192aSMauro Carvalho Chehab 		break;
1922b285192aSMauro Carvalho Chehab 	}
1923b285192aSMauro Carvalho Chehab 
1924b285192aSMauro Carvalho Chehab 	return ret;
1925b285192aSMauro Carvalho Chehab }
1926b285192aSMauro Carvalho Chehab 
1927b285192aSMauro Carvalho Chehab void cx23885_ir_fini(struct cx23885_dev *dev)
1928b285192aSMauro Carvalho Chehab {
1929b285192aSMauro Carvalho Chehab 	switch (dev->board) {
1930b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1270:
1931b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1850:
1932b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1290:
1933b285192aSMauro Carvalho Chehab 		cx23885_irq_remove(dev, PCI_MSK_IR);
1934b285192aSMauro Carvalho Chehab 		cx23888_ir_remove(dev);
1935b285192aSMauro Carvalho Chehab 		dev->sd_ir = NULL;
1936b285192aSMauro Carvalho Chehab 		break;
1937b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1938b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TEVII_S470:
1939b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1250:
1940e5f670b7SAlfredo Jesús Delaiti 	case CX23885_BOARD_MYGICA_X8507:
1941e6001482SLuis Alves 	case CX23885_BOARD_TBS_6980:
1942e6001482SLuis Alves 	case CX23885_BOARD_TBS_6981:
1943d11a3835Snibble.max 	case CX23885_BOARD_DVBSKY_T9580:
1944070e6661Snibble.max 	case CX23885_BOARD_DVBSKY_T980C:
1945070e6661Snibble.max 	case CX23885_BOARD_DVBSKY_S950C:
194661b103e8SOlli Salonen 	case CX23885_BOARD_TT_CT2_4500_CI:
1947cba5480cSnibble.max 	case CX23885_BOARD_DVBSKY_S950:
1948c29d6a83Snibble.max 	case CX23885_BOARD_DVBSKY_S952:
1949c02ef64aSNibble Max 	case CX23885_BOARD_DVBSKY_T982:
1950b285192aSMauro Carvalho Chehab 		cx23885_irq_remove(dev, PCI_MSK_AV_CORE);
1951b285192aSMauro Carvalho Chehab 		/* sd_ir is a duplicate pointer to the AV Core, just clear it */
1952b285192aSMauro Carvalho Chehab 		dev->sd_ir = NULL;
1953b285192aSMauro Carvalho Chehab 		break;
1954b285192aSMauro Carvalho Chehab 	}
1955b285192aSMauro Carvalho Chehab }
1956b285192aSMauro Carvalho Chehab 
1957ada73eeeSMauro Carvalho Chehab static int netup_jtag_io(void *device, int tms, int tdi, int read_tdo)
1958b285192aSMauro Carvalho Chehab {
1959b285192aSMauro Carvalho Chehab 	int data;
1960b285192aSMauro Carvalho Chehab 	int tdo = 0;
1961b285192aSMauro Carvalho Chehab 	struct cx23885_dev *dev = (struct cx23885_dev *)device;
1962b285192aSMauro Carvalho Chehab 	/*TMS*/
1963b285192aSMauro Carvalho Chehab 	data = ((cx_read(GP0_IO)) & (~0x00000002));
1964b285192aSMauro Carvalho Chehab 	data |= (tms ? 0x00020002 : 0x00020000);
1965b285192aSMauro Carvalho Chehab 	cx_write(GP0_IO, data);
1966b285192aSMauro Carvalho Chehab 
1967b285192aSMauro Carvalho Chehab 	/*TDI*/
1968b285192aSMauro Carvalho Chehab 	data = ((cx_read(MC417_RWD)) & (~0x0000a000));
1969b285192aSMauro Carvalho Chehab 	data |= (tdi ? 0x00008000 : 0);
1970b285192aSMauro Carvalho Chehab 	cx_write(MC417_RWD, data);
1971b285192aSMauro Carvalho Chehab 	if (read_tdo)
1972b285192aSMauro Carvalho Chehab 		tdo = (data & 0x00004000) ? 1 : 0; /*TDO*/
1973b285192aSMauro Carvalho Chehab 
1974b285192aSMauro Carvalho Chehab 	cx_write(MC417_RWD, data | 0x00002000);
1975b285192aSMauro Carvalho Chehab 	udelay(1);
1976b285192aSMauro Carvalho Chehab 	/*TCK*/
1977b285192aSMauro Carvalho Chehab 	cx_write(MC417_RWD, data);
1978b285192aSMauro Carvalho Chehab 
1979b285192aSMauro Carvalho Chehab 	return tdo;
1980b285192aSMauro Carvalho Chehab }
1981b285192aSMauro Carvalho Chehab 
1982b285192aSMauro Carvalho Chehab void cx23885_ir_pci_int_enable(struct cx23885_dev *dev)
1983b285192aSMauro Carvalho Chehab {
1984b285192aSMauro Carvalho Chehab 	switch (dev->board) {
1985b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1270:
1986b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1850:
1987b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1290:
1988b285192aSMauro Carvalho Chehab 		if (dev->sd_ir)
1989b285192aSMauro Carvalho Chehab 			cx23885_irq_add_enable(dev, PCI_MSK_IR);
1990b285192aSMauro Carvalho Chehab 		break;
1991b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1992b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TEVII_S470:
1993b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1250:
1994e5f670b7SAlfredo Jesús Delaiti 	case CX23885_BOARD_MYGICA_X8507:
1995e6001482SLuis Alves 	case CX23885_BOARD_TBS_6980:
1996e6001482SLuis Alves 	case CX23885_BOARD_TBS_6981:
1997d11a3835Snibble.max 	case CX23885_BOARD_DVBSKY_T9580:
1998070e6661Snibble.max 	case CX23885_BOARD_DVBSKY_T980C:
1999070e6661Snibble.max 	case CX23885_BOARD_DVBSKY_S950C:
200061b103e8SOlli Salonen 	case CX23885_BOARD_TT_CT2_4500_CI:
2001cba5480cSnibble.max 	case CX23885_BOARD_DVBSKY_S950:
2002c29d6a83Snibble.max 	case CX23885_BOARD_DVBSKY_S952:
2003c02ef64aSNibble Max 	case CX23885_BOARD_DVBSKY_T982:
2004b285192aSMauro Carvalho Chehab 		if (dev->sd_ir)
2005b285192aSMauro Carvalho Chehab 			cx23885_irq_add_enable(dev, PCI_MSK_AV_CORE);
2006b285192aSMauro Carvalho Chehab 		break;
2007b285192aSMauro Carvalho Chehab 	}
2008b285192aSMauro Carvalho Chehab }
2009b285192aSMauro Carvalho Chehab 
2010b285192aSMauro Carvalho Chehab void cx23885_card_setup(struct cx23885_dev *dev)
2011b285192aSMauro Carvalho Chehab {
2012b285192aSMauro Carvalho Chehab 	struct cx23885_tsport *ts1 = &dev->ts1;
2013b285192aSMauro Carvalho Chehab 	struct cx23885_tsport *ts2 = &dev->ts2;
2014b285192aSMauro Carvalho Chehab 
2015b285192aSMauro Carvalho Chehab 	static u8 eeprom[256];
2016b285192aSMauro Carvalho Chehab 
2017b285192aSMauro Carvalho Chehab 	if (dev->i2c_bus[0].i2c_rc == 0) {
2018b285192aSMauro Carvalho Chehab 		dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
2019b285192aSMauro Carvalho Chehab 		tveeprom_read(&dev->i2c_bus[0].i2c_client,
2020b285192aSMauro Carvalho Chehab 			      eeprom, sizeof(eeprom));
2021b285192aSMauro Carvalho Chehab 	}
2022b285192aSMauro Carvalho Chehab 
2023b285192aSMauro Carvalho Chehab 	switch (dev->board) {
2024b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1250:
2025b285192aSMauro Carvalho Chehab 		if (dev->i2c_bus[0].i2c_rc == 0) {
2026b285192aSMauro Carvalho Chehab 			if (eeprom[0x80] != 0x84)
2027b285192aSMauro Carvalho Chehab 				hauppauge_eeprom(dev, eeprom+0xc0);
2028b285192aSMauro Carvalho Chehab 			else
2029b285192aSMauro Carvalho Chehab 				hauppauge_eeprom(dev, eeprom+0x80);
2030b285192aSMauro Carvalho Chehab 		}
2031b285192aSMauro Carvalho Chehab 		break;
2032b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500:
2033b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
2034b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1400:
2035b285192aSMauro Carvalho Chehab 		if (dev->i2c_bus[0].i2c_rc == 0)
2036b285192aSMauro Carvalho Chehab 			hauppauge_eeprom(dev, eeprom+0x80);
2037b285192aSMauro Carvalho Chehab 		break;
2038b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1800:
2039b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
2040b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1200:
2041b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1700:
2042b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1270:
2043b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1275:
2044b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255:
2045b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
2046b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1210:
2047b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1850:
2048b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1290:
20497c62f5a1SMichael Krufky 	case CX23885_BOARD_HAUPPAUGE_HVR4400:
2050721f3223SMatthias Schwarzott 	case CX23885_BOARD_HAUPPAUGE_STARBURST:
2051cce11b09SHans Verkuil 	case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE:
20521fc77d01SAntti Palosaari 	case CX23885_BOARD_HAUPPAUGE_HVR5525:
205310a5210eSStephen Backway 	case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
2054dd9ad4fbSStephen Backway 	case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
2055b285192aSMauro Carvalho Chehab 		if (dev->i2c_bus[0].i2c_rc == 0)
2056b285192aSMauro Carvalho Chehab 			hauppauge_eeprom(dev, eeprom+0xc0);
2057b285192aSMauro Carvalho Chehab 		break;
20586c43a217SHans Verkuil 	case CX23885_BOARD_VIEWCAST_260E:
20596c43a217SHans Verkuil 	case CX23885_BOARD_VIEWCAST_460E:
20606c43a217SHans Verkuil 		dev->i2c_bus[1].i2c_client.addr = 0xa0 >> 1;
20616c43a217SHans Verkuil 		tveeprom_read(&dev->i2c_bus[1].i2c_client,
20626c43a217SHans Verkuil 			      eeprom, sizeof(eeprom));
20636c43a217SHans Verkuil 		if (dev->i2c_bus[0].i2c_rc == 0)
20646c43a217SHans Verkuil 			viewcast_eeprom(dev, eeprom);
20656c43a217SHans Verkuil 		break;
2066b285192aSMauro Carvalho Chehab 	}
2067b285192aSMauro Carvalho Chehab 
2068b285192aSMauro Carvalho Chehab 	switch (dev->board) {
2069e8d42373SOleh Kravchenko 	case CX23885_BOARD_AVERMEDIA_HC81R:
2070e8d42373SOleh Kravchenko 		/* Defaults for VID B */
2071e8d42373SOleh Kravchenko 		ts1->gen_ctrl_val  = 0x4; /* Parallel */
2072e8d42373SOleh Kravchenko 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2073e8d42373SOleh Kravchenko 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2074e8d42373SOleh Kravchenko 		/* Defaults for VID C */
2075e8d42373SOleh Kravchenko 		/* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
2076e8d42373SOleh Kravchenko 		ts2->gen_ctrl_val  = 0x10e;
2077e8d42373SOleh Kravchenko 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2078e8d42373SOleh Kravchenko 		ts2->src_sel_val     = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2079e8d42373SOleh Kravchenko 		break;
2080b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
2081b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
208246b21bbaSJames Harper 	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
2083b285192aSMauro Carvalho Chehab 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
2084b285192aSMauro Carvalho Chehab 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2085b285192aSMauro Carvalho Chehab 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2086b285192aSMauro Carvalho Chehab 		/* break omitted intentionally */
2087b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
2088b285192aSMauro Carvalho Chehab 		ts1->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
2089b285192aSMauro Carvalho Chehab 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2090b285192aSMauro Carvalho Chehab 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2091b285192aSMauro Carvalho Chehab 		break;
2092b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1850:
2093b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1800:
2094b285192aSMauro Carvalho Chehab 		/* Defaults for VID B - Analog encoder */
2095b285192aSMauro Carvalho Chehab 		/* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
2096b285192aSMauro Carvalho Chehab 		ts1->gen_ctrl_val    = 0x10e;
2097b285192aSMauro Carvalho Chehab 		ts1->ts_clk_en_val   = 0x1; /* Enable TS_CLK */
2098b285192aSMauro Carvalho Chehab 		ts1->src_sel_val     = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2099b285192aSMauro Carvalho Chehab 
2100b285192aSMauro Carvalho Chehab 		/* APB_TSVALERR_POL (active low)*/
2101b285192aSMauro Carvalho Chehab 		ts1->vld_misc_val    = 0x2000;
2102b285192aSMauro Carvalho Chehab 		ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
2103b285192aSMauro Carvalho Chehab 		cx_write(0x130184, 0xc);
2104b285192aSMauro Carvalho Chehab 
2105b285192aSMauro Carvalho Chehab 		/* Defaults for VID C */
2106b285192aSMauro Carvalho Chehab 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
2107b285192aSMauro Carvalho Chehab 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2108b285192aSMauro Carvalho Chehab 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2109b285192aSMauro Carvalho Chehab 		break;
2110b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TBS_6920:
2111b285192aSMauro Carvalho Chehab 		ts1->gen_ctrl_val  = 0x4; /* Parallel */
2112b285192aSMauro Carvalho Chehab 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2113b285192aSMauro Carvalho Chehab 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2114b285192aSMauro Carvalho Chehab 		break;
2115b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TEVII_S470:
2116b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TEVII_S471:
2117b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVBWORLD_2005:
2118f667190bSMariusz Bia?o?czyk 	case CX23885_BOARD_PROF_8000:
211982c10276SOlli Salonen 	case CX23885_BOARD_DVBSKY_T980C:
21200e6c7b01Snibble.max 	case CX23885_BOARD_DVBSKY_S950C:
212161b103e8SOlli Salonen 	case CX23885_BOARD_TT_CT2_4500_CI:
2122cba5480cSnibble.max 	case CX23885_BOARD_DVBSKY_S950:
2123b285192aSMauro Carvalho Chehab 		ts1->gen_ctrl_val  = 0x5; /* Parallel */
2124b285192aSMauro Carvalho Chehab 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2125b285192aSMauro Carvalho Chehab 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2126b285192aSMauro Carvalho Chehab 		break;
2127b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
2128b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
2129b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
2130b285192aSMauro Carvalho Chehab 		ts1->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
2131b285192aSMauro Carvalho Chehab 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2132b285192aSMauro Carvalho Chehab 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2133b285192aSMauro Carvalho Chehab 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
2134b285192aSMauro Carvalho Chehab 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2135b285192aSMauro Carvalho Chehab 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2136b285192aSMauro Carvalho Chehab 		break;
2137e6001482SLuis Alves 	case CX23885_BOARD_TBS_6980:
2138e6001482SLuis Alves 	case CX23885_BOARD_TBS_6981:
2139e6001482SLuis Alves 		ts1->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
2140e6001482SLuis Alves 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2141e6001482SLuis Alves 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2142e6001482SLuis Alves 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
2143e6001482SLuis Alves 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2144e6001482SLuis Alves 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2145e6001482SLuis Alves 		tbs_card_init(dev);
2146e6001482SLuis Alves 		break;
2147b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MYGICA_X8506:
2148b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MAGICPRO_PROHDTVE2:
21490d1b5265SMauro Carvalho Chehab 	case CX23885_BOARD_MYGICA_X8507:
2150b285192aSMauro Carvalho Chehab 		ts1->gen_ctrl_val  = 0x5; /* Parallel */
2151b285192aSMauro Carvalho Chehab 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2152b285192aSMauro Carvalho Chehab 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2153b285192aSMauro Carvalho Chehab 		break;
2154b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MYGICA_X8558PRO:
2155b285192aSMauro Carvalho Chehab 		ts1->gen_ctrl_val  = 0x5; /* Parallel */
2156b285192aSMauro Carvalho Chehab 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2157b285192aSMauro Carvalho Chehab 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2158b285192aSMauro Carvalho Chehab 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
2159b285192aSMauro Carvalho Chehab 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2160b285192aSMauro Carvalho Chehab 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2161b285192aSMauro Carvalho Chehab 		break;
21627c62f5a1SMichael Krufky 	case CX23885_BOARD_HAUPPAUGE_HVR4400:
21637c62f5a1SMichael Krufky 		ts1->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
21647c62f5a1SMichael Krufky 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
21657c62f5a1SMichael Krufky 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
216636efec48SMatthias Schwarzott 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
216736efec48SMatthias Schwarzott 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
216836efec48SMatthias Schwarzott 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
21697c62f5a1SMichael Krufky 		break;
2170721f3223SMatthias Schwarzott 	case CX23885_BOARD_HAUPPAUGE_STARBURST:
2171721f3223SMatthias Schwarzott 		ts1->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
2172721f3223SMatthias Schwarzott 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2173721f3223SMatthias Schwarzott 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2174721f3223SMatthias Schwarzott 		break;
217529442266SOlli Salonen 	case CX23885_BOARD_DVBSKY_T9580:
2176c02ef64aSNibble Max 	case CX23885_BOARD_DVBSKY_T982:
217729442266SOlli Salonen 		ts1->gen_ctrl_val  = 0x5; /* Parallel */
217829442266SOlli Salonen 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
217929442266SOlli Salonen 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
218029442266SOlli Salonen 		ts2->gen_ctrl_val  = 0x8; /* Serial bus */
218129442266SOlli Salonen 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
218229442266SOlli Salonen 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
218329442266SOlli Salonen 		break;
2184c29d6a83Snibble.max 	case CX23885_BOARD_DVBSKY_S952:
2185c29d6a83Snibble.max 		ts1->gen_ctrl_val  = 0x5; /* Parallel */
2186c29d6a83Snibble.max 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2187c29d6a83Snibble.max 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2188c29d6a83Snibble.max 		ts2->gen_ctrl_val  = 0xe; /* Serial bus */
2189c29d6a83Snibble.max 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2190c29d6a83Snibble.max 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2191c29d6a83Snibble.max 		break;
21921fc77d01SAntti Palosaari 	case CX23885_BOARD_HAUPPAUGE_HVR5525:
21931fc77d01SAntti Palosaari 		ts1->gen_ctrl_val  = 0x5; /* Parallel */
21941fc77d01SAntti Palosaari 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
21951fc77d01SAntti Palosaari 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
21961fc77d01SAntti Palosaari 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
21971fc77d01SAntti Palosaari 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
21981fc77d01SAntti Palosaari 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
21991fc77d01SAntti Palosaari 		break;
220010a5210eSStephen Backway 	case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
2201dd9ad4fbSStephen Backway 	case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
220210a5210eSStephen Backway 		ts1->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
220310a5210eSStephen Backway 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
220410a5210eSStephen Backway 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
220510a5210eSStephen Backway 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
220610a5210eSStephen Backway 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
220710a5210eSStephen Backway 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
220810a5210eSStephen Backway 		break;
2209b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1250:
2210b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500:
2211b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
2212b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
2213b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1200:
2214b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1700:
2215b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1400:
2216cce11b09SHans Verkuil 	case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE:
2217b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
2218642ca1a0SAnca Emanuel 	case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
2219b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
2220b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
2221b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1270:
2222b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1275:
2223b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255:
2224b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
2225b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1210:
2226b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
2227b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1290:
2228b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
2229b285192aSMauro Carvalho Chehab 	default:
2230b285192aSMauro Carvalho Chehab 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
2231b285192aSMauro Carvalho Chehab 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2232b285192aSMauro Carvalho Chehab 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2233b285192aSMauro Carvalho Chehab 	}
2234b285192aSMauro Carvalho Chehab 
2235b285192aSMauro Carvalho Chehab 	/* Certain boards support analog, or require the avcore to be
2236b285192aSMauro Carvalho Chehab 	 * loaded, ensure this happens.
2237b285192aSMauro Carvalho Chehab 	 */
2238b285192aSMauro Carvalho Chehab 	switch (dev->board) {
2239b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TEVII_S470:
2240b285192aSMauro Carvalho Chehab 		/* Currently only enabled for the integrated IR controller */
2241b285192aSMauro Carvalho Chehab 		if (!enable_885_ir)
2242b285192aSMauro Carvalho Chehab 			break;
2243b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1250:
2244b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1800:
2245cce11b09SHans Verkuil 	case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE:
2246b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
2247b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1700:
2248b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
2249642ca1a0SAnca Emanuel 	case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
2250b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
2251b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
2252b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
2253b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
2254b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
2255b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255:
2256b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
2257b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1270:
2258b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1850:
2259b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MYGICA_X8506:
2260b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MAGICPRO_PROHDTVE2:
2261b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1290:
2262b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
2263b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
2264b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500:
2265b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MPX885:
2266b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MYGICA_X8507:
2267b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
2268e8d42373SOleh Kravchenko 	case CX23885_BOARD_AVERMEDIA_HC81R:
2269e6001482SLuis Alves 	case CX23885_BOARD_TBS_6980:
2270e6001482SLuis Alves 	case CX23885_BOARD_TBS_6981:
227129442266SOlli Salonen 	case CX23885_BOARD_DVBSKY_T9580:
227282c10276SOlli Salonen 	case CX23885_BOARD_DVBSKY_T980C:
22730e6c7b01Snibble.max 	case CX23885_BOARD_DVBSKY_S950C:
227461b103e8SOlli Salonen 	case CX23885_BOARD_TT_CT2_4500_CI:
2275cba5480cSnibble.max 	case CX23885_BOARD_DVBSKY_S950:
2276c29d6a83Snibble.max 	case CX23885_BOARD_DVBSKY_S952:
2277c02ef64aSNibble Max 	case CX23885_BOARD_DVBSKY_T982:
22786c43a217SHans Verkuil 	case CX23885_BOARD_VIEWCAST_260E:
22796c43a217SHans Verkuil 	case CX23885_BOARD_VIEWCAST_460E:
2280b285192aSMauro Carvalho Chehab 		dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
2281b285192aSMauro Carvalho Chehab 				&dev->i2c_bus[2].i2c_adap,
2282b285192aSMauro Carvalho Chehab 				"cx25840", 0x88 >> 1, NULL);
2283b285192aSMauro Carvalho Chehab 		if (dev->sd_cx25840) {
2284b285192aSMauro Carvalho Chehab 			dev->sd_cx25840->grp_id = CX23885_HW_AV_CORE;
2285b285192aSMauro Carvalho Chehab 			v4l2_subdev_call(dev->sd_cx25840, core, load_fw);
2286b285192aSMauro Carvalho Chehab 		}
2287b285192aSMauro Carvalho Chehab 		break;
2288b285192aSMauro Carvalho Chehab 	}
2289b285192aSMauro Carvalho Chehab 
22906c43a217SHans Verkuil 	switch (dev->board) {
22916c43a217SHans Verkuil 	case CX23885_BOARD_VIEWCAST_260E:
22926c43a217SHans Verkuil 		v4l2_i2c_new_subdev(&dev->v4l2_dev,
22936c43a217SHans Verkuil 				&dev->i2c_bus[0].i2c_adap,
22946c43a217SHans Verkuil 				"cs3308", 0x82 >> 1, NULL);
22956c43a217SHans Verkuil 		break;
22966c43a217SHans Verkuil 	case CX23885_BOARD_VIEWCAST_460E:
22976c43a217SHans Verkuil 		/* This cs3308 controls the audio from the breakout cable */
22986c43a217SHans Verkuil 		v4l2_i2c_new_subdev(&dev->v4l2_dev,
22996c43a217SHans Verkuil 				&dev->i2c_bus[0].i2c_adap,
23006c43a217SHans Verkuil 				"cs3308", 0x80 >> 1, NULL);
23016c43a217SHans Verkuil 		/* This cs3308 controls the audio from the onboard header */
23026c43a217SHans Verkuil 		v4l2_i2c_new_subdev(&dev->v4l2_dev,
23036c43a217SHans Verkuil 				&dev->i2c_bus[0].i2c_adap,
23046c43a217SHans Verkuil 				"cs3308", 0x82 >> 1, NULL);
23056c43a217SHans Verkuil 		break;
23066c43a217SHans Verkuil 	}
23076c43a217SHans Verkuil 
2308b285192aSMauro Carvalho Chehab 	/* AUX-PLL 27MHz CLK */
2309b285192aSMauro Carvalho Chehab 	switch (dev->board) {
2310b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
2311b285192aSMauro Carvalho Chehab 		netup_initialize(dev);
2312b285192aSMauro Carvalho Chehab 		break;
2313b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: {
2314b285192aSMauro Carvalho Chehab 		int ret;
2315b285192aSMauro Carvalho Chehab 		const struct firmware *fw;
2316b285192aSMauro Carvalho Chehab 		const char *filename = "dvb-netup-altera-01.fw";
2317b285192aSMauro Carvalho Chehab 		char *action = "configure";
2318b285192aSMauro Carvalho Chehab 		static struct netup_card_info cinfo;
2319b285192aSMauro Carvalho Chehab 		struct altera_config netup_config = {
2320b285192aSMauro Carvalho Chehab 			.dev = dev,
2321b285192aSMauro Carvalho Chehab 			.action = action,
2322b285192aSMauro Carvalho Chehab 			.jtag_io = netup_jtag_io,
2323b285192aSMauro Carvalho Chehab 		};
2324b285192aSMauro Carvalho Chehab 
2325b285192aSMauro Carvalho Chehab 		netup_initialize(dev);
2326b285192aSMauro Carvalho Chehab 
2327b285192aSMauro Carvalho Chehab 		netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo);
2328b285192aSMauro Carvalho Chehab 		if (netup_card_rev)
2329b285192aSMauro Carvalho Chehab 			cinfo.rev = netup_card_rev;
2330b285192aSMauro Carvalho Chehab 
2331b285192aSMauro Carvalho Chehab 		switch (cinfo.rev) {
2332b285192aSMauro Carvalho Chehab 		case 0x4:
2333b285192aSMauro Carvalho Chehab 			filename = "dvb-netup-altera-04.fw";
2334b285192aSMauro Carvalho Chehab 			break;
2335b285192aSMauro Carvalho Chehab 		default:
2336b285192aSMauro Carvalho Chehab 			filename = "dvb-netup-altera-01.fw";
2337b285192aSMauro Carvalho Chehab 			break;
2338b285192aSMauro Carvalho Chehab 		}
2339b285192aSMauro Carvalho Chehab 		printk(KERN_INFO "NetUP card rev=0x%x fw_filename=%s\n",
2340b285192aSMauro Carvalho Chehab 				cinfo.rev, filename);
2341b285192aSMauro Carvalho Chehab 
2342b285192aSMauro Carvalho Chehab 		ret = request_firmware(&fw, filename, &dev->pci->dev);
2343b285192aSMauro Carvalho Chehab 		if (ret != 0)
234407ab29e1SMauro Carvalho Chehab 			printk(KERN_ERR "did not find the firmware file. (%s) Please see linux/Documentation/dvb/ for more details on firmware-problems.",
234507ab29e1SMauro Carvalho Chehab 			       filename);
2346b285192aSMauro Carvalho Chehab 		else
2347b285192aSMauro Carvalho Chehab 			altera_init(&netup_config, fw);
2348b285192aSMauro Carvalho Chehab 
2349b285192aSMauro Carvalho Chehab 		release_firmware(fw);
2350b285192aSMauro Carvalho Chehab 		break;
2351b285192aSMauro Carvalho Chehab 	}
2352b285192aSMauro Carvalho Chehab 	}
2353b285192aSMauro Carvalho Chehab }
2354