1 /* 2 * cx18 init/start/stop/exit stream functions 3 * 4 * Derived from ivtv-streams.c 5 * 6 * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl> 7 * Copyright (C) 2008 Andy Walls <awalls@md.metrocast.net> 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 */ 19 20 #include "cx18-driver.h" 21 #include "cx18-io.h" 22 #include "cx18-fileops.h" 23 #include "cx18-mailbox.h" 24 #include "cx18-i2c.h" 25 #include "cx18-queue.h" 26 #include "cx18-ioctl.h" 27 #include "cx18-streams.h" 28 #include "cx18-cards.h" 29 #include "cx18-scb.h" 30 #include "cx18-dvb.h" 31 32 #define CX18_DSP0_INTERRUPT_MASK 0xd0004C 33 34 static struct v4l2_file_operations cx18_v4l2_enc_fops = { 35 .owner = THIS_MODULE, 36 .read = cx18_v4l2_read, 37 .open = cx18_v4l2_open, 38 .unlocked_ioctl = video_ioctl2, 39 .release = cx18_v4l2_close, 40 .poll = cx18_v4l2_enc_poll, 41 .mmap = cx18_v4l2_mmap, 42 }; 43 44 /* offset from 0 to register ts v4l2 minors on */ 45 #define CX18_V4L2_ENC_TS_OFFSET 16 46 /* offset from 0 to register pcm v4l2 minors on */ 47 #define CX18_V4L2_ENC_PCM_OFFSET 24 48 /* offset from 0 to register yuv v4l2 minors on */ 49 #define CX18_V4L2_ENC_YUV_OFFSET 32 50 51 static struct { 52 const char *name; 53 int vfl_type; 54 int num_offset; 55 int dma; 56 u32 caps; 57 } cx18_stream_info[] = { 58 { /* CX18_ENC_STREAM_TYPE_MPG */ 59 "encoder MPEG", 60 VFL_TYPE_GRABBER, 0, 61 PCI_DMA_FROMDEVICE, 62 V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE | 63 V4L2_CAP_AUDIO | V4L2_CAP_TUNER 64 }, 65 { /* CX18_ENC_STREAM_TYPE_TS */ 66 "TS", 67 VFL_TYPE_GRABBER, -1, 68 PCI_DMA_FROMDEVICE, 69 }, 70 { /* CX18_ENC_STREAM_TYPE_YUV */ 71 "encoder YUV", 72 VFL_TYPE_GRABBER, CX18_V4L2_ENC_YUV_OFFSET, 73 PCI_DMA_FROMDEVICE, 74 V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE | 75 V4L2_CAP_STREAMING | V4L2_CAP_AUDIO | V4L2_CAP_TUNER 76 }, 77 { /* CX18_ENC_STREAM_TYPE_VBI */ 78 "encoder VBI", 79 VFL_TYPE_VBI, 0, 80 PCI_DMA_FROMDEVICE, 81 V4L2_CAP_VBI_CAPTURE | V4L2_CAP_SLICED_VBI_CAPTURE | 82 V4L2_CAP_READWRITE | V4L2_CAP_TUNER 83 }, 84 { /* CX18_ENC_STREAM_TYPE_PCM */ 85 "encoder PCM audio", 86 VFL_TYPE_GRABBER, CX18_V4L2_ENC_PCM_OFFSET, 87 PCI_DMA_FROMDEVICE, 88 V4L2_CAP_TUNER | V4L2_CAP_AUDIO | V4L2_CAP_READWRITE, 89 }, 90 { /* CX18_ENC_STREAM_TYPE_IDX */ 91 "encoder IDX", 92 VFL_TYPE_GRABBER, -1, 93 PCI_DMA_FROMDEVICE, 94 }, 95 { /* CX18_ENC_STREAM_TYPE_RAD */ 96 "encoder radio", 97 VFL_TYPE_RADIO, 0, 98 PCI_DMA_NONE, 99 V4L2_CAP_RADIO | V4L2_CAP_TUNER 100 }, 101 }; 102 103 104 static void cx18_dma_free(struct videobuf_queue *q, 105 struct cx18_stream *s, struct cx18_videobuf_buffer *buf) 106 { 107 videobuf_waiton(q, &buf->vb, 0, 0); 108 videobuf_vmalloc_free(&buf->vb); 109 buf->vb.state = VIDEOBUF_NEEDS_INIT; 110 } 111 112 static int cx18_prepare_buffer(struct videobuf_queue *q, 113 struct cx18_stream *s, 114 struct cx18_videobuf_buffer *buf, 115 u32 pixelformat, 116 unsigned int width, unsigned int height, 117 enum v4l2_field field) 118 { 119 struct cx18 *cx = s->cx; 120 int rc = 0; 121 122 /* check settings */ 123 buf->bytes_used = 0; 124 125 if ((width < 48) || (height < 32)) 126 return -EINVAL; 127 128 buf->vb.size = (width * height * 2); 129 if ((buf->vb.baddr != 0) && (buf->vb.bsize < buf->vb.size)) 130 return -EINVAL; 131 132 /* alloc + fill struct (if changed) */ 133 if (buf->vb.width != width || buf->vb.height != height || 134 buf->vb.field != field || s->pixelformat != pixelformat || 135 buf->tvnorm != cx->std) { 136 137 buf->vb.width = width; 138 buf->vb.height = height; 139 buf->vb.field = field; 140 buf->tvnorm = cx->std; 141 s->pixelformat = pixelformat; 142 143 /* HM12 YUV size is (Y=(h*720) + UV=(h*(720/2))) 144 UYUV YUV size is (Y=(h*720) + UV=(h*(720))) */ 145 if (s->pixelformat == V4L2_PIX_FMT_HM12) 146 s->vb_bytes_per_frame = height * 720 * 3 / 2; 147 else 148 s->vb_bytes_per_frame = height * 720 * 2; 149 cx18_dma_free(q, s, buf); 150 } 151 152 if ((buf->vb.baddr != 0) && (buf->vb.bsize < buf->vb.size)) 153 return -EINVAL; 154 155 if (buf->vb.field == 0) 156 buf->vb.field = V4L2_FIELD_INTERLACED; 157 158 if (VIDEOBUF_NEEDS_INIT == buf->vb.state) { 159 buf->vb.width = width; 160 buf->vb.height = height; 161 buf->vb.field = field; 162 buf->tvnorm = cx->std; 163 s->pixelformat = pixelformat; 164 165 /* HM12 YUV size is (Y=(h*720) + UV=(h*(720/2))) 166 UYUV YUV size is (Y=(h*720) + UV=(h*(720))) */ 167 if (s->pixelformat == V4L2_PIX_FMT_HM12) 168 s->vb_bytes_per_frame = height * 720 * 3 / 2; 169 else 170 s->vb_bytes_per_frame = height * 720 * 2; 171 rc = videobuf_iolock(q, &buf->vb, NULL); 172 if (rc != 0) 173 goto fail; 174 } 175 buf->vb.state = VIDEOBUF_PREPARED; 176 return 0; 177 178 fail: 179 cx18_dma_free(q, s, buf); 180 return rc; 181 182 } 183 184 /* VB_MIN_BUFSIZE is lcm(1440 * 480, 1440 * 576) 185 1440 is a single line of 4:2:2 YUV at 720 luma samples wide 186 */ 187 #define VB_MIN_BUFFERS 32 188 #define VB_MIN_BUFSIZE 4147200 189 190 static int buffer_setup(struct videobuf_queue *q, 191 unsigned int *count, unsigned int *size) 192 { 193 struct cx18_stream *s = q->priv_data; 194 struct cx18 *cx = s->cx; 195 196 *size = 2 * cx->cxhdl.width * cx->cxhdl.height; 197 if (*count == 0) 198 *count = VB_MIN_BUFFERS; 199 200 while (*size * *count > VB_MIN_BUFFERS * VB_MIN_BUFSIZE) 201 (*count)--; 202 203 q->field = V4L2_FIELD_INTERLACED; 204 q->last = V4L2_FIELD_INTERLACED; 205 206 return 0; 207 } 208 209 static int buffer_prepare(struct videobuf_queue *q, 210 struct videobuf_buffer *vb, 211 enum v4l2_field field) 212 { 213 struct cx18_videobuf_buffer *buf = 214 container_of(vb, struct cx18_videobuf_buffer, vb); 215 struct cx18_stream *s = q->priv_data; 216 struct cx18 *cx = s->cx; 217 218 return cx18_prepare_buffer(q, s, buf, s->pixelformat, 219 cx->cxhdl.width, cx->cxhdl.height, field); 220 } 221 222 static void buffer_release(struct videobuf_queue *q, 223 struct videobuf_buffer *vb) 224 { 225 struct cx18_videobuf_buffer *buf = 226 container_of(vb, struct cx18_videobuf_buffer, vb); 227 struct cx18_stream *s = q->priv_data; 228 229 cx18_dma_free(q, s, buf); 230 } 231 232 static void buffer_queue(struct videobuf_queue *q, struct videobuf_buffer *vb) 233 { 234 struct cx18_videobuf_buffer *buf = 235 container_of(vb, struct cx18_videobuf_buffer, vb); 236 struct cx18_stream *s = q->priv_data; 237 238 buf->vb.state = VIDEOBUF_QUEUED; 239 240 list_add_tail(&buf->vb.queue, &s->vb_capture); 241 } 242 243 static struct videobuf_queue_ops cx18_videobuf_qops = { 244 .buf_setup = buffer_setup, 245 .buf_prepare = buffer_prepare, 246 .buf_queue = buffer_queue, 247 .buf_release = buffer_release, 248 }; 249 250 static void cx18_stream_init(struct cx18 *cx, int type) 251 { 252 struct cx18_stream *s = &cx->streams[type]; 253 254 memset(s, 0, sizeof(*s)); 255 256 /* initialize cx18_stream fields */ 257 s->dvb = NULL; 258 s->cx = cx; 259 s->type = type; 260 s->name = cx18_stream_info[type].name; 261 s->handle = CX18_INVALID_TASK_HANDLE; 262 263 s->dma = cx18_stream_info[type].dma; 264 s->v4l2_dev_caps = cx18_stream_info[type].caps; 265 s->buffers = cx->stream_buffers[type]; 266 s->buf_size = cx->stream_buf_size[type]; 267 INIT_LIST_HEAD(&s->buf_pool); 268 s->bufs_per_mdl = 1; 269 s->mdl_size = s->buf_size * s->bufs_per_mdl; 270 271 init_waitqueue_head(&s->waitq); 272 s->id = -1; 273 spin_lock_init(&s->q_free.lock); 274 cx18_queue_init(&s->q_free); 275 spin_lock_init(&s->q_busy.lock); 276 cx18_queue_init(&s->q_busy); 277 spin_lock_init(&s->q_full.lock); 278 cx18_queue_init(&s->q_full); 279 spin_lock_init(&s->q_idle.lock); 280 cx18_queue_init(&s->q_idle); 281 282 INIT_WORK(&s->out_work_order, cx18_out_work_handler); 283 284 INIT_LIST_HEAD(&s->vb_capture); 285 s->vb_timeout.function = cx18_vb_timeout; 286 s->vb_timeout.data = (unsigned long)s; 287 init_timer(&s->vb_timeout); 288 spin_lock_init(&s->vb_lock); 289 if (type == CX18_ENC_STREAM_TYPE_YUV) { 290 spin_lock_init(&s->vbuf_q_lock); 291 292 s->vb_type = V4L2_BUF_TYPE_VIDEO_CAPTURE; 293 videobuf_queue_vmalloc_init(&s->vbuf_q, &cx18_videobuf_qops, 294 &cx->pci_dev->dev, &s->vbuf_q_lock, 295 V4L2_BUF_TYPE_VIDEO_CAPTURE, 296 V4L2_FIELD_INTERLACED, 297 sizeof(struct cx18_videobuf_buffer), 298 s, &cx->serialize_lock); 299 300 /* Assume the previous pixel default */ 301 s->pixelformat = V4L2_PIX_FMT_HM12; 302 s->vb_bytes_per_frame = cx->cxhdl.height * 720 * 3 / 2; 303 s->vb_bytes_per_line = 720; 304 } 305 } 306 307 static int cx18_prep_dev(struct cx18 *cx, int type) 308 { 309 struct cx18_stream *s = &cx->streams[type]; 310 u32 cap = cx->v4l2_cap; 311 int num_offset = cx18_stream_info[type].num_offset; 312 int num = cx->instance + cx18_first_minor + num_offset; 313 314 /* 315 * These five fields are always initialized. 316 * For analog capture related streams, if video_dev.v4l2_dev == NULL then the 317 * stream is not in use. 318 * For the TS stream, if dvb == NULL then the stream is not in use. 319 * In those cases no other fields but these four can be used. 320 */ 321 s->video_dev.v4l2_dev = NULL; 322 s->dvb = NULL; 323 s->cx = cx; 324 s->type = type; 325 s->name = cx18_stream_info[type].name; 326 327 /* Check whether the radio is supported */ 328 if (type == CX18_ENC_STREAM_TYPE_RAD && !(cap & V4L2_CAP_RADIO)) 329 return 0; 330 331 /* Check whether VBI is supported */ 332 if (type == CX18_ENC_STREAM_TYPE_VBI && 333 !(cap & (V4L2_CAP_VBI_CAPTURE | V4L2_CAP_SLICED_VBI_CAPTURE))) 334 return 0; 335 336 /* User explicitly selected 0 buffers for these streams, so don't 337 create them. */ 338 if (cx18_stream_info[type].dma != PCI_DMA_NONE && 339 cx->stream_buffers[type] == 0) { 340 CX18_INFO("Disabled %s device\n", cx18_stream_info[type].name); 341 return 0; 342 } 343 344 cx18_stream_init(cx, type); 345 346 /* Allocate the cx18_dvb struct only for the TS on cards with DTV */ 347 if (type == CX18_ENC_STREAM_TYPE_TS) { 348 if (cx->card->hw_all & CX18_HW_DVB) { 349 s->dvb = kzalloc(sizeof(struct cx18_dvb), GFP_KERNEL); 350 if (s->dvb == NULL) { 351 CX18_ERR("Couldn't allocate cx18_dvb structure for %s\n", 352 s->name); 353 return -ENOMEM; 354 } 355 } else { 356 /* Don't need buffers for the TS, if there is no DVB */ 357 s->buffers = 0; 358 } 359 } 360 361 if (num_offset == -1) 362 return 0; 363 364 /* initialize the v4l2 video device structure */ 365 snprintf(s->video_dev.name, sizeof(s->video_dev.name), "%s %s", 366 cx->v4l2_dev.name, s->name); 367 368 s->video_dev.num = num; 369 s->video_dev.v4l2_dev = &cx->v4l2_dev; 370 s->video_dev.fops = &cx18_v4l2_enc_fops; 371 s->video_dev.release = video_device_release_empty; 372 if (cx->card->video_inputs->video_type == CX18_CARD_INPUT_VID_TUNER) 373 s->video_dev.tvnorms = cx->tuner_std; 374 else 375 s->video_dev.tvnorms = V4L2_STD_ALL; 376 s->video_dev.lock = &cx->serialize_lock; 377 cx18_set_funcs(&s->video_dev); 378 return 0; 379 } 380 381 /* Initialize v4l2 variables and register v4l2 devices */ 382 int cx18_streams_setup(struct cx18 *cx) 383 { 384 int type, ret; 385 386 /* Setup V4L2 Devices */ 387 for (type = 0; type < CX18_MAX_STREAMS; type++) { 388 /* Prepare device */ 389 ret = cx18_prep_dev(cx, type); 390 if (ret < 0) 391 break; 392 393 /* Allocate Stream */ 394 ret = cx18_stream_alloc(&cx->streams[type]); 395 if (ret < 0) 396 break; 397 } 398 if (type == CX18_MAX_STREAMS) 399 return 0; 400 401 /* One or more streams could not be initialized. Clean 'em all up. */ 402 cx18_streams_cleanup(cx, 0); 403 return ret; 404 } 405 406 static int cx18_reg_dev(struct cx18 *cx, int type) 407 { 408 struct cx18_stream *s = &cx->streams[type]; 409 int vfl_type = cx18_stream_info[type].vfl_type; 410 const char *name; 411 int num, ret; 412 413 if (type == CX18_ENC_STREAM_TYPE_TS && s->dvb != NULL) { 414 ret = cx18_dvb_register(s); 415 if (ret < 0) { 416 CX18_ERR("DVB failed to register\n"); 417 return ret; 418 } 419 } 420 421 if (s->video_dev.v4l2_dev == NULL) 422 return 0; 423 424 num = s->video_dev.num; 425 /* card number + user defined offset + device offset */ 426 if (type != CX18_ENC_STREAM_TYPE_MPG) { 427 struct cx18_stream *s_mpg = &cx->streams[CX18_ENC_STREAM_TYPE_MPG]; 428 429 if (s_mpg->video_dev.v4l2_dev) 430 num = s_mpg->video_dev.num 431 + cx18_stream_info[type].num_offset; 432 } 433 video_set_drvdata(&s->video_dev, s); 434 435 /* Register device. First try the desired minor, then any free one. */ 436 ret = video_register_device_no_warn(&s->video_dev, vfl_type, num); 437 if (ret < 0) { 438 CX18_ERR("Couldn't register v4l2 device for %s (device node number %d)\n", 439 s->name, num); 440 s->video_dev.v4l2_dev = NULL; 441 return ret; 442 } 443 444 name = video_device_node_name(&s->video_dev); 445 446 switch (vfl_type) { 447 case VFL_TYPE_GRABBER: 448 CX18_INFO("Registered device %s for %s (%d x %d.%02d kB)\n", 449 name, s->name, cx->stream_buffers[type], 450 cx->stream_buf_size[type] / 1024, 451 (cx->stream_buf_size[type] * 100 / 1024) % 100); 452 break; 453 454 case VFL_TYPE_RADIO: 455 CX18_INFO("Registered device %s for %s\n", name, s->name); 456 break; 457 458 case VFL_TYPE_VBI: 459 if (cx->stream_buffers[type]) 460 CX18_INFO("Registered device %s for %s (%d x %d bytes)\n", 461 name, s->name, cx->stream_buffers[type], 462 cx->stream_buf_size[type]); 463 else 464 CX18_INFO("Registered device %s for %s\n", 465 name, s->name); 466 break; 467 } 468 469 return 0; 470 } 471 472 /* Register v4l2 devices */ 473 int cx18_streams_register(struct cx18 *cx) 474 { 475 int type; 476 int err; 477 int ret = 0; 478 479 /* Register V4L2 devices */ 480 for (type = 0; type < CX18_MAX_STREAMS; type++) { 481 err = cx18_reg_dev(cx, type); 482 if (err && ret == 0) 483 ret = err; 484 } 485 486 if (ret == 0) 487 return 0; 488 489 /* One or more streams could not be initialized. Clean 'em all up. */ 490 cx18_streams_cleanup(cx, 1); 491 return ret; 492 } 493 494 /* Unregister v4l2 devices */ 495 void cx18_streams_cleanup(struct cx18 *cx, int unregister) 496 { 497 struct video_device *vdev; 498 int type; 499 500 /* Teardown all streams */ 501 for (type = 0; type < CX18_MAX_STREAMS; type++) { 502 503 /* The TS has a cx18_dvb structure, not a video_device */ 504 if (type == CX18_ENC_STREAM_TYPE_TS) { 505 if (cx->streams[type].dvb != NULL) { 506 if (unregister) 507 cx18_dvb_unregister(&cx->streams[type]); 508 kfree(cx->streams[type].dvb); 509 cx->streams[type].dvb = NULL; 510 cx18_stream_free(&cx->streams[type]); 511 } 512 continue; 513 } 514 515 /* No struct video_device, but can have buffers allocated */ 516 if (type == CX18_ENC_STREAM_TYPE_IDX) { 517 /* If the module params didn't inhibit IDX ... */ 518 if (cx->stream_buffers[type] != 0) { 519 cx->stream_buffers[type] = 0; 520 /* 521 * Before calling cx18_stream_free(), 522 * check if the IDX stream was actually set up. 523 * Needed, since the cx18_probe() error path 524 * exits through here as well as normal clean up 525 */ 526 if (cx->streams[type].buffers != 0) 527 cx18_stream_free(&cx->streams[type]); 528 } 529 continue; 530 } 531 532 /* If struct video_device exists, can have buffers allocated */ 533 vdev = &cx->streams[type].video_dev; 534 535 if (vdev->v4l2_dev == NULL) 536 continue; 537 538 if (type == CX18_ENC_STREAM_TYPE_YUV) 539 videobuf_mmap_free(&cx->streams[type].vbuf_q); 540 541 cx18_stream_free(&cx->streams[type]); 542 543 video_unregister_device(vdev); 544 } 545 } 546 547 static void cx18_vbi_setup(struct cx18_stream *s) 548 { 549 struct cx18 *cx = s->cx; 550 int raw = cx18_raw_vbi(cx); 551 u32 data[CX2341X_MBOX_MAX_DATA]; 552 int lines; 553 554 if (cx->is_60hz) { 555 cx->vbi.count = 12; 556 cx->vbi.start[0] = 10; 557 cx->vbi.start[1] = 273; 558 } else { /* PAL/SECAM */ 559 cx->vbi.count = 18; 560 cx->vbi.start[0] = 6; 561 cx->vbi.start[1] = 318; 562 } 563 564 /* setup VBI registers */ 565 if (raw) 566 v4l2_subdev_call(cx->sd_av, vbi, s_raw_fmt, &cx->vbi.in.fmt.vbi); 567 else 568 v4l2_subdev_call(cx->sd_av, vbi, s_sliced_fmt, &cx->vbi.in.fmt.sliced); 569 570 /* 571 * Send the CX18_CPU_SET_RAW_VBI_PARAM API command to setup Encoder Raw 572 * VBI when the first analog capture channel starts, as once it starts 573 * (e.g. MPEG), we can't effect any change in the Encoder Raw VBI setup 574 * (i.e. for the VBI capture channels). We also send it for each 575 * analog capture channel anyway just to make sure we get the proper 576 * behavior 577 */ 578 if (raw) { 579 lines = cx->vbi.count * 2; 580 } else { 581 /* 582 * For 525/60 systems, according to the VIP 2 & BT.656 std: 583 * The EAV RP code's Field bit toggles on line 4, a few lines 584 * after the Vertcal Blank bit has already toggled. 585 * Tell the encoder to capture 21-4+1=18 lines per field, 586 * since we want lines 10 through 21. 587 * 588 * For 625/50 systems, according to the VIP 2 & BT.656 std: 589 * The EAV RP code's Field bit toggles on line 1, a few lines 590 * after the Vertcal Blank bit has already toggled. 591 * (We've actually set the digitizer so that the Field bit 592 * toggles on line 2.) Tell the encoder to capture 23-2+1=22 593 * lines per field, since we want lines 6 through 23. 594 */ 595 lines = cx->is_60hz ? (21 - 4 + 1) * 2 : (23 - 2 + 1) * 2; 596 } 597 598 data[0] = s->handle; 599 /* Lines per field */ 600 data[1] = (lines / 2) | ((lines / 2) << 16); 601 /* bytes per line */ 602 data[2] = (raw ? VBI_ACTIVE_SAMPLES 603 : (cx->is_60hz ? VBI_HBLANK_SAMPLES_60HZ 604 : VBI_HBLANK_SAMPLES_50HZ)); 605 /* Every X number of frames a VBI interrupt arrives 606 (frames as in 25 or 30 fps) */ 607 data[3] = 1; 608 /* 609 * Set the SAV/EAV RP codes to look for as start/stop points 610 * when in VIP-1.1 mode 611 */ 612 if (raw) { 613 /* 614 * Start codes for beginning of "active" line in vertical blank 615 * 0x20 ( VerticalBlank ) 616 * 0x60 ( EvenField VerticalBlank ) 617 */ 618 data[4] = 0x20602060; 619 /* 620 * End codes for end of "active" raw lines and regular lines 621 * 0x30 ( VerticalBlank HorizontalBlank) 622 * 0x70 ( EvenField VerticalBlank HorizontalBlank) 623 * 0x90 (Task HorizontalBlank) 624 * 0xd0 (Task EvenField HorizontalBlank) 625 */ 626 data[5] = 0x307090d0; 627 } else { 628 /* 629 * End codes for active video, we want data in the hblank region 630 * 0xb0 (Task 0 VerticalBlank HorizontalBlank) 631 * 0xf0 (Task EvenField VerticalBlank HorizontalBlank) 632 * 633 * Since the V bit is only allowed to toggle in the EAV RP code, 634 * just before the first active region line, these two 635 * are problematic: 636 * 0x90 (Task HorizontalBlank) 637 * 0xd0 (Task EvenField HorizontalBlank) 638 * 639 * We have set the digitzer such that we don't have to worry 640 * about these problem codes. 641 */ 642 data[4] = 0xB0F0B0F0; 643 /* 644 * Start codes for beginning of active line in vertical blank 645 * 0xa0 (Task VerticalBlank ) 646 * 0xe0 (Task EvenField VerticalBlank ) 647 */ 648 data[5] = 0xA0E0A0E0; 649 } 650 651 CX18_DEBUG_INFO("Setup VBI h: %d lines %x bpl %d fr %d %x %x\n", 652 data[0], data[1], data[2], data[3], data[4], data[5]); 653 654 cx18_api(cx, CX18_CPU_SET_RAW_VBI_PARAM, 6, data); 655 } 656 657 void cx18_stream_rotate_idx_mdls(struct cx18 *cx) 658 { 659 struct cx18_stream *s = &cx->streams[CX18_ENC_STREAM_TYPE_IDX]; 660 struct cx18_mdl *mdl; 661 662 if (!cx18_stream_enabled(s)) 663 return; 664 665 /* Return if the firmware is not running low on MDLs */ 666 if ((atomic_read(&s->q_free.depth) + atomic_read(&s->q_busy.depth)) >= 667 CX18_ENC_STREAM_TYPE_IDX_FW_MDL_MIN) 668 return; 669 670 /* Return if there are no MDLs to rotate back to the firmware */ 671 if (atomic_read(&s->q_full.depth) < 2) 672 return; 673 674 /* 675 * Take the oldest IDX MDL still holding data, and discard its index 676 * entries by scheduling the MDL to go back to the firmware 677 */ 678 mdl = cx18_dequeue(s, &s->q_full); 679 if (mdl != NULL) 680 cx18_enqueue(s, mdl, &s->q_free); 681 } 682 683 static 684 struct cx18_queue *_cx18_stream_put_mdl_fw(struct cx18_stream *s, 685 struct cx18_mdl *mdl) 686 { 687 struct cx18 *cx = s->cx; 688 struct cx18_queue *q; 689 690 /* Don't give it to the firmware, if we're not running a capture */ 691 if (s->handle == CX18_INVALID_TASK_HANDLE || 692 test_bit(CX18_F_S_STOPPING, &s->s_flags) || 693 !test_bit(CX18_F_S_STREAMING, &s->s_flags)) 694 return cx18_enqueue(s, mdl, &s->q_free); 695 696 q = cx18_enqueue(s, mdl, &s->q_busy); 697 if (q != &s->q_busy) 698 return q; /* The firmware has the max MDLs it can handle */ 699 700 cx18_mdl_sync_for_device(s, mdl); 701 cx18_vapi(cx, CX18_CPU_DE_SET_MDL, 5, s->handle, 702 (void __iomem *) &cx->scb->cpu_mdl[mdl->id] - cx->enc_mem, 703 s->bufs_per_mdl, mdl->id, s->mdl_size); 704 return q; 705 } 706 707 static 708 void _cx18_stream_load_fw_queue(struct cx18_stream *s) 709 { 710 struct cx18_queue *q; 711 struct cx18_mdl *mdl; 712 713 if (atomic_read(&s->q_free.depth) == 0 || 714 atomic_read(&s->q_busy.depth) >= CX18_MAX_FW_MDLS_PER_STREAM) 715 return; 716 717 /* Move from q_free to q_busy notifying the firmware, until the limit */ 718 do { 719 mdl = cx18_dequeue(s, &s->q_free); 720 if (mdl == NULL) 721 break; 722 q = _cx18_stream_put_mdl_fw(s, mdl); 723 } while (atomic_read(&s->q_busy.depth) < CX18_MAX_FW_MDLS_PER_STREAM 724 && q == &s->q_busy); 725 } 726 727 void cx18_out_work_handler(struct work_struct *work) 728 { 729 struct cx18_stream *s = 730 container_of(work, struct cx18_stream, out_work_order); 731 732 _cx18_stream_load_fw_queue(s); 733 } 734 735 static void cx18_stream_configure_mdls(struct cx18_stream *s) 736 { 737 cx18_unload_queues(s); 738 739 switch (s->type) { 740 case CX18_ENC_STREAM_TYPE_YUV: 741 /* 742 * Height should be a multiple of 32 lines. 743 * Set the MDL size to the exact size needed for one frame. 744 * Use enough buffers per MDL to cover the MDL size 745 */ 746 if (s->pixelformat == V4L2_PIX_FMT_HM12) 747 s->mdl_size = 720 * s->cx->cxhdl.height * 3 / 2; 748 else 749 s->mdl_size = 720 * s->cx->cxhdl.height * 2; 750 s->bufs_per_mdl = s->mdl_size / s->buf_size; 751 if (s->mdl_size % s->buf_size) 752 s->bufs_per_mdl++; 753 break; 754 case CX18_ENC_STREAM_TYPE_VBI: 755 s->bufs_per_mdl = 1; 756 if (cx18_raw_vbi(s->cx)) { 757 s->mdl_size = (s->cx->is_60hz ? 12 : 18) 758 * 2 * VBI_ACTIVE_SAMPLES; 759 } else { 760 /* 761 * See comment in cx18_vbi_setup() below about the 762 * extra lines we capture in sliced VBI mode due to 763 * the lines on which EAV RP codes toggle. 764 */ 765 s->mdl_size = s->cx->is_60hz 766 ? (21 - 4 + 1) * 2 * VBI_HBLANK_SAMPLES_60HZ 767 : (23 - 2 + 1) * 2 * VBI_HBLANK_SAMPLES_50HZ; 768 } 769 break; 770 default: 771 s->bufs_per_mdl = 1; 772 s->mdl_size = s->buf_size * s->bufs_per_mdl; 773 break; 774 } 775 776 cx18_load_queues(s); 777 } 778 779 int cx18_start_v4l2_encode_stream(struct cx18_stream *s) 780 { 781 u32 data[MAX_MB_ARGUMENTS]; 782 struct cx18 *cx = s->cx; 783 int captype = 0; 784 struct cx18_stream *s_idx; 785 786 if (!cx18_stream_enabled(s)) 787 return -EINVAL; 788 789 CX18_DEBUG_INFO("Start encoder stream %s\n", s->name); 790 791 switch (s->type) { 792 case CX18_ENC_STREAM_TYPE_MPG: 793 captype = CAPTURE_CHANNEL_TYPE_MPEG; 794 cx->mpg_data_received = cx->vbi_data_inserted = 0; 795 cx->dualwatch_jiffies = jiffies; 796 cx->dualwatch_stereo_mode = v4l2_ctrl_g_ctrl(cx->cxhdl.audio_mode); 797 cx->search_pack_header = 0; 798 break; 799 800 case CX18_ENC_STREAM_TYPE_IDX: 801 captype = CAPTURE_CHANNEL_TYPE_INDEX; 802 break; 803 case CX18_ENC_STREAM_TYPE_TS: 804 captype = CAPTURE_CHANNEL_TYPE_TS; 805 break; 806 case CX18_ENC_STREAM_TYPE_YUV: 807 captype = CAPTURE_CHANNEL_TYPE_YUV; 808 break; 809 case CX18_ENC_STREAM_TYPE_PCM: 810 captype = CAPTURE_CHANNEL_TYPE_PCM; 811 break; 812 case CX18_ENC_STREAM_TYPE_VBI: 813 #ifdef CX18_ENCODER_PARSES_SLICED 814 captype = cx18_raw_vbi(cx) ? 815 CAPTURE_CHANNEL_TYPE_VBI : CAPTURE_CHANNEL_TYPE_SLICED_VBI; 816 #else 817 /* 818 * Currently we set things up so that Sliced VBI from the 819 * digitizer is handled as Raw VBI by the encoder 820 */ 821 captype = CAPTURE_CHANNEL_TYPE_VBI; 822 #endif 823 cx->vbi.frame = 0; 824 cx->vbi.inserted_frame = 0; 825 memset(cx->vbi.sliced_mpeg_size, 826 0, sizeof(cx->vbi.sliced_mpeg_size)); 827 break; 828 default: 829 return -EINVAL; 830 } 831 832 /* Clear Streamoff flags in case left from last capture */ 833 clear_bit(CX18_F_S_STREAMOFF, &s->s_flags); 834 835 cx18_vapi_result(cx, data, CX18_CREATE_TASK, 1, CPU_CMD_MASK_CAPTURE); 836 s->handle = data[0]; 837 cx18_vapi(cx, CX18_CPU_SET_CHANNEL_TYPE, 2, s->handle, captype); 838 839 /* 840 * For everything but CAPTURE_CHANNEL_TYPE_TS, play it safe and 841 * set up all the parameters, as it is not obvious which parameters the 842 * firmware shares across capture channel types and which it does not. 843 * 844 * Some of the cx18_vapi() calls below apply to only certain capture 845 * channel types. We're hoping there's no harm in calling most of them 846 * anyway, as long as the values are all consistent. Setting some 847 * shared parameters will have no effect once an analog capture channel 848 * has started streaming. 849 */ 850 if (captype != CAPTURE_CHANNEL_TYPE_TS) { 851 cx18_vapi(cx, CX18_CPU_SET_VER_CROP_LINE, 2, s->handle, 0); 852 cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 3, 1); 853 cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 8, 0); 854 cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 4, 1); 855 856 /* 857 * Audio related reset according to 858 * Documentation/video4linux/cx2341x/fw-encoder-api.txt 859 */ 860 if (atomic_read(&cx->ana_capturing) == 0) 861 cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 2, 862 s->handle, 12); 863 864 /* 865 * Number of lines for Field 1 & Field 2 according to 866 * Documentation/video4linux/cx2341x/fw-encoder-api.txt 867 * Field 1 is 312 for 625 line systems in BT.656 868 * Field 2 is 313 for 625 line systems in BT.656 869 */ 870 cx18_vapi(cx, CX18_CPU_SET_CAPTURE_LINE_NO, 3, 871 s->handle, 312, 313); 872 873 if (cx->v4l2_cap & V4L2_CAP_VBI_CAPTURE) 874 cx18_vbi_setup(s); 875 876 /* 877 * Select to receive I, P, and B frame index entries, if the 878 * index stream is enabled. Otherwise disable index entry 879 * generation. 880 */ 881 s_idx = &cx->streams[CX18_ENC_STREAM_TYPE_IDX]; 882 cx18_vapi_result(cx, data, CX18_CPU_SET_INDEXTABLE, 2, 883 s->handle, cx18_stream_enabled(s_idx) ? 7 : 0); 884 885 /* Call out to the common CX2341x API setup for user controls */ 886 cx->cxhdl.priv = s; 887 cx2341x_handler_setup(&cx->cxhdl); 888 889 /* 890 * When starting a capture and we're set for radio, 891 * ensure the video is muted, despite the user control. 892 */ 893 if (!cx->cxhdl.video_mute && 894 test_bit(CX18_F_I_RADIO_USER, &cx->i_flags)) 895 cx18_vapi(cx, CX18_CPU_SET_VIDEO_MUTE, 2, s->handle, 896 (v4l2_ctrl_g_ctrl(cx->cxhdl.video_mute_yuv) << 8) | 1); 897 898 /* Enable the Video Format Converter for UYVY 4:2:2 support, 899 * rather than the default HM12 Macroblovk 4:2:0 support. 900 */ 901 if (captype == CAPTURE_CHANNEL_TYPE_YUV) { 902 if (s->pixelformat == V4L2_PIX_FMT_UYVY) 903 cx18_vapi(cx, CX18_CPU_SET_VFC_PARAM, 2, 904 s->handle, 1); 905 else 906 /* If in doubt, default to HM12 */ 907 cx18_vapi(cx, CX18_CPU_SET_VFC_PARAM, 2, 908 s->handle, 0); 909 } 910 } 911 912 if (atomic_read(&cx->tot_capturing) == 0) { 913 cx2341x_handler_set_busy(&cx->cxhdl, 1); 914 clear_bit(CX18_F_I_EOS, &cx->i_flags); 915 cx18_write_reg(cx, 7, CX18_DSP0_INTERRUPT_MASK); 916 } 917 918 cx18_vapi(cx, CX18_CPU_DE_SET_MDL_ACK, 3, s->handle, 919 (void __iomem *)&cx->scb->cpu_mdl_ack[s->type][0] - cx->enc_mem, 920 (void __iomem *)&cx->scb->cpu_mdl_ack[s->type][1] - cx->enc_mem); 921 922 /* Init all the cpu_mdls for this stream */ 923 cx18_stream_configure_mdls(s); 924 _cx18_stream_load_fw_queue(s); 925 926 /* begin_capture */ 927 if (cx18_vapi(cx, CX18_CPU_CAPTURE_START, 1, s->handle)) { 928 CX18_DEBUG_WARN("Error starting capture!\n"); 929 /* Ensure we're really not capturing before releasing MDLs */ 930 set_bit(CX18_F_S_STOPPING, &s->s_flags); 931 if (s->type == CX18_ENC_STREAM_TYPE_MPG) 932 cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, 1); 933 else 934 cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle); 935 clear_bit(CX18_F_S_STREAMING, &s->s_flags); 936 /* FIXME - CX18_F_S_STREAMOFF as well? */ 937 cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle); 938 cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle); 939 s->handle = CX18_INVALID_TASK_HANDLE; 940 clear_bit(CX18_F_S_STOPPING, &s->s_flags); 941 if (atomic_read(&cx->tot_capturing) == 0) { 942 set_bit(CX18_F_I_EOS, &cx->i_flags); 943 cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK); 944 } 945 return -EINVAL; 946 } 947 948 /* you're live! sit back and await interrupts :) */ 949 if (captype != CAPTURE_CHANNEL_TYPE_TS) 950 atomic_inc(&cx->ana_capturing); 951 atomic_inc(&cx->tot_capturing); 952 return 0; 953 } 954 EXPORT_SYMBOL(cx18_start_v4l2_encode_stream); 955 956 void cx18_stop_all_captures(struct cx18 *cx) 957 { 958 int i; 959 960 for (i = CX18_MAX_STREAMS - 1; i >= 0; i--) { 961 struct cx18_stream *s = &cx->streams[i]; 962 963 if (!cx18_stream_enabled(s)) 964 continue; 965 if (test_bit(CX18_F_S_STREAMING, &s->s_flags)) 966 cx18_stop_v4l2_encode_stream(s, 0); 967 } 968 } 969 970 int cx18_stop_v4l2_encode_stream(struct cx18_stream *s, int gop_end) 971 { 972 struct cx18 *cx = s->cx; 973 974 if (!cx18_stream_enabled(s)) 975 return -EINVAL; 976 977 /* This function assumes that you are allowed to stop the capture 978 and that we are actually capturing */ 979 980 CX18_DEBUG_INFO("Stop Capture\n"); 981 982 if (atomic_read(&cx->tot_capturing) == 0) 983 return 0; 984 985 set_bit(CX18_F_S_STOPPING, &s->s_flags); 986 if (s->type == CX18_ENC_STREAM_TYPE_MPG) 987 cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, !gop_end); 988 else 989 cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle); 990 991 if (s->type == CX18_ENC_STREAM_TYPE_MPG && gop_end) { 992 CX18_INFO("ignoring gop_end: not (yet?) supported by the firmware\n"); 993 } 994 995 if (s->type != CX18_ENC_STREAM_TYPE_TS) 996 atomic_dec(&cx->ana_capturing); 997 atomic_dec(&cx->tot_capturing); 998 999 /* Clear capture and no-read bits */ 1000 clear_bit(CX18_F_S_STREAMING, &s->s_flags); 1001 1002 /* Tell the CX23418 it can't use our buffers anymore */ 1003 cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle); 1004 1005 cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle); 1006 s->handle = CX18_INVALID_TASK_HANDLE; 1007 clear_bit(CX18_F_S_STOPPING, &s->s_flags); 1008 1009 if (atomic_read(&cx->tot_capturing) > 0) 1010 return 0; 1011 1012 cx2341x_handler_set_busy(&cx->cxhdl, 0); 1013 cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK); 1014 wake_up(&s->waitq); 1015 1016 return 0; 1017 } 1018 EXPORT_SYMBOL(cx18_stop_v4l2_encode_stream); 1019 1020 u32 cx18_find_handle(struct cx18 *cx) 1021 { 1022 int i; 1023 1024 /* find first available handle to be used for global settings */ 1025 for (i = 0; i < CX18_MAX_STREAMS; i++) { 1026 struct cx18_stream *s = &cx->streams[i]; 1027 1028 if (s->video_dev.v4l2_dev && (s->handle != CX18_INVALID_TASK_HANDLE)) 1029 return s->handle; 1030 } 1031 return CX18_INVALID_TASK_HANDLE; 1032 } 1033 1034 struct cx18_stream *cx18_handle_to_stream(struct cx18 *cx, u32 handle) 1035 { 1036 int i; 1037 struct cx18_stream *s; 1038 1039 if (handle == CX18_INVALID_TASK_HANDLE) 1040 return NULL; 1041 1042 for (i = 0; i < CX18_MAX_STREAMS; i++) { 1043 s = &cx->streams[i]; 1044 if (s->handle != handle) 1045 continue; 1046 if (cx18_stream_enabled(s)) 1047 return s; 1048 } 1049 return NULL; 1050 } 1051