1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  *  cx18 init/start/stop/exit stream functions
4  *
5  *  Derived from ivtv-streams.c
6  *
7  *  Copyright (C) 2007  Hans Verkuil <hverkuil@xs4all.nl>
8  *  Copyright (C) 2008  Andy Walls <awalls@md.metrocast.net>
9  */
10 
11 #include "cx18-driver.h"
12 #include "cx18-io.h"
13 #include "cx18-fileops.h"
14 #include "cx18-mailbox.h"
15 #include "cx18-i2c.h"
16 #include "cx18-queue.h"
17 #include "cx18-ioctl.h"
18 #include "cx18-streams.h"
19 #include "cx18-cards.h"
20 #include "cx18-scb.h"
21 #include "cx18-dvb.h"
22 
23 #define CX18_DSP0_INTERRUPT_MASK	0xd0004C
24 
25 static const struct v4l2_file_operations cx18_v4l2_enc_fops = {
26 	.owner = THIS_MODULE,
27 	.read = cx18_v4l2_read,
28 	.open = cx18_v4l2_open,
29 	.unlocked_ioctl = video_ioctl2,
30 	.release = cx18_v4l2_close,
31 	.poll = cx18_v4l2_enc_poll,
32 	.mmap = cx18_v4l2_mmap,
33 };
34 
35 /* offset from 0 to register ts v4l2 minors on */
36 #define CX18_V4L2_ENC_TS_OFFSET   16
37 /* offset from 0 to register pcm v4l2 minors on */
38 #define CX18_V4L2_ENC_PCM_OFFSET  24
39 /* offset from 0 to register yuv v4l2 minors on */
40 #define CX18_V4L2_ENC_YUV_OFFSET  32
41 
42 static struct {
43 	const char *name;
44 	int vfl_type;
45 	int num_offset;
46 	int dma;
47 	u32 caps;
48 } cx18_stream_info[] = {
49 	{	/* CX18_ENC_STREAM_TYPE_MPG */
50 		"encoder MPEG",
51 		VFL_TYPE_VIDEO, 0,
52 		DMA_FROM_DEVICE,
53 		V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE |
54 		V4L2_CAP_AUDIO | V4L2_CAP_TUNER
55 	},
56 	{	/* CX18_ENC_STREAM_TYPE_TS */
57 		"TS",
58 		VFL_TYPE_VIDEO, -1,
59 		DMA_FROM_DEVICE,
60 	},
61 	{	/* CX18_ENC_STREAM_TYPE_YUV */
62 		"encoder YUV",
63 		VFL_TYPE_VIDEO, CX18_V4L2_ENC_YUV_OFFSET,
64 		DMA_FROM_DEVICE,
65 		V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE |
66 		V4L2_CAP_STREAMING | V4L2_CAP_AUDIO | V4L2_CAP_TUNER
67 	},
68 	{	/* CX18_ENC_STREAM_TYPE_VBI */
69 		"encoder VBI",
70 		VFL_TYPE_VBI, 0,
71 		DMA_FROM_DEVICE,
72 		V4L2_CAP_VBI_CAPTURE | V4L2_CAP_SLICED_VBI_CAPTURE |
73 		V4L2_CAP_READWRITE | V4L2_CAP_TUNER
74 	},
75 	{	/* CX18_ENC_STREAM_TYPE_PCM */
76 		"encoder PCM audio",
77 		VFL_TYPE_VIDEO, CX18_V4L2_ENC_PCM_OFFSET,
78 		DMA_FROM_DEVICE,
79 		V4L2_CAP_TUNER | V4L2_CAP_AUDIO | V4L2_CAP_READWRITE,
80 	},
81 	{	/* CX18_ENC_STREAM_TYPE_IDX */
82 		"encoder IDX",
83 		VFL_TYPE_VIDEO, -1,
84 		DMA_FROM_DEVICE,
85 	},
86 	{	/* CX18_ENC_STREAM_TYPE_RAD */
87 		"encoder radio",
88 		VFL_TYPE_RADIO, 0,
89 		DMA_NONE,
90 		V4L2_CAP_RADIO | V4L2_CAP_TUNER
91 	},
92 };
93 
94 
95 static void cx18_dma_free(struct videobuf_queue *q,
96 	struct cx18_stream *s, struct cx18_videobuf_buffer *buf)
97 {
98 	videobuf_waiton(q, &buf->vb, 0, 0);
99 	videobuf_vmalloc_free(&buf->vb);
100 	buf->vb.state = VIDEOBUF_NEEDS_INIT;
101 }
102 
103 static int cx18_prepare_buffer(struct videobuf_queue *q,
104 	struct cx18_stream *s,
105 	struct cx18_videobuf_buffer *buf,
106 	u32 pixelformat,
107 	unsigned int width, unsigned int height,
108 	enum v4l2_field field)
109 {
110 	struct cx18 *cx = s->cx;
111 	int rc = 0;
112 
113 	/* check settings */
114 	buf->bytes_used = 0;
115 
116 	if ((width  < 48) || (height < 32))
117 		return -EINVAL;
118 
119 	buf->vb.size = (width * height * 2);
120 	if ((buf->vb.baddr != 0) && (buf->vb.bsize < buf->vb.size))
121 		return -EINVAL;
122 
123 	/* alloc + fill struct (if changed) */
124 	if (buf->vb.width != width || buf->vb.height != height ||
125 	    buf->vb.field != field || s->pixelformat != pixelformat ||
126 	    buf->tvnorm != cx->std) {
127 
128 		buf->vb.width  = width;
129 		buf->vb.height = height;
130 		buf->vb.field  = field;
131 		buf->tvnorm    = cx->std;
132 		s->pixelformat = pixelformat;
133 
134 		/* HM12 YUV size is (Y=(h*720) + UV=(h*(720/2)))
135 		   UYUV YUV size is (Y=(h*720) + UV=(h*(720))) */
136 		if (s->pixelformat == V4L2_PIX_FMT_NV12_16L16)
137 			s->vb_bytes_per_frame = height * 720 * 3 / 2;
138 		else
139 			s->vb_bytes_per_frame = height * 720 * 2;
140 		cx18_dma_free(q, s, buf);
141 	}
142 
143 	if ((buf->vb.baddr != 0) && (buf->vb.bsize < buf->vb.size))
144 		return -EINVAL;
145 
146 	if (buf->vb.field == 0)
147 		buf->vb.field = V4L2_FIELD_INTERLACED;
148 
149 	if (VIDEOBUF_NEEDS_INIT == buf->vb.state) {
150 		buf->vb.width  = width;
151 		buf->vb.height = height;
152 		buf->vb.field  = field;
153 		buf->tvnorm    = cx->std;
154 		s->pixelformat = pixelformat;
155 
156 		/* HM12 YUV size is (Y=(h*720) + UV=(h*(720/2)))
157 		   UYUV YUV size is (Y=(h*720) + UV=(h*(720))) */
158 		if (s->pixelformat == V4L2_PIX_FMT_NV12_16L16)
159 			s->vb_bytes_per_frame = height * 720 * 3 / 2;
160 		else
161 			s->vb_bytes_per_frame = height * 720 * 2;
162 		rc = videobuf_iolock(q, &buf->vb, NULL);
163 		if (rc != 0)
164 			goto fail;
165 	}
166 	buf->vb.state = VIDEOBUF_PREPARED;
167 	return 0;
168 
169 fail:
170 	cx18_dma_free(q, s, buf);
171 	return rc;
172 
173 }
174 
175 /* VB_MIN_BUFSIZE is lcm(1440 * 480, 1440 * 576)
176    1440 is a single line of 4:2:2 YUV at 720 luma samples wide
177 */
178 #define VB_MIN_BUFFERS 32
179 #define VB_MIN_BUFSIZE 4147200
180 
181 static int buffer_setup(struct videobuf_queue *q,
182 	unsigned int *count, unsigned int *size)
183 {
184 	struct cx18_stream *s = q->priv_data;
185 	struct cx18 *cx = s->cx;
186 
187 	*size = 2 * cx->cxhdl.width * cx->cxhdl.height;
188 	if (*count == 0)
189 		*count = VB_MIN_BUFFERS;
190 
191 	while (*size * *count > VB_MIN_BUFFERS * VB_MIN_BUFSIZE)
192 		(*count)--;
193 
194 	q->field = V4L2_FIELD_INTERLACED;
195 	q->last = V4L2_FIELD_INTERLACED;
196 
197 	return 0;
198 }
199 
200 static int buffer_prepare(struct videobuf_queue *q,
201 	struct videobuf_buffer *vb,
202 	enum v4l2_field field)
203 {
204 	struct cx18_videobuf_buffer *buf =
205 		container_of(vb, struct cx18_videobuf_buffer, vb);
206 	struct cx18_stream *s = q->priv_data;
207 	struct cx18 *cx = s->cx;
208 
209 	return cx18_prepare_buffer(q, s, buf, s->pixelformat,
210 		cx->cxhdl.width, cx->cxhdl.height, field);
211 }
212 
213 static void buffer_release(struct videobuf_queue *q,
214 	struct videobuf_buffer *vb)
215 {
216 	struct cx18_videobuf_buffer *buf =
217 		container_of(vb, struct cx18_videobuf_buffer, vb);
218 	struct cx18_stream *s = q->priv_data;
219 
220 	cx18_dma_free(q, s, buf);
221 }
222 
223 static void buffer_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
224 {
225 	struct cx18_videobuf_buffer *buf =
226 		container_of(vb, struct cx18_videobuf_buffer, vb);
227 	struct cx18_stream *s = q->priv_data;
228 
229 	buf->vb.state = VIDEOBUF_QUEUED;
230 
231 	list_add_tail(&buf->vb.queue, &s->vb_capture);
232 }
233 
234 static const struct videobuf_queue_ops cx18_videobuf_qops = {
235 	.buf_setup    = buffer_setup,
236 	.buf_prepare  = buffer_prepare,
237 	.buf_queue    = buffer_queue,
238 	.buf_release  = buffer_release,
239 };
240 
241 static void cx18_stream_init(struct cx18 *cx, int type)
242 {
243 	struct cx18_stream *s = &cx->streams[type];
244 
245 	memset(s, 0, sizeof(*s));
246 
247 	/* initialize cx18_stream fields */
248 	s->dvb = NULL;
249 	s->cx = cx;
250 	s->type = type;
251 	s->name = cx18_stream_info[type].name;
252 	s->handle = CX18_INVALID_TASK_HANDLE;
253 
254 	s->dma = cx18_stream_info[type].dma;
255 	s->v4l2_dev_caps = cx18_stream_info[type].caps;
256 	s->buffers = cx->stream_buffers[type];
257 	s->buf_size = cx->stream_buf_size[type];
258 	INIT_LIST_HEAD(&s->buf_pool);
259 	s->bufs_per_mdl = 1;
260 	s->mdl_size = s->buf_size * s->bufs_per_mdl;
261 
262 	init_waitqueue_head(&s->waitq);
263 	s->id = -1;
264 	spin_lock_init(&s->q_free.lock);
265 	cx18_queue_init(&s->q_free);
266 	spin_lock_init(&s->q_busy.lock);
267 	cx18_queue_init(&s->q_busy);
268 	spin_lock_init(&s->q_full.lock);
269 	cx18_queue_init(&s->q_full);
270 	spin_lock_init(&s->q_idle.lock);
271 	cx18_queue_init(&s->q_idle);
272 
273 	INIT_WORK(&s->out_work_order, cx18_out_work_handler);
274 
275 	INIT_LIST_HEAD(&s->vb_capture);
276 	timer_setup(&s->vb_timeout, cx18_vb_timeout, 0);
277 	spin_lock_init(&s->vb_lock);
278 	if (type == CX18_ENC_STREAM_TYPE_YUV) {
279 		spin_lock_init(&s->vbuf_q_lock);
280 
281 		s->vb_type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
282 		videobuf_queue_vmalloc_init(&s->vbuf_q, &cx18_videobuf_qops,
283 			&cx->pci_dev->dev, &s->vbuf_q_lock,
284 			V4L2_BUF_TYPE_VIDEO_CAPTURE,
285 			V4L2_FIELD_INTERLACED,
286 			sizeof(struct cx18_videobuf_buffer),
287 			s, &cx->serialize_lock);
288 
289 		/* Assume the previous pixel default */
290 		s->pixelformat = V4L2_PIX_FMT_NV12_16L16;
291 		s->vb_bytes_per_frame = cx->cxhdl.height * 720 * 3 / 2;
292 		s->vb_bytes_per_line = 720;
293 	}
294 }
295 
296 static int cx18_prep_dev(struct cx18 *cx, int type)
297 {
298 	struct cx18_stream *s = &cx->streams[type];
299 	u32 cap = cx->v4l2_cap;
300 	int num_offset = cx18_stream_info[type].num_offset;
301 	int num = cx->instance + cx18_first_minor + num_offset;
302 
303 	/*
304 	 * These five fields are always initialized.
305 	 * For analog capture related streams, if video_dev.v4l2_dev == NULL then the
306 	 * stream is not in use.
307 	 * For the TS stream, if dvb == NULL then the stream is not in use.
308 	 * In those cases no other fields but these four can be used.
309 	 */
310 	s->video_dev.v4l2_dev = NULL;
311 	s->dvb = NULL;
312 	s->cx = cx;
313 	s->type = type;
314 	s->name = cx18_stream_info[type].name;
315 
316 	/* Check whether the radio is supported */
317 	if (type == CX18_ENC_STREAM_TYPE_RAD && !(cap & V4L2_CAP_RADIO))
318 		return 0;
319 
320 	/* Check whether VBI is supported */
321 	if (type == CX18_ENC_STREAM_TYPE_VBI &&
322 	    !(cap & (V4L2_CAP_VBI_CAPTURE | V4L2_CAP_SLICED_VBI_CAPTURE)))
323 		return 0;
324 
325 	/* User explicitly selected 0 buffers for these streams, so don't
326 	   create them. */
327 	if (cx18_stream_info[type].dma != DMA_NONE &&
328 	    cx->stream_buffers[type] == 0) {
329 		CX18_INFO("Disabled %s device\n", cx18_stream_info[type].name);
330 		return 0;
331 	}
332 
333 	cx18_stream_init(cx, type);
334 
335 	/* Allocate the cx18_dvb struct only for the TS on cards with DTV */
336 	if (type == CX18_ENC_STREAM_TYPE_TS) {
337 		if (cx->card->hw_all & CX18_HW_DVB) {
338 			s->dvb = kzalloc(sizeof(struct cx18_dvb), GFP_KERNEL);
339 			if (s->dvb == NULL) {
340 				CX18_ERR("Couldn't allocate cx18_dvb structure for %s\n",
341 					 s->name);
342 				return -ENOMEM;
343 			}
344 		} else {
345 			/* Don't need buffers for the TS, if there is no DVB */
346 			s->buffers = 0;
347 		}
348 	}
349 
350 	if (num_offset == -1)
351 		return 0;
352 
353 	/* initialize the v4l2 video device structure */
354 	snprintf(s->video_dev.name, sizeof(s->video_dev.name), "%s %s",
355 		 cx->v4l2_dev.name, s->name);
356 
357 	s->video_dev.num = num;
358 	s->video_dev.v4l2_dev = &cx->v4l2_dev;
359 	s->video_dev.fops = &cx18_v4l2_enc_fops;
360 	s->video_dev.release = video_device_release_empty;
361 	if (cx->card->video_inputs->video_type == CX18_CARD_INPUT_VID_TUNER)
362 		s->video_dev.tvnorms = cx->tuner_std;
363 	else
364 		s->video_dev.tvnorms = V4L2_STD_ALL;
365 	s->video_dev.lock = &cx->serialize_lock;
366 	cx18_set_funcs(&s->video_dev);
367 	return 0;
368 }
369 
370 /* Initialize v4l2 variables and register v4l2 devices */
371 int cx18_streams_setup(struct cx18 *cx)
372 {
373 	int type, ret;
374 
375 	/* Setup V4L2 Devices */
376 	for (type = 0; type < CX18_MAX_STREAMS; type++) {
377 		/* Prepare device */
378 		ret = cx18_prep_dev(cx, type);
379 		if (ret < 0)
380 			break;
381 
382 		/* Allocate Stream */
383 		ret = cx18_stream_alloc(&cx->streams[type]);
384 		if (ret < 0)
385 			break;
386 	}
387 	if (type == CX18_MAX_STREAMS)
388 		return 0;
389 
390 	/* One or more streams could not be initialized. Clean 'em all up. */
391 	cx18_streams_cleanup(cx, 0);
392 	return ret;
393 }
394 
395 static int cx18_reg_dev(struct cx18 *cx, int type)
396 {
397 	struct cx18_stream *s = &cx->streams[type];
398 	int vfl_type = cx18_stream_info[type].vfl_type;
399 	const char *name;
400 	int num, ret;
401 
402 	if (type == CX18_ENC_STREAM_TYPE_TS && s->dvb != NULL) {
403 		ret = cx18_dvb_register(s);
404 		if (ret < 0) {
405 			CX18_ERR("DVB failed to register\n");
406 			return ret;
407 		}
408 	}
409 
410 	if (s->video_dev.v4l2_dev == NULL)
411 		return 0;
412 
413 	num = s->video_dev.num;
414 	s->video_dev.device_caps = s->v4l2_dev_caps;	/* device capabilities */
415 	/* card number + user defined offset + device offset */
416 	if (type != CX18_ENC_STREAM_TYPE_MPG) {
417 		struct cx18_stream *s_mpg = &cx->streams[CX18_ENC_STREAM_TYPE_MPG];
418 
419 		if (s_mpg->video_dev.v4l2_dev)
420 			num = s_mpg->video_dev.num
421 			    + cx18_stream_info[type].num_offset;
422 	}
423 	video_set_drvdata(&s->video_dev, s);
424 
425 	/* Register device. First try the desired minor, then any free one. */
426 	ret = video_register_device_no_warn(&s->video_dev, vfl_type, num);
427 	if (ret < 0) {
428 		CX18_ERR("Couldn't register v4l2 device for %s (device node number %d)\n",
429 			s->name, num);
430 		s->video_dev.v4l2_dev = NULL;
431 		return ret;
432 	}
433 
434 	name = video_device_node_name(&s->video_dev);
435 
436 	switch (vfl_type) {
437 	case VFL_TYPE_VIDEO:
438 		CX18_INFO("Registered device %s for %s (%d x %d.%02d kB)\n",
439 			  name, s->name, cx->stream_buffers[type],
440 			  cx->stream_buf_size[type] / 1024,
441 			  (cx->stream_buf_size[type] * 100 / 1024) % 100);
442 		break;
443 
444 	case VFL_TYPE_RADIO:
445 		CX18_INFO("Registered device %s for %s\n", name, s->name);
446 		break;
447 
448 	case VFL_TYPE_VBI:
449 		if (cx->stream_buffers[type])
450 			CX18_INFO("Registered device %s for %s (%d x %d bytes)\n",
451 				  name, s->name, cx->stream_buffers[type],
452 				  cx->stream_buf_size[type]);
453 		else
454 			CX18_INFO("Registered device %s for %s\n",
455 				name, s->name);
456 		break;
457 	}
458 
459 	return 0;
460 }
461 
462 /* Register v4l2 devices */
463 int cx18_streams_register(struct cx18 *cx)
464 {
465 	int type;
466 	int err;
467 	int ret = 0;
468 
469 	/* Register V4L2 devices */
470 	for (type = 0; type < CX18_MAX_STREAMS; type++) {
471 		err = cx18_reg_dev(cx, type);
472 		if (err && ret == 0)
473 			ret = err;
474 	}
475 
476 	if (ret == 0)
477 		return 0;
478 
479 	/* One or more streams could not be initialized. Clean 'em all up. */
480 	cx18_streams_cleanup(cx, 1);
481 	return ret;
482 }
483 
484 /* Unregister v4l2 devices */
485 void cx18_streams_cleanup(struct cx18 *cx, int unregister)
486 {
487 	struct video_device *vdev;
488 	int type;
489 
490 	/* Teardown all streams */
491 	for (type = 0; type < CX18_MAX_STREAMS; type++) {
492 
493 		/* The TS has a cx18_dvb structure, not a video_device */
494 		if (type == CX18_ENC_STREAM_TYPE_TS) {
495 			if (cx->streams[type].dvb != NULL) {
496 				if (unregister)
497 					cx18_dvb_unregister(&cx->streams[type]);
498 				kfree(cx->streams[type].dvb);
499 				cx->streams[type].dvb = NULL;
500 				cx18_stream_free(&cx->streams[type]);
501 			}
502 			continue;
503 		}
504 
505 		/* No struct video_device, but can have buffers allocated */
506 		if (type == CX18_ENC_STREAM_TYPE_IDX) {
507 			/* If the module params didn't inhibit IDX ... */
508 			if (cx->stream_buffers[type] != 0) {
509 				cx->stream_buffers[type] = 0;
510 				/*
511 				 * Before calling cx18_stream_free(),
512 				 * check if the IDX stream was actually set up.
513 				 * Needed, since the cx18_probe() error path
514 				 * exits through here as well as normal clean up
515 				 */
516 				if (cx->streams[type].buffers != 0)
517 					cx18_stream_free(&cx->streams[type]);
518 			}
519 			continue;
520 		}
521 
522 		/* If struct video_device exists, can have buffers allocated */
523 		vdev = &cx->streams[type].video_dev;
524 
525 		if (vdev->v4l2_dev == NULL)
526 			continue;
527 
528 		if (type == CX18_ENC_STREAM_TYPE_YUV)
529 			videobuf_mmap_free(&cx->streams[type].vbuf_q);
530 
531 		cx18_stream_free(&cx->streams[type]);
532 
533 		video_unregister_device(vdev);
534 	}
535 }
536 
537 static void cx18_vbi_setup(struct cx18_stream *s)
538 {
539 	struct cx18 *cx = s->cx;
540 	int raw = cx18_raw_vbi(cx);
541 	u32 data[CX2341X_MBOX_MAX_DATA];
542 	int lines;
543 
544 	if (cx->is_60hz) {
545 		cx->vbi.count = 12;
546 		cx->vbi.start[0] = 10;
547 		cx->vbi.start[1] = 273;
548 	} else {        /* PAL/SECAM */
549 		cx->vbi.count = 18;
550 		cx->vbi.start[0] = 6;
551 		cx->vbi.start[1] = 318;
552 	}
553 
554 	/* setup VBI registers */
555 	if (raw)
556 		v4l2_subdev_call(cx->sd_av, vbi, s_raw_fmt, &cx->vbi.in.fmt.vbi);
557 	else
558 		v4l2_subdev_call(cx->sd_av, vbi, s_sliced_fmt, &cx->vbi.in.fmt.sliced);
559 
560 	/*
561 	 * Send the CX18_CPU_SET_RAW_VBI_PARAM API command to setup Encoder Raw
562 	 * VBI when the first analog capture channel starts, as once it starts
563 	 * (e.g. MPEG), we can't effect any change in the Encoder Raw VBI setup
564 	 * (i.e. for the VBI capture channels).  We also send it for each
565 	 * analog capture channel anyway just to make sure we get the proper
566 	 * behavior
567 	 */
568 	if (raw) {
569 		lines = cx->vbi.count * 2;
570 	} else {
571 		/*
572 		 * For 525/60 systems, according to the VIP 2 & BT.656 std:
573 		 * The EAV RP code's Field bit toggles on line 4, a few lines
574 		 * after the Vertcal Blank bit has already toggled.
575 		 * Tell the encoder to capture 21-4+1=18 lines per field,
576 		 * since we want lines 10 through 21.
577 		 *
578 		 * For 625/50 systems, according to the VIP 2 & BT.656 std:
579 		 * The EAV RP code's Field bit toggles on line 1, a few lines
580 		 * after the Vertcal Blank bit has already toggled.
581 		 * (We've actually set the digitizer so that the Field bit
582 		 * toggles on line 2.) Tell the encoder to capture 23-2+1=22
583 		 * lines per field, since we want lines 6 through 23.
584 		 */
585 		lines = cx->is_60hz ? (21 - 4 + 1) * 2 : (23 - 2 + 1) * 2;
586 	}
587 
588 	data[0] = s->handle;
589 	/* Lines per field */
590 	data[1] = (lines / 2) | ((lines / 2) << 16);
591 	/* bytes per line */
592 	data[2] = (raw ? VBI_ACTIVE_SAMPLES
593 		       : (cx->is_60hz ? VBI_HBLANK_SAMPLES_60HZ
594 				      : VBI_HBLANK_SAMPLES_50HZ));
595 	/* Every X number of frames a VBI interrupt arrives
596 	   (frames as in 25 or 30 fps) */
597 	data[3] = 1;
598 	/*
599 	 * Set the SAV/EAV RP codes to look for as start/stop points
600 	 * when in VIP-1.1 mode
601 	 */
602 	if (raw) {
603 		/*
604 		 * Start codes for beginning of "active" line in vertical blank
605 		 * 0x20 (               VerticalBlank                )
606 		 * 0x60 (     EvenField VerticalBlank                )
607 		 */
608 		data[4] = 0x20602060;
609 		/*
610 		 * End codes for end of "active" raw lines and regular lines
611 		 * 0x30 (               VerticalBlank HorizontalBlank)
612 		 * 0x70 (     EvenField VerticalBlank HorizontalBlank)
613 		 * 0x90 (Task                         HorizontalBlank)
614 		 * 0xd0 (Task EvenField               HorizontalBlank)
615 		 */
616 		data[5] = 0x307090d0;
617 	} else {
618 		/*
619 		 * End codes for active video, we want data in the hblank region
620 		 * 0xb0 (Task         0 VerticalBlank HorizontalBlank)
621 		 * 0xf0 (Task EvenField VerticalBlank HorizontalBlank)
622 		 *
623 		 * Since the V bit is only allowed to toggle in the EAV RP code,
624 		 * just before the first active region line, these two
625 		 * are problematic:
626 		 * 0x90 (Task                         HorizontalBlank)
627 		 * 0xd0 (Task EvenField               HorizontalBlank)
628 		 *
629 		 * We have set the digitzer such that we don't have to worry
630 		 * about these problem codes.
631 		 */
632 		data[4] = 0xB0F0B0F0;
633 		/*
634 		 * Start codes for beginning of active line in vertical blank
635 		 * 0xa0 (Task           VerticalBlank                )
636 		 * 0xe0 (Task EvenField VerticalBlank                )
637 		 */
638 		data[5] = 0xA0E0A0E0;
639 	}
640 
641 	CX18_DEBUG_INFO("Setup VBI h: %d lines %x bpl %d fr %d %x %x\n",
642 			data[0], data[1], data[2], data[3], data[4], data[5]);
643 
644 	cx18_api(cx, CX18_CPU_SET_RAW_VBI_PARAM, 6, data);
645 }
646 
647 void cx18_stream_rotate_idx_mdls(struct cx18 *cx)
648 {
649 	struct cx18_stream *s = &cx->streams[CX18_ENC_STREAM_TYPE_IDX];
650 	struct cx18_mdl *mdl;
651 
652 	if (!cx18_stream_enabled(s))
653 		return;
654 
655 	/* Return if the firmware is not running low on MDLs */
656 	if ((atomic_read(&s->q_free.depth) + atomic_read(&s->q_busy.depth)) >=
657 					    CX18_ENC_STREAM_TYPE_IDX_FW_MDL_MIN)
658 		return;
659 
660 	/* Return if there are no MDLs to rotate back to the firmware */
661 	if (atomic_read(&s->q_full.depth) < 2)
662 		return;
663 
664 	/*
665 	 * Take the oldest IDX MDL still holding data, and discard its index
666 	 * entries by scheduling the MDL to go back to the firmware
667 	 */
668 	mdl = cx18_dequeue(s, &s->q_full);
669 	if (mdl != NULL)
670 		cx18_enqueue(s, mdl, &s->q_free);
671 }
672 
673 static
674 struct cx18_queue *_cx18_stream_put_mdl_fw(struct cx18_stream *s,
675 					   struct cx18_mdl *mdl)
676 {
677 	struct cx18 *cx = s->cx;
678 	struct cx18_queue *q;
679 
680 	/* Don't give it to the firmware, if we're not running a capture */
681 	if (s->handle == CX18_INVALID_TASK_HANDLE ||
682 	    test_bit(CX18_F_S_STOPPING, &s->s_flags) ||
683 	    !test_bit(CX18_F_S_STREAMING, &s->s_flags))
684 		return cx18_enqueue(s, mdl, &s->q_free);
685 
686 	q = cx18_enqueue(s, mdl, &s->q_busy);
687 	if (q != &s->q_busy)
688 		return q; /* The firmware has the max MDLs it can handle */
689 
690 	cx18_mdl_sync_for_device(s, mdl);
691 	cx18_vapi(cx, CX18_CPU_DE_SET_MDL, 5, s->handle,
692 		  (void __iomem *) &cx->scb->cpu_mdl[mdl->id] - cx->enc_mem,
693 		  s->bufs_per_mdl, mdl->id, s->mdl_size);
694 	return q;
695 }
696 
697 static
698 void _cx18_stream_load_fw_queue(struct cx18_stream *s)
699 {
700 	struct cx18_queue *q;
701 	struct cx18_mdl *mdl;
702 
703 	if (atomic_read(&s->q_free.depth) == 0 ||
704 	    atomic_read(&s->q_busy.depth) >= CX18_MAX_FW_MDLS_PER_STREAM)
705 		return;
706 
707 	/* Move from q_free to q_busy notifying the firmware, until the limit */
708 	do {
709 		mdl = cx18_dequeue(s, &s->q_free);
710 		if (mdl == NULL)
711 			break;
712 		q = _cx18_stream_put_mdl_fw(s, mdl);
713 	} while (atomic_read(&s->q_busy.depth) < CX18_MAX_FW_MDLS_PER_STREAM
714 		 && q == &s->q_busy);
715 }
716 
717 void cx18_out_work_handler(struct work_struct *work)
718 {
719 	struct cx18_stream *s =
720 			 container_of(work, struct cx18_stream, out_work_order);
721 
722 	_cx18_stream_load_fw_queue(s);
723 }
724 
725 static void cx18_stream_configure_mdls(struct cx18_stream *s)
726 {
727 	cx18_unload_queues(s);
728 
729 	switch (s->type) {
730 	case CX18_ENC_STREAM_TYPE_YUV:
731 		/*
732 		 * Height should be a multiple of 32 lines.
733 		 * Set the MDL size to the exact size needed for one frame.
734 		 * Use enough buffers per MDL to cover the MDL size
735 		 */
736 		if (s->pixelformat == V4L2_PIX_FMT_NV12_16L16)
737 			s->mdl_size = 720 * s->cx->cxhdl.height * 3 / 2;
738 		else
739 			s->mdl_size = 720 * s->cx->cxhdl.height * 2;
740 		s->bufs_per_mdl = s->mdl_size / s->buf_size;
741 		if (s->mdl_size % s->buf_size)
742 			s->bufs_per_mdl++;
743 		break;
744 	case CX18_ENC_STREAM_TYPE_VBI:
745 		s->bufs_per_mdl = 1;
746 		if  (cx18_raw_vbi(s->cx)) {
747 			s->mdl_size = (s->cx->is_60hz ? 12 : 18)
748 						       * 2 * VBI_ACTIVE_SAMPLES;
749 		} else {
750 			/*
751 			 * See comment in cx18_vbi_setup() below about the
752 			 * extra lines we capture in sliced VBI mode due to
753 			 * the lines on which EAV RP codes toggle.
754 			*/
755 			s->mdl_size = s->cx->is_60hz
756 				   ? (21 - 4 + 1) * 2 * VBI_HBLANK_SAMPLES_60HZ
757 				   : (23 - 2 + 1) * 2 * VBI_HBLANK_SAMPLES_50HZ;
758 		}
759 		break;
760 	default:
761 		s->bufs_per_mdl = 1;
762 		s->mdl_size = s->buf_size * s->bufs_per_mdl;
763 		break;
764 	}
765 
766 	cx18_load_queues(s);
767 }
768 
769 int cx18_start_v4l2_encode_stream(struct cx18_stream *s)
770 {
771 	u32 data[MAX_MB_ARGUMENTS];
772 	struct cx18 *cx = s->cx;
773 	int captype = 0;
774 	struct cx18_stream *s_idx;
775 
776 	if (!cx18_stream_enabled(s))
777 		return -EINVAL;
778 
779 	CX18_DEBUG_INFO("Start encoder stream %s\n", s->name);
780 
781 	switch (s->type) {
782 	case CX18_ENC_STREAM_TYPE_MPG:
783 		captype = CAPTURE_CHANNEL_TYPE_MPEG;
784 		cx->mpg_data_received = cx->vbi_data_inserted = 0;
785 		cx->dualwatch_jiffies = jiffies;
786 		cx->dualwatch_stereo_mode = v4l2_ctrl_g_ctrl(cx->cxhdl.audio_mode);
787 		cx->search_pack_header = 0;
788 		break;
789 
790 	case CX18_ENC_STREAM_TYPE_IDX:
791 		captype = CAPTURE_CHANNEL_TYPE_INDEX;
792 		break;
793 	case CX18_ENC_STREAM_TYPE_TS:
794 		captype = CAPTURE_CHANNEL_TYPE_TS;
795 		break;
796 	case CX18_ENC_STREAM_TYPE_YUV:
797 		captype = CAPTURE_CHANNEL_TYPE_YUV;
798 		break;
799 	case CX18_ENC_STREAM_TYPE_PCM:
800 		captype = CAPTURE_CHANNEL_TYPE_PCM;
801 		break;
802 	case CX18_ENC_STREAM_TYPE_VBI:
803 #ifdef CX18_ENCODER_PARSES_SLICED
804 		captype = cx18_raw_vbi(cx) ?
805 		     CAPTURE_CHANNEL_TYPE_VBI : CAPTURE_CHANNEL_TYPE_SLICED_VBI;
806 #else
807 		/*
808 		 * Currently we set things up so that Sliced VBI from the
809 		 * digitizer is handled as Raw VBI by the encoder
810 		 */
811 		captype = CAPTURE_CHANNEL_TYPE_VBI;
812 #endif
813 		cx->vbi.frame = 0;
814 		cx->vbi.inserted_frame = 0;
815 		memset(cx->vbi.sliced_mpeg_size,
816 			0, sizeof(cx->vbi.sliced_mpeg_size));
817 		break;
818 	default:
819 		return -EINVAL;
820 	}
821 
822 	/* Clear Streamoff flags in case left from last capture */
823 	clear_bit(CX18_F_S_STREAMOFF, &s->s_flags);
824 
825 	cx18_vapi_result(cx, data, CX18_CREATE_TASK, 1, CPU_CMD_MASK_CAPTURE);
826 	s->handle = data[0];
827 	cx18_vapi(cx, CX18_CPU_SET_CHANNEL_TYPE, 2, s->handle, captype);
828 
829 	/*
830 	 * For everything but CAPTURE_CHANNEL_TYPE_TS, play it safe and
831 	 * set up all the parameters, as it is not obvious which parameters the
832 	 * firmware shares across capture channel types and which it does not.
833 	 *
834 	 * Some of the cx18_vapi() calls below apply to only certain capture
835 	 * channel types.  We're hoping there's no harm in calling most of them
836 	 * anyway, as long as the values are all consistent.  Setting some
837 	 * shared parameters will have no effect once an analog capture channel
838 	 * has started streaming.
839 	 */
840 	if (captype != CAPTURE_CHANNEL_TYPE_TS) {
841 		cx18_vapi(cx, CX18_CPU_SET_VER_CROP_LINE, 2, s->handle, 0);
842 		cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 3, 1);
843 		cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 8, 0);
844 		cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 4, 1);
845 
846 		/*
847 		 * Audio related reset according to
848 		 * Documentation/driver-api/media/drivers/cx2341x-devel.rst
849 		 */
850 		if (atomic_read(&cx->ana_capturing) == 0)
851 			cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 2,
852 				  s->handle, 12);
853 
854 		/*
855 		 * Number of lines for Field 1 & Field 2 according to
856 		 * Documentation/driver-api/media/drivers/cx2341x-devel.rst
857 		 * Field 1 is 312 for 625 line systems in BT.656
858 		 * Field 2 is 313 for 625 line systems in BT.656
859 		 */
860 		cx18_vapi(cx, CX18_CPU_SET_CAPTURE_LINE_NO, 3,
861 			  s->handle, 312, 313);
862 
863 		if (cx->v4l2_cap & V4L2_CAP_VBI_CAPTURE)
864 			cx18_vbi_setup(s);
865 
866 		/*
867 		 * Select to receive I, P, and B frame index entries, if the
868 		 * index stream is enabled.  Otherwise disable index entry
869 		 * generation.
870 		 */
871 		s_idx = &cx->streams[CX18_ENC_STREAM_TYPE_IDX];
872 		cx18_vapi_result(cx, data, CX18_CPU_SET_INDEXTABLE, 2,
873 				 s->handle, cx18_stream_enabled(s_idx) ? 7 : 0);
874 
875 		/* Call out to the common CX2341x API setup for user controls */
876 		cx->cxhdl.priv = s;
877 		cx2341x_handler_setup(&cx->cxhdl);
878 
879 		/*
880 		 * When starting a capture and we're set for radio,
881 		 * ensure the video is muted, despite the user control.
882 		 */
883 		if (!cx->cxhdl.video_mute &&
884 		    test_bit(CX18_F_I_RADIO_USER, &cx->i_flags))
885 			cx18_vapi(cx, CX18_CPU_SET_VIDEO_MUTE, 2, s->handle,
886 			  (v4l2_ctrl_g_ctrl(cx->cxhdl.video_mute_yuv) << 8) | 1);
887 
888 		/* Enable the Video Format Converter for UYVY 4:2:2 support,
889 		 * rather than the default HM12 Macroblovk 4:2:0 support.
890 		 */
891 		if (captype == CAPTURE_CHANNEL_TYPE_YUV) {
892 			if (s->pixelformat == V4L2_PIX_FMT_UYVY)
893 				cx18_vapi(cx, CX18_CPU_SET_VFC_PARAM, 2,
894 					s->handle, 1);
895 			else
896 				/* If in doubt, default to HM12 */
897 				cx18_vapi(cx, CX18_CPU_SET_VFC_PARAM, 2,
898 					s->handle, 0);
899 		}
900 	}
901 
902 	if (atomic_read(&cx->tot_capturing) == 0) {
903 		cx2341x_handler_set_busy(&cx->cxhdl, 1);
904 		clear_bit(CX18_F_I_EOS, &cx->i_flags);
905 		cx18_write_reg(cx, 7, CX18_DSP0_INTERRUPT_MASK);
906 	}
907 
908 	cx18_vapi(cx, CX18_CPU_DE_SET_MDL_ACK, 3, s->handle,
909 		(void __iomem *)&cx->scb->cpu_mdl_ack[s->type][0] - cx->enc_mem,
910 		(void __iomem *)&cx->scb->cpu_mdl_ack[s->type][1] - cx->enc_mem);
911 
912 	/* Init all the cpu_mdls for this stream */
913 	cx18_stream_configure_mdls(s);
914 	_cx18_stream_load_fw_queue(s);
915 
916 	/* begin_capture */
917 	if (cx18_vapi(cx, CX18_CPU_CAPTURE_START, 1, s->handle)) {
918 		CX18_DEBUG_WARN("Error starting capture!\n");
919 		/* Ensure we're really not capturing before releasing MDLs */
920 		set_bit(CX18_F_S_STOPPING, &s->s_flags);
921 		if (s->type == CX18_ENC_STREAM_TYPE_MPG)
922 			cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, 1);
923 		else
924 			cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle);
925 		clear_bit(CX18_F_S_STREAMING, &s->s_flags);
926 		/* FIXME - CX18_F_S_STREAMOFF as well? */
927 		cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle);
928 		cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle);
929 		s->handle = CX18_INVALID_TASK_HANDLE;
930 		clear_bit(CX18_F_S_STOPPING, &s->s_flags);
931 		if (atomic_read(&cx->tot_capturing) == 0) {
932 			set_bit(CX18_F_I_EOS, &cx->i_flags);
933 			cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK);
934 		}
935 		return -EINVAL;
936 	}
937 
938 	/* you're live! sit back and await interrupts :) */
939 	if (captype != CAPTURE_CHANNEL_TYPE_TS)
940 		atomic_inc(&cx->ana_capturing);
941 	atomic_inc(&cx->tot_capturing);
942 	return 0;
943 }
944 EXPORT_SYMBOL(cx18_start_v4l2_encode_stream);
945 
946 void cx18_stop_all_captures(struct cx18 *cx)
947 {
948 	int i;
949 
950 	for (i = CX18_MAX_STREAMS - 1; i >= 0; i--) {
951 		struct cx18_stream *s = &cx->streams[i];
952 
953 		if (!cx18_stream_enabled(s))
954 			continue;
955 		if (test_bit(CX18_F_S_STREAMING, &s->s_flags))
956 			cx18_stop_v4l2_encode_stream(s, 0);
957 	}
958 }
959 
960 int cx18_stop_v4l2_encode_stream(struct cx18_stream *s, int gop_end)
961 {
962 	struct cx18 *cx = s->cx;
963 
964 	if (!cx18_stream_enabled(s))
965 		return -EINVAL;
966 
967 	/* This function assumes that you are allowed to stop the capture
968 	   and that we are actually capturing */
969 
970 	CX18_DEBUG_INFO("Stop Capture\n");
971 
972 	if (atomic_read(&cx->tot_capturing) == 0)
973 		return 0;
974 
975 	set_bit(CX18_F_S_STOPPING, &s->s_flags);
976 	if (s->type == CX18_ENC_STREAM_TYPE_MPG)
977 		cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, !gop_end);
978 	else
979 		cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle);
980 
981 	if (s->type == CX18_ENC_STREAM_TYPE_MPG && gop_end) {
982 		CX18_INFO("ignoring gop_end: not (yet?) supported by the firmware\n");
983 	}
984 
985 	if (s->type != CX18_ENC_STREAM_TYPE_TS)
986 		atomic_dec(&cx->ana_capturing);
987 	atomic_dec(&cx->tot_capturing);
988 
989 	/* Clear capture and no-read bits */
990 	clear_bit(CX18_F_S_STREAMING, &s->s_flags);
991 
992 	/* Tell the CX23418 it can't use our buffers anymore */
993 	cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle);
994 
995 	cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle);
996 	s->handle = CX18_INVALID_TASK_HANDLE;
997 	clear_bit(CX18_F_S_STOPPING, &s->s_flags);
998 
999 	if (atomic_read(&cx->tot_capturing) > 0)
1000 		return 0;
1001 
1002 	cx2341x_handler_set_busy(&cx->cxhdl, 0);
1003 	cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK);
1004 	wake_up(&s->waitq);
1005 
1006 	return 0;
1007 }
1008 EXPORT_SYMBOL(cx18_stop_v4l2_encode_stream);
1009 
1010 u32 cx18_find_handle(struct cx18 *cx)
1011 {
1012 	int i;
1013 
1014 	/* find first available handle to be used for global settings */
1015 	for (i = 0; i < CX18_MAX_STREAMS; i++) {
1016 		struct cx18_stream *s = &cx->streams[i];
1017 
1018 		if (s->video_dev.v4l2_dev && (s->handle != CX18_INVALID_TASK_HANDLE))
1019 			return s->handle;
1020 	}
1021 	return CX18_INVALID_TASK_HANDLE;
1022 }
1023 
1024 struct cx18_stream *cx18_handle_to_stream(struct cx18 *cx, u32 handle)
1025 {
1026 	int i;
1027 	struct cx18_stream *s;
1028 
1029 	if (handle == CX18_INVALID_TASK_HANDLE)
1030 		return NULL;
1031 
1032 	for (i = 0; i < CX18_MAX_STREAMS; i++) {
1033 		s = &cx->streams[i];
1034 		if (s->handle != handle)
1035 			continue;
1036 		if (cx18_stream_enabled(s))
1037 			return s;
1038 	}
1039 	return NULL;
1040 }
1041