1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * cx18 System Control Block initialization 4 * 5 * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl> 6 * Copyright (C) 2008 Andy Walls <awalls@md.metrocast.net> 7 */ 8 9 #include "cx18-driver.h" 10 #include "cx18-io.h" 11 #include "cx18-scb.h" 12 13 void cx18_init_scb(struct cx18 *cx) 14 { 15 cx18_setup_page(cx, SCB_OFFSET); 16 cx18_memset_io(cx, cx->scb, 0, 0x10000); 17 18 cx18_writel(cx, IRQ_APU_TO_CPU, &cx->scb->apu2cpu_irq); 19 cx18_writel(cx, IRQ_CPU_TO_APU_ACK, &cx->scb->cpu2apu_irq_ack); 20 cx18_writel(cx, IRQ_HPU_TO_CPU, &cx->scb->hpu2cpu_irq); 21 cx18_writel(cx, IRQ_CPU_TO_HPU_ACK, &cx->scb->cpu2hpu_irq_ack); 22 cx18_writel(cx, IRQ_PPU_TO_CPU, &cx->scb->ppu2cpu_irq); 23 cx18_writel(cx, IRQ_CPU_TO_PPU_ACK, &cx->scb->cpu2ppu_irq_ack); 24 cx18_writel(cx, IRQ_EPU_TO_CPU, &cx->scb->epu2cpu_irq); 25 cx18_writel(cx, IRQ_CPU_TO_EPU_ACK, &cx->scb->cpu2epu_irq_ack); 26 27 cx18_writel(cx, IRQ_CPU_TO_APU, &cx->scb->cpu2apu_irq); 28 cx18_writel(cx, IRQ_APU_TO_CPU_ACK, &cx->scb->apu2cpu_irq_ack); 29 cx18_writel(cx, IRQ_HPU_TO_APU, &cx->scb->hpu2apu_irq); 30 cx18_writel(cx, IRQ_APU_TO_HPU_ACK, &cx->scb->apu2hpu_irq_ack); 31 cx18_writel(cx, IRQ_PPU_TO_APU, &cx->scb->ppu2apu_irq); 32 cx18_writel(cx, IRQ_APU_TO_PPU_ACK, &cx->scb->apu2ppu_irq_ack); 33 cx18_writel(cx, IRQ_EPU_TO_APU, &cx->scb->epu2apu_irq); 34 cx18_writel(cx, IRQ_APU_TO_EPU_ACK, &cx->scb->apu2epu_irq_ack); 35 36 cx18_writel(cx, IRQ_CPU_TO_HPU, &cx->scb->cpu2hpu_irq); 37 cx18_writel(cx, IRQ_HPU_TO_CPU_ACK, &cx->scb->hpu2cpu_irq_ack); 38 cx18_writel(cx, IRQ_APU_TO_HPU, &cx->scb->apu2hpu_irq); 39 cx18_writel(cx, IRQ_HPU_TO_APU_ACK, &cx->scb->hpu2apu_irq_ack); 40 cx18_writel(cx, IRQ_PPU_TO_HPU, &cx->scb->ppu2hpu_irq); 41 cx18_writel(cx, IRQ_HPU_TO_PPU_ACK, &cx->scb->hpu2ppu_irq_ack); 42 cx18_writel(cx, IRQ_EPU_TO_HPU, &cx->scb->epu2hpu_irq); 43 cx18_writel(cx, IRQ_HPU_TO_EPU_ACK, &cx->scb->hpu2epu_irq_ack); 44 45 cx18_writel(cx, IRQ_CPU_TO_PPU, &cx->scb->cpu2ppu_irq); 46 cx18_writel(cx, IRQ_PPU_TO_CPU_ACK, &cx->scb->ppu2cpu_irq_ack); 47 cx18_writel(cx, IRQ_APU_TO_PPU, &cx->scb->apu2ppu_irq); 48 cx18_writel(cx, IRQ_PPU_TO_APU_ACK, &cx->scb->ppu2apu_irq_ack); 49 cx18_writel(cx, IRQ_HPU_TO_PPU, &cx->scb->hpu2ppu_irq); 50 cx18_writel(cx, IRQ_PPU_TO_HPU_ACK, &cx->scb->ppu2hpu_irq_ack); 51 cx18_writel(cx, IRQ_EPU_TO_PPU, &cx->scb->epu2ppu_irq); 52 cx18_writel(cx, IRQ_PPU_TO_EPU_ACK, &cx->scb->ppu2epu_irq_ack); 53 54 cx18_writel(cx, IRQ_CPU_TO_EPU, &cx->scb->cpu2epu_irq); 55 cx18_writel(cx, IRQ_EPU_TO_CPU_ACK, &cx->scb->epu2cpu_irq_ack); 56 cx18_writel(cx, IRQ_APU_TO_EPU, &cx->scb->apu2epu_irq); 57 cx18_writel(cx, IRQ_EPU_TO_APU_ACK, &cx->scb->epu2apu_irq_ack); 58 cx18_writel(cx, IRQ_HPU_TO_EPU, &cx->scb->hpu2epu_irq); 59 cx18_writel(cx, IRQ_EPU_TO_HPU_ACK, &cx->scb->epu2hpu_irq_ack); 60 cx18_writel(cx, IRQ_PPU_TO_EPU, &cx->scb->ppu2epu_irq); 61 cx18_writel(cx, IRQ_EPU_TO_PPU_ACK, &cx->scb->epu2ppu_irq_ack); 62 63 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, apu2cpu_mb), 64 &cx->scb->apu2cpu_mb_offset); 65 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, hpu2cpu_mb), 66 &cx->scb->hpu2cpu_mb_offset); 67 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, ppu2cpu_mb), 68 &cx->scb->ppu2cpu_mb_offset); 69 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, epu2cpu_mb), 70 &cx->scb->epu2cpu_mb_offset); 71 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, cpu2apu_mb), 72 &cx->scb->cpu2apu_mb_offset); 73 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, hpu2apu_mb), 74 &cx->scb->hpu2apu_mb_offset); 75 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, ppu2apu_mb), 76 &cx->scb->ppu2apu_mb_offset); 77 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, epu2apu_mb), 78 &cx->scb->epu2apu_mb_offset); 79 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, cpu2hpu_mb), 80 &cx->scb->cpu2hpu_mb_offset); 81 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, apu2hpu_mb), 82 &cx->scb->apu2hpu_mb_offset); 83 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, ppu2hpu_mb), 84 &cx->scb->ppu2hpu_mb_offset); 85 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, epu2hpu_mb), 86 &cx->scb->epu2hpu_mb_offset); 87 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, cpu2ppu_mb), 88 &cx->scb->cpu2ppu_mb_offset); 89 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, apu2ppu_mb), 90 &cx->scb->apu2ppu_mb_offset); 91 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, hpu2ppu_mb), 92 &cx->scb->hpu2ppu_mb_offset); 93 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, epu2ppu_mb), 94 &cx->scb->epu2ppu_mb_offset); 95 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, cpu2epu_mb), 96 &cx->scb->cpu2epu_mb_offset); 97 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, apu2epu_mb), 98 &cx->scb->apu2epu_mb_offset); 99 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, hpu2epu_mb), 100 &cx->scb->hpu2epu_mb_offset); 101 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, ppu2epu_mb), 102 &cx->scb->ppu2epu_mb_offset); 103 104 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, cpu_state), 105 &cx->scb->ipc_offset); 106 107 cx18_writel(cx, 1, &cx->scb->epu_state); 108 } 109