1 /* 2 * cx18 System Control Block initialization 3 * 4 * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl> 5 * Copyright (C) 2008 Andy Walls <awalls@md.metrocast.net> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 20 * 02111-1307 USA 21 */ 22 23 #include "cx18-driver.h" 24 #include "cx18-io.h" 25 #include "cx18-scb.h" 26 27 void cx18_init_scb(struct cx18 *cx) 28 { 29 cx18_setup_page(cx, SCB_OFFSET); 30 cx18_memset_io(cx, cx->scb, 0, 0x10000); 31 32 cx18_writel(cx, IRQ_APU_TO_CPU, &cx->scb->apu2cpu_irq); 33 cx18_writel(cx, IRQ_CPU_TO_APU_ACK, &cx->scb->cpu2apu_irq_ack); 34 cx18_writel(cx, IRQ_HPU_TO_CPU, &cx->scb->hpu2cpu_irq); 35 cx18_writel(cx, IRQ_CPU_TO_HPU_ACK, &cx->scb->cpu2hpu_irq_ack); 36 cx18_writel(cx, IRQ_PPU_TO_CPU, &cx->scb->ppu2cpu_irq); 37 cx18_writel(cx, IRQ_CPU_TO_PPU_ACK, &cx->scb->cpu2ppu_irq_ack); 38 cx18_writel(cx, IRQ_EPU_TO_CPU, &cx->scb->epu2cpu_irq); 39 cx18_writel(cx, IRQ_CPU_TO_EPU_ACK, &cx->scb->cpu2epu_irq_ack); 40 41 cx18_writel(cx, IRQ_CPU_TO_APU, &cx->scb->cpu2apu_irq); 42 cx18_writel(cx, IRQ_APU_TO_CPU_ACK, &cx->scb->apu2cpu_irq_ack); 43 cx18_writel(cx, IRQ_HPU_TO_APU, &cx->scb->hpu2apu_irq); 44 cx18_writel(cx, IRQ_APU_TO_HPU_ACK, &cx->scb->apu2hpu_irq_ack); 45 cx18_writel(cx, IRQ_PPU_TO_APU, &cx->scb->ppu2apu_irq); 46 cx18_writel(cx, IRQ_APU_TO_PPU_ACK, &cx->scb->apu2ppu_irq_ack); 47 cx18_writel(cx, IRQ_EPU_TO_APU, &cx->scb->epu2apu_irq); 48 cx18_writel(cx, IRQ_APU_TO_EPU_ACK, &cx->scb->apu2epu_irq_ack); 49 50 cx18_writel(cx, IRQ_CPU_TO_HPU, &cx->scb->cpu2hpu_irq); 51 cx18_writel(cx, IRQ_HPU_TO_CPU_ACK, &cx->scb->hpu2cpu_irq_ack); 52 cx18_writel(cx, IRQ_APU_TO_HPU, &cx->scb->apu2hpu_irq); 53 cx18_writel(cx, IRQ_HPU_TO_APU_ACK, &cx->scb->hpu2apu_irq_ack); 54 cx18_writel(cx, IRQ_PPU_TO_HPU, &cx->scb->ppu2hpu_irq); 55 cx18_writel(cx, IRQ_HPU_TO_PPU_ACK, &cx->scb->hpu2ppu_irq_ack); 56 cx18_writel(cx, IRQ_EPU_TO_HPU, &cx->scb->epu2hpu_irq); 57 cx18_writel(cx, IRQ_HPU_TO_EPU_ACK, &cx->scb->hpu2epu_irq_ack); 58 59 cx18_writel(cx, IRQ_CPU_TO_PPU, &cx->scb->cpu2ppu_irq); 60 cx18_writel(cx, IRQ_PPU_TO_CPU_ACK, &cx->scb->ppu2cpu_irq_ack); 61 cx18_writel(cx, IRQ_APU_TO_PPU, &cx->scb->apu2ppu_irq); 62 cx18_writel(cx, IRQ_PPU_TO_APU_ACK, &cx->scb->ppu2apu_irq_ack); 63 cx18_writel(cx, IRQ_HPU_TO_PPU, &cx->scb->hpu2ppu_irq); 64 cx18_writel(cx, IRQ_PPU_TO_HPU_ACK, &cx->scb->ppu2hpu_irq_ack); 65 cx18_writel(cx, IRQ_EPU_TO_PPU, &cx->scb->epu2ppu_irq); 66 cx18_writel(cx, IRQ_PPU_TO_EPU_ACK, &cx->scb->ppu2epu_irq_ack); 67 68 cx18_writel(cx, IRQ_CPU_TO_EPU, &cx->scb->cpu2epu_irq); 69 cx18_writel(cx, IRQ_EPU_TO_CPU_ACK, &cx->scb->epu2cpu_irq_ack); 70 cx18_writel(cx, IRQ_APU_TO_EPU, &cx->scb->apu2epu_irq); 71 cx18_writel(cx, IRQ_EPU_TO_APU_ACK, &cx->scb->epu2apu_irq_ack); 72 cx18_writel(cx, IRQ_HPU_TO_EPU, &cx->scb->hpu2epu_irq); 73 cx18_writel(cx, IRQ_EPU_TO_HPU_ACK, &cx->scb->epu2hpu_irq_ack); 74 cx18_writel(cx, IRQ_PPU_TO_EPU, &cx->scb->ppu2epu_irq); 75 cx18_writel(cx, IRQ_EPU_TO_PPU_ACK, &cx->scb->epu2ppu_irq_ack); 76 77 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, apu2cpu_mb), 78 &cx->scb->apu2cpu_mb_offset); 79 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, hpu2cpu_mb), 80 &cx->scb->hpu2cpu_mb_offset); 81 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, ppu2cpu_mb), 82 &cx->scb->ppu2cpu_mb_offset); 83 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, epu2cpu_mb), 84 &cx->scb->epu2cpu_mb_offset); 85 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, cpu2apu_mb), 86 &cx->scb->cpu2apu_mb_offset); 87 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, hpu2apu_mb), 88 &cx->scb->hpu2apu_mb_offset); 89 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, ppu2apu_mb), 90 &cx->scb->ppu2apu_mb_offset); 91 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, epu2apu_mb), 92 &cx->scb->epu2apu_mb_offset); 93 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, cpu2hpu_mb), 94 &cx->scb->cpu2hpu_mb_offset); 95 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, apu2hpu_mb), 96 &cx->scb->apu2hpu_mb_offset); 97 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, ppu2hpu_mb), 98 &cx->scb->ppu2hpu_mb_offset); 99 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, epu2hpu_mb), 100 &cx->scb->epu2hpu_mb_offset); 101 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, cpu2ppu_mb), 102 &cx->scb->cpu2ppu_mb_offset); 103 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, apu2ppu_mb), 104 &cx->scb->apu2ppu_mb_offset); 105 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, hpu2ppu_mb), 106 &cx->scb->hpu2ppu_mb_offset); 107 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, epu2ppu_mb), 108 &cx->scb->epu2ppu_mb_offset); 109 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, cpu2epu_mb), 110 &cx->scb->cpu2epu_mb_offset); 111 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, apu2epu_mb), 112 &cx->scb->apu2epu_mb_offset); 113 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, hpu2epu_mb), 114 &cx->scb->hpu2epu_mb_offset); 115 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, ppu2epu_mb), 116 &cx->scb->ppu2epu_mb_offset); 117 118 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, cpu_state), 119 &cx->scb->ipc_offset); 120 121 cx18_writel(cx, 1, &cx->scb->epu_state); 122 } 123