1 /* 2 * cx18 interrupt handling 3 * 4 * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl> 5 * Copyright (C) 2008 Andy Walls <awalls@md.metrocast.net> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 */ 17 18 #include "cx18-driver.h" 19 #include "cx18-io.h" 20 #include "cx18-irq.h" 21 #include "cx18-mailbox.h" 22 #include "cx18-scb.h" 23 24 static void xpu_ack(struct cx18 *cx, u32 sw2) 25 { 26 if (sw2 & IRQ_CPU_TO_EPU_ACK) 27 wake_up(&cx->mb_cpu_waitq); 28 if (sw2 & IRQ_APU_TO_EPU_ACK) 29 wake_up(&cx->mb_apu_waitq); 30 } 31 32 static void epu_cmd(struct cx18 *cx, u32 sw1) 33 { 34 if (sw1 & IRQ_CPU_TO_EPU) 35 cx18_api_epu_cmd_irq(cx, CPU); 36 if (sw1 & IRQ_APU_TO_EPU) 37 cx18_api_epu_cmd_irq(cx, APU); 38 } 39 40 irqreturn_t cx18_irq_handler(int irq, void *dev_id) 41 { 42 struct cx18 *cx = (struct cx18 *)dev_id; 43 u32 sw1, sw2, hw2; 44 45 sw1 = cx18_read_reg(cx, SW1_INT_STATUS) & cx->sw1_irq_mask; 46 sw2 = cx18_read_reg(cx, SW2_INT_STATUS) & cx->sw2_irq_mask; 47 hw2 = cx18_read_reg(cx, HW2_INT_CLR_STATUS) & cx->hw2_irq_mask; 48 49 if (sw1) 50 cx18_write_reg_expect(cx, sw1, SW1_INT_STATUS, ~sw1, sw1); 51 if (sw2) 52 cx18_write_reg_expect(cx, sw2, SW2_INT_STATUS, ~sw2, sw2); 53 if (hw2) 54 cx18_write_reg_expect(cx, hw2, HW2_INT_CLR_STATUS, ~hw2, hw2); 55 56 if (sw1 || sw2 || hw2) 57 CX18_DEBUG_HI_IRQ("received interrupts SW1: %x SW2: %x HW2: %x\n", 58 sw1, sw2, hw2); 59 60 /* 61 * SW1 responses have to happen first. The sending XPU times out the 62 * incoming mailboxes on us rather rapidly. 63 */ 64 if (sw1) 65 epu_cmd(cx, sw1); 66 67 /* To do: interrupt-based I2C handling 68 if (hw2 & (HW2_I2C1_INT|HW2_I2C2_INT)) { 69 } 70 */ 71 72 if (sw2) 73 xpu_ack(cx, sw2); 74 75 return (sw1 || sw2 || hw2) ? IRQ_HANDLED : IRQ_NONE; 76 } 77