1 /* 2 * cx18 functions for DVB support 3 * 4 * Copyright (c) 2008 Steven Toth <stoth@linuxtv.org> 5 * Copyright (C) 2008 Andy Walls <awalls@md.metrocast.net> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * 16 * GNU General Public License for more details. 17 */ 18 19 #include "cx18-version.h" 20 #include "cx18-dvb.h" 21 #include "cx18-io.h" 22 #include "cx18-queue.h" 23 #include "cx18-streams.h" 24 #include "cx18-cards.h" 25 #include "cx18-gpio.h" 26 #include "s5h1409.h" 27 #include "mxl5005s.h" 28 #include "s5h1411.h" 29 #include "tda18271.h" 30 #include "zl10353.h" 31 32 #include <linux/firmware.h> 33 #include "mt352.h" 34 #include "mt352_priv.h" 35 #include "tuner-xc2028.h" 36 37 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr); 38 39 #define FWFILE "dvb-cx18-mpc718-mt352.fw" 40 41 #define CX18_REG_DMUX_NUM_PORT_0_CONTROL 0xd5a000 42 #define CX18_CLOCK_ENABLE2 0xc71024 43 #define CX18_DMUX_CLK_MASK 0x0080 44 45 /* 46 * CX18_CARD_HVR_1600_ESMT 47 * CX18_CARD_HVR_1600_SAMSUNG 48 */ 49 50 static struct mxl5005s_config hauppauge_hvr1600_tuner = { 51 .i2c_address = 0xC6 >> 1, 52 .if_freq = IF_FREQ_5380000HZ, 53 .xtal_freq = CRYSTAL_FREQ_16000000HZ, 54 .agc_mode = MXL_SINGLE_AGC, 55 .tracking_filter = MXL_TF_C_H, 56 .rssi_enable = MXL_RSSI_ENABLE, 57 .cap_select = MXL_CAP_SEL_ENABLE, 58 .div_out = MXL_DIV_OUT_4, 59 .clock_out = MXL_CLOCK_OUT_DISABLE, 60 .output_load = MXL5005S_IF_OUTPUT_LOAD_200_OHM, 61 .top = MXL5005S_TOP_25P2, 62 .mod_mode = MXL_DIGITAL_MODE, 63 .if_mode = MXL_ZERO_IF, 64 .qam_gain = 0x02, 65 .AgcMasterByte = 0x00, 66 }; 67 68 static struct s5h1409_config hauppauge_hvr1600_config = { 69 .demod_address = 0x32 >> 1, 70 .output_mode = S5H1409_SERIAL_OUTPUT, 71 .gpio = S5H1409_GPIO_ON, 72 .qam_if = 44000, 73 .inversion = S5H1409_INVERSION_OFF, 74 .status_mode = S5H1409_DEMODLOCKING, 75 .mpeg_timing = S5H1409_MPEGTIMING_CONTINUOUS_NONINVERTING_CLOCK, 76 .hvr1600_opt = S5H1409_HVR1600_OPTIMIZE 77 }; 78 79 /* 80 * CX18_CARD_HVR_1600_S5H1411 81 */ 82 static struct s5h1411_config hcw_s5h1411_config = { 83 .output_mode = S5H1411_SERIAL_OUTPUT, 84 .gpio = S5H1411_GPIO_OFF, 85 .vsb_if = S5H1411_IF_44000, 86 .qam_if = S5H1411_IF_4000, 87 .inversion = S5H1411_INVERSION_ON, 88 .status_mode = S5H1411_DEMODLOCKING, 89 .mpeg_timing = S5H1411_MPEGTIMING_CONTINUOUS_NONINVERTING_CLOCK, 90 }; 91 92 static struct tda18271_std_map hauppauge_tda18271_std_map = { 93 .atsc_6 = { .if_freq = 5380, .agc_mode = 3, .std = 3, 94 .if_lvl = 6, .rfagc_top = 0x37 }, 95 .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 0, 96 .if_lvl = 6, .rfagc_top = 0x37 }, 97 }; 98 99 static struct tda18271_config hauppauge_tda18271_config = { 100 .std_map = &hauppauge_tda18271_std_map, 101 .gate = TDA18271_GATE_DIGITAL, 102 .output_opt = TDA18271_OUTPUT_LT_OFF, 103 }; 104 105 /* 106 * CX18_CARD_LEADTEK_DVR3100H 107 */ 108 /* Information/confirmation of proper config values provided by Terry Wu */ 109 static struct zl10353_config leadtek_dvr3100h_demod = { 110 .demod_address = 0x1e >> 1, /* Datasheet suggested straps */ 111 .if2 = 45600, /* 4.560 MHz IF from the XC3028 */ 112 .parallel_ts = 1, /* Not a serial TS */ 113 .no_tuner = 1, /* XC3028 is not behind the gate */ 114 .disable_i2c_gate_ctrl = 1, /* Disable the I2C gate */ 115 }; 116 117 /* 118 * CX18_CARD_YUAN_MPC718 119 */ 120 /* 121 * Due to 122 * 123 * 1. an absence of information on how to prgram the MT352 124 * 2. the Linux mt352 module pushing MT352 initialzation off onto us here 125 * 126 * We have to use an init sequence that *you* must extract from the Windows 127 * driver (yuanrap.sys) and which we load as a firmware. 128 * 129 * If someone can provide me with a Zarlink MT352 (Intel CE6352?) Design Manual 130 * with chip programming details, then I can remove this annoyance. 131 */ 132 static int yuan_mpc718_mt352_reqfw(struct cx18_stream *stream, 133 const struct firmware **fw) 134 { 135 struct cx18 *cx = stream->cx; 136 const char *fn = FWFILE; 137 int ret; 138 139 ret = request_firmware(fw, fn, &cx->pci_dev->dev); 140 if (ret) 141 CX18_ERR("Unable to open firmware file %s\n", fn); 142 else { 143 size_t sz = (*fw)->size; 144 if (sz < 2 || sz > 64 || (sz % 2) != 0) { 145 CX18_ERR("Firmware %s has a bad size: %lu bytes\n", 146 fn, (unsigned long) sz); 147 ret = -EILSEQ; 148 release_firmware(*fw); 149 *fw = NULL; 150 } 151 } 152 153 if (ret) { 154 CX18_ERR("The MPC718 board variant with the MT352 DVB-T demodulator will not work without it\n"); 155 CX18_ERR("Run 'linux/scripts/get_dvb_firmware mpc718' if you need the firmware\n"); 156 } 157 return ret; 158 } 159 160 static int yuan_mpc718_mt352_init(struct dvb_frontend *fe) 161 { 162 struct cx18_dvb *dvb = container_of(fe->dvb, 163 struct cx18_dvb, dvb_adapter); 164 struct cx18_stream *stream = dvb->stream; 165 const struct firmware *fw = NULL; 166 int ret; 167 int i; 168 u8 buf[3]; 169 170 ret = yuan_mpc718_mt352_reqfw(stream, &fw); 171 if (ret) 172 return ret; 173 174 /* Loop through all the register-value pairs in the firmware file */ 175 for (i = 0; i < fw->size; i += 2) { 176 buf[0] = fw->data[i]; 177 /* Intercept a few registers we want to set ourselves */ 178 switch (buf[0]) { 179 case TRL_NOMINAL_RATE_0: 180 /* Set our custom OFDM bandwidth in the case below */ 181 break; 182 case TRL_NOMINAL_RATE_1: 183 /* 6 MHz: 64/7 * 6/8 / 20.48 * 2^16 = 0x55b6.db6 */ 184 /* 7 MHz: 64/7 * 7/8 / 20.48 * 2^16 = 0x6400 */ 185 /* 8 MHz: 64/7 * 8/8 / 20.48 * 2^16 = 0x7249.249 */ 186 buf[1] = 0x72; 187 buf[2] = 0x49; 188 mt352_write(fe, buf, 3); 189 break; 190 case INPUT_FREQ_0: 191 /* Set our custom IF in the case below */ 192 break; 193 case INPUT_FREQ_1: 194 /* 4.56 MHz IF: (20.48 - 4.56)/20.48 * 2^14 = 0x31c0 */ 195 buf[1] = 0x31; 196 buf[2] = 0xc0; 197 mt352_write(fe, buf, 3); 198 break; 199 default: 200 /* Pass through the register-value pair from the fw */ 201 buf[1] = fw->data[i+1]; 202 mt352_write(fe, buf, 2); 203 break; 204 } 205 } 206 207 buf[0] = (u8) TUNER_GO; 208 buf[1] = 0x01; /* Go */ 209 mt352_write(fe, buf, 2); 210 release_firmware(fw); 211 return 0; 212 } 213 214 static struct mt352_config yuan_mpc718_mt352_demod = { 215 .demod_address = 0x1e >> 1, 216 .adc_clock = 20480, /* 20.480 MHz */ 217 .if2 = 4560, /* 4.560 MHz */ 218 .no_tuner = 1, /* XC3028 is not behind the gate */ 219 .demod_init = yuan_mpc718_mt352_init, 220 }; 221 222 static struct zl10353_config yuan_mpc718_zl10353_demod = { 223 .demod_address = 0x1e >> 1, /* Datasheet suggested straps */ 224 .if2 = 45600, /* 4.560 MHz IF from the XC3028 */ 225 .parallel_ts = 1, /* Not a serial TS */ 226 .no_tuner = 1, /* XC3028 is not behind the gate */ 227 .disable_i2c_gate_ctrl = 1, /* Disable the I2C gate */ 228 }; 229 230 static struct zl10353_config gotview_dvd3_zl10353_demod = { 231 .demod_address = 0x1e >> 1, /* Datasheet suggested straps */ 232 .if2 = 45600, /* 4.560 MHz IF from the XC3028 */ 233 .parallel_ts = 1, /* Not a serial TS */ 234 .no_tuner = 1, /* XC3028 is not behind the gate */ 235 .disable_i2c_gate_ctrl = 1, /* Disable the I2C gate */ 236 }; 237 238 static int dvb_register(struct cx18_stream *stream); 239 240 /* Kernel DVB framework calls this when the feed needs to start. 241 * The CX18 framework should enable the transport DMA handling 242 * and queue processing. 243 */ 244 static int cx18_dvb_start_feed(struct dvb_demux_feed *feed) 245 { 246 struct dvb_demux *demux = feed->demux; 247 struct cx18_stream *stream = (struct cx18_stream *) demux->priv; 248 struct cx18 *cx; 249 int ret; 250 u32 v; 251 252 if (!stream) 253 return -EINVAL; 254 255 cx = stream->cx; 256 CX18_DEBUG_INFO("Start feed: pid = 0x%x index = %d\n", 257 feed->pid, feed->index); 258 259 mutex_lock(&cx->serialize_lock); 260 ret = cx18_init_on_first_open(cx); 261 mutex_unlock(&cx->serialize_lock); 262 if (ret) { 263 CX18_ERR("Failed to initialize firmware starting DVB feed\n"); 264 return ret; 265 } 266 ret = -EINVAL; 267 268 switch (cx->card->type) { 269 case CX18_CARD_HVR_1600_ESMT: 270 case CX18_CARD_HVR_1600_SAMSUNG: 271 case CX18_CARD_HVR_1600_S5H1411: 272 v = cx18_read_reg(cx, CX18_REG_DMUX_NUM_PORT_0_CONTROL); 273 v |= 0x00400000; /* Serial Mode */ 274 v |= 0x00002000; /* Data Length - Byte */ 275 v |= 0x00010000; /* Error - Polarity */ 276 v |= 0x00020000; /* Error - Passthru */ 277 v |= 0x000c0000; /* Error - Ignore */ 278 cx18_write_reg(cx, v, CX18_REG_DMUX_NUM_PORT_0_CONTROL); 279 break; 280 281 case CX18_CARD_LEADTEK_DVR3100H: 282 case CX18_CARD_YUAN_MPC718: 283 case CX18_CARD_GOTVIEW_PCI_DVD3: 284 default: 285 /* Assumption - Parallel transport - Signalling 286 * undefined or default. 287 */ 288 break; 289 } 290 291 if (!demux->dmx.frontend) 292 return -EINVAL; 293 294 mutex_lock(&stream->dvb->feedlock); 295 if (stream->dvb->feeding++ == 0) { 296 CX18_DEBUG_INFO("Starting Transport DMA\n"); 297 mutex_lock(&cx->serialize_lock); 298 set_bit(CX18_F_S_STREAMING, &stream->s_flags); 299 ret = cx18_start_v4l2_encode_stream(stream); 300 if (ret < 0) { 301 CX18_DEBUG_INFO("Failed to start Transport DMA\n"); 302 stream->dvb->feeding--; 303 if (stream->dvb->feeding == 0) 304 clear_bit(CX18_F_S_STREAMING, &stream->s_flags); 305 } 306 mutex_unlock(&cx->serialize_lock); 307 } else 308 ret = 0; 309 mutex_unlock(&stream->dvb->feedlock); 310 311 return ret; 312 } 313 314 /* Kernel DVB framework calls this when the feed needs to stop. */ 315 static int cx18_dvb_stop_feed(struct dvb_demux_feed *feed) 316 { 317 struct dvb_demux *demux = feed->demux; 318 struct cx18_stream *stream = (struct cx18_stream *)demux->priv; 319 struct cx18 *cx; 320 int ret = -EINVAL; 321 322 if (stream) { 323 cx = stream->cx; 324 CX18_DEBUG_INFO("Stop feed: pid = 0x%x index = %d\n", 325 feed->pid, feed->index); 326 327 mutex_lock(&stream->dvb->feedlock); 328 if (--stream->dvb->feeding == 0) { 329 CX18_DEBUG_INFO("Stopping Transport DMA\n"); 330 mutex_lock(&cx->serialize_lock); 331 ret = cx18_stop_v4l2_encode_stream(stream, 0); 332 mutex_unlock(&cx->serialize_lock); 333 } else 334 ret = 0; 335 mutex_unlock(&stream->dvb->feedlock); 336 } 337 338 return ret; 339 } 340 341 int cx18_dvb_register(struct cx18_stream *stream) 342 { 343 struct cx18 *cx = stream->cx; 344 struct cx18_dvb *dvb = stream->dvb; 345 struct dvb_adapter *dvb_adapter; 346 struct dvb_demux *dvbdemux; 347 struct dmx_demux *dmx; 348 int ret; 349 350 if (!dvb) 351 return -EINVAL; 352 353 dvb->enabled = 0; 354 dvb->stream = stream; 355 356 ret = dvb_register_adapter(&dvb->dvb_adapter, 357 CX18_DRIVER_NAME, 358 THIS_MODULE, &cx->pci_dev->dev, adapter_nr); 359 if (ret < 0) 360 goto err_out; 361 362 dvb_adapter = &dvb->dvb_adapter; 363 364 dvbdemux = &dvb->demux; 365 366 dvbdemux->priv = (void *)stream; 367 368 dvbdemux->filternum = 256; 369 dvbdemux->feednum = 256; 370 dvbdemux->start_feed = cx18_dvb_start_feed; 371 dvbdemux->stop_feed = cx18_dvb_stop_feed; 372 dvbdemux->dmx.capabilities = (DMX_TS_FILTERING | 373 DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING); 374 ret = dvb_dmx_init(dvbdemux); 375 if (ret < 0) 376 goto err_dvb_unregister_adapter; 377 378 dmx = &dvbdemux->dmx; 379 380 dvb->hw_frontend.source = DMX_FRONTEND_0; 381 dvb->mem_frontend.source = DMX_MEMORY_FE; 382 dvb->dmxdev.filternum = 256; 383 dvb->dmxdev.demux = dmx; 384 385 ret = dvb_dmxdev_init(&dvb->dmxdev, dvb_adapter); 386 if (ret < 0) 387 goto err_dvb_dmx_release; 388 389 ret = dmx->add_frontend(dmx, &dvb->hw_frontend); 390 if (ret < 0) 391 goto err_dvb_dmxdev_release; 392 393 ret = dmx->add_frontend(dmx, &dvb->mem_frontend); 394 if (ret < 0) 395 goto err_remove_hw_frontend; 396 397 ret = dmx->connect_frontend(dmx, &dvb->hw_frontend); 398 if (ret < 0) 399 goto err_remove_mem_frontend; 400 401 ret = dvb_register(stream); 402 if (ret < 0) 403 goto err_disconnect_frontend; 404 405 dvb_net_init(dvb_adapter, &dvb->dvbnet, dmx); 406 407 CX18_INFO("DVB Frontend registered\n"); 408 CX18_INFO("Registered DVB adapter%d for %s (%d x %d.%02d kB)\n", 409 stream->dvb->dvb_adapter.num, stream->name, 410 stream->buffers, stream->buf_size/1024, 411 (stream->buf_size * 100 / 1024) % 100); 412 413 mutex_init(&dvb->feedlock); 414 dvb->enabled = 1; 415 return ret; 416 417 err_disconnect_frontend: 418 dmx->disconnect_frontend(dmx); 419 err_remove_mem_frontend: 420 dmx->remove_frontend(dmx, &dvb->mem_frontend); 421 err_remove_hw_frontend: 422 dmx->remove_frontend(dmx, &dvb->hw_frontend); 423 err_dvb_dmxdev_release: 424 dvb_dmxdev_release(&dvb->dmxdev); 425 err_dvb_dmx_release: 426 dvb_dmx_release(dvbdemux); 427 err_dvb_unregister_adapter: 428 dvb_unregister_adapter(dvb_adapter); 429 err_out: 430 return ret; 431 } 432 433 void cx18_dvb_unregister(struct cx18_stream *stream) 434 { 435 struct cx18 *cx = stream->cx; 436 struct cx18_dvb *dvb = stream->dvb; 437 struct dvb_adapter *dvb_adapter; 438 struct dvb_demux *dvbdemux; 439 struct dmx_demux *dmx; 440 441 CX18_INFO("unregister DVB\n"); 442 443 if (dvb == NULL || !dvb->enabled) 444 return; 445 446 dvb_adapter = &dvb->dvb_adapter; 447 dvbdemux = &dvb->demux; 448 dmx = &dvbdemux->dmx; 449 450 dmx->close(dmx); 451 dvb_net_release(&dvb->dvbnet); 452 dmx->remove_frontend(dmx, &dvb->mem_frontend); 453 dmx->remove_frontend(dmx, &dvb->hw_frontend); 454 dvb_dmxdev_release(&dvb->dmxdev); 455 dvb_dmx_release(dvbdemux); 456 dvb_unregister_frontend(dvb->fe); 457 dvb_frontend_detach(dvb->fe); 458 dvb_unregister_adapter(dvb_adapter); 459 } 460 461 /* All the DVB attach calls go here, this function get's modified 462 * for each new card. cx18_dvb_start_feed() will also need changes. 463 */ 464 static int dvb_register(struct cx18_stream *stream) 465 { 466 struct cx18_dvb *dvb = stream->dvb; 467 struct cx18 *cx = stream->cx; 468 int ret = 0; 469 470 switch (cx->card->type) { 471 case CX18_CARD_HVR_1600_ESMT: 472 case CX18_CARD_HVR_1600_SAMSUNG: 473 dvb->fe = dvb_attach(s5h1409_attach, 474 &hauppauge_hvr1600_config, 475 &cx->i2c_adap[0]); 476 if (dvb->fe != NULL) { 477 dvb_attach(mxl5005s_attach, dvb->fe, 478 &cx->i2c_adap[0], 479 &hauppauge_hvr1600_tuner); 480 ret = 0; 481 } 482 break; 483 case CX18_CARD_HVR_1600_S5H1411: 484 dvb->fe = dvb_attach(s5h1411_attach, 485 &hcw_s5h1411_config, 486 &cx->i2c_adap[0]); 487 if (dvb->fe != NULL) 488 dvb_attach(tda18271_attach, dvb->fe, 489 0x60, &cx->i2c_adap[0], 490 &hauppauge_tda18271_config); 491 break; 492 case CX18_CARD_LEADTEK_DVR3100H: 493 dvb->fe = dvb_attach(zl10353_attach, 494 &leadtek_dvr3100h_demod, 495 &cx->i2c_adap[1]); 496 if (dvb->fe != NULL) { 497 struct dvb_frontend *fe; 498 struct xc2028_config cfg = { 499 .i2c_adap = &cx->i2c_adap[1], 500 .i2c_addr = 0xc2 >> 1, 501 .ctrl = NULL, 502 }; 503 static struct xc2028_ctrl ctrl = { 504 .fname = XC2028_DEFAULT_FIRMWARE, 505 .max_len = 64, 506 .demod = XC3028_FE_ZARLINK456, 507 .type = XC2028_AUTO, 508 }; 509 510 fe = dvb_attach(xc2028_attach, dvb->fe, &cfg); 511 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL) 512 fe->ops.tuner_ops.set_config(fe, &ctrl); 513 } 514 break; 515 case CX18_CARD_YUAN_MPC718: 516 /* 517 * TODO 518 * Apparently, these cards also could instead have a 519 * DiBcom demod supported by one of the db7000 drivers 520 */ 521 dvb->fe = dvb_attach(mt352_attach, 522 &yuan_mpc718_mt352_demod, 523 &cx->i2c_adap[1]); 524 if (dvb->fe == NULL) 525 dvb->fe = dvb_attach(zl10353_attach, 526 &yuan_mpc718_zl10353_demod, 527 &cx->i2c_adap[1]); 528 if (dvb->fe != NULL) { 529 struct dvb_frontend *fe; 530 struct xc2028_config cfg = { 531 .i2c_adap = &cx->i2c_adap[1], 532 .i2c_addr = 0xc2 >> 1, 533 .ctrl = NULL, 534 }; 535 static struct xc2028_ctrl ctrl = { 536 .fname = XC2028_DEFAULT_FIRMWARE, 537 .max_len = 64, 538 .demod = XC3028_FE_ZARLINK456, 539 .type = XC2028_AUTO, 540 }; 541 542 fe = dvb_attach(xc2028_attach, dvb->fe, &cfg); 543 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL) 544 fe->ops.tuner_ops.set_config(fe, &ctrl); 545 } 546 break; 547 case CX18_CARD_GOTVIEW_PCI_DVD3: 548 dvb->fe = dvb_attach(zl10353_attach, 549 &gotview_dvd3_zl10353_demod, 550 &cx->i2c_adap[1]); 551 if (dvb->fe != NULL) { 552 struct dvb_frontend *fe; 553 struct xc2028_config cfg = { 554 .i2c_adap = &cx->i2c_adap[1], 555 .i2c_addr = 0xc2 >> 1, 556 .ctrl = NULL, 557 }; 558 static struct xc2028_ctrl ctrl = { 559 .fname = XC2028_DEFAULT_FIRMWARE, 560 .max_len = 64, 561 .demod = XC3028_FE_ZARLINK456, 562 .type = XC2028_AUTO, 563 }; 564 565 fe = dvb_attach(xc2028_attach, dvb->fe, &cfg); 566 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL) 567 fe->ops.tuner_ops.set_config(fe, &ctrl); 568 } 569 break; 570 default: 571 /* No Digital Tv Support */ 572 break; 573 } 574 575 if (dvb->fe == NULL) { 576 CX18_ERR("frontend initialization failed\n"); 577 return -1; 578 } 579 580 dvb->fe->callback = cx18_reset_tuner_gpio; 581 582 ret = dvb_register_frontend(&dvb->dvb_adapter, dvb->fe); 583 if (ret < 0) { 584 if (dvb->fe->ops.release) 585 dvb->fe->ops.release(dvb->fe); 586 return ret; 587 } 588 589 /* 590 * The firmware seems to enable the TS DMUX clock 591 * under various circumstances. However, since we know we 592 * might use it, let's just turn it on ourselves here. 593 */ 594 cx18_write_reg_expect(cx, 595 (CX18_DMUX_CLK_MASK << 16) | CX18_DMUX_CLK_MASK, 596 CX18_CLOCK_ENABLE2, 597 CX18_DMUX_CLK_MASK, 598 (CX18_DMUX_CLK_MASK << 16) | CX18_DMUX_CLK_MASK); 599 600 return ret; 601 } 602 603 MODULE_FIRMWARE(FWFILE); 604