1 /* 2 * cobalt driver initialization and card probing 3 * 4 * Derived from cx18-driver.c 5 * 6 * Copyright 2012-2015 Cisco Systems, Inc. and/or its affiliates. 7 * All rights reserved. 8 * 9 * This program is free software; you may redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; version 2 of the License. 12 * 13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 14 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 15 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 16 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 17 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 18 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 19 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 20 * SOFTWARE. 21 */ 22 23 #include <linux/delay.h> 24 #include <media/i2c/adv7604.h> 25 #include <media/i2c/adv7842.h> 26 #include <media/i2c/adv7511.h> 27 #include <media/v4l2-event.h> 28 #include <media/v4l2-ctrls.h> 29 30 #include "cobalt-driver.h" 31 #include "cobalt-irq.h" 32 #include "cobalt-i2c.h" 33 #include "cobalt-v4l2.h" 34 #include "cobalt-flash.h" 35 #include "cobalt-alsa.h" 36 #include "cobalt-omnitek.h" 37 38 /* add your revision and whatnot here */ 39 static const struct pci_device_id cobalt_pci_tbl[] = { 40 {PCI_VENDOR_ID_CISCO, PCI_DEVICE_ID_COBALT, 41 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 42 {0,} 43 }; 44 45 MODULE_DEVICE_TABLE(pci, cobalt_pci_tbl); 46 47 static atomic_t cobalt_instance = ATOMIC_INIT(0); 48 49 int cobalt_debug; 50 module_param_named(debug, cobalt_debug, int, 0644); 51 MODULE_PARM_DESC(debug, "Debug level. Default: 0\n"); 52 53 int cobalt_ignore_err; 54 module_param_named(ignore_err, cobalt_ignore_err, int, 0644); 55 MODULE_PARM_DESC(ignore_err, 56 "If set then ignore missing i2c adapters/receivers. Default: 0\n"); 57 58 MODULE_AUTHOR("Hans Verkuil <hans.verkuil@cisco.com> & Morten Hestnes"); 59 MODULE_DESCRIPTION("cobalt driver"); 60 MODULE_LICENSE("GPL"); 61 62 static u8 edid[256] = { 63 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 64 0x50, 0x21, 0x32, 0x27, 0x00, 0x00, 0x00, 0x00, 65 0x22, 0x1a, 0x01, 0x03, 0x80, 0x30, 0x1b, 0x78, 66 0x0f, 0xee, 0x91, 0xa3, 0x54, 0x4c, 0x99, 0x26, 67 0x0f, 0x50, 0x54, 0x2f, 0xcf, 0x00, 0x31, 0x59, 68 0x45, 0x59, 0x61, 0x59, 0x81, 0x99, 0x01, 0x01, 69 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x02, 0x3a, 70 0x80, 0x18, 0x71, 0x38, 0x2d, 0x40, 0x58, 0x2c, 71 0x46, 0x00, 0xe0, 0x0e, 0x11, 0x00, 0x00, 0x1e, 72 0x00, 0x00, 0x00, 0xfd, 0x00, 0x18, 0x55, 0x18, 73 0x5e, 0x11, 0x00, 0x0a, 0x20, 0x20, 0x20, 0x20, 74 0x20, 0x20, 0x00, 0x00, 0x00, 0xfc, 0x00, 0x63, 75 0x6f, 0x62, 0x61, 0x6c, 0x74, 0x0a, 0x20, 0x20, 76 0x20, 0x20, 0x20, 0x20, 0x00, 0x00, 0x00, 0x10, 77 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 78 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x9c, 79 80 0x02, 0x03, 0x1f, 0xf0, 0x4a, 0x90, 0x1f, 0x04, 81 0x13, 0x22, 0x21, 0x20, 0x02, 0x11, 0x01, 0x23, 82 0x09, 0x07, 0x07, 0x68, 0x03, 0x0c, 0x00, 0x10, 83 0x00, 0x00, 0x22, 0x0f, 0xe2, 0x00, 0xea, 0x00, 84 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 85 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 86 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 87 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 88 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 89 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 90 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 91 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 92 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 93 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 94 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 95 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa7, 96 }; 97 98 static void cobalt_set_interrupt(struct cobalt *cobalt, bool enable) 99 { 100 if (enable) { 101 unsigned irqs = COBALT_SYSSTAT_VI0_INT1_MSK | 102 COBALT_SYSSTAT_VI1_INT1_MSK | 103 COBALT_SYSSTAT_VI2_INT1_MSK | 104 COBALT_SYSSTAT_VI3_INT1_MSK | 105 COBALT_SYSSTAT_VI0_INT2_MSK | 106 COBALT_SYSSTAT_VI1_INT2_MSK | 107 COBALT_SYSSTAT_VI2_INT2_MSK | 108 COBALT_SYSSTAT_VI3_INT2_MSK | 109 COBALT_SYSSTAT_VI0_LOST_DATA_MSK | 110 COBALT_SYSSTAT_VI1_LOST_DATA_MSK | 111 COBALT_SYSSTAT_VI2_LOST_DATA_MSK | 112 COBALT_SYSSTAT_VI3_LOST_DATA_MSK | 113 COBALT_SYSSTAT_AUD_IN_LOST_DATA_MSK; 114 115 if (cobalt->have_hsma_rx) 116 irqs |= COBALT_SYSSTAT_VIHSMA_INT1_MSK | 117 COBALT_SYSSTAT_VIHSMA_INT2_MSK | 118 COBALT_SYSSTAT_VIHSMA_LOST_DATA_MSK; 119 120 if (cobalt->have_hsma_tx) 121 irqs |= COBALT_SYSSTAT_VOHSMA_INT1_MSK | 122 COBALT_SYSSTAT_VOHSMA_LOST_DATA_MSK | 123 COBALT_SYSSTAT_AUD_OUT_LOST_DATA_MSK; 124 /* Clear any existing interrupts */ 125 cobalt_write_bar1(cobalt, COBALT_SYS_STAT_EDGE, 0xffffffff); 126 /* PIO Core interrupt mask register. 127 Enable ADV7604 INT1 interrupts */ 128 cobalt_write_bar1(cobalt, COBALT_SYS_STAT_MASK, irqs); 129 } else { 130 /* Disable all ADV7604 interrupts */ 131 cobalt_write_bar1(cobalt, COBALT_SYS_STAT_MASK, 0); 132 } 133 } 134 135 static unsigned cobalt_get_sd_nr(struct v4l2_subdev *sd) 136 { 137 struct cobalt *cobalt = to_cobalt(sd->v4l2_dev); 138 unsigned i; 139 140 for (i = 0; i < COBALT_NUM_NODES; i++) 141 if (sd == cobalt->streams[i].sd) 142 return i; 143 cobalt_err("Invalid adv7604 subdev pointer!\n"); 144 return 0; 145 } 146 147 static void cobalt_notify(struct v4l2_subdev *sd, 148 unsigned int notification, void *arg) 149 { 150 struct cobalt *cobalt = to_cobalt(sd->v4l2_dev); 151 unsigned sd_nr = cobalt_get_sd_nr(sd); 152 struct cobalt_stream *s = &cobalt->streams[sd_nr]; 153 bool hotplug = arg ? *((int *)arg) : false; 154 155 if (s->is_output) 156 return; 157 158 switch (notification) { 159 case ADV76XX_HOTPLUG: 160 cobalt_s_bit_sysctrl(cobalt, 161 COBALT_SYS_CTRL_HPD_TO_CONNECTOR_BIT(sd_nr), hotplug); 162 cobalt_dbg(1, "Set hotplug for adv %d to %d\n", sd_nr, hotplug); 163 break; 164 case V4L2_DEVICE_NOTIFY_EVENT: 165 cobalt_dbg(1, "Format changed for adv %d\n", sd_nr); 166 v4l2_event_queue(&s->vdev, arg); 167 break; 168 default: 169 break; 170 } 171 } 172 173 static int get_payload_size(u16 code) 174 { 175 switch (code) { 176 case 0: return 128; 177 case 1: return 256; 178 case 2: return 512; 179 case 3: return 1024; 180 case 4: return 2048; 181 case 5: return 4096; 182 default: return 0; 183 } 184 return 0; 185 } 186 187 static const char *get_link_speed(u16 stat) 188 { 189 switch (stat & PCI_EXP_LNKSTA_CLS) { 190 case 1: return "2.5 Gbit/s"; 191 case 2: return "5 Gbit/s"; 192 case 3: return "10 Gbit/s"; 193 } 194 return "Unknown speed"; 195 } 196 197 void cobalt_pcie_status_show(struct cobalt *cobalt) 198 { 199 struct pci_dev *pci_dev = cobalt->pci_dev; 200 struct pci_dev *pci_bus_dev = cobalt->pci_dev->bus->self; 201 int offset; 202 int bus_offset; 203 u32 capa; 204 u16 stat, ctrl; 205 206 offset = pci_find_capability(pci_dev, PCI_CAP_ID_EXP); 207 bus_offset = pci_find_capability(pci_bus_dev, PCI_CAP_ID_EXP); 208 if (!offset || !bus_offset) 209 return; 210 211 /* Device */ 212 pci_read_config_dword(pci_dev, offset + PCI_EXP_DEVCAP, &capa); 213 pci_read_config_word(pci_dev, offset + PCI_EXP_DEVCTL, &ctrl); 214 pci_read_config_word(pci_dev, offset + PCI_EXP_DEVSTA, &stat); 215 cobalt_info("PCIe device capability 0x%08x: Max payload %d\n", 216 capa, get_payload_size(capa & PCI_EXP_DEVCAP_PAYLOAD)); 217 cobalt_info("PCIe device control 0x%04x: Max payload %d. Max read request %d\n", 218 ctrl, 219 get_payload_size((ctrl & PCI_EXP_DEVCTL_PAYLOAD) >> 5), 220 get_payload_size((ctrl & PCI_EXP_DEVCTL_READRQ) >> 12)); 221 cobalt_info("PCIe device status 0x%04x\n", stat); 222 223 /* Link */ 224 pci_read_config_dword(pci_dev, offset + PCI_EXP_LNKCAP, &capa); 225 pci_read_config_word(pci_dev, offset + PCI_EXP_LNKCTL, &ctrl); 226 pci_read_config_word(pci_dev, offset + PCI_EXP_LNKSTA, &stat); 227 cobalt_info("PCIe link capability 0x%08x: %s per lane and %u lanes\n", 228 capa, get_link_speed(capa), 229 (capa & PCI_EXP_LNKCAP_MLW) >> 4); 230 cobalt_info("PCIe link control 0x%04x\n", ctrl); 231 cobalt_info("PCIe link status 0x%04x: %s per lane and %u lanes\n", 232 stat, get_link_speed(stat), 233 (stat & PCI_EXP_LNKSTA_NLW) >> 4); 234 235 /* Bus */ 236 pci_read_config_dword(pci_bus_dev, bus_offset + PCI_EXP_LNKCAP, &capa); 237 cobalt_info("PCIe bus link capability 0x%08x: %s per lane and %u lanes\n", 238 capa, get_link_speed(capa), 239 (capa & PCI_EXP_LNKCAP_MLW) >> 4); 240 241 /* Slot */ 242 pci_read_config_dword(pci_dev, offset + PCI_EXP_SLTCAP, &capa); 243 pci_read_config_word(pci_dev, offset + PCI_EXP_SLTCTL, &ctrl); 244 pci_read_config_word(pci_dev, offset + PCI_EXP_SLTSTA, &stat); 245 cobalt_info("PCIe slot capability 0x%08x\n", capa); 246 cobalt_info("PCIe slot control 0x%04x\n", ctrl); 247 cobalt_info("PCIe slot status 0x%04x\n", stat); 248 } 249 250 static unsigned pcie_link_get_lanes(struct cobalt *cobalt) 251 { 252 struct pci_dev *pci_dev = cobalt->pci_dev; 253 unsigned offset; 254 u16 link; 255 256 offset = pci_find_capability(pci_dev, PCI_CAP_ID_EXP); 257 if (!offset) 258 return 0; 259 pci_read_config_word(pci_dev, offset + PCI_EXP_LNKSTA, &link); 260 return (link & PCI_EXP_LNKSTA_NLW) >> 4; 261 } 262 263 static unsigned pcie_bus_link_get_lanes(struct cobalt *cobalt) 264 { 265 struct pci_dev *pci_dev = cobalt->pci_dev->bus->self; 266 unsigned offset; 267 u32 link; 268 269 offset = pci_find_capability(pci_dev, PCI_CAP_ID_EXP); 270 if (!offset) 271 return 0; 272 pci_read_config_dword(pci_dev, offset + PCI_EXP_LNKCAP, &link); 273 return (link & PCI_EXP_LNKCAP_MLW) >> 4; 274 } 275 276 static void msi_config_show(struct cobalt *cobalt, struct pci_dev *pci_dev) 277 { 278 u16 ctrl, data; 279 u32 adrs_l, adrs_h; 280 281 pci_read_config_word(pci_dev, 0x52, &ctrl); 282 cobalt_info("MSI %s\n", ctrl & 1 ? "enable" : "disable"); 283 cobalt_info("MSI multiple message: Capable %u. Enable %u\n", 284 (1 << ((ctrl >> 1) & 7)), (1 << ((ctrl >> 4) & 7))); 285 if (ctrl & 0x80) 286 cobalt_info("MSI: 64-bit address capable\n"); 287 pci_read_config_dword(pci_dev, 0x54, &adrs_l); 288 pci_read_config_dword(pci_dev, 0x58, &adrs_h); 289 pci_read_config_word(pci_dev, 0x5c, &data); 290 if (ctrl & 0x80) 291 cobalt_info("MSI: Address 0x%08x%08x. Data 0x%04x\n", 292 adrs_h, adrs_l, data); 293 else 294 cobalt_info("MSI: Address 0x%08x. Data 0x%04x\n", 295 adrs_l, data); 296 } 297 298 static void cobalt_pci_iounmap(struct cobalt *cobalt, struct pci_dev *pci_dev) 299 { 300 if (cobalt->bar0) { 301 pci_iounmap(pci_dev, cobalt->bar0); 302 cobalt->bar0 = NULL; 303 } 304 if (cobalt->bar1) { 305 pci_iounmap(pci_dev, cobalt->bar1); 306 cobalt->bar1 = NULL; 307 } 308 } 309 310 static void cobalt_free_msi(struct cobalt *cobalt, struct pci_dev *pci_dev) 311 { 312 free_irq(pci_dev->irq, (void *)cobalt); 313 pci_free_irq_vectors(pci_dev); 314 } 315 316 static int cobalt_setup_pci(struct cobalt *cobalt, struct pci_dev *pci_dev, 317 const struct pci_device_id *pci_id) 318 { 319 u32 ctrl; 320 int ret; 321 322 cobalt_dbg(1, "enabling pci device\n"); 323 324 ret = pci_enable_device(pci_dev); 325 if (ret) { 326 cobalt_err("can't enable device\n"); 327 return ret; 328 } 329 pci_set_master(pci_dev); 330 pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &cobalt->card_rev); 331 pci_read_config_word(pci_dev, PCI_DEVICE_ID, &cobalt->device_id); 332 333 switch (cobalt->device_id) { 334 case PCI_DEVICE_ID_COBALT: 335 cobalt_info("PCI Express interface from Omnitek\n"); 336 break; 337 default: 338 cobalt_info("PCI Express interface provider is unknown!\n"); 339 break; 340 } 341 342 if (pcie_link_get_lanes(cobalt) != 8) { 343 cobalt_warn("PCI Express link width is %d lanes.\n", 344 pcie_link_get_lanes(cobalt)); 345 if (pcie_bus_link_get_lanes(cobalt) < 8) 346 cobalt_warn("The current slot only supports %d lanes, for best performance 8 are needed\n", 347 pcie_bus_link_get_lanes(cobalt)); 348 if (pcie_link_get_lanes(cobalt) != pcie_bus_link_get_lanes(cobalt)) { 349 cobalt_err("The card is most likely not seated correctly in the PCIe slot\n"); 350 ret = -EIO; 351 goto err_disable; 352 } 353 } 354 355 if (pci_set_dma_mask(pci_dev, DMA_BIT_MASK(64))) { 356 ret = pci_set_dma_mask(pci_dev, DMA_BIT_MASK(32)); 357 if (ret) { 358 cobalt_err("no suitable DMA available\n"); 359 goto err_disable; 360 } 361 } 362 363 ret = pci_request_regions(pci_dev, "cobalt"); 364 if (ret) { 365 cobalt_err("error requesting regions\n"); 366 goto err_disable; 367 } 368 369 cobalt_pcie_status_show(cobalt); 370 371 cobalt->bar0 = pci_iomap(pci_dev, 0, 0); 372 cobalt->bar1 = pci_iomap(pci_dev, 1, 0); 373 if (cobalt->bar1 == NULL) { 374 cobalt->bar1 = pci_iomap(pci_dev, 2, 0); 375 cobalt_info("64-bit BAR\n"); 376 } 377 if (!cobalt->bar0 || !cobalt->bar1) { 378 ret = -EIO; 379 goto err_release; 380 } 381 382 /* Reset the video inputs before enabling any interrupts */ 383 ctrl = cobalt_read_bar1(cobalt, COBALT_SYS_CTRL_BASE); 384 cobalt_write_bar1(cobalt, COBALT_SYS_CTRL_BASE, ctrl & ~0xf00); 385 386 /* Disable interrupts to prevent any spurious interrupts 387 from being generated. */ 388 cobalt_set_interrupt(cobalt, false); 389 390 if (pci_alloc_irq_vectors(pci_dev, 1, 1, PCI_IRQ_MSI) < 1) { 391 cobalt_err("Could not enable MSI\n"); 392 ret = -EIO; 393 goto err_release; 394 } 395 msi_config_show(cobalt, pci_dev); 396 397 /* Register IRQ */ 398 if (request_irq(pci_dev->irq, cobalt_irq_handler, IRQF_SHARED, 399 cobalt->v4l2_dev.name, (void *)cobalt)) { 400 cobalt_err("Failed to register irq %d\n", pci_dev->irq); 401 ret = -EIO; 402 goto err_msi; 403 } 404 405 omni_sg_dma_init(cobalt); 406 return 0; 407 408 err_msi: 409 pci_disable_msi(pci_dev); 410 411 err_release: 412 cobalt_pci_iounmap(cobalt, pci_dev); 413 pci_release_regions(pci_dev); 414 415 err_disable: 416 pci_disable_device(cobalt->pci_dev); 417 return ret; 418 } 419 420 static int cobalt_hdl_info_get(struct cobalt *cobalt) 421 { 422 int i; 423 424 for (i = 0; i < COBALT_HDL_INFO_SIZE; i++) 425 cobalt->hdl_info[i] = 426 ioread8(cobalt->bar1 + COBALT_HDL_INFO_BASE + i); 427 cobalt->hdl_info[COBALT_HDL_INFO_SIZE - 1] = '\0'; 428 if (strstr(cobalt->hdl_info, COBALT_HDL_SEARCH_STR)) 429 return 0; 430 431 return 1; 432 } 433 434 static void cobalt_stream_struct_init(struct cobalt *cobalt) 435 { 436 int i; 437 438 for (i = 0; i < COBALT_NUM_STREAMS; i++) { 439 struct cobalt_stream *s = &cobalt->streams[i]; 440 441 s->cobalt = cobalt; 442 s->flags = 0; 443 s->is_audio = false; 444 s->is_output = false; 445 s->is_dummy = true; 446 447 /* The Memory DMA channels will always get a lower channel 448 * number than the FIFO DMA. Video input should map to the 449 * stream 0-3. The other can use stream struct from 4 and 450 * higher */ 451 if (i <= COBALT_HSMA_IN_NODE) { 452 s->dma_channel = i + cobalt->first_fifo_channel; 453 s->video_channel = i; 454 s->dma_fifo_mask = 455 COBALT_SYSSTAT_VI0_LOST_DATA_MSK << (4 * i); 456 s->adv_irq_mask = 457 COBALT_SYSSTAT_VI0_INT1_MSK << (4 * i); 458 } else if (i >= COBALT_AUDIO_IN_STREAM && 459 i <= COBALT_AUDIO_IN_STREAM + 4) { 460 unsigned idx = i - COBALT_AUDIO_IN_STREAM; 461 462 s->dma_channel = 6 + idx; 463 s->is_audio = true; 464 s->video_channel = idx; 465 s->dma_fifo_mask = COBALT_SYSSTAT_AUD_IN_LOST_DATA_MSK; 466 } else if (i == COBALT_HSMA_OUT_NODE) { 467 s->dma_channel = 11; 468 s->is_output = true; 469 s->video_channel = 5; 470 s->dma_fifo_mask = COBALT_SYSSTAT_VOHSMA_LOST_DATA_MSK; 471 s->adv_irq_mask = COBALT_SYSSTAT_VOHSMA_INT1_MSK; 472 } else if (i == COBALT_AUDIO_OUT_STREAM) { 473 s->dma_channel = 12; 474 s->is_audio = true; 475 s->is_output = true; 476 s->video_channel = 5; 477 s->dma_fifo_mask = COBALT_SYSSTAT_AUD_OUT_LOST_DATA_MSK; 478 } else { 479 /* FIXME: Memory DMA for debug purpose */ 480 s->dma_channel = i - COBALT_NUM_NODES; 481 } 482 cobalt_info("stream #%d -> dma channel #%d <- video channel %d\n", 483 i, s->dma_channel, s->video_channel); 484 } 485 } 486 487 static int cobalt_subdevs_init(struct cobalt *cobalt) 488 { 489 static struct adv76xx_platform_data adv7604_pdata = { 490 .disable_pwrdnb = 1, 491 .ain_sel = ADV7604_AIN7_8_9_NC_SYNC_3_1, 492 .bus_order = ADV7604_BUS_ORDER_BRG, 493 .blank_data = 1, 494 .op_format_mode_sel = ADV7604_OP_FORMAT_MODE0, 495 .int1_config = ADV76XX_INT1_CONFIG_ACTIVE_HIGH, 496 .dr_str_data = ADV76XX_DR_STR_HIGH, 497 .dr_str_clk = ADV76XX_DR_STR_HIGH, 498 .dr_str_sync = ADV76XX_DR_STR_HIGH, 499 .hdmi_free_run_mode = 1, 500 .inv_vs_pol = 1, 501 .inv_hs_pol = 1, 502 }; 503 static struct i2c_board_info adv7604_info = { 504 .type = "adv7604", 505 .addr = 0x20, 506 .platform_data = &adv7604_pdata, 507 }; 508 509 struct cobalt_stream *s = cobalt->streams; 510 int i; 511 512 for (i = 0; i < COBALT_NUM_INPUTS; i++) { 513 struct v4l2_subdev_format sd_fmt = { 514 .pad = ADV7604_PAD_SOURCE, 515 .which = V4L2_SUBDEV_FORMAT_ACTIVE, 516 .format.code = MEDIA_BUS_FMT_YUYV8_1X16, 517 }; 518 struct v4l2_subdev_edid cobalt_edid = { 519 .pad = ADV76XX_PAD_HDMI_PORT_A, 520 .start_block = 0, 521 .blocks = 2, 522 .edid = edid, 523 }; 524 int err; 525 526 s[i].pad_source = ADV7604_PAD_SOURCE; 527 s[i].i2c_adap = &cobalt->i2c_adap[i]; 528 if (s[i].i2c_adap->dev.parent == NULL) 529 continue; 530 cobalt_s_bit_sysctrl(cobalt, 531 COBALT_SYS_CTRL_NRESET_TO_HDMI_BIT(i), 1); 532 s[i].sd = v4l2_i2c_new_subdev_board(&cobalt->v4l2_dev, 533 s[i].i2c_adap, &adv7604_info, NULL); 534 if (!s[i].sd) { 535 if (cobalt_ignore_err) 536 continue; 537 return -ENODEV; 538 } 539 err = v4l2_subdev_call(s[i].sd, video, s_routing, 540 ADV76XX_PAD_HDMI_PORT_A, 0, 0); 541 if (err) 542 return err; 543 err = v4l2_subdev_call(s[i].sd, pad, set_edid, 544 &cobalt_edid); 545 if (err) 546 return err; 547 err = v4l2_subdev_call(s[i].sd, pad, set_fmt, NULL, 548 &sd_fmt); 549 if (err) 550 return err; 551 /* Reset channel video module */ 552 cobalt_s_bit_sysctrl(cobalt, 553 COBALT_SYS_CTRL_VIDEO_RX_RESETN_BIT(i), 0); 554 mdelay(2); 555 cobalt_s_bit_sysctrl(cobalt, 556 COBALT_SYS_CTRL_VIDEO_RX_RESETN_BIT(i), 1); 557 mdelay(1); 558 s[i].is_dummy = false; 559 cobalt->streams[i + COBALT_AUDIO_IN_STREAM].is_dummy = false; 560 } 561 return 0; 562 } 563 564 static int cobalt_subdevs_hsma_init(struct cobalt *cobalt) 565 { 566 static struct adv7842_platform_data adv7842_pdata = { 567 .disable_pwrdnb = 1, 568 .ain_sel = ADV7842_AIN1_2_3_NC_SYNC_1_2, 569 .bus_order = ADV7842_BUS_ORDER_RBG, 570 .op_format_mode_sel = ADV7842_OP_FORMAT_MODE0, 571 .blank_data = 1, 572 .dr_str_data = 3, 573 .dr_str_clk = 3, 574 .dr_str_sync = 3, 575 .mode = ADV7842_MODE_HDMI, 576 .hdmi_free_run_enable = 1, 577 .vid_std_select = ADV7842_HDMI_COMP_VID_STD_HD_1250P, 578 .i2c_sdp_io = 0x4a, 579 .i2c_sdp = 0x48, 580 .i2c_cp = 0x22, 581 .i2c_vdp = 0x24, 582 .i2c_afe = 0x26, 583 .i2c_hdmi = 0x34, 584 .i2c_repeater = 0x32, 585 .i2c_edid = 0x36, 586 .i2c_infoframe = 0x3e, 587 .i2c_cec = 0x40, 588 .i2c_avlink = 0x42, 589 }; 590 static struct i2c_board_info adv7842_info = { 591 .type = "adv7842", 592 .addr = 0x20, 593 .platform_data = &adv7842_pdata, 594 }; 595 static struct v4l2_subdev_format sd_fmt = { 596 .pad = ADV7842_PAD_SOURCE, 597 .which = V4L2_SUBDEV_FORMAT_ACTIVE, 598 .format.code = MEDIA_BUS_FMT_YUYV8_1X16, 599 }; 600 static struct adv7511_platform_data adv7511_pdata = { 601 .i2c_edid = 0x7e >> 1, 602 .i2c_cec = 0x7c >> 1, 603 .i2c_pktmem = 0x70 >> 1, 604 .cec_clk = 12000000, 605 }; 606 static struct i2c_board_info adv7511_info = { 607 .type = "adv7511", 608 .addr = 0x39, /* 0x39 or 0x3d */ 609 .platform_data = &adv7511_pdata, 610 }; 611 struct v4l2_subdev_edid cobalt_edid = { 612 .pad = ADV7842_EDID_PORT_A, 613 .start_block = 0, 614 .blocks = 2, 615 .edid = edid, 616 }; 617 struct cobalt_stream *s = &cobalt->streams[COBALT_HSMA_IN_NODE]; 618 619 s->i2c_adap = &cobalt->i2c_adap[COBALT_NUM_ADAPTERS - 1]; 620 if (s->i2c_adap->dev.parent == NULL) 621 return 0; 622 cobalt_s_bit_sysctrl(cobalt, COBALT_SYS_CTRL_NRESET_TO_HDMI_BIT(4), 1); 623 624 s->sd = v4l2_i2c_new_subdev_board(&cobalt->v4l2_dev, 625 s->i2c_adap, &adv7842_info, NULL); 626 if (s->sd) { 627 int err = v4l2_subdev_call(s->sd, pad, set_edid, &cobalt_edid); 628 629 if (err) 630 return err; 631 err = v4l2_subdev_call(s->sd, pad, set_fmt, NULL, 632 &sd_fmt); 633 if (err) 634 return err; 635 cobalt->have_hsma_rx = true; 636 s->pad_source = ADV7842_PAD_SOURCE; 637 s->is_dummy = false; 638 cobalt->streams[4 + COBALT_AUDIO_IN_STREAM].is_dummy = false; 639 /* Reset channel video module */ 640 cobalt_s_bit_sysctrl(cobalt, 641 COBALT_SYS_CTRL_VIDEO_RX_RESETN_BIT(4), 0); 642 mdelay(2); 643 cobalt_s_bit_sysctrl(cobalt, 644 COBALT_SYS_CTRL_VIDEO_RX_RESETN_BIT(4), 1); 645 mdelay(1); 646 return err; 647 } 648 cobalt_s_bit_sysctrl(cobalt, COBALT_SYS_CTRL_NRESET_TO_HDMI_BIT(4), 0); 649 cobalt_s_bit_sysctrl(cobalt, COBALT_SYS_CTRL_PWRDN0_TO_HSMA_TX_BIT, 0); 650 s++; 651 s->i2c_adap = &cobalt->i2c_adap[COBALT_NUM_ADAPTERS - 1]; 652 s->sd = v4l2_i2c_new_subdev_board(&cobalt->v4l2_dev, 653 s->i2c_adap, &adv7511_info, NULL); 654 if (s->sd) { 655 /* A transmitter is hooked up, so we can set this bit */ 656 cobalt_s_bit_sysctrl(cobalt, 657 COBALT_SYS_CTRL_HSMA_TX_ENABLE_BIT, 1); 658 cobalt_s_bit_sysctrl(cobalt, 659 COBALT_SYS_CTRL_VIDEO_RX_RESETN_BIT(4), 0); 660 cobalt_s_bit_sysctrl(cobalt, 661 COBALT_SYS_CTRL_VIDEO_TX_RESETN_BIT, 1); 662 cobalt->have_hsma_tx = true; 663 v4l2_subdev_call(s->sd, core, s_power, 1); 664 v4l2_subdev_call(s->sd, video, s_stream, 1); 665 v4l2_subdev_call(s->sd, audio, s_stream, 1); 666 v4l2_ctrl_s_ctrl(v4l2_ctrl_find(s->sd->ctrl_handler, 667 V4L2_CID_DV_TX_MODE), V4L2_DV_TX_MODE_HDMI); 668 s->is_dummy = false; 669 cobalt->streams[COBALT_AUDIO_OUT_STREAM].is_dummy = false; 670 return 0; 671 } 672 return -ENODEV; 673 } 674 675 static int cobalt_probe(struct pci_dev *pci_dev, 676 const struct pci_device_id *pci_id) 677 { 678 struct cobalt *cobalt; 679 int retval = 0; 680 int i; 681 682 /* FIXME - module parameter arrays constrain max instances */ 683 i = atomic_inc_return(&cobalt_instance) - 1; 684 685 cobalt = kzalloc(sizeof(struct cobalt), GFP_ATOMIC); 686 if (cobalt == NULL) 687 return -ENOMEM; 688 cobalt->pci_dev = pci_dev; 689 cobalt->instance = i; 690 691 retval = v4l2_device_register(&pci_dev->dev, &cobalt->v4l2_dev); 692 if (retval) { 693 pr_err("cobalt: v4l2_device_register of card %d failed\n", 694 cobalt->instance); 695 kfree(cobalt); 696 return retval; 697 } 698 snprintf(cobalt->v4l2_dev.name, sizeof(cobalt->v4l2_dev.name), 699 "cobalt-%d", cobalt->instance); 700 cobalt->v4l2_dev.notify = cobalt_notify; 701 cobalt_info("Initializing card %d\n", cobalt->instance); 702 703 cobalt->irq_work_queues = 704 create_singlethread_workqueue(cobalt->v4l2_dev.name); 705 if (cobalt->irq_work_queues == NULL) { 706 cobalt_err("Could not create workqueue\n"); 707 retval = -ENOMEM; 708 goto err; 709 } 710 711 INIT_WORK(&cobalt->irq_work_queue, cobalt_irq_work_handler); 712 713 /* PCI Device Setup */ 714 retval = cobalt_setup_pci(cobalt, pci_dev, pci_id); 715 if (retval != 0) 716 goto err_wq; 717 718 /* Show HDL version info */ 719 if (cobalt_hdl_info_get(cobalt)) 720 cobalt_info("Not able to read the HDL info\n"); 721 else 722 cobalt_info("%s", cobalt->hdl_info); 723 724 retval = cobalt_i2c_init(cobalt); 725 if (retval) 726 goto err_pci; 727 728 cobalt_stream_struct_init(cobalt); 729 730 retval = cobalt_subdevs_init(cobalt); 731 if (retval) 732 goto err_i2c; 733 734 if (!(cobalt_read_bar1(cobalt, COBALT_SYS_STAT_BASE) & 735 COBALT_SYSSTAT_HSMA_PRSNTN_MSK)) { 736 retval = cobalt_subdevs_hsma_init(cobalt); 737 if (retval) 738 goto err_i2c; 739 } 740 741 retval = cobalt_nodes_register(cobalt); 742 if (retval) { 743 cobalt_err("Error %d registering device nodes\n", retval); 744 goto err_i2c; 745 } 746 cobalt_set_interrupt(cobalt, true); 747 v4l2_device_call_all(&cobalt->v4l2_dev, 0, core, 748 interrupt_service_routine, 0, NULL); 749 750 cobalt_info("Initialized cobalt card\n"); 751 752 cobalt_flash_probe(cobalt); 753 754 return 0; 755 756 err_i2c: 757 cobalt_i2c_exit(cobalt); 758 cobalt_s_bit_sysctrl(cobalt, COBALT_SYS_CTRL_HSMA_TX_ENABLE_BIT, 0); 759 err_pci: 760 cobalt_free_msi(cobalt, pci_dev); 761 cobalt_pci_iounmap(cobalt, pci_dev); 762 pci_release_regions(cobalt->pci_dev); 763 pci_disable_device(cobalt->pci_dev); 764 err_wq: 765 destroy_workqueue(cobalt->irq_work_queues); 766 err: 767 cobalt_err("error %d on initialization\n", retval); 768 769 v4l2_device_unregister(&cobalt->v4l2_dev); 770 kfree(cobalt); 771 return retval; 772 } 773 774 static void cobalt_remove(struct pci_dev *pci_dev) 775 { 776 struct v4l2_device *v4l2_dev = pci_get_drvdata(pci_dev); 777 struct cobalt *cobalt = to_cobalt(v4l2_dev); 778 int i; 779 780 cobalt_flash_remove(cobalt); 781 cobalt_set_interrupt(cobalt, false); 782 flush_workqueue(cobalt->irq_work_queues); 783 cobalt_nodes_unregister(cobalt); 784 for (i = 0; i < COBALT_NUM_ADAPTERS; i++) { 785 struct v4l2_subdev *sd = cobalt->streams[i].sd; 786 struct i2c_client *client; 787 788 if (sd == NULL) 789 continue; 790 client = v4l2_get_subdevdata(sd); 791 v4l2_device_unregister_subdev(sd); 792 i2c_unregister_device(client); 793 } 794 cobalt_i2c_exit(cobalt); 795 cobalt_free_msi(cobalt, pci_dev); 796 cobalt_s_bit_sysctrl(cobalt, COBALT_SYS_CTRL_HSMA_TX_ENABLE_BIT, 0); 797 cobalt_pci_iounmap(cobalt, pci_dev); 798 pci_release_regions(cobalt->pci_dev); 799 pci_disable_device(cobalt->pci_dev); 800 destroy_workqueue(cobalt->irq_work_queues); 801 802 cobalt_info("removed cobalt card\n"); 803 804 v4l2_device_unregister(v4l2_dev); 805 kfree(cobalt); 806 } 807 808 /* define a pci_driver for card detection */ 809 static struct pci_driver cobalt_pci_driver = { 810 .name = "cobalt", 811 .id_table = cobalt_pci_tbl, 812 .probe = cobalt_probe, 813 .remove = cobalt_remove, 814 }; 815 816 module_pci_driver(cobalt_pci_driver); 817