1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * cobalt driver initialization and card probing 4 * 5 * Derived from cx18-driver.c 6 * 7 * Copyright 2012-2015 Cisco Systems, Inc. and/or its affiliates. 8 * All rights reserved. 9 */ 10 11 #include <linux/delay.h> 12 #include <media/i2c/adv7604.h> 13 #include <media/i2c/adv7842.h> 14 #include <media/i2c/adv7511.h> 15 #include <media/v4l2-event.h> 16 #include <media/v4l2-ctrls.h> 17 18 #include "cobalt-driver.h" 19 #include "cobalt-irq.h" 20 #include "cobalt-i2c.h" 21 #include "cobalt-v4l2.h" 22 #include "cobalt-flash.h" 23 #include "cobalt-alsa.h" 24 #include "cobalt-omnitek.h" 25 26 /* add your revision and whatnot here */ 27 static const struct pci_device_id cobalt_pci_tbl[] = { 28 {PCI_VENDOR_ID_CISCO, PCI_DEVICE_ID_COBALT, 29 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 30 {0,} 31 }; 32 33 MODULE_DEVICE_TABLE(pci, cobalt_pci_tbl); 34 35 static atomic_t cobalt_instance = ATOMIC_INIT(0); 36 37 int cobalt_debug; 38 module_param_named(debug, cobalt_debug, int, 0644); 39 MODULE_PARM_DESC(debug, "Debug level. Default: 0\n"); 40 41 int cobalt_ignore_err; 42 module_param_named(ignore_err, cobalt_ignore_err, int, 0644); 43 MODULE_PARM_DESC(ignore_err, 44 "If set then ignore missing i2c adapters/receivers. Default: 0\n"); 45 46 MODULE_AUTHOR("Hans Verkuil <hans.verkuil@cisco.com> & Morten Hestnes"); 47 MODULE_DESCRIPTION("cobalt driver"); 48 MODULE_LICENSE("GPL"); 49 50 static u8 edid[256] = { 51 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 52 0x50, 0x21, 0x32, 0x27, 0x00, 0x00, 0x00, 0x00, 53 0x22, 0x1a, 0x01, 0x03, 0x80, 0x30, 0x1b, 0x78, 54 0x0f, 0xee, 0x91, 0xa3, 0x54, 0x4c, 0x99, 0x26, 55 0x0f, 0x50, 0x54, 0x2f, 0xcf, 0x00, 0x31, 0x59, 56 0x45, 0x59, 0x61, 0x59, 0x81, 0x99, 0x01, 0x01, 57 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x02, 0x3a, 58 0x80, 0x18, 0x71, 0x38, 0x2d, 0x40, 0x58, 0x2c, 59 0x46, 0x00, 0xe0, 0x0e, 0x11, 0x00, 0x00, 0x1e, 60 0x00, 0x00, 0x00, 0xfd, 0x00, 0x18, 0x55, 0x18, 61 0x5e, 0x11, 0x00, 0x0a, 0x20, 0x20, 0x20, 0x20, 62 0x20, 0x20, 0x00, 0x00, 0x00, 0xfc, 0x00, 0x63, 63 0x6f, 0x62, 0x61, 0x6c, 0x74, 0x0a, 0x20, 0x20, 64 0x20, 0x20, 0x20, 0x20, 0x00, 0x00, 0x00, 0x10, 65 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 66 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x9c, 67 68 0x02, 0x03, 0x1f, 0xf0, 0x4a, 0x90, 0x1f, 0x04, 69 0x13, 0x22, 0x21, 0x20, 0x02, 0x11, 0x01, 0x23, 70 0x09, 0x07, 0x07, 0x68, 0x03, 0x0c, 0x00, 0x10, 71 0x00, 0x00, 0x22, 0x0f, 0xe2, 0x00, 0xea, 0x00, 72 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 73 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 74 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 75 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 76 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 77 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 78 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 79 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 80 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 81 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 82 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 83 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa7, 84 }; 85 86 static void cobalt_set_interrupt(struct cobalt *cobalt, bool enable) 87 { 88 if (enable) { 89 unsigned irqs = COBALT_SYSSTAT_VI0_INT1_MSK | 90 COBALT_SYSSTAT_VI1_INT1_MSK | 91 COBALT_SYSSTAT_VI2_INT1_MSK | 92 COBALT_SYSSTAT_VI3_INT1_MSK | 93 COBALT_SYSSTAT_VI0_INT2_MSK | 94 COBALT_SYSSTAT_VI1_INT2_MSK | 95 COBALT_SYSSTAT_VI2_INT2_MSK | 96 COBALT_SYSSTAT_VI3_INT2_MSK | 97 COBALT_SYSSTAT_VI0_LOST_DATA_MSK | 98 COBALT_SYSSTAT_VI1_LOST_DATA_MSK | 99 COBALT_SYSSTAT_VI2_LOST_DATA_MSK | 100 COBALT_SYSSTAT_VI3_LOST_DATA_MSK | 101 COBALT_SYSSTAT_AUD_IN_LOST_DATA_MSK; 102 103 if (cobalt->have_hsma_rx) 104 irqs |= COBALT_SYSSTAT_VIHSMA_INT1_MSK | 105 COBALT_SYSSTAT_VIHSMA_INT2_MSK | 106 COBALT_SYSSTAT_VIHSMA_LOST_DATA_MSK; 107 108 if (cobalt->have_hsma_tx) 109 irqs |= COBALT_SYSSTAT_VOHSMA_INT1_MSK | 110 COBALT_SYSSTAT_VOHSMA_LOST_DATA_MSK | 111 COBALT_SYSSTAT_AUD_OUT_LOST_DATA_MSK; 112 /* Clear any existing interrupts */ 113 cobalt_write_bar1(cobalt, COBALT_SYS_STAT_EDGE, 0xffffffff); 114 /* PIO Core interrupt mask register. 115 Enable ADV7604 INT1 interrupts */ 116 cobalt_write_bar1(cobalt, COBALT_SYS_STAT_MASK, irqs); 117 } else { 118 /* Disable all ADV7604 interrupts */ 119 cobalt_write_bar1(cobalt, COBALT_SYS_STAT_MASK, 0); 120 } 121 } 122 123 static unsigned cobalt_get_sd_nr(struct v4l2_subdev *sd) 124 { 125 struct cobalt *cobalt = to_cobalt(sd->v4l2_dev); 126 unsigned i; 127 128 for (i = 0; i < COBALT_NUM_NODES; i++) 129 if (sd == cobalt->streams[i].sd) 130 return i; 131 cobalt_err("Invalid adv7604 subdev pointer!\n"); 132 return 0; 133 } 134 135 static void cobalt_notify(struct v4l2_subdev *sd, 136 unsigned int notification, void *arg) 137 { 138 struct cobalt *cobalt = to_cobalt(sd->v4l2_dev); 139 unsigned sd_nr = cobalt_get_sd_nr(sd); 140 struct cobalt_stream *s = &cobalt->streams[sd_nr]; 141 bool hotplug = arg ? *((int *)arg) : false; 142 143 if (s->is_output) 144 return; 145 146 switch (notification) { 147 case ADV76XX_HOTPLUG: 148 cobalt_s_bit_sysctrl(cobalt, 149 COBALT_SYS_CTRL_HPD_TO_CONNECTOR_BIT(sd_nr), hotplug); 150 cobalt_dbg(1, "Set hotplug for adv %d to %d\n", sd_nr, hotplug); 151 break; 152 case V4L2_DEVICE_NOTIFY_EVENT: 153 cobalt_dbg(1, "Format changed for adv %d\n", sd_nr); 154 v4l2_event_queue(&s->vdev, arg); 155 break; 156 default: 157 break; 158 } 159 } 160 161 static int get_payload_size(u16 code) 162 { 163 switch (code) { 164 case 0: return 128; 165 case 1: return 256; 166 case 2: return 512; 167 case 3: return 1024; 168 case 4: return 2048; 169 case 5: return 4096; 170 default: return 0; 171 } 172 return 0; 173 } 174 175 static const char *get_link_speed(u16 stat) 176 { 177 switch (stat & PCI_EXP_LNKSTA_CLS) { 178 case 1: return "2.5 Gbit/s"; 179 case 2: return "5 Gbit/s"; 180 case 3: return "10 Gbit/s"; 181 } 182 return "Unknown speed"; 183 } 184 185 void cobalt_pcie_status_show(struct cobalt *cobalt) 186 { 187 struct pci_dev *pci_dev = cobalt->pci_dev; 188 struct pci_dev *pci_bus_dev = cobalt->pci_dev->bus->self; 189 int offset; 190 int bus_offset; 191 u32 capa; 192 u16 stat, ctrl; 193 194 offset = pci_find_capability(pci_dev, PCI_CAP_ID_EXP); 195 bus_offset = pci_find_capability(pci_bus_dev, PCI_CAP_ID_EXP); 196 if (!offset || !bus_offset) 197 return; 198 199 /* Device */ 200 pci_read_config_dword(pci_dev, offset + PCI_EXP_DEVCAP, &capa); 201 pci_read_config_word(pci_dev, offset + PCI_EXP_DEVCTL, &ctrl); 202 pci_read_config_word(pci_dev, offset + PCI_EXP_DEVSTA, &stat); 203 cobalt_info("PCIe device capability 0x%08x: Max payload %d\n", 204 capa, get_payload_size(capa & PCI_EXP_DEVCAP_PAYLOAD)); 205 cobalt_info("PCIe device control 0x%04x: Max payload %d. Max read request %d\n", 206 ctrl, 207 get_payload_size((ctrl & PCI_EXP_DEVCTL_PAYLOAD) >> 5), 208 get_payload_size((ctrl & PCI_EXP_DEVCTL_READRQ) >> 12)); 209 cobalt_info("PCIe device status 0x%04x\n", stat); 210 211 /* Link */ 212 pci_read_config_dword(pci_dev, offset + PCI_EXP_LNKCAP, &capa); 213 pci_read_config_word(pci_dev, offset + PCI_EXP_LNKCTL, &ctrl); 214 pci_read_config_word(pci_dev, offset + PCI_EXP_LNKSTA, &stat); 215 cobalt_info("PCIe link capability 0x%08x: %s per lane and %u lanes\n", 216 capa, get_link_speed(capa), 217 (capa & PCI_EXP_LNKCAP_MLW) >> 4); 218 cobalt_info("PCIe link control 0x%04x\n", ctrl); 219 cobalt_info("PCIe link status 0x%04x: %s per lane and %u lanes\n", 220 stat, get_link_speed(stat), 221 (stat & PCI_EXP_LNKSTA_NLW) >> 4); 222 223 /* Bus */ 224 pci_read_config_dword(pci_bus_dev, bus_offset + PCI_EXP_LNKCAP, &capa); 225 cobalt_info("PCIe bus link capability 0x%08x: %s per lane and %u lanes\n", 226 capa, get_link_speed(capa), 227 (capa & PCI_EXP_LNKCAP_MLW) >> 4); 228 229 /* Slot */ 230 pci_read_config_dword(pci_dev, offset + PCI_EXP_SLTCAP, &capa); 231 pci_read_config_word(pci_dev, offset + PCI_EXP_SLTCTL, &ctrl); 232 pci_read_config_word(pci_dev, offset + PCI_EXP_SLTSTA, &stat); 233 cobalt_info("PCIe slot capability 0x%08x\n", capa); 234 cobalt_info("PCIe slot control 0x%04x\n", ctrl); 235 cobalt_info("PCIe slot status 0x%04x\n", stat); 236 } 237 238 static unsigned pcie_link_get_lanes(struct cobalt *cobalt) 239 { 240 struct pci_dev *pci_dev = cobalt->pci_dev; 241 unsigned offset; 242 u16 link; 243 244 offset = pci_find_capability(pci_dev, PCI_CAP_ID_EXP); 245 if (!offset) 246 return 0; 247 pci_read_config_word(pci_dev, offset + PCI_EXP_LNKSTA, &link); 248 return (link & PCI_EXP_LNKSTA_NLW) >> 4; 249 } 250 251 static unsigned pcie_bus_link_get_lanes(struct cobalt *cobalt) 252 { 253 struct pci_dev *pci_dev = cobalt->pci_dev->bus->self; 254 unsigned offset; 255 u32 link; 256 257 offset = pci_find_capability(pci_dev, PCI_CAP_ID_EXP); 258 if (!offset) 259 return 0; 260 pci_read_config_dword(pci_dev, offset + PCI_EXP_LNKCAP, &link); 261 return (link & PCI_EXP_LNKCAP_MLW) >> 4; 262 } 263 264 static void msi_config_show(struct cobalt *cobalt, struct pci_dev *pci_dev) 265 { 266 u16 ctrl, data; 267 u32 adrs_l, adrs_h; 268 269 pci_read_config_word(pci_dev, 0x52, &ctrl); 270 cobalt_info("MSI %s\n", ctrl & 1 ? "enable" : "disable"); 271 cobalt_info("MSI multiple message: Capable %u. Enable %u\n", 272 (1 << ((ctrl >> 1) & 7)), (1 << ((ctrl >> 4) & 7))); 273 if (ctrl & 0x80) 274 cobalt_info("MSI: 64-bit address capable\n"); 275 pci_read_config_dword(pci_dev, 0x54, &adrs_l); 276 pci_read_config_dword(pci_dev, 0x58, &adrs_h); 277 pci_read_config_word(pci_dev, 0x5c, &data); 278 if (ctrl & 0x80) 279 cobalt_info("MSI: Address 0x%08x%08x. Data 0x%04x\n", 280 adrs_h, adrs_l, data); 281 else 282 cobalt_info("MSI: Address 0x%08x. Data 0x%04x\n", 283 adrs_l, data); 284 } 285 286 static void cobalt_pci_iounmap(struct cobalt *cobalt, struct pci_dev *pci_dev) 287 { 288 if (cobalt->bar0) { 289 pci_iounmap(pci_dev, cobalt->bar0); 290 cobalt->bar0 = NULL; 291 } 292 if (cobalt->bar1) { 293 pci_iounmap(pci_dev, cobalt->bar1); 294 cobalt->bar1 = NULL; 295 } 296 } 297 298 static void cobalt_free_msi(struct cobalt *cobalt, struct pci_dev *pci_dev) 299 { 300 free_irq(pci_dev->irq, (void *)cobalt); 301 pci_free_irq_vectors(pci_dev); 302 } 303 304 static int cobalt_setup_pci(struct cobalt *cobalt, struct pci_dev *pci_dev, 305 const struct pci_device_id *pci_id) 306 { 307 u32 ctrl; 308 int ret; 309 310 cobalt_dbg(1, "enabling pci device\n"); 311 312 ret = pci_enable_device(pci_dev); 313 if (ret) { 314 cobalt_err("can't enable device\n"); 315 return ret; 316 } 317 pci_set_master(pci_dev); 318 pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &cobalt->card_rev); 319 pci_read_config_word(pci_dev, PCI_DEVICE_ID, &cobalt->device_id); 320 321 switch (cobalt->device_id) { 322 case PCI_DEVICE_ID_COBALT: 323 cobalt_info("PCI Express interface from Omnitek\n"); 324 break; 325 default: 326 cobalt_info("PCI Express interface provider is unknown!\n"); 327 break; 328 } 329 330 if (pcie_link_get_lanes(cobalt) != 8) { 331 cobalt_warn("PCI Express link width is %d lanes.\n", 332 pcie_link_get_lanes(cobalt)); 333 if (pcie_bus_link_get_lanes(cobalt) < 8) 334 cobalt_warn("The current slot only supports %d lanes, for best performance 8 are needed\n", 335 pcie_bus_link_get_lanes(cobalt)); 336 if (pcie_link_get_lanes(cobalt) != pcie_bus_link_get_lanes(cobalt)) { 337 cobalt_err("The card is most likely not seated correctly in the PCIe slot\n"); 338 ret = -EIO; 339 goto err_disable; 340 } 341 } 342 343 if (pci_set_dma_mask(pci_dev, DMA_BIT_MASK(64))) { 344 ret = pci_set_dma_mask(pci_dev, DMA_BIT_MASK(32)); 345 if (ret) { 346 cobalt_err("no suitable DMA available\n"); 347 goto err_disable; 348 } 349 } 350 351 ret = pci_request_regions(pci_dev, "cobalt"); 352 if (ret) { 353 cobalt_err("error requesting regions\n"); 354 goto err_disable; 355 } 356 357 cobalt_pcie_status_show(cobalt); 358 359 cobalt->bar0 = pci_iomap(pci_dev, 0, 0); 360 cobalt->bar1 = pci_iomap(pci_dev, 1, 0); 361 if (cobalt->bar1 == NULL) { 362 cobalt->bar1 = pci_iomap(pci_dev, 2, 0); 363 cobalt_info("64-bit BAR\n"); 364 } 365 if (!cobalt->bar0 || !cobalt->bar1) { 366 ret = -EIO; 367 goto err_release; 368 } 369 370 /* Reset the video inputs before enabling any interrupts */ 371 ctrl = cobalt_read_bar1(cobalt, COBALT_SYS_CTRL_BASE); 372 cobalt_write_bar1(cobalt, COBALT_SYS_CTRL_BASE, ctrl & ~0xf00); 373 374 /* Disable interrupts to prevent any spurious interrupts 375 from being generated. */ 376 cobalt_set_interrupt(cobalt, false); 377 378 if (pci_alloc_irq_vectors(pci_dev, 1, 1, PCI_IRQ_MSI) < 1) { 379 cobalt_err("Could not enable MSI\n"); 380 ret = -EIO; 381 goto err_release; 382 } 383 msi_config_show(cobalt, pci_dev); 384 385 /* Register IRQ */ 386 if (request_irq(pci_dev->irq, cobalt_irq_handler, IRQF_SHARED, 387 cobalt->v4l2_dev.name, (void *)cobalt)) { 388 cobalt_err("Failed to register irq %d\n", pci_dev->irq); 389 ret = -EIO; 390 goto err_msi; 391 } 392 393 omni_sg_dma_init(cobalt); 394 return 0; 395 396 err_msi: 397 pci_disable_msi(pci_dev); 398 399 err_release: 400 cobalt_pci_iounmap(cobalt, pci_dev); 401 pci_release_regions(pci_dev); 402 403 err_disable: 404 pci_disable_device(cobalt->pci_dev); 405 return ret; 406 } 407 408 static int cobalt_hdl_info_get(struct cobalt *cobalt) 409 { 410 int i; 411 412 for (i = 0; i < COBALT_HDL_INFO_SIZE; i++) 413 cobalt->hdl_info[i] = 414 ioread8(cobalt->bar1 + COBALT_HDL_INFO_BASE + i); 415 cobalt->hdl_info[COBALT_HDL_INFO_SIZE - 1] = '\0'; 416 if (strstr(cobalt->hdl_info, COBALT_HDL_SEARCH_STR)) 417 return 0; 418 419 return 1; 420 } 421 422 static void cobalt_stream_struct_init(struct cobalt *cobalt) 423 { 424 int i; 425 426 for (i = 0; i < COBALT_NUM_STREAMS; i++) { 427 struct cobalt_stream *s = &cobalt->streams[i]; 428 429 s->cobalt = cobalt; 430 s->flags = 0; 431 s->is_audio = false; 432 s->is_output = false; 433 s->is_dummy = true; 434 435 /* The Memory DMA channels will always get a lower channel 436 * number than the FIFO DMA. Video input should map to the 437 * stream 0-3. The other can use stream struct from 4 and 438 * higher */ 439 if (i <= COBALT_HSMA_IN_NODE) { 440 s->dma_channel = i + cobalt->first_fifo_channel; 441 s->video_channel = i; 442 s->dma_fifo_mask = 443 COBALT_SYSSTAT_VI0_LOST_DATA_MSK << (4 * i); 444 s->adv_irq_mask = 445 COBALT_SYSSTAT_VI0_INT1_MSK << (4 * i); 446 } else if (i >= COBALT_AUDIO_IN_STREAM && 447 i <= COBALT_AUDIO_IN_STREAM + 4) { 448 unsigned idx = i - COBALT_AUDIO_IN_STREAM; 449 450 s->dma_channel = 6 + idx; 451 s->is_audio = true; 452 s->video_channel = idx; 453 s->dma_fifo_mask = COBALT_SYSSTAT_AUD_IN_LOST_DATA_MSK; 454 } else if (i == COBALT_HSMA_OUT_NODE) { 455 s->dma_channel = 11; 456 s->is_output = true; 457 s->video_channel = 5; 458 s->dma_fifo_mask = COBALT_SYSSTAT_VOHSMA_LOST_DATA_MSK; 459 s->adv_irq_mask = COBALT_SYSSTAT_VOHSMA_INT1_MSK; 460 } else if (i == COBALT_AUDIO_OUT_STREAM) { 461 s->dma_channel = 12; 462 s->is_audio = true; 463 s->is_output = true; 464 s->video_channel = 5; 465 s->dma_fifo_mask = COBALT_SYSSTAT_AUD_OUT_LOST_DATA_MSK; 466 } else { 467 /* FIXME: Memory DMA for debug purpose */ 468 s->dma_channel = i - COBALT_NUM_NODES; 469 } 470 cobalt_info("stream #%d -> dma channel #%d <- video channel %d\n", 471 i, s->dma_channel, s->video_channel); 472 } 473 } 474 475 static int cobalt_subdevs_init(struct cobalt *cobalt) 476 { 477 static struct adv76xx_platform_data adv7604_pdata = { 478 .disable_pwrdnb = 1, 479 .ain_sel = ADV7604_AIN7_8_9_NC_SYNC_3_1, 480 .bus_order = ADV7604_BUS_ORDER_BRG, 481 .blank_data = 1, 482 .op_format_mode_sel = ADV7604_OP_FORMAT_MODE0, 483 .int1_config = ADV76XX_INT1_CONFIG_ACTIVE_HIGH, 484 .dr_str_data = ADV76XX_DR_STR_HIGH, 485 .dr_str_clk = ADV76XX_DR_STR_HIGH, 486 .dr_str_sync = ADV76XX_DR_STR_HIGH, 487 .hdmi_free_run_mode = 1, 488 .inv_vs_pol = 1, 489 .inv_hs_pol = 1, 490 }; 491 static struct i2c_board_info adv7604_info = { 492 .type = "adv7604", 493 .addr = 0x20, 494 .platform_data = &adv7604_pdata, 495 }; 496 497 struct cobalt_stream *s = cobalt->streams; 498 int i; 499 500 for (i = 0; i < COBALT_NUM_INPUTS; i++) { 501 struct v4l2_subdev_format sd_fmt = { 502 .pad = ADV7604_PAD_SOURCE, 503 .which = V4L2_SUBDEV_FORMAT_ACTIVE, 504 .format.code = MEDIA_BUS_FMT_YUYV8_1X16, 505 }; 506 struct v4l2_subdev_edid cobalt_edid = { 507 .pad = ADV76XX_PAD_HDMI_PORT_A, 508 .start_block = 0, 509 .blocks = 2, 510 .edid = edid, 511 }; 512 int err; 513 514 s[i].pad_source = ADV7604_PAD_SOURCE; 515 s[i].i2c_adap = &cobalt->i2c_adap[i]; 516 if (s[i].i2c_adap->dev.parent == NULL) 517 continue; 518 cobalt_s_bit_sysctrl(cobalt, 519 COBALT_SYS_CTRL_NRESET_TO_HDMI_BIT(i), 1); 520 s[i].sd = v4l2_i2c_new_subdev_board(&cobalt->v4l2_dev, 521 s[i].i2c_adap, &adv7604_info, NULL); 522 if (!s[i].sd) { 523 if (cobalt_ignore_err) 524 continue; 525 return -ENODEV; 526 } 527 err = v4l2_subdev_call(s[i].sd, video, s_routing, 528 ADV76XX_PAD_HDMI_PORT_A, 0, 0); 529 if (err) 530 return err; 531 err = v4l2_subdev_call(s[i].sd, pad, set_edid, 532 &cobalt_edid); 533 if (err) 534 return err; 535 err = v4l2_subdev_call(s[i].sd, pad, set_fmt, NULL, 536 &sd_fmt); 537 if (err) 538 return err; 539 /* Reset channel video module */ 540 cobalt_s_bit_sysctrl(cobalt, 541 COBALT_SYS_CTRL_VIDEO_RX_RESETN_BIT(i), 0); 542 mdelay(2); 543 cobalt_s_bit_sysctrl(cobalt, 544 COBALT_SYS_CTRL_VIDEO_RX_RESETN_BIT(i), 1); 545 mdelay(1); 546 s[i].is_dummy = false; 547 cobalt->streams[i + COBALT_AUDIO_IN_STREAM].is_dummy = false; 548 } 549 return 0; 550 } 551 552 static int cobalt_subdevs_hsma_init(struct cobalt *cobalt) 553 { 554 static struct adv7842_platform_data adv7842_pdata = { 555 .disable_pwrdnb = 1, 556 .ain_sel = ADV7842_AIN1_2_3_NC_SYNC_1_2, 557 .bus_order = ADV7842_BUS_ORDER_RBG, 558 .op_format_mode_sel = ADV7842_OP_FORMAT_MODE0, 559 .blank_data = 1, 560 .dr_str_data = 3, 561 .dr_str_clk = 3, 562 .dr_str_sync = 3, 563 .mode = ADV7842_MODE_HDMI, 564 .hdmi_free_run_enable = 1, 565 .vid_std_select = ADV7842_HDMI_COMP_VID_STD_HD_1250P, 566 .i2c_sdp_io = 0x4a, 567 .i2c_sdp = 0x48, 568 .i2c_cp = 0x22, 569 .i2c_vdp = 0x24, 570 .i2c_afe = 0x26, 571 .i2c_hdmi = 0x34, 572 .i2c_repeater = 0x32, 573 .i2c_edid = 0x36, 574 .i2c_infoframe = 0x3e, 575 .i2c_cec = 0x40, 576 .i2c_avlink = 0x42, 577 }; 578 static struct i2c_board_info adv7842_info = { 579 .type = "adv7842", 580 .addr = 0x20, 581 .platform_data = &adv7842_pdata, 582 }; 583 static struct v4l2_subdev_format sd_fmt = { 584 .pad = ADV7842_PAD_SOURCE, 585 .which = V4L2_SUBDEV_FORMAT_ACTIVE, 586 .format.code = MEDIA_BUS_FMT_YUYV8_1X16, 587 }; 588 static struct adv7511_platform_data adv7511_pdata = { 589 .i2c_edid = 0x7e >> 1, 590 .i2c_cec = 0x7c >> 1, 591 .i2c_pktmem = 0x70 >> 1, 592 .cec_clk = 12000000, 593 }; 594 static struct i2c_board_info adv7511_info = { 595 .type = "adv7511", 596 .addr = 0x39, /* 0x39 or 0x3d */ 597 .platform_data = &adv7511_pdata, 598 }; 599 struct v4l2_subdev_edid cobalt_edid = { 600 .pad = ADV7842_EDID_PORT_A, 601 .start_block = 0, 602 .blocks = 2, 603 .edid = edid, 604 }; 605 struct cobalt_stream *s = &cobalt->streams[COBALT_HSMA_IN_NODE]; 606 607 s->i2c_adap = &cobalt->i2c_adap[COBALT_NUM_ADAPTERS - 1]; 608 if (s->i2c_adap->dev.parent == NULL) 609 return 0; 610 cobalt_s_bit_sysctrl(cobalt, COBALT_SYS_CTRL_NRESET_TO_HDMI_BIT(4), 1); 611 612 s->sd = v4l2_i2c_new_subdev_board(&cobalt->v4l2_dev, 613 s->i2c_adap, &adv7842_info, NULL); 614 if (s->sd) { 615 int err = v4l2_subdev_call(s->sd, pad, set_edid, &cobalt_edid); 616 617 if (err) 618 return err; 619 err = v4l2_subdev_call(s->sd, pad, set_fmt, NULL, 620 &sd_fmt); 621 if (err) 622 return err; 623 cobalt->have_hsma_rx = true; 624 s->pad_source = ADV7842_PAD_SOURCE; 625 s->is_dummy = false; 626 cobalt->streams[4 + COBALT_AUDIO_IN_STREAM].is_dummy = false; 627 /* Reset channel video module */ 628 cobalt_s_bit_sysctrl(cobalt, 629 COBALT_SYS_CTRL_VIDEO_RX_RESETN_BIT(4), 0); 630 mdelay(2); 631 cobalt_s_bit_sysctrl(cobalt, 632 COBALT_SYS_CTRL_VIDEO_RX_RESETN_BIT(4), 1); 633 mdelay(1); 634 return err; 635 } 636 cobalt_s_bit_sysctrl(cobalt, COBALT_SYS_CTRL_NRESET_TO_HDMI_BIT(4), 0); 637 cobalt_s_bit_sysctrl(cobalt, COBALT_SYS_CTRL_PWRDN0_TO_HSMA_TX_BIT, 0); 638 s++; 639 s->i2c_adap = &cobalt->i2c_adap[COBALT_NUM_ADAPTERS - 1]; 640 s->sd = v4l2_i2c_new_subdev_board(&cobalt->v4l2_dev, 641 s->i2c_adap, &adv7511_info, NULL); 642 if (s->sd) { 643 /* A transmitter is hooked up, so we can set this bit */ 644 cobalt_s_bit_sysctrl(cobalt, 645 COBALT_SYS_CTRL_HSMA_TX_ENABLE_BIT, 1); 646 cobalt_s_bit_sysctrl(cobalt, 647 COBALT_SYS_CTRL_VIDEO_RX_RESETN_BIT(4), 0); 648 cobalt_s_bit_sysctrl(cobalt, 649 COBALT_SYS_CTRL_VIDEO_TX_RESETN_BIT, 1); 650 cobalt->have_hsma_tx = true; 651 v4l2_subdev_call(s->sd, core, s_power, 1); 652 v4l2_subdev_call(s->sd, video, s_stream, 1); 653 v4l2_subdev_call(s->sd, audio, s_stream, 1); 654 v4l2_ctrl_s_ctrl(v4l2_ctrl_find(s->sd->ctrl_handler, 655 V4L2_CID_DV_TX_MODE), V4L2_DV_TX_MODE_HDMI); 656 s->is_dummy = false; 657 cobalt->streams[COBALT_AUDIO_OUT_STREAM].is_dummy = false; 658 return 0; 659 } 660 return -ENODEV; 661 } 662 663 static int cobalt_probe(struct pci_dev *pci_dev, 664 const struct pci_device_id *pci_id) 665 { 666 struct cobalt *cobalt; 667 int retval = 0; 668 int i; 669 670 /* FIXME - module parameter arrays constrain max instances */ 671 i = atomic_inc_return(&cobalt_instance) - 1; 672 673 cobalt = kzalloc(sizeof(struct cobalt), GFP_KERNEL); 674 if (cobalt == NULL) 675 return -ENOMEM; 676 cobalt->pci_dev = pci_dev; 677 cobalt->instance = i; 678 679 retval = v4l2_device_register(&pci_dev->dev, &cobalt->v4l2_dev); 680 if (retval) { 681 pr_err("cobalt: v4l2_device_register of card %d failed\n", 682 cobalt->instance); 683 kfree(cobalt); 684 return retval; 685 } 686 snprintf(cobalt->v4l2_dev.name, sizeof(cobalt->v4l2_dev.name), 687 "cobalt-%d", cobalt->instance); 688 cobalt->v4l2_dev.notify = cobalt_notify; 689 cobalt_info("Initializing card %d\n", cobalt->instance); 690 691 cobalt->irq_work_queues = 692 create_singlethread_workqueue(cobalt->v4l2_dev.name); 693 if (cobalt->irq_work_queues == NULL) { 694 cobalt_err("Could not create workqueue\n"); 695 retval = -ENOMEM; 696 goto err; 697 } 698 699 INIT_WORK(&cobalt->irq_work_queue, cobalt_irq_work_handler); 700 701 /* PCI Device Setup */ 702 retval = cobalt_setup_pci(cobalt, pci_dev, pci_id); 703 if (retval != 0) 704 goto err_wq; 705 706 /* Show HDL version info */ 707 if (cobalt_hdl_info_get(cobalt)) 708 cobalt_info("Not able to read the HDL info\n"); 709 else 710 cobalt_info("%s", cobalt->hdl_info); 711 712 retval = cobalt_i2c_init(cobalt); 713 if (retval) 714 goto err_pci; 715 716 cobalt_stream_struct_init(cobalt); 717 718 retval = cobalt_subdevs_init(cobalt); 719 if (retval) 720 goto err_i2c; 721 722 if (!(cobalt_read_bar1(cobalt, COBALT_SYS_STAT_BASE) & 723 COBALT_SYSSTAT_HSMA_PRSNTN_MSK)) { 724 retval = cobalt_subdevs_hsma_init(cobalt); 725 if (retval) 726 goto err_i2c; 727 } 728 729 retval = cobalt_nodes_register(cobalt); 730 if (retval) { 731 cobalt_err("Error %d registering device nodes\n", retval); 732 goto err_i2c; 733 } 734 cobalt_set_interrupt(cobalt, true); 735 v4l2_device_call_all(&cobalt->v4l2_dev, 0, core, 736 interrupt_service_routine, 0, NULL); 737 738 cobalt_info("Initialized cobalt card\n"); 739 740 cobalt_flash_probe(cobalt); 741 742 return 0; 743 744 err_i2c: 745 cobalt_i2c_exit(cobalt); 746 cobalt_s_bit_sysctrl(cobalt, COBALT_SYS_CTRL_HSMA_TX_ENABLE_BIT, 0); 747 err_pci: 748 cobalt_free_msi(cobalt, pci_dev); 749 cobalt_pci_iounmap(cobalt, pci_dev); 750 pci_release_regions(cobalt->pci_dev); 751 pci_disable_device(cobalt->pci_dev); 752 err_wq: 753 destroy_workqueue(cobalt->irq_work_queues); 754 err: 755 cobalt_err("error %d on initialization\n", retval); 756 757 v4l2_device_unregister(&cobalt->v4l2_dev); 758 kfree(cobalt); 759 return retval; 760 } 761 762 static void cobalt_remove(struct pci_dev *pci_dev) 763 { 764 struct v4l2_device *v4l2_dev = pci_get_drvdata(pci_dev); 765 struct cobalt *cobalt = to_cobalt(v4l2_dev); 766 int i; 767 768 cobalt_flash_remove(cobalt); 769 cobalt_set_interrupt(cobalt, false); 770 flush_workqueue(cobalt->irq_work_queues); 771 cobalt_nodes_unregister(cobalt); 772 for (i = 0; i < COBALT_NUM_ADAPTERS; i++) { 773 struct v4l2_subdev *sd = cobalt->streams[i].sd; 774 struct i2c_client *client; 775 776 if (sd == NULL) 777 continue; 778 client = v4l2_get_subdevdata(sd); 779 v4l2_device_unregister_subdev(sd); 780 i2c_unregister_device(client); 781 } 782 cobalt_i2c_exit(cobalt); 783 cobalt_free_msi(cobalt, pci_dev); 784 cobalt_s_bit_sysctrl(cobalt, COBALT_SYS_CTRL_HSMA_TX_ENABLE_BIT, 0); 785 cobalt_pci_iounmap(cobalt, pci_dev); 786 pci_release_regions(cobalt->pci_dev); 787 pci_disable_device(cobalt->pci_dev); 788 destroy_workqueue(cobalt->irq_work_queues); 789 790 cobalt_info("removed cobalt card\n"); 791 792 v4l2_device_unregister(v4l2_dev); 793 kfree(cobalt); 794 } 795 796 /* define a pci_driver for card detection */ 797 static struct pci_driver cobalt_pci_driver = { 798 .name = "cobalt", 799 .id_table = cobalt_pci_tbl, 800 .probe = cobalt_probe, 801 .remove = cobalt_remove, 802 }; 803 804 module_pci_driver(cobalt_pci_driver); 805