1 // SPDX-License-Identifier: GPL-2.0 2 // 3 // tvp5150 - Texas Instruments TVP5150A/AM1 and TVP5151 video decoder driver 4 // 5 // Copyright (c) 2005,2006 Mauro Carvalho Chehab <mchehab@kernel.org> 6 7 #include <dt-bindings/media/tvp5150.h> 8 #include <linux/i2c.h> 9 #include <linux/slab.h> 10 #include <linux/videodev2.h> 11 #include <linux/delay.h> 12 #include <linux/gpio/consumer.h> 13 #include <linux/interrupt.h> 14 #include <linux/module.h> 15 #include <linux/of_graph.h> 16 #include <linux/regmap.h> 17 #include <media/v4l2-async.h> 18 #include <media/v4l2-device.h> 19 #include <media/v4l2-ctrls.h> 20 #include <media/v4l2-fwnode.h> 21 #include <media/v4l2-mc.h> 22 23 #include "tvp5150_reg.h" 24 25 #define TVP5150_H_MAX 720U 26 #define TVP5150_V_MAX_525_60 480U 27 #define TVP5150_V_MAX_OTHERS 576U 28 #define TVP5150_MAX_CROP_LEFT 511 29 #define TVP5150_MAX_CROP_TOP 127 30 #define TVP5150_CROP_SHIFT 2 31 #define TVP5150_MBUS_FMT MEDIA_BUS_FMT_UYVY8_2X8 32 #define TVP5150_FIELD V4L2_FIELD_ALTERNATE 33 #define TVP5150_COLORSPACE V4L2_COLORSPACE_SMPTE170M 34 35 MODULE_DESCRIPTION("Texas Instruments TVP5150A/TVP5150AM1/TVP5151 video decoder driver"); 36 MODULE_AUTHOR("Mauro Carvalho Chehab"); 37 MODULE_LICENSE("GPL v2"); 38 39 40 static int debug; 41 module_param(debug, int, 0644); 42 MODULE_PARM_DESC(debug, "Debug level (0-2)"); 43 44 #define dprintk0(__dev, __arg...) dev_dbg_lvl(__dev, 0, 0, __arg) 45 46 enum tvp5150_pads { 47 TVP5150_PAD_IF_INPUT, 48 TVP5150_PAD_VID_OUT, 49 TVP5150_NUM_PADS 50 }; 51 52 struct tvp5150 { 53 struct v4l2_subdev sd; 54 #ifdef CONFIG_MEDIA_CONTROLLER 55 struct media_pad pads[TVP5150_NUM_PADS]; 56 #endif 57 struct v4l2_ctrl_handler hdl; 58 struct v4l2_rect rect; 59 struct regmap *regmap; 60 int irq; 61 62 v4l2_std_id norm; /* Current set standard */ 63 v4l2_std_id detected_norm; 64 u32 input; 65 u32 output; 66 u32 oe; 67 int enable; 68 bool lock; 69 70 u16 dev_id; 71 u16 rom_ver; 72 73 enum v4l2_mbus_type mbus_type; 74 }; 75 76 static inline struct tvp5150 *to_tvp5150(struct v4l2_subdev *sd) 77 { 78 return container_of(sd, struct tvp5150, sd); 79 } 80 81 static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl) 82 { 83 return &container_of(ctrl->handler, struct tvp5150, hdl)->sd; 84 } 85 86 static int tvp5150_read(struct v4l2_subdev *sd, unsigned char addr) 87 { 88 struct tvp5150 *decoder = to_tvp5150(sd); 89 int ret, val; 90 91 ret = regmap_read(decoder->regmap, addr, &val); 92 if (ret < 0) 93 return ret; 94 95 return val; 96 } 97 98 static void dump_reg_range(struct v4l2_subdev *sd, char *s, u8 init, 99 const u8 end, int max_line) 100 { 101 u8 buf[16]; 102 int i = 0, j, len; 103 104 if (max_line > 16) { 105 dprintk0(sd->dev, "too much data to dump\n"); 106 return; 107 } 108 109 for (i = init; i < end; i += max_line) { 110 len = (end - i > max_line) ? max_line : end - i; 111 112 for (j = 0; j < len; j++) 113 buf[j] = tvp5150_read(sd, i + j); 114 115 dprintk0(sd->dev, "%s reg %02x = %*ph\n", s, i, len, buf); 116 } 117 } 118 119 static int tvp5150_log_status(struct v4l2_subdev *sd) 120 { 121 dprintk0(sd->dev, "tvp5150: Video input source selection #1 = 0x%02x\n", 122 tvp5150_read(sd, TVP5150_VD_IN_SRC_SEL_1)); 123 dprintk0(sd->dev, "tvp5150: Analog channel controls = 0x%02x\n", 124 tvp5150_read(sd, TVP5150_ANAL_CHL_CTL)); 125 dprintk0(sd->dev, "tvp5150: Operation mode controls = 0x%02x\n", 126 tvp5150_read(sd, TVP5150_OP_MODE_CTL)); 127 dprintk0(sd->dev, "tvp5150: Miscellaneous controls = 0x%02x\n", 128 tvp5150_read(sd, TVP5150_MISC_CTL)); 129 dprintk0(sd->dev, "tvp5150: Autoswitch mask= 0x%02x\n", 130 tvp5150_read(sd, TVP5150_AUTOSW_MSK)); 131 dprintk0(sd->dev, "tvp5150: Color killer threshold control = 0x%02x\n", 132 tvp5150_read(sd, TVP5150_COLOR_KIL_THSH_CTL)); 133 dprintk0(sd->dev, "tvp5150: Luminance processing controls #1 #2 and #3 = %02x %02x %02x\n", 134 tvp5150_read(sd, TVP5150_LUMA_PROC_CTL_1), 135 tvp5150_read(sd, TVP5150_LUMA_PROC_CTL_2), 136 tvp5150_read(sd, TVP5150_LUMA_PROC_CTL_3)); 137 dprintk0(sd->dev, "tvp5150: Brightness control = 0x%02x\n", 138 tvp5150_read(sd, TVP5150_BRIGHT_CTL)); 139 dprintk0(sd->dev, "tvp5150: Color saturation control = 0x%02x\n", 140 tvp5150_read(sd, TVP5150_SATURATION_CTL)); 141 dprintk0(sd->dev, "tvp5150: Hue control = 0x%02x\n", 142 tvp5150_read(sd, TVP5150_HUE_CTL)); 143 dprintk0(sd->dev, "tvp5150: Contrast control = 0x%02x\n", 144 tvp5150_read(sd, TVP5150_CONTRAST_CTL)); 145 dprintk0(sd->dev, "tvp5150: Outputs and data rates select = 0x%02x\n", 146 tvp5150_read(sd, TVP5150_DATA_RATE_SEL)); 147 dprintk0(sd->dev, "tvp5150: Configuration shared pins = 0x%02x\n", 148 tvp5150_read(sd, TVP5150_CONF_SHARED_PIN)); 149 dprintk0(sd->dev, "tvp5150: Active video cropping start = 0x%02x%02x\n", 150 tvp5150_read(sd, TVP5150_ACT_VD_CROP_ST_MSB), 151 tvp5150_read(sd, TVP5150_ACT_VD_CROP_ST_LSB)); 152 dprintk0(sd->dev, "tvp5150: Active video cropping stop = 0x%02x%02x\n", 153 tvp5150_read(sd, TVP5150_ACT_VD_CROP_STP_MSB), 154 tvp5150_read(sd, TVP5150_ACT_VD_CROP_STP_LSB)); 155 dprintk0(sd->dev, "tvp5150: Genlock/RTC = 0x%02x\n", 156 tvp5150_read(sd, TVP5150_GENLOCK)); 157 dprintk0(sd->dev, "tvp5150: Horizontal sync start = 0x%02x\n", 158 tvp5150_read(sd, TVP5150_HORIZ_SYNC_START)); 159 dprintk0(sd->dev, "tvp5150: Vertical blanking start = 0x%02x\n", 160 tvp5150_read(sd, TVP5150_VERT_BLANKING_START)); 161 dprintk0(sd->dev, "tvp5150: Vertical blanking stop = 0x%02x\n", 162 tvp5150_read(sd, TVP5150_VERT_BLANKING_STOP)); 163 dprintk0(sd->dev, "tvp5150: Chrominance processing control #1 and #2 = %02x %02x\n", 164 tvp5150_read(sd, TVP5150_CHROMA_PROC_CTL_1), 165 tvp5150_read(sd, TVP5150_CHROMA_PROC_CTL_2)); 166 dprintk0(sd->dev, "tvp5150: Interrupt reset register B = 0x%02x\n", 167 tvp5150_read(sd, TVP5150_INT_RESET_REG_B)); 168 dprintk0(sd->dev, "tvp5150: Interrupt enable register B = 0x%02x\n", 169 tvp5150_read(sd, TVP5150_INT_ENABLE_REG_B)); 170 dprintk0(sd->dev, "tvp5150: Interrupt configuration register B = 0x%02x\n", 171 tvp5150_read(sd, TVP5150_INTT_CONFIG_REG_B)); 172 dprintk0(sd->dev, "tvp5150: Video standard = 0x%02x\n", 173 tvp5150_read(sd, TVP5150_VIDEO_STD)); 174 dprintk0(sd->dev, "tvp5150: Chroma gain factor: Cb=0x%02x Cr=0x%02x\n", 175 tvp5150_read(sd, TVP5150_CB_GAIN_FACT), 176 tvp5150_read(sd, TVP5150_CR_GAIN_FACTOR)); 177 dprintk0(sd->dev, "tvp5150: Macrovision on counter = 0x%02x\n", 178 tvp5150_read(sd, TVP5150_MACROVISION_ON_CTR)); 179 dprintk0(sd->dev, "tvp5150: Macrovision off counter = 0x%02x\n", 180 tvp5150_read(sd, TVP5150_MACROVISION_OFF_CTR)); 181 dprintk0(sd->dev, "tvp5150: ITU-R BT.656.%d timing(TVP5150AM1 only)\n", 182 (tvp5150_read(sd, TVP5150_REV_SELECT) & 1) ? 3 : 4); 183 dprintk0(sd->dev, "tvp5150: Device ID = %02x%02x\n", 184 tvp5150_read(sd, TVP5150_MSB_DEV_ID), 185 tvp5150_read(sd, TVP5150_LSB_DEV_ID)); 186 dprintk0(sd->dev, "tvp5150: ROM version = (hex) %02x.%02x\n", 187 tvp5150_read(sd, TVP5150_ROM_MAJOR_VER), 188 tvp5150_read(sd, TVP5150_ROM_MINOR_VER)); 189 dprintk0(sd->dev, "tvp5150: Vertical line count = 0x%02x%02x\n", 190 tvp5150_read(sd, TVP5150_VERT_LN_COUNT_MSB), 191 tvp5150_read(sd, TVP5150_VERT_LN_COUNT_LSB)); 192 dprintk0(sd->dev, "tvp5150: Interrupt status register B = 0x%02x\n", 193 tvp5150_read(sd, TVP5150_INT_STATUS_REG_B)); 194 dprintk0(sd->dev, "tvp5150: Interrupt active register B = 0x%02x\n", 195 tvp5150_read(sd, TVP5150_INT_ACTIVE_REG_B)); 196 dprintk0(sd->dev, "tvp5150: Status regs #1 to #5 = %02x %02x %02x %02x %02x\n", 197 tvp5150_read(sd, TVP5150_STATUS_REG_1), 198 tvp5150_read(sd, TVP5150_STATUS_REG_2), 199 tvp5150_read(sd, TVP5150_STATUS_REG_3), 200 tvp5150_read(sd, TVP5150_STATUS_REG_4), 201 tvp5150_read(sd, TVP5150_STATUS_REG_5)); 202 203 dump_reg_range(sd, "Teletext filter 1", TVP5150_TELETEXT_FIL1_INI, 204 TVP5150_TELETEXT_FIL1_END, 8); 205 dump_reg_range(sd, "Teletext filter 2", TVP5150_TELETEXT_FIL2_INI, 206 TVP5150_TELETEXT_FIL2_END, 8); 207 208 dprintk0(sd->dev, "tvp5150: Teletext filter enable = 0x%02x\n", 209 tvp5150_read(sd, TVP5150_TELETEXT_FIL_ENA)); 210 dprintk0(sd->dev, "tvp5150: Interrupt status register A = 0x%02x\n", 211 tvp5150_read(sd, TVP5150_INT_STATUS_REG_A)); 212 dprintk0(sd->dev, "tvp5150: Interrupt enable register A = 0x%02x\n", 213 tvp5150_read(sd, TVP5150_INT_ENABLE_REG_A)); 214 dprintk0(sd->dev, "tvp5150: Interrupt configuration = 0x%02x\n", 215 tvp5150_read(sd, TVP5150_INT_CONF)); 216 dprintk0(sd->dev, "tvp5150: VDP status register = 0x%02x\n", 217 tvp5150_read(sd, TVP5150_VDP_STATUS_REG)); 218 dprintk0(sd->dev, "tvp5150: FIFO word count = 0x%02x\n", 219 tvp5150_read(sd, TVP5150_FIFO_WORD_COUNT)); 220 dprintk0(sd->dev, "tvp5150: FIFO interrupt threshold = 0x%02x\n", 221 tvp5150_read(sd, TVP5150_FIFO_INT_THRESHOLD)); 222 dprintk0(sd->dev, "tvp5150: FIFO reset = 0x%02x\n", 223 tvp5150_read(sd, TVP5150_FIFO_RESET)); 224 dprintk0(sd->dev, "tvp5150: Line number interrupt = 0x%02x\n", 225 tvp5150_read(sd, TVP5150_LINE_NUMBER_INT)); 226 dprintk0(sd->dev, "tvp5150: Pixel alignment register = 0x%02x%02x\n", 227 tvp5150_read(sd, TVP5150_PIX_ALIGN_REG_HIGH), 228 tvp5150_read(sd, TVP5150_PIX_ALIGN_REG_LOW)); 229 dprintk0(sd->dev, "tvp5150: FIFO output control = 0x%02x\n", 230 tvp5150_read(sd, TVP5150_FIFO_OUT_CTRL)); 231 dprintk0(sd->dev, "tvp5150: Full field enable = 0x%02x\n", 232 tvp5150_read(sd, TVP5150_FULL_FIELD_ENA)); 233 dprintk0(sd->dev, "tvp5150: Full field mode register = 0x%02x\n", 234 tvp5150_read(sd, TVP5150_FULL_FIELD_MODE_REG)); 235 236 dump_reg_range(sd, "CC data", TVP5150_CC_DATA_INI, 237 TVP5150_CC_DATA_END, 8); 238 239 dump_reg_range(sd, "WSS data", TVP5150_WSS_DATA_INI, 240 TVP5150_WSS_DATA_END, 8); 241 242 dump_reg_range(sd, "VPS data", TVP5150_VPS_DATA_INI, 243 TVP5150_VPS_DATA_END, 8); 244 245 dump_reg_range(sd, "VITC data", TVP5150_VITC_DATA_INI, 246 TVP5150_VITC_DATA_END, 10); 247 248 dump_reg_range(sd, "Line mode", TVP5150_LINE_MODE_INI, 249 TVP5150_LINE_MODE_END, 8); 250 return 0; 251 } 252 253 /**************************************************************************** 254 Basic functions 255 ****************************************************************************/ 256 257 static void tvp5150_selmux(struct v4l2_subdev *sd) 258 { 259 int opmode = 0; 260 struct tvp5150 *decoder = to_tvp5150(sd); 261 unsigned int mask, val; 262 int input = 0; 263 264 /* Only tvp5150am1 and tvp5151 have signal generator support */ 265 if ((decoder->dev_id == 0x5150 && decoder->rom_ver == 0x0400) || 266 (decoder->dev_id == 0x5151 && decoder->rom_ver == 0x0100)) { 267 if (!decoder->enable) 268 input = 8; 269 } 270 271 switch (decoder->input) { 272 case TVP5150_COMPOSITE1: 273 input |= 2; 274 /* fall through */ 275 case TVP5150_COMPOSITE0: 276 break; 277 case TVP5150_SVIDEO: 278 default: 279 input |= 1; 280 break; 281 } 282 283 dev_dbg_lvl(sd->dev, 1, debug, "Selecting video route: route input=%i, output=%i => tvp5150 input=%i, opmode=%i\n", 284 decoder->input, decoder->output, 285 input, opmode); 286 287 regmap_write(decoder->regmap, TVP5150_OP_MODE_CTL, opmode); 288 regmap_write(decoder->regmap, TVP5150_VD_IN_SRC_SEL_1, input); 289 290 /* 291 * Setup the FID/GLCO/VLK/HVLK and INTREQ/GPCL/VBLK output signals. For 292 * S-Video we output the vertical lock (VLK) signal on FID/GLCO/VLK/HVLK 293 * and set INTREQ/GPCL/VBLK to logic 0. For composite we output the 294 * field indicator (FID) signal on FID/GLCO/VLK/HVLK and set 295 * INTREQ/GPCL/VBLK to logic 1. 296 */ 297 mask = TVP5150_MISC_CTL_GPCL | TVP5150_MISC_CTL_HVLK; 298 if (decoder->input == TVP5150_SVIDEO) 299 val = TVP5150_MISC_CTL_HVLK; 300 else 301 val = TVP5150_MISC_CTL_GPCL; 302 regmap_update_bits(decoder->regmap, TVP5150_MISC_CTL, mask, val); 303 }; 304 305 struct i2c_reg_value { 306 unsigned char reg; 307 unsigned char value; 308 }; 309 310 /* Default values as sugested at TVP5150AM1 datasheet */ 311 static const struct i2c_reg_value tvp5150_init_default[] = { 312 { /* 0x00 */ 313 TVP5150_VD_IN_SRC_SEL_1, 0x00 314 }, 315 { /* 0x01 */ 316 TVP5150_ANAL_CHL_CTL, 0x15 317 }, 318 { /* 0x02 */ 319 TVP5150_OP_MODE_CTL, 0x00 320 }, 321 { /* 0x03 */ 322 TVP5150_MISC_CTL, 0x01 323 }, 324 { /* 0x06 */ 325 TVP5150_COLOR_KIL_THSH_CTL, 0x10 326 }, 327 { /* 0x07 */ 328 TVP5150_LUMA_PROC_CTL_1, 0x60 329 }, 330 { /* 0x08 */ 331 TVP5150_LUMA_PROC_CTL_2, 0x00 332 }, 333 { /* 0x09 */ 334 TVP5150_BRIGHT_CTL, 0x80 335 }, 336 { /* 0x0a */ 337 TVP5150_SATURATION_CTL, 0x80 338 }, 339 { /* 0x0b */ 340 TVP5150_HUE_CTL, 0x00 341 }, 342 { /* 0x0c */ 343 TVP5150_CONTRAST_CTL, 0x80 344 }, 345 { /* 0x0d */ 346 TVP5150_DATA_RATE_SEL, 0x47 347 }, 348 { /* 0x0e */ 349 TVP5150_LUMA_PROC_CTL_3, 0x00 350 }, 351 { /* 0x0f */ 352 TVP5150_CONF_SHARED_PIN, 0x08 353 }, 354 { /* 0x11 */ 355 TVP5150_ACT_VD_CROP_ST_MSB, 0x00 356 }, 357 { /* 0x12 */ 358 TVP5150_ACT_VD_CROP_ST_LSB, 0x00 359 }, 360 { /* 0x13 */ 361 TVP5150_ACT_VD_CROP_STP_MSB, 0x00 362 }, 363 { /* 0x14 */ 364 TVP5150_ACT_VD_CROP_STP_LSB, 0x00 365 }, 366 { /* 0x15 */ 367 TVP5150_GENLOCK, 0x01 368 }, 369 { /* 0x16 */ 370 TVP5150_HORIZ_SYNC_START, 0x80 371 }, 372 { /* 0x18 */ 373 TVP5150_VERT_BLANKING_START, 0x00 374 }, 375 { /* 0x19 */ 376 TVP5150_VERT_BLANKING_STOP, 0x00 377 }, 378 { /* 0x1a */ 379 TVP5150_CHROMA_PROC_CTL_1, 0x0c 380 }, 381 { /* 0x1b */ 382 TVP5150_CHROMA_PROC_CTL_2, 0x14 383 }, 384 { /* 0x1c */ 385 TVP5150_INT_RESET_REG_B, 0x00 386 }, 387 { /* 0x1d */ 388 TVP5150_INT_ENABLE_REG_B, 0x00 389 }, 390 { /* 0x1e */ 391 TVP5150_INTT_CONFIG_REG_B, 0x00 392 }, 393 { /* 0x28 */ 394 TVP5150_VIDEO_STD, 0x00 395 }, 396 { /* 0x2e */ 397 TVP5150_MACROVISION_ON_CTR, 0x0f 398 }, 399 { /* 0x2f */ 400 TVP5150_MACROVISION_OFF_CTR, 0x01 401 }, 402 { /* 0xbb */ 403 TVP5150_TELETEXT_FIL_ENA, 0x00 404 }, 405 { /* 0xc0 */ 406 TVP5150_INT_STATUS_REG_A, 0x00 407 }, 408 { /* 0xc1 */ 409 TVP5150_INT_ENABLE_REG_A, 0x00 410 }, 411 { /* 0xc2 */ 412 TVP5150_INT_CONF, 0x04 413 }, 414 { /* 0xc8 */ 415 TVP5150_FIFO_INT_THRESHOLD, 0x80 416 }, 417 { /* 0xc9 */ 418 TVP5150_FIFO_RESET, 0x00 419 }, 420 { /* 0xca */ 421 TVP5150_LINE_NUMBER_INT, 0x00 422 }, 423 { /* 0xcb */ 424 TVP5150_PIX_ALIGN_REG_LOW, 0x4e 425 }, 426 { /* 0xcc */ 427 TVP5150_PIX_ALIGN_REG_HIGH, 0x00 428 }, 429 { /* 0xcd */ 430 TVP5150_FIFO_OUT_CTRL, 0x01 431 }, 432 { /* 0xcf */ 433 TVP5150_FULL_FIELD_ENA, 0x00 434 }, 435 { /* 0xd0 */ 436 TVP5150_LINE_MODE_INI, 0x00 437 }, 438 { /* 0xfc */ 439 TVP5150_FULL_FIELD_MODE_REG, 0x7f 440 }, 441 { /* end of data */ 442 0xff, 0xff 443 } 444 }; 445 446 /* Default values as sugested at TVP5150AM1 datasheet */ 447 static const struct i2c_reg_value tvp5150_init_enable[] = { 448 { /* Automatic offset and AGC enabled */ 449 TVP5150_ANAL_CHL_CTL, 0x15 450 }, { /* Activate YCrCb output 0x9 or 0xd ? */ 451 TVP5150_MISC_CTL, TVP5150_MISC_CTL_GPCL | 452 TVP5150_MISC_CTL_INTREQ_OE | 453 TVP5150_MISC_CTL_YCBCR_OE | 454 TVP5150_MISC_CTL_SYNC_OE | 455 TVP5150_MISC_CTL_VBLANK | 456 TVP5150_MISC_CTL_CLOCK_OE, 457 }, { /* Activates video std autodetection for all standards */ 458 TVP5150_AUTOSW_MSK, 0x0 459 }, { /* Default format: 0x47. For 4:2:2: 0x40 */ 460 TVP5150_DATA_RATE_SEL, 0x47 461 }, { 462 TVP5150_CHROMA_PROC_CTL_1, 0x0c 463 }, { 464 TVP5150_CHROMA_PROC_CTL_2, 0x54 465 }, { /* Non documented, but initialized on WinTV USB2 */ 466 0x27, 0x20 467 }, { 468 0xff, 0xff 469 } 470 }; 471 472 struct tvp5150_vbi_type { 473 unsigned int vbi_type; 474 unsigned int ini_line; 475 unsigned int end_line; 476 unsigned int by_field :1; 477 }; 478 479 struct i2c_vbi_ram_value { 480 u16 reg; 481 struct tvp5150_vbi_type type; 482 unsigned char values[16]; 483 }; 484 485 /* This struct have the values for each supported VBI Standard 486 * by 487 tvp5150_vbi_types should follow the same order as vbi_ram_default 488 * value 0 means rom position 0x10, value 1 means rom position 0x30 489 * and so on. There are 16 possible locations from 0 to 15. 490 */ 491 492 static struct i2c_vbi_ram_value vbi_ram_default[] = { 493 494 /* 495 * FIXME: Current api doesn't handle all VBI types, those not 496 * yet supported are placed under #if 0 497 */ 498 #if 0 499 [0] = {0x010, /* Teletext, SECAM, WST System A */ 500 {V4L2_SLICED_TELETEXT_SECAM, 6, 23, 1}, 501 { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x26, 502 0xe6, 0xb4, 0x0e, 0x00, 0x00, 0x00, 0x10, 0x00 } 503 }, 504 #endif 505 [1] = {0x030, /* Teletext, PAL, WST System B */ 506 {V4L2_SLICED_TELETEXT_B, 6, 22, 1}, 507 { 0xaa, 0xaa, 0xff, 0xff, 0x27, 0x2e, 0x20, 0x2b, 508 0xa6, 0x72, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00 } 509 }, 510 #if 0 511 [2] = {0x050, /* Teletext, PAL, WST System C */ 512 {V4L2_SLICED_TELETEXT_PAL_C, 6, 22, 1}, 513 { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x22, 514 0xa6, 0x98, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 } 515 }, 516 [3] = {0x070, /* Teletext, NTSC, WST System B */ 517 {V4L2_SLICED_TELETEXT_NTSC_B, 10, 21, 1}, 518 { 0xaa, 0xaa, 0xff, 0xff, 0x27, 0x2e, 0x20, 0x23, 519 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 } 520 }, 521 [4] = {0x090, /* Tetetext, NTSC NABTS System C */ 522 {V4L2_SLICED_TELETEXT_NTSC_C, 10, 21, 1}, 523 { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x22, 524 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x15, 0x00 } 525 }, 526 [5] = {0x0b0, /* Teletext, NTSC-J, NABTS System D */ 527 {V4L2_SLICED_TELETEXT_NTSC_D, 10, 21, 1}, 528 { 0xaa, 0xaa, 0xff, 0xff, 0xa7, 0x2e, 0x20, 0x23, 529 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 } 530 }, 531 [6] = {0x0d0, /* Closed Caption, PAL/SECAM */ 532 {V4L2_SLICED_CAPTION_625, 22, 22, 1}, 533 { 0xaa, 0x2a, 0xff, 0x3f, 0x04, 0x51, 0x6e, 0x02, 534 0xa6, 0x7b, 0x09, 0x00, 0x00, 0x00, 0x27, 0x00 } 535 }, 536 #endif 537 [7] = {0x0f0, /* Closed Caption, NTSC */ 538 {V4L2_SLICED_CAPTION_525, 21, 21, 1}, 539 { 0xaa, 0x2a, 0xff, 0x3f, 0x04, 0x51, 0x6e, 0x02, 540 0x69, 0x8c, 0x09, 0x00, 0x00, 0x00, 0x27, 0x00 } 541 }, 542 [8] = {0x110, /* Wide Screen Signal, PAL/SECAM */ 543 {V4L2_SLICED_WSS_625, 23, 23, 1}, 544 { 0x5b, 0x55, 0xc5, 0xff, 0x00, 0x71, 0x6e, 0x42, 545 0xa6, 0xcd, 0x0f, 0x00, 0x00, 0x00, 0x3a, 0x00 } 546 }, 547 #if 0 548 [9] = {0x130, /* Wide Screen Signal, NTSC C */ 549 {V4L2_SLICED_WSS_525, 20, 20, 1}, 550 { 0x38, 0x00, 0x3f, 0x00, 0x00, 0x71, 0x6e, 0x43, 551 0x69, 0x7c, 0x08, 0x00, 0x00, 0x00, 0x39, 0x00 } 552 }, 553 [10] = {0x150, /* Vertical Interval Timecode (VITC), PAL/SECAM */ 554 {V4l2_SLICED_VITC_625, 6, 22, 0}, 555 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x8f, 0x6d, 0x49, 556 0xa6, 0x85, 0x08, 0x00, 0x00, 0x00, 0x4c, 0x00 } 557 }, 558 [11] = {0x170, /* Vertical Interval Timecode (VITC), NTSC */ 559 {V4l2_SLICED_VITC_525, 10, 20, 0}, 560 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x8f, 0x6d, 0x49, 561 0x69, 0x94, 0x08, 0x00, 0x00, 0x00, 0x4c, 0x00 } 562 }, 563 #endif 564 [12] = {0x190, /* Video Program System (VPS), PAL */ 565 {V4L2_SLICED_VPS, 16, 16, 0}, 566 { 0xaa, 0xaa, 0xff, 0xff, 0xba, 0xce, 0x2b, 0x0d, 567 0xa6, 0xda, 0x0b, 0x00, 0x00, 0x00, 0x60, 0x00 } 568 }, 569 /* 0x1d0 User programmable */ 570 }; 571 572 static int tvp5150_write_inittab(struct v4l2_subdev *sd, 573 const struct i2c_reg_value *regs) 574 { 575 struct tvp5150 *decoder = to_tvp5150(sd); 576 577 while (regs->reg != 0xff) { 578 regmap_write(decoder->regmap, regs->reg, regs->value); 579 regs++; 580 } 581 return 0; 582 } 583 584 static int tvp5150_vdp_init(struct v4l2_subdev *sd) 585 { 586 struct tvp5150 *decoder = to_tvp5150(sd); 587 struct regmap *map = decoder->regmap; 588 unsigned int i; 589 int j; 590 591 /* Disable Full Field */ 592 regmap_write(map, TVP5150_FULL_FIELD_ENA, 0); 593 594 /* Before programming, Line mode should be at 0xff */ 595 for (i = TVP5150_LINE_MODE_INI; i <= TVP5150_LINE_MODE_END; i++) 596 regmap_write(map, i, 0xff); 597 598 /* Load Ram Table */ 599 for (j = 0; j < ARRAY_SIZE(vbi_ram_default); j++) { 600 const struct i2c_vbi_ram_value *regs = &vbi_ram_default[j]; 601 602 if (!regs->type.vbi_type) 603 continue; 604 605 regmap_write(map, TVP5150_CONF_RAM_ADDR_HIGH, regs->reg >> 8); 606 regmap_write(map, TVP5150_CONF_RAM_ADDR_LOW, regs->reg); 607 608 for (i = 0; i < 16; i++) 609 regmap_write(map, TVP5150_VDP_CONF_RAM_DATA, 610 regs->values[i]); 611 } 612 return 0; 613 } 614 615 /* Fills VBI capabilities based on i2c_vbi_ram_value struct */ 616 static int tvp5150_g_sliced_vbi_cap(struct v4l2_subdev *sd, 617 struct v4l2_sliced_vbi_cap *cap) 618 { 619 int line, i; 620 621 dev_dbg_lvl(sd->dev, 1, debug, "g_sliced_vbi_cap\n"); 622 memset(cap, 0, sizeof(*cap)); 623 624 for (i = 0; i < ARRAY_SIZE(vbi_ram_default); i++) { 625 const struct i2c_vbi_ram_value *regs = &vbi_ram_default[i]; 626 627 if (!regs->type.vbi_type) 628 continue; 629 630 for (line = regs->type.ini_line; 631 line <= regs->type.end_line; 632 line++) { 633 cap->service_lines[0][line] |= regs->type.vbi_type; 634 } 635 cap->service_set |= regs->type.vbi_type; 636 } 637 return 0; 638 } 639 640 /* Set vbi processing 641 * type - one of tvp5150_vbi_types 642 * line - line to gather data 643 * fields: bit 0 field1, bit 1, field2 644 * flags (default=0xf0) is a bitmask, were set means: 645 * bit 7: enable filtering null bytes on CC 646 * bit 6: send data also to FIFO 647 * bit 5: don't allow data with errors on FIFO 648 * bit 4: enable ECC when possible 649 * pix_align = pix alignment: 650 * LSB = field1 651 * MSB = field2 652 */ 653 static int tvp5150_set_vbi(struct v4l2_subdev *sd, 654 unsigned int type, u8 flags, int line, 655 const int fields) 656 { 657 struct tvp5150 *decoder = to_tvp5150(sd); 658 v4l2_std_id std = decoder->norm; 659 u8 reg; 660 int i, pos = 0; 661 662 if (std == V4L2_STD_ALL) { 663 dev_err(sd->dev, "VBI can't be configured without knowing number of lines\n"); 664 return 0; 665 } else if (std & V4L2_STD_625_50) { 666 /* Don't follow NTSC Line number convension */ 667 line += 3; 668 } 669 670 if (line < 6 || line > 27) 671 return 0; 672 673 for (i = 0; i < ARRAY_SIZE(vbi_ram_default); i++) { 674 const struct i2c_vbi_ram_value *regs = &vbi_ram_default[i]; 675 676 if (!regs->type.vbi_type) 677 continue; 678 679 if ((type & regs->type.vbi_type) && 680 (line >= regs->type.ini_line) && 681 (line <= regs->type.end_line)) 682 break; 683 pos++; 684 } 685 686 type = pos | (flags & 0xf0); 687 reg = ((line - 6) << 1) + TVP5150_LINE_MODE_INI; 688 689 if (fields & 1) 690 regmap_write(decoder->regmap, reg, type); 691 692 if (fields & 2) 693 regmap_write(decoder->regmap, reg + 1, type); 694 695 return type; 696 } 697 698 static int tvp5150_get_vbi(struct v4l2_subdev *sd, int line) 699 { 700 struct tvp5150 *decoder = to_tvp5150(sd); 701 v4l2_std_id std = decoder->norm; 702 u8 reg; 703 int pos, type = 0; 704 int i, ret = 0; 705 706 if (std == V4L2_STD_ALL) { 707 dev_err(sd->dev, "VBI can't be configured without knowing number of lines\n"); 708 return 0; 709 } else if (std & V4L2_STD_625_50) { 710 /* Don't follow NTSC Line number convension */ 711 line += 3; 712 } 713 714 if (line < 6 || line > 27) 715 return 0; 716 717 reg = ((line - 6) << 1) + TVP5150_LINE_MODE_INI; 718 719 for (i = 0; i <= 1; i++) { 720 ret = tvp5150_read(sd, reg + i); 721 if (ret < 0) { 722 dev_err(sd->dev, "%s: failed with error = %d\n", 723 __func__, ret); 724 return 0; 725 } 726 pos = ret & 0x0f; 727 if (pos < ARRAY_SIZE(vbi_ram_default)) 728 type |= vbi_ram_default[pos].type.vbi_type; 729 } 730 731 return type; 732 } 733 734 static int tvp5150_set_std(struct v4l2_subdev *sd, v4l2_std_id std) 735 { 736 struct tvp5150 *decoder = to_tvp5150(sd); 737 int fmt = 0; 738 739 /* First tests should be against specific std */ 740 741 if (std == V4L2_STD_NTSC_443) { 742 fmt = VIDEO_STD_NTSC_4_43_BIT; 743 } else if (std == V4L2_STD_PAL_M) { 744 fmt = VIDEO_STD_PAL_M_BIT; 745 } else if (std == V4L2_STD_PAL_N || std == V4L2_STD_PAL_Nc) { 746 fmt = VIDEO_STD_PAL_COMBINATION_N_BIT; 747 } else { 748 /* Then, test against generic ones */ 749 if (std & V4L2_STD_NTSC) 750 fmt = VIDEO_STD_NTSC_MJ_BIT; 751 else if (std & V4L2_STD_PAL) 752 fmt = VIDEO_STD_PAL_BDGHIN_BIT; 753 else if (std & V4L2_STD_SECAM) 754 fmt = VIDEO_STD_SECAM_BIT; 755 } 756 757 dev_dbg_lvl(sd->dev, 1, debug, "Set video std register to %d.\n", fmt); 758 regmap_write(decoder->regmap, TVP5150_VIDEO_STD, fmt); 759 return 0; 760 } 761 762 static int tvp5150_g_std(struct v4l2_subdev *sd, v4l2_std_id *std) 763 { 764 struct tvp5150 *decoder = to_tvp5150(sd); 765 766 *std = decoder->norm; 767 768 return 0; 769 } 770 771 static int tvp5150_s_std(struct v4l2_subdev *sd, v4l2_std_id std) 772 { 773 struct tvp5150 *decoder = to_tvp5150(sd); 774 775 if (decoder->norm == std) 776 return 0; 777 778 /* Change cropping height limits */ 779 if (std & V4L2_STD_525_60) 780 decoder->rect.height = TVP5150_V_MAX_525_60; 781 else 782 decoder->rect.height = TVP5150_V_MAX_OTHERS; 783 784 decoder->norm = std; 785 786 return tvp5150_set_std(sd, std); 787 } 788 789 static v4l2_std_id tvp5150_read_std(struct v4l2_subdev *sd) 790 { 791 int val = tvp5150_read(sd, TVP5150_STATUS_REG_5); 792 793 switch (val & 0x0F) { 794 case 0x01: 795 return V4L2_STD_NTSC; 796 case 0x03: 797 return V4L2_STD_PAL; 798 case 0x05: 799 return V4L2_STD_PAL_M; 800 case 0x07: 801 return V4L2_STD_PAL_N | V4L2_STD_PAL_Nc; 802 case 0x09: 803 return V4L2_STD_NTSC_443; 804 case 0xb: 805 return V4L2_STD_SECAM; 806 default: 807 return V4L2_STD_UNKNOWN; 808 } 809 } 810 811 static int query_lock(struct v4l2_subdev *sd) 812 { 813 struct tvp5150 *decoder = to_tvp5150(sd); 814 int status; 815 816 if (decoder->irq) 817 return decoder->lock; 818 819 regmap_read(decoder->regmap, TVP5150_STATUS_REG_1, &status); 820 821 /* For standard detection, we need the 3 locks */ 822 return (status & 0x0e) == 0x0e; 823 } 824 825 static int tvp5150_querystd(struct v4l2_subdev *sd, v4l2_std_id *std_id) 826 { 827 *std_id = query_lock(sd) ? tvp5150_read_std(sd) : V4L2_STD_UNKNOWN; 828 829 return 0; 830 } 831 832 static const struct v4l2_event tvp5150_ev_fmt = { 833 .type = V4L2_EVENT_SOURCE_CHANGE, 834 .u.src_change.changes = V4L2_EVENT_SRC_CH_RESOLUTION, 835 }; 836 837 static irqreturn_t tvp5150_isr(int irq, void *dev_id) 838 { 839 struct tvp5150 *decoder = dev_id; 840 struct regmap *map = decoder->regmap; 841 unsigned int mask, active = 0, status = 0; 842 843 mask = TVP5150_MISC_CTL_YCBCR_OE | TVP5150_MISC_CTL_SYNC_OE | 844 TVP5150_MISC_CTL_CLOCK_OE; 845 846 regmap_read(map, TVP5150_INT_STATUS_REG_A, &status); 847 if (status) { 848 regmap_write(map, TVP5150_INT_STATUS_REG_A, status); 849 850 if (status & TVP5150_INT_A_LOCK) { 851 decoder->lock = !!(status & TVP5150_INT_A_LOCK_STATUS); 852 dev_dbg_lvl(decoder->sd.dev, 1, debug, 853 "sync lo%s signal\n", 854 decoder->lock ? "ck" : "ss"); 855 v4l2_subdev_notify_event(&decoder->sd, &tvp5150_ev_fmt); 856 regmap_update_bits(map, TVP5150_MISC_CTL, mask, 857 decoder->lock ? decoder->oe : 0); 858 } 859 860 return IRQ_HANDLED; 861 } 862 863 regmap_read(map, TVP5150_INT_ACTIVE_REG_B, &active); 864 if (active) { 865 status = 0; 866 regmap_read(map, TVP5150_INT_STATUS_REG_B, &status); 867 if (status) 868 regmap_write(map, TVP5150_INT_RESET_REG_B, status); 869 } 870 871 return IRQ_HANDLED; 872 } 873 874 static int tvp5150_reset(struct v4l2_subdev *sd, u32 val) 875 { 876 struct tvp5150 *decoder = to_tvp5150(sd); 877 struct regmap *map = decoder->regmap; 878 879 /* Initializes TVP5150 to its default values */ 880 tvp5150_write_inittab(sd, tvp5150_init_default); 881 882 if (decoder->irq) { 883 /* Configure pins: FID, VSYNC, INTREQ, SCLK */ 884 regmap_write(map, TVP5150_CONF_SHARED_PIN, 0x0); 885 /* Set interrupt polarity to active high */ 886 regmap_write(map, TVP5150_INT_CONF, TVP5150_VDPOE | 0x1); 887 regmap_write(map, TVP5150_INTT_CONFIG_REG_B, 0x1); 888 } else { 889 /* Configure pins: FID, VSYNC, GPCL/VBLK, SCLK */ 890 regmap_write(map, TVP5150_CONF_SHARED_PIN, 0x2); 891 /* Keep interrupt polarity active low */ 892 regmap_write(map, TVP5150_INT_CONF, TVP5150_VDPOE); 893 regmap_write(map, TVP5150_INTT_CONFIG_REG_B, 0x0); 894 } 895 896 /* Initializes VDP registers */ 897 tvp5150_vdp_init(sd); 898 899 /* Selects decoder input */ 900 tvp5150_selmux(sd); 901 902 /* Initialize image preferences */ 903 v4l2_ctrl_handler_setup(&decoder->hdl); 904 905 return 0; 906 } 907 908 static int tvp5150_enable(struct v4l2_subdev *sd) 909 { 910 struct tvp5150 *decoder = to_tvp5150(sd); 911 v4l2_std_id std; 912 913 /* Initializes TVP5150 to stream enabled values */ 914 tvp5150_write_inittab(sd, tvp5150_init_enable); 915 916 if (decoder->norm == V4L2_STD_ALL) 917 std = tvp5150_read_std(sd); 918 else 919 std = decoder->norm; 920 921 /* Disable autoswitch mode */ 922 tvp5150_set_std(sd, std); 923 924 /* 925 * Enable the YCbCr and clock outputs. In discrete sync mode 926 * (non-BT.656) additionally enable the the sync outputs. 927 */ 928 switch (decoder->mbus_type) { 929 case V4L2_MBUS_PARALLEL: 930 /* 8-bit 4:2:2 YUV with discrete sync output */ 931 regmap_update_bits(decoder->regmap, TVP5150_DATA_RATE_SEL, 932 0x7, 0x0); 933 decoder->oe = TVP5150_MISC_CTL_YCBCR_OE | 934 TVP5150_MISC_CTL_CLOCK_OE | 935 TVP5150_MISC_CTL_SYNC_OE; 936 break; 937 case V4L2_MBUS_BT656: 938 decoder->oe = TVP5150_MISC_CTL_YCBCR_OE | 939 TVP5150_MISC_CTL_CLOCK_OE; 940 break; 941 default: 942 return -EINVAL; 943 } 944 945 return 0; 946 }; 947 948 static int tvp5150_s_ctrl(struct v4l2_ctrl *ctrl) 949 { 950 struct v4l2_subdev *sd = to_sd(ctrl); 951 struct tvp5150 *decoder = to_tvp5150(sd); 952 953 switch (ctrl->id) { 954 case V4L2_CID_BRIGHTNESS: 955 regmap_write(decoder->regmap, TVP5150_BRIGHT_CTL, ctrl->val); 956 return 0; 957 case V4L2_CID_CONTRAST: 958 regmap_write(decoder->regmap, TVP5150_CONTRAST_CTL, ctrl->val); 959 return 0; 960 case V4L2_CID_SATURATION: 961 regmap_write(decoder->regmap, TVP5150_SATURATION_CTL, 962 ctrl->val); 963 return 0; 964 case V4L2_CID_HUE: 965 regmap_write(decoder->regmap, TVP5150_HUE_CTL, ctrl->val); 966 return 0; 967 case V4L2_CID_TEST_PATTERN: 968 decoder->enable = ctrl->val ? false : true; 969 tvp5150_selmux(sd); 970 return 0; 971 } 972 return -EINVAL; 973 } 974 975 static void tvp5150_set_default(v4l2_std_id std, struct v4l2_rect *crop) 976 { 977 /* Default is no cropping */ 978 crop->top = 0; 979 crop->left = 0; 980 crop->width = TVP5150_H_MAX; 981 if (std & V4L2_STD_525_60) 982 crop->height = TVP5150_V_MAX_525_60; 983 else 984 crop->height = TVP5150_V_MAX_OTHERS; 985 } 986 987 static int tvp5150_fill_fmt(struct v4l2_subdev *sd, 988 struct v4l2_subdev_pad_config *cfg, 989 struct v4l2_subdev_format *format) 990 { 991 struct v4l2_mbus_framefmt *f; 992 struct tvp5150 *decoder = to_tvp5150(sd); 993 994 if (!format || (format->pad != TVP5150_PAD_VID_OUT)) 995 return -EINVAL; 996 997 f = &format->format; 998 999 f->width = decoder->rect.width; 1000 f->height = decoder->rect.height / 2; 1001 1002 f->code = TVP5150_MBUS_FMT; 1003 f->field = TVP5150_FIELD; 1004 f->colorspace = TVP5150_COLORSPACE; 1005 1006 dev_dbg_lvl(sd->dev, 1, debug, "width = %d, height = %d\n", f->width, 1007 f->height); 1008 return 0; 1009 } 1010 1011 static int tvp5150_set_selection(struct v4l2_subdev *sd, 1012 struct v4l2_subdev_pad_config *cfg, 1013 struct v4l2_subdev_selection *sel) 1014 { 1015 struct tvp5150 *decoder = to_tvp5150(sd); 1016 struct v4l2_rect rect = sel->r; 1017 v4l2_std_id std; 1018 int hmax; 1019 1020 if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE || 1021 sel->target != V4L2_SEL_TGT_CROP) 1022 return -EINVAL; 1023 1024 dev_dbg_lvl(sd->dev, 1, debug, "%s left=%d, top=%d, width=%d, height=%d\n", 1025 __func__, rect.left, rect.top, rect.width, rect.height); 1026 1027 /* tvp5150 has some special limits */ 1028 rect.left = clamp(rect.left, 0, TVP5150_MAX_CROP_LEFT); 1029 rect.top = clamp(rect.top, 0, TVP5150_MAX_CROP_TOP); 1030 1031 /* Calculate height based on current standard */ 1032 if (decoder->norm == V4L2_STD_ALL) 1033 std = tvp5150_read_std(sd); 1034 else 1035 std = decoder->norm; 1036 1037 if (std & V4L2_STD_525_60) 1038 hmax = TVP5150_V_MAX_525_60; 1039 else 1040 hmax = TVP5150_V_MAX_OTHERS; 1041 1042 /* 1043 * alignments: 1044 * - width = 2 due to UYVY colorspace 1045 * - height, image = no special alignment 1046 */ 1047 v4l_bound_align_image(&rect.width, 1048 TVP5150_H_MAX - TVP5150_MAX_CROP_LEFT - rect.left, 1049 TVP5150_H_MAX - rect.left, 1, &rect.height, 1050 hmax - TVP5150_MAX_CROP_TOP - rect.top, 1051 hmax - rect.top, 0, 0); 1052 1053 regmap_write(decoder->regmap, TVP5150_VERT_BLANKING_START, rect.top); 1054 regmap_write(decoder->regmap, TVP5150_VERT_BLANKING_STOP, 1055 rect.top + rect.height - hmax); 1056 regmap_write(decoder->regmap, TVP5150_ACT_VD_CROP_ST_MSB, 1057 rect.left >> TVP5150_CROP_SHIFT); 1058 regmap_write(decoder->regmap, TVP5150_ACT_VD_CROP_ST_LSB, 1059 rect.left | (1 << TVP5150_CROP_SHIFT)); 1060 regmap_write(decoder->regmap, TVP5150_ACT_VD_CROP_STP_MSB, 1061 (rect.left + rect.width - TVP5150_MAX_CROP_LEFT) >> 1062 TVP5150_CROP_SHIFT); 1063 regmap_write(decoder->regmap, TVP5150_ACT_VD_CROP_STP_LSB, 1064 rect.left + rect.width - TVP5150_MAX_CROP_LEFT); 1065 1066 decoder->rect = rect; 1067 1068 return 0; 1069 } 1070 1071 static int tvp5150_get_selection(struct v4l2_subdev *sd, 1072 struct v4l2_subdev_pad_config *cfg, 1073 struct v4l2_subdev_selection *sel) 1074 { 1075 struct tvp5150 *decoder = container_of(sd, struct tvp5150, sd); 1076 v4l2_std_id std; 1077 1078 if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE) 1079 return -EINVAL; 1080 1081 switch (sel->target) { 1082 case V4L2_SEL_TGT_CROP_BOUNDS: 1083 sel->r.left = 0; 1084 sel->r.top = 0; 1085 sel->r.width = TVP5150_H_MAX; 1086 1087 /* Calculate height based on current standard */ 1088 if (decoder->norm == V4L2_STD_ALL) 1089 std = tvp5150_read_std(sd); 1090 else 1091 std = decoder->norm; 1092 if (std & V4L2_STD_525_60) 1093 sel->r.height = TVP5150_V_MAX_525_60; 1094 else 1095 sel->r.height = TVP5150_V_MAX_OTHERS; 1096 return 0; 1097 case V4L2_SEL_TGT_CROP: 1098 sel->r = decoder->rect; 1099 return 0; 1100 default: 1101 return -EINVAL; 1102 } 1103 } 1104 1105 static int tvp5150_g_mbus_config(struct v4l2_subdev *sd, 1106 struct v4l2_mbus_config *cfg) 1107 { 1108 struct tvp5150 *decoder = to_tvp5150(sd); 1109 1110 cfg->type = decoder->mbus_type; 1111 cfg->flags = V4L2_MBUS_MASTER | V4L2_MBUS_PCLK_SAMPLE_RISING 1112 | V4L2_MBUS_FIELD_EVEN_LOW | V4L2_MBUS_DATA_ACTIVE_HIGH; 1113 1114 return 0; 1115 } 1116 1117 /**************************************************************************** 1118 V4L2 subdev pad ops 1119 ****************************************************************************/ 1120 static int tvp5150_init_cfg(struct v4l2_subdev *sd, 1121 struct v4l2_subdev_pad_config *cfg) 1122 { 1123 struct tvp5150 *decoder = to_tvp5150(sd); 1124 v4l2_std_id std; 1125 1126 /* 1127 * Reset selection to maximum on subdev_open() if autodetection is on 1128 * and a standard change is detected. 1129 */ 1130 if (decoder->norm == V4L2_STD_ALL) { 1131 std = tvp5150_read_std(sd); 1132 if (std != decoder->detected_norm) { 1133 decoder->detected_norm = std; 1134 tvp5150_set_default(std, &decoder->rect); 1135 } 1136 } 1137 1138 return 0; 1139 } 1140 1141 static int tvp5150_enum_mbus_code(struct v4l2_subdev *sd, 1142 struct v4l2_subdev_pad_config *cfg, 1143 struct v4l2_subdev_mbus_code_enum *code) 1144 { 1145 if (code->pad || code->index) 1146 return -EINVAL; 1147 1148 code->code = TVP5150_MBUS_FMT; 1149 return 0; 1150 } 1151 1152 static int tvp5150_enum_frame_size(struct v4l2_subdev *sd, 1153 struct v4l2_subdev_pad_config *cfg, 1154 struct v4l2_subdev_frame_size_enum *fse) 1155 { 1156 struct tvp5150 *decoder = to_tvp5150(sd); 1157 1158 if (fse->index >= 8 || fse->code != TVP5150_MBUS_FMT) 1159 return -EINVAL; 1160 1161 fse->code = TVP5150_MBUS_FMT; 1162 fse->min_width = decoder->rect.width; 1163 fse->max_width = decoder->rect.width; 1164 fse->min_height = decoder->rect.height / 2; 1165 fse->max_height = decoder->rect.height / 2; 1166 1167 return 0; 1168 } 1169 1170 /**************************************************************************** 1171 I2C Command 1172 ****************************************************************************/ 1173 1174 static int tvp5150_s_stream(struct v4l2_subdev *sd, int enable) 1175 { 1176 struct tvp5150 *decoder = to_tvp5150(sd); 1177 unsigned int mask, val = 0, int_val = 0; 1178 1179 mask = TVP5150_MISC_CTL_YCBCR_OE | TVP5150_MISC_CTL_SYNC_OE | 1180 TVP5150_MISC_CTL_CLOCK_OE; 1181 1182 if (enable) { 1183 tvp5150_enable(sd); 1184 1185 /* Enable outputs if decoder is locked */ 1186 if (decoder->irq) 1187 val = decoder->lock ? decoder->oe : 0; 1188 else 1189 val = decoder->oe; 1190 int_val = TVP5150_INT_A_LOCK; 1191 v4l2_subdev_notify_event(&decoder->sd, &tvp5150_ev_fmt); 1192 } 1193 1194 regmap_update_bits(decoder->regmap, TVP5150_MISC_CTL, mask, val); 1195 if (decoder->irq) 1196 /* Enable / Disable lock interrupt */ 1197 regmap_update_bits(decoder->regmap, TVP5150_INT_ENABLE_REG_A, 1198 TVP5150_INT_A_LOCK, int_val); 1199 1200 return 0; 1201 } 1202 1203 static int tvp5150_s_routing(struct v4l2_subdev *sd, 1204 u32 input, u32 output, u32 config) 1205 { 1206 struct tvp5150 *decoder = to_tvp5150(sd); 1207 1208 decoder->input = input; 1209 decoder->output = output; 1210 1211 if (output == TVP5150_BLACK_SCREEN) 1212 decoder->enable = false; 1213 else 1214 decoder->enable = true; 1215 1216 tvp5150_selmux(sd); 1217 return 0; 1218 } 1219 1220 static int tvp5150_s_raw_fmt(struct v4l2_subdev *sd, struct v4l2_vbi_format *fmt) 1221 { 1222 struct tvp5150 *decoder = to_tvp5150(sd); 1223 1224 /* 1225 * this is for capturing 36 raw vbi lines 1226 * if there's a way to cut off the beginning 2 vbi lines 1227 * with the tvp5150 then the vbi line count could be lowered 1228 * to 17 lines/field again, although I couldn't find a register 1229 * which could do that cropping 1230 */ 1231 1232 if (fmt->sample_format == V4L2_PIX_FMT_GREY) 1233 regmap_write(decoder->regmap, TVP5150_LUMA_PROC_CTL_1, 0x70); 1234 if (fmt->count[0] == 18 && fmt->count[1] == 18) { 1235 regmap_write(decoder->regmap, TVP5150_VERT_BLANKING_START, 1236 0x00); 1237 regmap_write(decoder->regmap, TVP5150_VERT_BLANKING_STOP, 0x01); 1238 } 1239 return 0; 1240 } 1241 1242 static int tvp5150_s_sliced_fmt(struct v4l2_subdev *sd, struct v4l2_sliced_vbi_format *svbi) 1243 { 1244 struct tvp5150 *decoder = to_tvp5150(sd); 1245 int i; 1246 1247 if (svbi->service_set != 0) { 1248 for (i = 0; i <= 23; i++) { 1249 svbi->service_lines[1][i] = 0; 1250 svbi->service_lines[0][i] = 1251 tvp5150_set_vbi(sd, svbi->service_lines[0][i], 1252 0xf0, i, 3); 1253 } 1254 /* Enables FIFO */ 1255 regmap_write(decoder->regmap, TVP5150_FIFO_OUT_CTRL, 1); 1256 } else { 1257 /* Disables FIFO*/ 1258 regmap_write(decoder->regmap, TVP5150_FIFO_OUT_CTRL, 0); 1259 1260 /* Disable Full Field */ 1261 regmap_write(decoder->regmap, TVP5150_FULL_FIELD_ENA, 0); 1262 1263 /* Disable Line modes */ 1264 for (i = TVP5150_LINE_MODE_INI; i <= TVP5150_LINE_MODE_END; i++) 1265 regmap_write(decoder->regmap, i, 0xff); 1266 } 1267 return 0; 1268 } 1269 1270 static int tvp5150_g_sliced_fmt(struct v4l2_subdev *sd, struct v4l2_sliced_vbi_format *svbi) 1271 { 1272 int i, mask = 0; 1273 1274 memset(svbi->service_lines, 0, sizeof(svbi->service_lines)); 1275 1276 for (i = 0; i <= 23; i++) { 1277 svbi->service_lines[0][i] = 1278 tvp5150_get_vbi(sd, i); 1279 mask |= svbi->service_lines[0][i]; 1280 } 1281 svbi->service_set = mask; 1282 return 0; 1283 } 1284 1285 #ifdef CONFIG_VIDEO_ADV_DEBUG 1286 static int tvp5150_g_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg) 1287 { 1288 int res; 1289 1290 res = tvp5150_read(sd, reg->reg & 0xff); 1291 if (res < 0) { 1292 dev_err(sd->dev, "%s: failed with error = %d\n", __func__, res); 1293 return res; 1294 } 1295 1296 reg->val = res; 1297 reg->size = 1; 1298 return 0; 1299 } 1300 1301 static int tvp5150_s_register(struct v4l2_subdev *sd, const struct v4l2_dbg_register *reg) 1302 { 1303 struct tvp5150 *decoder = to_tvp5150(sd); 1304 1305 return regmap_write(decoder->regmap, reg->reg & 0xff, reg->val & 0xff); 1306 } 1307 #endif 1308 1309 static int tvp5150_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt) 1310 { 1311 int status = tvp5150_read(sd, 0x88); 1312 1313 vt->signal = ((status & 0x04) && (status & 0x02)) ? 0xffff : 0x0; 1314 return 0; 1315 } 1316 1317 /* ----------------------------------------------------------------------- */ 1318 1319 static const struct v4l2_ctrl_ops tvp5150_ctrl_ops = { 1320 .s_ctrl = tvp5150_s_ctrl, 1321 }; 1322 1323 static const struct v4l2_subdev_core_ops tvp5150_core_ops = { 1324 .log_status = tvp5150_log_status, 1325 .reset = tvp5150_reset, 1326 #ifdef CONFIG_VIDEO_ADV_DEBUG 1327 .g_register = tvp5150_g_register, 1328 .s_register = tvp5150_s_register, 1329 #endif 1330 }; 1331 1332 static const struct v4l2_subdev_tuner_ops tvp5150_tuner_ops = { 1333 .g_tuner = tvp5150_g_tuner, 1334 }; 1335 1336 static const struct v4l2_subdev_video_ops tvp5150_video_ops = { 1337 .s_std = tvp5150_s_std, 1338 .g_std = tvp5150_g_std, 1339 .querystd = tvp5150_querystd, 1340 .s_stream = tvp5150_s_stream, 1341 .s_routing = tvp5150_s_routing, 1342 .g_mbus_config = tvp5150_g_mbus_config, 1343 }; 1344 1345 static const struct v4l2_subdev_vbi_ops tvp5150_vbi_ops = { 1346 .g_sliced_vbi_cap = tvp5150_g_sliced_vbi_cap, 1347 .g_sliced_fmt = tvp5150_g_sliced_fmt, 1348 .s_sliced_fmt = tvp5150_s_sliced_fmt, 1349 .s_raw_fmt = tvp5150_s_raw_fmt, 1350 }; 1351 1352 static const struct v4l2_subdev_pad_ops tvp5150_pad_ops = { 1353 .init_cfg = tvp5150_init_cfg, 1354 .enum_mbus_code = tvp5150_enum_mbus_code, 1355 .enum_frame_size = tvp5150_enum_frame_size, 1356 .set_fmt = tvp5150_fill_fmt, 1357 .get_fmt = tvp5150_fill_fmt, 1358 .get_selection = tvp5150_get_selection, 1359 .set_selection = tvp5150_set_selection, 1360 }; 1361 1362 static const struct v4l2_subdev_ops tvp5150_ops = { 1363 .core = &tvp5150_core_ops, 1364 .tuner = &tvp5150_tuner_ops, 1365 .video = &tvp5150_video_ops, 1366 .vbi = &tvp5150_vbi_ops, 1367 .pad = &tvp5150_pad_ops, 1368 }; 1369 1370 /**************************************************************************** 1371 I2C Client & Driver 1372 ****************************************************************************/ 1373 1374 static const struct regmap_range tvp5150_readable_ranges[] = { 1375 { 1376 .range_min = TVP5150_VD_IN_SRC_SEL_1, 1377 .range_max = TVP5150_AUTOSW_MSK, 1378 }, { 1379 .range_min = TVP5150_COLOR_KIL_THSH_CTL, 1380 .range_max = TVP5150_CONF_SHARED_PIN, 1381 }, { 1382 .range_min = TVP5150_ACT_VD_CROP_ST_MSB, 1383 .range_max = TVP5150_HORIZ_SYNC_START, 1384 }, { 1385 .range_min = TVP5150_VERT_BLANKING_START, 1386 .range_max = TVP5150_INTT_CONFIG_REG_B, 1387 }, { 1388 .range_min = TVP5150_VIDEO_STD, 1389 .range_max = TVP5150_VIDEO_STD, 1390 }, { 1391 .range_min = TVP5150_CB_GAIN_FACT, 1392 .range_max = TVP5150_REV_SELECT, 1393 }, { 1394 .range_min = TVP5150_MSB_DEV_ID, 1395 .range_max = TVP5150_STATUS_REG_5, 1396 }, { 1397 .range_min = TVP5150_CC_DATA_INI, 1398 .range_max = TVP5150_TELETEXT_FIL_ENA, 1399 }, { 1400 .range_min = TVP5150_INT_STATUS_REG_A, 1401 .range_max = TVP5150_FIFO_OUT_CTRL, 1402 }, { 1403 .range_min = TVP5150_FULL_FIELD_ENA, 1404 .range_max = TVP5150_FULL_FIELD_MODE_REG, 1405 }, 1406 }; 1407 1408 static bool tvp5150_volatile_reg(struct device *dev, unsigned int reg) 1409 { 1410 switch (reg) { 1411 case TVP5150_VERT_LN_COUNT_MSB: 1412 case TVP5150_VERT_LN_COUNT_LSB: 1413 case TVP5150_INT_STATUS_REG_A: 1414 case TVP5150_INT_STATUS_REG_B: 1415 case TVP5150_INT_ACTIVE_REG_B: 1416 case TVP5150_STATUS_REG_1: 1417 case TVP5150_STATUS_REG_2: 1418 case TVP5150_STATUS_REG_3: 1419 case TVP5150_STATUS_REG_4: 1420 case TVP5150_STATUS_REG_5: 1421 /* CC, WSS, VPS, VITC data? */ 1422 case TVP5150_VBI_FIFO_READ_DATA: 1423 case TVP5150_VDP_STATUS_REG: 1424 case TVP5150_FIFO_WORD_COUNT: 1425 return true; 1426 default: 1427 return false; 1428 } 1429 } 1430 1431 static const struct regmap_access_table tvp5150_readable_table = { 1432 .yes_ranges = tvp5150_readable_ranges, 1433 .n_yes_ranges = ARRAY_SIZE(tvp5150_readable_ranges), 1434 }; 1435 1436 static struct regmap_config tvp5150_config = { 1437 .reg_bits = 8, 1438 .val_bits = 8, 1439 .max_register = 0xff, 1440 1441 .cache_type = REGCACHE_RBTREE, 1442 1443 .rd_table = &tvp5150_readable_table, 1444 .volatile_reg = tvp5150_volatile_reg, 1445 }; 1446 1447 static int tvp5150_detect_version(struct tvp5150 *core) 1448 { 1449 struct v4l2_subdev *sd = &core->sd; 1450 struct i2c_client *c = v4l2_get_subdevdata(sd); 1451 u8 regs[4]; 1452 int res; 1453 1454 /* 1455 * Read consequent registers - TVP5150_MSB_DEV_ID, TVP5150_LSB_DEV_ID, 1456 * TVP5150_ROM_MAJOR_VER, TVP5150_ROM_MINOR_VER 1457 */ 1458 res = regmap_bulk_read(core->regmap, TVP5150_MSB_DEV_ID, regs, 4); 1459 if (res < 0) { 1460 dev_err(&c->dev, "reading ID registers failed: %d\n", res); 1461 return res; 1462 } 1463 1464 core->dev_id = (regs[0] << 8) | regs[1]; 1465 core->rom_ver = (regs[2] << 8) | regs[3]; 1466 1467 dev_info(sd->dev, "tvp%04x (%u.%u) chip found @ 0x%02x (%s)\n", 1468 core->dev_id, regs[2], regs[3], c->addr << 1, 1469 c->adapter->name); 1470 1471 if (core->dev_id == 0x5150 && core->rom_ver == 0x0321) { 1472 dev_info(sd->dev, "tvp5150a detected.\n"); 1473 } else if (core->dev_id == 0x5150 && core->rom_ver == 0x0400) { 1474 dev_info(sd->dev, "tvp5150am1 detected.\n"); 1475 1476 /* ITU-T BT.656.4 timing */ 1477 regmap_write(core->regmap, TVP5150_REV_SELECT, 0); 1478 } else if (core->dev_id == 0x5151 && core->rom_ver == 0x0100) { 1479 dev_info(sd->dev, "tvp5151 detected.\n"); 1480 } else { 1481 dev_info(sd->dev, "*** unknown tvp%04x chip detected.\n", 1482 core->dev_id); 1483 } 1484 1485 return 0; 1486 } 1487 1488 static int tvp5150_init(struct i2c_client *c) 1489 { 1490 struct gpio_desc *pdn_gpio; 1491 struct gpio_desc *reset_gpio; 1492 1493 pdn_gpio = devm_gpiod_get_optional(&c->dev, "pdn", GPIOD_OUT_HIGH); 1494 if (IS_ERR(pdn_gpio)) 1495 return PTR_ERR(pdn_gpio); 1496 1497 if (pdn_gpio) { 1498 gpiod_set_value_cansleep(pdn_gpio, 0); 1499 /* Delay time between power supplies active and reset */ 1500 msleep(20); 1501 } 1502 1503 reset_gpio = devm_gpiod_get_optional(&c->dev, "reset", GPIOD_OUT_HIGH); 1504 if (IS_ERR(reset_gpio)) 1505 return PTR_ERR(reset_gpio); 1506 1507 if (reset_gpio) { 1508 /* RESETB pulse duration */ 1509 ndelay(500); 1510 gpiod_set_value_cansleep(reset_gpio, 0); 1511 /* Delay time between end of reset to I2C active */ 1512 usleep_range(200, 250); 1513 } 1514 1515 return 0; 1516 } 1517 1518 static int tvp5150_parse_dt(struct tvp5150 *decoder, struct device_node *np) 1519 { 1520 struct v4l2_fwnode_endpoint bus_cfg = { .bus_type = 0 }; 1521 struct device_node *ep; 1522 unsigned int flags; 1523 int ret = 0; 1524 1525 ep = of_graph_get_next_endpoint(np, NULL); 1526 if (!ep) 1527 return -EINVAL; 1528 1529 ret = v4l2_fwnode_endpoint_parse(of_fwnode_handle(ep), &bus_cfg); 1530 if (ret) 1531 goto err; 1532 1533 flags = bus_cfg.bus.parallel.flags; 1534 1535 if (bus_cfg.bus_type == V4L2_MBUS_PARALLEL && 1536 !(flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH && 1537 flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH && 1538 flags & V4L2_MBUS_FIELD_EVEN_LOW)) { 1539 ret = -EINVAL; 1540 goto err; 1541 } 1542 1543 decoder->mbus_type = bus_cfg.bus_type; 1544 1545 err: 1546 of_node_put(ep); 1547 return ret; 1548 } 1549 1550 static const char * const tvp5150_test_patterns[2] = { 1551 "Disabled", 1552 "Black screen" 1553 }; 1554 1555 static int tvp5150_probe(struct i2c_client *c) 1556 { 1557 struct tvp5150 *core; 1558 struct v4l2_subdev *sd; 1559 struct device_node *np = c->dev.of_node; 1560 struct regmap *map; 1561 int res; 1562 1563 /* Check if the adapter supports the needed features */ 1564 if (!i2c_check_functionality(c->adapter, 1565 I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) 1566 return -EIO; 1567 1568 res = tvp5150_init(c); 1569 if (res) 1570 return res; 1571 1572 core = devm_kzalloc(&c->dev, sizeof(*core), GFP_KERNEL); 1573 if (!core) 1574 return -ENOMEM; 1575 1576 map = devm_regmap_init_i2c(c, &tvp5150_config); 1577 if (IS_ERR(map)) 1578 return PTR_ERR(map); 1579 1580 core->regmap = map; 1581 sd = &core->sd; 1582 1583 if (IS_ENABLED(CONFIG_OF) && np) { 1584 res = tvp5150_parse_dt(core, np); 1585 if (res) { 1586 dev_err(sd->dev, "DT parsing error: %d\n", res); 1587 return res; 1588 } 1589 } else { 1590 /* Default to BT.656 embedded sync */ 1591 core->mbus_type = V4L2_MBUS_BT656; 1592 } 1593 1594 v4l2_i2c_subdev_init(sd, c, &tvp5150_ops); 1595 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; 1596 1597 #if defined(CONFIG_MEDIA_CONTROLLER) 1598 core->pads[TVP5150_PAD_IF_INPUT].flags = MEDIA_PAD_FL_SINK; 1599 core->pads[TVP5150_PAD_IF_INPUT].sig_type = PAD_SIGNAL_ANALOG; 1600 core->pads[TVP5150_PAD_VID_OUT].flags = MEDIA_PAD_FL_SOURCE; 1601 core->pads[TVP5150_PAD_VID_OUT].sig_type = PAD_SIGNAL_DV; 1602 1603 sd->entity.function = MEDIA_ENT_F_ATV_DECODER; 1604 1605 res = media_entity_pads_init(&sd->entity, TVP5150_NUM_PADS, core->pads); 1606 if (res < 0) 1607 return res; 1608 1609 #endif 1610 1611 res = tvp5150_detect_version(core); 1612 if (res < 0) 1613 return res; 1614 1615 core->norm = V4L2_STD_ALL; /* Default is autodetect */ 1616 core->detected_norm = V4L2_STD_UNKNOWN; 1617 core->input = TVP5150_COMPOSITE1; 1618 core->enable = true; 1619 1620 v4l2_ctrl_handler_init(&core->hdl, 5); 1621 v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops, 1622 V4L2_CID_BRIGHTNESS, 0, 255, 1, 128); 1623 v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops, 1624 V4L2_CID_CONTRAST, 0, 255, 1, 128); 1625 v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops, 1626 V4L2_CID_SATURATION, 0, 255, 1, 128); 1627 v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops, 1628 V4L2_CID_HUE, -128, 127, 1, 0); 1629 v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops, 1630 V4L2_CID_PIXEL_RATE, 27000000, 1631 27000000, 1, 27000000); 1632 v4l2_ctrl_new_std_menu_items(&core->hdl, &tvp5150_ctrl_ops, 1633 V4L2_CID_TEST_PATTERN, 1634 ARRAY_SIZE(tvp5150_test_patterns) - 1, 1635 0, 0, tvp5150_test_patterns); 1636 sd->ctrl_handler = &core->hdl; 1637 if (core->hdl.error) { 1638 res = core->hdl.error; 1639 goto err; 1640 } 1641 1642 tvp5150_set_default(tvp5150_read_std(sd), &core->rect); 1643 1644 core->irq = c->irq; 1645 tvp5150_reset(sd, 0); /* Calls v4l2_ctrl_handler_setup() */ 1646 if (c->irq) { 1647 res = devm_request_threaded_irq(&c->dev, c->irq, NULL, 1648 tvp5150_isr, IRQF_TRIGGER_HIGH | 1649 IRQF_ONESHOT, "tvp5150", core); 1650 if (res) 1651 goto err; 1652 } 1653 1654 res = v4l2_async_register_subdev(sd); 1655 if (res < 0) 1656 goto err; 1657 1658 if (debug > 1) 1659 tvp5150_log_status(sd); 1660 return 0; 1661 1662 err: 1663 v4l2_ctrl_handler_free(&core->hdl); 1664 return res; 1665 } 1666 1667 static int tvp5150_remove(struct i2c_client *c) 1668 { 1669 struct v4l2_subdev *sd = i2c_get_clientdata(c); 1670 struct tvp5150 *decoder = to_tvp5150(sd); 1671 1672 dev_dbg_lvl(sd->dev, 1, debug, 1673 "tvp5150.c: removing tvp5150 adapter on address 0x%x\n", 1674 c->addr << 1); 1675 1676 v4l2_async_unregister_subdev(sd); 1677 v4l2_ctrl_handler_free(&decoder->hdl); 1678 return 0; 1679 } 1680 1681 /* ----------------------------------------------------------------------- */ 1682 1683 static const struct i2c_device_id tvp5150_id[] = { 1684 { "tvp5150", 0 }, 1685 { } 1686 }; 1687 MODULE_DEVICE_TABLE(i2c, tvp5150_id); 1688 1689 #if IS_ENABLED(CONFIG_OF) 1690 static const struct of_device_id tvp5150_of_match[] = { 1691 { .compatible = "ti,tvp5150", }, 1692 { /* sentinel */ }, 1693 }; 1694 MODULE_DEVICE_TABLE(of, tvp5150_of_match); 1695 #endif 1696 1697 static struct i2c_driver tvp5150_driver = { 1698 .driver = { 1699 .of_match_table = of_match_ptr(tvp5150_of_match), 1700 .name = "tvp5150", 1701 }, 1702 .probe_new = tvp5150_probe, 1703 .remove = tvp5150_remove, 1704 .id_table = tvp5150_id, 1705 }; 1706 1707 module_i2c_driver(tvp5150_driver); 1708