1f2e3bd9aSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
2cb7a01acSMauro Carvalho Chehab /*
3cb7a01acSMauro Carvalho Chehab * drivers/media/i2c/tvp514x.c
4cb7a01acSMauro Carvalho Chehab *
5cb7a01acSMauro Carvalho Chehab * TI TVP5146/47 decoder driver
6cb7a01acSMauro Carvalho Chehab *
7cb7a01acSMauro Carvalho Chehab * Copyright (C) 2008 Texas Instruments Inc
8cb7a01acSMauro Carvalho Chehab * Author: Vaibhav Hiremath <hvaibhav@ti.com>
9cb7a01acSMauro Carvalho Chehab *
10cb7a01acSMauro Carvalho Chehab * Contributors:
11cb7a01acSMauro Carvalho Chehab * Sivaraj R <sivaraj@ti.com>
12cb7a01acSMauro Carvalho Chehab * Brijesh R Jadav <brijesh.j@ti.com>
13cb7a01acSMauro Carvalho Chehab * Hardik Shah <hardik.shah@ti.com>
14cb7a01acSMauro Carvalho Chehab * Manjunath Hadli <mrh@ti.com>
15cb7a01acSMauro Carvalho Chehab * Karicheri Muralidharan <m-karicheri2@ti.com>
165b38b0f8SManjunath Hadli * Prabhakar Lad <prabhakar.lad@ti.com>
17cb7a01acSMauro Carvalho Chehab */
18cb7a01acSMauro Carvalho Chehab
19cb7a01acSMauro Carvalho Chehab #include <linux/i2c.h>
20cb7a01acSMauro Carvalho Chehab #include <linux/slab.h>
21cb7a01acSMauro Carvalho Chehab #include <linux/delay.h>
22cb7a01acSMauro Carvalho Chehab #include <linux/videodev2.h>
23cb7a01acSMauro Carvalho Chehab #include <linux/module.h>
245b38b0f8SManjunath Hadli #include <linux/v4l2-mediabus.h>
25098bcba3SSachin Kamat #include <linux/of.h>
26fd9fdb78SPhilipp Zabel #include <linux/of_graph.h>
27cb7a01acSMauro Carvalho Chehab
288f23acb5SLad, Prabhakar #include <media/v4l2-async.h>
29cb7a01acSMauro Carvalho Chehab #include <media/v4l2-device.h>
30cb7a01acSMauro Carvalho Chehab #include <media/v4l2-common.h>
31cb7a01acSMauro Carvalho Chehab #include <media/v4l2-mediabus.h>
32859969b3SSakari Ailus #include <media/v4l2-fwnode.h>
33cb7a01acSMauro Carvalho Chehab #include <media/v4l2-ctrls.h>
34b5dcee22SMauro Carvalho Chehab #include <media/i2c/tvp514x.h>
355b38b0f8SManjunath Hadli #include <media/media-entity.h>
36cb7a01acSMauro Carvalho Chehab
37cb7a01acSMauro Carvalho Chehab #include "tvp514x_regs.h"
38cb7a01acSMauro Carvalho Chehab
39cb7a01acSMauro Carvalho Chehab /* Private macros for TVP */
40cb7a01acSMauro Carvalho Chehab #define I2C_RETRY_COUNT (5)
41cb7a01acSMauro Carvalho Chehab #define LOCK_RETRY_COUNT (5)
42cb7a01acSMauro Carvalho Chehab #define LOCK_RETRY_DELAY (200)
43cb7a01acSMauro Carvalho Chehab
44cb7a01acSMauro Carvalho Chehab /* Debug functions */
45cb7a01acSMauro Carvalho Chehab static bool debug;
46cb7a01acSMauro Carvalho Chehab module_param(debug, bool, 0644);
47cb7a01acSMauro Carvalho Chehab MODULE_PARM_DESC(debug, "Debug level (0-1)");
48cb7a01acSMauro Carvalho Chehab
49cb7a01acSMauro Carvalho Chehab MODULE_AUTHOR("Texas Instruments");
50cb7a01acSMauro Carvalho Chehab MODULE_DESCRIPTION("TVP514X linux decoder driver");
51cb7a01acSMauro Carvalho Chehab MODULE_LICENSE("GPL");
52cb7a01acSMauro Carvalho Chehab
53cb7a01acSMauro Carvalho Chehab /* enum tvp514x_std - enum for supported standards */
54cb7a01acSMauro Carvalho Chehab enum tvp514x_std {
55cb7a01acSMauro Carvalho Chehab STD_NTSC_MJ = 0,
56cb7a01acSMauro Carvalho Chehab STD_PAL_BDGHIN,
57cb7a01acSMauro Carvalho Chehab STD_INVALID
58cb7a01acSMauro Carvalho Chehab };
59cb7a01acSMauro Carvalho Chehab
60cb7a01acSMauro Carvalho Chehab /**
61f8a7647dSMauro Carvalho Chehab * struct tvp514x_std_info - Structure to store standard information
62cb7a01acSMauro Carvalho Chehab * @width: Line width in pixels
63cb7a01acSMauro Carvalho Chehab * @height:Number of active lines
64cb7a01acSMauro Carvalho Chehab * @video_std: Value to write in REG_VIDEO_STD register
65cb7a01acSMauro Carvalho Chehab * @standard: v4l2 standard structure information
66cb7a01acSMauro Carvalho Chehab */
67cb7a01acSMauro Carvalho Chehab struct tvp514x_std_info {
68cb7a01acSMauro Carvalho Chehab unsigned long width;
69cb7a01acSMauro Carvalho Chehab unsigned long height;
70cb7a01acSMauro Carvalho Chehab u8 video_std;
71cb7a01acSMauro Carvalho Chehab struct v4l2_standard standard;
72cb7a01acSMauro Carvalho Chehab };
73cb7a01acSMauro Carvalho Chehab
74cb7a01acSMauro Carvalho Chehab static struct tvp514x_reg tvp514x_reg_list_default[0x40];
75cb7a01acSMauro Carvalho Chehab
76cb7a01acSMauro Carvalho Chehab static int tvp514x_s_stream(struct v4l2_subdev *sd, int enable);
77cb7a01acSMauro Carvalho Chehab /**
78cb7a01acSMauro Carvalho Chehab * struct tvp514x_decoder - TVP5146/47 decoder object
79cb7a01acSMauro Carvalho Chehab * @sd: Subdevice Slave handle
80c5bb8318SMauro Carvalho Chehab * @hdl: embedded &struct v4l2_ctrl_handler
81cb7a01acSMauro Carvalho Chehab * @tvp514x_regs: copy of hw's regs with preset values.
82cb7a01acSMauro Carvalho Chehab * @pdata: Board specific
83cb7a01acSMauro Carvalho Chehab * @ver: Chip version
84cb7a01acSMauro Carvalho Chehab * @streaming: TVP5146/47 decoder streaming - enabled or disabled.
855b38b0f8SManjunath Hadli * @pix: Current pixel format
865b38b0f8SManjunath Hadli * @num_fmts: Number of formats
875b38b0f8SManjunath Hadli * @fmt_list: Format list
88cb7a01acSMauro Carvalho Chehab * @current_std: Current standard
89cb7a01acSMauro Carvalho Chehab * @num_stds: Number of standards
90cb7a01acSMauro Carvalho Chehab * @std_list: Standards list
91cb7a01acSMauro Carvalho Chehab * @input: Input routing at chip level
92cb7a01acSMauro Carvalho Chehab * @output: Output routing at chip level
93c5bb8318SMauro Carvalho Chehab * @pad: subdev media pad associated with the decoder
94c5bb8318SMauro Carvalho Chehab * @format: media bus frame format
95c5bb8318SMauro Carvalho Chehab * @int_seq: driver's register init sequence
96cb7a01acSMauro Carvalho Chehab */
97cb7a01acSMauro Carvalho Chehab struct tvp514x_decoder {
98cb7a01acSMauro Carvalho Chehab struct v4l2_subdev sd;
99cb7a01acSMauro Carvalho Chehab struct v4l2_ctrl_handler hdl;
100cb7a01acSMauro Carvalho Chehab struct tvp514x_reg tvp514x_regs[ARRAY_SIZE(tvp514x_reg_list_default)];
101cb7a01acSMauro Carvalho Chehab const struct tvp514x_platform_data *pdata;
102cb7a01acSMauro Carvalho Chehab
103cb7a01acSMauro Carvalho Chehab int ver;
104cb7a01acSMauro Carvalho Chehab int streaming;
105cb7a01acSMauro Carvalho Chehab
1065b38b0f8SManjunath Hadli struct v4l2_pix_format pix;
1075b38b0f8SManjunath Hadli int num_fmts;
1085b38b0f8SManjunath Hadli const struct v4l2_fmtdesc *fmt_list;
1095b38b0f8SManjunath Hadli
110cb7a01acSMauro Carvalho Chehab enum tvp514x_std current_std;
111cb7a01acSMauro Carvalho Chehab int num_stds;
112cb7a01acSMauro Carvalho Chehab const struct tvp514x_std_info *std_list;
113cb7a01acSMauro Carvalho Chehab /* Input and Output Routing parameters */
114cb7a01acSMauro Carvalho Chehab u32 input;
115cb7a01acSMauro Carvalho Chehab u32 output;
1165b38b0f8SManjunath Hadli
1175b38b0f8SManjunath Hadli /* mc related members */
1185b38b0f8SManjunath Hadli struct media_pad pad;
1195b38b0f8SManjunath Hadli struct v4l2_mbus_framefmt format;
120f0a12d0cSLars-Peter Clausen
121f0a12d0cSLars-Peter Clausen struct tvp514x_reg *int_seq;
122cb7a01acSMauro Carvalho Chehab };
123cb7a01acSMauro Carvalho Chehab
124cb7a01acSMauro Carvalho Chehab /* TVP514x default register values */
125cb7a01acSMauro Carvalho Chehab static struct tvp514x_reg tvp514x_reg_list_default[] = {
126cb7a01acSMauro Carvalho Chehab /* Composite selected */
127cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_INPUT_SEL, 0x05},
128cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_AFE_GAIN_CTRL, 0x0F},
129cb7a01acSMauro Carvalho Chehab /* Auto mode */
130cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_VIDEO_STD, 0x00},
131cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_OPERATION_MODE, 0x00},
132cb7a01acSMauro Carvalho Chehab {TOK_SKIP, REG_AUTOSWITCH_MASK, 0x3F},
133cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_COLOR_KILLER, 0x10},
134cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_LUMA_CONTROL1, 0x00},
135cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_LUMA_CONTROL2, 0x00},
136cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_LUMA_CONTROL3, 0x02},
137cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_BRIGHTNESS, 0x80},
138cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_CONTRAST, 0x80},
139cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_SATURATION, 0x80},
140cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_HUE, 0x00},
141cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_CHROMA_CONTROL1, 0x00},
142cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_CHROMA_CONTROL2, 0x0E},
143cb7a01acSMauro Carvalho Chehab /* Reserved */
144cb7a01acSMauro Carvalho Chehab {TOK_SKIP, 0x0F, 0x00},
145cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_COMP_PR_SATURATION, 0x80},
146cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_COMP_Y_CONTRAST, 0x80},
147cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_COMP_PB_SATURATION, 0x80},
148cb7a01acSMauro Carvalho Chehab /* Reserved */
149cb7a01acSMauro Carvalho Chehab {TOK_SKIP, 0x13, 0x00},
150cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_COMP_Y_BRIGHTNESS, 0x80},
151cb7a01acSMauro Carvalho Chehab /* Reserved */
152cb7a01acSMauro Carvalho Chehab {TOK_SKIP, 0x15, 0x00},
153cb7a01acSMauro Carvalho Chehab /* NTSC timing */
154cb7a01acSMauro Carvalho Chehab {TOK_SKIP, REG_AVID_START_PIXEL_LSB, 0x55},
155cb7a01acSMauro Carvalho Chehab {TOK_SKIP, REG_AVID_START_PIXEL_MSB, 0x00},
156cb7a01acSMauro Carvalho Chehab {TOK_SKIP, REG_AVID_STOP_PIXEL_LSB, 0x25},
157cb7a01acSMauro Carvalho Chehab {TOK_SKIP, REG_AVID_STOP_PIXEL_MSB, 0x03},
158cb7a01acSMauro Carvalho Chehab /* NTSC timing */
159cb7a01acSMauro Carvalho Chehab {TOK_SKIP, REG_HSYNC_START_PIXEL_LSB, 0x00},
160cb7a01acSMauro Carvalho Chehab {TOK_SKIP, REG_HSYNC_START_PIXEL_MSB, 0x00},
161cb7a01acSMauro Carvalho Chehab {TOK_SKIP, REG_HSYNC_STOP_PIXEL_LSB, 0x40},
162cb7a01acSMauro Carvalho Chehab {TOK_SKIP, REG_HSYNC_STOP_PIXEL_MSB, 0x00},
163cb7a01acSMauro Carvalho Chehab /* NTSC timing */
164cb7a01acSMauro Carvalho Chehab {TOK_SKIP, REG_VSYNC_START_LINE_LSB, 0x04},
165cb7a01acSMauro Carvalho Chehab {TOK_SKIP, REG_VSYNC_START_LINE_MSB, 0x00},
166cb7a01acSMauro Carvalho Chehab {TOK_SKIP, REG_VSYNC_STOP_LINE_LSB, 0x07},
167cb7a01acSMauro Carvalho Chehab {TOK_SKIP, REG_VSYNC_STOP_LINE_MSB, 0x00},
168cb7a01acSMauro Carvalho Chehab /* NTSC timing */
169cb7a01acSMauro Carvalho Chehab {TOK_SKIP, REG_VBLK_START_LINE_LSB, 0x01},
170cb7a01acSMauro Carvalho Chehab {TOK_SKIP, REG_VBLK_START_LINE_MSB, 0x00},
171cb7a01acSMauro Carvalho Chehab {TOK_SKIP, REG_VBLK_STOP_LINE_LSB, 0x15},
172cb7a01acSMauro Carvalho Chehab {TOK_SKIP, REG_VBLK_STOP_LINE_MSB, 0x00},
173cb7a01acSMauro Carvalho Chehab /* Reserved */
174cb7a01acSMauro Carvalho Chehab {TOK_SKIP, 0x26, 0x00},
175cb7a01acSMauro Carvalho Chehab /* Reserved */
176cb7a01acSMauro Carvalho Chehab {TOK_SKIP, 0x27, 0x00},
177cb7a01acSMauro Carvalho Chehab {TOK_SKIP, REG_FAST_SWTICH_CONTROL, 0xCC},
178cb7a01acSMauro Carvalho Chehab /* Reserved */
179cb7a01acSMauro Carvalho Chehab {TOK_SKIP, 0x29, 0x00},
180cb7a01acSMauro Carvalho Chehab {TOK_SKIP, REG_FAST_SWTICH_SCART_DELAY, 0x00},
181cb7a01acSMauro Carvalho Chehab /* Reserved */
182cb7a01acSMauro Carvalho Chehab {TOK_SKIP, 0x2B, 0x00},
183cb7a01acSMauro Carvalho Chehab {TOK_SKIP, REG_SCART_DELAY, 0x00},
184cb7a01acSMauro Carvalho Chehab {TOK_SKIP, REG_CTI_DELAY, 0x00},
185cb7a01acSMauro Carvalho Chehab {TOK_SKIP, REG_CTI_CONTROL, 0x00},
186cb7a01acSMauro Carvalho Chehab /* Reserved */
187cb7a01acSMauro Carvalho Chehab {TOK_SKIP, 0x2F, 0x00},
188cb7a01acSMauro Carvalho Chehab /* Reserved */
189cb7a01acSMauro Carvalho Chehab {TOK_SKIP, 0x30, 0x00},
190cb7a01acSMauro Carvalho Chehab /* Reserved */
191cb7a01acSMauro Carvalho Chehab {TOK_SKIP, 0x31, 0x00},
192cb7a01acSMauro Carvalho Chehab /* HS, VS active high */
193cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_SYNC_CONTROL, 0x00},
194cb7a01acSMauro Carvalho Chehab /* 10-bit BT.656 */
195cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_OUTPUT_FORMATTER1, 0x00},
196cb7a01acSMauro Carvalho Chehab /* Enable clk & data */
197cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_OUTPUT_FORMATTER2, 0x11},
198cb7a01acSMauro Carvalho Chehab /* Enable AVID & FLD */
199cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_OUTPUT_FORMATTER3, 0xEE},
200cb7a01acSMauro Carvalho Chehab /* Enable VS & HS */
201cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_OUTPUT_FORMATTER4, 0xAF},
202cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_OUTPUT_FORMATTER5, 0xFF},
203cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_OUTPUT_FORMATTER6, 0xFF},
204cb7a01acSMauro Carvalho Chehab /* Clear status */
205cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_CLEAR_LOST_LOCK, 0x01},
206cb7a01acSMauro Carvalho Chehab {TOK_TERM, 0, 0},
207cb7a01acSMauro Carvalho Chehab };
208cb7a01acSMauro Carvalho Chehab
209c5bb8318SMauro Carvalho Chehab /*
2105b38b0f8SManjunath Hadli * List of image formats supported by TVP5146/47 decoder
2115b38b0f8SManjunath Hadli * Currently we are using 8 bit mode only, but can be
2125b38b0f8SManjunath Hadli * extended to 10/20 bit mode.
2135b38b0f8SManjunath Hadli */
2145b38b0f8SManjunath Hadli static const struct v4l2_fmtdesc tvp514x_fmt_list[] = {
2155b38b0f8SManjunath Hadli {
2165b38b0f8SManjunath Hadli .index = 0,
2175b38b0f8SManjunath Hadli .type = V4L2_BUF_TYPE_VIDEO_CAPTURE,
2185b38b0f8SManjunath Hadli .flags = 0,
2195b38b0f8SManjunath Hadli .description = "8-bit UYVY 4:2:2 Format",
2205b38b0f8SManjunath Hadli .pixelformat = V4L2_PIX_FMT_UYVY,
2215b38b0f8SManjunath Hadli },
2225b38b0f8SManjunath Hadli };
2235b38b0f8SManjunath Hadli
224c5bb8318SMauro Carvalho Chehab /*
225cb7a01acSMauro Carvalho Chehab * Supported standards -
226cb7a01acSMauro Carvalho Chehab *
227cb7a01acSMauro Carvalho Chehab * Currently supports two standards only, need to add support for rest of the
228cb7a01acSMauro Carvalho Chehab * modes, like SECAM, etc...
229cb7a01acSMauro Carvalho Chehab */
230cb7a01acSMauro Carvalho Chehab static const struct tvp514x_std_info tvp514x_std_list[] = {
231cb7a01acSMauro Carvalho Chehab /* Standard: STD_NTSC_MJ */
232cb7a01acSMauro Carvalho Chehab [STD_NTSC_MJ] = {
233cb7a01acSMauro Carvalho Chehab .width = NTSC_NUM_ACTIVE_PIXELS,
234cb7a01acSMauro Carvalho Chehab .height = NTSC_NUM_ACTIVE_LINES,
235cb7a01acSMauro Carvalho Chehab .video_std = VIDEO_STD_NTSC_MJ_BIT,
236cb7a01acSMauro Carvalho Chehab .standard = {
237cb7a01acSMauro Carvalho Chehab .index = 0,
238cb7a01acSMauro Carvalho Chehab .id = V4L2_STD_NTSC,
239cb7a01acSMauro Carvalho Chehab .name = "NTSC",
240cb7a01acSMauro Carvalho Chehab .frameperiod = {1001, 30000},
241cb7a01acSMauro Carvalho Chehab .framelines = 525
242cb7a01acSMauro Carvalho Chehab },
243cb7a01acSMauro Carvalho Chehab /* Standard: STD_PAL_BDGHIN */
244cb7a01acSMauro Carvalho Chehab },
245cb7a01acSMauro Carvalho Chehab [STD_PAL_BDGHIN] = {
246cb7a01acSMauro Carvalho Chehab .width = PAL_NUM_ACTIVE_PIXELS,
247cb7a01acSMauro Carvalho Chehab .height = PAL_NUM_ACTIVE_LINES,
248cb7a01acSMauro Carvalho Chehab .video_std = VIDEO_STD_PAL_BDGHIN_BIT,
249cb7a01acSMauro Carvalho Chehab .standard = {
250cb7a01acSMauro Carvalho Chehab .index = 1,
251cb7a01acSMauro Carvalho Chehab .id = V4L2_STD_PAL,
252cb7a01acSMauro Carvalho Chehab .name = "PAL",
253cb7a01acSMauro Carvalho Chehab .frameperiod = {1, 25},
254cb7a01acSMauro Carvalho Chehab .framelines = 625
255cb7a01acSMauro Carvalho Chehab },
256cb7a01acSMauro Carvalho Chehab },
257cb7a01acSMauro Carvalho Chehab /* Standard: need to add for additional standard */
258cb7a01acSMauro Carvalho Chehab };
259cb7a01acSMauro Carvalho Chehab
260cb7a01acSMauro Carvalho Chehab
to_decoder(struct v4l2_subdev * sd)261cb7a01acSMauro Carvalho Chehab static inline struct tvp514x_decoder *to_decoder(struct v4l2_subdev *sd)
262cb7a01acSMauro Carvalho Chehab {
263cb7a01acSMauro Carvalho Chehab return container_of(sd, struct tvp514x_decoder, sd);
264cb7a01acSMauro Carvalho Chehab }
265cb7a01acSMauro Carvalho Chehab
to_sd(struct v4l2_ctrl * ctrl)266cb7a01acSMauro Carvalho Chehab static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
267cb7a01acSMauro Carvalho Chehab {
268cb7a01acSMauro Carvalho Chehab return &container_of(ctrl->handler, struct tvp514x_decoder, hdl)->sd;
269cb7a01acSMauro Carvalho Chehab }
270cb7a01acSMauro Carvalho Chehab
271cb7a01acSMauro Carvalho Chehab
272cb7a01acSMauro Carvalho Chehab /**
273cb7a01acSMauro Carvalho Chehab * tvp514x_read_reg() - Read a value from a register in an TVP5146/47.
274cb7a01acSMauro Carvalho Chehab * @sd: ptr to v4l2_subdev struct
275cb7a01acSMauro Carvalho Chehab * @reg: TVP5146/47 register address
276cb7a01acSMauro Carvalho Chehab *
277cb7a01acSMauro Carvalho Chehab * Returns value read if successful, or non-zero (-1) otherwise.
278cb7a01acSMauro Carvalho Chehab */
tvp514x_read_reg(struct v4l2_subdev * sd,u8 reg)279cb7a01acSMauro Carvalho Chehab static int tvp514x_read_reg(struct v4l2_subdev *sd, u8 reg)
280cb7a01acSMauro Carvalho Chehab {
281cb7a01acSMauro Carvalho Chehab int err, retry = 0;
282cb7a01acSMauro Carvalho Chehab struct i2c_client *client = v4l2_get_subdevdata(sd);
283cb7a01acSMauro Carvalho Chehab
284cb7a01acSMauro Carvalho Chehab read_again:
285cb7a01acSMauro Carvalho Chehab
286cb7a01acSMauro Carvalho Chehab err = i2c_smbus_read_byte_data(client, reg);
287cb7a01acSMauro Carvalho Chehab if (err < 0) {
288cb7a01acSMauro Carvalho Chehab if (retry <= I2C_RETRY_COUNT) {
289cb7a01acSMauro Carvalho Chehab v4l2_warn(sd, "Read: retry ... %d\n", retry);
290cb7a01acSMauro Carvalho Chehab retry++;
291cb7a01acSMauro Carvalho Chehab msleep_interruptible(10);
292cb7a01acSMauro Carvalho Chehab goto read_again;
293cb7a01acSMauro Carvalho Chehab }
294cb7a01acSMauro Carvalho Chehab }
295cb7a01acSMauro Carvalho Chehab
296cb7a01acSMauro Carvalho Chehab return err;
297cb7a01acSMauro Carvalho Chehab }
298cb7a01acSMauro Carvalho Chehab
299cb7a01acSMauro Carvalho Chehab /**
300cb7a01acSMauro Carvalho Chehab * dump_reg() - dump the register content of TVP5146/47.
301cb7a01acSMauro Carvalho Chehab * @sd: ptr to v4l2_subdev struct
302cb7a01acSMauro Carvalho Chehab * @reg: TVP5146/47 register address
303cb7a01acSMauro Carvalho Chehab */
dump_reg(struct v4l2_subdev * sd,u8 reg)304cb7a01acSMauro Carvalho Chehab static void dump_reg(struct v4l2_subdev *sd, u8 reg)
305cb7a01acSMauro Carvalho Chehab {
306cb7a01acSMauro Carvalho Chehab u32 val;
307cb7a01acSMauro Carvalho Chehab
308cb7a01acSMauro Carvalho Chehab val = tvp514x_read_reg(sd, reg);
309cb7a01acSMauro Carvalho Chehab v4l2_info(sd, "Reg(0x%.2X): 0x%.2X\n", reg, val);
310cb7a01acSMauro Carvalho Chehab }
311cb7a01acSMauro Carvalho Chehab
312cb7a01acSMauro Carvalho Chehab /**
313cb7a01acSMauro Carvalho Chehab * tvp514x_write_reg() - Write a value to a register in TVP5146/47
314cb7a01acSMauro Carvalho Chehab * @sd: ptr to v4l2_subdev struct
315cb7a01acSMauro Carvalho Chehab * @reg: TVP5146/47 register address
316cb7a01acSMauro Carvalho Chehab * @val: value to be written to the register
317cb7a01acSMauro Carvalho Chehab *
318cb7a01acSMauro Carvalho Chehab * Write a value to a register in an TVP5146/47 decoder device.
319cb7a01acSMauro Carvalho Chehab * Returns zero if successful, or non-zero otherwise.
320cb7a01acSMauro Carvalho Chehab */
tvp514x_write_reg(struct v4l2_subdev * sd,u8 reg,u8 val)321cb7a01acSMauro Carvalho Chehab static int tvp514x_write_reg(struct v4l2_subdev *sd, u8 reg, u8 val)
322cb7a01acSMauro Carvalho Chehab {
323cb7a01acSMauro Carvalho Chehab int err, retry = 0;
324cb7a01acSMauro Carvalho Chehab struct i2c_client *client = v4l2_get_subdevdata(sd);
325cb7a01acSMauro Carvalho Chehab
326cb7a01acSMauro Carvalho Chehab write_again:
327cb7a01acSMauro Carvalho Chehab
328cb7a01acSMauro Carvalho Chehab err = i2c_smbus_write_byte_data(client, reg, val);
329cb7a01acSMauro Carvalho Chehab if (err) {
330cb7a01acSMauro Carvalho Chehab if (retry <= I2C_RETRY_COUNT) {
331cb7a01acSMauro Carvalho Chehab v4l2_warn(sd, "Write: retry ... %d\n", retry);
332cb7a01acSMauro Carvalho Chehab retry++;
333cb7a01acSMauro Carvalho Chehab msleep_interruptible(10);
334cb7a01acSMauro Carvalho Chehab goto write_again;
335cb7a01acSMauro Carvalho Chehab }
336cb7a01acSMauro Carvalho Chehab }
337cb7a01acSMauro Carvalho Chehab
338cb7a01acSMauro Carvalho Chehab return err;
339cb7a01acSMauro Carvalho Chehab }
340cb7a01acSMauro Carvalho Chehab
341cb7a01acSMauro Carvalho Chehab /**
342cb7a01acSMauro Carvalho Chehab * tvp514x_write_regs() : Initializes a list of TVP5146/47 registers
343cb7a01acSMauro Carvalho Chehab * @sd: ptr to v4l2_subdev struct
344cb7a01acSMauro Carvalho Chehab * @reglist: list of TVP5146/47 registers and values
345cb7a01acSMauro Carvalho Chehab *
346cb7a01acSMauro Carvalho Chehab * Initializes a list of TVP5146/47 registers:-
347cb7a01acSMauro Carvalho Chehab * if token is TOK_TERM, then entire write operation terminates
348cb7a01acSMauro Carvalho Chehab * if token is TOK_DELAY, then a delay of 'val' msec is introduced
349cb7a01acSMauro Carvalho Chehab * if token is TOK_SKIP, then the register write is skipped
350cb7a01acSMauro Carvalho Chehab * if token is TOK_WRITE, then the register write is performed
351cb7a01acSMauro Carvalho Chehab * Returns zero if successful, or non-zero otherwise.
352cb7a01acSMauro Carvalho Chehab */
tvp514x_write_regs(struct v4l2_subdev * sd,const struct tvp514x_reg reglist[])353cb7a01acSMauro Carvalho Chehab static int tvp514x_write_regs(struct v4l2_subdev *sd,
354cb7a01acSMauro Carvalho Chehab const struct tvp514x_reg reglist[])
355cb7a01acSMauro Carvalho Chehab {
356cb7a01acSMauro Carvalho Chehab int err;
357cb7a01acSMauro Carvalho Chehab const struct tvp514x_reg *next = reglist;
358cb7a01acSMauro Carvalho Chehab
359cb7a01acSMauro Carvalho Chehab for (; next->token != TOK_TERM; next++) {
360cb7a01acSMauro Carvalho Chehab if (next->token == TOK_DELAY) {
361cb7a01acSMauro Carvalho Chehab msleep(next->val);
362cb7a01acSMauro Carvalho Chehab continue;
363cb7a01acSMauro Carvalho Chehab }
364cb7a01acSMauro Carvalho Chehab
365cb7a01acSMauro Carvalho Chehab if (next->token == TOK_SKIP)
366cb7a01acSMauro Carvalho Chehab continue;
367cb7a01acSMauro Carvalho Chehab
368cb7a01acSMauro Carvalho Chehab err = tvp514x_write_reg(sd, next->reg, (u8) next->val);
369cb7a01acSMauro Carvalho Chehab if (err) {
370cb7a01acSMauro Carvalho Chehab v4l2_err(sd, "Write failed. Err[%d]\n", err);
371cb7a01acSMauro Carvalho Chehab return err;
372cb7a01acSMauro Carvalho Chehab }
373cb7a01acSMauro Carvalho Chehab }
374cb7a01acSMauro Carvalho Chehab return 0;
375cb7a01acSMauro Carvalho Chehab }
376cb7a01acSMauro Carvalho Chehab
377cb7a01acSMauro Carvalho Chehab /**
378cb7a01acSMauro Carvalho Chehab * tvp514x_query_current_std() : Query the current standard detected by TVP5146/47
379cb7a01acSMauro Carvalho Chehab * @sd: ptr to v4l2_subdev struct
380cb7a01acSMauro Carvalho Chehab *
381cb7a01acSMauro Carvalho Chehab * Returns the current standard detected by TVP5146/47, STD_INVALID if there is no
382cb7a01acSMauro Carvalho Chehab * standard detected.
383cb7a01acSMauro Carvalho Chehab */
tvp514x_query_current_std(struct v4l2_subdev * sd)384cb7a01acSMauro Carvalho Chehab static enum tvp514x_std tvp514x_query_current_std(struct v4l2_subdev *sd)
385cb7a01acSMauro Carvalho Chehab {
386cb7a01acSMauro Carvalho Chehab u8 std, std_status;
387cb7a01acSMauro Carvalho Chehab
388cb7a01acSMauro Carvalho Chehab std = tvp514x_read_reg(sd, REG_VIDEO_STD);
389cb7a01acSMauro Carvalho Chehab if ((std & VIDEO_STD_MASK) == VIDEO_STD_AUTO_SWITCH_BIT)
390cb7a01acSMauro Carvalho Chehab /* use the standard status register */
391cb7a01acSMauro Carvalho Chehab std_status = tvp514x_read_reg(sd, REG_VIDEO_STD_STATUS);
392cb7a01acSMauro Carvalho Chehab else
393cb7a01acSMauro Carvalho Chehab /* use the standard register itself */
394cb7a01acSMauro Carvalho Chehab std_status = std;
395cb7a01acSMauro Carvalho Chehab
396cb7a01acSMauro Carvalho Chehab switch (std_status & VIDEO_STD_MASK) {
397cb7a01acSMauro Carvalho Chehab case VIDEO_STD_NTSC_MJ_BIT:
398cb7a01acSMauro Carvalho Chehab return STD_NTSC_MJ;
399cb7a01acSMauro Carvalho Chehab
400cb7a01acSMauro Carvalho Chehab case VIDEO_STD_PAL_BDGHIN_BIT:
401cb7a01acSMauro Carvalho Chehab return STD_PAL_BDGHIN;
402cb7a01acSMauro Carvalho Chehab
403cb7a01acSMauro Carvalho Chehab default:
404cb7a01acSMauro Carvalho Chehab return STD_INVALID;
405cb7a01acSMauro Carvalho Chehab }
406cb7a01acSMauro Carvalho Chehab
407cb7a01acSMauro Carvalho Chehab return STD_INVALID;
408cb7a01acSMauro Carvalho Chehab }
409cb7a01acSMauro Carvalho Chehab
410cb7a01acSMauro Carvalho Chehab /* TVP5146/47 register dump function */
tvp514x_reg_dump(struct v4l2_subdev * sd)411cb7a01acSMauro Carvalho Chehab static void tvp514x_reg_dump(struct v4l2_subdev *sd)
412cb7a01acSMauro Carvalho Chehab {
413cb7a01acSMauro Carvalho Chehab dump_reg(sd, REG_INPUT_SEL);
414cb7a01acSMauro Carvalho Chehab dump_reg(sd, REG_AFE_GAIN_CTRL);
415cb7a01acSMauro Carvalho Chehab dump_reg(sd, REG_VIDEO_STD);
416cb7a01acSMauro Carvalho Chehab dump_reg(sd, REG_OPERATION_MODE);
417cb7a01acSMauro Carvalho Chehab dump_reg(sd, REG_COLOR_KILLER);
418cb7a01acSMauro Carvalho Chehab dump_reg(sd, REG_LUMA_CONTROL1);
419cb7a01acSMauro Carvalho Chehab dump_reg(sd, REG_LUMA_CONTROL2);
420cb7a01acSMauro Carvalho Chehab dump_reg(sd, REG_LUMA_CONTROL3);
421cb7a01acSMauro Carvalho Chehab dump_reg(sd, REG_BRIGHTNESS);
422cb7a01acSMauro Carvalho Chehab dump_reg(sd, REG_CONTRAST);
423cb7a01acSMauro Carvalho Chehab dump_reg(sd, REG_SATURATION);
424cb7a01acSMauro Carvalho Chehab dump_reg(sd, REG_HUE);
425cb7a01acSMauro Carvalho Chehab dump_reg(sd, REG_CHROMA_CONTROL1);
426cb7a01acSMauro Carvalho Chehab dump_reg(sd, REG_CHROMA_CONTROL2);
427cb7a01acSMauro Carvalho Chehab dump_reg(sd, REG_COMP_PR_SATURATION);
428cb7a01acSMauro Carvalho Chehab dump_reg(sd, REG_COMP_Y_CONTRAST);
429cb7a01acSMauro Carvalho Chehab dump_reg(sd, REG_COMP_PB_SATURATION);
430cb7a01acSMauro Carvalho Chehab dump_reg(sd, REG_COMP_Y_BRIGHTNESS);
431cb7a01acSMauro Carvalho Chehab dump_reg(sd, REG_AVID_START_PIXEL_LSB);
432cb7a01acSMauro Carvalho Chehab dump_reg(sd, REG_AVID_START_PIXEL_MSB);
433cb7a01acSMauro Carvalho Chehab dump_reg(sd, REG_AVID_STOP_PIXEL_LSB);
434cb7a01acSMauro Carvalho Chehab dump_reg(sd, REG_AVID_STOP_PIXEL_MSB);
435cb7a01acSMauro Carvalho Chehab dump_reg(sd, REG_HSYNC_START_PIXEL_LSB);
436cb7a01acSMauro Carvalho Chehab dump_reg(sd, REG_HSYNC_START_PIXEL_MSB);
437cb7a01acSMauro Carvalho Chehab dump_reg(sd, REG_HSYNC_STOP_PIXEL_LSB);
438cb7a01acSMauro Carvalho Chehab dump_reg(sd, REG_HSYNC_STOP_PIXEL_MSB);
439cb7a01acSMauro Carvalho Chehab dump_reg(sd, REG_VSYNC_START_LINE_LSB);
440cb7a01acSMauro Carvalho Chehab dump_reg(sd, REG_VSYNC_START_LINE_MSB);
441cb7a01acSMauro Carvalho Chehab dump_reg(sd, REG_VSYNC_STOP_LINE_LSB);
442cb7a01acSMauro Carvalho Chehab dump_reg(sd, REG_VSYNC_STOP_LINE_MSB);
443cb7a01acSMauro Carvalho Chehab dump_reg(sd, REG_VBLK_START_LINE_LSB);
444cb7a01acSMauro Carvalho Chehab dump_reg(sd, REG_VBLK_START_LINE_MSB);
445cb7a01acSMauro Carvalho Chehab dump_reg(sd, REG_VBLK_STOP_LINE_LSB);
446cb7a01acSMauro Carvalho Chehab dump_reg(sd, REG_VBLK_STOP_LINE_MSB);
447cb7a01acSMauro Carvalho Chehab dump_reg(sd, REG_SYNC_CONTROL);
448cb7a01acSMauro Carvalho Chehab dump_reg(sd, REG_OUTPUT_FORMATTER1);
449cb7a01acSMauro Carvalho Chehab dump_reg(sd, REG_OUTPUT_FORMATTER2);
450cb7a01acSMauro Carvalho Chehab dump_reg(sd, REG_OUTPUT_FORMATTER3);
451cb7a01acSMauro Carvalho Chehab dump_reg(sd, REG_OUTPUT_FORMATTER4);
452cb7a01acSMauro Carvalho Chehab dump_reg(sd, REG_OUTPUT_FORMATTER5);
453cb7a01acSMauro Carvalho Chehab dump_reg(sd, REG_OUTPUT_FORMATTER6);
454cb7a01acSMauro Carvalho Chehab dump_reg(sd, REG_CLEAR_LOST_LOCK);
455cb7a01acSMauro Carvalho Chehab }
456cb7a01acSMauro Carvalho Chehab
457cb7a01acSMauro Carvalho Chehab /**
458cb7a01acSMauro Carvalho Chehab * tvp514x_configure() - Configure the TVP5146/47 registers
459cb7a01acSMauro Carvalho Chehab * @sd: ptr to v4l2_subdev struct
460cb7a01acSMauro Carvalho Chehab * @decoder: ptr to tvp514x_decoder structure
461cb7a01acSMauro Carvalho Chehab *
462cb7a01acSMauro Carvalho Chehab * Returns zero if successful, or non-zero otherwise.
463cb7a01acSMauro Carvalho Chehab */
tvp514x_configure(struct v4l2_subdev * sd,struct tvp514x_decoder * decoder)464cb7a01acSMauro Carvalho Chehab static int tvp514x_configure(struct v4l2_subdev *sd,
465cb7a01acSMauro Carvalho Chehab struct tvp514x_decoder *decoder)
466cb7a01acSMauro Carvalho Chehab {
467cb7a01acSMauro Carvalho Chehab int err;
468cb7a01acSMauro Carvalho Chehab
469cb7a01acSMauro Carvalho Chehab /* common register initialization */
470cb7a01acSMauro Carvalho Chehab err =
471cb7a01acSMauro Carvalho Chehab tvp514x_write_regs(sd, decoder->tvp514x_regs);
472cb7a01acSMauro Carvalho Chehab if (err)
473cb7a01acSMauro Carvalho Chehab return err;
474cb7a01acSMauro Carvalho Chehab
475cb7a01acSMauro Carvalho Chehab if (debug)
476cb7a01acSMauro Carvalho Chehab tvp514x_reg_dump(sd);
477cb7a01acSMauro Carvalho Chehab
478cb7a01acSMauro Carvalho Chehab return 0;
479cb7a01acSMauro Carvalho Chehab }
480cb7a01acSMauro Carvalho Chehab
481cb7a01acSMauro Carvalho Chehab /**
482cb7a01acSMauro Carvalho Chehab * tvp514x_detect() - Detect if an tvp514x is present, and if so which revision.
483cb7a01acSMauro Carvalho Chehab * @sd: pointer to standard V4L2 sub-device structure
484cb7a01acSMauro Carvalho Chehab * @decoder: pointer to tvp514x_decoder structure
485cb7a01acSMauro Carvalho Chehab *
486cb7a01acSMauro Carvalho Chehab * A device is considered to be detected if the chip ID (LSB and MSB)
487cb7a01acSMauro Carvalho Chehab * registers match the expected values.
488cb7a01acSMauro Carvalho Chehab * Any value of the rom version register is accepted.
489cb7a01acSMauro Carvalho Chehab * Returns ENODEV error number if no device is detected, or zero
490cb7a01acSMauro Carvalho Chehab * if a device is detected.
491cb7a01acSMauro Carvalho Chehab */
tvp514x_detect(struct v4l2_subdev * sd,struct tvp514x_decoder * decoder)492cb7a01acSMauro Carvalho Chehab static int tvp514x_detect(struct v4l2_subdev *sd,
493cb7a01acSMauro Carvalho Chehab struct tvp514x_decoder *decoder)
494cb7a01acSMauro Carvalho Chehab {
495cb7a01acSMauro Carvalho Chehab u8 chip_id_msb, chip_id_lsb, rom_ver;
496cb7a01acSMauro Carvalho Chehab struct i2c_client *client = v4l2_get_subdevdata(sd);
497cb7a01acSMauro Carvalho Chehab
498cb7a01acSMauro Carvalho Chehab chip_id_msb = tvp514x_read_reg(sd, REG_CHIP_ID_MSB);
499cb7a01acSMauro Carvalho Chehab chip_id_lsb = tvp514x_read_reg(sd, REG_CHIP_ID_LSB);
500cb7a01acSMauro Carvalho Chehab rom_ver = tvp514x_read_reg(sd, REG_ROM_VERSION);
501cb7a01acSMauro Carvalho Chehab
502cb7a01acSMauro Carvalho Chehab v4l2_dbg(1, debug, sd,
503cb7a01acSMauro Carvalho Chehab "chip id detected msb:0x%x lsb:0x%x rom version:0x%x\n",
504cb7a01acSMauro Carvalho Chehab chip_id_msb, chip_id_lsb, rom_ver);
505cb7a01acSMauro Carvalho Chehab if ((chip_id_msb != TVP514X_CHIP_ID_MSB)
506cb7a01acSMauro Carvalho Chehab || ((chip_id_lsb != TVP5146_CHIP_ID_LSB)
507cb7a01acSMauro Carvalho Chehab && (chip_id_lsb != TVP5147_CHIP_ID_LSB))) {
508cb7a01acSMauro Carvalho Chehab /* We didn't read the values we expected, so this must not be
509cb7a01acSMauro Carvalho Chehab * an TVP5146/47.
510cb7a01acSMauro Carvalho Chehab */
511cb7a01acSMauro Carvalho Chehab v4l2_err(sd, "chip id mismatch msb:0x%x lsb:0x%x\n",
512cb7a01acSMauro Carvalho Chehab chip_id_msb, chip_id_lsb);
513cb7a01acSMauro Carvalho Chehab return -ENODEV;
514cb7a01acSMauro Carvalho Chehab }
515cb7a01acSMauro Carvalho Chehab
516cb7a01acSMauro Carvalho Chehab decoder->ver = rom_ver;
517cb7a01acSMauro Carvalho Chehab
518cb7a01acSMauro Carvalho Chehab v4l2_info(sd, "%s (Version - 0x%.2x) found at 0x%x (%s)\n",
519cb7a01acSMauro Carvalho Chehab client->name, decoder->ver,
520cb7a01acSMauro Carvalho Chehab client->addr << 1, client->adapter->name);
521cb7a01acSMauro Carvalho Chehab return 0;
522cb7a01acSMauro Carvalho Chehab }
523cb7a01acSMauro Carvalho Chehab
524cb7a01acSMauro Carvalho Chehab /**
525cb7a01acSMauro Carvalho Chehab * tvp514x_querystd() - V4L2 decoder interface handler for querystd
526cb7a01acSMauro Carvalho Chehab * @sd: pointer to standard V4L2 sub-device structure
527cb7a01acSMauro Carvalho Chehab * @std_id: standard V4L2 std_id ioctl enum
528cb7a01acSMauro Carvalho Chehab *
529cb7a01acSMauro Carvalho Chehab * Returns the current standard detected by TVP5146/47. If no active input is
530cb7a01acSMauro Carvalho Chehab * detected then *std_id is set to 0 and the function returns 0.
531cb7a01acSMauro Carvalho Chehab */
tvp514x_querystd(struct v4l2_subdev * sd,v4l2_std_id * std_id)532cb7a01acSMauro Carvalho Chehab static int tvp514x_querystd(struct v4l2_subdev *sd, v4l2_std_id *std_id)
533cb7a01acSMauro Carvalho Chehab {
534cb7a01acSMauro Carvalho Chehab struct tvp514x_decoder *decoder = to_decoder(sd);
535cb7a01acSMauro Carvalho Chehab enum tvp514x_std current_std;
536cb7a01acSMauro Carvalho Chehab enum tvp514x_input input_sel;
537cb7a01acSMauro Carvalho Chehab u8 sync_lock_status, lock_mask;
538cb7a01acSMauro Carvalho Chehab
539cb7a01acSMauro Carvalho Chehab if (std_id == NULL)
540cb7a01acSMauro Carvalho Chehab return -EINVAL;
541cb7a01acSMauro Carvalho Chehab
542c389648aSHans Verkuil /* To query the standard the TVP514x must power on the ADCs. */
543c389648aSHans Verkuil if (!decoder->streaming) {
544c389648aSHans Verkuil tvp514x_s_stream(sd, 1);
545c389648aSHans Verkuil msleep(LOCK_RETRY_DELAY);
546c389648aSHans Verkuil }
547c389648aSHans Verkuil
548cb7a01acSMauro Carvalho Chehab /* query the current standard */
549cb7a01acSMauro Carvalho Chehab current_std = tvp514x_query_current_std(sd);
55055852cbbSHans Verkuil if (current_std == STD_INVALID) {
55155852cbbSHans Verkuil *std_id = V4L2_STD_UNKNOWN;
552cb7a01acSMauro Carvalho Chehab return 0;
55355852cbbSHans Verkuil }
554cb7a01acSMauro Carvalho Chehab
555cb7a01acSMauro Carvalho Chehab input_sel = decoder->input;
556cb7a01acSMauro Carvalho Chehab
557cb7a01acSMauro Carvalho Chehab switch (input_sel) {
558cb7a01acSMauro Carvalho Chehab case INPUT_CVBS_VI1A:
559cb7a01acSMauro Carvalho Chehab case INPUT_CVBS_VI1B:
560cb7a01acSMauro Carvalho Chehab case INPUT_CVBS_VI1C:
561cb7a01acSMauro Carvalho Chehab case INPUT_CVBS_VI2A:
562cb7a01acSMauro Carvalho Chehab case INPUT_CVBS_VI2B:
563cb7a01acSMauro Carvalho Chehab case INPUT_CVBS_VI2C:
564cb7a01acSMauro Carvalho Chehab case INPUT_CVBS_VI3A:
565cb7a01acSMauro Carvalho Chehab case INPUT_CVBS_VI3B:
566cb7a01acSMauro Carvalho Chehab case INPUT_CVBS_VI3C:
567cb7a01acSMauro Carvalho Chehab case INPUT_CVBS_VI4A:
568cb7a01acSMauro Carvalho Chehab lock_mask = STATUS_CLR_SUBCAR_LOCK_BIT |
569cb7a01acSMauro Carvalho Chehab STATUS_HORZ_SYNC_LOCK_BIT |
570cb7a01acSMauro Carvalho Chehab STATUS_VIRT_SYNC_LOCK_BIT;
571cb7a01acSMauro Carvalho Chehab break;
572cb7a01acSMauro Carvalho Chehab
573cb7a01acSMauro Carvalho Chehab case INPUT_SVIDEO_VI2A_VI1A:
574cb7a01acSMauro Carvalho Chehab case INPUT_SVIDEO_VI2B_VI1B:
575cb7a01acSMauro Carvalho Chehab case INPUT_SVIDEO_VI2C_VI1C:
576cb7a01acSMauro Carvalho Chehab case INPUT_SVIDEO_VI2A_VI3A:
577cb7a01acSMauro Carvalho Chehab case INPUT_SVIDEO_VI2B_VI3B:
578cb7a01acSMauro Carvalho Chehab case INPUT_SVIDEO_VI2C_VI3C:
579cb7a01acSMauro Carvalho Chehab case INPUT_SVIDEO_VI4A_VI1A:
580cb7a01acSMauro Carvalho Chehab case INPUT_SVIDEO_VI4A_VI1B:
581cb7a01acSMauro Carvalho Chehab case INPUT_SVIDEO_VI4A_VI1C:
582cb7a01acSMauro Carvalho Chehab case INPUT_SVIDEO_VI4A_VI3A:
583cb7a01acSMauro Carvalho Chehab case INPUT_SVIDEO_VI4A_VI3B:
584cb7a01acSMauro Carvalho Chehab case INPUT_SVIDEO_VI4A_VI3C:
585cb7a01acSMauro Carvalho Chehab lock_mask = STATUS_HORZ_SYNC_LOCK_BIT |
586cb7a01acSMauro Carvalho Chehab STATUS_VIRT_SYNC_LOCK_BIT;
587cb7a01acSMauro Carvalho Chehab break;
588cb7a01acSMauro Carvalho Chehab /*Need to add other interfaces*/
589cb7a01acSMauro Carvalho Chehab default:
590cb7a01acSMauro Carvalho Chehab return -EINVAL;
591cb7a01acSMauro Carvalho Chehab }
592cb7a01acSMauro Carvalho Chehab /* check whether signal is locked */
593cb7a01acSMauro Carvalho Chehab sync_lock_status = tvp514x_read_reg(sd, REG_STATUS1);
59455852cbbSHans Verkuil if (lock_mask != (sync_lock_status & lock_mask)) {
59555852cbbSHans Verkuil *std_id = V4L2_STD_UNKNOWN;
596cb7a01acSMauro Carvalho Chehab return 0; /* No input detected */
59755852cbbSHans Verkuil }
598cb7a01acSMauro Carvalho Chehab
59955852cbbSHans Verkuil *std_id &= decoder->std_list[current_std].standard.id;
600cb7a01acSMauro Carvalho Chehab
601cb7a01acSMauro Carvalho Chehab v4l2_dbg(1, debug, sd, "Current STD: %s\n",
602cb7a01acSMauro Carvalho Chehab decoder->std_list[current_std].standard.name);
603cb7a01acSMauro Carvalho Chehab return 0;
604cb7a01acSMauro Carvalho Chehab }
605cb7a01acSMauro Carvalho Chehab
606cb7a01acSMauro Carvalho Chehab /**
607cb7a01acSMauro Carvalho Chehab * tvp514x_s_std() - V4L2 decoder interface handler for s_std
608cb7a01acSMauro Carvalho Chehab * @sd: pointer to standard V4L2 sub-device structure
609cb7a01acSMauro Carvalho Chehab * @std_id: standard V4L2 v4l2_std_id ioctl enum
610cb7a01acSMauro Carvalho Chehab *
611cb7a01acSMauro Carvalho Chehab * If std_id is supported, sets the requested standard. Otherwise, returns
612cb7a01acSMauro Carvalho Chehab * -EINVAL
613cb7a01acSMauro Carvalho Chehab */
tvp514x_s_std(struct v4l2_subdev * sd,v4l2_std_id std_id)614cb7a01acSMauro Carvalho Chehab static int tvp514x_s_std(struct v4l2_subdev *sd, v4l2_std_id std_id)
615cb7a01acSMauro Carvalho Chehab {
616cb7a01acSMauro Carvalho Chehab struct tvp514x_decoder *decoder = to_decoder(sd);
617cb7a01acSMauro Carvalho Chehab int err, i;
618cb7a01acSMauro Carvalho Chehab
619cb7a01acSMauro Carvalho Chehab for (i = 0; i < decoder->num_stds; i++)
620cb7a01acSMauro Carvalho Chehab if (std_id & decoder->std_list[i].standard.id)
621cb7a01acSMauro Carvalho Chehab break;
622cb7a01acSMauro Carvalho Chehab
623cb7a01acSMauro Carvalho Chehab if ((i == decoder->num_stds) || (i == STD_INVALID))
624cb7a01acSMauro Carvalho Chehab return -EINVAL;
625cb7a01acSMauro Carvalho Chehab
626cb7a01acSMauro Carvalho Chehab err = tvp514x_write_reg(sd, REG_VIDEO_STD,
627cb7a01acSMauro Carvalho Chehab decoder->std_list[i].video_std);
628cb7a01acSMauro Carvalho Chehab if (err)
629cb7a01acSMauro Carvalho Chehab return err;
630cb7a01acSMauro Carvalho Chehab
631cb7a01acSMauro Carvalho Chehab decoder->current_std = i;
632cb7a01acSMauro Carvalho Chehab decoder->tvp514x_regs[REG_VIDEO_STD].val =
633cb7a01acSMauro Carvalho Chehab decoder->std_list[i].video_std;
634cb7a01acSMauro Carvalho Chehab
635cb7a01acSMauro Carvalho Chehab v4l2_dbg(1, debug, sd, "Standard set to: %s\n",
636cb7a01acSMauro Carvalho Chehab decoder->std_list[i].standard.name);
637cb7a01acSMauro Carvalho Chehab return 0;
638cb7a01acSMauro Carvalho Chehab }
639cb7a01acSMauro Carvalho Chehab
640cb7a01acSMauro Carvalho Chehab /**
641cb7a01acSMauro Carvalho Chehab * tvp514x_s_routing() - V4L2 decoder interface handler for s_routing
642cb7a01acSMauro Carvalho Chehab * @sd: pointer to standard V4L2 sub-device structure
643cb7a01acSMauro Carvalho Chehab * @input: input selector for routing the signal
644cb7a01acSMauro Carvalho Chehab * @output: output selector for routing the signal
645cb7a01acSMauro Carvalho Chehab * @config: config value. Not used
646cb7a01acSMauro Carvalho Chehab *
647cb7a01acSMauro Carvalho Chehab * If index is valid, selects the requested input. Otherwise, returns -EINVAL if
648cb7a01acSMauro Carvalho Chehab * the input is not supported or there is no active signal present in the
649cb7a01acSMauro Carvalho Chehab * selected input.
650cb7a01acSMauro Carvalho Chehab */
tvp514x_s_routing(struct v4l2_subdev * sd,u32 input,u32 output,u32 config)651cb7a01acSMauro Carvalho Chehab static int tvp514x_s_routing(struct v4l2_subdev *sd,
652cb7a01acSMauro Carvalho Chehab u32 input, u32 output, u32 config)
653cb7a01acSMauro Carvalho Chehab {
654cb7a01acSMauro Carvalho Chehab struct tvp514x_decoder *decoder = to_decoder(sd);
655cb7a01acSMauro Carvalho Chehab int err;
656cb7a01acSMauro Carvalho Chehab enum tvp514x_input input_sel;
657cb7a01acSMauro Carvalho Chehab enum tvp514x_output output_sel;
658cb7a01acSMauro Carvalho Chehab
659cb7a01acSMauro Carvalho Chehab if ((input >= INPUT_INVALID) ||
660cb7a01acSMauro Carvalho Chehab (output >= OUTPUT_INVALID))
661cb7a01acSMauro Carvalho Chehab /* Index out of bound */
662cb7a01acSMauro Carvalho Chehab return -EINVAL;
663cb7a01acSMauro Carvalho Chehab
664cb7a01acSMauro Carvalho Chehab input_sel = input;
665cb7a01acSMauro Carvalho Chehab output_sel = output;
666cb7a01acSMauro Carvalho Chehab
667cb7a01acSMauro Carvalho Chehab err = tvp514x_write_reg(sd, REG_INPUT_SEL, input_sel);
668cb7a01acSMauro Carvalho Chehab if (err)
669cb7a01acSMauro Carvalho Chehab return err;
670cb7a01acSMauro Carvalho Chehab
671cb7a01acSMauro Carvalho Chehab output_sel |= tvp514x_read_reg(sd,
672cb7a01acSMauro Carvalho Chehab REG_OUTPUT_FORMATTER1) & 0x7;
673cb7a01acSMauro Carvalho Chehab err = tvp514x_write_reg(sd, REG_OUTPUT_FORMATTER1,
674cb7a01acSMauro Carvalho Chehab output_sel);
675cb7a01acSMauro Carvalho Chehab if (err)
676cb7a01acSMauro Carvalho Chehab return err;
677cb7a01acSMauro Carvalho Chehab
678cb7a01acSMauro Carvalho Chehab decoder->tvp514x_regs[REG_INPUT_SEL].val = input_sel;
679cb7a01acSMauro Carvalho Chehab decoder->tvp514x_regs[REG_OUTPUT_FORMATTER1].val = output_sel;
680cb7a01acSMauro Carvalho Chehab decoder->input = input;
681cb7a01acSMauro Carvalho Chehab decoder->output = output;
682cb7a01acSMauro Carvalho Chehab
683cb7a01acSMauro Carvalho Chehab v4l2_dbg(1, debug, sd, "Input set to: %d\n", input_sel);
684cb7a01acSMauro Carvalho Chehab
685cb7a01acSMauro Carvalho Chehab return 0;
686cb7a01acSMauro Carvalho Chehab }
687cb7a01acSMauro Carvalho Chehab
688cb7a01acSMauro Carvalho Chehab /**
689cb7a01acSMauro Carvalho Chehab * tvp514x_s_ctrl() - V4L2 decoder interface handler for s_ctrl
690cb7a01acSMauro Carvalho Chehab * @ctrl: pointer to v4l2_ctrl structure
691cb7a01acSMauro Carvalho Chehab *
692cb7a01acSMauro Carvalho Chehab * If the requested control is supported, sets the control's current
693cb7a01acSMauro Carvalho Chehab * value in HW. Otherwise, returns -EINVAL if the control is not supported.
694cb7a01acSMauro Carvalho Chehab */
tvp514x_s_ctrl(struct v4l2_ctrl * ctrl)695cb7a01acSMauro Carvalho Chehab static int tvp514x_s_ctrl(struct v4l2_ctrl *ctrl)
696cb7a01acSMauro Carvalho Chehab {
697cb7a01acSMauro Carvalho Chehab struct v4l2_subdev *sd = to_sd(ctrl);
698cb7a01acSMauro Carvalho Chehab struct tvp514x_decoder *decoder = to_decoder(sd);
699cb7a01acSMauro Carvalho Chehab int err = -EINVAL, value;
700cb7a01acSMauro Carvalho Chehab
701cb7a01acSMauro Carvalho Chehab value = ctrl->val;
702cb7a01acSMauro Carvalho Chehab
703cb7a01acSMauro Carvalho Chehab switch (ctrl->id) {
704cb7a01acSMauro Carvalho Chehab case V4L2_CID_BRIGHTNESS:
705cb7a01acSMauro Carvalho Chehab err = tvp514x_write_reg(sd, REG_BRIGHTNESS, value);
706cb7a01acSMauro Carvalho Chehab if (!err)
707cb7a01acSMauro Carvalho Chehab decoder->tvp514x_regs[REG_BRIGHTNESS].val = value;
708cb7a01acSMauro Carvalho Chehab break;
709cb7a01acSMauro Carvalho Chehab case V4L2_CID_CONTRAST:
710cb7a01acSMauro Carvalho Chehab err = tvp514x_write_reg(sd, REG_CONTRAST, value);
711cb7a01acSMauro Carvalho Chehab if (!err)
712cb7a01acSMauro Carvalho Chehab decoder->tvp514x_regs[REG_CONTRAST].val = value;
713cb7a01acSMauro Carvalho Chehab break;
714cb7a01acSMauro Carvalho Chehab case V4L2_CID_SATURATION:
715cb7a01acSMauro Carvalho Chehab err = tvp514x_write_reg(sd, REG_SATURATION, value);
716cb7a01acSMauro Carvalho Chehab if (!err)
717cb7a01acSMauro Carvalho Chehab decoder->tvp514x_regs[REG_SATURATION].val = value;
718cb7a01acSMauro Carvalho Chehab break;
719cb7a01acSMauro Carvalho Chehab case V4L2_CID_HUE:
720cb7a01acSMauro Carvalho Chehab if (value == 180)
721cb7a01acSMauro Carvalho Chehab value = 0x7F;
722cb7a01acSMauro Carvalho Chehab else if (value == -180)
723cb7a01acSMauro Carvalho Chehab value = 0x80;
724cb7a01acSMauro Carvalho Chehab err = tvp514x_write_reg(sd, REG_HUE, value);
725cb7a01acSMauro Carvalho Chehab if (!err)
726cb7a01acSMauro Carvalho Chehab decoder->tvp514x_regs[REG_HUE].val = value;
727cb7a01acSMauro Carvalho Chehab break;
728cb7a01acSMauro Carvalho Chehab case V4L2_CID_AUTOGAIN:
729cb7a01acSMauro Carvalho Chehab err = tvp514x_write_reg(sd, REG_AFE_GAIN_CTRL, value ? 0x0f : 0x0c);
730cb7a01acSMauro Carvalho Chehab if (!err)
731cb7a01acSMauro Carvalho Chehab decoder->tvp514x_regs[REG_AFE_GAIN_CTRL].val = value;
732cb7a01acSMauro Carvalho Chehab break;
733cb7a01acSMauro Carvalho Chehab }
734cb7a01acSMauro Carvalho Chehab
735cb7a01acSMauro Carvalho Chehab v4l2_dbg(1, debug, sd, "Set Control: ID - %d - %d\n",
736cb7a01acSMauro Carvalho Chehab ctrl->id, ctrl->val);
737cb7a01acSMauro Carvalho Chehab return err;
738cb7a01acSMauro Carvalho Chehab }
739cb7a01acSMauro Carvalho Chehab
740cb7a01acSMauro Carvalho Chehab /**
7414471109eSHans Verkuil * tvp514x_g_frame_interval() - V4L2 decoder interface handler
742cb7a01acSMauro Carvalho Chehab * @sd: pointer to standard V4L2 sub-device structure
743225fe212SMauro Carvalho Chehab * @ival: pointer to a v4l2_subdev_frame_interval structure
744cb7a01acSMauro Carvalho Chehab *
745cb7a01acSMauro Carvalho Chehab * Returns the decoder's video CAPTURE parameters.
746cb7a01acSMauro Carvalho Chehab */
747cb7a01acSMauro Carvalho Chehab static int
tvp514x_g_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_frame_interval * ival)7484471109eSHans Verkuil tvp514x_g_frame_interval(struct v4l2_subdev *sd,
7494471109eSHans Verkuil struct v4l2_subdev_frame_interval *ival)
750cb7a01acSMauro Carvalho Chehab {
751cb7a01acSMauro Carvalho Chehab struct tvp514x_decoder *decoder = to_decoder(sd);
752cb7a01acSMauro Carvalho Chehab enum tvp514x_std current_std;
753cb7a01acSMauro Carvalho Chehab
754cb7a01acSMauro Carvalho Chehab
755cb7a01acSMauro Carvalho Chehab /* get the current standard */
756cb7a01acSMauro Carvalho Chehab current_std = decoder->current_std;
757cb7a01acSMauro Carvalho Chehab
7584471109eSHans Verkuil ival->interval =
759cb7a01acSMauro Carvalho Chehab decoder->std_list[current_std].standard.frameperiod;
760cb7a01acSMauro Carvalho Chehab
761cb7a01acSMauro Carvalho Chehab return 0;
762cb7a01acSMauro Carvalho Chehab }
763cb7a01acSMauro Carvalho Chehab
764cb7a01acSMauro Carvalho Chehab /**
7654471109eSHans Verkuil * tvp514x_s_frame_interval() - V4L2 decoder interface handler
766cb7a01acSMauro Carvalho Chehab * @sd: pointer to standard V4L2 sub-device structure
767225fe212SMauro Carvalho Chehab * @ival: pointer to a v4l2_subdev_frame_interval structure
768cb7a01acSMauro Carvalho Chehab *
769cb7a01acSMauro Carvalho Chehab * Configures the decoder to use the input parameters, if possible. If
770cb7a01acSMauro Carvalho Chehab * not possible, returns the appropriate error code.
771cb7a01acSMauro Carvalho Chehab */
772cb7a01acSMauro Carvalho Chehab static int
tvp514x_s_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_frame_interval * ival)7734471109eSHans Verkuil tvp514x_s_frame_interval(struct v4l2_subdev *sd,
7744471109eSHans Verkuil struct v4l2_subdev_frame_interval *ival)
775cb7a01acSMauro Carvalho Chehab {
776cb7a01acSMauro Carvalho Chehab struct tvp514x_decoder *decoder = to_decoder(sd);
777cb7a01acSMauro Carvalho Chehab struct v4l2_fract *timeperframe;
778cb7a01acSMauro Carvalho Chehab enum tvp514x_std current_std;
779cb7a01acSMauro Carvalho Chehab
780cb7a01acSMauro Carvalho Chehab
7814471109eSHans Verkuil timeperframe = &ival->interval;
782cb7a01acSMauro Carvalho Chehab
783cb7a01acSMauro Carvalho Chehab /* get the current standard */
784cb7a01acSMauro Carvalho Chehab current_std = decoder->current_std;
785cb7a01acSMauro Carvalho Chehab
786cb7a01acSMauro Carvalho Chehab *timeperframe =
787cb7a01acSMauro Carvalho Chehab decoder->std_list[current_std].standard.frameperiod;
788cb7a01acSMauro Carvalho Chehab
789cb7a01acSMauro Carvalho Chehab return 0;
790cb7a01acSMauro Carvalho Chehab }
791cb7a01acSMauro Carvalho Chehab
792cb7a01acSMauro Carvalho Chehab /**
793cb7a01acSMauro Carvalho Chehab * tvp514x_s_stream() - V4L2 decoder i/f handler for s_stream
794cb7a01acSMauro Carvalho Chehab * @sd: pointer to standard V4L2 sub-device structure
795cb7a01acSMauro Carvalho Chehab * @enable: streaming enable or disable
796cb7a01acSMauro Carvalho Chehab *
797cb7a01acSMauro Carvalho Chehab * Sets streaming to enable or disable, if possible.
798cb7a01acSMauro Carvalho Chehab */
tvp514x_s_stream(struct v4l2_subdev * sd,int enable)799cb7a01acSMauro Carvalho Chehab static int tvp514x_s_stream(struct v4l2_subdev *sd, int enable)
800cb7a01acSMauro Carvalho Chehab {
801cb7a01acSMauro Carvalho Chehab int err = 0;
802cb7a01acSMauro Carvalho Chehab struct tvp514x_decoder *decoder = to_decoder(sd);
803cb7a01acSMauro Carvalho Chehab
804cb7a01acSMauro Carvalho Chehab if (decoder->streaming == enable)
805cb7a01acSMauro Carvalho Chehab return 0;
806cb7a01acSMauro Carvalho Chehab
807cb7a01acSMauro Carvalho Chehab switch (enable) {
808cb7a01acSMauro Carvalho Chehab case 0:
809cb7a01acSMauro Carvalho Chehab {
810cb7a01acSMauro Carvalho Chehab /* Power Down Sequence */
811cb7a01acSMauro Carvalho Chehab err = tvp514x_write_reg(sd, REG_OPERATION_MODE, 0x01);
812cb7a01acSMauro Carvalho Chehab if (err) {
813cb7a01acSMauro Carvalho Chehab v4l2_err(sd, "Unable to turn off decoder\n");
814cb7a01acSMauro Carvalho Chehab return err;
815cb7a01acSMauro Carvalho Chehab }
816cb7a01acSMauro Carvalho Chehab decoder->streaming = enable;
817cb7a01acSMauro Carvalho Chehab break;
818cb7a01acSMauro Carvalho Chehab }
819cb7a01acSMauro Carvalho Chehab case 1:
820cb7a01acSMauro Carvalho Chehab {
821cb7a01acSMauro Carvalho Chehab /* Power Up Sequence */
822f0a12d0cSLars-Peter Clausen err = tvp514x_write_regs(sd, decoder->int_seq);
823cb7a01acSMauro Carvalho Chehab if (err) {
824cb7a01acSMauro Carvalho Chehab v4l2_err(sd, "Unable to turn on decoder\n");
825cb7a01acSMauro Carvalho Chehab return err;
826cb7a01acSMauro Carvalho Chehab }
827cb7a01acSMauro Carvalho Chehab /* Detect if not already detected */
828cb7a01acSMauro Carvalho Chehab err = tvp514x_detect(sd, decoder);
829cb7a01acSMauro Carvalho Chehab if (err) {
830cb7a01acSMauro Carvalho Chehab v4l2_err(sd, "Unable to detect decoder\n");
831cb7a01acSMauro Carvalho Chehab return err;
832cb7a01acSMauro Carvalho Chehab }
833cb7a01acSMauro Carvalho Chehab err = tvp514x_configure(sd, decoder);
834cb7a01acSMauro Carvalho Chehab if (err) {
835cb7a01acSMauro Carvalho Chehab v4l2_err(sd, "Unable to configure decoder\n");
836cb7a01acSMauro Carvalho Chehab return err;
837cb7a01acSMauro Carvalho Chehab }
838cb7a01acSMauro Carvalho Chehab decoder->streaming = enable;
839cb7a01acSMauro Carvalho Chehab break;
840cb7a01acSMauro Carvalho Chehab }
841cb7a01acSMauro Carvalho Chehab default:
842cb7a01acSMauro Carvalho Chehab err = -ENODEV;
843cb7a01acSMauro Carvalho Chehab break;
844cb7a01acSMauro Carvalho Chehab }
845cb7a01acSMauro Carvalho Chehab
846cb7a01acSMauro Carvalho Chehab return err;
847cb7a01acSMauro Carvalho Chehab }
848cb7a01acSMauro Carvalho Chehab
849cb7a01acSMauro Carvalho Chehab static const struct v4l2_ctrl_ops tvp514x_ctrl_ops = {
850cb7a01acSMauro Carvalho Chehab .s_ctrl = tvp514x_s_ctrl,
851cb7a01acSMauro Carvalho Chehab };
852cb7a01acSMauro Carvalho Chehab
8535b38b0f8SManjunath Hadli /**
8545b38b0f8SManjunath Hadli * tvp514x_enum_mbus_code() - V4L2 decoder interface handler for enum_mbus_code
8555b38b0f8SManjunath Hadli * @sd: pointer to standard V4L2 sub-device structure
8560d346d2aSTomi Valkeinen * @sd_state: subdev state
8575b38b0f8SManjunath Hadli * @code: pointer to v4l2_subdev_mbus_code_enum structure
8585b38b0f8SManjunath Hadli *
8595b38b0f8SManjunath Hadli * Enumertaes mbus codes supported
8605b38b0f8SManjunath Hadli */
tvp514x_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_mbus_code_enum * code)8615b38b0f8SManjunath Hadli static int tvp514x_enum_mbus_code(struct v4l2_subdev *sd,
8620d346d2aSTomi Valkeinen struct v4l2_subdev_state *sd_state,
8635b38b0f8SManjunath Hadli struct v4l2_subdev_mbus_code_enum *code)
8645b38b0f8SManjunath Hadli {
8655b38b0f8SManjunath Hadli u32 pad = code->pad;
8665b38b0f8SManjunath Hadli u32 index = code->index;
8675b38b0f8SManjunath Hadli
8685b38b0f8SManjunath Hadli memset(code, 0, sizeof(*code));
8695b38b0f8SManjunath Hadli code->index = index;
8705b38b0f8SManjunath Hadli code->pad = pad;
8715b38b0f8SManjunath Hadli
8725b38b0f8SManjunath Hadli if (index != 0)
8735b38b0f8SManjunath Hadli return -EINVAL;
8745b38b0f8SManjunath Hadli
8751a33ac00SBenoit Parrot code->code = MEDIA_BUS_FMT_UYVY8_2X8;
8765b38b0f8SManjunath Hadli
8775b38b0f8SManjunath Hadli return 0;
8785b38b0f8SManjunath Hadli }
8795b38b0f8SManjunath Hadli
8805b38b0f8SManjunath Hadli /**
8815b38b0f8SManjunath Hadli * tvp514x_get_pad_format() - V4L2 decoder interface handler for get pad format
8825b38b0f8SManjunath Hadli * @sd: pointer to standard V4L2 sub-device structure
8830d346d2aSTomi Valkeinen * @sd_state: subdev state
8845b38b0f8SManjunath Hadli * @format: pointer to v4l2_subdev_format structure
8855b38b0f8SManjunath Hadli *
8865b38b0f8SManjunath Hadli * Retrieves pad format which is active or tried based on requirement
8875b38b0f8SManjunath Hadli */
tvp514x_get_pad_format(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_format * format)8885b38b0f8SManjunath Hadli static int tvp514x_get_pad_format(struct v4l2_subdev *sd,
8890d346d2aSTomi Valkeinen struct v4l2_subdev_state *sd_state,
8905b38b0f8SManjunath Hadli struct v4l2_subdev_format *format)
8915b38b0f8SManjunath Hadli {
8925b38b0f8SManjunath Hadli struct tvp514x_decoder *decoder = to_decoder(sd);
8935b38b0f8SManjunath Hadli __u32 which = format->which;
8945b38b0f8SManjunath Hadli
895da298c6dSHans Verkuil if (format->pad)
896da298c6dSHans Verkuil return -EINVAL;
897da298c6dSHans Verkuil
8985b38b0f8SManjunath Hadli if (which == V4L2_SUBDEV_FORMAT_ACTIVE) {
8995b38b0f8SManjunath Hadli format->format = decoder->format;
9005b38b0f8SManjunath Hadli return 0;
9015b38b0f8SManjunath Hadli }
9025b38b0f8SManjunath Hadli
9031a33ac00SBenoit Parrot format->format.code = MEDIA_BUS_FMT_UYVY8_2X8;
9045b38b0f8SManjunath Hadli format->format.width = tvp514x_std_list[decoder->current_std].width;
9055b38b0f8SManjunath Hadli format->format.height = tvp514x_std_list[decoder->current_std].height;
9065b38b0f8SManjunath Hadli format->format.colorspace = V4L2_COLORSPACE_SMPTE170M;
9075b38b0f8SManjunath Hadli format->format.field = V4L2_FIELD_INTERLACED;
9085b38b0f8SManjunath Hadli
9095b38b0f8SManjunath Hadli return 0;
9105b38b0f8SManjunath Hadli }
9115b38b0f8SManjunath Hadli
9125b38b0f8SManjunath Hadli /**
9135b38b0f8SManjunath Hadli * tvp514x_set_pad_format() - V4L2 decoder interface handler for set pad format
9145b38b0f8SManjunath Hadli * @sd: pointer to standard V4L2 sub-device structure
9150d346d2aSTomi Valkeinen * @sd_state: subdev state
916c5bb8318SMauro Carvalho Chehab * @fmt: pointer to v4l2_subdev_format structure
9175b38b0f8SManjunath Hadli *
9185b38b0f8SManjunath Hadli * Set pad format for the output pad
9195b38b0f8SManjunath Hadli */
tvp514x_set_pad_format(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_format * fmt)9205b38b0f8SManjunath Hadli static int tvp514x_set_pad_format(struct v4l2_subdev *sd,
9210d346d2aSTomi Valkeinen struct v4l2_subdev_state *sd_state,
9225b38b0f8SManjunath Hadli struct v4l2_subdev_format *fmt)
9235b38b0f8SManjunath Hadli {
9245b38b0f8SManjunath Hadli struct tvp514x_decoder *decoder = to_decoder(sd);
9255b38b0f8SManjunath Hadli
9265b38b0f8SManjunath Hadli if (fmt->format.field != V4L2_FIELD_INTERLACED ||
9271a33ac00SBenoit Parrot fmt->format.code != MEDIA_BUS_FMT_UYVY8_2X8 ||
9285b38b0f8SManjunath Hadli fmt->format.colorspace != V4L2_COLORSPACE_SMPTE170M ||
9295b38b0f8SManjunath Hadli fmt->format.width != tvp514x_std_list[decoder->current_std].width ||
9305b38b0f8SManjunath Hadli fmt->format.height != tvp514x_std_list[decoder->current_std].height)
9315b38b0f8SManjunath Hadli return -EINVAL;
9325b38b0f8SManjunath Hadli
9335b38b0f8SManjunath Hadli decoder->format = fmt->format;
9345b38b0f8SManjunath Hadli
9355b38b0f8SManjunath Hadli return 0;
9365b38b0f8SManjunath Hadli }
9375b38b0f8SManjunath Hadli
938cb7a01acSMauro Carvalho Chehab static const struct v4l2_subdev_video_ops tvp514x_video_ops = {
9398774bed9SLaurent Pinchart .s_std = tvp514x_s_std,
940cb7a01acSMauro Carvalho Chehab .s_routing = tvp514x_s_routing,
941cb7a01acSMauro Carvalho Chehab .querystd = tvp514x_querystd,
9424471109eSHans Verkuil .g_frame_interval = tvp514x_g_frame_interval,
9434471109eSHans Verkuil .s_frame_interval = tvp514x_s_frame_interval,
944cb7a01acSMauro Carvalho Chehab .s_stream = tvp514x_s_stream,
945cb7a01acSMauro Carvalho Chehab };
946cb7a01acSMauro Carvalho Chehab
9475b38b0f8SManjunath Hadli static const struct v4l2_subdev_pad_ops tvp514x_pad_ops = {
9485b38b0f8SManjunath Hadli .enum_mbus_code = tvp514x_enum_mbus_code,
9495b38b0f8SManjunath Hadli .get_fmt = tvp514x_get_pad_format,
9505b38b0f8SManjunath Hadli .set_fmt = tvp514x_set_pad_format,
9515b38b0f8SManjunath Hadli };
9525b38b0f8SManjunath Hadli
953cb7a01acSMauro Carvalho Chehab static const struct v4l2_subdev_ops tvp514x_ops = {
954cb7a01acSMauro Carvalho Chehab .video = &tvp514x_video_ops,
9555b38b0f8SManjunath Hadli .pad = &tvp514x_pad_ops,
956cb7a01acSMauro Carvalho Chehab };
957cb7a01acSMauro Carvalho Chehab
958db83d08dSJulia Lawall static const struct tvp514x_decoder tvp514x_dev = {
959cb7a01acSMauro Carvalho Chehab .streaming = 0,
9605b38b0f8SManjunath Hadli .fmt_list = tvp514x_fmt_list,
9615b38b0f8SManjunath Hadli .num_fmts = ARRAY_SIZE(tvp514x_fmt_list),
9625b38b0f8SManjunath Hadli .pix = {
9635b38b0f8SManjunath Hadli /* Default to NTSC 8-bit YUV 422 */
9645b38b0f8SManjunath Hadli .width = NTSC_NUM_ACTIVE_PIXELS,
9655b38b0f8SManjunath Hadli .height = NTSC_NUM_ACTIVE_LINES,
9665b38b0f8SManjunath Hadli .pixelformat = V4L2_PIX_FMT_UYVY,
9675b38b0f8SManjunath Hadli .field = V4L2_FIELD_INTERLACED,
9685b38b0f8SManjunath Hadli .bytesperline = NTSC_NUM_ACTIVE_PIXELS * 2,
9695b38b0f8SManjunath Hadli .sizeimage = NTSC_NUM_ACTIVE_PIXELS * 2 *
9705b38b0f8SManjunath Hadli NTSC_NUM_ACTIVE_LINES,
9715b38b0f8SManjunath Hadli .colorspace = V4L2_COLORSPACE_SMPTE170M,
9725b38b0f8SManjunath Hadli },
973cb7a01acSMauro Carvalho Chehab .current_std = STD_NTSC_MJ,
974cb7a01acSMauro Carvalho Chehab .std_list = tvp514x_std_list,
975cb7a01acSMauro Carvalho Chehab .num_stds = ARRAY_SIZE(tvp514x_std_list),
976cb7a01acSMauro Carvalho Chehab
977cb7a01acSMauro Carvalho Chehab };
978cb7a01acSMauro Carvalho Chehab
979b610b592SLad, Prabhakar static struct tvp514x_platform_data *
tvp514x_get_pdata(struct i2c_client * client)980b610b592SLad, Prabhakar tvp514x_get_pdata(struct i2c_client *client)
981b610b592SLad, Prabhakar {
982fe1e6ac6SJavier Martinez Canillas struct tvp514x_platform_data *pdata = NULL;
98360359a28SSakari Ailus struct v4l2_fwnode_endpoint bus_cfg = { .bus_type = 0 };
984b610b592SLad, Prabhakar struct device_node *endpoint;
985b610b592SLad, Prabhakar unsigned int flags;
986b610b592SLad, Prabhakar
987b610b592SLad, Prabhakar if (!IS_ENABLED(CONFIG_OF) || !client->dev.of_node)
988b610b592SLad, Prabhakar return client->dev.platform_data;
989b610b592SLad, Prabhakar
990fd9fdb78SPhilipp Zabel endpoint = of_graph_get_next_endpoint(client->dev.of_node, NULL);
991b610b592SLad, Prabhakar if (!endpoint)
992b610b592SLad, Prabhakar return NULL;
993b610b592SLad, Prabhakar
994859969b3SSakari Ailus if (v4l2_fwnode_endpoint_parse(of_fwnode_handle(endpoint), &bus_cfg))
995fe1e6ac6SJavier Martinez Canillas goto done;
996fe1e6ac6SJavier Martinez Canillas
997b610b592SLad, Prabhakar pdata = devm_kzalloc(&client->dev, sizeof(*pdata), GFP_KERNEL);
998b610b592SLad, Prabhakar if (!pdata)
999b610b592SLad, Prabhakar goto done;
1000b610b592SLad, Prabhakar
1001b610b592SLad, Prabhakar flags = bus_cfg.bus.parallel.flags;
1002b610b592SLad, Prabhakar
1003b610b592SLad, Prabhakar if (flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH)
1004b610b592SLad, Prabhakar pdata->hs_polarity = 1;
1005b610b592SLad, Prabhakar
1006b610b592SLad, Prabhakar if (flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH)
1007b610b592SLad, Prabhakar pdata->vs_polarity = 1;
1008b610b592SLad, Prabhakar
1009b610b592SLad, Prabhakar if (flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
1010b610b592SLad, Prabhakar pdata->clk_polarity = 1;
1011b610b592SLad, Prabhakar
1012b610b592SLad, Prabhakar done:
1013b610b592SLad, Prabhakar of_node_put(endpoint);
1014b610b592SLad, Prabhakar return pdata;
1015b610b592SLad, Prabhakar }
1016b610b592SLad, Prabhakar
1017cb7a01acSMauro Carvalho Chehab /**
1018cb7a01acSMauro Carvalho Chehab * tvp514x_probe() - decoder driver i2c probe handler
1019cb7a01acSMauro Carvalho Chehab * @client: i2c driver client device structure
1020cb7a01acSMauro Carvalho Chehab *
1021cb7a01acSMauro Carvalho Chehab * Register decoder as an i2c client device and V4L2
1022cb7a01acSMauro Carvalho Chehab * device.
1023cb7a01acSMauro Carvalho Chehab */
1024cb7a01acSMauro Carvalho Chehab static int
tvp514x_probe(struct i2c_client * client)1025bb09c94dSUwe Kleine-König tvp514x_probe(struct i2c_client *client)
1026cb7a01acSMauro Carvalho Chehab {
1027bb09c94dSUwe Kleine-König const struct i2c_device_id *id = i2c_client_get_device_id(client);
1028b610b592SLad, Prabhakar struct tvp514x_platform_data *pdata = tvp514x_get_pdata(client);
1029cb7a01acSMauro Carvalho Chehab struct tvp514x_decoder *decoder;
1030cb7a01acSMauro Carvalho Chehab struct v4l2_subdev *sd;
10315b38b0f8SManjunath Hadli int ret;
1032cb7a01acSMauro Carvalho Chehab
1033b610b592SLad, Prabhakar if (pdata == NULL) {
1034b610b592SLad, Prabhakar dev_err(&client->dev, "No platform data\n");
1035b610b592SLad, Prabhakar return -EINVAL;
1036b610b592SLad, Prabhakar }
1037b610b592SLad, Prabhakar
1038cb7a01acSMauro Carvalho Chehab /* Check if the adapter supports the needed features */
1039cb7a01acSMauro Carvalho Chehab if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1040cb7a01acSMauro Carvalho Chehab return -EIO;
1041cb7a01acSMauro Carvalho Chehab
104208754d31SLad, Prabhakar decoder = devm_kzalloc(&client->dev, sizeof(*decoder), GFP_KERNEL);
1043cb7a01acSMauro Carvalho Chehab if (!decoder)
1044cb7a01acSMauro Carvalho Chehab return -ENOMEM;
1045cb7a01acSMauro Carvalho Chehab
1046cb7a01acSMauro Carvalho Chehab /* Initialize the tvp514x_decoder with default configuration */
1047cb7a01acSMauro Carvalho Chehab *decoder = tvp514x_dev;
1048cb7a01acSMauro Carvalho Chehab /* Copy default register configuration */
1049cb7a01acSMauro Carvalho Chehab memcpy(decoder->tvp514x_regs, tvp514x_reg_list_default,
1050cb7a01acSMauro Carvalho Chehab sizeof(tvp514x_reg_list_default));
1051cb7a01acSMauro Carvalho Chehab
1052f0a12d0cSLars-Peter Clausen decoder->int_seq = (struct tvp514x_reg *)id->driver_data;
1053f0a12d0cSLars-Peter Clausen
1054cb7a01acSMauro Carvalho Chehab /* Copy board specific information here */
1055b610b592SLad, Prabhakar decoder->pdata = pdata;
1056cb7a01acSMauro Carvalho Chehab
1057cb7a01acSMauro Carvalho Chehab /**
1058cb7a01acSMauro Carvalho Chehab * Fetch platform specific data, and configure the
1059cb7a01acSMauro Carvalho Chehab * tvp514x_reg_list[] accordingly. Since this is one
1060cb7a01acSMauro Carvalho Chehab * time configuration, no need to preserve.
1061cb7a01acSMauro Carvalho Chehab */
1062cb7a01acSMauro Carvalho Chehab decoder->tvp514x_regs[REG_OUTPUT_FORMATTER2].val |=
1063cb7a01acSMauro Carvalho Chehab (decoder->pdata->clk_polarity << 1);
1064cb7a01acSMauro Carvalho Chehab decoder->tvp514x_regs[REG_SYNC_CONTROL].val |=
1065cb7a01acSMauro Carvalho Chehab ((decoder->pdata->hs_polarity << 2) |
1066cb7a01acSMauro Carvalho Chehab (decoder->pdata->vs_polarity << 3));
1067cb7a01acSMauro Carvalho Chehab /* Set default standard to auto */
1068cb7a01acSMauro Carvalho Chehab decoder->tvp514x_regs[REG_VIDEO_STD].val =
1069cb7a01acSMauro Carvalho Chehab VIDEO_STD_AUTO_SWITCH_BIT;
1070cb7a01acSMauro Carvalho Chehab
1071cb7a01acSMauro Carvalho Chehab /* Register with V4L2 layer as slave device */
1072cb7a01acSMauro Carvalho Chehab sd = &decoder->sd;
1073cb7a01acSMauro Carvalho Chehab v4l2_i2c_subdev_init(sd, client, &tvp514x_ops);
1074cb7a01acSMauro Carvalho Chehab
10755b38b0f8SManjunath Hadli #if defined(CONFIG_MEDIA_CONTROLLER)
10765b38b0f8SManjunath Hadli decoder->pad.flags = MEDIA_PAD_FL_SOURCE;
10775b38b0f8SManjunath Hadli decoder->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1078ca0fa5f0SHans Verkuil decoder->sd.entity.function = MEDIA_ENT_F_ATV_DECODER;
10795b38b0f8SManjunath Hadli
1080ab22e77cSMauro Carvalho Chehab ret = media_entity_pads_init(&decoder->sd.entity, 1, &decoder->pad);
10815b38b0f8SManjunath Hadli if (ret < 0) {
10825b38b0f8SManjunath Hadli v4l2_err(sd, "%s decoder driver failed to register !!\n",
10835b38b0f8SManjunath Hadli sd->name);
10845b38b0f8SManjunath Hadli return ret;
10855b38b0f8SManjunath Hadli }
10865b38b0f8SManjunath Hadli #endif
1087cb7a01acSMauro Carvalho Chehab v4l2_ctrl_handler_init(&decoder->hdl, 5);
1088cb7a01acSMauro Carvalho Chehab v4l2_ctrl_new_std(&decoder->hdl, &tvp514x_ctrl_ops,
1089cb7a01acSMauro Carvalho Chehab V4L2_CID_BRIGHTNESS, 0, 255, 1, 128);
1090cb7a01acSMauro Carvalho Chehab v4l2_ctrl_new_std(&decoder->hdl, &tvp514x_ctrl_ops,
1091cb7a01acSMauro Carvalho Chehab V4L2_CID_CONTRAST, 0, 255, 1, 128);
1092cb7a01acSMauro Carvalho Chehab v4l2_ctrl_new_std(&decoder->hdl, &tvp514x_ctrl_ops,
1093cb7a01acSMauro Carvalho Chehab V4L2_CID_SATURATION, 0, 255, 1, 128);
1094cb7a01acSMauro Carvalho Chehab v4l2_ctrl_new_std(&decoder->hdl, &tvp514x_ctrl_ops,
1095cb7a01acSMauro Carvalho Chehab V4L2_CID_HUE, -180, 180, 180, 0);
1096cb7a01acSMauro Carvalho Chehab v4l2_ctrl_new_std(&decoder->hdl, &tvp514x_ctrl_ops,
1097cb7a01acSMauro Carvalho Chehab V4L2_CID_AUTOGAIN, 0, 1, 1, 1);
1098cb7a01acSMauro Carvalho Chehab sd->ctrl_handler = &decoder->hdl;
1099cb7a01acSMauro Carvalho Chehab if (decoder->hdl.error) {
11005b38b0f8SManjunath Hadli ret = decoder->hdl.error;
11018f23acb5SLad, Prabhakar goto done;
1102cb7a01acSMauro Carvalho Chehab }
1103cb7a01acSMauro Carvalho Chehab v4l2_ctrl_handler_setup(&decoder->hdl);
1104cb7a01acSMauro Carvalho Chehab
11058f23acb5SLad, Prabhakar ret = v4l2_async_register_subdev(&decoder->sd);
11068f23acb5SLad, Prabhakar if (!ret)
1107cb7a01acSMauro Carvalho Chehab v4l2_info(sd, "%s decoder driver registered !!\n", sd->name);
1108cb7a01acSMauro Carvalho Chehab
11098f23acb5SLad, Prabhakar done:
11108f23acb5SLad, Prabhakar if (ret < 0) {
11118f23acb5SLad, Prabhakar v4l2_ctrl_handler_free(&decoder->hdl);
11128f23acb5SLad, Prabhakar media_entity_cleanup(&decoder->sd.entity);
11138f23acb5SLad, Prabhakar }
11148f23acb5SLad, Prabhakar return ret;
1115cb7a01acSMauro Carvalho Chehab }
1116cb7a01acSMauro Carvalho Chehab
1117cb7a01acSMauro Carvalho Chehab /**
1118cb7a01acSMauro Carvalho Chehab * tvp514x_remove() - decoder driver i2c remove handler
1119cb7a01acSMauro Carvalho Chehab * @client: i2c driver client device structure
1120cb7a01acSMauro Carvalho Chehab *
1121cb7a01acSMauro Carvalho Chehab * Unregister decoder as an i2c client device and V4L2
1122cb7a01acSMauro Carvalho Chehab * device. Complement of tvp514x_probe().
1123cb7a01acSMauro Carvalho Chehab */
tvp514x_remove(struct i2c_client * client)1124ed5c2f5fSUwe Kleine-König static void tvp514x_remove(struct i2c_client *client)
1125cb7a01acSMauro Carvalho Chehab {
1126cb7a01acSMauro Carvalho Chehab struct v4l2_subdev *sd = i2c_get_clientdata(client);
1127cb7a01acSMauro Carvalho Chehab struct tvp514x_decoder *decoder = to_decoder(sd);
1128cb7a01acSMauro Carvalho Chehab
11298f23acb5SLad, Prabhakar v4l2_async_unregister_subdev(&decoder->sd);
11305b38b0f8SManjunath Hadli media_entity_cleanup(&decoder->sd.entity);
1131cb7a01acSMauro Carvalho Chehab v4l2_ctrl_handler_free(&decoder->hdl);
1132cb7a01acSMauro Carvalho Chehab }
1133cb7a01acSMauro Carvalho Chehab /* TVP5146 Init/Power on Sequence */
1134cb7a01acSMauro Carvalho Chehab static const struct tvp514x_reg tvp5146_init_reg_seq[] = {
1135cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS1, 0x02},
1136cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS2, 0x00},
1137cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS3, 0x80},
1138cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_VBUS_DATA_ACCESS_NO_VBUS_ADDR_INCR, 0x01},
1139cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS1, 0x60},
1140cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS2, 0x00},
1141cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS3, 0xB0},
1142cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_VBUS_DATA_ACCESS_NO_VBUS_ADDR_INCR, 0x01},
1143cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_VBUS_DATA_ACCESS_NO_VBUS_ADDR_INCR, 0x00},
1144cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_OPERATION_MODE, 0x01},
1145cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_OPERATION_MODE, 0x00},
1146cb7a01acSMauro Carvalho Chehab {TOK_TERM, 0, 0},
1147cb7a01acSMauro Carvalho Chehab };
1148cb7a01acSMauro Carvalho Chehab
1149cb7a01acSMauro Carvalho Chehab /* TVP5147 Init/Power on Sequence */
1150cb7a01acSMauro Carvalho Chehab static const struct tvp514x_reg tvp5147_init_reg_seq[] = {
1151cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS1, 0x02},
1152cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS2, 0x00},
1153cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS3, 0x80},
1154cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_VBUS_DATA_ACCESS_NO_VBUS_ADDR_INCR, 0x01},
1155cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS1, 0x60},
1156cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS2, 0x00},
1157cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS3, 0xB0},
1158cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_VBUS_DATA_ACCESS_NO_VBUS_ADDR_INCR, 0x01},
1159cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS1, 0x16},
1160cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS2, 0x00},
1161cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS3, 0xA0},
1162cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_VBUS_DATA_ACCESS_NO_VBUS_ADDR_INCR, 0x16},
1163cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS1, 0x60},
1164cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS2, 0x00},
1165cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS3, 0xB0},
1166cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_VBUS_DATA_ACCESS_NO_VBUS_ADDR_INCR, 0x00},
1167cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_OPERATION_MODE, 0x01},
1168cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_OPERATION_MODE, 0x00},
1169cb7a01acSMauro Carvalho Chehab {TOK_TERM, 0, 0},
1170cb7a01acSMauro Carvalho Chehab };
1171cb7a01acSMauro Carvalho Chehab
1172cb7a01acSMauro Carvalho Chehab /* TVP5146M2/TVP5147M1 Init/Power on Sequence */
1173cb7a01acSMauro Carvalho Chehab static const struct tvp514x_reg tvp514xm_init_reg_seq[] = {
1174cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_OPERATION_MODE, 0x01},
1175cb7a01acSMauro Carvalho Chehab {TOK_WRITE, REG_OPERATION_MODE, 0x00},
1176cb7a01acSMauro Carvalho Chehab {TOK_TERM, 0, 0},
1177cb7a01acSMauro Carvalho Chehab };
1178cb7a01acSMauro Carvalho Chehab
1179c5bb8318SMauro Carvalho Chehab /*
1180cb7a01acSMauro Carvalho Chehab * I2C Device Table -
1181cb7a01acSMauro Carvalho Chehab *
1182cb7a01acSMauro Carvalho Chehab * name - Name of the actual device/chip.
1183cb7a01acSMauro Carvalho Chehab * driver_data - Driver data
1184cb7a01acSMauro Carvalho Chehab */
1185cb7a01acSMauro Carvalho Chehab static const struct i2c_device_id tvp514x_id[] = {
1186cb7a01acSMauro Carvalho Chehab {"tvp5146", (unsigned long)tvp5146_init_reg_seq},
1187cb7a01acSMauro Carvalho Chehab {"tvp5146m2", (unsigned long)tvp514xm_init_reg_seq},
1188cb7a01acSMauro Carvalho Chehab {"tvp5147", (unsigned long)tvp5147_init_reg_seq},
1189cb7a01acSMauro Carvalho Chehab {"tvp5147m1", (unsigned long)tvp514xm_init_reg_seq},
1190cb7a01acSMauro Carvalho Chehab {},
1191cb7a01acSMauro Carvalho Chehab };
1192cb7a01acSMauro Carvalho Chehab
1193cb7a01acSMauro Carvalho Chehab MODULE_DEVICE_TABLE(i2c, tvp514x_id);
1194cb7a01acSMauro Carvalho Chehab
1195b610b592SLad, Prabhakar #if IS_ENABLED(CONFIG_OF)
1196b610b592SLad, Prabhakar static const struct of_device_id tvp514x_of_match[] = {
1197b610b592SLad, Prabhakar { .compatible = "ti,tvp5146", },
1198b610b592SLad, Prabhakar { .compatible = "ti,tvp5146m2", },
1199b610b592SLad, Prabhakar { .compatible = "ti,tvp5147", },
1200b610b592SLad, Prabhakar { .compatible = "ti,tvp5147m1", },
1201b610b592SLad, Prabhakar { /* sentinel */ },
1202b610b592SLad, Prabhakar };
1203b610b592SLad, Prabhakar MODULE_DEVICE_TABLE(of, tvp514x_of_match);
1204b610b592SLad, Prabhakar #endif
1205b610b592SLad, Prabhakar
1206cb7a01acSMauro Carvalho Chehab static struct i2c_driver tvp514x_driver = {
1207cb7a01acSMauro Carvalho Chehab .driver = {
1208b610b592SLad, Prabhakar .of_match_table = of_match_ptr(tvp514x_of_match),
1209cb7a01acSMauro Carvalho Chehab .name = TVP514X_MODULE_NAME,
1210cb7a01acSMauro Carvalho Chehab },
1211*aaeb31c0SUwe Kleine-König .probe = tvp514x_probe,
1212cb7a01acSMauro Carvalho Chehab .remove = tvp514x_remove,
1213cb7a01acSMauro Carvalho Chehab .id_table = tvp514x_id,
1214cb7a01acSMauro Carvalho Chehab };
1215cb7a01acSMauro Carvalho Chehab
1216cb7a01acSMauro Carvalho Chehab module_i2c_driver(tvp514x_driver);
1217