1 /* 2 * Driver for simple i2c audio chips. 3 * 4 * Copyright (c) 2000 Gerd Knorr 5 * based on code by: 6 * Eric Sandeen (eric_sandeen@bigfoot.com) 7 * Steve VanDeBogart (vandebo@uclink.berkeley.edu) 8 * Greg Alexander (galexand@acm.org) 9 * 10 * For the TDA9875 part: 11 * Copyright (c) 2000 Guillaume Delvit based on Gerd Knorr source 12 * and Eric Sandeen 13 * 14 * Copyright(c) 2005-2008 Mauro Carvalho Chehab 15 * - Some cleanups, code fixes, etc 16 * - Convert it to V4L2 API 17 * 18 * This code is placed under the terms of the GNU General Public License 19 * 20 * OPTIONS: 21 * debug - set to 1 if you'd like to see debug messages 22 * 23 */ 24 25 #include <linux/module.h> 26 #include <linux/kernel.h> 27 #include <linux/sched.h> 28 #include <linux/string.h> 29 #include <linux/timer.h> 30 #include <linux/delay.h> 31 #include <linux/errno.h> 32 #include <linux/slab.h> 33 #include <linux/videodev2.h> 34 #include <linux/i2c.h> 35 #include <linux/init.h> 36 #include <linux/kthread.h> 37 #include <linux/freezer.h> 38 39 #include <media/i2c/tvaudio.h> 40 #include <media/v4l2-device.h> 41 #include <media/v4l2-ctrls.h> 42 43 /* ---------------------------------------------------------------------- */ 44 /* insmod args */ 45 46 static int debug; /* insmod parameter */ 47 module_param(debug, int, 0644); 48 49 MODULE_DESCRIPTION("device driver for various i2c TV sound decoder / audiomux chips"); 50 MODULE_AUTHOR("Eric Sandeen, Steve VanDeBogart, Greg Alexander, Gerd Knorr"); 51 MODULE_LICENSE("GPL"); 52 53 #define UNSET (-1U) 54 55 /* ---------------------------------------------------------------------- */ 56 /* our structs */ 57 58 #define MAXREGS 256 59 60 struct CHIPSTATE; 61 typedef int (*getvalue)(int); 62 typedef int (*checkit)(struct CHIPSTATE*); 63 typedef int (*initialize)(struct CHIPSTATE*); 64 typedef int (*getrxsubchans)(struct CHIPSTATE *); 65 typedef void (*setaudmode)(struct CHIPSTATE*, int mode); 66 67 /* i2c command */ 68 typedef struct AUDIOCMD { 69 int count; /* # of bytes to send */ 70 unsigned char bytes[MAXREGS+1]; /* addr, data, data, ... */ 71 } audiocmd; 72 73 /* chip description */ 74 struct CHIPDESC { 75 char *name; /* chip name */ 76 int addr_lo, addr_hi; /* i2c address range */ 77 int registers; /* # of registers */ 78 79 int *insmodopt; 80 checkit checkit; 81 initialize initialize; 82 int flags; 83 #define CHIP_HAS_VOLUME 1 84 #define CHIP_HAS_BASSTREBLE 2 85 #define CHIP_HAS_INPUTSEL 4 86 #define CHIP_NEED_CHECKMODE 8 87 88 /* various i2c command sequences */ 89 audiocmd init; 90 91 /* which register has which value */ 92 int leftreg, rightreg, treblereg, bassreg; 93 94 /* initialize with (defaults to 65535/32768/32768 */ 95 int volinit, trebleinit, bassinit; 96 97 /* functions to convert the values (v4l -> chip) */ 98 getvalue volfunc, treblefunc, bassfunc; 99 100 /* get/set mode */ 101 getrxsubchans getrxsubchans; 102 setaudmode setaudmode; 103 104 /* input switch register + values for v4l inputs */ 105 int inputreg; 106 int inputmap[4]; 107 int inputmute; 108 int inputmask; 109 }; 110 111 /* current state of the chip */ 112 struct CHIPSTATE { 113 struct v4l2_subdev sd; 114 struct v4l2_ctrl_handler hdl; 115 struct { 116 /* volume/balance cluster */ 117 struct v4l2_ctrl *volume; 118 struct v4l2_ctrl *balance; 119 }; 120 121 /* chip-specific description - should point to 122 an entry at CHIPDESC table */ 123 struct CHIPDESC *desc; 124 125 /* shadow register set */ 126 audiocmd shadow; 127 128 /* current settings */ 129 u16 muted; 130 int prevmode; 131 int radio; 132 int input; 133 134 /* thread */ 135 struct task_struct *thread; 136 struct timer_list wt; 137 int audmode; 138 }; 139 140 static inline struct CHIPSTATE *to_state(struct v4l2_subdev *sd) 141 { 142 return container_of(sd, struct CHIPSTATE, sd); 143 } 144 145 static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl) 146 { 147 return &container_of(ctrl->handler, struct CHIPSTATE, hdl)->sd; 148 } 149 150 151 /* ---------------------------------------------------------------------- */ 152 /* i2c I/O functions */ 153 154 static int chip_write(struct CHIPSTATE *chip, int subaddr, int val) 155 { 156 struct v4l2_subdev *sd = &chip->sd; 157 struct i2c_client *c = v4l2_get_subdevdata(sd); 158 unsigned char buffer[2]; 159 160 if (subaddr < 0) { 161 v4l2_dbg(1, debug, sd, "chip_write: 0x%x\n", val); 162 chip->shadow.bytes[1] = val; 163 buffer[0] = val; 164 if (1 != i2c_master_send(c, buffer, 1)) { 165 v4l2_warn(sd, "I/O error (write 0x%x)\n", val); 166 return -1; 167 } 168 } else { 169 if (subaddr + 1 >= ARRAY_SIZE(chip->shadow.bytes)) { 170 v4l2_info(sd, 171 "Tried to access a non-existent register: %d\n", 172 subaddr); 173 return -EINVAL; 174 } 175 176 v4l2_dbg(1, debug, sd, "chip_write: reg%d=0x%x\n", 177 subaddr, val); 178 chip->shadow.bytes[subaddr+1] = val; 179 buffer[0] = subaddr; 180 buffer[1] = val; 181 if (2 != i2c_master_send(c, buffer, 2)) { 182 v4l2_warn(sd, "I/O error (write reg%d=0x%x)\n", 183 subaddr, val); 184 return -1; 185 } 186 } 187 return 0; 188 } 189 190 static int chip_write_masked(struct CHIPSTATE *chip, 191 int subaddr, int val, int mask) 192 { 193 struct v4l2_subdev *sd = &chip->sd; 194 195 if (mask != 0) { 196 if (subaddr < 0) { 197 val = (chip->shadow.bytes[1] & ~mask) | (val & mask); 198 } else { 199 if (subaddr + 1 >= ARRAY_SIZE(chip->shadow.bytes)) { 200 v4l2_info(sd, 201 "Tried to access a non-existent register: %d\n", 202 subaddr); 203 return -EINVAL; 204 } 205 206 val = (chip->shadow.bytes[subaddr+1] & ~mask) | (val & mask); 207 } 208 } 209 return chip_write(chip, subaddr, val); 210 } 211 212 static int chip_read(struct CHIPSTATE *chip) 213 { 214 struct v4l2_subdev *sd = &chip->sd; 215 struct i2c_client *c = v4l2_get_subdevdata(sd); 216 unsigned char buffer; 217 218 if (1 != i2c_master_recv(c, &buffer, 1)) { 219 v4l2_warn(sd, "I/O error (read)\n"); 220 return -1; 221 } 222 v4l2_dbg(1, debug, sd, "chip_read: 0x%x\n", buffer); 223 return buffer; 224 } 225 226 static int chip_read2(struct CHIPSTATE *chip, int subaddr) 227 { 228 struct v4l2_subdev *sd = &chip->sd; 229 struct i2c_client *c = v4l2_get_subdevdata(sd); 230 unsigned char write[1]; 231 unsigned char read[1]; 232 struct i2c_msg msgs[2] = { 233 { 234 .addr = c->addr, 235 .len = 1, 236 .buf = write 237 }, 238 { 239 .addr = c->addr, 240 .flags = I2C_M_RD, 241 .len = 1, 242 .buf = read 243 } 244 }; 245 246 write[0] = subaddr; 247 248 if (2 != i2c_transfer(c->adapter, msgs, 2)) { 249 v4l2_warn(sd, "I/O error (read2)\n"); 250 return -1; 251 } 252 v4l2_dbg(1, debug, sd, "chip_read2: reg%d=0x%x\n", 253 subaddr, read[0]); 254 return read[0]; 255 } 256 257 static int chip_cmd(struct CHIPSTATE *chip, char *name, audiocmd *cmd) 258 { 259 struct v4l2_subdev *sd = &chip->sd; 260 struct i2c_client *c = v4l2_get_subdevdata(sd); 261 int i; 262 263 if (0 == cmd->count) 264 return 0; 265 266 if (cmd->count + cmd->bytes[0] - 1 >= ARRAY_SIZE(chip->shadow.bytes)) { 267 v4l2_info(sd, 268 "Tried to access a non-existent register range: %d to %d\n", 269 cmd->bytes[0] + 1, cmd->bytes[0] + cmd->count - 1); 270 return -EINVAL; 271 } 272 273 /* FIXME: it seems that the shadow bytes are wrong below !*/ 274 275 /* update our shadow register set; print bytes if (debug > 0) */ 276 v4l2_dbg(1, debug, sd, "chip_cmd(%s): reg=%d, data:", 277 name, cmd->bytes[0]); 278 for (i = 1; i < cmd->count; i++) { 279 if (debug) 280 printk(KERN_CONT " 0x%x", cmd->bytes[i]); 281 chip->shadow.bytes[i+cmd->bytes[0]] = cmd->bytes[i]; 282 } 283 if (debug) 284 printk(KERN_CONT "\n"); 285 286 /* send data to the chip */ 287 if (cmd->count != i2c_master_send(c, cmd->bytes, cmd->count)) { 288 v4l2_warn(sd, "I/O error (%s)\n", name); 289 return -1; 290 } 291 return 0; 292 } 293 294 /* ---------------------------------------------------------------------- */ 295 /* kernel thread for doing i2c stuff asyncronly 296 * right now it is used only to check the audio mode (mono/stereo/whatever) 297 * some time after switching to another TV channel, then turn on stereo 298 * if available, ... 299 */ 300 301 static void chip_thread_wake(struct timer_list *t) 302 { 303 struct CHIPSTATE *chip = from_timer(chip, t, wt); 304 wake_up_process(chip->thread); 305 } 306 307 static int chip_thread(void *data) 308 { 309 struct CHIPSTATE *chip = data; 310 struct CHIPDESC *desc = chip->desc; 311 struct v4l2_subdev *sd = &chip->sd; 312 int mode, selected; 313 314 v4l2_dbg(1, debug, sd, "thread started\n"); 315 set_freezable(); 316 for (;;) { 317 set_current_state(TASK_INTERRUPTIBLE); 318 if (!kthread_should_stop()) 319 schedule(); 320 set_current_state(TASK_RUNNING); 321 try_to_freeze(); 322 if (kthread_should_stop()) 323 break; 324 v4l2_dbg(1, debug, sd, "thread wakeup\n"); 325 326 /* don't do anything for radio */ 327 if (chip->radio) 328 continue; 329 330 /* have a look what's going on */ 331 mode = desc->getrxsubchans(chip); 332 if (mode == chip->prevmode) 333 continue; 334 335 /* chip detected a new audio mode - set it */ 336 v4l2_dbg(1, debug, sd, "thread checkmode\n"); 337 338 chip->prevmode = mode; 339 340 selected = V4L2_TUNER_MODE_MONO; 341 switch (chip->audmode) { 342 case V4L2_TUNER_MODE_MONO: 343 if (mode & V4L2_TUNER_SUB_LANG1) 344 selected = V4L2_TUNER_MODE_LANG1; 345 break; 346 case V4L2_TUNER_MODE_STEREO: 347 case V4L2_TUNER_MODE_LANG1: 348 if (mode & V4L2_TUNER_SUB_LANG1) 349 selected = V4L2_TUNER_MODE_LANG1; 350 else if (mode & V4L2_TUNER_SUB_STEREO) 351 selected = V4L2_TUNER_MODE_STEREO; 352 break; 353 case V4L2_TUNER_MODE_LANG2: 354 if (mode & V4L2_TUNER_SUB_LANG2) 355 selected = V4L2_TUNER_MODE_LANG2; 356 else if (mode & V4L2_TUNER_SUB_STEREO) 357 selected = V4L2_TUNER_MODE_STEREO; 358 break; 359 case V4L2_TUNER_MODE_LANG1_LANG2: 360 if (mode & V4L2_TUNER_SUB_LANG2) 361 selected = V4L2_TUNER_MODE_LANG1_LANG2; 362 else if (mode & V4L2_TUNER_SUB_STEREO) 363 selected = V4L2_TUNER_MODE_STEREO; 364 } 365 desc->setaudmode(chip, selected); 366 367 /* schedule next check */ 368 mod_timer(&chip->wt, jiffies+msecs_to_jiffies(2000)); 369 } 370 371 v4l2_dbg(1, debug, sd, "thread exiting\n"); 372 return 0; 373 } 374 375 /* ---------------------------------------------------------------------- */ 376 /* audio chip descriptions - defines+functions for tda9840 */ 377 378 #define TDA9840_SW 0x00 379 #define TDA9840_LVADJ 0x02 380 #define TDA9840_STADJ 0x03 381 #define TDA9840_TEST 0x04 382 383 #define TDA9840_MONO 0x10 384 #define TDA9840_STEREO 0x2a 385 #define TDA9840_DUALA 0x12 386 #define TDA9840_DUALB 0x1e 387 #define TDA9840_DUALAB 0x1a 388 #define TDA9840_DUALBA 0x16 389 #define TDA9840_EXTERNAL 0x7a 390 391 #define TDA9840_DS_DUAL 0x20 /* Dual sound identified */ 392 #define TDA9840_ST_STEREO 0x40 /* Stereo sound identified */ 393 #define TDA9840_PONRES 0x80 /* Power-on reset detected if = 1 */ 394 395 #define TDA9840_TEST_INT1SN 0x1 /* Integration time 0.5s when set */ 396 #define TDA9840_TEST_INTFU 0x02 /* Disables integrator function */ 397 398 static int tda9840_getrxsubchans(struct CHIPSTATE *chip) 399 { 400 struct v4l2_subdev *sd = &chip->sd; 401 int val, mode; 402 403 val = chip_read(chip); 404 mode = V4L2_TUNER_SUB_MONO; 405 if (val & TDA9840_DS_DUAL) 406 mode |= V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2; 407 if (val & TDA9840_ST_STEREO) 408 mode = V4L2_TUNER_SUB_STEREO; 409 410 v4l2_dbg(1, debug, sd, 411 "tda9840_getrxsubchans(): raw chip read: %d, return: %d\n", 412 val, mode); 413 return mode; 414 } 415 416 static void tda9840_setaudmode(struct CHIPSTATE *chip, int mode) 417 { 418 int update = 1; 419 int t = chip->shadow.bytes[TDA9840_SW + 1] & ~0x7e; 420 421 switch (mode) { 422 case V4L2_TUNER_MODE_MONO: 423 t |= TDA9840_MONO; 424 break; 425 case V4L2_TUNER_MODE_STEREO: 426 t |= TDA9840_STEREO; 427 break; 428 case V4L2_TUNER_MODE_LANG1: 429 t |= TDA9840_DUALA; 430 break; 431 case V4L2_TUNER_MODE_LANG2: 432 t |= TDA9840_DUALB; 433 break; 434 case V4L2_TUNER_MODE_LANG1_LANG2: 435 t |= TDA9840_DUALAB; 436 break; 437 default: 438 update = 0; 439 } 440 441 if (update) 442 chip_write(chip, TDA9840_SW, t); 443 } 444 445 static int tda9840_checkit(struct CHIPSTATE *chip) 446 { 447 int rc; 448 rc = chip_read(chip); 449 /* lower 5 bits should be 0 */ 450 return ((rc & 0x1f) == 0) ? 1 : 0; 451 } 452 453 /* ---------------------------------------------------------------------- */ 454 /* audio chip descriptions - defines+functions for tda985x */ 455 456 /* subaddresses for TDA9855 */ 457 #define TDA9855_VR 0x00 /* Volume, right */ 458 #define TDA9855_VL 0x01 /* Volume, left */ 459 #define TDA9855_BA 0x02 /* Bass */ 460 #define TDA9855_TR 0x03 /* Treble */ 461 #define TDA9855_SW 0x04 /* Subwoofer - not connected on DTV2000 */ 462 463 /* subaddresses for TDA9850 */ 464 #define TDA9850_C4 0x04 /* Control 1 for TDA9850 */ 465 466 /* subaddesses for both chips */ 467 #define TDA985x_C5 0x05 /* Control 2 for TDA9850, Control 1 for TDA9855 */ 468 #define TDA985x_C6 0x06 /* Control 3 for TDA9850, Control 2 for TDA9855 */ 469 #define TDA985x_C7 0x07 /* Control 4 for TDA9850, Control 3 for TDA9855 */ 470 #define TDA985x_A1 0x08 /* Alignment 1 for both chips */ 471 #define TDA985x_A2 0x09 /* Alignment 2 for both chips */ 472 #define TDA985x_A3 0x0a /* Alignment 3 for both chips */ 473 474 /* Masks for bits in TDA9855 subaddresses */ 475 /* 0x00 - VR in TDA9855 */ 476 /* 0x01 - VL in TDA9855 */ 477 /* lower 7 bits control gain from -71dB (0x28) to 16dB (0x7f) 478 * in 1dB steps - mute is 0x27 */ 479 480 481 /* 0x02 - BA in TDA9855 */ 482 /* lower 5 bits control bass gain from -12dB (0x06) to 16.5dB (0x19) 483 * in .5dB steps - 0 is 0x0E */ 484 485 486 /* 0x03 - TR in TDA9855 */ 487 /* 4 bits << 1 control treble gain from -12dB (0x3) to 12dB (0xb) 488 * in 3dB steps - 0 is 0x7 */ 489 490 /* Masks for bits in both chips' subaddresses */ 491 /* 0x04 - SW in TDA9855, C4/Control 1 in TDA9850 */ 492 /* Unique to TDA9855: */ 493 /* 4 bits << 2 control subwoofer/surround gain from -14db (0x1) to 14db (0xf) 494 * in 3dB steps - mute is 0x0 */ 495 496 /* Unique to TDA9850: */ 497 /* lower 4 bits control stereo noise threshold, over which stereo turns off 498 * set to values of 0x00 through 0x0f for Ster1 through Ster16 */ 499 500 501 /* 0x05 - C5 - Control 1 in TDA9855 , Control 2 in TDA9850*/ 502 /* Unique to TDA9855: */ 503 #define TDA9855_MUTE 1<<7 /* GMU, Mute at outputs */ 504 #define TDA9855_AVL 1<<6 /* AVL, Automatic Volume Level */ 505 #define TDA9855_LOUD 1<<5 /* Loudness, 1==off */ 506 #define TDA9855_SUR 1<<3 /* Surround / Subwoofer 1==.5(L-R) 0==.5(L+R) */ 507 /* Bits 0 to 3 select various combinations 508 * of line in and line out, only the 509 * interesting ones are defined */ 510 #define TDA9855_EXT 1<<2 /* Selects inputs LIR and LIL. Pins 41 & 12 */ 511 #define TDA9855_INT 0 /* Selects inputs LOR and LOL. (internal) */ 512 513 /* Unique to TDA9850: */ 514 /* lower 4 bits contol SAP noise threshold, over which SAP turns off 515 * set to values of 0x00 through 0x0f for SAP1 through SAP16 */ 516 517 518 /* 0x06 - C6 - Control 2 in TDA9855, Control 3 in TDA9850 */ 519 /* Common to TDA9855 and TDA9850: */ 520 #define TDA985x_SAP 3<<6 /* Selects SAP output, mute if not received */ 521 #define TDA985x_MONOSAP 2<<6 /* Selects Mono on left, SAP on right */ 522 #define TDA985x_STEREO 1<<6 /* Selects Stereo ouput, mono if not received */ 523 #define TDA985x_MONO 0 /* Forces Mono output */ 524 #define TDA985x_LMU 1<<3 /* Mute (LOR/LOL for 9855, OUTL/OUTR for 9850) */ 525 526 /* Unique to TDA9855: */ 527 #define TDA9855_TZCM 1<<5 /* If set, don't mute till zero crossing */ 528 #define TDA9855_VZCM 1<<4 /* If set, don't change volume till zero crossing*/ 529 #define TDA9855_LINEAR 0 /* Linear Stereo */ 530 #define TDA9855_PSEUDO 1 /* Pseudo Stereo */ 531 #define TDA9855_SPAT_30 2 /* Spatial Stereo, 30% anti-phase crosstalk */ 532 #define TDA9855_SPAT_50 3 /* Spatial Stereo, 52% anti-phase crosstalk */ 533 #define TDA9855_E_MONO 7 /* Forced mono - mono select elseware, so useless*/ 534 535 /* 0x07 - C7 - Control 3 in TDA9855, Control 4 in TDA9850 */ 536 /* Common to both TDA9855 and TDA9850: */ 537 /* lower 4 bits control input gain from -3.5dB (0x0) to 4dB (0xF) 538 * in .5dB steps - 0dB is 0x7 */ 539 540 /* 0x08, 0x09 - A1 and A2 (read/write) */ 541 /* Common to both TDA9855 and TDA9850: */ 542 /* lower 5 bites are wideband and spectral expander alignment 543 * from 0x00 to 0x1f - nominal at 0x0f and 0x10 (read/write) */ 544 #define TDA985x_STP 1<<5 /* Stereo Pilot/detect (read-only) */ 545 #define TDA985x_SAPP 1<<6 /* SAP Pilot/detect (read-only) */ 546 #define TDA985x_STS 1<<7 /* Stereo trigger 1= <35mV 0= <30mV (write-only)*/ 547 548 /* 0x0a - A3 */ 549 /* Common to both TDA9855 and TDA9850: */ 550 /* lower 3 bits control timing current for alignment: -30% (0x0), -20% (0x1), 551 * -10% (0x2), nominal (0x3), +10% (0x6), +20% (0x5), +30% (0x4) */ 552 #define TDA985x_ADJ 1<<7 /* Stereo adjust on/off (wideband and spectral */ 553 554 static int tda9855_volume(int val) { return val/0x2e8+0x27; } 555 static int tda9855_bass(int val) { return val/0xccc+0x06; } 556 static int tda9855_treble(int val) { return (val/0x1c71+0x3)<<1; } 557 558 static int tda985x_getrxsubchans(struct CHIPSTATE *chip) 559 { 560 int mode, val; 561 562 /* Add mono mode regardless of SAP and stereo */ 563 /* Allows forced mono */ 564 mode = V4L2_TUNER_SUB_MONO; 565 val = chip_read(chip); 566 if (val & TDA985x_STP) 567 mode = V4L2_TUNER_SUB_STEREO; 568 if (val & TDA985x_SAPP) 569 mode |= V4L2_TUNER_SUB_SAP; 570 return mode; 571 } 572 573 static void tda985x_setaudmode(struct CHIPSTATE *chip, int mode) 574 { 575 int update = 1; 576 int c6 = chip->shadow.bytes[TDA985x_C6+1] & 0x3f; 577 578 switch (mode) { 579 case V4L2_TUNER_MODE_MONO: 580 c6 |= TDA985x_MONO; 581 break; 582 case V4L2_TUNER_MODE_STEREO: 583 case V4L2_TUNER_MODE_LANG1: 584 c6 |= TDA985x_STEREO; 585 break; 586 case V4L2_TUNER_MODE_SAP: 587 c6 |= TDA985x_SAP; 588 break; 589 case V4L2_TUNER_MODE_LANG1_LANG2: 590 c6 |= TDA985x_MONOSAP; 591 break; 592 default: 593 update = 0; 594 } 595 if (update) 596 chip_write(chip,TDA985x_C6,c6); 597 } 598 599 600 /* ---------------------------------------------------------------------- */ 601 /* audio chip descriptions - defines+functions for tda9873h */ 602 603 /* Subaddresses for TDA9873H */ 604 605 #define TDA9873_SW 0x00 /* Switching */ 606 #define TDA9873_AD 0x01 /* Adjust */ 607 #define TDA9873_PT 0x02 /* Port */ 608 609 /* Subaddress 0x00: Switching Data 610 * B7..B0: 611 * 612 * B1, B0: Input source selection 613 * 0, 0 internal 614 * 1, 0 external stereo 615 * 0, 1 external mono 616 */ 617 #define TDA9873_INP_MASK 3 618 #define TDA9873_INTERNAL 0 619 #define TDA9873_EXT_STEREO 2 620 #define TDA9873_EXT_MONO 1 621 622 /* B3, B2: output signal select 623 * B4 : transmission mode 624 * 0, 0, 1 Mono 625 * 1, 0, 0 Stereo 626 * 1, 1, 1 Stereo (reversed channel) 627 * 0, 0, 0 Dual AB 628 * 0, 0, 1 Dual AA 629 * 0, 1, 0 Dual BB 630 * 0, 1, 1 Dual BA 631 */ 632 633 #define TDA9873_TR_MASK (7 << 2) 634 #define TDA9873_TR_MONO 4 635 #define TDA9873_TR_STEREO 1 << 4 636 #define TDA9873_TR_REVERSE ((1 << 3) | (1 << 2)) 637 #define TDA9873_TR_DUALA 1 << 2 638 #define TDA9873_TR_DUALB 1 << 3 639 #define TDA9873_TR_DUALAB 0 640 641 /* output level controls 642 * B5: output level switch (0 = reduced gain, 1 = normal gain) 643 * B6: mute (1 = muted) 644 * B7: auto-mute (1 = auto-mute enabled) 645 */ 646 647 #define TDA9873_GAIN_NORMAL 1 << 5 648 #define TDA9873_MUTE 1 << 6 649 #define TDA9873_AUTOMUTE 1 << 7 650 651 /* Subaddress 0x01: Adjust/standard */ 652 653 /* Lower 4 bits (C3..C0) control stereo adjustment on R channel (-0.6 - +0.7 dB) 654 * Recommended value is +0 dB 655 */ 656 657 #define TDA9873_STEREO_ADJ 0x06 /* 0dB gain */ 658 659 /* Bits C6..C4 control FM stantard 660 * C6, C5, C4 661 * 0, 0, 0 B/G (PAL FM) 662 * 0, 0, 1 M 663 * 0, 1, 0 D/K(1) 664 * 0, 1, 1 D/K(2) 665 * 1, 0, 0 D/K(3) 666 * 1, 0, 1 I 667 */ 668 #define TDA9873_BG 0 669 #define TDA9873_M 1 670 #define TDA9873_DK1 2 671 #define TDA9873_DK2 3 672 #define TDA9873_DK3 4 673 #define TDA9873_I 5 674 675 /* C7 controls identification response time (1=fast/0=normal) 676 */ 677 #define TDA9873_IDR_NORM 0 678 #define TDA9873_IDR_FAST 1 << 7 679 680 681 /* Subaddress 0x02: Port data */ 682 683 /* E1, E0 free programmable ports P1/P2 684 0, 0 both ports low 685 0, 1 P1 high 686 1, 0 P2 high 687 1, 1 both ports high 688 */ 689 690 #define TDA9873_PORTS 3 691 692 /* E2: test port */ 693 #define TDA9873_TST_PORT 1 << 2 694 695 /* E5..E3 control mono output channel (together with transmission mode bit B4) 696 * 697 * E5 E4 E3 B4 OUTM 698 * 0 0 0 0 mono 699 * 0 0 1 0 DUAL B 700 * 0 1 0 1 mono (from stereo decoder) 701 */ 702 #define TDA9873_MOUT_MONO 0 703 #define TDA9873_MOUT_FMONO 0 704 #define TDA9873_MOUT_DUALA 0 705 #define TDA9873_MOUT_DUALB 1 << 3 706 #define TDA9873_MOUT_ST 1 << 4 707 #define TDA9873_MOUT_EXTM ((1 << 4) | (1 << 3)) 708 #define TDA9873_MOUT_EXTL 1 << 5 709 #define TDA9873_MOUT_EXTR ((1 << 5) | (1 << 3)) 710 #define TDA9873_MOUT_EXTLR ((1 << 5) | (1 << 4)) 711 #define TDA9873_MOUT_MUTE ((1 << 5) | (1 << 4) | (1 << 3)) 712 713 /* Status bits: (chip read) */ 714 #define TDA9873_PONR 0 /* Power-on reset detected if = 1 */ 715 #define TDA9873_STEREO 2 /* Stereo sound is identified */ 716 #define TDA9873_DUAL 4 /* Dual sound is identified */ 717 718 static int tda9873_getrxsubchans(struct CHIPSTATE *chip) 719 { 720 struct v4l2_subdev *sd = &chip->sd; 721 int val,mode; 722 723 val = chip_read(chip); 724 mode = V4L2_TUNER_SUB_MONO; 725 if (val & TDA9873_STEREO) 726 mode = V4L2_TUNER_SUB_STEREO; 727 if (val & TDA9873_DUAL) 728 mode |= V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2; 729 v4l2_dbg(1, debug, sd, 730 "tda9873_getrxsubchans(): raw chip read: %d, return: %d\n", 731 val, mode); 732 return mode; 733 } 734 735 static void tda9873_setaudmode(struct CHIPSTATE *chip, int mode) 736 { 737 struct v4l2_subdev *sd = &chip->sd; 738 int sw_data = chip->shadow.bytes[TDA9873_SW+1] & ~ TDA9873_TR_MASK; 739 /* int adj_data = chip->shadow.bytes[TDA9873_AD+1] ; */ 740 741 if ((sw_data & TDA9873_INP_MASK) != TDA9873_INTERNAL) { 742 v4l2_dbg(1, debug, sd, 743 "tda9873_setaudmode(): external input\n"); 744 return; 745 } 746 747 v4l2_dbg(1, debug, sd, 748 "tda9873_setaudmode(): chip->shadow.bytes[%d] = %d\n", 749 TDA9873_SW+1, chip->shadow.bytes[TDA9873_SW+1]); 750 v4l2_dbg(1, debug, sd, "tda9873_setaudmode(): sw_data = %d\n", 751 sw_data); 752 753 switch (mode) { 754 case V4L2_TUNER_MODE_MONO: 755 sw_data |= TDA9873_TR_MONO; 756 break; 757 case V4L2_TUNER_MODE_STEREO: 758 sw_data |= TDA9873_TR_STEREO; 759 break; 760 case V4L2_TUNER_MODE_LANG1: 761 sw_data |= TDA9873_TR_DUALA; 762 break; 763 case V4L2_TUNER_MODE_LANG2: 764 sw_data |= TDA9873_TR_DUALB; 765 break; 766 case V4L2_TUNER_MODE_LANG1_LANG2: 767 sw_data |= TDA9873_TR_DUALAB; 768 break; 769 default: 770 return; 771 } 772 773 chip_write(chip, TDA9873_SW, sw_data); 774 v4l2_dbg(1, debug, sd, 775 "tda9873_setaudmode(): req. mode %d; chip_write: %d\n", 776 mode, sw_data); 777 } 778 779 static int tda9873_checkit(struct CHIPSTATE *chip) 780 { 781 int rc; 782 783 if (-1 == (rc = chip_read2(chip,254))) 784 return 0; 785 return (rc & ~0x1f) == 0x80; 786 } 787 788 789 /* ---------------------------------------------------------------------- */ 790 /* audio chip description - defines+functions for tda9874h and tda9874a */ 791 /* Dariusz Kowalewski <darekk@automex.pl> */ 792 793 /* Subaddresses for TDA9874H and TDA9874A (slave rx) */ 794 #define TDA9874A_AGCGR 0x00 /* AGC gain */ 795 #define TDA9874A_GCONR 0x01 /* general config */ 796 #define TDA9874A_MSR 0x02 /* monitor select */ 797 #define TDA9874A_C1FRA 0x03 /* carrier 1 freq. */ 798 #define TDA9874A_C1FRB 0x04 /* carrier 1 freq. */ 799 #define TDA9874A_C1FRC 0x05 /* carrier 1 freq. */ 800 #define TDA9874A_C2FRA 0x06 /* carrier 2 freq. */ 801 #define TDA9874A_C2FRB 0x07 /* carrier 2 freq. */ 802 #define TDA9874A_C2FRC 0x08 /* carrier 2 freq. */ 803 #define TDA9874A_DCR 0x09 /* demodulator config */ 804 #define TDA9874A_FMER 0x0a /* FM de-emphasis */ 805 #define TDA9874A_FMMR 0x0b /* FM dematrix */ 806 #define TDA9874A_C1OLAR 0x0c /* ch.1 output level adj. */ 807 #define TDA9874A_C2OLAR 0x0d /* ch.2 output level adj. */ 808 #define TDA9874A_NCONR 0x0e /* NICAM config */ 809 #define TDA9874A_NOLAR 0x0f /* NICAM output level adj. */ 810 #define TDA9874A_NLELR 0x10 /* NICAM lower error limit */ 811 #define TDA9874A_NUELR 0x11 /* NICAM upper error limit */ 812 #define TDA9874A_AMCONR 0x12 /* audio mute control */ 813 #define TDA9874A_SDACOSR 0x13 /* stereo DAC output select */ 814 #define TDA9874A_AOSR 0x14 /* analog output select */ 815 #define TDA9874A_DAICONR 0x15 /* digital audio interface config */ 816 #define TDA9874A_I2SOSR 0x16 /* I2S-bus output select */ 817 #define TDA9874A_I2SOLAR 0x17 /* I2S-bus output level adj. */ 818 #define TDA9874A_MDACOSR 0x18 /* mono DAC output select (tda9874a) */ 819 #define TDA9874A_ESP 0xFF /* easy standard progr. (tda9874a) */ 820 821 /* Subaddresses for TDA9874H and TDA9874A (slave tx) */ 822 #define TDA9874A_DSR 0x00 /* device status */ 823 #define TDA9874A_NSR 0x01 /* NICAM status */ 824 #define TDA9874A_NECR 0x02 /* NICAM error count */ 825 #define TDA9874A_DR1 0x03 /* add. data LSB */ 826 #define TDA9874A_DR2 0x04 /* add. data MSB */ 827 #define TDA9874A_LLRA 0x05 /* monitor level read-out LSB */ 828 #define TDA9874A_LLRB 0x06 /* monitor level read-out MSB */ 829 #define TDA9874A_SIFLR 0x07 /* SIF level */ 830 #define TDA9874A_TR2 252 /* test reg. 2 */ 831 #define TDA9874A_TR1 253 /* test reg. 1 */ 832 #define TDA9874A_DIC 254 /* device id. code */ 833 #define TDA9874A_SIC 255 /* software id. code */ 834 835 836 static int tda9874a_mode = 1; /* 0: A2, 1: NICAM */ 837 static int tda9874a_GCONR = 0xc0; /* default config. input pin: SIFSEL=0 */ 838 static int tda9874a_NCONR = 0x01; /* default NICAM config.: AMSEL=0,AMUTE=1 */ 839 static int tda9874a_ESP = 0x07; /* default standard: NICAM D/K */ 840 static int tda9874a_dic = -1; /* device id. code */ 841 842 /* insmod options for tda9874a */ 843 static unsigned int tda9874a_SIF = UNSET; 844 static unsigned int tda9874a_AMSEL = UNSET; 845 static unsigned int tda9874a_STD = UNSET; 846 module_param(tda9874a_SIF, int, 0444); 847 module_param(tda9874a_AMSEL, int, 0444); 848 module_param(tda9874a_STD, int, 0444); 849 850 /* 851 * initialization table for tda9874 decoder: 852 * - carrier 1 freq. registers (3 bytes) 853 * - carrier 2 freq. registers (3 bytes) 854 * - demudulator config register 855 * - FM de-emphasis register (slow identification mode) 856 * Note: frequency registers must be written in single i2c transfer. 857 */ 858 static struct tda9874a_MODES { 859 char *name; 860 audiocmd cmd; 861 } tda9874a_modelist[9] = { 862 { "A2, B/G", /* default */ 863 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x77,0xA0,0x00, 0x00,0x00 }} }, 864 { "A2, M (Korea)", 865 { 9, { TDA9874A_C1FRA, 0x5D,0xC0,0x00, 0x62,0x6A,0xAA, 0x20,0x22 }} }, 866 { "A2, D/K (1)", 867 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x82,0x60,0x00, 0x00,0x00 }} }, 868 { "A2, D/K (2)", 869 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x8C,0x75,0x55, 0x00,0x00 }} }, 870 { "A2, D/K (3)", 871 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x77,0xA0,0x00, 0x00,0x00 }} }, 872 { "NICAM, I", 873 { 9, { TDA9874A_C1FRA, 0x7D,0x00,0x00, 0x88,0x8A,0xAA, 0x08,0x33 }} }, 874 { "NICAM, B/G", 875 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x79,0xEA,0xAA, 0x08,0x33 }} }, 876 { "NICAM, D/K", 877 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x08,0x33 }} }, 878 { "NICAM, L", 879 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x09,0x33 }} } 880 }; 881 882 static int tda9874a_setup(struct CHIPSTATE *chip) 883 { 884 struct v4l2_subdev *sd = &chip->sd; 885 886 chip_write(chip, TDA9874A_AGCGR, 0x00); /* 0 dB */ 887 chip_write(chip, TDA9874A_GCONR, tda9874a_GCONR); 888 chip_write(chip, TDA9874A_MSR, (tda9874a_mode) ? 0x03:0x02); 889 if(tda9874a_dic == 0x11) { 890 chip_write(chip, TDA9874A_FMMR, 0x80); 891 } else { /* dic == 0x07 */ 892 chip_cmd(chip,"tda9874_modelist",&tda9874a_modelist[tda9874a_STD].cmd); 893 chip_write(chip, TDA9874A_FMMR, 0x00); 894 } 895 chip_write(chip, TDA9874A_C1OLAR, 0x00); /* 0 dB */ 896 chip_write(chip, TDA9874A_C2OLAR, 0x00); /* 0 dB */ 897 chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR); 898 chip_write(chip, TDA9874A_NOLAR, 0x00); /* 0 dB */ 899 /* Note: If signal quality is poor you may want to change NICAM */ 900 /* error limit registers (NLELR and NUELR) to some greater values. */ 901 /* Then the sound would remain stereo, but won't be so clear. */ 902 chip_write(chip, TDA9874A_NLELR, 0x14); /* default */ 903 chip_write(chip, TDA9874A_NUELR, 0x50); /* default */ 904 905 if(tda9874a_dic == 0x11) { 906 chip_write(chip, TDA9874A_AMCONR, 0xf9); 907 chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80); 908 chip_write(chip, TDA9874A_AOSR, 0x80); 909 chip_write(chip, TDA9874A_MDACOSR, (tda9874a_mode) ? 0x82:0x80); 910 chip_write(chip, TDA9874A_ESP, tda9874a_ESP); 911 } else { /* dic == 0x07 */ 912 chip_write(chip, TDA9874A_AMCONR, 0xfb); 913 chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80); 914 chip_write(chip, TDA9874A_AOSR, 0x00); /* or 0x10 */ 915 } 916 v4l2_dbg(1, debug, sd, "tda9874a_setup(): %s [0x%02X].\n", 917 tda9874a_modelist[tda9874a_STD].name,tda9874a_STD); 918 return 1; 919 } 920 921 static int tda9874a_getrxsubchans(struct CHIPSTATE *chip) 922 { 923 struct v4l2_subdev *sd = &chip->sd; 924 int dsr,nsr,mode; 925 int necr; /* just for debugging */ 926 927 mode = V4L2_TUNER_SUB_MONO; 928 929 if(-1 == (dsr = chip_read2(chip,TDA9874A_DSR))) 930 return mode; 931 if(-1 == (nsr = chip_read2(chip,TDA9874A_NSR))) 932 return mode; 933 if(-1 == (necr = chip_read2(chip,TDA9874A_NECR))) 934 return mode; 935 936 /* need to store dsr/nsr somewhere */ 937 chip->shadow.bytes[MAXREGS-2] = dsr; 938 chip->shadow.bytes[MAXREGS-1] = nsr; 939 940 if(tda9874a_mode) { 941 /* Note: DSR.RSSF and DSR.AMSTAT bits are also checked. 942 * If NICAM auto-muting is enabled, DSR.AMSTAT=1 indicates 943 * that sound has (temporarily) switched from NICAM to 944 * mono FM (or AM) on 1st sound carrier due to high NICAM bit 945 * error count. So in fact there is no stereo in this case :-( 946 * But changing the mode to V4L2_TUNER_MODE_MONO would switch 947 * external 4052 multiplexer in audio_hook(). 948 */ 949 if(nsr & 0x02) /* NSR.S/MB=1 */ 950 mode = V4L2_TUNER_SUB_STEREO; 951 if(nsr & 0x01) /* NSR.D/SB=1 */ 952 mode |= V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2; 953 } else { 954 if(dsr & 0x02) /* DSR.IDSTE=1 */ 955 mode = V4L2_TUNER_SUB_STEREO; 956 if(dsr & 0x04) /* DSR.IDDUA=1 */ 957 mode |= V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2; 958 } 959 960 v4l2_dbg(1, debug, sd, 961 "tda9874a_getrxsubchans(): DSR=0x%X, NSR=0x%X, NECR=0x%X, return: %d.\n", 962 dsr, nsr, necr, mode); 963 return mode; 964 } 965 966 static void tda9874a_setaudmode(struct CHIPSTATE *chip, int mode) 967 { 968 struct v4l2_subdev *sd = &chip->sd; 969 970 /* Disable/enable NICAM auto-muting (based on DSR.RSSF status bit). */ 971 /* If auto-muting is disabled, we can hear a signal of degrading quality. */ 972 if (tda9874a_mode) { 973 if(chip->shadow.bytes[MAXREGS-2] & 0x20) /* DSR.RSSF=1 */ 974 tda9874a_NCONR &= 0xfe; /* enable */ 975 else 976 tda9874a_NCONR |= 0x01; /* disable */ 977 chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR); 978 } 979 980 /* Note: TDA9874A supports automatic FM dematrixing (FMMR register) 981 * and has auto-select function for audio output (AOSR register). 982 * Old TDA9874H doesn't support these features. 983 * TDA9874A also has additional mono output pin (OUTM), which 984 * on same (all?) tv-cards is not used, anyway (as well as MONOIN). 985 */ 986 if(tda9874a_dic == 0x11) { 987 int aosr = 0x80; 988 int mdacosr = (tda9874a_mode) ? 0x82:0x80; 989 990 switch(mode) { 991 case V4L2_TUNER_MODE_MONO: 992 case V4L2_TUNER_MODE_STEREO: 993 break; 994 case V4L2_TUNER_MODE_LANG1: 995 aosr = 0x80; /* auto-select, dual A/A */ 996 mdacosr = (tda9874a_mode) ? 0x82:0x80; 997 break; 998 case V4L2_TUNER_MODE_LANG2: 999 aosr = 0xa0; /* auto-select, dual B/B */ 1000 mdacosr = (tda9874a_mode) ? 0x83:0x81; 1001 break; 1002 case V4L2_TUNER_MODE_LANG1_LANG2: 1003 aosr = 0x00; /* always route L to L and R to R */ 1004 mdacosr = (tda9874a_mode) ? 0x82:0x80; 1005 break; 1006 default: 1007 return; 1008 } 1009 chip_write(chip, TDA9874A_AOSR, aosr); 1010 chip_write(chip, TDA9874A_MDACOSR, mdacosr); 1011 1012 v4l2_dbg(1, debug, sd, 1013 "tda9874a_setaudmode(): req. mode %d; AOSR=0x%X, MDACOSR=0x%X.\n", 1014 mode, aosr, mdacosr); 1015 1016 } else { /* dic == 0x07 */ 1017 int fmmr,aosr; 1018 1019 switch(mode) { 1020 case V4L2_TUNER_MODE_MONO: 1021 fmmr = 0x00; /* mono */ 1022 aosr = 0x10; /* A/A */ 1023 break; 1024 case V4L2_TUNER_MODE_STEREO: 1025 if(tda9874a_mode) { 1026 fmmr = 0x00; 1027 aosr = 0x00; /* handled by NICAM auto-mute */ 1028 } else { 1029 fmmr = (tda9874a_ESP == 1) ? 0x05 : 0x04; /* stereo */ 1030 aosr = 0x00; 1031 } 1032 break; 1033 case V4L2_TUNER_MODE_LANG1: 1034 fmmr = 0x02; /* dual */ 1035 aosr = 0x10; /* dual A/A */ 1036 break; 1037 case V4L2_TUNER_MODE_LANG2: 1038 fmmr = 0x02; /* dual */ 1039 aosr = 0x20; /* dual B/B */ 1040 break; 1041 case V4L2_TUNER_MODE_LANG1_LANG2: 1042 fmmr = 0x02; /* dual */ 1043 aosr = 0x00; /* dual A/B */ 1044 break; 1045 default: 1046 return; 1047 } 1048 chip_write(chip, TDA9874A_FMMR, fmmr); 1049 chip_write(chip, TDA9874A_AOSR, aosr); 1050 1051 v4l2_dbg(1, debug, sd, 1052 "tda9874a_setaudmode(): req. mode %d; FMMR=0x%X, AOSR=0x%X.\n", 1053 mode, fmmr, aosr); 1054 } 1055 } 1056 1057 static int tda9874a_checkit(struct CHIPSTATE *chip) 1058 { 1059 struct v4l2_subdev *sd = &chip->sd; 1060 int dic,sic; /* device id. and software id. codes */ 1061 1062 if(-1 == (dic = chip_read2(chip,TDA9874A_DIC))) 1063 return 0; 1064 if(-1 == (sic = chip_read2(chip,TDA9874A_SIC))) 1065 return 0; 1066 1067 v4l2_dbg(1, debug, sd, "tda9874a_checkit(): DIC=0x%X, SIC=0x%X.\n", dic, sic); 1068 1069 if((dic == 0x11)||(dic == 0x07)) { 1070 v4l2_info(sd, "found tda9874%s.\n", (dic == 0x11) ? "a" : "h"); 1071 tda9874a_dic = dic; /* remember device id. */ 1072 return 1; 1073 } 1074 return 0; /* not found */ 1075 } 1076 1077 static int tda9874a_initialize(struct CHIPSTATE *chip) 1078 { 1079 if (tda9874a_SIF > 2) 1080 tda9874a_SIF = 1; 1081 if (tda9874a_STD >= ARRAY_SIZE(tda9874a_modelist)) 1082 tda9874a_STD = 0; 1083 if(tda9874a_AMSEL > 1) 1084 tda9874a_AMSEL = 0; 1085 1086 if(tda9874a_SIF == 1) 1087 tda9874a_GCONR = 0xc0; /* sound IF input 1 */ 1088 else 1089 tda9874a_GCONR = 0xc1; /* sound IF input 2 */ 1090 1091 tda9874a_ESP = tda9874a_STD; 1092 tda9874a_mode = (tda9874a_STD < 5) ? 0 : 1; 1093 1094 if(tda9874a_AMSEL == 0) 1095 tda9874a_NCONR = 0x01; /* auto-mute: analog mono input */ 1096 else 1097 tda9874a_NCONR = 0x05; /* auto-mute: 1st carrier FM or AM */ 1098 1099 tda9874a_setup(chip); 1100 return 0; 1101 } 1102 1103 /* ---------------------------------------------------------------------- */ 1104 /* audio chip description - defines+functions for tda9875 */ 1105 /* The TDA9875 is made by Philips Semiconductor 1106 * http://www.semiconductors.philips.com 1107 * TDA9875: I2C-bus controlled DSP audio processor, FM demodulator 1108 * 1109 */ 1110 1111 /* subaddresses for TDA9875 */ 1112 #define TDA9875_MUT 0x12 /*General mute (value --> 0b11001100*/ 1113 #define TDA9875_CFG 0x01 /* Config register (value --> 0b00000000 */ 1114 #define TDA9875_DACOS 0x13 /*DAC i/o select (ADC) 0b0000100*/ 1115 #define TDA9875_LOSR 0x16 /*Line output select regirter 0b0100 0001*/ 1116 1117 #define TDA9875_CH1V 0x0c /*Channel 1 volume (mute)*/ 1118 #define TDA9875_CH2V 0x0d /*Channel 2 volume (mute)*/ 1119 #define TDA9875_SC1 0x14 /*SCART 1 in (mono)*/ 1120 #define TDA9875_SC2 0x15 /*SCART 2 in (mono)*/ 1121 1122 #define TDA9875_ADCIS 0x17 /*ADC input select (mono) 0b0110 000*/ 1123 #define TDA9875_AER 0x19 /*Audio effect (AVL+Pseudo) 0b0000 0110*/ 1124 #define TDA9875_MCS 0x18 /*Main channel select (DAC) 0b0000100*/ 1125 #define TDA9875_MVL 0x1a /* Main volume gauche */ 1126 #define TDA9875_MVR 0x1b /* Main volume droite */ 1127 #define TDA9875_MBA 0x1d /* Main Basse */ 1128 #define TDA9875_MTR 0x1e /* Main treble */ 1129 #define TDA9875_ACS 0x1f /* Auxiliary channel select (FM) 0b0000000*/ 1130 #define TDA9875_AVL 0x20 /* Auxiliary volume gauche */ 1131 #define TDA9875_AVR 0x21 /* Auxiliary volume droite */ 1132 #define TDA9875_ABA 0x22 /* Auxiliary Basse */ 1133 #define TDA9875_ATR 0x23 /* Auxiliary treble */ 1134 1135 #define TDA9875_MSR 0x02 /* Monitor select register */ 1136 #define TDA9875_C1MSB 0x03 /* Carrier 1 (FM) frequency register MSB */ 1137 #define TDA9875_C1MIB 0x04 /* Carrier 1 (FM) frequency register (16-8]b */ 1138 #define TDA9875_C1LSB 0x05 /* Carrier 1 (FM) frequency register LSB */ 1139 #define TDA9875_C2MSB 0x06 /* Carrier 2 (nicam) frequency register MSB */ 1140 #define TDA9875_C2MIB 0x07 /* Carrier 2 (nicam) frequency register (16-8]b */ 1141 #define TDA9875_C2LSB 0x08 /* Carrier 2 (nicam) frequency register LSB */ 1142 #define TDA9875_DCR 0x09 /* Demodulateur configuration regirter*/ 1143 #define TDA9875_DEEM 0x0a /* FM de-emphasis regirter*/ 1144 #define TDA9875_FMAT 0x0b /* FM Matrix regirter*/ 1145 1146 /* values */ 1147 #define TDA9875_MUTE_ON 0xff /* general mute */ 1148 #define TDA9875_MUTE_OFF 0xcc /* general no mute */ 1149 1150 static int tda9875_initialize(struct CHIPSTATE *chip) 1151 { 1152 chip_write(chip, TDA9875_CFG, 0xd0); /*reg de config 0 (reset)*/ 1153 chip_write(chip, TDA9875_MSR, 0x03); /* Monitor 0b00000XXX*/ 1154 chip_write(chip, TDA9875_C1MSB, 0x00); /*Car1(FM) MSB XMHz*/ 1155 chip_write(chip, TDA9875_C1MIB, 0x00); /*Car1(FM) MIB XMHz*/ 1156 chip_write(chip, TDA9875_C1LSB, 0x00); /*Car1(FM) LSB XMHz*/ 1157 chip_write(chip, TDA9875_C2MSB, 0x00); /*Car2(NICAM) MSB XMHz*/ 1158 chip_write(chip, TDA9875_C2MIB, 0x00); /*Car2(NICAM) MIB XMHz*/ 1159 chip_write(chip, TDA9875_C2LSB, 0x00); /*Car2(NICAM) LSB XMHz*/ 1160 chip_write(chip, TDA9875_DCR, 0x00); /*Demod config 0x00*/ 1161 chip_write(chip, TDA9875_DEEM, 0x44); /*DE-Emph 0b0100 0100*/ 1162 chip_write(chip, TDA9875_FMAT, 0x00); /*FM Matrix reg 0x00*/ 1163 chip_write(chip, TDA9875_SC1, 0x00); /* SCART 1 (SC1)*/ 1164 chip_write(chip, TDA9875_SC2, 0x01); /* SCART 2 (sc2)*/ 1165 1166 chip_write(chip, TDA9875_CH1V, 0x10); /* Channel volume 1 mute*/ 1167 chip_write(chip, TDA9875_CH2V, 0x10); /* Channel volume 2 mute */ 1168 chip_write(chip, TDA9875_DACOS, 0x02); /* sig DAC i/o(in:nicam)*/ 1169 chip_write(chip, TDA9875_ADCIS, 0x6f); /* sig ADC input(in:mono)*/ 1170 chip_write(chip, TDA9875_LOSR, 0x00); /* line out (in:mono)*/ 1171 chip_write(chip, TDA9875_AER, 0x00); /*06 Effect (AVL+PSEUDO) */ 1172 chip_write(chip, TDA9875_MCS, 0x44); /* Main ch select (DAC) */ 1173 chip_write(chip, TDA9875_MVL, 0x03); /* Vol Main left 10dB */ 1174 chip_write(chip, TDA9875_MVR, 0x03); /* Vol Main right 10dB*/ 1175 chip_write(chip, TDA9875_MBA, 0x00); /* Main Bass Main 0dB*/ 1176 chip_write(chip, TDA9875_MTR, 0x00); /* Main Treble Main 0dB*/ 1177 chip_write(chip, TDA9875_ACS, 0x44); /* Aux chan select (dac)*/ 1178 chip_write(chip, TDA9875_AVL, 0x00); /* Vol Aux left 0dB*/ 1179 chip_write(chip, TDA9875_AVR, 0x00); /* Vol Aux right 0dB*/ 1180 chip_write(chip, TDA9875_ABA, 0x00); /* Aux Bass Main 0dB*/ 1181 chip_write(chip, TDA9875_ATR, 0x00); /* Aux Aigus Main 0dB*/ 1182 1183 chip_write(chip, TDA9875_MUT, 0xcc); /* General mute */ 1184 return 0; 1185 } 1186 1187 static int tda9875_volume(int val) { return (unsigned char)(val / 602 - 84); } 1188 static int tda9875_bass(int val) { return (unsigned char)(max(-12, val / 2115 - 15)); } 1189 static int tda9875_treble(int val) { return (unsigned char)(val / 2622 - 12); } 1190 1191 /* ----------------------------------------------------------------------- */ 1192 1193 1194 /* *********************** * 1195 * i2c interface functions * 1196 * *********************** */ 1197 1198 static int tda9875_checkit(struct CHIPSTATE *chip) 1199 { 1200 struct v4l2_subdev *sd = &chip->sd; 1201 int dic, rev; 1202 1203 dic = chip_read2(chip, 254); 1204 rev = chip_read2(chip, 255); 1205 1206 if (dic == 0 || dic == 2) { /* tda9875 and tda9875A */ 1207 v4l2_info(sd, "found tda9875%s rev. %d.\n", 1208 dic == 0 ? "" : "A", rev); 1209 return 1; 1210 } 1211 return 0; 1212 } 1213 1214 /* ---------------------------------------------------------------------- */ 1215 /* audio chip descriptions - defines+functions for tea6420 */ 1216 1217 #define TEA6300_VL 0x00 /* volume left */ 1218 #define TEA6300_VR 0x01 /* volume right */ 1219 #define TEA6300_BA 0x02 /* bass */ 1220 #define TEA6300_TR 0x03 /* treble */ 1221 #define TEA6300_FA 0x04 /* fader control */ 1222 #define TEA6300_S 0x05 /* switch register */ 1223 /* values for those registers: */ 1224 #define TEA6300_S_SA 0x01 /* stereo A input */ 1225 #define TEA6300_S_SB 0x02 /* stereo B */ 1226 #define TEA6300_S_SC 0x04 /* stereo C */ 1227 #define TEA6300_S_GMU 0x80 /* general mute */ 1228 1229 #define TEA6320_V 0x00 /* volume (0-5)/loudness off (6)/zero crossing mute(7) */ 1230 #define TEA6320_FFR 0x01 /* fader front right (0-5) */ 1231 #define TEA6320_FFL 0x02 /* fader front left (0-5) */ 1232 #define TEA6320_FRR 0x03 /* fader rear right (0-5) */ 1233 #define TEA6320_FRL 0x04 /* fader rear left (0-5) */ 1234 #define TEA6320_BA 0x05 /* bass (0-4) */ 1235 #define TEA6320_TR 0x06 /* treble (0-4) */ 1236 #define TEA6320_S 0x07 /* switch register */ 1237 /* values for those registers: */ 1238 #define TEA6320_S_SA 0x07 /* stereo A input */ 1239 #define TEA6320_S_SB 0x06 /* stereo B */ 1240 #define TEA6320_S_SC 0x05 /* stereo C */ 1241 #define TEA6320_S_SD 0x04 /* stereo D */ 1242 #define TEA6320_S_GMU 0x80 /* general mute */ 1243 1244 #define TEA6420_S_SA 0x00 /* stereo A input */ 1245 #define TEA6420_S_SB 0x01 /* stereo B */ 1246 #define TEA6420_S_SC 0x02 /* stereo C */ 1247 #define TEA6420_S_SD 0x03 /* stereo D */ 1248 #define TEA6420_S_SE 0x04 /* stereo E */ 1249 #define TEA6420_S_GMU 0x05 /* general mute */ 1250 1251 static int tea6300_shift10(int val) { return val >> 10; } 1252 static int tea6300_shift12(int val) { return val >> 12; } 1253 1254 /* Assumes 16bit input (values 0x3f to 0x0c are unique, values less than */ 1255 /* 0x0c mirror those immediately higher) */ 1256 static int tea6320_volume(int val) { return (val / (65535/(63-12)) + 12) & 0x3f; } 1257 static int tea6320_shift11(int val) { return val >> 11; } 1258 static int tea6320_initialize(struct CHIPSTATE * chip) 1259 { 1260 chip_write(chip, TEA6320_FFR, 0x3f); 1261 chip_write(chip, TEA6320_FFL, 0x3f); 1262 chip_write(chip, TEA6320_FRR, 0x3f); 1263 chip_write(chip, TEA6320_FRL, 0x3f); 1264 1265 return 0; 1266 } 1267 1268 1269 /* ---------------------------------------------------------------------- */ 1270 /* audio chip descriptions - defines+functions for tda8425 */ 1271 1272 #define TDA8425_VL 0x00 /* volume left */ 1273 #define TDA8425_VR 0x01 /* volume right */ 1274 #define TDA8425_BA 0x02 /* bass */ 1275 #define TDA8425_TR 0x03 /* treble */ 1276 #define TDA8425_S1 0x08 /* switch functions */ 1277 /* values for those registers: */ 1278 #define TDA8425_S1_OFF 0xEE /* audio off (mute on) */ 1279 #define TDA8425_S1_CH1 0xCE /* audio channel 1 (mute off) - "linear stereo" mode */ 1280 #define TDA8425_S1_CH2 0xCF /* audio channel 2 (mute off) - "linear stereo" mode */ 1281 #define TDA8425_S1_MU 0x20 /* mute bit */ 1282 #define TDA8425_S1_STEREO 0x18 /* stereo bits */ 1283 #define TDA8425_S1_STEREO_SPATIAL 0x18 /* spatial stereo */ 1284 #define TDA8425_S1_STEREO_LINEAR 0x08 /* linear stereo */ 1285 #define TDA8425_S1_STEREO_PSEUDO 0x10 /* pseudo stereo */ 1286 #define TDA8425_S1_STEREO_MONO 0x00 /* forced mono */ 1287 #define TDA8425_S1_ML 0x06 /* language selector */ 1288 #define TDA8425_S1_ML_SOUND_A 0x02 /* sound a */ 1289 #define TDA8425_S1_ML_SOUND_B 0x04 /* sound b */ 1290 #define TDA8425_S1_ML_STEREO 0x06 /* stereo */ 1291 #define TDA8425_S1_IS 0x01 /* channel selector */ 1292 1293 1294 static int tda8425_shift10(int val) { return (val >> 10) | 0xc0; } 1295 static int tda8425_shift12(int val) { return (val >> 12) | 0xf0; } 1296 1297 static void tda8425_setaudmode(struct CHIPSTATE *chip, int mode) 1298 { 1299 int s1 = chip->shadow.bytes[TDA8425_S1+1] & 0xe1; 1300 1301 switch (mode) { 1302 case V4L2_TUNER_MODE_LANG1: 1303 s1 |= TDA8425_S1_ML_SOUND_A; 1304 s1 |= TDA8425_S1_STEREO_PSEUDO; 1305 break; 1306 case V4L2_TUNER_MODE_LANG2: 1307 s1 |= TDA8425_S1_ML_SOUND_B; 1308 s1 |= TDA8425_S1_STEREO_PSEUDO; 1309 break; 1310 case V4L2_TUNER_MODE_LANG1_LANG2: 1311 s1 |= TDA8425_S1_ML_STEREO; 1312 s1 |= TDA8425_S1_STEREO_LINEAR; 1313 break; 1314 case V4L2_TUNER_MODE_MONO: 1315 s1 |= TDA8425_S1_ML_STEREO; 1316 s1 |= TDA8425_S1_STEREO_MONO; 1317 break; 1318 case V4L2_TUNER_MODE_STEREO: 1319 s1 |= TDA8425_S1_ML_STEREO; 1320 s1 |= TDA8425_S1_STEREO_SPATIAL; 1321 break; 1322 default: 1323 return; 1324 } 1325 chip_write(chip,TDA8425_S1,s1); 1326 } 1327 1328 1329 /* ---------------------------------------------------------------------- */ 1330 /* audio chip descriptions - defines+functions for pic16c54 (PV951) */ 1331 1332 /* the registers of 16C54, I2C sub address. */ 1333 #define PIC16C54_REG_KEY_CODE 0x01 /* Not use. */ 1334 #define PIC16C54_REG_MISC 0x02 1335 1336 /* bit definition of the RESET register, I2C data. */ 1337 #define PIC16C54_MISC_RESET_REMOTE_CTL 0x01 /* bit 0, Reset to receive the key */ 1338 /* code of remote controller */ 1339 #define PIC16C54_MISC_MTS_MAIN 0x02 /* bit 1 */ 1340 #define PIC16C54_MISC_MTS_SAP 0x04 /* bit 2 */ 1341 #define PIC16C54_MISC_MTS_BOTH 0x08 /* bit 3 */ 1342 #define PIC16C54_MISC_SND_MUTE 0x10 /* bit 4, Mute Audio(Line-in and Tuner) */ 1343 #define PIC16C54_MISC_SND_NOTMUTE 0x20 /* bit 5 */ 1344 #define PIC16C54_MISC_SWITCH_TUNER 0x40 /* bit 6 , Switch to Line-in */ 1345 #define PIC16C54_MISC_SWITCH_LINE 0x80 /* bit 7 , Switch to Tuner */ 1346 1347 /* ---------------------------------------------------------------------- */ 1348 /* audio chip descriptions - defines+functions for TA8874Z */ 1349 1350 /* write 1st byte */ 1351 #define TA8874Z_LED_STE 0x80 1352 #define TA8874Z_LED_BIL 0x40 1353 #define TA8874Z_LED_EXT 0x20 1354 #define TA8874Z_MONO_SET 0x10 1355 #define TA8874Z_MUTE 0x08 1356 #define TA8874Z_F_MONO 0x04 1357 #define TA8874Z_MODE_SUB 0x02 1358 #define TA8874Z_MODE_MAIN 0x01 1359 1360 /* write 2nd byte */ 1361 /*#define TA8874Z_TI 0x80 */ /* test mode */ 1362 #define TA8874Z_SEPARATION 0x3f 1363 #define TA8874Z_SEPARATION_DEFAULT 0x10 1364 1365 /* read */ 1366 #define TA8874Z_B1 0x80 1367 #define TA8874Z_B0 0x40 1368 #define TA8874Z_CHAG_FLAG 0x20 1369 1370 /* 1371 * B1 B0 1372 * mono L H 1373 * stereo L L 1374 * BIL H L 1375 */ 1376 static int ta8874z_getrxsubchans(struct CHIPSTATE *chip) 1377 { 1378 int val, mode; 1379 1380 val = chip_read(chip); 1381 mode = V4L2_TUNER_SUB_MONO; 1382 if (val & TA8874Z_B1){ 1383 mode |= V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2; 1384 }else if (!(val & TA8874Z_B0)){ 1385 mode = V4L2_TUNER_SUB_STEREO; 1386 } 1387 /* v4l2_dbg(1, debug, &chip->sd, 1388 "ta8874z_getrxsubchans(): raw chip read: 0x%02x, return: 0x%02x\n", 1389 val, mode); */ 1390 return mode; 1391 } 1392 1393 static audiocmd ta8874z_stereo = { 2, {0, TA8874Z_SEPARATION_DEFAULT}}; 1394 static audiocmd ta8874z_mono = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}}; 1395 static audiocmd ta8874z_main = {2, { 0, TA8874Z_SEPARATION_DEFAULT}}; 1396 static audiocmd ta8874z_sub = {2, { TA8874Z_MODE_SUB, TA8874Z_SEPARATION_DEFAULT}}; 1397 static audiocmd ta8874z_both = {2, { TA8874Z_MODE_MAIN | TA8874Z_MODE_SUB, TA8874Z_SEPARATION_DEFAULT}}; 1398 1399 static void ta8874z_setaudmode(struct CHIPSTATE *chip, int mode) 1400 { 1401 struct v4l2_subdev *sd = &chip->sd; 1402 int update = 1; 1403 audiocmd *t = NULL; 1404 1405 v4l2_dbg(1, debug, sd, "ta8874z_setaudmode(): mode: 0x%02x\n", mode); 1406 1407 switch(mode){ 1408 case V4L2_TUNER_MODE_MONO: 1409 t = &ta8874z_mono; 1410 break; 1411 case V4L2_TUNER_MODE_STEREO: 1412 t = &ta8874z_stereo; 1413 break; 1414 case V4L2_TUNER_MODE_LANG1: 1415 t = &ta8874z_main; 1416 break; 1417 case V4L2_TUNER_MODE_LANG2: 1418 t = &ta8874z_sub; 1419 break; 1420 case V4L2_TUNER_MODE_LANG1_LANG2: 1421 t = &ta8874z_both; 1422 break; 1423 default: 1424 update = 0; 1425 } 1426 1427 if(update) 1428 chip_cmd(chip, "TA8874Z", t); 1429 } 1430 1431 static int ta8874z_checkit(struct CHIPSTATE *chip) 1432 { 1433 int rc; 1434 rc = chip_read(chip); 1435 return ((rc & 0x1f) == 0x1f) ? 1 : 0; 1436 } 1437 1438 /* ---------------------------------------------------------------------- */ 1439 /* audio chip descriptions - struct CHIPDESC */ 1440 1441 /* insmod options to enable/disable individual audio chips */ 1442 static int tda8425 = 1; 1443 static int tda9840 = 1; 1444 static int tda9850 = 1; 1445 static int tda9855 = 1; 1446 static int tda9873 = 1; 1447 static int tda9874a = 1; 1448 static int tda9875 = 1; 1449 static int tea6300; /* default 0 - address clash with msp34xx */ 1450 static int tea6320; /* default 0 - address clash with msp34xx */ 1451 static int tea6420 = 1; 1452 static int pic16c54 = 1; 1453 static int ta8874z; /* default 0 - address clash with tda9840 */ 1454 1455 module_param(tda8425, int, 0444); 1456 module_param(tda9840, int, 0444); 1457 module_param(tda9850, int, 0444); 1458 module_param(tda9855, int, 0444); 1459 module_param(tda9873, int, 0444); 1460 module_param(tda9874a, int, 0444); 1461 module_param(tda9875, int, 0444); 1462 module_param(tea6300, int, 0444); 1463 module_param(tea6320, int, 0444); 1464 module_param(tea6420, int, 0444); 1465 module_param(pic16c54, int, 0444); 1466 module_param(ta8874z, int, 0444); 1467 1468 static struct CHIPDESC chiplist[] = { 1469 { 1470 .name = "tda9840", 1471 .insmodopt = &tda9840, 1472 .addr_lo = I2C_ADDR_TDA9840 >> 1, 1473 .addr_hi = I2C_ADDR_TDA9840 >> 1, 1474 .registers = 5, 1475 .flags = CHIP_NEED_CHECKMODE, 1476 1477 /* callbacks */ 1478 .checkit = tda9840_checkit, 1479 .getrxsubchans = tda9840_getrxsubchans, 1480 .setaudmode = tda9840_setaudmode, 1481 1482 .init = { 2, { TDA9840_TEST, TDA9840_TEST_INT1SN 1483 /* ,TDA9840_SW, TDA9840_MONO */} } 1484 }, 1485 { 1486 .name = "tda9873h", 1487 .insmodopt = &tda9873, 1488 .addr_lo = I2C_ADDR_TDA985x_L >> 1, 1489 .addr_hi = I2C_ADDR_TDA985x_H >> 1, 1490 .registers = 3, 1491 .flags = CHIP_HAS_INPUTSEL | CHIP_NEED_CHECKMODE, 1492 1493 /* callbacks */ 1494 .checkit = tda9873_checkit, 1495 .getrxsubchans = tda9873_getrxsubchans, 1496 .setaudmode = tda9873_setaudmode, 1497 1498 .init = { 4, { TDA9873_SW, 0xa4, 0x06, 0x03 } }, 1499 .inputreg = TDA9873_SW, 1500 .inputmute = TDA9873_MUTE | TDA9873_AUTOMUTE, 1501 .inputmap = {0xa0, 0xa2, 0xa0, 0xa0}, 1502 .inputmask = TDA9873_INP_MASK|TDA9873_MUTE|TDA9873_AUTOMUTE, 1503 1504 }, 1505 { 1506 .name = "tda9874h/a", 1507 .insmodopt = &tda9874a, 1508 .addr_lo = I2C_ADDR_TDA9874 >> 1, 1509 .addr_hi = I2C_ADDR_TDA9874 >> 1, 1510 .flags = CHIP_NEED_CHECKMODE, 1511 1512 /* callbacks */ 1513 .initialize = tda9874a_initialize, 1514 .checkit = tda9874a_checkit, 1515 .getrxsubchans = tda9874a_getrxsubchans, 1516 .setaudmode = tda9874a_setaudmode, 1517 }, 1518 { 1519 .name = "tda9875", 1520 .insmodopt = &tda9875, 1521 .addr_lo = I2C_ADDR_TDA9875 >> 1, 1522 .addr_hi = I2C_ADDR_TDA9875 >> 1, 1523 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE, 1524 1525 /* callbacks */ 1526 .initialize = tda9875_initialize, 1527 .checkit = tda9875_checkit, 1528 .volfunc = tda9875_volume, 1529 .bassfunc = tda9875_bass, 1530 .treblefunc = tda9875_treble, 1531 .leftreg = TDA9875_MVL, 1532 .rightreg = TDA9875_MVR, 1533 .bassreg = TDA9875_MBA, 1534 .treblereg = TDA9875_MTR, 1535 .volinit = 58880, 1536 }, 1537 { 1538 .name = "tda9850", 1539 .insmodopt = &tda9850, 1540 .addr_lo = I2C_ADDR_TDA985x_L >> 1, 1541 .addr_hi = I2C_ADDR_TDA985x_H >> 1, 1542 .registers = 11, 1543 1544 .getrxsubchans = tda985x_getrxsubchans, 1545 .setaudmode = tda985x_setaudmode, 1546 1547 .init = { 8, { TDA9850_C4, 0x08, 0x08, TDA985x_STEREO, 0x07, 0x10, 0x10, 0x03 } } 1548 }, 1549 { 1550 .name = "tda9855", 1551 .insmodopt = &tda9855, 1552 .addr_lo = I2C_ADDR_TDA985x_L >> 1, 1553 .addr_hi = I2C_ADDR_TDA985x_H >> 1, 1554 .registers = 11, 1555 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE, 1556 1557 .leftreg = TDA9855_VL, 1558 .rightreg = TDA9855_VR, 1559 .bassreg = TDA9855_BA, 1560 .treblereg = TDA9855_TR, 1561 1562 /* callbacks */ 1563 .volfunc = tda9855_volume, 1564 .bassfunc = tda9855_bass, 1565 .treblefunc = tda9855_treble, 1566 .getrxsubchans = tda985x_getrxsubchans, 1567 .setaudmode = tda985x_setaudmode, 1568 1569 .init = { 12, { 0, 0x6f, 0x6f, 0x0e, 0x07<<1, 0x8<<2, 1570 TDA9855_MUTE | TDA9855_AVL | TDA9855_LOUD | TDA9855_INT, 1571 TDA985x_STEREO | TDA9855_LINEAR | TDA9855_TZCM | TDA9855_VZCM, 1572 0x07, 0x10, 0x10, 0x03 }} 1573 }, 1574 { 1575 .name = "tea6300", 1576 .insmodopt = &tea6300, 1577 .addr_lo = I2C_ADDR_TEA6300 >> 1, 1578 .addr_hi = I2C_ADDR_TEA6300 >> 1, 1579 .registers = 6, 1580 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL, 1581 1582 .leftreg = TEA6300_VR, 1583 .rightreg = TEA6300_VL, 1584 .bassreg = TEA6300_BA, 1585 .treblereg = TEA6300_TR, 1586 1587 /* callbacks */ 1588 .volfunc = tea6300_shift10, 1589 .bassfunc = tea6300_shift12, 1590 .treblefunc = tea6300_shift12, 1591 1592 .inputreg = TEA6300_S, 1593 .inputmap = { TEA6300_S_SA, TEA6300_S_SB, TEA6300_S_SC }, 1594 .inputmute = TEA6300_S_GMU, 1595 }, 1596 { 1597 .name = "tea6320", 1598 .insmodopt = &tea6320, 1599 .addr_lo = I2C_ADDR_TEA6300 >> 1, 1600 .addr_hi = I2C_ADDR_TEA6300 >> 1, 1601 .registers = 8, 1602 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL, 1603 1604 .leftreg = TEA6320_V, 1605 .rightreg = TEA6320_V, 1606 .bassreg = TEA6320_BA, 1607 .treblereg = TEA6320_TR, 1608 1609 /* callbacks */ 1610 .initialize = tea6320_initialize, 1611 .volfunc = tea6320_volume, 1612 .bassfunc = tea6320_shift11, 1613 .treblefunc = tea6320_shift11, 1614 1615 .inputreg = TEA6320_S, 1616 .inputmap = { TEA6320_S_SA, TEA6420_S_SB, TEA6300_S_SC, TEA6320_S_SD }, 1617 .inputmute = TEA6300_S_GMU, 1618 }, 1619 { 1620 .name = "tea6420", 1621 .insmodopt = &tea6420, 1622 .addr_lo = I2C_ADDR_TEA6420 >> 1, 1623 .addr_hi = I2C_ADDR_TEA6420 >> 1, 1624 .registers = 1, 1625 .flags = CHIP_HAS_INPUTSEL, 1626 1627 .inputreg = -1, 1628 .inputmap = { TEA6420_S_SA, TEA6420_S_SB, TEA6420_S_SC }, 1629 .inputmute = TEA6420_S_GMU, 1630 .inputmask = 0x07, 1631 }, 1632 { 1633 .name = "tda8425", 1634 .insmodopt = &tda8425, 1635 .addr_lo = I2C_ADDR_TDA8425 >> 1, 1636 .addr_hi = I2C_ADDR_TDA8425 >> 1, 1637 .registers = 9, 1638 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL, 1639 1640 .leftreg = TDA8425_VL, 1641 .rightreg = TDA8425_VR, 1642 .bassreg = TDA8425_BA, 1643 .treblereg = TDA8425_TR, 1644 1645 /* callbacks */ 1646 .volfunc = tda8425_shift10, 1647 .bassfunc = tda8425_shift12, 1648 .treblefunc = tda8425_shift12, 1649 .setaudmode = tda8425_setaudmode, 1650 1651 .inputreg = TDA8425_S1, 1652 .inputmap = { TDA8425_S1_CH1, TDA8425_S1_CH1, TDA8425_S1_CH1 }, 1653 .inputmute = TDA8425_S1_OFF, 1654 1655 }, 1656 { 1657 .name = "pic16c54 (PV951)", 1658 .insmodopt = &pic16c54, 1659 .addr_lo = I2C_ADDR_PIC16C54 >> 1, 1660 .addr_hi = I2C_ADDR_PIC16C54>> 1, 1661 .registers = 2, 1662 .flags = CHIP_HAS_INPUTSEL, 1663 1664 .inputreg = PIC16C54_REG_MISC, 1665 .inputmap = {PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_TUNER, 1666 PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE, 1667 PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE, 1668 PIC16C54_MISC_SND_MUTE}, 1669 .inputmute = PIC16C54_MISC_SND_MUTE, 1670 }, 1671 { 1672 .name = "ta8874z", 1673 .checkit = ta8874z_checkit, 1674 .insmodopt = &ta8874z, 1675 .addr_lo = I2C_ADDR_TDA9840 >> 1, 1676 .addr_hi = I2C_ADDR_TDA9840 >> 1, 1677 .registers = 2, 1678 1679 /* callbacks */ 1680 .getrxsubchans = ta8874z_getrxsubchans, 1681 .setaudmode = ta8874z_setaudmode, 1682 1683 .init = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}}, 1684 }, 1685 { .name = NULL } /* EOF */ 1686 }; 1687 1688 1689 /* ---------------------------------------------------------------------- */ 1690 1691 static int tvaudio_s_ctrl(struct v4l2_ctrl *ctrl) 1692 { 1693 struct v4l2_subdev *sd = to_sd(ctrl); 1694 struct CHIPSTATE *chip = to_state(sd); 1695 struct CHIPDESC *desc = chip->desc; 1696 1697 switch (ctrl->id) { 1698 case V4L2_CID_AUDIO_MUTE: 1699 chip->muted = ctrl->val; 1700 if (chip->muted) 1701 chip_write_masked(chip,desc->inputreg,desc->inputmute,desc->inputmask); 1702 else 1703 chip_write_masked(chip,desc->inputreg, 1704 desc->inputmap[chip->input],desc->inputmask); 1705 return 0; 1706 case V4L2_CID_AUDIO_VOLUME: { 1707 u32 volume, balance; 1708 u32 left, right; 1709 1710 volume = chip->volume->val; 1711 balance = chip->balance->val; 1712 left = (min(65536U - balance, 32768U) * volume) / 32768U; 1713 right = (min(balance, 32768U) * volume) / 32768U; 1714 1715 chip_write(chip, desc->leftreg, desc->volfunc(left)); 1716 chip_write(chip, desc->rightreg, desc->volfunc(right)); 1717 return 0; 1718 } 1719 case V4L2_CID_AUDIO_BASS: 1720 chip_write(chip, desc->bassreg, desc->bassfunc(ctrl->val)); 1721 return 0; 1722 case V4L2_CID_AUDIO_TREBLE: 1723 chip_write(chip, desc->treblereg, desc->treblefunc(ctrl->val)); 1724 return 0; 1725 } 1726 return -EINVAL; 1727 } 1728 1729 1730 /* ---------------------------------------------------------------------- */ 1731 /* video4linux interface */ 1732 1733 static int tvaudio_s_radio(struct v4l2_subdev *sd) 1734 { 1735 struct CHIPSTATE *chip = to_state(sd); 1736 1737 chip->radio = 1; 1738 /* del_timer(&chip->wt); */ 1739 return 0; 1740 } 1741 1742 static int tvaudio_s_routing(struct v4l2_subdev *sd, 1743 u32 input, u32 output, u32 config) 1744 { 1745 struct CHIPSTATE *chip = to_state(sd); 1746 struct CHIPDESC *desc = chip->desc; 1747 1748 if (!(desc->flags & CHIP_HAS_INPUTSEL)) 1749 return 0; 1750 if (input >= 4) 1751 return -EINVAL; 1752 /* There are four inputs: tuner, radio, extern and intern. */ 1753 chip->input = input; 1754 if (chip->muted) 1755 return 0; 1756 chip_write_masked(chip, desc->inputreg, 1757 desc->inputmap[chip->input], desc->inputmask); 1758 return 0; 1759 } 1760 1761 static int tvaudio_s_tuner(struct v4l2_subdev *sd, const struct v4l2_tuner *vt) 1762 { 1763 struct CHIPSTATE *chip = to_state(sd); 1764 struct CHIPDESC *desc = chip->desc; 1765 1766 if (!desc->setaudmode) 1767 return 0; 1768 if (chip->radio) 1769 return 0; 1770 1771 switch (vt->audmode) { 1772 case V4L2_TUNER_MODE_MONO: 1773 case V4L2_TUNER_MODE_STEREO: 1774 case V4L2_TUNER_MODE_LANG1: 1775 case V4L2_TUNER_MODE_LANG2: 1776 case V4L2_TUNER_MODE_LANG1_LANG2: 1777 break; 1778 default: 1779 return -EINVAL; 1780 } 1781 chip->audmode = vt->audmode; 1782 1783 if (chip->thread) 1784 wake_up_process(chip->thread); 1785 else 1786 desc->setaudmode(chip, vt->audmode); 1787 1788 return 0; 1789 } 1790 1791 static int tvaudio_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt) 1792 { 1793 struct CHIPSTATE *chip = to_state(sd); 1794 struct CHIPDESC *desc = chip->desc; 1795 1796 if (!desc->getrxsubchans) 1797 return 0; 1798 if (chip->radio) 1799 return 0; 1800 1801 vt->audmode = chip->audmode; 1802 vt->rxsubchans = desc->getrxsubchans(chip); 1803 vt->capability |= V4L2_TUNER_CAP_STEREO | 1804 V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2; 1805 1806 return 0; 1807 } 1808 1809 static int tvaudio_s_std(struct v4l2_subdev *sd, v4l2_std_id std) 1810 { 1811 struct CHIPSTATE *chip = to_state(sd); 1812 1813 chip->radio = 0; 1814 return 0; 1815 } 1816 1817 static int tvaudio_s_frequency(struct v4l2_subdev *sd, const struct v4l2_frequency *freq) 1818 { 1819 struct CHIPSTATE *chip = to_state(sd); 1820 struct CHIPDESC *desc = chip->desc; 1821 1822 /* For chips that provide getrxsubchans and setaudmode, and doesn't 1823 automatically follows the stereo carrier, a kthread is 1824 created to set the audio standard. In this case, when then 1825 the video channel is changed, tvaudio starts on MONO mode. 1826 After waiting for 2 seconds, the kernel thread is called, 1827 to follow whatever audio standard is pointed by the 1828 audio carrier. 1829 */ 1830 if (chip->thread) { 1831 desc->setaudmode(chip, V4L2_TUNER_MODE_MONO); 1832 chip->prevmode = -1; /* reset previous mode */ 1833 mod_timer(&chip->wt, jiffies+msecs_to_jiffies(2000)); 1834 } 1835 return 0; 1836 } 1837 1838 static int tvaudio_log_status(struct v4l2_subdev *sd) 1839 { 1840 struct CHIPSTATE *chip = to_state(sd); 1841 struct CHIPDESC *desc = chip->desc; 1842 1843 v4l2_info(sd, "Chip: %s\n", desc->name); 1844 v4l2_ctrl_handler_log_status(&chip->hdl, sd->name); 1845 return 0; 1846 } 1847 1848 /* ----------------------------------------------------------------------- */ 1849 1850 static const struct v4l2_ctrl_ops tvaudio_ctrl_ops = { 1851 .s_ctrl = tvaudio_s_ctrl, 1852 }; 1853 1854 static const struct v4l2_subdev_core_ops tvaudio_core_ops = { 1855 .log_status = tvaudio_log_status, 1856 }; 1857 1858 static const struct v4l2_subdev_tuner_ops tvaudio_tuner_ops = { 1859 .s_radio = tvaudio_s_radio, 1860 .s_frequency = tvaudio_s_frequency, 1861 .s_tuner = tvaudio_s_tuner, 1862 .g_tuner = tvaudio_g_tuner, 1863 }; 1864 1865 static const struct v4l2_subdev_audio_ops tvaudio_audio_ops = { 1866 .s_routing = tvaudio_s_routing, 1867 }; 1868 1869 static const struct v4l2_subdev_video_ops tvaudio_video_ops = { 1870 .s_std = tvaudio_s_std, 1871 }; 1872 1873 static const struct v4l2_subdev_ops tvaudio_ops = { 1874 .core = &tvaudio_core_ops, 1875 .tuner = &tvaudio_tuner_ops, 1876 .audio = &tvaudio_audio_ops, 1877 .video = &tvaudio_video_ops, 1878 }; 1879 1880 /* ----------------------------------------------------------------------- */ 1881 1882 1883 /* i2c registration */ 1884 1885 static int tvaudio_probe(struct i2c_client *client, const struct i2c_device_id *id) 1886 { 1887 struct CHIPSTATE *chip; 1888 struct CHIPDESC *desc; 1889 struct v4l2_subdev *sd; 1890 1891 if (debug) { 1892 printk(KERN_INFO "tvaudio: TV audio decoder + audio/video mux driver\n"); 1893 printk(KERN_INFO "tvaudio: known chips: "); 1894 for (desc = chiplist; desc->name != NULL; desc++) 1895 printk(KERN_CONT "%s%s", 1896 (desc == chiplist) ? "" : ", ", desc->name); 1897 printk(KERN_CONT "\n"); 1898 } 1899 1900 chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL); 1901 if (!chip) 1902 return -ENOMEM; 1903 sd = &chip->sd; 1904 v4l2_i2c_subdev_init(sd, client, &tvaudio_ops); 1905 1906 /* find description for the chip */ 1907 v4l2_dbg(1, debug, sd, "chip found @ 0x%x\n", client->addr<<1); 1908 for (desc = chiplist; desc->name != NULL; desc++) { 1909 if (0 == *(desc->insmodopt)) 1910 continue; 1911 if (client->addr < desc->addr_lo || 1912 client->addr > desc->addr_hi) 1913 continue; 1914 if (desc->checkit && !desc->checkit(chip)) 1915 continue; 1916 break; 1917 } 1918 if (desc->name == NULL) { 1919 v4l2_dbg(1, debug, sd, "no matching chip description found\n"); 1920 return -EIO; 1921 } 1922 v4l2_info(sd, "%s found @ 0x%x (%s)\n", desc->name, client->addr<<1, client->adapter->name); 1923 if (desc->flags) { 1924 v4l2_dbg(1, debug, sd, "matches:%s%s%s.\n", 1925 (desc->flags & CHIP_HAS_VOLUME) ? " volume" : "", 1926 (desc->flags & CHIP_HAS_BASSTREBLE) ? " bass/treble" : "", 1927 (desc->flags & CHIP_HAS_INPUTSEL) ? " audiomux" : ""); 1928 } 1929 1930 /* fill required data structures */ 1931 if (!id) 1932 strlcpy(client->name, desc->name, I2C_NAME_SIZE); 1933 chip->desc = desc; 1934 chip->shadow.count = desc->registers+1; 1935 chip->prevmode = -1; 1936 chip->audmode = V4L2_TUNER_MODE_LANG1; 1937 1938 /* initialization */ 1939 if (desc->initialize != NULL) 1940 desc->initialize(chip); 1941 else 1942 chip_cmd(chip, "init", &desc->init); 1943 1944 v4l2_ctrl_handler_init(&chip->hdl, 5); 1945 if (desc->flags & CHIP_HAS_INPUTSEL) 1946 v4l2_ctrl_new_std(&chip->hdl, &tvaudio_ctrl_ops, 1947 V4L2_CID_AUDIO_MUTE, 0, 1, 1, 0); 1948 if (desc->flags & CHIP_HAS_VOLUME) { 1949 if (!desc->volfunc) { 1950 /* This shouldn't be happen. Warn user, but keep working 1951 without volume controls 1952 */ 1953 v4l2_info(sd, "volume callback undefined!\n"); 1954 desc->flags &= ~CHIP_HAS_VOLUME; 1955 } else { 1956 chip->volume = v4l2_ctrl_new_std(&chip->hdl, 1957 &tvaudio_ctrl_ops, V4L2_CID_AUDIO_VOLUME, 1958 0, 65535, 65535 / 100, 1959 desc->volinit ? desc->volinit : 65535); 1960 chip->balance = v4l2_ctrl_new_std(&chip->hdl, 1961 &tvaudio_ctrl_ops, V4L2_CID_AUDIO_BALANCE, 1962 0, 65535, 65535 / 100, 32768); 1963 v4l2_ctrl_cluster(2, &chip->volume); 1964 } 1965 } 1966 if (desc->flags & CHIP_HAS_BASSTREBLE) { 1967 if (!desc->bassfunc || !desc->treblefunc) { 1968 /* This shouldn't be happen. Warn user, but keep working 1969 without bass/treble controls 1970 */ 1971 v4l2_info(sd, "bass/treble callbacks undefined!\n"); 1972 desc->flags &= ~CHIP_HAS_BASSTREBLE; 1973 } else { 1974 v4l2_ctrl_new_std(&chip->hdl, 1975 &tvaudio_ctrl_ops, V4L2_CID_AUDIO_BASS, 1976 0, 65535, 65535 / 100, 1977 desc->bassinit ? desc->bassinit : 32768); 1978 v4l2_ctrl_new_std(&chip->hdl, 1979 &tvaudio_ctrl_ops, V4L2_CID_AUDIO_TREBLE, 1980 0, 65535, 65535 / 100, 1981 desc->trebleinit ? desc->trebleinit : 32768); 1982 } 1983 } 1984 1985 sd->ctrl_handler = &chip->hdl; 1986 if (chip->hdl.error) { 1987 int err = chip->hdl.error; 1988 1989 v4l2_ctrl_handler_free(&chip->hdl); 1990 return err; 1991 } 1992 /* set controls to the default values */ 1993 v4l2_ctrl_handler_setup(&chip->hdl); 1994 1995 chip->thread = NULL; 1996 timer_setup(&chip->wt, chip_thread_wake, 0); 1997 if (desc->flags & CHIP_NEED_CHECKMODE) { 1998 if (!desc->getrxsubchans || !desc->setaudmode) { 1999 /* This shouldn't be happen. Warn user, but keep working 2000 without kthread 2001 */ 2002 v4l2_info(sd, "set/get mode callbacks undefined!\n"); 2003 return 0; 2004 } 2005 /* start async thread */ 2006 chip->thread = kthread_run(chip_thread, chip, "%s", 2007 client->name); 2008 if (IS_ERR(chip->thread)) { 2009 v4l2_warn(sd, "failed to create kthread\n"); 2010 chip->thread = NULL; 2011 } 2012 } 2013 return 0; 2014 } 2015 2016 static int tvaudio_remove(struct i2c_client *client) 2017 { 2018 struct v4l2_subdev *sd = i2c_get_clientdata(client); 2019 struct CHIPSTATE *chip = to_state(sd); 2020 2021 del_timer_sync(&chip->wt); 2022 if (chip->thread) { 2023 /* shutdown async thread */ 2024 kthread_stop(chip->thread); 2025 chip->thread = NULL; 2026 } 2027 2028 v4l2_device_unregister_subdev(sd); 2029 v4l2_ctrl_handler_free(&chip->hdl); 2030 return 0; 2031 } 2032 2033 /* This driver supports many devices and the idea is to let the driver 2034 detect which device is present. So rather than listing all supported 2035 devices here, we pretend to support a single, fake device type. */ 2036 static const struct i2c_device_id tvaudio_id[] = { 2037 { "tvaudio", 0 }, 2038 { } 2039 }; 2040 MODULE_DEVICE_TABLE(i2c, tvaudio_id); 2041 2042 static struct i2c_driver tvaudio_driver = { 2043 .driver = { 2044 .name = "tvaudio", 2045 }, 2046 .probe = tvaudio_probe, 2047 .remove = tvaudio_remove, 2048 .id_table = tvaudio_id, 2049 }; 2050 2051 module_i2c_driver(tvaudio_driver); 2052