1c942fddfSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later
2cb7a01acSMauro Carvalho Chehab /*
3cb7a01acSMauro Carvalho Chehab * saa7127 - Philips SAA7127/SAA7129 video encoder driver
4cb7a01acSMauro Carvalho Chehab *
5cb7a01acSMauro Carvalho Chehab * Copyright (C) 2003 Roy Bulter <rbulter@hetnet.nl>
6cb7a01acSMauro Carvalho Chehab *
7cb7a01acSMauro Carvalho Chehab * Based on SAA7126 video encoder driver by Gillem & Andreas Oberritter
8cb7a01acSMauro Carvalho Chehab *
9cb7a01acSMauro Carvalho Chehab * Copyright (C) 2000-2001 Gillem <htoa@gmx.net>
10cb7a01acSMauro Carvalho Chehab * Copyright (C) 2002 Andreas Oberritter <obi@saftware.de>
11cb7a01acSMauro Carvalho Chehab *
12cb7a01acSMauro Carvalho Chehab * Based on Stadis 4:2:2 MPEG-2 Decoder Driver by Nathan Laredo
13cb7a01acSMauro Carvalho Chehab *
14cb7a01acSMauro Carvalho Chehab * Copyright (C) 1999 Nathan Laredo <laredo@gnu.org>
15cb7a01acSMauro Carvalho Chehab *
16cb7a01acSMauro Carvalho Chehab * This driver is designed for the Hauppauge 250/350 Linux driver
17cb7a01acSMauro Carvalho Chehab * from the ivtv Project
18cb7a01acSMauro Carvalho Chehab *
19cb7a01acSMauro Carvalho Chehab * Copyright (C) 2003 Kevin Thayer <nufan_wfk@yahoo.com>
20cb7a01acSMauro Carvalho Chehab *
21cb7a01acSMauro Carvalho Chehab * Dual output support:
22cb7a01acSMauro Carvalho Chehab * Copyright (C) 2004 Eric Varsanyi
23cb7a01acSMauro Carvalho Chehab *
24cb7a01acSMauro Carvalho Chehab * NTSC Tuning and 7.5 IRE Setup
25cb7a01acSMauro Carvalho Chehab * Copyright (C) 2004 Chris Kennedy <c@groovy.org>
26cb7a01acSMauro Carvalho Chehab *
27cb7a01acSMauro Carvalho Chehab * VBI additions & cleanup:
28cb7a01acSMauro Carvalho Chehab * Copyright (C) 2004, 2005 Hans Verkuil <hverkuil@xs4all.nl>
29cb7a01acSMauro Carvalho Chehab *
30cb7a01acSMauro Carvalho Chehab * Note: the saa7126 is identical to the saa7127, and the saa7128 is
31cb7a01acSMauro Carvalho Chehab * identical to the saa7129, except that the saa7126 and saa7128 have
32cb7a01acSMauro Carvalho Chehab * macrovision anti-taping support. This driver will almost certainly
33cb7a01acSMauro Carvalho Chehab * work fine for those chips, except of course for the missing anti-taping
34cb7a01acSMauro Carvalho Chehab * support.
35cb7a01acSMauro Carvalho Chehab */
36cb7a01acSMauro Carvalho Chehab
37cb7a01acSMauro Carvalho Chehab
38cb7a01acSMauro Carvalho Chehab #include <linux/kernel.h>
39cb7a01acSMauro Carvalho Chehab #include <linux/module.h>
40cb7a01acSMauro Carvalho Chehab #include <linux/slab.h>
41cb7a01acSMauro Carvalho Chehab #include <linux/i2c.h>
42cb7a01acSMauro Carvalho Chehab #include <linux/videodev2.h>
43cb7a01acSMauro Carvalho Chehab #include <media/v4l2-device.h>
44b5dcee22SMauro Carvalho Chehab #include <media/i2c/saa7127.h>
45cb7a01acSMauro Carvalho Chehab
46cb7a01acSMauro Carvalho Chehab static int debug;
47cb7a01acSMauro Carvalho Chehab static int test_image;
48cb7a01acSMauro Carvalho Chehab
49cb7a01acSMauro Carvalho Chehab MODULE_DESCRIPTION("Philips SAA7127/9 video encoder driver");
50cb7a01acSMauro Carvalho Chehab MODULE_AUTHOR("Kevin Thayer, Chris Kennedy, Hans Verkuil");
51cb7a01acSMauro Carvalho Chehab MODULE_LICENSE("GPL");
52cb7a01acSMauro Carvalho Chehab module_param(debug, int, 0644);
53cb7a01acSMauro Carvalho Chehab module_param(test_image, int, 0644);
54cb7a01acSMauro Carvalho Chehab MODULE_PARM_DESC(debug, "debug level (0-2)");
55cb7a01acSMauro Carvalho Chehab MODULE_PARM_DESC(test_image, "test_image (0-1)");
56cb7a01acSMauro Carvalho Chehab
57cb7a01acSMauro Carvalho Chehab
58cb7a01acSMauro Carvalho Chehab /*
59cb7a01acSMauro Carvalho Chehab * SAA7127 registers
60cb7a01acSMauro Carvalho Chehab */
61cb7a01acSMauro Carvalho Chehab
62cb7a01acSMauro Carvalho Chehab #define SAA7127_REG_STATUS 0x00
63cb7a01acSMauro Carvalho Chehab #define SAA7127_REG_WIDESCREEN_CONFIG 0x26
64cb7a01acSMauro Carvalho Chehab #define SAA7127_REG_WIDESCREEN_ENABLE 0x27
65cb7a01acSMauro Carvalho Chehab #define SAA7127_REG_BURST_START 0x28
66cb7a01acSMauro Carvalho Chehab #define SAA7127_REG_BURST_END 0x29
67cb7a01acSMauro Carvalho Chehab #define SAA7127_REG_COPYGEN_0 0x2a
68cb7a01acSMauro Carvalho Chehab #define SAA7127_REG_COPYGEN_1 0x2b
69cb7a01acSMauro Carvalho Chehab #define SAA7127_REG_COPYGEN_2 0x2c
70cb7a01acSMauro Carvalho Chehab #define SAA7127_REG_OUTPUT_PORT_CONTROL 0x2d
71cb7a01acSMauro Carvalho Chehab #define SAA7127_REG_GAIN_LUMINANCE_RGB 0x38
72cb7a01acSMauro Carvalho Chehab #define SAA7127_REG_GAIN_COLORDIFF_RGB 0x39
73cb7a01acSMauro Carvalho Chehab #define SAA7127_REG_INPUT_PORT_CONTROL_1 0x3a
74cb7a01acSMauro Carvalho Chehab #define SAA7129_REG_FADE_KEY_COL2 0x4f
75cb7a01acSMauro Carvalho Chehab #define SAA7127_REG_CHROMA_PHASE 0x5a
76cb7a01acSMauro Carvalho Chehab #define SAA7127_REG_GAINU 0x5b
77cb7a01acSMauro Carvalho Chehab #define SAA7127_REG_GAINV 0x5c
78cb7a01acSMauro Carvalho Chehab #define SAA7127_REG_BLACK_LEVEL 0x5d
79cb7a01acSMauro Carvalho Chehab #define SAA7127_REG_BLANKING_LEVEL 0x5e
80cb7a01acSMauro Carvalho Chehab #define SAA7127_REG_VBI_BLANKING 0x5f
81cb7a01acSMauro Carvalho Chehab #define SAA7127_REG_DAC_CONTROL 0x61
82cb7a01acSMauro Carvalho Chehab #define SAA7127_REG_BURST_AMP 0x62
83cb7a01acSMauro Carvalho Chehab #define SAA7127_REG_SUBC3 0x63
84cb7a01acSMauro Carvalho Chehab #define SAA7127_REG_SUBC2 0x64
85cb7a01acSMauro Carvalho Chehab #define SAA7127_REG_SUBC1 0x65
86cb7a01acSMauro Carvalho Chehab #define SAA7127_REG_SUBC0 0x66
87cb7a01acSMauro Carvalho Chehab #define SAA7127_REG_LINE_21_ODD_0 0x67
88cb7a01acSMauro Carvalho Chehab #define SAA7127_REG_LINE_21_ODD_1 0x68
89cb7a01acSMauro Carvalho Chehab #define SAA7127_REG_LINE_21_EVEN_0 0x69
90cb7a01acSMauro Carvalho Chehab #define SAA7127_REG_LINE_21_EVEN_1 0x6a
91cb7a01acSMauro Carvalho Chehab #define SAA7127_REG_RCV_PORT_CONTROL 0x6b
92cb7a01acSMauro Carvalho Chehab #define SAA7127_REG_VTRIG 0x6c
93cb7a01acSMauro Carvalho Chehab #define SAA7127_REG_HTRIG_HI 0x6d
94cb7a01acSMauro Carvalho Chehab #define SAA7127_REG_MULTI 0x6e
95cb7a01acSMauro Carvalho Chehab #define SAA7127_REG_CLOSED_CAPTION 0x6f
96cb7a01acSMauro Carvalho Chehab #define SAA7127_REG_RCV2_OUTPUT_START 0x70
97cb7a01acSMauro Carvalho Chehab #define SAA7127_REG_RCV2_OUTPUT_END 0x71
98cb7a01acSMauro Carvalho Chehab #define SAA7127_REG_RCV2_OUTPUT_MSBS 0x72
99cb7a01acSMauro Carvalho Chehab #define SAA7127_REG_TTX_REQUEST_H_START 0x73
100cb7a01acSMauro Carvalho Chehab #define SAA7127_REG_TTX_REQUEST_H_DELAY_LENGTH 0x74
101cb7a01acSMauro Carvalho Chehab #define SAA7127_REG_CSYNC_ADVANCE_VSYNC_SHIFT 0x75
102cb7a01acSMauro Carvalho Chehab #define SAA7127_REG_TTX_ODD_REQ_VERT_START 0x76
103cb7a01acSMauro Carvalho Chehab #define SAA7127_REG_TTX_ODD_REQ_VERT_END 0x77
104cb7a01acSMauro Carvalho Chehab #define SAA7127_REG_TTX_EVEN_REQ_VERT_START 0x78
105cb7a01acSMauro Carvalho Chehab #define SAA7127_REG_TTX_EVEN_REQ_VERT_END 0x79
106cb7a01acSMauro Carvalho Chehab #define SAA7127_REG_FIRST_ACTIVE 0x7a
107cb7a01acSMauro Carvalho Chehab #define SAA7127_REG_LAST_ACTIVE 0x7b
108cb7a01acSMauro Carvalho Chehab #define SAA7127_REG_MSB_VERTICAL 0x7c
109cb7a01acSMauro Carvalho Chehab #define SAA7127_REG_DISABLE_TTX_LINE_LO_0 0x7e
110cb7a01acSMauro Carvalho Chehab #define SAA7127_REG_DISABLE_TTX_LINE_LO_1 0x7f
111cb7a01acSMauro Carvalho Chehab
112cb7a01acSMauro Carvalho Chehab /*
113cb7a01acSMauro Carvalho Chehab **********************************************************************
114cb7a01acSMauro Carvalho Chehab *
115cb7a01acSMauro Carvalho Chehab * Arrays with configuration parameters for the SAA7127
116cb7a01acSMauro Carvalho Chehab *
117cb7a01acSMauro Carvalho Chehab **********************************************************************
118cb7a01acSMauro Carvalho Chehab */
119cb7a01acSMauro Carvalho Chehab
120cb7a01acSMauro Carvalho Chehab struct i2c_reg_value {
121cb7a01acSMauro Carvalho Chehab unsigned char reg;
122cb7a01acSMauro Carvalho Chehab unsigned char value;
123cb7a01acSMauro Carvalho Chehab };
124cb7a01acSMauro Carvalho Chehab
125cb7a01acSMauro Carvalho Chehab static const struct i2c_reg_value saa7129_init_config_extra[] = {
126cb7a01acSMauro Carvalho Chehab { SAA7127_REG_OUTPUT_PORT_CONTROL, 0x38 },
127cb7a01acSMauro Carvalho Chehab { SAA7127_REG_VTRIG, 0xfa },
128cb7a01acSMauro Carvalho Chehab { 0, 0 }
129cb7a01acSMauro Carvalho Chehab };
130cb7a01acSMauro Carvalho Chehab
131cb7a01acSMauro Carvalho Chehab static const struct i2c_reg_value saa7127_init_config_common[] = {
132cb7a01acSMauro Carvalho Chehab { SAA7127_REG_WIDESCREEN_CONFIG, 0x0d },
133cb7a01acSMauro Carvalho Chehab { SAA7127_REG_WIDESCREEN_ENABLE, 0x00 },
134cb7a01acSMauro Carvalho Chehab { SAA7127_REG_COPYGEN_0, 0x77 },
135cb7a01acSMauro Carvalho Chehab { SAA7127_REG_COPYGEN_1, 0x41 },
136cb7a01acSMauro Carvalho Chehab { SAA7127_REG_COPYGEN_2, 0x00 }, /* Macrovision enable/disable */
137cb7a01acSMauro Carvalho Chehab { SAA7127_REG_OUTPUT_PORT_CONTROL, 0xbf },
138cb7a01acSMauro Carvalho Chehab { SAA7127_REG_GAIN_LUMINANCE_RGB, 0x00 },
139cb7a01acSMauro Carvalho Chehab { SAA7127_REG_GAIN_COLORDIFF_RGB, 0x00 },
140cb7a01acSMauro Carvalho Chehab { SAA7127_REG_INPUT_PORT_CONTROL_1, 0x80 }, /* for color bars */
141cb7a01acSMauro Carvalho Chehab { SAA7127_REG_LINE_21_ODD_0, 0x77 },
142cb7a01acSMauro Carvalho Chehab { SAA7127_REG_LINE_21_ODD_1, 0x41 },
143cb7a01acSMauro Carvalho Chehab { SAA7127_REG_LINE_21_EVEN_0, 0x88 },
144cb7a01acSMauro Carvalho Chehab { SAA7127_REG_LINE_21_EVEN_1, 0x41 },
145cb7a01acSMauro Carvalho Chehab { SAA7127_REG_RCV_PORT_CONTROL, 0x12 },
146cb7a01acSMauro Carvalho Chehab { SAA7127_REG_VTRIG, 0xf9 },
147cb7a01acSMauro Carvalho Chehab { SAA7127_REG_HTRIG_HI, 0x00 },
148cb7a01acSMauro Carvalho Chehab { SAA7127_REG_RCV2_OUTPUT_START, 0x41 },
149cb7a01acSMauro Carvalho Chehab { SAA7127_REG_RCV2_OUTPUT_END, 0xc3 },
150cb7a01acSMauro Carvalho Chehab { SAA7127_REG_RCV2_OUTPUT_MSBS, 0x00 },
151cb7a01acSMauro Carvalho Chehab { SAA7127_REG_TTX_REQUEST_H_START, 0x3e },
152cb7a01acSMauro Carvalho Chehab { SAA7127_REG_TTX_REQUEST_H_DELAY_LENGTH, 0xb8 },
153cb7a01acSMauro Carvalho Chehab { SAA7127_REG_CSYNC_ADVANCE_VSYNC_SHIFT, 0x03 },
154cb7a01acSMauro Carvalho Chehab { SAA7127_REG_TTX_ODD_REQ_VERT_START, 0x15 },
155cb7a01acSMauro Carvalho Chehab { SAA7127_REG_TTX_ODD_REQ_VERT_END, 0x16 },
156cb7a01acSMauro Carvalho Chehab { SAA7127_REG_TTX_EVEN_REQ_VERT_START, 0x15 },
157cb7a01acSMauro Carvalho Chehab { SAA7127_REG_TTX_EVEN_REQ_VERT_END, 0x16 },
158cb7a01acSMauro Carvalho Chehab { SAA7127_REG_FIRST_ACTIVE, 0x1a },
159cb7a01acSMauro Carvalho Chehab { SAA7127_REG_LAST_ACTIVE, 0x01 },
160cb7a01acSMauro Carvalho Chehab { SAA7127_REG_MSB_VERTICAL, 0xc0 },
161cb7a01acSMauro Carvalho Chehab { SAA7127_REG_DISABLE_TTX_LINE_LO_0, 0x00 },
162cb7a01acSMauro Carvalho Chehab { SAA7127_REG_DISABLE_TTX_LINE_LO_1, 0x00 },
163cb7a01acSMauro Carvalho Chehab { 0, 0 }
164cb7a01acSMauro Carvalho Chehab };
165cb7a01acSMauro Carvalho Chehab
166cb7a01acSMauro Carvalho Chehab #define SAA7127_60HZ_DAC_CONTROL 0x15
167cb7a01acSMauro Carvalho Chehab static const struct i2c_reg_value saa7127_init_config_60hz[] = {
168cb7a01acSMauro Carvalho Chehab { SAA7127_REG_BURST_START, 0x19 },
169cb7a01acSMauro Carvalho Chehab /* BURST_END is also used as a chip ID in saa7127_probe */
170cb7a01acSMauro Carvalho Chehab { SAA7127_REG_BURST_END, 0x1d },
171cb7a01acSMauro Carvalho Chehab { SAA7127_REG_CHROMA_PHASE, 0xa3 },
172cb7a01acSMauro Carvalho Chehab { SAA7127_REG_GAINU, 0x98 },
173cb7a01acSMauro Carvalho Chehab { SAA7127_REG_GAINV, 0xd3 },
174cb7a01acSMauro Carvalho Chehab { SAA7127_REG_BLACK_LEVEL, 0x39 },
175cb7a01acSMauro Carvalho Chehab { SAA7127_REG_BLANKING_LEVEL, 0x2e },
176cb7a01acSMauro Carvalho Chehab { SAA7127_REG_VBI_BLANKING, 0x2e },
177cb7a01acSMauro Carvalho Chehab { SAA7127_REG_DAC_CONTROL, 0x15 },
178cb7a01acSMauro Carvalho Chehab { SAA7127_REG_BURST_AMP, 0x4d },
179cb7a01acSMauro Carvalho Chehab { SAA7127_REG_SUBC3, 0x1f },
180cb7a01acSMauro Carvalho Chehab { SAA7127_REG_SUBC2, 0x7c },
181cb7a01acSMauro Carvalho Chehab { SAA7127_REG_SUBC1, 0xf0 },
182cb7a01acSMauro Carvalho Chehab { SAA7127_REG_SUBC0, 0x21 },
183cb7a01acSMauro Carvalho Chehab { SAA7127_REG_MULTI, 0x90 },
184cb7a01acSMauro Carvalho Chehab { SAA7127_REG_CLOSED_CAPTION, 0x11 },
185cb7a01acSMauro Carvalho Chehab { 0, 0 }
186cb7a01acSMauro Carvalho Chehab };
187cb7a01acSMauro Carvalho Chehab
188cb7a01acSMauro Carvalho Chehab #define SAA7127_50HZ_PAL_DAC_CONTROL 0x02
189cb7a01acSMauro Carvalho Chehab static struct i2c_reg_value saa7127_init_config_50hz_pal[] = {
190cb7a01acSMauro Carvalho Chehab { SAA7127_REG_BURST_START, 0x21 },
191cb7a01acSMauro Carvalho Chehab /* BURST_END is also used as a chip ID in saa7127_probe */
192cb7a01acSMauro Carvalho Chehab { SAA7127_REG_BURST_END, 0x1d },
193cb7a01acSMauro Carvalho Chehab { SAA7127_REG_CHROMA_PHASE, 0x3f },
194cb7a01acSMauro Carvalho Chehab { SAA7127_REG_GAINU, 0x7d },
195cb7a01acSMauro Carvalho Chehab { SAA7127_REG_GAINV, 0xaf },
196cb7a01acSMauro Carvalho Chehab { SAA7127_REG_BLACK_LEVEL, 0x33 },
197cb7a01acSMauro Carvalho Chehab { SAA7127_REG_BLANKING_LEVEL, 0x35 },
198cb7a01acSMauro Carvalho Chehab { SAA7127_REG_VBI_BLANKING, 0x35 },
199cb7a01acSMauro Carvalho Chehab { SAA7127_REG_DAC_CONTROL, 0x02 },
200cb7a01acSMauro Carvalho Chehab { SAA7127_REG_BURST_AMP, 0x2f },
201cb7a01acSMauro Carvalho Chehab { SAA7127_REG_SUBC3, 0xcb },
202cb7a01acSMauro Carvalho Chehab { SAA7127_REG_SUBC2, 0x8a },
203cb7a01acSMauro Carvalho Chehab { SAA7127_REG_SUBC1, 0x09 },
204cb7a01acSMauro Carvalho Chehab { SAA7127_REG_SUBC0, 0x2a },
205cb7a01acSMauro Carvalho Chehab { SAA7127_REG_MULTI, 0xa0 },
206cb7a01acSMauro Carvalho Chehab { SAA7127_REG_CLOSED_CAPTION, 0x00 },
207cb7a01acSMauro Carvalho Chehab { 0, 0 }
208cb7a01acSMauro Carvalho Chehab };
209cb7a01acSMauro Carvalho Chehab
210cb7a01acSMauro Carvalho Chehab #define SAA7127_50HZ_SECAM_DAC_CONTROL 0x08
211cb7a01acSMauro Carvalho Chehab static struct i2c_reg_value saa7127_init_config_50hz_secam[] = {
212cb7a01acSMauro Carvalho Chehab { SAA7127_REG_BURST_START, 0x21 },
213cb7a01acSMauro Carvalho Chehab /* BURST_END is also used as a chip ID in saa7127_probe */
214cb7a01acSMauro Carvalho Chehab { SAA7127_REG_BURST_END, 0x1d },
215cb7a01acSMauro Carvalho Chehab { SAA7127_REG_CHROMA_PHASE, 0x3f },
216cb7a01acSMauro Carvalho Chehab { SAA7127_REG_GAINU, 0x6a },
217cb7a01acSMauro Carvalho Chehab { SAA7127_REG_GAINV, 0x81 },
218cb7a01acSMauro Carvalho Chehab { SAA7127_REG_BLACK_LEVEL, 0x33 },
219cb7a01acSMauro Carvalho Chehab { SAA7127_REG_BLANKING_LEVEL, 0x35 },
220cb7a01acSMauro Carvalho Chehab { SAA7127_REG_VBI_BLANKING, 0x35 },
221cb7a01acSMauro Carvalho Chehab { SAA7127_REG_DAC_CONTROL, 0x08 },
222cb7a01acSMauro Carvalho Chehab { SAA7127_REG_BURST_AMP, 0x2f },
223cb7a01acSMauro Carvalho Chehab { SAA7127_REG_SUBC3, 0xb2 },
224cb7a01acSMauro Carvalho Chehab { SAA7127_REG_SUBC2, 0x3b },
225cb7a01acSMauro Carvalho Chehab { SAA7127_REG_SUBC1, 0xa3 },
226cb7a01acSMauro Carvalho Chehab { SAA7127_REG_SUBC0, 0x28 },
227cb7a01acSMauro Carvalho Chehab { SAA7127_REG_MULTI, 0x90 },
228cb7a01acSMauro Carvalho Chehab { SAA7127_REG_CLOSED_CAPTION, 0x00 },
229cb7a01acSMauro Carvalho Chehab { 0, 0 }
230cb7a01acSMauro Carvalho Chehab };
231cb7a01acSMauro Carvalho Chehab
232cb7a01acSMauro Carvalho Chehab /*
233cb7a01acSMauro Carvalho Chehab **********************************************************************
234cb7a01acSMauro Carvalho Chehab *
235cb7a01acSMauro Carvalho Chehab * Encoder Struct, holds the configuration state of the encoder
236cb7a01acSMauro Carvalho Chehab *
237cb7a01acSMauro Carvalho Chehab **********************************************************************
238cb7a01acSMauro Carvalho Chehab */
239cb7a01acSMauro Carvalho Chehab
240e1277110SHans Verkuil enum saa712x_model {
241e1277110SHans Verkuil SAA7127,
242e1277110SHans Verkuil SAA7129,
243e1277110SHans Verkuil };
244e1277110SHans Verkuil
245cb7a01acSMauro Carvalho Chehab struct saa7127_state {
246cb7a01acSMauro Carvalho Chehab struct v4l2_subdev sd;
247cb7a01acSMauro Carvalho Chehab v4l2_std_id std;
248e1277110SHans Verkuil enum saa712x_model ident;
249cb7a01acSMauro Carvalho Chehab enum saa7127_input_type input_type;
250cb7a01acSMauro Carvalho Chehab enum saa7127_output_type output_type;
251cb7a01acSMauro Carvalho Chehab int video_enable;
252cb7a01acSMauro Carvalho Chehab int wss_enable;
253cb7a01acSMauro Carvalho Chehab u16 wss_mode;
254cb7a01acSMauro Carvalho Chehab int cc_enable;
255cb7a01acSMauro Carvalho Chehab u16 cc_data;
256cb7a01acSMauro Carvalho Chehab int xds_enable;
257cb7a01acSMauro Carvalho Chehab u16 xds_data;
258cb7a01acSMauro Carvalho Chehab int vps_enable;
259cb7a01acSMauro Carvalho Chehab u8 vps_data[5];
260cb7a01acSMauro Carvalho Chehab u8 reg_2d;
261cb7a01acSMauro Carvalho Chehab u8 reg_3a;
262cb7a01acSMauro Carvalho Chehab u8 reg_3a_cb; /* colorbar bit */
263cb7a01acSMauro Carvalho Chehab u8 reg_61;
264cb7a01acSMauro Carvalho Chehab };
265cb7a01acSMauro Carvalho Chehab
to_state(struct v4l2_subdev * sd)266cb7a01acSMauro Carvalho Chehab static inline struct saa7127_state *to_state(struct v4l2_subdev *sd)
267cb7a01acSMauro Carvalho Chehab {
268cb7a01acSMauro Carvalho Chehab return container_of(sd, struct saa7127_state, sd);
269cb7a01acSMauro Carvalho Chehab }
270cb7a01acSMauro Carvalho Chehab
271cb7a01acSMauro Carvalho Chehab static const char * const output_strs[] =
272cb7a01acSMauro Carvalho Chehab {
273cb7a01acSMauro Carvalho Chehab "S-Video + Composite",
274cb7a01acSMauro Carvalho Chehab "Composite",
275cb7a01acSMauro Carvalho Chehab "S-Video",
276cb7a01acSMauro Carvalho Chehab "RGB",
277cb7a01acSMauro Carvalho Chehab "YUV C",
278cb7a01acSMauro Carvalho Chehab "YUV V"
279cb7a01acSMauro Carvalho Chehab };
280cb7a01acSMauro Carvalho Chehab
281cb7a01acSMauro Carvalho Chehab static const char * const wss_strs[] = {
282cb7a01acSMauro Carvalho Chehab "invalid",
283cb7a01acSMauro Carvalho Chehab "letterbox 14:9 center",
284cb7a01acSMauro Carvalho Chehab "letterbox 14:9 top",
285cb7a01acSMauro Carvalho Chehab "invalid",
286cb7a01acSMauro Carvalho Chehab "letterbox 16:9 top",
287cb7a01acSMauro Carvalho Chehab "invalid",
288cb7a01acSMauro Carvalho Chehab "invalid",
289cb7a01acSMauro Carvalho Chehab "16:9 full format anamorphic",
290cb7a01acSMauro Carvalho Chehab "4:3 full format",
291cb7a01acSMauro Carvalho Chehab "invalid",
292cb7a01acSMauro Carvalho Chehab "invalid",
293cb7a01acSMauro Carvalho Chehab "letterbox 16:9 center",
294cb7a01acSMauro Carvalho Chehab "invalid",
295cb7a01acSMauro Carvalho Chehab "letterbox >16:9 center",
296cb7a01acSMauro Carvalho Chehab "14:9 full format center",
297cb7a01acSMauro Carvalho Chehab "invalid",
298cb7a01acSMauro Carvalho Chehab };
299cb7a01acSMauro Carvalho Chehab
300cb7a01acSMauro Carvalho Chehab /* ----------------------------------------------------------------------- */
301cb7a01acSMauro Carvalho Chehab
saa7127_read(struct v4l2_subdev * sd,u8 reg)302cb7a01acSMauro Carvalho Chehab static int saa7127_read(struct v4l2_subdev *sd, u8 reg)
303cb7a01acSMauro Carvalho Chehab {
304cb7a01acSMauro Carvalho Chehab struct i2c_client *client = v4l2_get_subdevdata(sd);
305cb7a01acSMauro Carvalho Chehab
306cb7a01acSMauro Carvalho Chehab return i2c_smbus_read_byte_data(client, reg);
307cb7a01acSMauro Carvalho Chehab }
308cb7a01acSMauro Carvalho Chehab
309cb7a01acSMauro Carvalho Chehab /* ----------------------------------------------------------------------- */
310cb7a01acSMauro Carvalho Chehab
saa7127_write(struct v4l2_subdev * sd,u8 reg,u8 val)311cb7a01acSMauro Carvalho Chehab static int saa7127_write(struct v4l2_subdev *sd, u8 reg, u8 val)
312cb7a01acSMauro Carvalho Chehab {
313cb7a01acSMauro Carvalho Chehab struct i2c_client *client = v4l2_get_subdevdata(sd);
314cb7a01acSMauro Carvalho Chehab int i;
315cb7a01acSMauro Carvalho Chehab
316cb7a01acSMauro Carvalho Chehab for (i = 0; i < 3; i++) {
317cb7a01acSMauro Carvalho Chehab if (i2c_smbus_write_byte_data(client, reg, val) == 0)
318cb7a01acSMauro Carvalho Chehab return 0;
319cb7a01acSMauro Carvalho Chehab }
320cb7a01acSMauro Carvalho Chehab v4l2_err(sd, "I2C Write Problem\n");
321cb7a01acSMauro Carvalho Chehab return -1;
322cb7a01acSMauro Carvalho Chehab }
323cb7a01acSMauro Carvalho Chehab
324cb7a01acSMauro Carvalho Chehab /* ----------------------------------------------------------------------- */
325cb7a01acSMauro Carvalho Chehab
saa7127_write_inittab(struct v4l2_subdev * sd,const struct i2c_reg_value * regs)326cb7a01acSMauro Carvalho Chehab static int saa7127_write_inittab(struct v4l2_subdev *sd,
327cb7a01acSMauro Carvalho Chehab const struct i2c_reg_value *regs)
328cb7a01acSMauro Carvalho Chehab {
329cb7a01acSMauro Carvalho Chehab while (regs->reg != 0) {
330cb7a01acSMauro Carvalho Chehab saa7127_write(sd, regs->reg, regs->value);
331cb7a01acSMauro Carvalho Chehab regs++;
332cb7a01acSMauro Carvalho Chehab }
333cb7a01acSMauro Carvalho Chehab return 0;
334cb7a01acSMauro Carvalho Chehab }
335cb7a01acSMauro Carvalho Chehab
336cb7a01acSMauro Carvalho Chehab /* ----------------------------------------------------------------------- */
337cb7a01acSMauro Carvalho Chehab
saa7127_set_vps(struct v4l2_subdev * sd,const struct v4l2_sliced_vbi_data * data)338cb7a01acSMauro Carvalho Chehab static int saa7127_set_vps(struct v4l2_subdev *sd, const struct v4l2_sliced_vbi_data *data)
339cb7a01acSMauro Carvalho Chehab {
340cb7a01acSMauro Carvalho Chehab struct saa7127_state *state = to_state(sd);
341cb7a01acSMauro Carvalho Chehab int enable = (data->line != 0);
342cb7a01acSMauro Carvalho Chehab
343cb7a01acSMauro Carvalho Chehab if (enable && (data->field != 0 || data->line != 16))
344cb7a01acSMauro Carvalho Chehab return -EINVAL;
345cb7a01acSMauro Carvalho Chehab if (state->vps_enable != enable) {
346cb7a01acSMauro Carvalho Chehab v4l2_dbg(1, debug, sd, "Turn VPS Signal %s\n", enable ? "on" : "off");
347cb7a01acSMauro Carvalho Chehab saa7127_write(sd, 0x54, enable << 7);
348cb7a01acSMauro Carvalho Chehab state->vps_enable = enable;
349cb7a01acSMauro Carvalho Chehab }
350cb7a01acSMauro Carvalho Chehab if (!enable)
351cb7a01acSMauro Carvalho Chehab return 0;
352cb7a01acSMauro Carvalho Chehab
353cb7a01acSMauro Carvalho Chehab state->vps_data[0] = data->data[2];
354cb7a01acSMauro Carvalho Chehab state->vps_data[1] = data->data[8];
355cb7a01acSMauro Carvalho Chehab state->vps_data[2] = data->data[9];
356cb7a01acSMauro Carvalho Chehab state->vps_data[3] = data->data[10];
357cb7a01acSMauro Carvalho Chehab state->vps_data[4] = data->data[11];
358cb7a01acSMauro Carvalho Chehab v4l2_dbg(1, debug, sd, "Set VPS data %*ph\n", 5, state->vps_data);
359cb7a01acSMauro Carvalho Chehab saa7127_write(sd, 0x55, state->vps_data[0]);
360cb7a01acSMauro Carvalho Chehab saa7127_write(sd, 0x56, state->vps_data[1]);
361cb7a01acSMauro Carvalho Chehab saa7127_write(sd, 0x57, state->vps_data[2]);
362cb7a01acSMauro Carvalho Chehab saa7127_write(sd, 0x58, state->vps_data[3]);
363cb7a01acSMauro Carvalho Chehab saa7127_write(sd, 0x59, state->vps_data[4]);
364cb7a01acSMauro Carvalho Chehab return 0;
365cb7a01acSMauro Carvalho Chehab }
366cb7a01acSMauro Carvalho Chehab
367cb7a01acSMauro Carvalho Chehab /* ----------------------------------------------------------------------- */
368cb7a01acSMauro Carvalho Chehab
saa7127_set_cc(struct v4l2_subdev * sd,const struct v4l2_sliced_vbi_data * data)369cb7a01acSMauro Carvalho Chehab static int saa7127_set_cc(struct v4l2_subdev *sd, const struct v4l2_sliced_vbi_data *data)
370cb7a01acSMauro Carvalho Chehab {
371cb7a01acSMauro Carvalho Chehab struct saa7127_state *state = to_state(sd);
372cb7a01acSMauro Carvalho Chehab u16 cc = data->data[1] << 8 | data->data[0];
373cb7a01acSMauro Carvalho Chehab int enable = (data->line != 0);
374cb7a01acSMauro Carvalho Chehab
375cb7a01acSMauro Carvalho Chehab if (enable && (data->field != 0 || data->line != 21))
376cb7a01acSMauro Carvalho Chehab return -EINVAL;
377cb7a01acSMauro Carvalho Chehab if (state->cc_enable != enable) {
378cb7a01acSMauro Carvalho Chehab v4l2_dbg(1, debug, sd,
379cb7a01acSMauro Carvalho Chehab "Turn CC %s\n", enable ? "on" : "off");
380cb7a01acSMauro Carvalho Chehab saa7127_write(sd, SAA7127_REG_CLOSED_CAPTION,
381cb7a01acSMauro Carvalho Chehab (state->xds_enable << 7) | (enable << 6) | 0x11);
382cb7a01acSMauro Carvalho Chehab state->cc_enable = enable;
383cb7a01acSMauro Carvalho Chehab }
384cb7a01acSMauro Carvalho Chehab if (!enable)
385cb7a01acSMauro Carvalho Chehab return 0;
386cb7a01acSMauro Carvalho Chehab
387cb7a01acSMauro Carvalho Chehab v4l2_dbg(2, debug, sd, "CC data: %04x\n", cc);
388cb7a01acSMauro Carvalho Chehab saa7127_write(sd, SAA7127_REG_LINE_21_ODD_0, cc & 0xff);
389cb7a01acSMauro Carvalho Chehab saa7127_write(sd, SAA7127_REG_LINE_21_ODD_1, cc >> 8);
390cb7a01acSMauro Carvalho Chehab state->cc_data = cc;
391cb7a01acSMauro Carvalho Chehab return 0;
392cb7a01acSMauro Carvalho Chehab }
393cb7a01acSMauro Carvalho Chehab
394cb7a01acSMauro Carvalho Chehab /* ----------------------------------------------------------------------- */
395cb7a01acSMauro Carvalho Chehab
saa7127_set_xds(struct v4l2_subdev * sd,const struct v4l2_sliced_vbi_data * data)396cb7a01acSMauro Carvalho Chehab static int saa7127_set_xds(struct v4l2_subdev *sd, const struct v4l2_sliced_vbi_data *data)
397cb7a01acSMauro Carvalho Chehab {
398cb7a01acSMauro Carvalho Chehab struct saa7127_state *state = to_state(sd);
399cb7a01acSMauro Carvalho Chehab u16 xds = data->data[1] << 8 | data->data[0];
400cb7a01acSMauro Carvalho Chehab int enable = (data->line != 0);
401cb7a01acSMauro Carvalho Chehab
402cb7a01acSMauro Carvalho Chehab if (enable && (data->field != 1 || data->line != 21))
403cb7a01acSMauro Carvalho Chehab return -EINVAL;
404cb7a01acSMauro Carvalho Chehab if (state->xds_enable != enable) {
405cb7a01acSMauro Carvalho Chehab v4l2_dbg(1, debug, sd, "Turn XDS %s\n", enable ? "on" : "off");
406cb7a01acSMauro Carvalho Chehab saa7127_write(sd, SAA7127_REG_CLOSED_CAPTION,
407cb7a01acSMauro Carvalho Chehab (enable << 7) | (state->cc_enable << 6) | 0x11);
408cb7a01acSMauro Carvalho Chehab state->xds_enable = enable;
409cb7a01acSMauro Carvalho Chehab }
410cb7a01acSMauro Carvalho Chehab if (!enable)
411cb7a01acSMauro Carvalho Chehab return 0;
412cb7a01acSMauro Carvalho Chehab
413cb7a01acSMauro Carvalho Chehab v4l2_dbg(2, debug, sd, "XDS data: %04x\n", xds);
414cb7a01acSMauro Carvalho Chehab saa7127_write(sd, SAA7127_REG_LINE_21_EVEN_0, xds & 0xff);
415cb7a01acSMauro Carvalho Chehab saa7127_write(sd, SAA7127_REG_LINE_21_EVEN_1, xds >> 8);
416cb7a01acSMauro Carvalho Chehab state->xds_data = xds;
417cb7a01acSMauro Carvalho Chehab return 0;
418cb7a01acSMauro Carvalho Chehab }
419cb7a01acSMauro Carvalho Chehab
420cb7a01acSMauro Carvalho Chehab /* ----------------------------------------------------------------------- */
421cb7a01acSMauro Carvalho Chehab
saa7127_set_wss(struct v4l2_subdev * sd,const struct v4l2_sliced_vbi_data * data)422cb7a01acSMauro Carvalho Chehab static int saa7127_set_wss(struct v4l2_subdev *sd, const struct v4l2_sliced_vbi_data *data)
423cb7a01acSMauro Carvalho Chehab {
424cb7a01acSMauro Carvalho Chehab struct saa7127_state *state = to_state(sd);
425cb7a01acSMauro Carvalho Chehab int enable = (data->line != 0);
426cb7a01acSMauro Carvalho Chehab
427cb7a01acSMauro Carvalho Chehab if (enable && (data->field != 0 || data->line != 23))
428cb7a01acSMauro Carvalho Chehab return -EINVAL;
429cb7a01acSMauro Carvalho Chehab if (state->wss_enable != enable) {
430cb7a01acSMauro Carvalho Chehab v4l2_dbg(1, debug, sd, "Turn WSS %s\n", enable ? "on" : "off");
431cb7a01acSMauro Carvalho Chehab saa7127_write(sd, 0x27, enable << 7);
432cb7a01acSMauro Carvalho Chehab state->wss_enable = enable;
433cb7a01acSMauro Carvalho Chehab }
434cb7a01acSMauro Carvalho Chehab if (!enable)
435cb7a01acSMauro Carvalho Chehab return 0;
436cb7a01acSMauro Carvalho Chehab
437cb7a01acSMauro Carvalho Chehab saa7127_write(sd, 0x26, data->data[0]);
438cb7a01acSMauro Carvalho Chehab saa7127_write(sd, 0x27, 0x80 | (data->data[1] & 0x3f));
439cb7a01acSMauro Carvalho Chehab v4l2_dbg(1, debug, sd,
440cb7a01acSMauro Carvalho Chehab "WSS mode: %s\n", wss_strs[data->data[0] & 0xf]);
441cb7a01acSMauro Carvalho Chehab state->wss_mode = (data->data[1] & 0x3f) << 8 | data->data[0];
442cb7a01acSMauro Carvalho Chehab return 0;
443cb7a01acSMauro Carvalho Chehab }
444cb7a01acSMauro Carvalho Chehab
445cb7a01acSMauro Carvalho Chehab /* ----------------------------------------------------------------------- */
446cb7a01acSMauro Carvalho Chehab
saa7127_set_video_enable(struct v4l2_subdev * sd,int enable)447cb7a01acSMauro Carvalho Chehab static int saa7127_set_video_enable(struct v4l2_subdev *sd, int enable)
448cb7a01acSMauro Carvalho Chehab {
449cb7a01acSMauro Carvalho Chehab struct saa7127_state *state = to_state(sd);
450cb7a01acSMauro Carvalho Chehab
451cb7a01acSMauro Carvalho Chehab if (enable) {
452cb7a01acSMauro Carvalho Chehab v4l2_dbg(1, debug, sd, "Enable Video Output\n");
453cb7a01acSMauro Carvalho Chehab saa7127_write(sd, 0x2d, state->reg_2d);
454cb7a01acSMauro Carvalho Chehab saa7127_write(sd, 0x61, state->reg_61);
455cb7a01acSMauro Carvalho Chehab } else {
456cb7a01acSMauro Carvalho Chehab v4l2_dbg(1, debug, sd, "Disable Video Output\n");
457cb7a01acSMauro Carvalho Chehab saa7127_write(sd, 0x2d, (state->reg_2d & 0xf0));
458cb7a01acSMauro Carvalho Chehab saa7127_write(sd, 0x61, (state->reg_61 | 0xc0));
459cb7a01acSMauro Carvalho Chehab }
460cb7a01acSMauro Carvalho Chehab state->video_enable = enable;
461cb7a01acSMauro Carvalho Chehab return 0;
462cb7a01acSMauro Carvalho Chehab }
463cb7a01acSMauro Carvalho Chehab
464cb7a01acSMauro Carvalho Chehab /* ----------------------------------------------------------------------- */
465cb7a01acSMauro Carvalho Chehab
saa7127_set_std(struct v4l2_subdev * sd,v4l2_std_id std)466cb7a01acSMauro Carvalho Chehab static int saa7127_set_std(struct v4l2_subdev *sd, v4l2_std_id std)
467cb7a01acSMauro Carvalho Chehab {
468cb7a01acSMauro Carvalho Chehab struct saa7127_state *state = to_state(sd);
469cb7a01acSMauro Carvalho Chehab const struct i2c_reg_value *inittab;
470cb7a01acSMauro Carvalho Chehab
471cb7a01acSMauro Carvalho Chehab if (std & V4L2_STD_525_60) {
472cb7a01acSMauro Carvalho Chehab v4l2_dbg(1, debug, sd, "Selecting 60 Hz video Standard\n");
473cb7a01acSMauro Carvalho Chehab inittab = saa7127_init_config_60hz;
474cb7a01acSMauro Carvalho Chehab state->reg_61 = SAA7127_60HZ_DAC_CONTROL;
475cb7a01acSMauro Carvalho Chehab
476e1277110SHans Verkuil } else if (state->ident == SAA7129 &&
477cb7a01acSMauro Carvalho Chehab (std & V4L2_STD_SECAM) &&
478cb7a01acSMauro Carvalho Chehab !(std & (V4L2_STD_625_50 & ~V4L2_STD_SECAM))) {
479cb7a01acSMauro Carvalho Chehab
480cb7a01acSMauro Carvalho Chehab /* If and only if SECAM, with a SAA712[89] */
481cb7a01acSMauro Carvalho Chehab v4l2_dbg(1, debug, sd,
482cb7a01acSMauro Carvalho Chehab "Selecting 50 Hz SECAM video Standard\n");
483cb7a01acSMauro Carvalho Chehab inittab = saa7127_init_config_50hz_secam;
484cb7a01acSMauro Carvalho Chehab state->reg_61 = SAA7127_50HZ_SECAM_DAC_CONTROL;
485cb7a01acSMauro Carvalho Chehab
486cb7a01acSMauro Carvalho Chehab } else {
487cb7a01acSMauro Carvalho Chehab v4l2_dbg(1, debug, sd, "Selecting 50 Hz PAL video Standard\n");
488cb7a01acSMauro Carvalho Chehab inittab = saa7127_init_config_50hz_pal;
489cb7a01acSMauro Carvalho Chehab state->reg_61 = SAA7127_50HZ_PAL_DAC_CONTROL;
490cb7a01acSMauro Carvalho Chehab }
491cb7a01acSMauro Carvalho Chehab
492cb7a01acSMauro Carvalho Chehab /* Write Table */
493cb7a01acSMauro Carvalho Chehab saa7127_write_inittab(sd, inittab);
494cb7a01acSMauro Carvalho Chehab state->std = std;
495cb7a01acSMauro Carvalho Chehab return 0;
496cb7a01acSMauro Carvalho Chehab }
497cb7a01acSMauro Carvalho Chehab
498cb7a01acSMauro Carvalho Chehab /* ----------------------------------------------------------------------- */
499cb7a01acSMauro Carvalho Chehab
saa7127_set_output_type(struct v4l2_subdev * sd,int output)500cb7a01acSMauro Carvalho Chehab static int saa7127_set_output_type(struct v4l2_subdev *sd, int output)
501cb7a01acSMauro Carvalho Chehab {
502cb7a01acSMauro Carvalho Chehab struct saa7127_state *state = to_state(sd);
503cb7a01acSMauro Carvalho Chehab
504cb7a01acSMauro Carvalho Chehab switch (output) {
505cb7a01acSMauro Carvalho Chehab case SAA7127_OUTPUT_TYPE_RGB:
506cb7a01acSMauro Carvalho Chehab state->reg_2d = 0x0f; /* RGB + CVBS (for sync) */
507cb7a01acSMauro Carvalho Chehab state->reg_3a = 0x13; /* by default switch YUV to RGB-matrix on */
508cb7a01acSMauro Carvalho Chehab break;
509cb7a01acSMauro Carvalho Chehab
510cb7a01acSMauro Carvalho Chehab case SAA7127_OUTPUT_TYPE_COMPOSITE:
511e1277110SHans Verkuil if (state->ident == SAA7129)
512cb7a01acSMauro Carvalho Chehab state->reg_2d = 0x20; /* CVBS only */
513cb7a01acSMauro Carvalho Chehab else
514cb7a01acSMauro Carvalho Chehab state->reg_2d = 0x08; /* 00001000 CVBS only, RGB DAC's off (high impedance mode) */
515cb7a01acSMauro Carvalho Chehab state->reg_3a = 0x13; /* by default switch YUV to RGB-matrix on */
516cb7a01acSMauro Carvalho Chehab break;
517cb7a01acSMauro Carvalho Chehab
518cb7a01acSMauro Carvalho Chehab case SAA7127_OUTPUT_TYPE_SVIDEO:
519e1277110SHans Verkuil if (state->ident == SAA7129)
520cb7a01acSMauro Carvalho Chehab state->reg_2d = 0x18; /* Y + C */
521cb7a01acSMauro Carvalho Chehab else
522cb7a01acSMauro Carvalho Chehab state->reg_2d = 0xff; /*11111111 croma -> R, luma -> CVBS + G + B */
523cb7a01acSMauro Carvalho Chehab state->reg_3a = 0x13; /* by default switch YUV to RGB-matrix on */
524cb7a01acSMauro Carvalho Chehab break;
525cb7a01acSMauro Carvalho Chehab
526cb7a01acSMauro Carvalho Chehab case SAA7127_OUTPUT_TYPE_YUV_V:
527cb7a01acSMauro Carvalho Chehab state->reg_2d = 0x4f; /* reg 2D = 01001111, all DAC's on, RGB + VBS */
528cb7a01acSMauro Carvalho Chehab state->reg_3a = 0x0b; /* reg 3A = 00001011, bypass RGB-matrix */
529cb7a01acSMauro Carvalho Chehab break;
530cb7a01acSMauro Carvalho Chehab
531cb7a01acSMauro Carvalho Chehab case SAA7127_OUTPUT_TYPE_YUV_C:
532cb7a01acSMauro Carvalho Chehab state->reg_2d = 0x0f; /* reg 2D = 00001111, all DAC's on, RGB + CVBS */
533cb7a01acSMauro Carvalho Chehab state->reg_3a = 0x0b; /* reg 3A = 00001011, bypass RGB-matrix */
534cb7a01acSMauro Carvalho Chehab break;
535cb7a01acSMauro Carvalho Chehab
536cb7a01acSMauro Carvalho Chehab case SAA7127_OUTPUT_TYPE_BOTH:
537e1277110SHans Verkuil if (state->ident == SAA7129)
538cb7a01acSMauro Carvalho Chehab state->reg_2d = 0x38;
539cb7a01acSMauro Carvalho Chehab else
540cb7a01acSMauro Carvalho Chehab state->reg_2d = 0xbf;
541cb7a01acSMauro Carvalho Chehab state->reg_3a = 0x13; /* by default switch YUV to RGB-matrix on */
542cb7a01acSMauro Carvalho Chehab break;
543cb7a01acSMauro Carvalho Chehab
544cb7a01acSMauro Carvalho Chehab default:
545cb7a01acSMauro Carvalho Chehab return -EINVAL;
546cb7a01acSMauro Carvalho Chehab }
547cb7a01acSMauro Carvalho Chehab v4l2_dbg(1, debug, sd,
548cb7a01acSMauro Carvalho Chehab "Selecting %s output type\n", output_strs[output]);
549cb7a01acSMauro Carvalho Chehab
550cb7a01acSMauro Carvalho Chehab /* Configure Encoder */
551cb7a01acSMauro Carvalho Chehab saa7127_write(sd, 0x2d, state->reg_2d);
552cb7a01acSMauro Carvalho Chehab saa7127_write(sd, 0x3a, state->reg_3a | state->reg_3a_cb);
553cb7a01acSMauro Carvalho Chehab state->output_type = output;
554cb7a01acSMauro Carvalho Chehab return 0;
555cb7a01acSMauro Carvalho Chehab }
556cb7a01acSMauro Carvalho Chehab
557cb7a01acSMauro Carvalho Chehab /* ----------------------------------------------------------------------- */
558cb7a01acSMauro Carvalho Chehab
saa7127_set_input_type(struct v4l2_subdev * sd,int input)559cb7a01acSMauro Carvalho Chehab static int saa7127_set_input_type(struct v4l2_subdev *sd, int input)
560cb7a01acSMauro Carvalho Chehab {
561cb7a01acSMauro Carvalho Chehab struct saa7127_state *state = to_state(sd);
562cb7a01acSMauro Carvalho Chehab
563cb7a01acSMauro Carvalho Chehab switch (input) {
564cb7a01acSMauro Carvalho Chehab case SAA7127_INPUT_TYPE_NORMAL: /* avia */
565cb7a01acSMauro Carvalho Chehab v4l2_dbg(1, debug, sd, "Selecting Normal Encoder Input\n");
566cb7a01acSMauro Carvalho Chehab state->reg_3a_cb = 0;
567cb7a01acSMauro Carvalho Chehab break;
568cb7a01acSMauro Carvalho Chehab
569cb7a01acSMauro Carvalho Chehab case SAA7127_INPUT_TYPE_TEST_IMAGE: /* color bar */
570cb7a01acSMauro Carvalho Chehab v4l2_dbg(1, debug, sd, "Selecting Color Bar generator\n");
571cb7a01acSMauro Carvalho Chehab state->reg_3a_cb = 0x80;
572cb7a01acSMauro Carvalho Chehab break;
573cb7a01acSMauro Carvalho Chehab
574cb7a01acSMauro Carvalho Chehab default:
575cb7a01acSMauro Carvalho Chehab return -EINVAL;
576cb7a01acSMauro Carvalho Chehab }
577cb7a01acSMauro Carvalho Chehab saa7127_write(sd, 0x3a, state->reg_3a | state->reg_3a_cb);
578cb7a01acSMauro Carvalho Chehab state->input_type = input;
579cb7a01acSMauro Carvalho Chehab return 0;
580cb7a01acSMauro Carvalho Chehab }
581cb7a01acSMauro Carvalho Chehab
582cb7a01acSMauro Carvalho Chehab /* ----------------------------------------------------------------------- */
583cb7a01acSMauro Carvalho Chehab
saa7127_s_std_output(struct v4l2_subdev * sd,v4l2_std_id std)584cb7a01acSMauro Carvalho Chehab static int saa7127_s_std_output(struct v4l2_subdev *sd, v4l2_std_id std)
585cb7a01acSMauro Carvalho Chehab {
586cb7a01acSMauro Carvalho Chehab struct saa7127_state *state = to_state(sd);
587cb7a01acSMauro Carvalho Chehab
588cb7a01acSMauro Carvalho Chehab if (state->std == std)
589cb7a01acSMauro Carvalho Chehab return 0;
590cb7a01acSMauro Carvalho Chehab return saa7127_set_std(sd, std);
591cb7a01acSMauro Carvalho Chehab }
592cb7a01acSMauro Carvalho Chehab
saa7127_s_routing(struct v4l2_subdev * sd,u32 input,u32 output,u32 config)593cb7a01acSMauro Carvalho Chehab static int saa7127_s_routing(struct v4l2_subdev *sd,
594cb7a01acSMauro Carvalho Chehab u32 input, u32 output, u32 config)
595cb7a01acSMauro Carvalho Chehab {
596cb7a01acSMauro Carvalho Chehab struct saa7127_state *state = to_state(sd);
597cb7a01acSMauro Carvalho Chehab int rc = 0;
598cb7a01acSMauro Carvalho Chehab
599cb7a01acSMauro Carvalho Chehab if (state->input_type != input)
600cb7a01acSMauro Carvalho Chehab rc = saa7127_set_input_type(sd, input);
601cb7a01acSMauro Carvalho Chehab if (rc == 0 && state->output_type != output)
602cb7a01acSMauro Carvalho Chehab rc = saa7127_set_output_type(sd, output);
603cb7a01acSMauro Carvalho Chehab return rc;
604cb7a01acSMauro Carvalho Chehab }
605cb7a01acSMauro Carvalho Chehab
saa7127_s_stream(struct v4l2_subdev * sd,int enable)606cb7a01acSMauro Carvalho Chehab static int saa7127_s_stream(struct v4l2_subdev *sd, int enable)
607cb7a01acSMauro Carvalho Chehab {
608cb7a01acSMauro Carvalho Chehab struct saa7127_state *state = to_state(sd);
609cb7a01acSMauro Carvalho Chehab
610cb7a01acSMauro Carvalho Chehab if (state->video_enable == enable)
611cb7a01acSMauro Carvalho Chehab return 0;
612cb7a01acSMauro Carvalho Chehab return saa7127_set_video_enable(sd, enable);
613cb7a01acSMauro Carvalho Chehab }
614cb7a01acSMauro Carvalho Chehab
saa7127_g_sliced_fmt(struct v4l2_subdev * sd,struct v4l2_sliced_vbi_format * fmt)615cb7a01acSMauro Carvalho Chehab static int saa7127_g_sliced_fmt(struct v4l2_subdev *sd, struct v4l2_sliced_vbi_format *fmt)
616cb7a01acSMauro Carvalho Chehab {
617cb7a01acSMauro Carvalho Chehab struct saa7127_state *state = to_state(sd);
618cb7a01acSMauro Carvalho Chehab
61930634e8eSHans Verkuil memset(fmt->service_lines, 0, sizeof(fmt->service_lines));
620cb7a01acSMauro Carvalho Chehab if (state->vps_enable)
621cb7a01acSMauro Carvalho Chehab fmt->service_lines[0][16] = V4L2_SLICED_VPS;
622cb7a01acSMauro Carvalho Chehab if (state->wss_enable)
623cb7a01acSMauro Carvalho Chehab fmt->service_lines[0][23] = V4L2_SLICED_WSS_625;
624cb7a01acSMauro Carvalho Chehab if (state->cc_enable) {
625cb7a01acSMauro Carvalho Chehab fmt->service_lines[0][21] = V4L2_SLICED_CAPTION_525;
626cb7a01acSMauro Carvalho Chehab fmt->service_lines[1][21] = V4L2_SLICED_CAPTION_525;
627cb7a01acSMauro Carvalho Chehab }
628cb7a01acSMauro Carvalho Chehab fmt->service_set =
629cb7a01acSMauro Carvalho Chehab (state->vps_enable ? V4L2_SLICED_VPS : 0) |
630cb7a01acSMauro Carvalho Chehab (state->wss_enable ? V4L2_SLICED_WSS_625 : 0) |
631cb7a01acSMauro Carvalho Chehab (state->cc_enable ? V4L2_SLICED_CAPTION_525 : 0);
632cb7a01acSMauro Carvalho Chehab return 0;
633cb7a01acSMauro Carvalho Chehab }
634cb7a01acSMauro Carvalho Chehab
saa7127_s_vbi_data(struct v4l2_subdev * sd,const struct v4l2_sliced_vbi_data * data)635cb7a01acSMauro Carvalho Chehab static int saa7127_s_vbi_data(struct v4l2_subdev *sd, const struct v4l2_sliced_vbi_data *data)
636cb7a01acSMauro Carvalho Chehab {
637cb7a01acSMauro Carvalho Chehab switch (data->id) {
638cb7a01acSMauro Carvalho Chehab case V4L2_SLICED_WSS_625:
639cb7a01acSMauro Carvalho Chehab return saa7127_set_wss(sd, data);
640cb7a01acSMauro Carvalho Chehab case V4L2_SLICED_VPS:
641cb7a01acSMauro Carvalho Chehab return saa7127_set_vps(sd, data);
642cb7a01acSMauro Carvalho Chehab case V4L2_SLICED_CAPTION_525:
643cb7a01acSMauro Carvalho Chehab if (data->field == 0)
644cb7a01acSMauro Carvalho Chehab return saa7127_set_cc(sd, data);
645cb7a01acSMauro Carvalho Chehab return saa7127_set_xds(sd, data);
646cb7a01acSMauro Carvalho Chehab default:
647cb7a01acSMauro Carvalho Chehab return -EINVAL;
648cb7a01acSMauro Carvalho Chehab }
649cb7a01acSMauro Carvalho Chehab return 0;
650cb7a01acSMauro Carvalho Chehab }
651cb7a01acSMauro Carvalho Chehab
652cb7a01acSMauro Carvalho Chehab #ifdef CONFIG_VIDEO_ADV_DEBUG
saa7127_g_register(struct v4l2_subdev * sd,struct v4l2_dbg_register * reg)653cb7a01acSMauro Carvalho Chehab static int saa7127_g_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg)
654cb7a01acSMauro Carvalho Chehab {
655cb7a01acSMauro Carvalho Chehab reg->val = saa7127_read(sd, reg->reg & 0xff);
656cb7a01acSMauro Carvalho Chehab reg->size = 1;
657cb7a01acSMauro Carvalho Chehab return 0;
658cb7a01acSMauro Carvalho Chehab }
659cb7a01acSMauro Carvalho Chehab
saa7127_s_register(struct v4l2_subdev * sd,const struct v4l2_dbg_register * reg)660977ba3b1SHans Verkuil static int saa7127_s_register(struct v4l2_subdev *sd, const struct v4l2_dbg_register *reg)
661cb7a01acSMauro Carvalho Chehab {
662cb7a01acSMauro Carvalho Chehab saa7127_write(sd, reg->reg & 0xff, reg->val & 0xff);
663cb7a01acSMauro Carvalho Chehab return 0;
664cb7a01acSMauro Carvalho Chehab }
665cb7a01acSMauro Carvalho Chehab #endif
666cb7a01acSMauro Carvalho Chehab
saa7127_log_status(struct v4l2_subdev * sd)667cb7a01acSMauro Carvalho Chehab static int saa7127_log_status(struct v4l2_subdev *sd)
668cb7a01acSMauro Carvalho Chehab {
669cb7a01acSMauro Carvalho Chehab struct saa7127_state *state = to_state(sd);
670cb7a01acSMauro Carvalho Chehab
671cb7a01acSMauro Carvalho Chehab v4l2_info(sd, "Standard: %s\n", (state->std & V4L2_STD_525_60) ? "60 Hz" : "50 Hz");
672cb7a01acSMauro Carvalho Chehab v4l2_info(sd, "Input: %s\n", state->input_type ? "color bars" : "normal");
673cb7a01acSMauro Carvalho Chehab v4l2_info(sd, "Output: %s\n", state->video_enable ?
674cb7a01acSMauro Carvalho Chehab output_strs[state->output_type] : "disabled");
675cb7a01acSMauro Carvalho Chehab v4l2_info(sd, "WSS: %s\n", state->wss_enable ?
676cb7a01acSMauro Carvalho Chehab wss_strs[state->wss_mode] : "disabled");
677cb7a01acSMauro Carvalho Chehab v4l2_info(sd, "VPS: %s\n", state->vps_enable ? "enabled" : "disabled");
678cb7a01acSMauro Carvalho Chehab v4l2_info(sd, "CC: %s\n", state->cc_enable ? "enabled" : "disabled");
679cb7a01acSMauro Carvalho Chehab return 0;
680cb7a01acSMauro Carvalho Chehab }
681cb7a01acSMauro Carvalho Chehab
682cb7a01acSMauro Carvalho Chehab /* ----------------------------------------------------------------------- */
683cb7a01acSMauro Carvalho Chehab
684cb7a01acSMauro Carvalho Chehab static const struct v4l2_subdev_core_ops saa7127_core_ops = {
685cb7a01acSMauro Carvalho Chehab .log_status = saa7127_log_status,
686cb7a01acSMauro Carvalho Chehab #ifdef CONFIG_VIDEO_ADV_DEBUG
687cb7a01acSMauro Carvalho Chehab .g_register = saa7127_g_register,
688cb7a01acSMauro Carvalho Chehab .s_register = saa7127_s_register,
689cb7a01acSMauro Carvalho Chehab #endif
690cb7a01acSMauro Carvalho Chehab };
691cb7a01acSMauro Carvalho Chehab
692cb7a01acSMauro Carvalho Chehab static const struct v4l2_subdev_video_ops saa7127_video_ops = {
693cb7a01acSMauro Carvalho Chehab .s_std_output = saa7127_s_std_output,
694cb7a01acSMauro Carvalho Chehab .s_routing = saa7127_s_routing,
695cb7a01acSMauro Carvalho Chehab .s_stream = saa7127_s_stream,
696cb7a01acSMauro Carvalho Chehab };
697cb7a01acSMauro Carvalho Chehab
698cb7a01acSMauro Carvalho Chehab static const struct v4l2_subdev_vbi_ops saa7127_vbi_ops = {
699cb7a01acSMauro Carvalho Chehab .s_vbi_data = saa7127_s_vbi_data,
700cb7a01acSMauro Carvalho Chehab .g_sliced_fmt = saa7127_g_sliced_fmt,
701cb7a01acSMauro Carvalho Chehab };
702cb7a01acSMauro Carvalho Chehab
703cb7a01acSMauro Carvalho Chehab static const struct v4l2_subdev_ops saa7127_ops = {
704cb7a01acSMauro Carvalho Chehab .core = &saa7127_core_ops,
705cb7a01acSMauro Carvalho Chehab .video = &saa7127_video_ops,
706cb7a01acSMauro Carvalho Chehab .vbi = &saa7127_vbi_ops,
707cb7a01acSMauro Carvalho Chehab };
708cb7a01acSMauro Carvalho Chehab
709cb7a01acSMauro Carvalho Chehab /* ----------------------------------------------------------------------- */
710cb7a01acSMauro Carvalho Chehab
saa7127_probe(struct i2c_client * client)711097ac2ffSUwe Kleine-König static int saa7127_probe(struct i2c_client *client)
712cb7a01acSMauro Carvalho Chehab {
713097ac2ffSUwe Kleine-König const struct i2c_device_id *id = i2c_client_get_device_id(client);
714cb7a01acSMauro Carvalho Chehab struct saa7127_state *state;
715cb7a01acSMauro Carvalho Chehab struct v4l2_subdev *sd;
716cb7a01acSMauro Carvalho Chehab struct v4l2_sliced_vbi_data vbi = { 0, 0, 0, 0 }; /* set to disabled */
717cb7a01acSMauro Carvalho Chehab
718cb7a01acSMauro Carvalho Chehab /* Check if the adapter supports the needed features */
719cb7a01acSMauro Carvalho Chehab if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
720cb7a01acSMauro Carvalho Chehab return -EIO;
721cb7a01acSMauro Carvalho Chehab
722cb7a01acSMauro Carvalho Chehab v4l_dbg(1, debug, client, "detecting saa7127 client on address 0x%x\n",
723cb7a01acSMauro Carvalho Chehab client->addr << 1);
724cb7a01acSMauro Carvalho Chehab
725c02b211dSLaurent Pinchart state = devm_kzalloc(&client->dev, sizeof(*state), GFP_KERNEL);
726cb7a01acSMauro Carvalho Chehab if (state == NULL)
727cb7a01acSMauro Carvalho Chehab return -ENOMEM;
728cb7a01acSMauro Carvalho Chehab
729cb7a01acSMauro Carvalho Chehab sd = &state->sd;
730cb7a01acSMauro Carvalho Chehab v4l2_i2c_subdev_init(sd, client, &saa7127_ops);
731cb7a01acSMauro Carvalho Chehab
732cb7a01acSMauro Carvalho Chehab /* First test register 0: Bits 5-7 are a version ID (should be 0),
733cb7a01acSMauro Carvalho Chehab and bit 2 should also be 0.
734cb7a01acSMauro Carvalho Chehab This is rather general, so the second test is more specific and
735cb7a01acSMauro Carvalho Chehab looks at the 'ending point of burst in clock cycles' which is
736cb7a01acSMauro Carvalho Chehab 0x1d after a reset and not expected to ever change. */
737cb7a01acSMauro Carvalho Chehab if ((saa7127_read(sd, 0) & 0xe4) != 0 ||
738cb7a01acSMauro Carvalho Chehab (saa7127_read(sd, 0x29) & 0x3f) != 0x1d) {
739cb7a01acSMauro Carvalho Chehab v4l2_dbg(1, debug, sd, "saa7127 not found\n");
740cb7a01acSMauro Carvalho Chehab return -ENODEV;
741cb7a01acSMauro Carvalho Chehab }
742cb7a01acSMauro Carvalho Chehab
743cb7a01acSMauro Carvalho Chehab if (id->driver_data) { /* Chip type is already known */
744cb7a01acSMauro Carvalho Chehab state->ident = id->driver_data;
745cb7a01acSMauro Carvalho Chehab } else { /* Needs detection */
746cb7a01acSMauro Carvalho Chehab int read_result;
747cb7a01acSMauro Carvalho Chehab
748cb7a01acSMauro Carvalho Chehab /* Detect if it's an saa7129 */
749cb7a01acSMauro Carvalho Chehab read_result = saa7127_read(sd, SAA7129_REG_FADE_KEY_COL2);
750cb7a01acSMauro Carvalho Chehab saa7127_write(sd, SAA7129_REG_FADE_KEY_COL2, 0xaa);
751cb7a01acSMauro Carvalho Chehab if (saa7127_read(sd, SAA7129_REG_FADE_KEY_COL2) == 0xaa) {
752cb7a01acSMauro Carvalho Chehab saa7127_write(sd, SAA7129_REG_FADE_KEY_COL2,
753cb7a01acSMauro Carvalho Chehab read_result);
754e1277110SHans Verkuil state->ident = SAA7129;
755c0decac1SMauro Carvalho Chehab strscpy(client->name, "saa7129", I2C_NAME_SIZE);
756cb7a01acSMauro Carvalho Chehab } else {
757e1277110SHans Verkuil state->ident = SAA7127;
758c0decac1SMauro Carvalho Chehab strscpy(client->name, "saa7127", I2C_NAME_SIZE);
759cb7a01acSMauro Carvalho Chehab }
760cb7a01acSMauro Carvalho Chehab }
761cb7a01acSMauro Carvalho Chehab
762cb7a01acSMauro Carvalho Chehab v4l2_info(sd, "%s found @ 0x%x (%s)\n", client->name,
763cb7a01acSMauro Carvalho Chehab client->addr << 1, client->adapter->name);
764cb7a01acSMauro Carvalho Chehab
765cb7a01acSMauro Carvalho Chehab v4l2_dbg(1, debug, sd, "Configuring encoder\n");
766cb7a01acSMauro Carvalho Chehab saa7127_write_inittab(sd, saa7127_init_config_common);
767cb7a01acSMauro Carvalho Chehab saa7127_set_std(sd, V4L2_STD_NTSC);
768cb7a01acSMauro Carvalho Chehab saa7127_set_output_type(sd, SAA7127_OUTPUT_TYPE_BOTH);
769cb7a01acSMauro Carvalho Chehab saa7127_set_vps(sd, &vbi);
770cb7a01acSMauro Carvalho Chehab saa7127_set_wss(sd, &vbi);
771cb7a01acSMauro Carvalho Chehab saa7127_set_cc(sd, &vbi);
772cb7a01acSMauro Carvalho Chehab saa7127_set_xds(sd, &vbi);
773cb7a01acSMauro Carvalho Chehab if (test_image == 1)
774cb7a01acSMauro Carvalho Chehab /* The Encoder has an internal Colorbar generator */
775cb7a01acSMauro Carvalho Chehab /* This can be used for debugging */
776cb7a01acSMauro Carvalho Chehab saa7127_set_input_type(sd, SAA7127_INPUT_TYPE_TEST_IMAGE);
777cb7a01acSMauro Carvalho Chehab else
778cb7a01acSMauro Carvalho Chehab saa7127_set_input_type(sd, SAA7127_INPUT_TYPE_NORMAL);
779cb7a01acSMauro Carvalho Chehab saa7127_set_video_enable(sd, 1);
780cb7a01acSMauro Carvalho Chehab
781e1277110SHans Verkuil if (state->ident == SAA7129)
782cb7a01acSMauro Carvalho Chehab saa7127_write_inittab(sd, saa7129_init_config_extra);
783cb7a01acSMauro Carvalho Chehab return 0;
784cb7a01acSMauro Carvalho Chehab }
785cb7a01acSMauro Carvalho Chehab
786cb7a01acSMauro Carvalho Chehab /* ----------------------------------------------------------------------- */
787cb7a01acSMauro Carvalho Chehab
saa7127_remove(struct i2c_client * client)788ed5c2f5fSUwe Kleine-König static void saa7127_remove(struct i2c_client *client)
789cb7a01acSMauro Carvalho Chehab {
790cb7a01acSMauro Carvalho Chehab struct v4l2_subdev *sd = i2c_get_clientdata(client);
791cb7a01acSMauro Carvalho Chehab
792cb7a01acSMauro Carvalho Chehab v4l2_device_unregister_subdev(sd);
793cb7a01acSMauro Carvalho Chehab /* Turn off TV output */
794cb7a01acSMauro Carvalho Chehab saa7127_set_video_enable(sd, 0);
795cb7a01acSMauro Carvalho Chehab }
796cb7a01acSMauro Carvalho Chehab
797cb7a01acSMauro Carvalho Chehab /* ----------------------------------------------------------------------- */
798cb7a01acSMauro Carvalho Chehab
799e749d1f1SArvind Yadav static const struct i2c_device_id saa7127_id[] = {
800cb7a01acSMauro Carvalho Chehab { "saa7127_auto", 0 }, /* auto-detection */
801e1277110SHans Verkuil { "saa7126", SAA7127 },
802e1277110SHans Verkuil { "saa7127", SAA7127 },
803e1277110SHans Verkuil { "saa7128", SAA7129 },
804e1277110SHans Verkuil { "saa7129", SAA7129 },
805cb7a01acSMauro Carvalho Chehab { }
806cb7a01acSMauro Carvalho Chehab };
807cb7a01acSMauro Carvalho Chehab MODULE_DEVICE_TABLE(i2c, saa7127_id);
808cb7a01acSMauro Carvalho Chehab
809cb7a01acSMauro Carvalho Chehab static struct i2c_driver saa7127_driver = {
810cb7a01acSMauro Carvalho Chehab .driver = {
811cb7a01acSMauro Carvalho Chehab .name = "saa7127",
812cb7a01acSMauro Carvalho Chehab },
813*aaeb31c0SUwe Kleine-König .probe = saa7127_probe,
814cb7a01acSMauro Carvalho Chehab .remove = saa7127_remove,
815cb7a01acSMauro Carvalho Chehab .id_table = saa7127_id,
816cb7a01acSMauro Carvalho Chehab };
817cb7a01acSMauro Carvalho Chehab
818cb7a01acSMauro Carvalho Chehab module_i2c_driver(saa7127_driver);
819