1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Samsung LSI S5C73M3 8M pixel camera driver 4 * 5 * Copyright (C) 2012, Samsung Electronics, Co., Ltd. 6 * Sylwester Nawrocki <s.nawrocki@samsung.com> 7 * Andrzej Hajda <a.hajda@samsung.com> 8 */ 9 #ifndef S5C73M3_H_ 10 #define S5C73M3_H_ 11 12 #include <linux/clk.h> 13 #include <linux/kernel.h> 14 #include <linux/regulator/consumer.h> 15 #include <linux/gpio/consumer.h> 16 #include <media/v4l2-common.h> 17 #include <media/v4l2-ctrls.h> 18 #include <media/v4l2-subdev.h> 19 #include <media/i2c/s5c73m3.h> 20 21 #define DRIVER_NAME "S5C73M3" 22 23 #define S5C73M3_ISP_FMT MEDIA_BUS_FMT_VYUY8_2X8 24 #define S5C73M3_JPEG_FMT MEDIA_BUS_FMT_S5C_UYVY_JPEG_1X8 25 26 /* Subdevs pad index definitions */ 27 enum s5c73m3_pads { 28 S5C73M3_ISP_PAD, 29 S5C73M3_JPEG_PAD, 30 S5C73M3_NUM_PADS 31 }; 32 33 enum s5c73m3_oif_pads { 34 OIF_ISP_PAD, 35 OIF_JPEG_PAD, 36 OIF_SOURCE_PAD, 37 OIF_NUM_PADS 38 }; 39 40 #define S5C73M3_SENSOR_FW_LEN 6 41 #define S5C73M3_SENSOR_TYPE_LEN 12 42 43 #define S5C73M3_REG(_addrh, _addrl) (((_addrh) << 16) | _addrl) 44 45 #define AHB_MSB_ADDR_PTR 0xfcfc 46 #define REG_CMDWR_ADDRH 0x0050 47 #define REG_CMDWR_ADDRL 0x0054 48 #define REG_CMDRD_ADDRH 0x0058 49 #define REG_CMDRD_ADDRL 0x005c 50 #define REG_CMDBUF_ADDR 0x0f14 51 52 #define REG_I2C_SEQ_STATUS S5C73M3_REG(0x0009, 0x59A6) 53 #define SEQ_END_PLL (1<<0x0) 54 #define SEQ_END_SENSOR (1<<0x1) 55 #define SEQ_END_GPIO (1<<0x2) 56 #define SEQ_END_FROM (1<<0x3) 57 #define SEQ_END_STABLE_AE_AWB (1<<0x4) 58 #define SEQ_END_READY_I2C_CMD (1<<0x5) 59 60 #define REG_I2C_STATUS S5C73M3_REG(0x0009, 0x599E) 61 #define I2C_STATUS_CIS_I2C (1<<0x0) 62 #define I2C_STATUS_AF_INIT (1<<0x1) 63 #define I2C_STATUS_CAL_DATA (1<<0x2) 64 #define I2C_STATUS_FRAME_COUNT (1<<0x3) 65 #define I2C_STATUS_FROM_INIT (1<<0x4) 66 #define I2C_STATUS_I2C_CIS_STREAM_OFF (1<<0x5) 67 #define I2C_STATUS_I2C_N_CMD_OVER (1<<0x6) 68 #define I2C_STATUS_I2C_N_CMD_MISMATCH (1<<0x7) 69 #define I2C_STATUS_CHECK_BIN_CRC (1<<0x8) 70 #define I2C_STATUS_EXCEPTION (1<<0x9) 71 #define I2C_STATUS_INIF_INIT_STATE (0x8) 72 73 #define REG_STATUS S5C73M3_REG(0x0009, 0x5080) 74 #define REG_STATUS_BOOT_SUB_MAIN_ENTER 0xff01 75 #define REG_STATUS_BOOT_SRAM_TIMING_OK 0xff02 76 #define REG_STATUS_BOOT_INTERRUPTS_EN 0xff03 77 #define REG_STATUS_BOOT_R_PLL_DONE 0xff04 78 #define REG_STATUS_BOOT_R_PLL_LOCKTIME_DONE 0xff05 79 #define REG_STATUS_BOOT_DELAY_COUNT_DONE 0xff06 80 #define REG_STATUS_BOOT_I_PLL_DONE 0xff07 81 #define REG_STATUS_BOOT_I_PLL_LOCKTIME_DONE 0xff08 82 #define REG_STATUS_BOOT_PLL_INIT_OK 0xff09 83 #define REG_STATUS_BOOT_SENSOR_INIT_OK 0xff0a 84 #define REG_STATUS_BOOT_GPIO_SETTING_OK 0xff0b 85 #define REG_STATUS_BOOT_READ_CAL_DATA_OK 0xff0c 86 #define REG_STATUS_BOOT_STABLE_AE_AWB_OK 0xff0d 87 #define REG_STATUS_ISP_COMMAND_COMPLETED 0xffff 88 #define REG_STATUS_EXCEPTION_OCCURED 0xdead 89 90 #define COMM_RESULT_OFFSET S5C73M3_REG(0x0009, 0x5000) 91 92 #define COMM_IMG_OUTPUT 0x0902 93 #define COMM_IMG_OUTPUT_HDR 0x0008 94 #define COMM_IMG_OUTPUT_YUV 0x0009 95 #define COMM_IMG_OUTPUT_INTERLEAVED 0x000d 96 97 #define COMM_STILL_PRE_FLASH 0x0a00 98 #define COMM_STILL_PRE_FLASH_FIRE 0x0000 99 #define COMM_STILL_PRE_FLASH_NON_FIRED 0x0000 100 #define COMM_STILL_PRE_FLASH_FIRED 0x0001 101 102 #define COMM_STILL_MAIN_FLASH 0x0a02 103 #define COMM_STILL_MAIN_FLASH_CANCEL 0x0001 104 #define COMM_STILL_MAIN_FLASH_FIRE 0x0002 105 106 #define COMM_ZOOM_STEP 0x0b00 107 108 #define COMM_IMAGE_EFFECT 0x0b0a 109 #define COMM_IMAGE_EFFECT_NONE 0x0001 110 #define COMM_IMAGE_EFFECT_NEGATIVE 0x0002 111 #define COMM_IMAGE_EFFECT_AQUA 0x0003 112 #define COMM_IMAGE_EFFECT_SEPIA 0x0004 113 #define COMM_IMAGE_EFFECT_MONO 0x0005 114 115 #define COMM_IMAGE_QUALITY 0x0b0c 116 #define COMM_IMAGE_QUALITY_SUPERFINE 0x0000 117 #define COMM_IMAGE_QUALITY_FINE 0x0001 118 #define COMM_IMAGE_QUALITY_NORMAL 0x0002 119 120 #define COMM_FLASH_MODE 0x0b0e 121 #define COMM_FLASH_MODE_OFF 0x0000 122 #define COMM_FLASH_MODE_ON 0x0001 123 #define COMM_FLASH_MODE_AUTO 0x0002 124 125 #define COMM_FLASH_STATUS 0x0b80 126 #define COMM_FLASH_STATUS_OFF 0x0001 127 #define COMM_FLASH_STATUS_ON 0x0002 128 #define COMM_FLASH_STATUS_AUTO 0x0003 129 130 #define COMM_FLASH_TORCH 0x0b12 131 #define COMM_FLASH_TORCH_OFF 0x0000 132 #define COMM_FLASH_TORCH_ON 0x0001 133 134 #define COMM_AE_NEEDS_FLASH 0x0cba 135 #define COMM_AE_NEEDS_FLASH_OFF 0x0000 136 #define COMM_AE_NEEDS_FLASH_ON 0x0001 137 138 #define COMM_CHG_MODE 0x0b10 139 #define COMM_CHG_MODE_NEW 0x8000 140 #define COMM_CHG_MODE_SUBSAMPLING_HALF 0x2000 141 #define COMM_CHG_MODE_SUBSAMPLING_QUARTER 0x4000 142 143 #define COMM_CHG_MODE_YUV_320_240 0x0001 144 #define COMM_CHG_MODE_YUV_640_480 0x0002 145 #define COMM_CHG_MODE_YUV_880_720 0x0003 146 #define COMM_CHG_MODE_YUV_960_720 0x0004 147 #define COMM_CHG_MODE_YUV_1184_666 0x0005 148 #define COMM_CHG_MODE_YUV_1280_720 0x0006 149 #define COMM_CHG_MODE_YUV_1536_864 0x0007 150 #define COMM_CHG_MODE_YUV_1600_1200 0x0008 151 #define COMM_CHG_MODE_YUV_1632_1224 0x0009 152 #define COMM_CHG_MODE_YUV_1920_1080 0x000a 153 #define COMM_CHG_MODE_YUV_1920_1440 0x000b 154 #define COMM_CHG_MODE_YUV_2304_1296 0x000c 155 #define COMM_CHG_MODE_YUV_3264_2448 0x000d 156 #define COMM_CHG_MODE_YUV_352_288 0x000e 157 #define COMM_CHG_MODE_YUV_1008_672 0x000f 158 159 #define COMM_CHG_MODE_JPEG_640_480 0x0010 160 #define COMM_CHG_MODE_JPEG_800_450 0x0020 161 #define COMM_CHG_MODE_JPEG_800_600 0x0030 162 #define COMM_CHG_MODE_JPEG_1280_720 0x0040 163 #define COMM_CHG_MODE_JPEG_1280_960 0x0050 164 #define COMM_CHG_MODE_JPEG_1600_900 0x0060 165 #define COMM_CHG_MODE_JPEG_1600_1200 0x0070 166 #define COMM_CHG_MODE_JPEG_2048_1152 0x0080 167 #define COMM_CHG_MODE_JPEG_2048_1536 0x0090 168 #define COMM_CHG_MODE_JPEG_2560_1440 0x00a0 169 #define COMM_CHG_MODE_JPEG_2560_1920 0x00b0 170 #define COMM_CHG_MODE_JPEG_3264_2176 0x00c0 171 #define COMM_CHG_MODE_JPEG_1024_768 0x00d0 172 #define COMM_CHG_MODE_JPEG_3264_1836 0x00e0 173 #define COMM_CHG_MODE_JPEG_3264_2448 0x00f0 174 175 #define COMM_AF_CON 0x0e00 176 #define COMM_AF_CON_STOP 0x0000 177 #define COMM_AF_CON_SCAN 0x0001 /* Full Search */ 178 #define COMM_AF_CON_START 0x0002 /* Fast Search */ 179 180 #define COMM_AF_CAL 0x0e06 181 #define COMM_AF_TOUCH_AF 0x0e0a 182 183 #define REG_AF_STATUS S5C73M3_REG(0x0009, 0x5e80) 184 #define REG_CAF_STATUS_FIND_SEARCH_DIR 0x0001 185 #define REG_CAF_STATUS_FOCUSING 0x0002 186 #define REG_CAF_STATUS_FOCUSED 0x0003 187 #define REG_CAF_STATUS_UNFOCUSED 0x0004 188 #define REG_AF_STATUS_INVALID 0x0010 189 #define REG_AF_STATUS_FOCUSING 0x0020 190 #define REG_AF_STATUS_FOCUSED 0x0030 191 #define REG_AF_STATUS_UNFOCUSED 0x0040 192 193 #define REG_AF_TOUCH_POSITION S5C73M3_REG(0x0009, 0x5e8e) 194 #define COMM_AF_FACE_ZOOM 0x0e10 195 196 #define COMM_AF_MODE 0x0e02 197 #define COMM_AF_MODE_NORMAL 0x0000 198 #define COMM_AF_MODE_MACRO 0x0001 199 #define COMM_AF_MODE_MOVIE_CAF_START 0x0002 200 #define COMM_AF_MODE_MOVIE_CAF_STOP 0x0003 201 #define COMM_AF_MODE_PREVIEW_CAF_START 0x0004 202 #define COMM_AF_MODE_PREVIEW_CAF_STOP 0x0005 203 204 #define COMM_AF_SOFTLANDING 0x0e16 205 #define COMM_AF_SOFTLANDING_ON 0x0000 206 #define COMM_AF_SOFTLANDING_RES_COMPLETE 0x0001 207 208 #define COMM_FACE_DET 0x0e0c 209 #define COMM_FACE_DET_OFF 0x0000 210 #define COMM_FACE_DET_ON 0x0001 211 212 #define COMM_FACE_DET_OSD 0x0e0e 213 #define COMM_FACE_DET_OSD_OFF 0x0000 214 #define COMM_FACE_DET_OSD_ON 0x0001 215 216 #define COMM_AE_CON 0x0c00 217 #define COMM_AE_STOP 0x0000 /* lock */ 218 #define COMM_AE_START 0x0001 /* unlock */ 219 220 #define COMM_ISO 0x0c02 221 #define COMM_ISO_AUTO 0x0000 222 #define COMM_ISO_100 0x0001 223 #define COMM_ISO_200 0x0002 224 #define COMM_ISO_400 0x0003 225 #define COMM_ISO_800 0x0004 226 #define COMM_ISO_SPORTS 0x0005 227 #define COMM_ISO_NIGHT 0x0006 228 #define COMM_ISO_INDOOR 0x0007 229 230 /* 0x00000 (-2.0 EV)...0x0008 (2.0 EV), 0.5EV step */ 231 #define COMM_EV 0x0c04 232 233 #define COMM_METERING 0x0c06 234 #define COMM_METERING_CENTER 0x0000 235 #define COMM_METERING_SPOT 0x0001 236 #define COMM_METERING_AVERAGE 0x0002 237 #define COMM_METERING_SMART 0x0003 238 239 #define COMM_WDR 0x0c08 240 #define COMM_WDR_OFF 0x0000 241 #define COMM_WDR_ON 0x0001 242 243 #define COMM_FLICKER_MODE 0x0c12 244 #define COMM_FLICKER_NONE 0x0000 245 #define COMM_FLICKER_MANUAL_50HZ 0x0001 246 #define COMM_FLICKER_MANUAL_60HZ 0x0002 247 #define COMM_FLICKER_AUTO 0x0003 248 #define COMM_FLICKER_AUTO_50HZ 0x0004 249 #define COMM_FLICKER_AUTO_60HZ 0x0005 250 251 #define COMM_FRAME_RATE 0x0c1e 252 #define COMM_FRAME_RATE_AUTO_SET 0x0000 253 #define COMM_FRAME_RATE_FIXED_30FPS 0x0002 254 #define COMM_FRAME_RATE_FIXED_20FPS 0x0003 255 #define COMM_FRAME_RATE_FIXED_15FPS 0x0004 256 #define COMM_FRAME_RATE_FIXED_60FPS 0x0007 257 #define COMM_FRAME_RATE_FIXED_120FPS 0x0008 258 #define COMM_FRAME_RATE_FIXED_7FPS 0x0009 259 #define COMM_FRAME_RATE_FIXED_10FPS 0x000a 260 #define COMM_FRAME_RATE_FIXED_90FPS 0x000b 261 #define COMM_FRAME_RATE_ANTI_SHAKE 0x0013 262 263 /* 0x0000...0x0004 -> sharpness: 0, 1, 2, -1, -2 */ 264 #define COMM_SHARPNESS 0x0c14 265 266 /* 0x0000...0x0004 -> saturation: 0, 1, 2, -1, -2 */ 267 #define COMM_SATURATION 0x0c16 268 269 /* 0x0000...0x0004 -> contrast: 0, 1, 2, -1, -2 */ 270 #define COMM_CONTRAST 0x0c18 271 272 #define COMM_SCENE_MODE 0x0c1a 273 #define COMM_SCENE_MODE_NONE 0x0000 274 #define COMM_SCENE_MODE_PORTRAIT 0x0001 275 #define COMM_SCENE_MODE_LANDSCAPE 0x0002 276 #define COMM_SCENE_MODE_SPORTS 0x0003 277 #define COMM_SCENE_MODE_INDOOR 0x0004 278 #define COMM_SCENE_MODE_BEACH 0x0005 279 #define COMM_SCENE_MODE_SUNSET 0x0006 280 #define COMM_SCENE_MODE_DAWN 0x0007 281 #define COMM_SCENE_MODE_FALL 0x0008 282 #define COMM_SCENE_MODE_NIGHT 0x0009 283 #define COMM_SCENE_MODE_AGAINST_LIGHT 0x000a 284 #define COMM_SCENE_MODE_FIRE 0x000b 285 #define COMM_SCENE_MODE_TEXT 0x000c 286 #define COMM_SCENE_MODE_CANDLE 0x000d 287 288 #define COMM_AE_AUTO_BRACKET 0x0b14 289 #define COMM_AE_AUTO_BRAKET_EV05 0x0080 290 #define COMM_AE_AUTO_BRAKET_EV10 0x0100 291 #define COMM_AE_AUTO_BRAKET_EV15 0x0180 292 #define COMM_AE_AUTO_BRAKET_EV20 0x0200 293 294 #define COMM_SENSOR_STREAMING 0x090a 295 #define COMM_SENSOR_STREAMING_OFF 0x0000 296 #define COMM_SENSOR_STREAMING_ON 0x0001 297 298 #define COMM_AWB_MODE 0x0d02 299 #define COMM_AWB_MODE_INCANDESCENT 0x0000 300 #define COMM_AWB_MODE_FLUORESCENT1 0x0001 301 #define COMM_AWB_MODE_FLUORESCENT2 0x0002 302 #define COMM_AWB_MODE_DAYLIGHT 0x0003 303 #define COMM_AWB_MODE_CLOUDY 0x0004 304 #define COMM_AWB_MODE_AUTO 0x0005 305 306 #define COMM_AWB_CON 0x0d00 307 #define COMM_AWB_STOP 0x0000 /* lock */ 308 #define COMM_AWB_START 0x0001 /* unlock */ 309 310 #define COMM_FW_UPDATE 0x0906 311 #define COMM_FW_UPDATE_NOT_READY 0x0000 312 #define COMM_FW_UPDATE_SUCCESS 0x0005 313 #define COMM_FW_UPDATE_FAIL 0x0007 314 #define COMM_FW_UPDATE_BUSY 0xffff 315 316 317 #define S5C73M3_MAX_SUPPLIES 6 318 #define S5C73M3_DEFAULT_MCLK_FREQ 24000000U 319 320 struct s5c73m3_ctrls { 321 struct v4l2_ctrl_handler handler; 322 struct { 323 /* exposure/exposure bias cluster */ 324 struct v4l2_ctrl *auto_exposure; 325 struct v4l2_ctrl *exposure_bias; 326 struct v4l2_ctrl *exposure_metering; 327 }; 328 struct { 329 /* iso/auto iso cluster */ 330 struct v4l2_ctrl *auto_iso; 331 struct v4l2_ctrl *iso; 332 }; 333 struct v4l2_ctrl *auto_wb; 334 struct { 335 /* continuous auto focus/auto focus cluster */ 336 struct v4l2_ctrl *focus_auto; 337 struct v4l2_ctrl *af_start; 338 struct v4l2_ctrl *af_stop; 339 struct v4l2_ctrl *af_status; 340 struct v4l2_ctrl *af_distance; 341 }; 342 343 struct v4l2_ctrl *aaa_lock; 344 struct v4l2_ctrl *colorfx; 345 struct v4l2_ctrl *contrast; 346 struct v4l2_ctrl *saturation; 347 struct v4l2_ctrl *sharpness; 348 struct v4l2_ctrl *zoom; 349 struct v4l2_ctrl *wdr; 350 struct v4l2_ctrl *stabilization; 351 struct v4l2_ctrl *jpeg_quality; 352 struct v4l2_ctrl *scene_mode; 353 }; 354 355 enum s5c73m3_resolution_types { 356 RES_ISP, 357 RES_JPEG, 358 }; 359 360 struct s5c73m3_interval { 361 u16 fps_reg; 362 struct v4l2_fract interval; 363 /* Maximum rectangle for the interval */ 364 struct v4l2_frmsize_discrete size; 365 }; 366 367 struct s5c73m3 { 368 struct v4l2_subdev sensor_sd; 369 struct media_pad sensor_pads[S5C73M3_NUM_PADS]; 370 371 struct v4l2_subdev oif_sd; 372 struct media_pad oif_pads[OIF_NUM_PADS]; 373 374 struct spi_driver spidrv; 375 struct spi_device *spi_dev; 376 struct i2c_client *i2c_client; 377 u32 i2c_write_address; 378 u32 i2c_read_address; 379 380 struct regulator_bulk_data supplies[S5C73M3_MAX_SUPPLIES]; 381 struct gpio_desc *stby; 382 struct gpio_desc *reset; 383 384 struct clk *clock; 385 386 /* External master clock frequency */ 387 u32 mclk_frequency; 388 /* Video bus type - MIPI-CSI2/parallel */ 389 enum v4l2_mbus_type bus_type; 390 391 const struct s5c73m3_frame_size *sensor_pix_size[2]; 392 const struct s5c73m3_frame_size *oif_pix_size[2]; 393 u32 mbus_code; 394 395 const struct s5c73m3_interval *fiv; 396 397 struct v4l2_mbus_frame_desc frame_desc; 398 /* protects the struct members below */ 399 struct mutex lock; 400 401 struct s5c73m3_ctrls ctrls; 402 403 u8 streaming:1; 404 u8 apply_fmt:1; 405 u8 apply_fiv:1; 406 u8 isp_ready:1; 407 408 short power; 409 410 char sensor_fw[S5C73M3_SENSOR_FW_LEN + 2]; 411 char sensor_type[S5C73M3_SENSOR_TYPE_LEN + 2]; 412 char fw_file_version[2]; 413 unsigned int fw_size; 414 }; 415 416 struct s5c73m3_frame_size { 417 u32 width; 418 u32 height; 419 u8 reg_val; 420 }; 421 422 extern int s5c73m3_dbg; 423 424 int s5c73m3_register_spi_driver(struct s5c73m3 *state); 425 void s5c73m3_unregister_spi_driver(struct s5c73m3 *state); 426 int s5c73m3_spi_write(struct s5c73m3 *state, const void *addr, 427 const unsigned int len, const unsigned int tx_size); 428 int s5c73m3_spi_read(struct s5c73m3 *state, void *addr, 429 const unsigned int len, const unsigned int tx_size); 430 431 int s5c73m3_read(struct s5c73m3 *state, u32 addr, u16 *data); 432 int s5c73m3_write(struct s5c73m3 *state, u32 addr, u16 data); 433 int s5c73m3_isp_command(struct s5c73m3 *state, u16 command, u16 data); 434 int s5c73m3_init_controls(struct s5c73m3 *state); 435 436 static inline struct v4l2_subdev *ctrl_to_sensor_sd(struct v4l2_ctrl *ctrl) 437 { 438 return &container_of(ctrl->handler, struct s5c73m3, 439 ctrls.handler)->sensor_sd; 440 } 441 442 static inline struct s5c73m3 *sensor_sd_to_s5c73m3(struct v4l2_subdev *sd) 443 { 444 return container_of(sd, struct s5c73m3, sensor_sd); 445 } 446 447 static inline struct s5c73m3 *oif_sd_to_s5c73m3(struct v4l2_subdev *sd) 448 { 449 return container_of(sd, struct s5c73m3, oif_sd); 450 } 451 #endif /* S5C73M3_H_ */ 452