1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Samsung LSI S5C73M3 8M pixel camera driver
4  *
5  * Copyright (C) 2012, Samsung Electronics, Co., Ltd.
6  * Sylwester Nawrocki <s.nawrocki@samsung.com>
7  * Andrzej Hajda <a.hajda@samsung.com>
8  */
9 #ifndef S5C73M3_H_
10 #define S5C73M3_H_
11 
12 #include <linux/clk.h>
13 #include <linux/kernel.h>
14 #include <linux/regulator/consumer.h>
15 #include <media/v4l2-common.h>
16 #include <media/v4l2-ctrls.h>
17 #include <media/v4l2-subdev.h>
18 #include <media/i2c/s5c73m3.h>
19 
20 #define DRIVER_NAME			"S5C73M3"
21 
22 #define S5C73M3_ISP_FMT			MEDIA_BUS_FMT_VYUY8_2X8
23 #define S5C73M3_JPEG_FMT		MEDIA_BUS_FMT_S5C_UYVY_JPEG_1X8
24 
25 /* Subdevs pad index definitions */
26 enum s5c73m3_pads {
27 	S5C73M3_ISP_PAD,
28 	S5C73M3_JPEG_PAD,
29 	S5C73M3_NUM_PADS
30 };
31 
32 enum s5c73m3_oif_pads {
33 	OIF_ISP_PAD,
34 	OIF_JPEG_PAD,
35 	OIF_SOURCE_PAD,
36 	OIF_NUM_PADS
37 };
38 
39 #define S5C73M3_SENSOR_FW_LEN		6
40 #define S5C73M3_SENSOR_TYPE_LEN		12
41 
42 #define S5C73M3_REG(_addrh, _addrl) (((_addrh) << 16) | _addrl)
43 
44 #define AHB_MSB_ADDR_PTR			0xfcfc
45 #define REG_CMDWR_ADDRH				0x0050
46 #define REG_CMDWR_ADDRL				0x0054
47 #define REG_CMDRD_ADDRH				0x0058
48 #define REG_CMDRD_ADDRL				0x005c
49 #define REG_CMDBUF_ADDR				0x0f14
50 
51 #define REG_I2C_SEQ_STATUS			S5C73M3_REG(0x0009, 0x59A6)
52 #define  SEQ_END_PLL				(1<<0x0)
53 #define  SEQ_END_SENSOR				(1<<0x1)
54 #define  SEQ_END_GPIO				(1<<0x2)
55 #define  SEQ_END_FROM				(1<<0x3)
56 #define  SEQ_END_STABLE_AE_AWB			(1<<0x4)
57 #define  SEQ_END_READY_I2C_CMD			(1<<0x5)
58 
59 #define REG_I2C_STATUS				S5C73M3_REG(0x0009, 0x599E)
60 #define  I2C_STATUS_CIS_I2C			(1<<0x0)
61 #define  I2C_STATUS_AF_INIT			(1<<0x1)
62 #define  I2C_STATUS_CAL_DATA			(1<<0x2)
63 #define  I2C_STATUS_FRAME_COUNT			(1<<0x3)
64 #define  I2C_STATUS_FROM_INIT			(1<<0x4)
65 #define  I2C_STATUS_I2C_CIS_STREAM_OFF		(1<<0x5)
66 #define  I2C_STATUS_I2C_N_CMD_OVER		(1<<0x6)
67 #define  I2C_STATUS_I2C_N_CMD_MISMATCH		(1<<0x7)
68 #define  I2C_STATUS_CHECK_BIN_CRC		(1<<0x8)
69 #define  I2C_STATUS_EXCEPTION			(1<<0x9)
70 #define  I2C_STATUS_INIF_INIT_STATE		(0x8)
71 
72 #define REG_STATUS				S5C73M3_REG(0x0009, 0x5080)
73 #define  REG_STATUS_BOOT_SUB_MAIN_ENTER		0xff01
74 #define  REG_STATUS_BOOT_SRAM_TIMING_OK		0xff02
75 #define  REG_STATUS_BOOT_INTERRUPTS_EN		0xff03
76 #define  REG_STATUS_BOOT_R_PLL_DONE		0xff04
77 #define  REG_STATUS_BOOT_R_PLL_LOCKTIME_DONE	0xff05
78 #define  REG_STATUS_BOOT_DELAY_COUNT_DONE	0xff06
79 #define  REG_STATUS_BOOT_I_PLL_DONE		0xff07
80 #define  REG_STATUS_BOOT_I_PLL_LOCKTIME_DONE	0xff08
81 #define  REG_STATUS_BOOT_PLL_INIT_OK		0xff09
82 #define  REG_STATUS_BOOT_SENSOR_INIT_OK		0xff0a
83 #define  REG_STATUS_BOOT_GPIO_SETTING_OK	0xff0b
84 #define  REG_STATUS_BOOT_READ_CAL_DATA_OK	0xff0c
85 #define  REG_STATUS_BOOT_STABLE_AE_AWB_OK	0xff0d
86 #define  REG_STATUS_ISP_COMMAND_COMPLETED	0xffff
87 #define  REG_STATUS_EXCEPTION_OCCURED		0xdead
88 
89 #define COMM_RESULT_OFFSET			S5C73M3_REG(0x0009, 0x5000)
90 
91 #define COMM_IMG_OUTPUT				0x0902
92 #define  COMM_IMG_OUTPUT_HDR			0x0008
93 #define  COMM_IMG_OUTPUT_YUV			0x0009
94 #define  COMM_IMG_OUTPUT_INTERLEAVED		0x000d
95 
96 #define COMM_STILL_PRE_FLASH			0x0a00
97 #define  COMM_STILL_PRE_FLASH_FIRE		0x0000
98 #define  COMM_STILL_PRE_FLASH_NON_FIRED		0x0000
99 #define  COMM_STILL_PRE_FLASH_FIRED		0x0001
100 
101 #define COMM_STILL_MAIN_FLASH			0x0a02
102 #define  COMM_STILL_MAIN_FLASH_CANCEL		0x0001
103 #define  COMM_STILL_MAIN_FLASH_FIRE		0x0002
104 
105 #define COMM_ZOOM_STEP				0x0b00
106 
107 #define COMM_IMAGE_EFFECT			0x0b0a
108 #define  COMM_IMAGE_EFFECT_NONE			0x0001
109 #define  COMM_IMAGE_EFFECT_NEGATIVE		0x0002
110 #define  COMM_IMAGE_EFFECT_AQUA			0x0003
111 #define  COMM_IMAGE_EFFECT_SEPIA		0x0004
112 #define  COMM_IMAGE_EFFECT_MONO			0x0005
113 
114 #define COMM_IMAGE_QUALITY			0x0b0c
115 #define  COMM_IMAGE_QUALITY_SUPERFINE		0x0000
116 #define  COMM_IMAGE_QUALITY_FINE		0x0001
117 #define  COMM_IMAGE_QUALITY_NORMAL		0x0002
118 
119 #define COMM_FLASH_MODE				0x0b0e
120 #define  COMM_FLASH_MODE_OFF			0x0000
121 #define  COMM_FLASH_MODE_ON			0x0001
122 #define  COMM_FLASH_MODE_AUTO			0x0002
123 
124 #define COMM_FLASH_STATUS			0x0b80
125 #define  COMM_FLASH_STATUS_OFF			0x0001
126 #define  COMM_FLASH_STATUS_ON			0x0002
127 #define  COMM_FLASH_STATUS_AUTO			0x0003
128 
129 #define COMM_FLASH_TORCH			0x0b12
130 #define  COMM_FLASH_TORCH_OFF			0x0000
131 #define  COMM_FLASH_TORCH_ON			0x0001
132 
133 #define COMM_AE_NEEDS_FLASH			0x0cba
134 #define  COMM_AE_NEEDS_FLASH_OFF		0x0000
135 #define  COMM_AE_NEEDS_FLASH_ON			0x0001
136 
137 #define COMM_CHG_MODE				0x0b10
138 #define  COMM_CHG_MODE_NEW			0x8000
139 #define  COMM_CHG_MODE_SUBSAMPLING_HALF		0x2000
140 #define  COMM_CHG_MODE_SUBSAMPLING_QUARTER	0x4000
141 
142 #define  COMM_CHG_MODE_YUV_320_240		0x0001
143 #define  COMM_CHG_MODE_YUV_640_480		0x0002
144 #define  COMM_CHG_MODE_YUV_880_720		0x0003
145 #define  COMM_CHG_MODE_YUV_960_720		0x0004
146 #define  COMM_CHG_MODE_YUV_1184_666		0x0005
147 #define  COMM_CHG_MODE_YUV_1280_720		0x0006
148 #define  COMM_CHG_MODE_YUV_1536_864		0x0007
149 #define  COMM_CHG_MODE_YUV_1600_1200		0x0008
150 #define  COMM_CHG_MODE_YUV_1632_1224		0x0009
151 #define  COMM_CHG_MODE_YUV_1920_1080		0x000a
152 #define  COMM_CHG_MODE_YUV_1920_1440		0x000b
153 #define  COMM_CHG_MODE_YUV_2304_1296		0x000c
154 #define  COMM_CHG_MODE_YUV_3264_2448		0x000d
155 #define  COMM_CHG_MODE_YUV_352_288		0x000e
156 #define  COMM_CHG_MODE_YUV_1008_672		0x000f
157 
158 #define  COMM_CHG_MODE_JPEG_640_480		0x0010
159 #define  COMM_CHG_MODE_JPEG_800_450		0x0020
160 #define  COMM_CHG_MODE_JPEG_800_600		0x0030
161 #define  COMM_CHG_MODE_JPEG_1280_720		0x0040
162 #define  COMM_CHG_MODE_JPEG_1280_960		0x0050
163 #define  COMM_CHG_MODE_JPEG_1600_900		0x0060
164 #define  COMM_CHG_MODE_JPEG_1600_1200		0x0070
165 #define  COMM_CHG_MODE_JPEG_2048_1152		0x0080
166 #define  COMM_CHG_MODE_JPEG_2048_1536		0x0090
167 #define  COMM_CHG_MODE_JPEG_2560_1440		0x00a0
168 #define  COMM_CHG_MODE_JPEG_2560_1920		0x00b0
169 #define  COMM_CHG_MODE_JPEG_3264_2176		0x00c0
170 #define  COMM_CHG_MODE_JPEG_1024_768		0x00d0
171 #define  COMM_CHG_MODE_JPEG_3264_1836		0x00e0
172 #define  COMM_CHG_MODE_JPEG_3264_2448		0x00f0
173 
174 #define COMM_AF_CON				0x0e00
175 #define  COMM_AF_CON_STOP			0x0000
176 #define  COMM_AF_CON_SCAN			0x0001 /* Full Search */
177 #define  COMM_AF_CON_START			0x0002 /* Fast Search */
178 
179 #define COMM_AF_CAL				0x0e06
180 #define COMM_AF_TOUCH_AF			0x0e0a
181 
182 #define REG_AF_STATUS				S5C73M3_REG(0x0009, 0x5e80)
183 #define  REG_CAF_STATUS_FIND_SEARCH_DIR		0x0001
184 #define  REG_CAF_STATUS_FOCUSING		0x0002
185 #define  REG_CAF_STATUS_FOCUSED			0x0003
186 #define  REG_CAF_STATUS_UNFOCUSED		0x0004
187 #define  REG_AF_STATUS_INVALID			0x0010
188 #define  REG_AF_STATUS_FOCUSING			0x0020
189 #define  REG_AF_STATUS_FOCUSED			0x0030
190 #define  REG_AF_STATUS_UNFOCUSED		0x0040
191 
192 #define REG_AF_TOUCH_POSITION			S5C73M3_REG(0x0009, 0x5e8e)
193 #define COMM_AF_FACE_ZOOM			0x0e10
194 
195 #define COMM_AF_MODE				0x0e02
196 #define  COMM_AF_MODE_NORMAL			0x0000
197 #define  COMM_AF_MODE_MACRO			0x0001
198 #define  COMM_AF_MODE_MOVIE_CAF_START		0x0002
199 #define  COMM_AF_MODE_MOVIE_CAF_STOP		0x0003
200 #define  COMM_AF_MODE_PREVIEW_CAF_START		0x0004
201 #define  COMM_AF_MODE_PREVIEW_CAF_STOP		0x0005
202 
203 #define COMM_AF_SOFTLANDING			0x0e16
204 #define  COMM_AF_SOFTLANDING_ON			0x0000
205 #define  COMM_AF_SOFTLANDING_RES_COMPLETE	0x0001
206 
207 #define COMM_FACE_DET				0x0e0c
208 #define  COMM_FACE_DET_OFF			0x0000
209 #define  COMM_FACE_DET_ON			0x0001
210 
211 #define COMM_FACE_DET_OSD			0x0e0e
212 #define  COMM_FACE_DET_OSD_OFF			0x0000
213 #define  COMM_FACE_DET_OSD_ON			0x0001
214 
215 #define COMM_AE_CON				0x0c00
216 #define  COMM_AE_STOP				0x0000 /* lock */
217 #define  COMM_AE_START				0x0001 /* unlock */
218 
219 #define COMM_ISO				0x0c02
220 #define  COMM_ISO_AUTO				0x0000
221 #define  COMM_ISO_100				0x0001
222 #define  COMM_ISO_200				0x0002
223 #define  COMM_ISO_400				0x0003
224 #define  COMM_ISO_800				0x0004
225 #define  COMM_ISO_SPORTS			0x0005
226 #define  COMM_ISO_NIGHT				0x0006
227 #define  COMM_ISO_INDOOR			0x0007
228 
229 /* 0x00000 (-2.0 EV)...0x0008 (2.0 EV), 0.5EV step */
230 #define COMM_EV					0x0c04
231 
232 #define COMM_METERING				0x0c06
233 #define  COMM_METERING_CENTER			0x0000
234 #define  COMM_METERING_SPOT			0x0001
235 #define  COMM_METERING_AVERAGE			0x0002
236 #define  COMM_METERING_SMART			0x0003
237 
238 #define COMM_WDR				0x0c08
239 #define  COMM_WDR_OFF				0x0000
240 #define  COMM_WDR_ON				0x0001
241 
242 #define COMM_FLICKER_MODE			0x0c12
243 #define  COMM_FLICKER_NONE			0x0000
244 #define  COMM_FLICKER_MANUAL_50HZ		0x0001
245 #define  COMM_FLICKER_MANUAL_60HZ		0x0002
246 #define  COMM_FLICKER_AUTO			0x0003
247 #define  COMM_FLICKER_AUTO_50HZ			0x0004
248 #define  COMM_FLICKER_AUTO_60HZ			0x0005
249 
250 #define COMM_FRAME_RATE				0x0c1e
251 #define  COMM_FRAME_RATE_AUTO_SET		0x0000
252 #define  COMM_FRAME_RATE_FIXED_30FPS		0x0002
253 #define  COMM_FRAME_RATE_FIXED_20FPS		0x0003
254 #define  COMM_FRAME_RATE_FIXED_15FPS		0x0004
255 #define  COMM_FRAME_RATE_FIXED_60FPS		0x0007
256 #define  COMM_FRAME_RATE_FIXED_120FPS		0x0008
257 #define  COMM_FRAME_RATE_FIXED_7FPS		0x0009
258 #define  COMM_FRAME_RATE_FIXED_10FPS		0x000a
259 #define  COMM_FRAME_RATE_FIXED_90FPS		0x000b
260 #define  COMM_FRAME_RATE_ANTI_SHAKE		0x0013
261 
262 /* 0x0000...0x0004 -> sharpness: 0, 1, 2, -1, -2 */
263 #define COMM_SHARPNESS				0x0c14
264 
265 /* 0x0000...0x0004 -> saturation: 0, 1, 2, -1, -2 */
266 #define COMM_SATURATION				0x0c16
267 
268 /* 0x0000...0x0004 -> contrast: 0, 1, 2, -1, -2 */
269 #define COMM_CONTRAST				0x0c18
270 
271 #define COMM_SCENE_MODE				0x0c1a
272 #define  COMM_SCENE_MODE_NONE			0x0000
273 #define  COMM_SCENE_MODE_PORTRAIT		0x0001
274 #define  COMM_SCENE_MODE_LANDSCAPE		0x0002
275 #define  COMM_SCENE_MODE_SPORTS			0x0003
276 #define  COMM_SCENE_MODE_INDOOR			0x0004
277 #define  COMM_SCENE_MODE_BEACH			0x0005
278 #define  COMM_SCENE_MODE_SUNSET			0x0006
279 #define  COMM_SCENE_MODE_DAWN			0x0007
280 #define  COMM_SCENE_MODE_FALL			0x0008
281 #define  COMM_SCENE_MODE_NIGHT			0x0009
282 #define  COMM_SCENE_MODE_AGAINST_LIGHT		0x000a
283 #define  COMM_SCENE_MODE_FIRE			0x000b
284 #define  COMM_SCENE_MODE_TEXT			0x000c
285 #define  COMM_SCENE_MODE_CANDLE			0x000d
286 
287 #define COMM_AE_AUTO_BRACKET			0x0b14
288 #define  COMM_AE_AUTO_BRAKET_EV05		0x0080
289 #define  COMM_AE_AUTO_BRAKET_EV10		0x0100
290 #define  COMM_AE_AUTO_BRAKET_EV15		0x0180
291 #define  COMM_AE_AUTO_BRAKET_EV20		0x0200
292 
293 #define COMM_SENSOR_STREAMING			0x090a
294 #define  COMM_SENSOR_STREAMING_OFF		0x0000
295 #define  COMM_SENSOR_STREAMING_ON		0x0001
296 
297 #define COMM_AWB_MODE				0x0d02
298 #define  COMM_AWB_MODE_INCANDESCENT		0x0000
299 #define  COMM_AWB_MODE_FLUORESCENT1		0x0001
300 #define  COMM_AWB_MODE_FLUORESCENT2		0x0002
301 #define  COMM_AWB_MODE_DAYLIGHT			0x0003
302 #define  COMM_AWB_MODE_CLOUDY			0x0004
303 #define  COMM_AWB_MODE_AUTO			0x0005
304 
305 #define COMM_AWB_CON				0x0d00
306 #define  COMM_AWB_STOP				0x0000 /* lock */
307 #define  COMM_AWB_START				0x0001 /* unlock */
308 
309 #define COMM_FW_UPDATE				0x0906
310 #define  COMM_FW_UPDATE_NOT_READY		0x0000
311 #define  COMM_FW_UPDATE_SUCCESS			0x0005
312 #define  COMM_FW_UPDATE_FAIL			0x0007
313 #define  COMM_FW_UPDATE_BUSY			0xffff
314 
315 
316 #define S5C73M3_MAX_SUPPLIES			6
317 #define S5C73M3_DEFAULT_MCLK_FREQ		24000000U
318 
319 struct s5c73m3_ctrls {
320 	struct v4l2_ctrl_handler handler;
321 	struct {
322 		/* exposure/exposure bias cluster */
323 		struct v4l2_ctrl *auto_exposure;
324 		struct v4l2_ctrl *exposure_bias;
325 		struct v4l2_ctrl *exposure_metering;
326 	};
327 	struct {
328 		/* iso/auto iso cluster */
329 		struct v4l2_ctrl *auto_iso;
330 		struct v4l2_ctrl *iso;
331 	};
332 	struct v4l2_ctrl *auto_wb;
333 	struct {
334 		/* continuous auto focus/auto focus cluster */
335 		struct v4l2_ctrl *focus_auto;
336 		struct v4l2_ctrl *af_start;
337 		struct v4l2_ctrl *af_stop;
338 		struct v4l2_ctrl *af_status;
339 		struct v4l2_ctrl *af_distance;
340 	};
341 
342 	struct v4l2_ctrl *aaa_lock;
343 	struct v4l2_ctrl *colorfx;
344 	struct v4l2_ctrl *contrast;
345 	struct v4l2_ctrl *saturation;
346 	struct v4l2_ctrl *sharpness;
347 	struct v4l2_ctrl *zoom;
348 	struct v4l2_ctrl *wdr;
349 	struct v4l2_ctrl *stabilization;
350 	struct v4l2_ctrl *jpeg_quality;
351 	struct v4l2_ctrl *scene_mode;
352 };
353 
354 enum s5c73m3_gpio_id {
355 	STBY,
356 	RSET,
357 	GPIO_NUM,
358 };
359 
360 enum s5c73m3_resolution_types {
361 	RES_ISP,
362 	RES_JPEG,
363 };
364 
365 struct s5c73m3_interval {
366 	u16 fps_reg;
367 	struct v4l2_fract interval;
368 	/* Maximum rectangle for the interval */
369 	struct v4l2_frmsize_discrete size;
370 };
371 
372 struct s5c73m3 {
373 	struct v4l2_subdev sensor_sd;
374 	struct media_pad sensor_pads[S5C73M3_NUM_PADS];
375 
376 	struct v4l2_subdev oif_sd;
377 	struct media_pad oif_pads[OIF_NUM_PADS];
378 
379 	struct spi_driver spidrv;
380 	struct spi_device *spi_dev;
381 	struct i2c_client *i2c_client;
382 	u32 i2c_write_address;
383 	u32 i2c_read_address;
384 
385 	struct regulator_bulk_data supplies[S5C73M3_MAX_SUPPLIES];
386 	struct s5c73m3_gpio gpio[GPIO_NUM];
387 
388 	struct clk *clock;
389 
390 	/* External master clock frequency */
391 	u32 mclk_frequency;
392 	/* Video bus type - MIPI-CSI2/parallel */
393 	enum v4l2_mbus_type bus_type;
394 
395 	const struct s5c73m3_frame_size *sensor_pix_size[2];
396 	const struct s5c73m3_frame_size *oif_pix_size[2];
397 	u32 mbus_code;
398 
399 	const struct s5c73m3_interval *fiv;
400 
401 	struct v4l2_mbus_frame_desc frame_desc;
402 	/* protects the struct members below */
403 	struct mutex lock;
404 
405 	struct s5c73m3_ctrls ctrls;
406 
407 	u8 streaming:1;
408 	u8 apply_fmt:1;
409 	u8 apply_fiv:1;
410 	u8 isp_ready:1;
411 
412 	short power;
413 
414 	char sensor_fw[S5C73M3_SENSOR_FW_LEN + 2];
415 	char sensor_type[S5C73M3_SENSOR_TYPE_LEN + 2];
416 	char fw_file_version[2];
417 	unsigned int fw_size;
418 };
419 
420 struct s5c73m3_frame_size {
421 	u32 width;
422 	u32 height;
423 	u8 reg_val;
424 };
425 
426 extern int s5c73m3_dbg;
427 
428 int s5c73m3_register_spi_driver(struct s5c73m3 *state);
429 void s5c73m3_unregister_spi_driver(struct s5c73m3 *state);
430 int s5c73m3_spi_write(struct s5c73m3 *state, const void *addr,
431 		      const unsigned int len, const unsigned int tx_size);
432 int s5c73m3_spi_read(struct s5c73m3 *state, void *addr,
433 		      const unsigned int len, const unsigned int tx_size);
434 
435 int s5c73m3_read(struct s5c73m3 *state, u32 addr, u16 *data);
436 int s5c73m3_write(struct s5c73m3 *state, u32 addr, u16 data);
437 int s5c73m3_isp_command(struct s5c73m3 *state, u16 command, u16 data);
438 int s5c73m3_init_controls(struct s5c73m3 *state);
439 
440 static inline struct v4l2_subdev *ctrl_to_sensor_sd(struct v4l2_ctrl *ctrl)
441 {
442 	return &container_of(ctrl->handler, struct s5c73m3,
443 			     ctrls.handler)->sensor_sd;
444 }
445 
446 static inline struct s5c73m3 *sensor_sd_to_s5c73m3(struct v4l2_subdev *sd)
447 {
448 	return container_of(sd, struct s5c73m3, sensor_sd);
449 }
450 
451 static inline struct s5c73m3 *oif_sd_to_s5c73m3(struct v4l2_subdev *sd)
452 {
453 	return container_of(sd, struct s5c73m3, oif_sd);
454 }
455 #endif	/* S5C73M3_H_ */
456