1a59f853bSJacopo Mondi // SPDX-License-Identifier: GPL-2.0+ 2a59f853bSJacopo Mondi /* 3a59f853bSJacopo Mondi * IMI RDACM21 GMSL Camera Driver 4a59f853bSJacopo Mondi * 5a59f853bSJacopo Mondi * Copyright (C) 2017-2020 Jacopo Mondi 6a59f853bSJacopo Mondi * Copyright (C) 2017-2019 Kieran Bingham 7a59f853bSJacopo Mondi * Copyright (C) 2017-2019 Laurent Pinchart 8a59f853bSJacopo Mondi * Copyright (C) 2017-2019 Niklas Söderlund 9a59f853bSJacopo Mondi * Copyright (C) 2016 Renesas Electronics Corporation 10a59f853bSJacopo Mondi * Copyright (C) 2015 Cogent Embedded, Inc. 11a59f853bSJacopo Mondi */ 12a59f853bSJacopo Mondi 13a59f853bSJacopo Mondi #include <linux/delay.h> 14a59f853bSJacopo Mondi #include <linux/fwnode.h> 15a59f853bSJacopo Mondi #include <linux/init.h> 16a59f853bSJacopo Mondi #include <linux/i2c.h> 17a59f853bSJacopo Mondi #include <linux/module.h> 18a59f853bSJacopo Mondi #include <linux/slab.h> 19a59f853bSJacopo Mondi #include <linux/videodev2.h> 20a59f853bSJacopo Mondi 21a59f853bSJacopo Mondi #include <media/v4l2-async.h> 22a59f853bSJacopo Mondi #include <media/v4l2-ctrls.h> 23a59f853bSJacopo Mondi #include <media/v4l2-subdev.h> 24a59f853bSJacopo Mondi #include "max9271.h" 25a59f853bSJacopo Mondi 26a59f853bSJacopo Mondi #define MAX9271_RESET_CYCLES 10 27a59f853bSJacopo Mondi 28a59f853bSJacopo Mondi #define OV490_I2C_ADDRESS 0x24 29a59f853bSJacopo Mondi 30a59f853bSJacopo Mondi #define OV490_PAGE_HIGH_REG 0xfffd 31a59f853bSJacopo Mondi #define OV490_PAGE_LOW_REG 0xfffe 32a59f853bSJacopo Mondi 33a59f853bSJacopo Mondi /* 34a59f853bSJacopo Mondi * The SCCB slave handling is undocumented; the registers naming scheme is 35a59f853bSJacopo Mondi * totally arbitrary. 36a59f853bSJacopo Mondi */ 37a59f853bSJacopo Mondi #define OV490_SCCB_SLAVE_WRITE 0x00 38a59f853bSJacopo Mondi #define OV490_SCCB_SLAVE_READ 0x01 39a59f853bSJacopo Mondi #define OV490_SCCB_SLAVE0_DIR 0x80195000 40a59f853bSJacopo Mondi #define OV490_SCCB_SLAVE0_ADDR_HIGH 0x80195001 41a59f853bSJacopo Mondi #define OV490_SCCB_SLAVE0_ADDR_LOW 0x80195002 42a59f853bSJacopo Mondi 43a59f853bSJacopo Mondi #define OV490_DVP_CTRL3 0x80286009 44a59f853bSJacopo Mondi 45a59f853bSJacopo Mondi #define OV490_ODS_CTRL_FRAME_OUTPUT_EN 0x0c 46a59f853bSJacopo Mondi #define OV490_ODS_CTRL 0x8029d000 47a59f853bSJacopo Mondi 48a59f853bSJacopo Mondi #define OV490_HOST_CMD 0x808000c0 49a59f853bSJacopo Mondi #define OV490_HOST_CMD_TRIGGER 0xc1 50a59f853bSJacopo Mondi 51a59f853bSJacopo Mondi #define OV490_ID_VAL 0x0490 52a59f853bSJacopo Mondi #define OV490_ID(_p, _v) ((((_p) & 0xff) << 8) | ((_v) & 0xff)) 53a59f853bSJacopo Mondi #define OV490_PID 0x8080300a 54a59f853bSJacopo Mondi #define OV490_VER 0x8080300b 55a59f853bSJacopo Mondi #define OV490_PID_TIMEOUT 20 56a59f853bSJacopo Mondi #define OV490_OUTPUT_EN_TIMEOUT 300 57a59f853bSJacopo Mondi 58a59f853bSJacopo Mondi #define OV490_GPIO0 BIT(0) 59a59f853bSJacopo Mondi #define OV490_SPWDN0 BIT(0) 60a59f853bSJacopo Mondi #define OV490_GPIO_SEL0 0x80800050 61a59f853bSJacopo Mondi #define OV490_GPIO_SEL1 0x80800051 62a59f853bSJacopo Mondi #define OV490_GPIO_DIRECTION0 0x80800054 63a59f853bSJacopo Mondi #define OV490_GPIO_DIRECTION1 0x80800055 64a59f853bSJacopo Mondi #define OV490_GPIO_OUTPUT_VALUE0 0x80800058 65a59f853bSJacopo Mondi #define OV490_GPIO_OUTPUT_VALUE1 0x80800059 66a59f853bSJacopo Mondi 67a59f853bSJacopo Mondi #define OV490_ISP_HSIZE_LOW 0x80820060 68a59f853bSJacopo Mondi #define OV490_ISP_HSIZE_HIGH 0x80820061 69a59f853bSJacopo Mondi #define OV490_ISP_VSIZE_LOW 0x80820062 70a59f853bSJacopo Mondi #define OV490_ISP_VSIZE_HIGH 0x80820063 71a59f853bSJacopo Mondi 72a59f853bSJacopo Mondi #define OV10640_ID_HIGH 0xa6 73a59f853bSJacopo Mondi #define OV10640_CHIP_ID 0x300a 74a59f853bSJacopo Mondi #define OV10640_PIXEL_RATE 55000000 75a59f853bSJacopo Mondi 76a59f853bSJacopo Mondi struct rdacm21_device { 77a59f853bSJacopo Mondi struct device *dev; 78a59f853bSJacopo Mondi struct max9271_device serializer; 79a59f853bSJacopo Mondi struct i2c_client *isp; 80a59f853bSJacopo Mondi struct v4l2_subdev sd; 81a59f853bSJacopo Mondi struct media_pad pad; 82a59f853bSJacopo Mondi struct v4l2_mbus_framefmt fmt; 83a59f853bSJacopo Mondi struct v4l2_ctrl_handler ctrls; 84a59f853bSJacopo Mondi u32 addrs[2]; 85a59f853bSJacopo Mondi u16 last_page; 86a59f853bSJacopo Mondi }; 87a59f853bSJacopo Mondi 88a59f853bSJacopo Mondi static inline struct rdacm21_device *sd_to_rdacm21(struct v4l2_subdev *sd) 89a59f853bSJacopo Mondi { 90a59f853bSJacopo Mondi return container_of(sd, struct rdacm21_device, sd); 91a59f853bSJacopo Mondi } 92a59f853bSJacopo Mondi 93a59f853bSJacopo Mondi static const struct ov490_reg { 94a59f853bSJacopo Mondi u16 reg; 95a59f853bSJacopo Mondi u8 val; 96a59f853bSJacopo Mondi } ov490_regs_wizard[] = { 97a59f853bSJacopo Mondi {0xfffd, 0x80}, 98a59f853bSJacopo Mondi {0xfffe, 0x82}, 99a59f853bSJacopo Mondi {0x0071, 0x11}, 100a59f853bSJacopo Mondi {0x0075, 0x11}, 101a59f853bSJacopo Mondi {0xfffe, 0x29}, 102a59f853bSJacopo Mondi {0x6010, 0x01}, 103a59f853bSJacopo Mondi /* 104a59f853bSJacopo Mondi * OV490 EMB line disable in YUV and RAW data, 105a59f853bSJacopo Mondi * NOTE: EMB line is still used in ISP and sensor 106a59f853bSJacopo Mondi */ 107a59f853bSJacopo Mondi {0xe000, 0x14}, 108a59f853bSJacopo Mondi {0xfffe, 0x28}, 109a59f853bSJacopo Mondi {0x6000, 0x04}, 110a59f853bSJacopo Mondi {0x6004, 0x00}, 111a59f853bSJacopo Mondi /* 112a59f853bSJacopo Mondi * PCLK polarity - useless due to silicon bug. 113a59f853bSJacopo Mondi * Use 0x808000bb register instead. 114a59f853bSJacopo Mondi */ 115a59f853bSJacopo Mondi {0x6008, 0x00}, 116a59f853bSJacopo Mondi {0xfffe, 0x80}, 117a59f853bSJacopo Mondi {0x0091, 0x00}, 118a59f853bSJacopo Mondi /* bit[3]=0 - PCLK polarity workaround. */ 119a59f853bSJacopo Mondi {0x00bb, 0x1d}, 120a59f853bSJacopo Mondi /* Ov490 FSIN: app_fsin_from_fsync */ 121a59f853bSJacopo Mondi {0xfffe, 0x85}, 122a59f853bSJacopo Mondi {0x0008, 0x00}, 123a59f853bSJacopo Mondi {0x0009, 0x01}, 124a59f853bSJacopo Mondi /* FSIN0 source. */ 125a59f853bSJacopo Mondi {0x000A, 0x05}, 126a59f853bSJacopo Mondi {0x000B, 0x00}, 127a59f853bSJacopo Mondi /* FSIN0 delay. */ 128a59f853bSJacopo Mondi {0x0030, 0x02}, 129a59f853bSJacopo Mondi {0x0031, 0x00}, 130a59f853bSJacopo Mondi {0x0032, 0x00}, 131a59f853bSJacopo Mondi {0x0033, 0x00}, 132a59f853bSJacopo Mondi /* FSIN1 delay. */ 133a59f853bSJacopo Mondi {0x0038, 0x02}, 134a59f853bSJacopo Mondi {0x0039, 0x00}, 135a59f853bSJacopo Mondi {0x003A, 0x00}, 136a59f853bSJacopo Mondi {0x003B, 0x00}, 137a59f853bSJacopo Mondi /* FSIN0 length. */ 138a59f853bSJacopo Mondi {0x0070, 0x2C}, 139a59f853bSJacopo Mondi {0x0071, 0x01}, 140a59f853bSJacopo Mondi {0x0072, 0x00}, 141a59f853bSJacopo Mondi {0x0073, 0x00}, 142a59f853bSJacopo Mondi /* FSIN1 length. */ 143a59f853bSJacopo Mondi {0x0074, 0x64}, 144a59f853bSJacopo Mondi {0x0075, 0x00}, 145a59f853bSJacopo Mondi {0x0076, 0x00}, 146a59f853bSJacopo Mondi {0x0077, 0x00}, 147a59f853bSJacopo Mondi {0x0000, 0x14}, 148a59f853bSJacopo Mondi {0x0001, 0x00}, 149a59f853bSJacopo Mondi {0x0002, 0x00}, 150a59f853bSJacopo Mondi {0x0003, 0x00}, 151a59f853bSJacopo Mondi /* 152a59f853bSJacopo Mondi * Load fsin0,load fsin1,load other, 153a59f853bSJacopo Mondi * It will be cleared automatically. 154a59f853bSJacopo Mondi */ 155a59f853bSJacopo Mondi {0x0004, 0x32}, 156a59f853bSJacopo Mondi {0x0005, 0x00}, 157a59f853bSJacopo Mondi {0x0006, 0x00}, 158a59f853bSJacopo Mondi {0x0007, 0x00}, 159a59f853bSJacopo Mondi {0xfffe, 0x80}, 160a59f853bSJacopo Mondi /* Sensor FSIN. */ 161a59f853bSJacopo Mondi {0x0081, 0x00}, 162a59f853bSJacopo Mondi /* ov10640 FSIN enable */ 163a59f853bSJacopo Mondi {0xfffe, 0x19}, 164a59f853bSJacopo Mondi {0x5000, 0x00}, 165a59f853bSJacopo Mondi {0x5001, 0x30}, 166a59f853bSJacopo Mondi {0x5002, 0x8c}, 167a59f853bSJacopo Mondi {0x5003, 0xb2}, 168a59f853bSJacopo Mondi {0xfffe, 0x80}, 169a59f853bSJacopo Mondi {0x00c0, 0xc1}, 170a59f853bSJacopo Mondi /* ov10640 HFLIP=1 by default */ 171a59f853bSJacopo Mondi {0xfffe, 0x19}, 172a59f853bSJacopo Mondi {0x5000, 0x01}, 173a59f853bSJacopo Mondi {0x5001, 0x00}, 174a59f853bSJacopo Mondi {0xfffe, 0x80}, 175a59f853bSJacopo Mondi {0x00c0, 0xdc}, 176a59f853bSJacopo Mondi }; 177a59f853bSJacopo Mondi 178a59f853bSJacopo Mondi static int ov490_read(struct rdacm21_device *dev, u16 reg, u8 *val) 179a59f853bSJacopo Mondi { 180a59f853bSJacopo Mondi u8 buf[2] = { reg >> 8, reg }; 181a59f853bSJacopo Mondi int ret; 182a59f853bSJacopo Mondi 183a59f853bSJacopo Mondi ret = i2c_master_send(dev->isp, buf, 2); 184a59f853bSJacopo Mondi if (ret == 2) 185a59f853bSJacopo Mondi ret = i2c_master_recv(dev->isp, val, 1); 186a59f853bSJacopo Mondi 187a59f853bSJacopo Mondi if (ret < 0) { 188a59f853bSJacopo Mondi dev_dbg(dev->dev, "%s: register 0x%04x read failed (%d)\n", 189a59f853bSJacopo Mondi __func__, reg, ret); 190a59f853bSJacopo Mondi return ret; 191a59f853bSJacopo Mondi } 192a59f853bSJacopo Mondi 193a59f853bSJacopo Mondi return 0; 194a59f853bSJacopo Mondi } 195a59f853bSJacopo Mondi 196a59f853bSJacopo Mondi static int ov490_write(struct rdacm21_device *dev, u16 reg, u8 val) 197a59f853bSJacopo Mondi { 198a59f853bSJacopo Mondi u8 buf[3] = { reg >> 8, reg, val }; 199a59f853bSJacopo Mondi int ret; 200a59f853bSJacopo Mondi 201a59f853bSJacopo Mondi ret = i2c_master_send(dev->isp, buf, 3); 202a59f853bSJacopo Mondi if (ret < 0) { 203a59f853bSJacopo Mondi dev_err(dev->dev, "%s: register 0x%04x write failed (%d)\n", 204a59f853bSJacopo Mondi __func__, reg, ret); 205a59f853bSJacopo Mondi return ret; 206a59f853bSJacopo Mondi } 207a59f853bSJacopo Mondi 208a59f853bSJacopo Mondi return 0; 209a59f853bSJacopo Mondi } 210a59f853bSJacopo Mondi 211a59f853bSJacopo Mondi static int ov490_set_page(struct rdacm21_device *dev, u16 page) 212a59f853bSJacopo Mondi { 213a59f853bSJacopo Mondi u8 page_high = page >> 8; 214a59f853bSJacopo Mondi u8 page_low = page; 215a59f853bSJacopo Mondi int ret; 216a59f853bSJacopo Mondi 217a59f853bSJacopo Mondi if (page == dev->last_page) 218a59f853bSJacopo Mondi return 0; 219a59f853bSJacopo Mondi 220a59f853bSJacopo Mondi if (page_high != (dev->last_page >> 8)) { 221a59f853bSJacopo Mondi ret = ov490_write(dev, OV490_PAGE_HIGH_REG, page_high); 222a59f853bSJacopo Mondi if (ret) 223a59f853bSJacopo Mondi return ret; 224a59f853bSJacopo Mondi } 225a59f853bSJacopo Mondi 226a59f853bSJacopo Mondi if (page_low != (u8)dev->last_page) { 227a59f853bSJacopo Mondi ret = ov490_write(dev, OV490_PAGE_LOW_REG, page_low); 228a59f853bSJacopo Mondi if (ret) 229a59f853bSJacopo Mondi return ret; 230a59f853bSJacopo Mondi } 231a59f853bSJacopo Mondi 232a59f853bSJacopo Mondi dev->last_page = page; 233a59f853bSJacopo Mondi usleep_range(100, 150); 234a59f853bSJacopo Mondi 235a59f853bSJacopo Mondi return 0; 236a59f853bSJacopo Mondi } 237a59f853bSJacopo Mondi 238a59f853bSJacopo Mondi static int ov490_read_reg(struct rdacm21_device *dev, u32 reg, u8 *val) 239a59f853bSJacopo Mondi { 240a59f853bSJacopo Mondi int ret; 241a59f853bSJacopo Mondi 242a59f853bSJacopo Mondi ret = ov490_set_page(dev, reg >> 16); 243a59f853bSJacopo Mondi if (ret) 244a59f853bSJacopo Mondi return ret; 245a59f853bSJacopo Mondi 246a59f853bSJacopo Mondi ret = ov490_read(dev, (u16)reg, val); 247a59f853bSJacopo Mondi if (ret) 248a59f853bSJacopo Mondi return ret; 249a59f853bSJacopo Mondi 250a59f853bSJacopo Mondi dev_dbg(dev->dev, "%s: 0x%08x = 0x%02x\n", __func__, reg, *val); 251a59f853bSJacopo Mondi 252a59f853bSJacopo Mondi return 0; 253a59f853bSJacopo Mondi } 254a59f853bSJacopo Mondi 255a59f853bSJacopo Mondi static int ov490_write_reg(struct rdacm21_device *dev, u32 reg, u8 val) 256a59f853bSJacopo Mondi { 257a59f853bSJacopo Mondi int ret; 258a59f853bSJacopo Mondi 259a59f853bSJacopo Mondi ret = ov490_set_page(dev, reg >> 16); 260a59f853bSJacopo Mondi if (ret) 261a59f853bSJacopo Mondi return ret; 262a59f853bSJacopo Mondi 263a59f853bSJacopo Mondi ret = ov490_write(dev, (u16)reg, val); 264a59f853bSJacopo Mondi if (ret) 265a59f853bSJacopo Mondi return ret; 266a59f853bSJacopo Mondi 267a59f853bSJacopo Mondi dev_dbg(dev->dev, "%s: 0x%08x = 0x%02x\n", __func__, reg, val); 268a59f853bSJacopo Mondi 269a59f853bSJacopo Mondi return 0; 270a59f853bSJacopo Mondi } 271a59f853bSJacopo Mondi 272a59f853bSJacopo Mondi static int rdacm21_s_stream(struct v4l2_subdev *sd, int enable) 273a59f853bSJacopo Mondi { 274a59f853bSJacopo Mondi struct rdacm21_device *dev = sd_to_rdacm21(sd); 275a59f853bSJacopo Mondi 276a59f853bSJacopo Mondi /* 277a59f853bSJacopo Mondi * Enable serial link now that the ISP provides a valid pixel clock 278a59f853bSJacopo Mondi * to start serializing video data on the GMSL link. 279a59f853bSJacopo Mondi */ 280a59f853bSJacopo Mondi return max9271_set_serial_link(&dev->serializer, enable); 281a59f853bSJacopo Mondi } 282a59f853bSJacopo Mondi 283a59f853bSJacopo Mondi static int rdacm21_enum_mbus_code(struct v4l2_subdev *sd, 284*0d346d2aSTomi Valkeinen struct v4l2_subdev_state *sd_state, 285a59f853bSJacopo Mondi struct v4l2_subdev_mbus_code_enum *code) 286a59f853bSJacopo Mondi { 287a59f853bSJacopo Mondi if (code->pad || code->index > 0) 288a59f853bSJacopo Mondi return -EINVAL; 289a59f853bSJacopo Mondi 290a59f853bSJacopo Mondi code->code = MEDIA_BUS_FMT_YUYV8_1X16; 291a59f853bSJacopo Mondi 292a59f853bSJacopo Mondi return 0; 293a59f853bSJacopo Mondi } 294a59f853bSJacopo Mondi 295a59f853bSJacopo Mondi static int rdacm21_get_fmt(struct v4l2_subdev *sd, 296*0d346d2aSTomi Valkeinen struct v4l2_subdev_state *sd_state, 297a59f853bSJacopo Mondi struct v4l2_subdev_format *format) 298a59f853bSJacopo Mondi { 299a59f853bSJacopo Mondi struct v4l2_mbus_framefmt *mf = &format->format; 300a59f853bSJacopo Mondi struct rdacm21_device *dev = sd_to_rdacm21(sd); 301a59f853bSJacopo Mondi 302a59f853bSJacopo Mondi if (format->pad) 303a59f853bSJacopo Mondi return -EINVAL; 304a59f853bSJacopo Mondi 305a59f853bSJacopo Mondi mf->width = dev->fmt.width; 306a59f853bSJacopo Mondi mf->height = dev->fmt.height; 307a59f853bSJacopo Mondi mf->code = MEDIA_BUS_FMT_YUYV8_1X16; 308a59f853bSJacopo Mondi mf->colorspace = V4L2_COLORSPACE_SRGB; 309a59f853bSJacopo Mondi mf->field = V4L2_FIELD_NONE; 310a59f853bSJacopo Mondi mf->ycbcr_enc = V4L2_YCBCR_ENC_601; 311a59f853bSJacopo Mondi mf->quantization = V4L2_QUANTIZATION_FULL_RANGE; 312a59f853bSJacopo Mondi mf->xfer_func = V4L2_XFER_FUNC_NONE; 313a59f853bSJacopo Mondi 314a59f853bSJacopo Mondi return 0; 315a59f853bSJacopo Mondi } 316a59f853bSJacopo Mondi 317a59f853bSJacopo Mondi static const struct v4l2_subdev_video_ops rdacm21_video_ops = { 318a59f853bSJacopo Mondi .s_stream = rdacm21_s_stream, 319a59f853bSJacopo Mondi }; 320a59f853bSJacopo Mondi 321a59f853bSJacopo Mondi static const struct v4l2_subdev_pad_ops rdacm21_subdev_pad_ops = { 322a59f853bSJacopo Mondi .enum_mbus_code = rdacm21_enum_mbus_code, 323a59f853bSJacopo Mondi .get_fmt = rdacm21_get_fmt, 324a59f853bSJacopo Mondi .set_fmt = rdacm21_get_fmt, 325a59f853bSJacopo Mondi }; 326a59f853bSJacopo Mondi 327a59f853bSJacopo Mondi static const struct v4l2_subdev_ops rdacm21_subdev_ops = { 328a59f853bSJacopo Mondi .video = &rdacm21_video_ops, 329a59f853bSJacopo Mondi .pad = &rdacm21_subdev_pad_ops, 330a59f853bSJacopo Mondi }; 331a59f853bSJacopo Mondi 332a59f853bSJacopo Mondi static int ov10640_initialize(struct rdacm21_device *dev) 333a59f853bSJacopo Mondi { 334a59f853bSJacopo Mondi u8 val; 335a59f853bSJacopo Mondi 336a59f853bSJacopo Mondi /* Power-up OV10640 by setting RESETB and PWDNB pins high. */ 337a59f853bSJacopo Mondi ov490_write_reg(dev, OV490_GPIO_SEL0, OV490_GPIO0); 338a59f853bSJacopo Mondi ov490_write_reg(dev, OV490_GPIO_SEL1, OV490_SPWDN0); 339a59f853bSJacopo Mondi ov490_write_reg(dev, OV490_GPIO_DIRECTION0, OV490_GPIO0); 340a59f853bSJacopo Mondi ov490_write_reg(dev, OV490_GPIO_DIRECTION1, OV490_SPWDN0); 341a59f853bSJacopo Mondi ov490_write_reg(dev, OV490_GPIO_OUTPUT_VALUE0, OV490_GPIO0); 342a59f853bSJacopo Mondi ov490_write_reg(dev, OV490_GPIO_OUTPUT_VALUE0, OV490_SPWDN0); 343a59f853bSJacopo Mondi usleep_range(3000, 5000); 344a59f853bSJacopo Mondi 345a59f853bSJacopo Mondi /* Read OV10640 ID to test communications. */ 346a59f853bSJacopo Mondi ov490_write_reg(dev, OV490_SCCB_SLAVE0_DIR, OV490_SCCB_SLAVE_READ); 347a59f853bSJacopo Mondi ov490_write_reg(dev, OV490_SCCB_SLAVE0_ADDR_HIGH, OV10640_CHIP_ID >> 8); 3485f58ac04SJacopo Mondi ov490_write_reg(dev, OV490_SCCB_SLAVE0_ADDR_LOW, OV10640_CHIP_ID & 0xff); 349a59f853bSJacopo Mondi 350a59f853bSJacopo Mondi /* Trigger SCCB slave transaction and give it some time to complete. */ 351a59f853bSJacopo Mondi ov490_write_reg(dev, OV490_HOST_CMD, OV490_HOST_CMD_TRIGGER); 352a59f853bSJacopo Mondi usleep_range(1000, 1500); 353a59f853bSJacopo Mondi 354a59f853bSJacopo Mondi ov490_read_reg(dev, OV490_SCCB_SLAVE0_DIR, &val); 355a59f853bSJacopo Mondi if (val != OV10640_ID_HIGH) { 356a59f853bSJacopo Mondi dev_err(dev->dev, "OV10640 ID mismatch: (0x%02x)\n", val); 357a59f853bSJacopo Mondi return -ENODEV; 358a59f853bSJacopo Mondi } 359a59f853bSJacopo Mondi 360a59f853bSJacopo Mondi dev_dbg(dev->dev, "OV10640 ID = 0x%2x\n", val); 361a59f853bSJacopo Mondi 362a59f853bSJacopo Mondi return 0; 363a59f853bSJacopo Mondi } 364a59f853bSJacopo Mondi 365a59f853bSJacopo Mondi static int ov490_initialize(struct rdacm21_device *dev) 366a59f853bSJacopo Mondi { 367a59f853bSJacopo Mondi u8 pid, ver, val; 368a59f853bSJacopo Mondi unsigned int i; 369a59f853bSJacopo Mondi int ret; 370a59f853bSJacopo Mondi 371a59f853bSJacopo Mondi /* 372a59f853bSJacopo Mondi * Read OV490 Id to test communications. Give it up to 40msec to 373a59f853bSJacopo Mondi * exit from reset. 374a59f853bSJacopo Mondi */ 375a59f853bSJacopo Mondi for (i = 0; i < OV490_PID_TIMEOUT; ++i) { 376a59f853bSJacopo Mondi ret = ov490_read_reg(dev, OV490_PID, &pid); 377a59f853bSJacopo Mondi if (ret == 0) 378a59f853bSJacopo Mondi break; 379a59f853bSJacopo Mondi usleep_range(1000, 2000); 380a59f853bSJacopo Mondi } 381a59f853bSJacopo Mondi if (i == OV490_PID_TIMEOUT) { 382a59f853bSJacopo Mondi dev_err(dev->dev, "OV490 PID read failed (%d)\n", ret); 383a59f853bSJacopo Mondi return ret; 384a59f853bSJacopo Mondi } 385a59f853bSJacopo Mondi 386a59f853bSJacopo Mondi ret = ov490_read_reg(dev, OV490_VER, &ver); 387a59f853bSJacopo Mondi if (ret < 0) 388a59f853bSJacopo Mondi return ret; 389a59f853bSJacopo Mondi 390a59f853bSJacopo Mondi if (OV490_ID(pid, ver) != OV490_ID_VAL) { 391a59f853bSJacopo Mondi dev_err(dev->dev, "OV490 ID mismatch (0x%04x)\n", 392a59f853bSJacopo Mondi OV490_ID(pid, ver)); 393a59f853bSJacopo Mondi return -ENODEV; 394a59f853bSJacopo Mondi } 395a59f853bSJacopo Mondi 396a59f853bSJacopo Mondi /* Wait for firmware boot by reading streamon status. */ 397a59f853bSJacopo Mondi for (i = 0; i < OV490_OUTPUT_EN_TIMEOUT; ++i) { 398a59f853bSJacopo Mondi ov490_read_reg(dev, OV490_ODS_CTRL, &val); 399a59f853bSJacopo Mondi if (val == OV490_ODS_CTRL_FRAME_OUTPUT_EN) 400a59f853bSJacopo Mondi break; 401a59f853bSJacopo Mondi usleep_range(1000, 2000); 402a59f853bSJacopo Mondi } 403a59f853bSJacopo Mondi if (i == OV490_OUTPUT_EN_TIMEOUT) { 404a59f853bSJacopo Mondi dev_err(dev->dev, "Timeout waiting for firmware boot\n"); 405a59f853bSJacopo Mondi return -ENODEV; 406a59f853bSJacopo Mondi } 407a59f853bSJacopo Mondi 408a59f853bSJacopo Mondi ret = ov10640_initialize(dev); 409a59f853bSJacopo Mondi if (ret) 410a59f853bSJacopo Mondi return ret; 411a59f853bSJacopo Mondi 412a59f853bSJacopo Mondi /* Program OV490 with register-value table. */ 413a59f853bSJacopo Mondi for (i = 0; i < ARRAY_SIZE(ov490_regs_wizard); ++i) { 414a59f853bSJacopo Mondi ret = ov490_write(dev, ov490_regs_wizard[i].reg, 415a59f853bSJacopo Mondi ov490_regs_wizard[i].val); 416a59f853bSJacopo Mondi if (ret < 0) { 417a59f853bSJacopo Mondi dev_err(dev->dev, 418a59f853bSJacopo Mondi "%s: register %u (0x%04x) write failed (%d)\n", 419a59f853bSJacopo Mondi __func__, i, ov490_regs_wizard[i].reg, ret); 420a59f853bSJacopo Mondi 421a59f853bSJacopo Mondi return -EIO; 422a59f853bSJacopo Mondi } 423a59f853bSJacopo Mondi 424a59f853bSJacopo Mondi usleep_range(100, 150); 425a59f853bSJacopo Mondi } 426a59f853bSJacopo Mondi 427a59f853bSJacopo Mondi /* 428a59f853bSJacopo Mondi * The ISP is programmed with the content of a serial flash memory. 429a59f853bSJacopo Mondi * Read the firmware configuration to reflect it through the V4L2 APIs. 430a59f853bSJacopo Mondi */ 431a59f853bSJacopo Mondi ov490_read_reg(dev, OV490_ISP_HSIZE_HIGH, &val); 432a59f853bSJacopo Mondi dev->fmt.width = (val & 0xf) << 8; 433a59f853bSJacopo Mondi ov490_read_reg(dev, OV490_ISP_HSIZE_LOW, &val); 434a59f853bSJacopo Mondi dev->fmt.width |= (val & 0xff); 435a59f853bSJacopo Mondi 436a59f853bSJacopo Mondi ov490_read_reg(dev, OV490_ISP_VSIZE_HIGH, &val); 437a59f853bSJacopo Mondi dev->fmt.height = (val & 0xf) << 8; 438a59f853bSJacopo Mondi ov490_read_reg(dev, OV490_ISP_VSIZE_LOW, &val); 439a59f853bSJacopo Mondi dev->fmt.height |= val & 0xff; 440a59f853bSJacopo Mondi 441a59f853bSJacopo Mondi /* Set bus width to 12 bits with [0:11] ordering. */ 442a59f853bSJacopo Mondi ov490_write_reg(dev, OV490_DVP_CTRL3, 0x10); 443a59f853bSJacopo Mondi 444a59f853bSJacopo Mondi dev_info(dev->dev, "Identified RDACM21 camera module\n"); 445a59f853bSJacopo Mondi 446a59f853bSJacopo Mondi return 0; 447a59f853bSJacopo Mondi } 448a59f853bSJacopo Mondi 449a59f853bSJacopo Mondi static int rdacm21_initialize(struct rdacm21_device *dev) 450a59f853bSJacopo Mondi { 451a59f853bSJacopo Mondi int ret; 452a59f853bSJacopo Mondi 453a59f853bSJacopo Mondi /* Verify communication with the MAX9271: ping to wakeup. */ 454a59f853bSJacopo Mondi dev->serializer.client->addr = MAX9271_DEFAULT_ADDR; 455a59f853bSJacopo Mondi i2c_smbus_read_byte(dev->serializer.client); 456a59f853bSJacopo Mondi usleep_range(3000, 5000); 457a59f853bSJacopo Mondi 458a59f853bSJacopo Mondi /* Enable reverse channel and disable the serial link. */ 459a59f853bSJacopo Mondi ret = max9271_set_serial_link(&dev->serializer, false); 460a59f853bSJacopo Mondi if (ret) 461a59f853bSJacopo Mondi return ret; 462a59f853bSJacopo Mondi 463a59f853bSJacopo Mondi /* Configure I2C bus at 105Kbps speed and configure GMSL. */ 464a59f853bSJacopo Mondi ret = max9271_configure_i2c(&dev->serializer, 465a59f853bSJacopo Mondi MAX9271_I2CSLVSH_469NS_234NS | 466a59f853bSJacopo Mondi MAX9271_I2CSLVTO_1024US | 467a59f853bSJacopo Mondi MAX9271_I2CMSTBT_105KBPS); 468a59f853bSJacopo Mondi if (ret) 469a59f853bSJacopo Mondi return ret; 470a59f853bSJacopo Mondi 471a59f853bSJacopo Mondi ret = max9271_verify_id(&dev->serializer); 472a59f853bSJacopo Mondi if (ret) 473a59f853bSJacopo Mondi return ret; 474a59f853bSJacopo Mondi 475a59f853bSJacopo Mondi /* Enable GPIO1 and hold OV490 in reset during max9271 configuration. */ 476a59f853bSJacopo Mondi ret = max9271_enable_gpios(&dev->serializer, MAX9271_GPIO1OUT); 477a59f853bSJacopo Mondi if (ret) 478a59f853bSJacopo Mondi return ret; 479a59f853bSJacopo Mondi 480a59f853bSJacopo Mondi ret = max9271_clear_gpios(&dev->serializer, MAX9271_GPIO1OUT); 481a59f853bSJacopo Mondi if (ret) 482a59f853bSJacopo Mondi return ret; 483a59f853bSJacopo Mondi 484a59f853bSJacopo Mondi ret = max9271_configure_gmsl_link(&dev->serializer); 485a59f853bSJacopo Mondi if (ret) 486a59f853bSJacopo Mondi return ret; 487a59f853bSJacopo Mondi 488a59f853bSJacopo Mondi ret = max9271_set_address(&dev->serializer, dev->addrs[0]); 489a59f853bSJacopo Mondi if (ret) 490a59f853bSJacopo Mondi return ret; 491a59f853bSJacopo Mondi dev->serializer.client->addr = dev->addrs[0]; 492a59f853bSJacopo Mondi 493a59f853bSJacopo Mondi ret = max9271_set_translation(&dev->serializer, dev->addrs[1], 494a59f853bSJacopo Mondi OV490_I2C_ADDRESS); 495a59f853bSJacopo Mondi if (ret) 496a59f853bSJacopo Mondi return ret; 497a59f853bSJacopo Mondi dev->isp->addr = dev->addrs[1]; 498a59f853bSJacopo Mondi 499a59f853bSJacopo Mondi /* Release OV490 from reset and initialize it. */ 500a59f853bSJacopo Mondi ret = max9271_set_gpios(&dev->serializer, MAX9271_GPIO1OUT); 501a59f853bSJacopo Mondi if (ret) 502a59f853bSJacopo Mondi return ret; 503a59f853bSJacopo Mondi usleep_range(3000, 5000); 504a59f853bSJacopo Mondi 505a59f853bSJacopo Mondi ret = ov490_initialize(dev); 506a59f853bSJacopo Mondi if (ret) 507a59f853bSJacopo Mondi return ret; 508a59f853bSJacopo Mondi 509a59f853bSJacopo Mondi /* 510a59f853bSJacopo Mondi * Set reverse channel high threshold to increase noise immunity. 511a59f853bSJacopo Mondi * 512a59f853bSJacopo Mondi * This should be compensated by increasing the reverse channel 513a59f853bSJacopo Mondi * amplitude on the remote deserializer side. 514a59f853bSJacopo Mondi */ 515a59f853bSJacopo Mondi return max9271_set_high_threshold(&dev->serializer, true); 516a59f853bSJacopo Mondi } 517a59f853bSJacopo Mondi 518a59f853bSJacopo Mondi static int rdacm21_probe(struct i2c_client *client) 519a59f853bSJacopo Mondi { 520a59f853bSJacopo Mondi struct rdacm21_device *dev; 521a59f853bSJacopo Mondi struct fwnode_handle *ep; 522a59f853bSJacopo Mondi int ret; 523a59f853bSJacopo Mondi 524a59f853bSJacopo Mondi dev = devm_kzalloc(&client->dev, sizeof(*dev), GFP_KERNEL); 525a59f853bSJacopo Mondi if (!dev) 526a59f853bSJacopo Mondi return -ENOMEM; 527a59f853bSJacopo Mondi dev->dev = &client->dev; 528a59f853bSJacopo Mondi dev->serializer.client = client; 529a59f853bSJacopo Mondi 530a59f853bSJacopo Mondi ret = of_property_read_u32_array(client->dev.of_node, "reg", 531a59f853bSJacopo Mondi dev->addrs, 2); 532a59f853bSJacopo Mondi if (ret < 0) { 533a59f853bSJacopo Mondi dev_err(dev->dev, "Invalid DT reg property: %d\n", ret); 534a59f853bSJacopo Mondi return -EINVAL; 535a59f853bSJacopo Mondi } 536a59f853bSJacopo Mondi 537a59f853bSJacopo Mondi /* Create the dummy I2C client for the sensor. */ 538a59f853bSJacopo Mondi dev->isp = i2c_new_dummy_device(client->adapter, OV490_I2C_ADDRESS); 539a59f853bSJacopo Mondi if (IS_ERR(dev->isp)) 540a59f853bSJacopo Mondi return PTR_ERR(dev->isp); 541a59f853bSJacopo Mondi 542a59f853bSJacopo Mondi ret = rdacm21_initialize(dev); 543a59f853bSJacopo Mondi if (ret < 0) 544a59f853bSJacopo Mondi goto error; 545a59f853bSJacopo Mondi 546a59f853bSJacopo Mondi /* Initialize and register the subdevice. */ 547a59f853bSJacopo Mondi v4l2_i2c_subdev_init(&dev->sd, client, &rdacm21_subdev_ops); 548a59f853bSJacopo Mondi dev->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; 549a59f853bSJacopo Mondi 550a59f853bSJacopo Mondi v4l2_ctrl_handler_init(&dev->ctrls, 1); 551a59f853bSJacopo Mondi v4l2_ctrl_new_std(&dev->ctrls, NULL, V4L2_CID_PIXEL_RATE, 552a59f853bSJacopo Mondi OV10640_PIXEL_RATE, OV10640_PIXEL_RATE, 1, 553a59f853bSJacopo Mondi OV10640_PIXEL_RATE); 554a59f853bSJacopo Mondi dev->sd.ctrl_handler = &dev->ctrls; 555a59f853bSJacopo Mondi 556a59f853bSJacopo Mondi ret = dev->ctrls.error; 557a59f853bSJacopo Mondi if (ret) 558a59f853bSJacopo Mondi goto error_free_ctrls; 559a59f853bSJacopo Mondi 560a59f853bSJacopo Mondi dev->pad.flags = MEDIA_PAD_FL_SOURCE; 561a59f853bSJacopo Mondi dev->sd.entity.flags |= MEDIA_ENT_F_CAM_SENSOR; 562a59f853bSJacopo Mondi ret = media_entity_pads_init(&dev->sd.entity, 1, &dev->pad); 563a59f853bSJacopo Mondi if (ret < 0) 564a59f853bSJacopo Mondi goto error_free_ctrls; 565a59f853bSJacopo Mondi 566a59f853bSJacopo Mondi ep = fwnode_graph_get_next_endpoint(dev_fwnode(&client->dev), NULL); 567a59f853bSJacopo Mondi if (!ep) { 568a59f853bSJacopo Mondi dev_err(&client->dev, 569a59f853bSJacopo Mondi "Unable to get endpoint in node %pOF\n", 570a59f853bSJacopo Mondi client->dev.of_node); 571a59f853bSJacopo Mondi ret = -ENOENT; 572a59f853bSJacopo Mondi goto error_free_ctrls; 573a59f853bSJacopo Mondi } 574a59f853bSJacopo Mondi dev->sd.fwnode = ep; 575a59f853bSJacopo Mondi 576a59f853bSJacopo Mondi ret = v4l2_async_register_subdev(&dev->sd); 577a59f853bSJacopo Mondi if (ret) 578a59f853bSJacopo Mondi goto error_put_node; 579a59f853bSJacopo Mondi 580a59f853bSJacopo Mondi return 0; 581a59f853bSJacopo Mondi 582a59f853bSJacopo Mondi error_put_node: 583a59f853bSJacopo Mondi fwnode_handle_put(dev->sd.fwnode); 584a59f853bSJacopo Mondi error_free_ctrls: 585a59f853bSJacopo Mondi v4l2_ctrl_handler_free(&dev->ctrls); 586a59f853bSJacopo Mondi error: 587a59f853bSJacopo Mondi i2c_unregister_device(dev->isp); 588a59f853bSJacopo Mondi 589a59f853bSJacopo Mondi return ret; 590a59f853bSJacopo Mondi } 591a59f853bSJacopo Mondi 592a59f853bSJacopo Mondi static int rdacm21_remove(struct i2c_client *client) 593a59f853bSJacopo Mondi { 594a59f853bSJacopo Mondi struct rdacm21_device *dev = sd_to_rdacm21(i2c_get_clientdata(client)); 595a59f853bSJacopo Mondi 596a59f853bSJacopo Mondi v4l2_async_unregister_subdev(&dev->sd); 597a59f853bSJacopo Mondi v4l2_ctrl_handler_free(&dev->ctrls); 598a59f853bSJacopo Mondi i2c_unregister_device(dev->isp); 599a59f853bSJacopo Mondi fwnode_handle_put(dev->sd.fwnode); 600a59f853bSJacopo Mondi 601a59f853bSJacopo Mondi return 0; 602a59f853bSJacopo Mondi } 603a59f853bSJacopo Mondi 604a59f853bSJacopo Mondi static const struct of_device_id rdacm21_of_ids[] = { 605a59f853bSJacopo Mondi { .compatible = "imi,rdacm21" }, 606a59f853bSJacopo Mondi { } 607a59f853bSJacopo Mondi }; 608a59f853bSJacopo Mondi MODULE_DEVICE_TABLE(of, rdacm21_of_ids); 609a59f853bSJacopo Mondi 610a59f853bSJacopo Mondi static struct i2c_driver rdacm21_i2c_driver = { 611a59f853bSJacopo Mondi .driver = { 612a59f853bSJacopo Mondi .name = "rdacm21", 613a59f853bSJacopo Mondi .of_match_table = rdacm21_of_ids, 614a59f853bSJacopo Mondi }, 615a59f853bSJacopo Mondi .probe_new = rdacm21_probe, 616a59f853bSJacopo Mondi .remove = rdacm21_remove, 617a59f853bSJacopo Mondi }; 618a59f853bSJacopo Mondi 619a59f853bSJacopo Mondi module_i2c_driver(rdacm21_i2c_driver); 620a59f853bSJacopo Mondi 621a59f853bSJacopo Mondi MODULE_DESCRIPTION("GMSL Camera driver for RDACM21"); 622a59f853bSJacopo Mondi MODULE_AUTHOR("Jacopo Mondi"); 623a59f853bSJacopo Mondi MODULE_LICENSE("GPL v2"); 624