xref: /openbmc/linux/drivers/media/i2c/ov9734.c (revision 35267cea)
1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2020 Intel Corporation.
3 
4 #include <asm/unaligned.h>
5 #include <linux/acpi.h>
6 #include <linux/delay.h>
7 #include <linux/i2c.h>
8 #include <linux/module.h>
9 #include <linux/pm_runtime.h>
10 #include <media/v4l2-ctrls.h>
11 #include <media/v4l2-device.h>
12 #include <media/v4l2-fwnode.h>
13 
14 #define OV9734_LINK_FREQ_180MHZ		180000000ULL
15 #define OV9734_SCLK			36000000LL
16 #define OV9734_MCLK			19200000
17 /* ov9734 only support 1-lane mipi output */
18 #define OV9734_DATA_LANES		1
19 #define OV9734_RGB_DEPTH		10
20 
21 #define OV9734_REG_CHIP_ID		0x300a
22 #define OV9734_CHIP_ID			0x9734
23 
24 #define OV9734_REG_MODE_SELECT		0x0100
25 #define OV9734_MODE_STANDBY		0x00
26 #define OV9734_MODE_STREAMING		0x01
27 
28 /* vertical-timings from sensor */
29 #define OV9734_REG_VTS			0x380e
30 #define OV9734_VTS_30FPS		0x0322
31 #define OV9734_VTS_30FPS_MIN		0x0322
32 #define OV9734_VTS_MAX			0x7fff
33 
34 /* horizontal-timings from sensor */
35 #define OV9734_REG_HTS			0x380c
36 
37 /* Exposure controls from sensor */
38 #define OV9734_REG_EXPOSURE		0x3500
39 #define OV9734_EXPOSURE_MIN		4
40 #define OV9734_EXPOSURE_MAX_MARGIN	4
41 #define	OV9734_EXPOSURE_STEP		1
42 
43 /* Analog gain controls from sensor */
44 #define OV9734_REG_ANALOG_GAIN		0x350a
45 #define OV9734_ANAL_GAIN_MIN		16
46 #define OV9734_ANAL_GAIN_MAX		248
47 #define OV9734_ANAL_GAIN_STEP		1
48 
49 /* Digital gain controls from sensor */
50 #define OV9734_REG_MWB_R_GAIN		0x5180
51 #define OV9734_REG_MWB_G_GAIN		0x5182
52 #define OV9734_REG_MWB_B_GAIN		0x5184
53 #define OV9734_DGTL_GAIN_MIN		256
54 #define OV9734_DGTL_GAIN_MAX		1023
55 #define OV9734_DGTL_GAIN_STEP		1
56 #define OV9734_DGTL_GAIN_DEFAULT	256
57 
58 /* Test Pattern Control */
59 #define OV9734_REG_TEST_PATTERN		0x5080
60 #define OV9734_TEST_PATTERN_ENABLE	BIT(7)
61 #define OV9734_TEST_PATTERN_BAR_SHIFT	2
62 
63 enum {
64 	OV9734_LINK_FREQ_180MHZ_INDEX,
65 };
66 
67 struct ov9734_reg {
68 	u16 address;
69 	u8 val;
70 };
71 
72 struct ov9734_reg_list {
73 	u32 num_of_regs;
74 	const struct ov9734_reg *regs;
75 };
76 
77 struct ov9734_link_freq_config {
78 	const struct ov9734_reg_list reg_list;
79 };
80 
81 struct ov9734_mode {
82 	/* Frame width in pixels */
83 	u32 width;
84 
85 	/* Frame height in pixels */
86 	u32 height;
87 
88 	/* Horizontal timining size */
89 	u32 hts;
90 
91 	/* Default vertical timining size */
92 	u32 vts_def;
93 
94 	/* Min vertical timining size */
95 	u32 vts_min;
96 
97 	/* Link frequency needed for this resolution */
98 	u32 link_freq_index;
99 
100 	/* Sensor register settings for this resolution */
101 	const struct ov9734_reg_list reg_list;
102 };
103 
104 static const struct ov9734_reg mipi_data_rate_360mbps[] = {
105 	{0x3030, 0x19},
106 	{0x3080, 0x02},
107 	{0x3081, 0x4b},
108 	{0x3082, 0x04},
109 	{0x3083, 0x00},
110 	{0x3084, 0x02},
111 	{0x3085, 0x01},
112 	{0x3086, 0x01},
113 	{0x3089, 0x01},
114 	{0x308a, 0x00},
115 	{0x301e, 0x15},
116 	{0x3103, 0x01},
117 };
118 
119 static const struct ov9734_reg mode_1296x734_regs[] = {
120 	{0x3001, 0x00},
121 	{0x3002, 0x00},
122 	{0x3007, 0x00},
123 	{0x3010, 0x00},
124 	{0x3011, 0x08},
125 	{0x3014, 0x22},
126 	{0x3600, 0x55},
127 	{0x3601, 0x02},
128 	{0x3605, 0x22},
129 	{0x3611, 0xe7},
130 	{0x3654, 0x10},
131 	{0x3655, 0x77},
132 	{0x3656, 0x77},
133 	{0x3657, 0x07},
134 	{0x3658, 0x22},
135 	{0x3659, 0x22},
136 	{0x365a, 0x02},
137 	{0x3784, 0x05},
138 	{0x3785, 0x55},
139 	{0x37c0, 0x07},
140 	{0x3800, 0x00},
141 	{0x3801, 0x04},
142 	{0x3802, 0x00},
143 	{0x3803, 0x04},
144 	{0x3804, 0x05},
145 	{0x3805, 0x0b},
146 	{0x3806, 0x02},
147 	{0x3807, 0xdb},
148 	{0x3808, 0x05},
149 	{0x3809, 0x00},
150 	{0x380a, 0x02},
151 	{0x380b, 0xd0},
152 	{0x380c, 0x05},
153 	{0x380d, 0xc6},
154 	{0x380e, 0x03},
155 	{0x380f, 0x22},
156 	{0x3810, 0x00},
157 	{0x3811, 0x04},
158 	{0x3812, 0x00},
159 	{0x3813, 0x04},
160 	{0x3816, 0x00},
161 	{0x3817, 0x00},
162 	{0x3818, 0x00},
163 	{0x3819, 0x04},
164 	{0x3820, 0x18},
165 	{0x3821, 0x00},
166 	{0x382c, 0x06},
167 	{0x3500, 0x00},
168 	{0x3501, 0x31},
169 	{0x3502, 0x00},
170 	{0x3503, 0x03},
171 	{0x3504, 0x00},
172 	{0x3505, 0x00},
173 	{0x3509, 0x10},
174 	{0x350a, 0x00},
175 	{0x350b, 0x40},
176 	{0x3d00, 0x00},
177 	{0x3d01, 0x00},
178 	{0x3d02, 0x00},
179 	{0x3d03, 0x00},
180 	{0x3d04, 0x00},
181 	{0x3d05, 0x00},
182 	{0x3d06, 0x00},
183 	{0x3d07, 0x00},
184 	{0x3d08, 0x00},
185 	{0x3d09, 0x00},
186 	{0x3d0a, 0x00},
187 	{0x3d0b, 0x00},
188 	{0x3d0c, 0x00},
189 	{0x3d0d, 0x00},
190 	{0x3d0e, 0x00},
191 	{0x3d0f, 0x00},
192 	{0x3d80, 0x00},
193 	{0x3d81, 0x00},
194 	{0x3d82, 0x38},
195 	{0x3d83, 0xa4},
196 	{0x3d84, 0x00},
197 	{0x3d85, 0x00},
198 	{0x3d86, 0x1f},
199 	{0x3d87, 0x03},
200 	{0x3d8b, 0x00},
201 	{0x3d8f, 0x00},
202 	{0x4001, 0xe0},
203 	{0x4009, 0x0b},
204 	{0x4300, 0x03},
205 	{0x4301, 0xff},
206 	{0x4304, 0x00},
207 	{0x4305, 0x00},
208 	{0x4309, 0x00},
209 	{0x4600, 0x00},
210 	{0x4601, 0x80},
211 	{0x4800, 0x00},
212 	{0x4805, 0x00},
213 	{0x4821, 0x50},
214 	{0x4823, 0x50},
215 	{0x4837, 0x2d},
216 	{0x4a00, 0x00},
217 	{0x4f00, 0x80},
218 	{0x4f01, 0x10},
219 	{0x4f02, 0x00},
220 	{0x4f03, 0x00},
221 	{0x4f04, 0x00},
222 	{0x4f05, 0x00},
223 	{0x4f06, 0x00},
224 	{0x4f07, 0x00},
225 	{0x4f08, 0x00},
226 	{0x4f09, 0x00},
227 	{0x5000, 0x2f},
228 	{0x500c, 0x00},
229 	{0x500d, 0x00},
230 	{0x500e, 0x00},
231 	{0x500f, 0x00},
232 	{0x5010, 0x00},
233 	{0x5011, 0x00},
234 	{0x5012, 0x00},
235 	{0x5013, 0x00},
236 	{0x5014, 0x00},
237 	{0x5015, 0x00},
238 	{0x5016, 0x00},
239 	{0x5017, 0x00},
240 	{0x5080, 0x00},
241 	{0x5180, 0x01},
242 	{0x5181, 0x00},
243 	{0x5182, 0x01},
244 	{0x5183, 0x00},
245 	{0x5184, 0x01},
246 	{0x5185, 0x00},
247 	{0x5708, 0x06},
248 	{0x380f, 0x2a},
249 	{0x5780, 0x3e},
250 	{0x5781, 0x0f},
251 	{0x5782, 0x44},
252 	{0x5783, 0x02},
253 	{0x5784, 0x01},
254 	{0x5785, 0x01},
255 	{0x5786, 0x00},
256 	{0x5787, 0x04},
257 	{0x5788, 0x02},
258 	{0x5789, 0x0f},
259 	{0x578a, 0xfd},
260 	{0x578b, 0xf5},
261 	{0x578c, 0xf5},
262 	{0x578d, 0x03},
263 	{0x578e, 0x08},
264 	{0x578f, 0x0c},
265 	{0x5790, 0x08},
266 	{0x5791, 0x04},
267 	{0x5792, 0x00},
268 	{0x5793, 0x52},
269 	{0x5794, 0xa3},
270 	{0x5000, 0x3f},
271 	{0x3801, 0x00},
272 	{0x3803, 0x00},
273 	{0x3805, 0x0f},
274 	{0x3807, 0xdf},
275 	{0x3809, 0x10},
276 	{0x380b, 0xde},
277 	{0x3811, 0x00},
278 	{0x3813, 0x01},
279 };
280 
281 static const char * const ov9734_test_pattern_menu[] = {
282 	"Disabled",
283 	"Standard Color Bar",
284 	"Top-Bottom Darker Color Bar",
285 	"Right-Left Darker Color Bar",
286 	"Bottom-Top Darker Color Bar",
287 };
288 
289 static const s64 link_freq_menu_items[] = {
290 	OV9734_LINK_FREQ_180MHZ,
291 };
292 
293 static const struct ov9734_link_freq_config link_freq_configs[] = {
294 	[OV9734_LINK_FREQ_180MHZ_INDEX] = {
295 		.reg_list = {
296 			.num_of_regs = ARRAY_SIZE(mipi_data_rate_360mbps),
297 			.regs = mipi_data_rate_360mbps,
298 		}
299 	},
300 };
301 
302 static const struct ov9734_mode supported_modes[] = {
303 	{
304 		.width = 1296,
305 		.height = 734,
306 		.hts = 0x5c6,
307 		.vts_def = OV9734_VTS_30FPS,
308 		.vts_min = OV9734_VTS_30FPS_MIN,
309 		.reg_list = {
310 			.num_of_regs = ARRAY_SIZE(mode_1296x734_regs),
311 			.regs = mode_1296x734_regs,
312 		},
313 		.link_freq_index = OV9734_LINK_FREQ_180MHZ_INDEX,
314 	},
315 };
316 
317 struct ov9734 {
318 	struct v4l2_subdev sd;
319 	struct media_pad pad;
320 	struct v4l2_ctrl_handler ctrl_handler;
321 
322 	/* V4L2 Controls */
323 	struct v4l2_ctrl *link_freq;
324 	struct v4l2_ctrl *pixel_rate;
325 	struct v4l2_ctrl *vblank;
326 	struct v4l2_ctrl *hblank;
327 	struct v4l2_ctrl *exposure;
328 
329 	/* Current mode */
330 	const struct ov9734_mode *cur_mode;
331 
332 	/* To serialize asynchronus callbacks */
333 	struct mutex mutex;
334 
335 	/* Streaming on/off */
336 	bool streaming;
337 };
338 
339 static inline struct ov9734 *to_ov9734(struct v4l2_subdev *subdev)
340 {
341 	return container_of(subdev, struct ov9734, sd);
342 }
343 
344 static u64 to_pixel_rate(u32 f_index)
345 {
346 	u64 pixel_rate = link_freq_menu_items[f_index] * 2 * OV9734_DATA_LANES;
347 
348 	do_div(pixel_rate, OV9734_RGB_DEPTH);
349 
350 	return pixel_rate;
351 }
352 
353 static u64 to_pixels_per_line(u32 hts, u32 f_index)
354 {
355 	u64 ppl = hts * to_pixel_rate(f_index);
356 
357 	do_div(ppl, OV9734_SCLK);
358 
359 	return ppl;
360 }
361 
362 static int ov9734_read_reg(struct ov9734 *ov9734, u16 reg, u16 len, u32 *val)
363 {
364 	struct i2c_client *client = v4l2_get_subdevdata(&ov9734->sd);
365 	struct i2c_msg msgs[2];
366 	u8 addr_buf[2];
367 	u8 data_buf[4] = {0};
368 	int ret;
369 
370 	if (len > sizeof(data_buf))
371 		return -EINVAL;
372 
373 	put_unaligned_be16(reg, addr_buf);
374 	msgs[0].addr = client->addr;
375 	msgs[0].flags = 0;
376 	msgs[0].len = sizeof(addr_buf);
377 	msgs[0].buf = addr_buf;
378 	msgs[1].addr = client->addr;
379 	msgs[1].flags = I2C_M_RD;
380 	msgs[1].len = len;
381 	msgs[1].buf = &data_buf[sizeof(data_buf) - len];
382 
383 	ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
384 	if (ret != ARRAY_SIZE(msgs))
385 		return ret < 0 ? ret : -EIO;
386 
387 	*val = get_unaligned_be32(data_buf);
388 
389 	return 0;
390 }
391 
392 static int ov9734_write_reg(struct ov9734 *ov9734, u16 reg, u16 len, u32 val)
393 {
394 	struct i2c_client *client = v4l2_get_subdevdata(&ov9734->sd);
395 	u8 buf[6];
396 	int ret = 0;
397 
398 	if (len > 4)
399 		return -EINVAL;
400 
401 	put_unaligned_be16(reg, buf);
402 	put_unaligned_be32(val << 8 * (4 - len), buf + 2);
403 
404 	ret = i2c_master_send(client, buf, len + 2);
405 	if (ret != len + 2)
406 		return ret < 0 ? ret : -EIO;
407 
408 	return 0;
409 }
410 
411 static int ov9734_write_reg_list(struct ov9734 *ov9734,
412 				 const struct ov9734_reg_list *r_list)
413 {
414 	struct i2c_client *client = v4l2_get_subdevdata(&ov9734->sd);
415 	unsigned int i;
416 	int ret;
417 
418 	for (i = 0; i < r_list->num_of_regs; i++) {
419 		ret = ov9734_write_reg(ov9734, r_list->regs[i].address, 1,
420 				       r_list->regs[i].val);
421 		if (ret) {
422 			dev_err_ratelimited(&client->dev,
423 					    "write reg 0x%4.4x return err = %d",
424 					    r_list->regs[i].address, ret);
425 			return ret;
426 		}
427 	}
428 
429 	return 0;
430 }
431 
432 static int ov9734_update_digital_gain(struct ov9734 *ov9734, u32 d_gain)
433 {
434 	int ret;
435 
436 	ret = ov9734_write_reg(ov9734, OV9734_REG_MWB_R_GAIN, 2, d_gain);
437 	if (ret)
438 		return ret;
439 
440 	ret = ov9734_write_reg(ov9734, OV9734_REG_MWB_G_GAIN, 2, d_gain);
441 	if (ret)
442 		return ret;
443 
444 	return ov9734_write_reg(ov9734, OV9734_REG_MWB_B_GAIN, 2, d_gain);
445 }
446 
447 static int ov9734_test_pattern(struct ov9734 *ov9734, u32 pattern)
448 {
449 	if (pattern)
450 		pattern = (pattern - 1) << OV9734_TEST_PATTERN_BAR_SHIFT |
451 			OV9734_TEST_PATTERN_ENABLE;
452 
453 	return ov9734_write_reg(ov9734, OV9734_REG_TEST_PATTERN, 1, pattern);
454 }
455 
456 static int ov9734_set_ctrl(struct v4l2_ctrl *ctrl)
457 {
458 	struct ov9734 *ov9734 = container_of(ctrl->handler,
459 					     struct ov9734, ctrl_handler);
460 	struct i2c_client *client = v4l2_get_subdevdata(&ov9734->sd);
461 	s64 exposure_max;
462 	int ret = 0;
463 
464 	/* Propagate change of current control to all related controls */
465 	if (ctrl->id == V4L2_CID_VBLANK) {
466 		/* Update max exposure while meeting expected vblanking */
467 		exposure_max = ov9734->cur_mode->height + ctrl->val -
468 			OV9734_EXPOSURE_MAX_MARGIN;
469 		__v4l2_ctrl_modify_range(ov9734->exposure,
470 					 ov9734->exposure->minimum,
471 					 exposure_max, ov9734->exposure->step,
472 					 exposure_max);
473 	}
474 
475 	/* V4L2 controls values will be applied only when power is already up */
476 	if (!pm_runtime_get_if_in_use(&client->dev))
477 		return 0;
478 
479 	switch (ctrl->id) {
480 	case V4L2_CID_ANALOGUE_GAIN:
481 		ret = ov9734_write_reg(ov9734, OV9734_REG_ANALOG_GAIN,
482 				       2, ctrl->val);
483 		break;
484 
485 	case V4L2_CID_DIGITAL_GAIN:
486 		ret = ov9734_update_digital_gain(ov9734, ctrl->val);
487 		break;
488 
489 	case V4L2_CID_EXPOSURE:
490 		/* 4 least significant bits of expsoure are fractional part */
491 		ret = ov9734_write_reg(ov9734, OV9734_REG_EXPOSURE,
492 				       3, ctrl->val << 4);
493 		break;
494 
495 	case V4L2_CID_VBLANK:
496 		ret = ov9734_write_reg(ov9734, OV9734_REG_VTS, 2,
497 				       ov9734->cur_mode->height + ctrl->val);
498 		break;
499 
500 	case V4L2_CID_TEST_PATTERN:
501 		ret = ov9734_test_pattern(ov9734, ctrl->val);
502 		break;
503 
504 	default:
505 		ret = -EINVAL;
506 		break;
507 	}
508 
509 	pm_runtime_put(&client->dev);
510 
511 	return ret;
512 }
513 
514 static const struct v4l2_ctrl_ops ov9734_ctrl_ops = {
515 	.s_ctrl = ov9734_set_ctrl,
516 };
517 
518 static int ov9734_init_controls(struct ov9734 *ov9734)
519 {
520 	struct v4l2_ctrl_handler *ctrl_hdlr;
521 	const struct ov9734_mode *cur_mode;
522 	s64 exposure_max, h_blank, pixel_rate;
523 	u32 vblank_min, vblank_max, vblank_default;
524 	int ret, size;
525 
526 	ctrl_hdlr = &ov9734->ctrl_handler;
527 	ret = v4l2_ctrl_handler_init(ctrl_hdlr, 8);
528 	if (ret)
529 		return ret;
530 
531 	ctrl_hdlr->lock = &ov9734->mutex;
532 	cur_mode = ov9734->cur_mode;
533 	size = ARRAY_SIZE(link_freq_menu_items);
534 	ov9734->link_freq = v4l2_ctrl_new_int_menu(ctrl_hdlr, &ov9734_ctrl_ops,
535 						   V4L2_CID_LINK_FREQ,
536 						   size - 1, 0,
537 						   link_freq_menu_items);
538 	if (ov9734->link_freq)
539 		ov9734->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
540 
541 	pixel_rate = to_pixel_rate(OV9734_LINK_FREQ_180MHZ_INDEX);
542 	ov9734->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &ov9734_ctrl_ops,
543 					       V4L2_CID_PIXEL_RATE, 0,
544 					       pixel_rate, 1, pixel_rate);
545 	vblank_min = cur_mode->vts_min - cur_mode->height;
546 	vblank_max = OV9734_VTS_MAX - cur_mode->height;
547 	vblank_default = cur_mode->vts_def - cur_mode->height;
548 	ov9734->vblank = v4l2_ctrl_new_std(ctrl_hdlr, &ov9734_ctrl_ops,
549 					   V4L2_CID_VBLANK, vblank_min,
550 					   vblank_max, 1, vblank_default);
551 	h_blank = to_pixels_per_line(cur_mode->hts, cur_mode->link_freq_index);
552 	h_blank -= cur_mode->width;
553 	ov9734->hblank = v4l2_ctrl_new_std(ctrl_hdlr, &ov9734_ctrl_ops,
554 					   V4L2_CID_HBLANK, h_blank, h_blank, 1,
555 					   h_blank);
556 	if (ov9734->hblank)
557 		ov9734->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
558 
559 	v4l2_ctrl_new_std(ctrl_hdlr, &ov9734_ctrl_ops, V4L2_CID_ANALOGUE_GAIN,
560 			  OV9734_ANAL_GAIN_MIN, OV9734_ANAL_GAIN_MAX,
561 			  OV9734_ANAL_GAIN_STEP, OV9734_ANAL_GAIN_MIN);
562 	v4l2_ctrl_new_std(ctrl_hdlr, &ov9734_ctrl_ops, V4L2_CID_DIGITAL_GAIN,
563 			  OV9734_DGTL_GAIN_MIN, OV9734_DGTL_GAIN_MAX,
564 			  OV9734_DGTL_GAIN_STEP, OV9734_DGTL_GAIN_DEFAULT);
565 	exposure_max = ov9734->cur_mode->vts_def - OV9734_EXPOSURE_MAX_MARGIN;
566 	ov9734->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &ov9734_ctrl_ops,
567 					     V4L2_CID_EXPOSURE,
568 					     OV9734_EXPOSURE_MIN, exposure_max,
569 					     OV9734_EXPOSURE_STEP,
570 					     exposure_max);
571 	v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &ov9734_ctrl_ops,
572 				     V4L2_CID_TEST_PATTERN,
573 				     ARRAY_SIZE(ov9734_test_pattern_menu) - 1,
574 				     0, 0, ov9734_test_pattern_menu);
575 	if (ctrl_hdlr->error)
576 		return ctrl_hdlr->error;
577 
578 	ov9734->sd.ctrl_handler = ctrl_hdlr;
579 
580 	return 0;
581 }
582 
583 static void ov9734_update_pad_format(const struct ov9734_mode *mode,
584 				     struct v4l2_mbus_framefmt *fmt)
585 {
586 	fmt->width = mode->width;
587 	fmt->height = mode->height;
588 	fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10;
589 	fmt->field = V4L2_FIELD_NONE;
590 }
591 
592 static int ov9734_start_streaming(struct ov9734 *ov9734)
593 {
594 	struct i2c_client *client = v4l2_get_subdevdata(&ov9734->sd);
595 	const struct ov9734_reg_list *reg_list;
596 	int link_freq_index, ret;
597 
598 	link_freq_index = ov9734->cur_mode->link_freq_index;
599 	reg_list = &link_freq_configs[link_freq_index].reg_list;
600 	ret = ov9734_write_reg_list(ov9734, reg_list);
601 	if (ret) {
602 		dev_err(&client->dev, "failed to set plls");
603 		return ret;
604 	}
605 
606 	reg_list = &ov9734->cur_mode->reg_list;
607 	ret = ov9734_write_reg_list(ov9734, reg_list);
608 	if (ret) {
609 		dev_err(&client->dev, "failed to set mode");
610 		return ret;
611 	}
612 
613 	ret = __v4l2_ctrl_handler_setup(ov9734->sd.ctrl_handler);
614 	if (ret)
615 		return ret;
616 
617 	ret = ov9734_write_reg(ov9734, OV9734_REG_MODE_SELECT,
618 			       1, OV9734_MODE_STREAMING);
619 	if (ret)
620 		dev_err(&client->dev, "failed to start stream");
621 
622 	return ret;
623 }
624 
625 static void ov9734_stop_streaming(struct ov9734 *ov9734)
626 {
627 	struct i2c_client *client = v4l2_get_subdevdata(&ov9734->sd);
628 
629 	if (ov9734_write_reg(ov9734, OV9734_REG_MODE_SELECT,
630 			     1, OV9734_MODE_STANDBY))
631 		dev_err(&client->dev, "failed to stop stream");
632 }
633 
634 static int ov9734_set_stream(struct v4l2_subdev *sd, int enable)
635 {
636 	struct ov9734 *ov9734 = to_ov9734(sd);
637 	struct i2c_client *client = v4l2_get_subdevdata(sd);
638 	int ret = 0;
639 
640 	mutex_lock(&ov9734->mutex);
641 	if (ov9734->streaming == enable) {
642 		mutex_unlock(&ov9734->mutex);
643 		return 0;
644 	}
645 
646 	if (enable) {
647 		ret = pm_runtime_resume_and_get(&client->dev);
648 		if (ret < 0) {
649 			mutex_unlock(&ov9734->mutex);
650 			return ret;
651 		}
652 
653 		ret = ov9734_start_streaming(ov9734);
654 		if (ret) {
655 			enable = 0;
656 			ov9734_stop_streaming(ov9734);
657 			pm_runtime_put(&client->dev);
658 		}
659 	} else {
660 		ov9734_stop_streaming(ov9734);
661 		pm_runtime_put(&client->dev);
662 	}
663 
664 	ov9734->streaming = enable;
665 	mutex_unlock(&ov9734->mutex);
666 
667 	return ret;
668 }
669 
670 static int __maybe_unused ov9734_suspend(struct device *dev)
671 {
672 	struct i2c_client *client = to_i2c_client(dev);
673 	struct v4l2_subdev *sd = i2c_get_clientdata(client);
674 	struct ov9734 *ov9734 = to_ov9734(sd);
675 
676 	mutex_lock(&ov9734->mutex);
677 	if (ov9734->streaming)
678 		ov9734_stop_streaming(ov9734);
679 
680 	mutex_unlock(&ov9734->mutex);
681 
682 	return 0;
683 }
684 
685 static int __maybe_unused ov9734_resume(struct device *dev)
686 {
687 	struct i2c_client *client = to_i2c_client(dev);
688 	struct v4l2_subdev *sd = i2c_get_clientdata(client);
689 	struct ov9734 *ov9734 = to_ov9734(sd);
690 	int ret = 0;
691 
692 	mutex_lock(&ov9734->mutex);
693 	if (!ov9734->streaming)
694 		goto exit;
695 
696 	ret = ov9734_start_streaming(ov9734);
697 	if (ret) {
698 		ov9734->streaming = false;
699 		ov9734_stop_streaming(ov9734);
700 	}
701 
702 exit:
703 	mutex_unlock(&ov9734->mutex);
704 	return ret;
705 }
706 
707 static int ov9734_set_format(struct v4l2_subdev *sd,
708 			     struct v4l2_subdev_state *sd_state,
709 			     struct v4l2_subdev_format *fmt)
710 {
711 	struct ov9734 *ov9734 = to_ov9734(sd);
712 	const struct ov9734_mode *mode;
713 	s32 vblank_def, h_blank;
714 
715 	mode = v4l2_find_nearest_size(supported_modes,
716 				      ARRAY_SIZE(supported_modes), width,
717 				      height, fmt->format.width,
718 				      fmt->format.height);
719 
720 	mutex_lock(&ov9734->mutex);
721 	ov9734_update_pad_format(mode, &fmt->format);
722 	if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
723 		*v4l2_subdev_get_try_format(sd, sd_state, fmt->pad) = fmt->format;
724 	} else {
725 		ov9734->cur_mode = mode;
726 		__v4l2_ctrl_s_ctrl(ov9734->link_freq, mode->link_freq_index);
727 		__v4l2_ctrl_s_ctrl_int64(ov9734->pixel_rate,
728 					 to_pixel_rate(mode->link_freq_index));
729 
730 		/* Update limits and set FPS to default */
731 		vblank_def = mode->vts_def - mode->height;
732 		__v4l2_ctrl_modify_range(ov9734->vblank,
733 					 mode->vts_min - mode->height,
734 					 OV9734_VTS_MAX - mode->height, 1,
735 					 vblank_def);
736 		__v4l2_ctrl_s_ctrl(ov9734->vblank, vblank_def);
737 		h_blank = to_pixels_per_line(mode->hts, mode->link_freq_index) -
738 			mode->width;
739 		__v4l2_ctrl_modify_range(ov9734->hblank, h_blank, h_blank, 1,
740 					 h_blank);
741 	}
742 
743 	mutex_unlock(&ov9734->mutex);
744 
745 	return 0;
746 }
747 
748 static int ov9734_get_format(struct v4l2_subdev *sd,
749 			     struct v4l2_subdev_state *sd_state,
750 			     struct v4l2_subdev_format *fmt)
751 {
752 	struct ov9734 *ov9734 = to_ov9734(sd);
753 
754 	mutex_lock(&ov9734->mutex);
755 	if (fmt->which == V4L2_SUBDEV_FORMAT_TRY)
756 		fmt->format = *v4l2_subdev_get_try_format(&ov9734->sd,
757 							  sd_state,
758 							  fmt->pad);
759 	else
760 		ov9734_update_pad_format(ov9734->cur_mode, &fmt->format);
761 
762 	mutex_unlock(&ov9734->mutex);
763 
764 	return 0;
765 }
766 
767 static int ov9734_enum_mbus_code(struct v4l2_subdev *sd,
768 				 struct v4l2_subdev_state *sd_state,
769 				 struct v4l2_subdev_mbus_code_enum *code)
770 {
771 	if (code->index > 0)
772 		return -EINVAL;
773 
774 	code->code = MEDIA_BUS_FMT_SGRBG10_1X10;
775 
776 	return 0;
777 }
778 
779 static int ov9734_enum_frame_size(struct v4l2_subdev *sd,
780 				  struct v4l2_subdev_state *sd_state,
781 				  struct v4l2_subdev_frame_size_enum *fse)
782 {
783 	if (fse->index >= ARRAY_SIZE(supported_modes))
784 		return -EINVAL;
785 
786 	if (fse->code != MEDIA_BUS_FMT_SGRBG10_1X10)
787 		return -EINVAL;
788 
789 	fse->min_width = supported_modes[fse->index].width;
790 	fse->max_width = fse->min_width;
791 	fse->min_height = supported_modes[fse->index].height;
792 	fse->max_height = fse->min_height;
793 
794 	return 0;
795 }
796 
797 static int ov9734_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
798 {
799 	struct ov9734 *ov9734 = to_ov9734(sd);
800 
801 	mutex_lock(&ov9734->mutex);
802 	ov9734_update_pad_format(&supported_modes[0],
803 				 v4l2_subdev_get_try_format(sd, fh->state, 0));
804 	mutex_unlock(&ov9734->mutex);
805 
806 	return 0;
807 }
808 
809 static const struct v4l2_subdev_video_ops ov9734_video_ops = {
810 	.s_stream = ov9734_set_stream,
811 };
812 
813 static const struct v4l2_subdev_pad_ops ov9734_pad_ops = {
814 	.set_fmt = ov9734_set_format,
815 	.get_fmt = ov9734_get_format,
816 	.enum_mbus_code = ov9734_enum_mbus_code,
817 	.enum_frame_size = ov9734_enum_frame_size,
818 };
819 
820 static const struct v4l2_subdev_ops ov9734_subdev_ops = {
821 	.video = &ov9734_video_ops,
822 	.pad = &ov9734_pad_ops,
823 };
824 
825 static const struct media_entity_operations ov9734_subdev_entity_ops = {
826 	.link_validate = v4l2_subdev_link_validate,
827 };
828 
829 static const struct v4l2_subdev_internal_ops ov9734_internal_ops = {
830 	.open = ov9734_open,
831 };
832 
833 static int ov9734_identify_module(struct ov9734 *ov9734)
834 {
835 	struct i2c_client *client = v4l2_get_subdevdata(&ov9734->sd);
836 	int ret;
837 	u32 val;
838 
839 	ret = ov9734_read_reg(ov9734, OV9734_REG_CHIP_ID, 2, &val);
840 	if (ret)
841 		return ret;
842 
843 	if (val != OV9734_CHIP_ID) {
844 		dev_err(&client->dev, "chip id mismatch: %x!=%x",
845 			OV9734_CHIP_ID, val);
846 		return -ENXIO;
847 	}
848 
849 	return 0;
850 }
851 
852 static int ov9734_check_hwcfg(struct device *dev)
853 {
854 	struct fwnode_handle *ep;
855 	struct fwnode_handle *fwnode = dev_fwnode(dev);
856 	struct v4l2_fwnode_endpoint bus_cfg = {
857 		.bus_type = V4L2_MBUS_CSI2_DPHY
858 	};
859 	u32 mclk;
860 	int ret;
861 	unsigned int i, j;
862 
863 	if (!fwnode)
864 		return -ENXIO;
865 
866 	ret = fwnode_property_read_u32(fwnode, "clock-frequency", &mclk);
867 	if (ret)
868 		return ret;
869 
870 	if (mclk != OV9734_MCLK) {
871 		dev_err(dev, "external clock %d is not supported", mclk);
872 		return -EINVAL;
873 	}
874 
875 	ep = fwnode_graph_get_next_endpoint(fwnode, NULL);
876 	if (!ep)
877 		return -ENXIO;
878 
879 	ret = v4l2_fwnode_endpoint_alloc_parse(ep, &bus_cfg);
880 	fwnode_handle_put(ep);
881 	if (ret)
882 		return ret;
883 
884 	if (!bus_cfg.nr_of_link_frequencies) {
885 		dev_err(dev, "no link frequencies defined");
886 		ret = -EINVAL;
887 		goto check_hwcfg_error;
888 	}
889 
890 	for (i = 0; i < ARRAY_SIZE(link_freq_menu_items); i++) {
891 		for (j = 0; j < bus_cfg.nr_of_link_frequencies; j++) {
892 			if (link_freq_menu_items[i] ==
893 			    bus_cfg.link_frequencies[j])
894 				break;
895 		}
896 
897 		if (j == bus_cfg.nr_of_link_frequencies) {
898 			dev_err(dev, "no link frequency %lld supported",
899 				link_freq_menu_items[i]);
900 			ret = -EINVAL;
901 			goto check_hwcfg_error;
902 		}
903 	}
904 
905 check_hwcfg_error:
906 	v4l2_fwnode_endpoint_free(&bus_cfg);
907 
908 	return ret;
909 }
910 
911 static int ov9734_remove(struct i2c_client *client)
912 {
913 	struct v4l2_subdev *sd = i2c_get_clientdata(client);
914 	struct ov9734 *ov9734 = to_ov9734(sd);
915 
916 	v4l2_async_unregister_subdev(sd);
917 	media_entity_cleanup(&sd->entity);
918 	v4l2_ctrl_handler_free(sd->ctrl_handler);
919 	pm_runtime_disable(&client->dev);
920 	mutex_destroy(&ov9734->mutex);
921 
922 	return 0;
923 }
924 
925 static int ov9734_probe(struct i2c_client *client)
926 {
927 	struct ov9734 *ov9734;
928 	int ret;
929 
930 	ret = ov9734_check_hwcfg(&client->dev);
931 	if (ret) {
932 		dev_err(&client->dev, "failed to check HW configuration: %d",
933 			ret);
934 		return ret;
935 	}
936 
937 	ov9734 = devm_kzalloc(&client->dev, sizeof(*ov9734), GFP_KERNEL);
938 	if (!ov9734)
939 		return -ENOMEM;
940 
941 	v4l2_i2c_subdev_init(&ov9734->sd, client, &ov9734_subdev_ops);
942 	ret = ov9734_identify_module(ov9734);
943 	if (ret) {
944 		dev_err(&client->dev, "failed to find sensor: %d", ret);
945 		return ret;
946 	}
947 
948 	mutex_init(&ov9734->mutex);
949 	ov9734->cur_mode = &supported_modes[0];
950 	ret = ov9734_init_controls(ov9734);
951 	if (ret) {
952 		dev_err(&client->dev, "failed to init controls: %d", ret);
953 		goto probe_error_v4l2_ctrl_handler_free;
954 	}
955 
956 	ov9734->sd.internal_ops = &ov9734_internal_ops;
957 	ov9734->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
958 	ov9734->sd.entity.ops = &ov9734_subdev_entity_ops;
959 	ov9734->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
960 	ov9734->pad.flags = MEDIA_PAD_FL_SOURCE;
961 	ret = media_entity_pads_init(&ov9734->sd.entity, 1, &ov9734->pad);
962 	if (ret) {
963 		dev_err(&client->dev, "failed to init entity pads: %d", ret);
964 		goto probe_error_v4l2_ctrl_handler_free;
965 	}
966 
967 	ret = v4l2_async_register_subdev_sensor(&ov9734->sd);
968 	if (ret < 0) {
969 		dev_err(&client->dev, "failed to register V4L2 subdev: %d",
970 			ret);
971 		goto probe_error_media_entity_cleanup;
972 	}
973 
974 	/*
975 	 * Device is already turned on by i2c-core with ACPI domain PM.
976 	 * Enable runtime PM and turn off the device.
977 	 */
978 	pm_runtime_set_active(&client->dev);
979 	pm_runtime_enable(&client->dev);
980 	pm_runtime_idle(&client->dev);
981 
982 	return 0;
983 
984 probe_error_media_entity_cleanup:
985 	media_entity_cleanup(&ov9734->sd.entity);
986 
987 probe_error_v4l2_ctrl_handler_free:
988 	v4l2_ctrl_handler_free(ov9734->sd.ctrl_handler);
989 	mutex_destroy(&ov9734->mutex);
990 
991 	return ret;
992 }
993 
994 static const struct dev_pm_ops ov9734_pm_ops = {
995 	SET_SYSTEM_SLEEP_PM_OPS(ov9734_suspend, ov9734_resume)
996 };
997 
998 static const struct acpi_device_id ov9734_acpi_ids[] = {
999 	{ "OVTI9734", },
1000 	{}
1001 };
1002 
1003 MODULE_DEVICE_TABLE(acpi, ov9734_acpi_ids);
1004 
1005 static struct i2c_driver ov9734_i2c_driver = {
1006 	.driver = {
1007 		.name = "ov9734",
1008 		.pm = &ov9734_pm_ops,
1009 		.acpi_match_table = ov9734_acpi_ids,
1010 	},
1011 	.probe_new = ov9734_probe,
1012 	.remove = ov9734_remove,
1013 };
1014 
1015 module_i2c_driver(ov9734_i2c_driver);
1016 
1017 MODULE_AUTHOR("Qiu, Tianshu <tian.shu.qiu@intel.com>");
1018 MODULE_AUTHOR("Bingbu Cao <bingbu.cao@intel.com>");
1019 MODULE_DESCRIPTION("OmniVision OV9734 sensor driver");
1020 MODULE_LICENSE("GPL v2");
1021