1 // SPDX-License-Identifier: GPL-2.0 2 // Copyright (c) 2019 Intel Corporation. 3 4 #include <asm/unaligned.h> 5 #include <linux/acpi.h> 6 #include <linux/clk.h> 7 #include <linux/delay.h> 8 #include <linux/gpio/consumer.h> 9 #include <linux/i2c.h> 10 #include <linux/module.h> 11 #include <linux/pm_runtime.h> 12 #include <linux/regulator/consumer.h> 13 #include <media/v4l2-ctrls.h> 14 #include <media/v4l2-device.h> 15 #include <media/v4l2-fwnode.h> 16 17 #define OV8856_REG_VALUE_08BIT 1 18 #define OV8856_REG_VALUE_16BIT 2 19 #define OV8856_REG_VALUE_24BIT 3 20 21 #define OV8856_SCLK 144000000ULL 22 #define OV8856_XVCLK_19_2 19200000 23 #define OV8856_DATA_LANES 4 24 #define OV8856_RGB_DEPTH 10 25 26 #define OV8856_REG_CHIP_ID 0x300a 27 #define OV8856_CHIP_ID 0x00885a 28 29 #define OV8856_REG_MODE_SELECT 0x0100 30 #define OV8856_MODE_STANDBY 0x00 31 #define OV8856_MODE_STREAMING 0x01 32 33 /* module revisions */ 34 #define OV8856_2A_MODULE 0x01 35 #define OV8856_1B_MODULE 0x02 36 37 /* the OTP read-out buffer is at 0x7000 and 0xf is the offset 38 * of the byte in the OTP that means the module revision 39 */ 40 #define OV8856_MODULE_REVISION 0x700f 41 #define OV8856_OTP_MODE_CTRL 0x3d84 42 #define OV8856_OTP_LOAD_CTRL 0x3d81 43 #define OV8856_OTP_MODE_AUTO 0x00 44 #define OV8856_OTP_LOAD_CTRL_ENABLE BIT(0) 45 46 /* vertical-timings from sensor */ 47 #define OV8856_REG_VTS 0x380e 48 #define OV8856_VTS_MAX 0x7fff 49 50 /* horizontal-timings from sensor */ 51 #define OV8856_REG_HTS 0x380c 52 53 /* Exposure controls from sensor */ 54 #define OV8856_REG_EXPOSURE 0x3500 55 #define OV8856_EXPOSURE_MIN 6 56 #define OV8856_EXPOSURE_MAX_MARGIN 6 57 #define OV8856_EXPOSURE_STEP 1 58 59 /* Analog gain controls from sensor */ 60 #define OV8856_REG_ANALOG_GAIN 0x3508 61 #define OV8856_ANAL_GAIN_MIN 128 62 #define OV8856_ANAL_GAIN_MAX 2047 63 #define OV8856_ANAL_GAIN_STEP 1 64 65 /* Digital gain controls from sensor */ 66 #define OV8856_REG_DIGITAL_GAIN 0x350a 67 #define OV8856_REG_MWB_R_GAIN 0x5019 68 #define OV8856_REG_MWB_G_GAIN 0x501b 69 #define OV8856_REG_MWB_B_GAIN 0x501d 70 #define OV8856_DGTL_GAIN_MIN 0 71 #define OV8856_DGTL_GAIN_MAX 4095 72 #define OV8856_DGTL_GAIN_STEP 1 73 #define OV8856_DGTL_GAIN_DEFAULT 1024 74 75 /* Test Pattern Control */ 76 #define OV8856_REG_TEST_PATTERN 0x5e00 77 #define OV8856_TEST_PATTERN_ENABLE BIT(7) 78 #define OV8856_TEST_PATTERN_BAR_SHIFT 2 79 80 #define NUM_REGS 7 81 #define NUM_MODE_REGS 187 82 #define NUM_MODE_REGS_2 200 83 84 /* Flip Mirror Controls from sensor */ 85 #define OV8856_REG_FORMAT1 0x3820 86 #define OV8856_REG_FORMAT2 0x3821 87 #define OV8856_REG_FORMAT1_OP_1 BIT(1) 88 #define OV8856_REG_FORMAT1_OP_2 BIT(2) 89 #define OV8856_REG_FORMAT1_OP_3 BIT(6) 90 #define OV8856_REG_FORMAT2_OP_1 BIT(1) 91 #define OV8856_REG_FORMAT2_OP_2 BIT(2) 92 #define OV8856_REG_FORMAT2_OP_3 BIT(6) 93 #define OV8856_REG_FLIP_OPT_1 0x376b 94 #define OV8856_REG_FLIP_OPT_2 0x5001 95 #define OV8856_REG_FLIP_OPT_3 0x502e 96 #define OV8856_REG_MIRROR_OPT_1 0x5004 97 #define OV8856_REG_FLIP_OP_0 BIT(0) 98 #define OV8856_REG_FLIP_OP_1 BIT(1) 99 #define OV8856_REG_FLIP_OP_2 BIT(2) 100 #define OV8856_REG_MIRROR_OP_1 BIT(1) 101 #define OV8856_REG_MIRROR_OP_2 BIT(2) 102 103 #define to_ov8856(_sd) container_of(_sd, struct ov8856, sd) 104 105 static const char * const ov8856_supply_names[] = { 106 "dovdd", /* Digital I/O power */ 107 "avdd", /* Analog power */ 108 "dvdd", /* Digital core power */ 109 }; 110 111 enum { 112 OV8856_MEDIA_BUS_FMT_SBGGR10_1X10, 113 OV8856_MEDIA_BUS_FMT_SGRBG10_1X10, 114 }; 115 116 struct ov8856_reg { 117 u16 address; 118 u8 val; 119 }; 120 121 struct ov8856_reg_list { 122 u32 num_of_regs; 123 const struct ov8856_reg *regs; 124 }; 125 126 struct ov8856_link_freq_config { 127 const struct ov8856_reg_list reg_list; 128 }; 129 130 struct ov8856_mode { 131 /* Frame width in pixels */ 132 u32 width; 133 134 /* Frame height in pixels */ 135 u32 height; 136 137 /* Horizontal timining size */ 138 u32 hts; 139 140 /* Default vertical timining size */ 141 u32 vts_def; 142 143 /* Min vertical timining size */ 144 u32 vts_min; 145 146 /* Link frequency needed for this resolution */ 147 u32 link_freq_index; 148 149 /* Sensor register settings for this resolution */ 150 const struct ov8856_reg_list reg_list; 151 152 /* Number of data lanes */ 153 u8 data_lanes; 154 155 /* Default MEDIA_BUS_FMT for this mode */ 156 u32 default_mbus_index; 157 }; 158 159 struct ov8856_mipi_data_rates { 160 const struct ov8856_reg regs_0[NUM_REGS]; 161 const struct ov8856_reg regs_1[NUM_REGS]; 162 }; 163 164 static const struct ov8856_mipi_data_rates mipi_data_rate_lane_2 = { 165 //mipi_data_rate_1440mbps 166 { 167 {0x0103, 0x01}, 168 {0x0100, 0x00}, 169 {0x0302, 0x43}, 170 {0x0303, 0x00}, 171 {0x030b, 0x02}, 172 {0x030d, 0x4b}, 173 {0x031e, 0x0c} 174 }, 175 //mipi_data_rate_720mbps 176 { 177 {0x0103, 0x01}, 178 {0x0100, 0x00}, 179 {0x0302, 0x4b}, 180 {0x0303, 0x01}, 181 {0x030b, 0x02}, 182 {0x030d, 0x4b}, 183 {0x031e, 0x0c} 184 } 185 }; 186 187 static const struct ov8856_mipi_data_rates mipi_data_rate_lane_4 = { 188 //mipi_data_rate_720mbps 189 { 190 {0x0103, 0x01}, 191 {0x0100, 0x00}, 192 {0x0302, 0x4b}, 193 {0x0303, 0x01}, 194 {0x030b, 0x02}, 195 {0x030d, 0x4b}, 196 {0x031e, 0x0c} 197 }, 198 //mipi_data_rate_360mbps 199 { 200 {0x0103, 0x01}, 201 {0x0100, 0x00}, 202 {0x0302, 0x4b}, 203 {0x0303, 0x03}, 204 {0x030b, 0x02}, 205 {0x030d, 0x4b}, 206 {0x031e, 0x0c} 207 } 208 }; 209 210 static const struct ov8856_reg lane_2_mode_3280x2464[] = { 211 /* 3280x2464 resolution */ 212 {0x3000, 0x20}, 213 {0x3003, 0x08}, 214 {0x300e, 0x20}, 215 {0x3010, 0x00}, 216 {0x3015, 0x84}, 217 {0x3018, 0x32}, 218 {0x3021, 0x23}, 219 {0x3033, 0x24}, 220 {0x3500, 0x00}, 221 {0x3501, 0x9a}, 222 {0x3502, 0x20}, 223 {0x3503, 0x08}, 224 {0x3505, 0x83}, 225 {0x3508, 0x01}, 226 {0x3509, 0x80}, 227 {0x350c, 0x00}, 228 {0x350d, 0x80}, 229 {0x350e, 0x04}, 230 {0x350f, 0x00}, 231 {0x3510, 0x00}, 232 {0x3511, 0x02}, 233 {0x3512, 0x00}, 234 {0x3600, 0x72}, 235 {0x3601, 0x40}, 236 {0x3602, 0x30}, 237 {0x3610, 0xc5}, 238 {0x3611, 0x58}, 239 {0x3612, 0x5c}, 240 {0x3613, 0xca}, 241 {0x3614, 0x50}, 242 {0x3628, 0xff}, 243 {0x3629, 0xff}, 244 {0x362a, 0xff}, 245 {0x3633, 0x10}, 246 {0x3634, 0x10}, 247 {0x3635, 0x10}, 248 {0x3636, 0x10}, 249 {0x3663, 0x08}, 250 {0x3669, 0x34}, 251 {0x366e, 0x10}, 252 {0x3706, 0x86}, 253 {0x370b, 0x7e}, 254 {0x3714, 0x23}, 255 {0x3730, 0x12}, 256 {0x3733, 0x10}, 257 {0x3764, 0x00}, 258 {0x3765, 0x00}, 259 {0x3769, 0x62}, 260 {0x376a, 0x2a}, 261 {0x376b, 0x30}, 262 {0x3780, 0x00}, 263 {0x3781, 0x24}, 264 {0x3782, 0x00}, 265 {0x3783, 0x23}, 266 {0x3798, 0x2f}, 267 {0x37a1, 0x60}, 268 {0x37a8, 0x6a}, 269 {0x37ab, 0x3f}, 270 {0x37c2, 0x04}, 271 {0x37c3, 0xf1}, 272 {0x37c9, 0x80}, 273 {0x37cb, 0x16}, 274 {0x37cc, 0x16}, 275 {0x37cd, 0x16}, 276 {0x37ce, 0x16}, 277 {0x3800, 0x00}, 278 {0x3801, 0x00}, 279 {0x3802, 0x00}, 280 {0x3803, 0x06}, 281 {0x3804, 0x0c}, 282 {0x3805, 0xdf}, 283 {0x3806, 0x09}, 284 {0x3807, 0xa7}, 285 {0x3808, 0x0c}, 286 {0x3809, 0xd0}, 287 {0x380a, 0x09}, 288 {0x380b, 0xa0}, 289 {0x380c, 0x07}, 290 {0x380d, 0x88}, 291 {0x380e, 0x09}, 292 {0x380f, 0xb8}, 293 {0x3810, 0x00}, 294 {0x3811, 0x00}, 295 {0x3812, 0x00}, 296 {0x3813, 0x01}, 297 {0x3814, 0x01}, 298 {0x3815, 0x01}, 299 {0x3816, 0x00}, 300 {0x3817, 0x00}, 301 {0x3818, 0x00}, 302 {0x3819, 0x00}, 303 {0x3820, 0x80}, 304 {0x3821, 0x46}, 305 {0x382a, 0x01}, 306 {0x382b, 0x01}, 307 {0x3830, 0x06}, 308 {0x3836, 0x02}, 309 {0x3837, 0x10}, 310 {0x3862, 0x04}, 311 {0x3863, 0x08}, 312 {0x3cc0, 0x33}, 313 {0x3d85, 0x14}, 314 {0x3d8c, 0x73}, 315 {0x3d8d, 0xde}, 316 {0x4001, 0xe0}, 317 {0x4003, 0x40}, 318 {0x4008, 0x00}, 319 {0x4009, 0x0b}, 320 {0x400a, 0x00}, 321 {0x400b, 0x84}, 322 {0x400f, 0x80}, 323 {0x4010, 0xf0}, 324 {0x4011, 0xff}, 325 {0x4012, 0x02}, 326 {0x4013, 0x01}, 327 {0x4014, 0x01}, 328 {0x4015, 0x01}, 329 {0x4042, 0x00}, 330 {0x4043, 0x80}, 331 {0x4044, 0x00}, 332 {0x4045, 0x80}, 333 {0x4046, 0x00}, 334 {0x4047, 0x80}, 335 {0x4048, 0x00}, 336 {0x4049, 0x80}, 337 {0x4041, 0x03}, 338 {0x404c, 0x20}, 339 {0x404d, 0x00}, 340 {0x404e, 0x20}, 341 {0x4203, 0x80}, 342 {0x4307, 0x30}, 343 {0x4317, 0x00}, 344 {0x4503, 0x08}, 345 {0x4601, 0x80}, 346 {0x4800, 0x44}, 347 {0x4816, 0x53}, 348 {0x481b, 0x58}, 349 {0x481f, 0x27}, 350 {0x4837, 0x0c}, 351 {0x483c, 0x0f}, 352 {0x484b, 0x05}, 353 {0x5000, 0x57}, 354 {0x5001, 0x0a}, 355 {0x5004, 0x06}, 356 {0x502e, 0x03}, 357 {0x5030, 0x41}, 358 {0x5795, 0x02}, 359 {0x5796, 0x20}, 360 {0x5797, 0x20}, 361 {0x5798, 0xd5}, 362 {0x5799, 0xd5}, 363 {0x579a, 0x00}, 364 {0x579b, 0x50}, 365 {0x579c, 0x00}, 366 {0x579d, 0x2c}, 367 {0x579e, 0x0c}, 368 {0x579f, 0x40}, 369 {0x57a0, 0x09}, 370 {0x57a1, 0x40}, 371 {0x5780, 0x14}, 372 {0x5781, 0x0f}, 373 {0x5782, 0x44}, 374 {0x5783, 0x02}, 375 {0x5784, 0x01}, 376 {0x5785, 0x01}, 377 {0x5786, 0x00}, 378 {0x5787, 0x04}, 379 {0x5788, 0x02}, 380 {0x5789, 0x0f}, 381 {0x578a, 0xfd}, 382 {0x578b, 0xf5}, 383 {0x578c, 0xf5}, 384 {0x578d, 0x03}, 385 {0x578e, 0x08}, 386 {0x578f, 0x0c}, 387 {0x5790, 0x08}, 388 {0x5791, 0x04}, 389 {0x5792, 0x00}, 390 {0x5793, 0x52}, 391 {0x5794, 0xa3}, 392 {0x59f8, 0x3d}, 393 {0x5a08, 0x02}, 394 {0x5b00, 0x02}, 395 {0x5b01, 0x10}, 396 {0x5b02, 0x03}, 397 {0x5b03, 0xcf}, 398 {0x5b05, 0x6c}, 399 {0x5e00, 0x00} 400 }; 401 402 static const struct ov8856_reg lane_2_mode_1640x1232[] = { 403 /* 1640x1232 resolution */ 404 {0x3000, 0x20}, 405 {0x3003, 0x08}, 406 {0x300e, 0x20}, 407 {0x3010, 0x00}, 408 {0x3015, 0x84}, 409 {0x3018, 0x32}, 410 {0x3021, 0x23}, 411 {0x3033, 0x24}, 412 {0x3500, 0x00}, 413 {0x3501, 0x4c}, 414 {0x3502, 0xe0}, 415 {0x3503, 0x08}, 416 {0x3505, 0x83}, 417 {0x3508, 0x01}, 418 {0x3509, 0x80}, 419 {0x350c, 0x00}, 420 {0x350d, 0x80}, 421 {0x350e, 0x04}, 422 {0x350f, 0x00}, 423 {0x3510, 0x00}, 424 {0x3511, 0x02}, 425 {0x3512, 0x00}, 426 {0x3600, 0x72}, 427 {0x3601, 0x40}, 428 {0x3602, 0x30}, 429 {0x3610, 0xc5}, 430 {0x3611, 0x58}, 431 {0x3612, 0x5c}, 432 {0x3613, 0xca}, 433 {0x3614, 0x50}, 434 {0x3628, 0xff}, 435 {0x3629, 0xff}, 436 {0x362a, 0xff}, 437 {0x3633, 0x10}, 438 {0x3634, 0x10}, 439 {0x3635, 0x10}, 440 {0x3636, 0x10}, 441 {0x3663, 0x08}, 442 {0x3669, 0x34}, 443 {0x366e, 0x08}, 444 {0x3706, 0x86}, 445 {0x370b, 0x7e}, 446 {0x3714, 0x27}, 447 {0x3730, 0x12}, 448 {0x3733, 0x10}, 449 {0x3764, 0x00}, 450 {0x3765, 0x00}, 451 {0x3769, 0x62}, 452 {0x376a, 0x2a}, 453 {0x376b, 0x30}, 454 {0x3780, 0x00}, 455 {0x3781, 0x24}, 456 {0x3782, 0x00}, 457 {0x3783, 0x23}, 458 {0x3798, 0x2f}, 459 {0x37a1, 0x60}, 460 {0x37a8, 0x6a}, 461 {0x37ab, 0x3f}, 462 {0x37c2, 0x14}, 463 {0x37c3, 0xf1}, 464 {0x37c9, 0x80}, 465 {0x37cb, 0x16}, 466 {0x37cc, 0x16}, 467 {0x37cd, 0x16}, 468 {0x37ce, 0x16}, 469 {0x3800, 0x00}, 470 {0x3801, 0x00}, 471 {0x3802, 0x00}, 472 {0x3803, 0x00}, 473 {0x3804, 0x0c}, 474 {0x3805, 0xdf}, 475 {0x3806, 0x09}, 476 {0x3807, 0xaf}, 477 {0x3808, 0x06}, 478 {0x3809, 0x68}, 479 {0x380a, 0x04}, 480 {0x380b, 0xd0}, 481 {0x380c, 0x0c}, 482 {0x380d, 0x60}, 483 {0x380e, 0x05}, 484 {0x380f, 0xea}, 485 {0x3810, 0x00}, 486 {0x3811, 0x04}, 487 {0x3812, 0x00}, 488 {0x3813, 0x05}, 489 {0x3814, 0x03}, 490 {0x3815, 0x01}, 491 {0x3816, 0x00}, 492 {0x3817, 0x00}, 493 {0x3818, 0x00}, 494 {0x3819, 0x00}, 495 {0x3820, 0x90}, 496 {0x3821, 0x67}, 497 {0x382a, 0x03}, 498 {0x382b, 0x01}, 499 {0x3830, 0x06}, 500 {0x3836, 0x02}, 501 {0x3837, 0x10}, 502 {0x3862, 0x04}, 503 {0x3863, 0x08}, 504 {0x3cc0, 0x33}, 505 {0x3d85, 0x14}, 506 {0x3d8c, 0x73}, 507 {0x3d8d, 0xde}, 508 {0x4001, 0xe0}, 509 {0x4003, 0x40}, 510 {0x4008, 0x00}, 511 {0x4009, 0x05}, 512 {0x400a, 0x00}, 513 {0x400b, 0x84}, 514 {0x400f, 0x80}, 515 {0x4010, 0xf0}, 516 {0x4011, 0xff}, 517 {0x4012, 0x02}, 518 {0x4013, 0x01}, 519 {0x4014, 0x01}, 520 {0x4015, 0x01}, 521 {0x4042, 0x00}, 522 {0x4043, 0x80}, 523 {0x4044, 0x00}, 524 {0x4045, 0x80}, 525 {0x4046, 0x00}, 526 {0x4047, 0x80}, 527 {0x4048, 0x00}, 528 {0x4049, 0x80}, 529 {0x4041, 0x03}, 530 {0x404c, 0x20}, 531 {0x404d, 0x00}, 532 {0x404e, 0x20}, 533 {0x4203, 0x80}, 534 {0x4307, 0x30}, 535 {0x4317, 0x00}, 536 {0x4503, 0x08}, 537 {0x4601, 0x80}, 538 {0x4800, 0x44}, 539 {0x4816, 0x53}, 540 {0x481b, 0x58}, 541 {0x481f, 0x27}, 542 {0x4837, 0x16}, 543 {0x483c, 0x0f}, 544 {0x484b, 0x05}, 545 {0x5000, 0x57}, 546 {0x5001, 0x0a}, 547 {0x5004, 0x06}, 548 {0x502e, 0x03}, 549 {0x5030, 0x41}, 550 {0x5795, 0x00}, 551 {0x5796, 0x10}, 552 {0x5797, 0x10}, 553 {0x5798, 0x73}, 554 {0x5799, 0x73}, 555 {0x579a, 0x00}, 556 {0x579b, 0x28}, 557 {0x579c, 0x00}, 558 {0x579d, 0x16}, 559 {0x579e, 0x06}, 560 {0x579f, 0x20}, 561 {0x57a0, 0x04}, 562 {0x57a1, 0xa0}, 563 {0x5780, 0x14}, 564 {0x5781, 0x0f}, 565 {0x5782, 0x44}, 566 {0x5783, 0x02}, 567 {0x5784, 0x01}, 568 {0x5785, 0x01}, 569 {0x5786, 0x00}, 570 {0x5787, 0x04}, 571 {0x5788, 0x02}, 572 {0x5789, 0x0f}, 573 {0x578a, 0xfd}, 574 {0x578b, 0xf5}, 575 {0x578c, 0xf5}, 576 {0x578d, 0x03}, 577 {0x578e, 0x08}, 578 {0x578f, 0x0c}, 579 {0x5790, 0x08}, 580 {0x5791, 0x04}, 581 {0x5792, 0x00}, 582 {0x5793, 0x52}, 583 {0x5794, 0xa3}, 584 {0x59f8, 0x3d}, 585 {0x5a08, 0x02}, 586 {0x5b00, 0x02}, 587 {0x5b01, 0x10}, 588 {0x5b02, 0x03}, 589 {0x5b03, 0xcf}, 590 {0x5b05, 0x6c}, 591 {0x5e00, 0x00} 592 }; 593 594 static const struct ov8856_reg lane_4_mode_3280x2464[] = { 595 /* 3280x2464 resolution */ 596 {0x3000, 0x20}, 597 {0x3003, 0x08}, 598 {0x300e, 0x20}, 599 {0x3010, 0x00}, 600 {0x3015, 0x84}, 601 {0x3018, 0x72}, 602 {0x3021, 0x23}, 603 {0x3033, 0x24}, 604 {0x3500, 0x00}, 605 {0x3501, 0x9a}, 606 {0x3502, 0x20}, 607 {0x3503, 0x08}, 608 {0x3505, 0x83}, 609 {0x3508, 0x01}, 610 {0x3509, 0x80}, 611 {0x350c, 0x00}, 612 {0x350d, 0x80}, 613 {0x350e, 0x04}, 614 {0x350f, 0x00}, 615 {0x3510, 0x00}, 616 {0x3511, 0x02}, 617 {0x3512, 0x00}, 618 {0x3600, 0x72}, 619 {0x3601, 0x40}, 620 {0x3602, 0x30}, 621 {0x3610, 0xc5}, 622 {0x3611, 0x58}, 623 {0x3612, 0x5c}, 624 {0x3613, 0xca}, 625 {0x3614, 0x20}, 626 {0x3628, 0xff}, 627 {0x3629, 0xff}, 628 {0x362a, 0xff}, 629 {0x3633, 0x10}, 630 {0x3634, 0x10}, 631 {0x3635, 0x10}, 632 {0x3636, 0x10}, 633 {0x3663, 0x08}, 634 {0x3669, 0x34}, 635 {0x366e, 0x10}, 636 {0x3706, 0x86}, 637 {0x370b, 0x7e}, 638 {0x3714, 0x23}, 639 {0x3730, 0x12}, 640 {0x3733, 0x10}, 641 {0x3764, 0x00}, 642 {0x3765, 0x00}, 643 {0x3769, 0x62}, 644 {0x376a, 0x2a}, 645 {0x376b, 0x30}, 646 {0x3780, 0x00}, 647 {0x3781, 0x24}, 648 {0x3782, 0x00}, 649 {0x3783, 0x23}, 650 {0x3798, 0x2f}, 651 {0x37a1, 0x60}, 652 {0x37a8, 0x6a}, 653 {0x37ab, 0x3f}, 654 {0x37c2, 0x04}, 655 {0x37c3, 0xf1}, 656 {0x37c9, 0x80}, 657 {0x37cb, 0x16}, 658 {0x37cc, 0x16}, 659 {0x37cd, 0x16}, 660 {0x37ce, 0x16}, 661 {0x3800, 0x00}, 662 {0x3801, 0x00}, 663 {0x3802, 0x00}, 664 {0x3803, 0x06}, 665 {0x3804, 0x0c}, 666 {0x3805, 0xdf}, 667 {0x3806, 0x09}, 668 {0x3807, 0xa7}, 669 {0x3808, 0x0c}, 670 {0x3809, 0xd0}, 671 {0x380a, 0x09}, 672 {0x380b, 0xa0}, 673 {0x380c, 0x07}, 674 {0x380d, 0x88}, 675 {0x380e, 0x09}, 676 {0x380f, 0xb8}, 677 {0x3810, 0x00}, 678 {0x3811, 0x00}, 679 {0x3812, 0x00}, 680 {0x3813, 0x01}, 681 {0x3814, 0x01}, 682 {0x3815, 0x01}, 683 {0x3816, 0x00}, 684 {0x3817, 0x00}, 685 {0x3818, 0x00}, 686 {0x3819, 0x10}, 687 {0x3820, 0x80}, 688 {0x3821, 0x46}, 689 {0x382a, 0x01}, 690 {0x382b, 0x01}, 691 {0x3830, 0x06}, 692 {0x3836, 0x02}, 693 {0x3862, 0x04}, 694 {0x3863, 0x08}, 695 {0x3cc0, 0x33}, 696 {0x3d85, 0x17}, 697 {0x3d8c, 0x73}, 698 {0x3d8d, 0xde}, 699 {0x4001, 0xe0}, 700 {0x4003, 0x40}, 701 {0x4008, 0x00}, 702 {0x4009, 0x0b}, 703 {0x400a, 0x00}, 704 {0x400b, 0x84}, 705 {0x400f, 0x80}, 706 {0x4010, 0xf0}, 707 {0x4011, 0xff}, 708 {0x4012, 0x02}, 709 {0x4013, 0x01}, 710 {0x4014, 0x01}, 711 {0x4015, 0x01}, 712 {0x4042, 0x00}, 713 {0x4043, 0x80}, 714 {0x4044, 0x00}, 715 {0x4045, 0x80}, 716 {0x4046, 0x00}, 717 {0x4047, 0x80}, 718 {0x4048, 0x00}, 719 {0x4049, 0x80}, 720 {0x4041, 0x03}, 721 {0x404c, 0x20}, 722 {0x404d, 0x00}, 723 {0x404e, 0x20}, 724 {0x4203, 0x80}, 725 {0x4307, 0x30}, 726 {0x4317, 0x00}, 727 {0x4503, 0x08}, 728 {0x4601, 0x80}, 729 {0x4800, 0x44}, 730 {0x4816, 0x53}, 731 {0x481b, 0x58}, 732 {0x481f, 0x27}, 733 {0x4837, 0x16}, 734 {0x483c, 0x0f}, 735 {0x484b, 0x05}, 736 {0x5000, 0x57}, 737 {0x5001, 0x0a}, 738 {0x5004, 0x06}, 739 {0x502e, 0x03}, 740 {0x5030, 0x41}, 741 {0x5780, 0x14}, 742 {0x5781, 0x0f}, 743 {0x5782, 0x44}, 744 {0x5783, 0x02}, 745 {0x5784, 0x01}, 746 {0x5785, 0x01}, 747 {0x5786, 0x00}, 748 {0x5787, 0x04}, 749 {0x5788, 0x02}, 750 {0x5789, 0x0f}, 751 {0x578a, 0xfd}, 752 {0x578b, 0xf5}, 753 {0x578c, 0xf5}, 754 {0x578d, 0x03}, 755 {0x578e, 0x08}, 756 {0x578f, 0x0c}, 757 {0x5790, 0x08}, 758 {0x5791, 0x04}, 759 {0x5792, 0x00}, 760 {0x5793, 0x52}, 761 {0x5794, 0xa3}, 762 {0x5795, 0x02}, 763 {0x5796, 0x20}, 764 {0x5797, 0x20}, 765 {0x5798, 0xd5}, 766 {0x5799, 0xd5}, 767 {0x579a, 0x00}, 768 {0x579b, 0x50}, 769 {0x579c, 0x00}, 770 {0x579d, 0x2c}, 771 {0x579e, 0x0c}, 772 {0x579f, 0x40}, 773 {0x57a0, 0x09}, 774 {0x57a1, 0x40}, 775 {0x59f8, 0x3d}, 776 {0x5a08, 0x02}, 777 {0x5b00, 0x02}, 778 {0x5b01, 0x10}, 779 {0x5b02, 0x03}, 780 {0x5b03, 0xcf}, 781 {0x5b05, 0x6c}, 782 {0x5e00, 0x00} 783 }; 784 785 static const struct ov8856_reg lane_4_mode_1640x1232[] = { 786 /* 1640x1232 resolution */ 787 {0x3000, 0x20}, 788 {0x3003, 0x08}, 789 {0x300e, 0x20}, 790 {0x3010, 0x00}, 791 {0x3015, 0x84}, 792 {0x3018, 0x72}, 793 {0x3021, 0x23}, 794 {0x3033, 0x24}, 795 {0x3500, 0x00}, 796 {0x3501, 0x4c}, 797 {0x3502, 0xe0}, 798 {0x3503, 0x08}, 799 {0x3505, 0x83}, 800 {0x3508, 0x01}, 801 {0x3509, 0x80}, 802 {0x350c, 0x00}, 803 {0x350d, 0x80}, 804 {0x350e, 0x04}, 805 {0x350f, 0x00}, 806 {0x3510, 0x00}, 807 {0x3511, 0x02}, 808 {0x3512, 0x00}, 809 {0x3600, 0x72}, 810 {0x3601, 0x40}, 811 {0x3602, 0x30}, 812 {0x3610, 0xc5}, 813 {0x3611, 0x58}, 814 {0x3612, 0x5c}, 815 {0x3613, 0xca}, 816 {0x3614, 0x20}, 817 {0x3628, 0xff}, 818 {0x3629, 0xff}, 819 {0x362a, 0xff}, 820 {0x3633, 0x10}, 821 {0x3634, 0x10}, 822 {0x3635, 0x10}, 823 {0x3636, 0x10}, 824 {0x3663, 0x08}, 825 {0x3669, 0x34}, 826 {0x366e, 0x08}, 827 {0x3706, 0x86}, 828 {0x370b, 0x7e}, 829 {0x3714, 0x27}, 830 {0x3730, 0x12}, 831 {0x3733, 0x10}, 832 {0x3764, 0x00}, 833 {0x3765, 0x00}, 834 {0x3769, 0x62}, 835 {0x376a, 0x2a}, 836 {0x376b, 0x30}, 837 {0x3780, 0x00}, 838 {0x3781, 0x24}, 839 {0x3782, 0x00}, 840 {0x3783, 0x23}, 841 {0x3798, 0x2f}, 842 {0x37a1, 0x60}, 843 {0x37a8, 0x6a}, 844 {0x37ab, 0x3f}, 845 {0x37c2, 0x14}, 846 {0x37c3, 0xf1}, 847 {0x37c9, 0x80}, 848 {0x37cb, 0x16}, 849 {0x37cc, 0x16}, 850 {0x37cd, 0x16}, 851 {0x37ce, 0x16}, 852 {0x3800, 0x00}, 853 {0x3801, 0x00}, 854 {0x3802, 0x00}, 855 {0x3803, 0x00}, 856 {0x3804, 0x0c}, 857 {0x3805, 0xdf}, 858 {0x3806, 0x09}, 859 {0x3807, 0xaf}, 860 {0x3808, 0x06}, 861 {0x3809, 0x68}, 862 {0x380a, 0x04}, 863 {0x380b, 0xd0}, 864 {0x380c, 0x0e}, 865 {0x380d, 0xec}, 866 {0x380e, 0x04}, 867 {0x380f, 0xe8}, 868 {0x3810, 0x00}, 869 {0x3811, 0x04}, 870 {0x3812, 0x00}, 871 {0x3813, 0x05}, 872 {0x3814, 0x03}, 873 {0x3815, 0x01}, 874 {0x3816, 0x00}, 875 {0x3817, 0x00}, 876 {0x3818, 0x00}, 877 {0x3819, 0x10}, 878 {0x3820, 0x90}, 879 {0x3821, 0x67}, 880 {0x382a, 0x03}, 881 {0x382b, 0x01}, 882 {0x3830, 0x06}, 883 {0x3836, 0x02}, 884 {0x3862, 0x04}, 885 {0x3863, 0x08}, 886 {0x3cc0, 0x33}, 887 {0x3d85, 0x17}, 888 {0x3d8c, 0x73}, 889 {0x3d8d, 0xde}, 890 {0x4001, 0xe0}, 891 {0x4003, 0x40}, 892 {0x4008, 0x00}, 893 {0x4009, 0x05}, 894 {0x400a, 0x00}, 895 {0x400b, 0x84}, 896 {0x400f, 0x80}, 897 {0x4010, 0xf0}, 898 {0x4011, 0xff}, 899 {0x4012, 0x02}, 900 {0x4013, 0x01}, 901 {0x4014, 0x01}, 902 {0x4015, 0x01}, 903 {0x4042, 0x00}, 904 {0x4043, 0x80}, 905 {0x4044, 0x00}, 906 {0x4045, 0x80}, 907 {0x4046, 0x00}, 908 {0x4047, 0x80}, 909 {0x4048, 0x00}, 910 {0x4049, 0x80}, 911 {0x4041, 0x03}, 912 {0x404c, 0x20}, 913 {0x404d, 0x00}, 914 {0x404e, 0x20}, 915 {0x4203, 0x80}, 916 {0x4307, 0x30}, 917 {0x4317, 0x00}, 918 {0x4503, 0x08}, 919 {0x4601, 0x80}, 920 {0x4800, 0x44}, 921 {0x4816, 0x53}, 922 {0x481b, 0x58}, 923 {0x481f, 0x27}, 924 {0x4837, 0x16}, 925 {0x483c, 0x0f}, 926 {0x484b, 0x05}, 927 {0x5000, 0x57}, 928 {0x5001, 0x0a}, 929 {0x5004, 0x06}, 930 {0x502e, 0x03}, 931 {0x5030, 0x41}, 932 {0x5780, 0x14}, 933 {0x5781, 0x0f}, 934 {0x5782, 0x44}, 935 {0x5783, 0x02}, 936 {0x5784, 0x01}, 937 {0x5785, 0x01}, 938 {0x5786, 0x00}, 939 {0x5787, 0x04}, 940 {0x5788, 0x02}, 941 {0x5789, 0x0f}, 942 {0x578a, 0xfd}, 943 {0x578b, 0xf5}, 944 {0x578c, 0xf5}, 945 {0x578d, 0x03}, 946 {0x578e, 0x08}, 947 {0x578f, 0x0c}, 948 {0x5790, 0x08}, 949 {0x5791, 0x04}, 950 {0x5792, 0x00}, 951 {0x5793, 0x52}, 952 {0x5794, 0xa3}, 953 {0x5795, 0x00}, 954 {0x5796, 0x10}, 955 {0x5797, 0x10}, 956 {0x5798, 0x73}, 957 {0x5799, 0x73}, 958 {0x579a, 0x00}, 959 {0x579b, 0x28}, 960 {0x579c, 0x00}, 961 {0x579d, 0x16}, 962 {0x579e, 0x06}, 963 {0x579f, 0x20}, 964 {0x57a0, 0x04}, 965 {0x57a1, 0xa0}, 966 {0x59f8, 0x3d}, 967 {0x5a08, 0x02}, 968 {0x5b00, 0x02}, 969 {0x5b01, 0x10}, 970 {0x5b02, 0x03}, 971 {0x5b03, 0xcf}, 972 {0x5b05, 0x6c}, 973 {0x5e00, 0x00} 974 }; 975 976 static const struct ov8856_reg lane_4_mode_3264x2448[] = { 977 /* 3264x2448 resolution */ 978 {0x0103, 0x01}, 979 {0x0302, 0x3c}, 980 {0x0303, 0x01}, 981 {0x031e, 0x0c}, 982 {0x3000, 0x20}, 983 {0x3003, 0x08}, 984 {0x300e, 0x20}, 985 {0x3010, 0x00}, 986 {0x3015, 0x84}, 987 {0x3018, 0x72}, 988 {0x3021, 0x23}, 989 {0x3033, 0x24}, 990 {0x3500, 0x00}, 991 {0x3501, 0x9a}, 992 {0x3502, 0x20}, 993 {0x3503, 0x08}, 994 {0x3505, 0x83}, 995 {0x3508, 0x01}, 996 {0x3509, 0x80}, 997 {0x350c, 0x00}, 998 {0x350d, 0x80}, 999 {0x350e, 0x04}, 1000 {0x350f, 0x00}, 1001 {0x3510, 0x00}, 1002 {0x3511, 0x02}, 1003 {0x3512, 0x00}, 1004 {0x3600, 0x72}, 1005 {0x3601, 0x40}, 1006 {0x3602, 0x30}, 1007 {0x3610, 0xc5}, 1008 {0x3611, 0x58}, 1009 {0x3612, 0x5c}, 1010 {0x3613, 0xca}, 1011 {0x3614, 0x60}, 1012 {0x3628, 0xff}, 1013 {0x3629, 0xff}, 1014 {0x362a, 0xff}, 1015 {0x3633, 0x10}, 1016 {0x3634, 0x10}, 1017 {0x3635, 0x10}, 1018 {0x3636, 0x10}, 1019 {0x3663, 0x08}, 1020 {0x3669, 0x34}, 1021 {0x366d, 0x00}, 1022 {0x366e, 0x10}, 1023 {0x3706, 0x86}, 1024 {0x370b, 0x7e}, 1025 {0x3714, 0x23}, 1026 {0x3730, 0x12}, 1027 {0x3733, 0x10}, 1028 {0x3764, 0x00}, 1029 {0x3765, 0x00}, 1030 {0x3769, 0x62}, 1031 {0x376a, 0x2a}, 1032 {0x376b, 0x30}, 1033 {0x3780, 0x00}, 1034 {0x3781, 0x24}, 1035 {0x3782, 0x00}, 1036 {0x3783, 0x23}, 1037 {0x3798, 0x2f}, 1038 {0x37a1, 0x60}, 1039 {0x37a8, 0x6a}, 1040 {0x37ab, 0x3f}, 1041 {0x37c2, 0x04}, 1042 {0x37c3, 0xf1}, 1043 {0x37c9, 0x80}, 1044 {0x37cb, 0x16}, 1045 {0x37cc, 0x16}, 1046 {0x37cd, 0x16}, 1047 {0x37ce, 0x16}, 1048 {0x3800, 0x00}, 1049 {0x3801, 0x00}, 1050 {0x3802, 0x00}, 1051 {0x3803, 0x0c}, 1052 {0x3804, 0x0c}, 1053 {0x3805, 0xdf}, 1054 {0x3806, 0x09}, 1055 {0x3807, 0xa3}, 1056 {0x3808, 0x0c}, 1057 {0x3809, 0xc0}, 1058 {0x380a, 0x09}, 1059 {0x380b, 0x90}, 1060 {0x380c, 0x07}, 1061 {0x380d, 0x8c}, 1062 {0x380e, 0x09}, 1063 {0x380f, 0xb2}, 1064 {0x3810, 0x00}, 1065 {0x3811, 0x04}, 1066 {0x3812, 0x00}, 1067 {0x3813, 0x02}, 1068 {0x3814, 0x01}, 1069 {0x3815, 0x01}, 1070 {0x3816, 0x00}, 1071 {0x3817, 0x00}, 1072 {0x3818, 0x00}, 1073 {0x3819, 0x10}, 1074 {0x3820, 0x80}, 1075 {0x3821, 0x46}, 1076 {0x382a, 0x01}, 1077 {0x382b, 0x01}, 1078 {0x3830, 0x06}, 1079 {0x3836, 0x02}, 1080 {0x3862, 0x04}, 1081 {0x3863, 0x08}, 1082 {0x3cc0, 0x33}, 1083 {0x3d85, 0x17}, 1084 {0x3d8c, 0x73}, 1085 {0x3d8d, 0xde}, 1086 {0x4001, 0xe0}, 1087 {0x4003, 0x40}, 1088 {0x4008, 0x00}, 1089 {0x4009, 0x0b}, 1090 {0x400a, 0x00}, 1091 {0x400b, 0x84}, 1092 {0x400f, 0x80}, 1093 {0x4010, 0xf0}, 1094 {0x4011, 0xff}, 1095 {0x4012, 0x02}, 1096 {0x4013, 0x01}, 1097 {0x4014, 0x01}, 1098 {0x4015, 0x01}, 1099 {0x4042, 0x00}, 1100 {0x4043, 0x80}, 1101 {0x4044, 0x00}, 1102 {0x4045, 0x80}, 1103 {0x4046, 0x00}, 1104 {0x4047, 0x80}, 1105 {0x4048, 0x00}, 1106 {0x4049, 0x80}, 1107 {0x4041, 0x03}, 1108 {0x404c, 0x20}, 1109 {0x404d, 0x00}, 1110 {0x404e, 0x20}, 1111 {0x4203, 0x80}, 1112 {0x4307, 0x30}, 1113 {0x4317, 0x00}, 1114 {0x4502, 0x50}, 1115 {0x4503, 0x08}, 1116 {0x4601, 0x80}, 1117 {0x4800, 0x44}, 1118 {0x4816, 0x53}, 1119 {0x481b, 0x50}, 1120 {0x481f, 0x27}, 1121 {0x4823, 0x3c}, 1122 {0x482b, 0x00}, 1123 {0x4831, 0x66}, 1124 {0x4837, 0x16}, 1125 {0x483c, 0x0f}, 1126 {0x484b, 0x05}, 1127 {0x5000, 0x77}, 1128 {0x5001, 0x0a}, 1129 {0x5003, 0xc8}, 1130 {0x5004, 0x04}, 1131 {0x5006, 0x00}, 1132 {0x5007, 0x00}, 1133 {0x502e, 0x03}, 1134 {0x5030, 0x41}, 1135 {0x5780, 0x14}, 1136 {0x5781, 0x0f}, 1137 {0x5782, 0x44}, 1138 {0x5783, 0x02}, 1139 {0x5784, 0x01}, 1140 {0x5785, 0x01}, 1141 {0x5786, 0x00}, 1142 {0x5787, 0x04}, 1143 {0x5788, 0x02}, 1144 {0x5789, 0x0f}, 1145 {0x578a, 0xfd}, 1146 {0x578b, 0xf5}, 1147 {0x578c, 0xf5}, 1148 {0x578d, 0x03}, 1149 {0x578e, 0x08}, 1150 {0x578f, 0x0c}, 1151 {0x5790, 0x08}, 1152 {0x5791, 0x04}, 1153 {0x5792, 0x00}, 1154 {0x5793, 0x52}, 1155 {0x5794, 0xa3}, 1156 {0x5795, 0x02}, 1157 {0x5796, 0x20}, 1158 {0x5797, 0x20}, 1159 {0x5798, 0xd5}, 1160 {0x5799, 0xd5}, 1161 {0x579a, 0x00}, 1162 {0x579b, 0x50}, 1163 {0x579c, 0x00}, 1164 {0x579d, 0x2c}, 1165 {0x579e, 0x0c}, 1166 {0x579f, 0x40}, 1167 {0x57a0, 0x09}, 1168 {0x57a1, 0x40}, 1169 {0x59f8, 0x3d}, 1170 {0x5a08, 0x02}, 1171 {0x5b00, 0x02}, 1172 {0x5b01, 0x10}, 1173 {0x5b02, 0x03}, 1174 {0x5b03, 0xcf}, 1175 {0x5b05, 0x6c}, 1176 {0x5e00, 0x00}, 1177 {0x5e10, 0xfc} 1178 }; 1179 1180 static const struct ov8856_reg lane_4_mode_1632x1224[] = { 1181 /* 1632x1224 resolution */ 1182 {0x0103, 0x01}, 1183 {0x0302, 0x3c}, 1184 {0x0303, 0x01}, 1185 {0x031e, 0x0c}, 1186 {0x3000, 0x20}, 1187 {0x3003, 0x08}, 1188 {0x300e, 0x20}, 1189 {0x3010, 0x00}, 1190 {0x3015, 0x84}, 1191 {0x3018, 0x72}, 1192 {0x3021, 0x23}, 1193 {0x3033, 0x24}, 1194 {0x3500, 0x00}, 1195 {0x3501, 0x4c}, 1196 {0x3502, 0xe0}, 1197 {0x3503, 0x08}, 1198 {0x3505, 0x83}, 1199 {0x3508, 0x01}, 1200 {0x3509, 0x80}, 1201 {0x350c, 0x00}, 1202 {0x350d, 0x80}, 1203 {0x350e, 0x04}, 1204 {0x350f, 0x00}, 1205 {0x3510, 0x00}, 1206 {0x3511, 0x02}, 1207 {0x3512, 0x00}, 1208 {0x3600, 0x72}, 1209 {0x3601, 0x40}, 1210 {0x3602, 0x30}, 1211 {0x3610, 0xc5}, 1212 {0x3611, 0x58}, 1213 {0x3612, 0x5c}, 1214 {0x3613, 0xca}, 1215 {0x3614, 0x60}, 1216 {0x3628, 0xff}, 1217 {0x3629, 0xff}, 1218 {0x362a, 0xff}, 1219 {0x3633, 0x10}, 1220 {0x3634, 0x10}, 1221 {0x3635, 0x10}, 1222 {0x3636, 0x10}, 1223 {0x3663, 0x08}, 1224 {0x3669, 0x34}, 1225 {0x366d, 0x00}, 1226 {0x366e, 0x08}, 1227 {0x3706, 0x86}, 1228 {0x370b, 0x7e}, 1229 {0x3714, 0x27}, 1230 {0x3730, 0x12}, 1231 {0x3733, 0x10}, 1232 {0x3764, 0x00}, 1233 {0x3765, 0x00}, 1234 {0x3769, 0x62}, 1235 {0x376a, 0x2a}, 1236 {0x376b, 0x30}, 1237 {0x3780, 0x00}, 1238 {0x3781, 0x24}, 1239 {0x3782, 0x00}, 1240 {0x3783, 0x23}, 1241 {0x3798, 0x2f}, 1242 {0x37a1, 0x60}, 1243 {0x37a8, 0x6a}, 1244 {0x37ab, 0x3f}, 1245 {0x37c2, 0x14}, 1246 {0x37c3, 0xf1}, 1247 {0x37c9, 0x80}, 1248 {0x37cb, 0x16}, 1249 {0x37cc, 0x16}, 1250 {0x37cd, 0x16}, 1251 {0x37ce, 0x16}, 1252 {0x3800, 0x00}, 1253 {0x3801, 0x00}, 1254 {0x3802, 0x00}, 1255 {0x3803, 0x0c}, 1256 {0x3804, 0x0c}, 1257 {0x3805, 0xdf}, 1258 {0x3806, 0x09}, 1259 {0x3807, 0xa3}, 1260 {0x3808, 0x06}, 1261 {0x3809, 0x60}, 1262 {0x380a, 0x04}, 1263 {0x380b, 0xc8}, 1264 {0x380c, 0x07}, 1265 {0x380d, 0x8c}, 1266 {0x380e, 0x09}, 1267 {0x380f, 0xb2}, 1268 {0x3810, 0x00}, 1269 {0x3811, 0x02}, 1270 {0x3812, 0x00}, 1271 {0x3813, 0x02}, 1272 {0x3814, 0x03}, 1273 {0x3815, 0x01}, 1274 {0x3816, 0x00}, 1275 {0x3817, 0x00}, 1276 {0x3818, 0x00}, 1277 {0x3819, 0x10}, 1278 {0x3820, 0x80}, 1279 {0x3821, 0x47}, 1280 {0x382a, 0x03}, 1281 {0x382b, 0x01}, 1282 {0x3830, 0x06}, 1283 {0x3836, 0x02}, 1284 {0x3862, 0x04}, 1285 {0x3863, 0x08}, 1286 {0x3cc0, 0x33}, 1287 {0x3d85, 0x17}, 1288 {0x3d8c, 0x73}, 1289 {0x3d8d, 0xde}, 1290 {0x4001, 0xe0}, 1291 {0x4003, 0x40}, 1292 {0x4008, 0x00}, 1293 {0x4009, 0x05}, 1294 {0x400a, 0x00}, 1295 {0x400b, 0x84}, 1296 {0x400f, 0x80}, 1297 {0x4010, 0xf0}, 1298 {0x4011, 0xff}, 1299 {0x4012, 0x02}, 1300 {0x4013, 0x01}, 1301 {0x4014, 0x01}, 1302 {0x4015, 0x01}, 1303 {0x4042, 0x00}, 1304 {0x4043, 0x80}, 1305 {0x4044, 0x00}, 1306 {0x4045, 0x80}, 1307 {0x4046, 0x00}, 1308 {0x4047, 0x80}, 1309 {0x4048, 0x00}, 1310 {0x4049, 0x80}, 1311 {0x4041, 0x03}, 1312 {0x404c, 0x20}, 1313 {0x404d, 0x00}, 1314 {0x404e, 0x20}, 1315 {0x4203, 0x80}, 1316 {0x4307, 0x30}, 1317 {0x4317, 0x00}, 1318 {0x4502, 0x50}, 1319 {0x4503, 0x08}, 1320 {0x4601, 0x80}, 1321 {0x4800, 0x44}, 1322 {0x4816, 0x53}, 1323 {0x481b, 0x50}, 1324 {0x481f, 0x27}, 1325 {0x4823, 0x3c}, 1326 {0x482b, 0x00}, 1327 {0x4831, 0x66}, 1328 {0x4837, 0x16}, 1329 {0x483c, 0x0f}, 1330 {0x484b, 0x05}, 1331 {0x5000, 0x77}, 1332 {0x5001, 0x0a}, 1333 {0x5003, 0xc8}, 1334 {0x5004, 0x04}, 1335 {0x5006, 0x00}, 1336 {0x5007, 0x00}, 1337 {0x502e, 0x03}, 1338 {0x5030, 0x41}, 1339 {0x5795, 0x00}, 1340 {0x5796, 0x10}, 1341 {0x5797, 0x10}, 1342 {0x5798, 0x73}, 1343 {0x5799, 0x73}, 1344 {0x579a, 0x00}, 1345 {0x579b, 0x28}, 1346 {0x579c, 0x00}, 1347 {0x579d, 0x16}, 1348 {0x579e, 0x06}, 1349 {0x579f, 0x20}, 1350 {0x57a0, 0x04}, 1351 {0x57a1, 0xa0}, 1352 {0x5780, 0x14}, 1353 {0x5781, 0x0f}, 1354 {0x5782, 0x44}, 1355 {0x5783, 0x02}, 1356 {0x5784, 0x01}, 1357 {0x5785, 0x01}, 1358 {0x5786, 0x00}, 1359 {0x5787, 0x04}, 1360 {0x5788, 0x02}, 1361 {0x5789, 0x0f}, 1362 {0x578a, 0xfd}, 1363 {0x578b, 0xf5}, 1364 {0x578c, 0xf5}, 1365 {0x578d, 0x03}, 1366 {0x578e, 0x08}, 1367 {0x578f, 0x0c}, 1368 {0x5790, 0x08}, 1369 {0x5791, 0x04}, 1370 {0x5792, 0x00}, 1371 {0x5793, 0x52}, 1372 {0x5794, 0xa3}, 1373 {0x59f8, 0x3d}, 1374 {0x5a08, 0x02}, 1375 {0x5b00, 0x02}, 1376 {0x5b01, 0x10}, 1377 {0x5b02, 0x03}, 1378 {0x5b03, 0xcf}, 1379 {0x5b05, 0x6c}, 1380 {0x5e00, 0x00}, 1381 {0x5e10, 0xfc} 1382 }; 1383 1384 static const struct ov8856_reg mipi_data_mbus_sbggr10_1x10[] = { 1385 {0x3813, 0x02}, 1386 }; 1387 1388 static const struct ov8856_reg mipi_data_mbus_sgrbg10_1x10[] = { 1389 {0x3813, 0x01}, 1390 }; 1391 1392 static const u32 ov8856_mbus_codes[] = { 1393 MEDIA_BUS_FMT_SBGGR10_1X10, 1394 MEDIA_BUS_FMT_SGRBG10_1X10 1395 }; 1396 1397 static const char * const ov8856_test_pattern_menu[] = { 1398 "Disabled", 1399 "Standard Color Bar", 1400 "Top-Bottom Darker Color Bar", 1401 "Right-Left Darker Color Bar", 1402 "Bottom-Top Darker Color Bar" 1403 }; 1404 1405 static const struct ov8856_reg_list bayer_offset_configs[] = { 1406 [OV8856_MEDIA_BUS_FMT_SBGGR10_1X10] = { 1407 .num_of_regs = ARRAY_SIZE(mipi_data_mbus_sbggr10_1x10), 1408 .regs = mipi_data_mbus_sbggr10_1x10, 1409 }, 1410 [OV8856_MEDIA_BUS_FMT_SGRBG10_1X10] = { 1411 .num_of_regs = ARRAY_SIZE(mipi_data_mbus_sgrbg10_1x10), 1412 .regs = mipi_data_mbus_sgrbg10_1x10, 1413 } 1414 }; 1415 1416 struct ov8856 { 1417 struct v4l2_subdev sd; 1418 struct media_pad pad; 1419 struct v4l2_ctrl_handler ctrl_handler; 1420 1421 struct clk *xvclk; 1422 struct gpio_desc *reset_gpio; 1423 struct regulator_bulk_data supplies[ARRAY_SIZE(ov8856_supply_names)]; 1424 1425 /* V4L2 Controls */ 1426 struct v4l2_ctrl *link_freq; 1427 struct v4l2_ctrl *pixel_rate; 1428 struct v4l2_ctrl *vblank; 1429 struct v4l2_ctrl *hblank; 1430 struct v4l2_ctrl *exposure; 1431 1432 /* Current mode */ 1433 const struct ov8856_mode *cur_mode; 1434 1435 /* Application specified mbus format */ 1436 u32 cur_mbus_index; 1437 1438 /* To serialize asynchronus callbacks */ 1439 struct mutex mutex; 1440 1441 /* Streaming on/off */ 1442 bool streaming; 1443 1444 /* lanes index */ 1445 u8 nlanes; 1446 1447 const struct ov8856_lane_cfg *priv_lane; 1448 u8 modes_size; 1449 1450 /* True if the device has been identified */ 1451 bool identified; 1452 }; 1453 1454 struct ov8856_lane_cfg { 1455 const s64 link_freq_menu_items[2]; 1456 const struct ov8856_link_freq_config link_freq_configs[2]; 1457 const struct ov8856_mode supported_modes[4]; 1458 }; 1459 1460 static const struct ov8856_lane_cfg lane_cfg_2 = { 1461 { 1462 720000000, 1463 360000000, 1464 }, 1465 {{ 1466 .reg_list = { 1467 .num_of_regs = 1468 ARRAY_SIZE(mipi_data_rate_lane_2.regs_0), 1469 .regs = mipi_data_rate_lane_2.regs_0, 1470 } 1471 }, 1472 { 1473 .reg_list = { 1474 .num_of_regs = 1475 ARRAY_SIZE(mipi_data_rate_lane_2.regs_1), 1476 .regs = mipi_data_rate_lane_2.regs_1, 1477 } 1478 }}, 1479 {{ 1480 .width = 3280, 1481 .height = 2464, 1482 .hts = 1928, 1483 .vts_def = 2488, 1484 .vts_min = 2488, 1485 .reg_list = { 1486 .num_of_regs = 1487 ARRAY_SIZE(lane_2_mode_3280x2464), 1488 .regs = lane_2_mode_3280x2464, 1489 }, 1490 .link_freq_index = 0, 1491 .data_lanes = 2, 1492 .default_mbus_index = OV8856_MEDIA_BUS_FMT_SGRBG10_1X10, 1493 }, 1494 { 1495 .width = 1640, 1496 .height = 1232, 1497 .hts = 3168, 1498 .vts_def = 1514, 1499 .vts_min = 1514, 1500 .reg_list = { 1501 .num_of_regs = 1502 ARRAY_SIZE(lane_2_mode_1640x1232), 1503 .regs = lane_2_mode_1640x1232, 1504 }, 1505 .link_freq_index = 1, 1506 .data_lanes = 2, 1507 .default_mbus_index = OV8856_MEDIA_BUS_FMT_SGRBG10_1X10, 1508 }} 1509 }; 1510 1511 static const struct ov8856_lane_cfg lane_cfg_4 = { 1512 { 1513 360000000, 1514 180000000, 1515 }, 1516 {{ 1517 .reg_list = { 1518 .num_of_regs = 1519 ARRAY_SIZE(mipi_data_rate_lane_4.regs_0), 1520 .regs = mipi_data_rate_lane_4.regs_0, 1521 } 1522 }, 1523 { 1524 .reg_list = { 1525 .num_of_regs = 1526 ARRAY_SIZE(mipi_data_rate_lane_4.regs_1), 1527 .regs = mipi_data_rate_lane_4.regs_1, 1528 } 1529 }}, 1530 {{ 1531 .width = 3280, 1532 .height = 2464, 1533 .hts = 1928, 1534 .vts_def = 2488, 1535 .vts_min = 2488, 1536 .reg_list = { 1537 .num_of_regs = 1538 ARRAY_SIZE(lane_4_mode_3280x2464), 1539 .regs = lane_4_mode_3280x2464, 1540 }, 1541 .link_freq_index = 0, 1542 .data_lanes = 4, 1543 .default_mbus_index = OV8856_MEDIA_BUS_FMT_SGRBG10_1X10, 1544 }, 1545 { 1546 .width = 1640, 1547 .height = 1232, 1548 .hts = 3820, 1549 .vts_def = 1256, 1550 .vts_min = 1256, 1551 .reg_list = { 1552 .num_of_regs = 1553 ARRAY_SIZE(lane_4_mode_1640x1232), 1554 .regs = lane_4_mode_1640x1232, 1555 }, 1556 .link_freq_index = 1, 1557 .data_lanes = 4, 1558 .default_mbus_index = OV8856_MEDIA_BUS_FMT_SGRBG10_1X10, 1559 }, 1560 { 1561 .width = 3264, 1562 .height = 2448, 1563 .hts = 1932, 1564 .vts_def = 2482, 1565 .vts_min = 2482, 1566 .reg_list = { 1567 .num_of_regs = 1568 ARRAY_SIZE(lane_4_mode_3264x2448), 1569 .regs = lane_4_mode_3264x2448, 1570 }, 1571 .link_freq_index = 0, 1572 .data_lanes = 4, 1573 .default_mbus_index = OV8856_MEDIA_BUS_FMT_SBGGR10_1X10, 1574 }, 1575 { 1576 .width = 1632, 1577 .height = 1224, 1578 .hts = 1932, 1579 .vts_def = 2482, 1580 .vts_min = 2482, 1581 .reg_list = { 1582 .num_of_regs = 1583 ARRAY_SIZE(lane_4_mode_1632x1224), 1584 .regs = lane_4_mode_1632x1224, 1585 }, 1586 .link_freq_index = 1, 1587 .data_lanes = 4, 1588 .default_mbus_index = OV8856_MEDIA_BUS_FMT_SBGGR10_1X10, 1589 }} 1590 }; 1591 1592 static unsigned int ov8856_modes_num(const struct ov8856 *ov8856) 1593 { 1594 unsigned int i, count = 0; 1595 1596 for (i = 0; i < ARRAY_SIZE(ov8856->priv_lane->supported_modes); i++) { 1597 if (ov8856->priv_lane->supported_modes[i].width == 0) 1598 break; 1599 count++; 1600 } 1601 1602 return count; 1603 } 1604 1605 static u64 to_rate(const s64 *link_freq_menu_items, 1606 u32 f_index, u8 nlanes) 1607 { 1608 u64 pixel_rate = link_freq_menu_items[f_index] * 2 * nlanes; 1609 1610 do_div(pixel_rate, OV8856_RGB_DEPTH); 1611 1612 return pixel_rate; 1613 } 1614 1615 static u64 to_pixels_per_line(const s64 *link_freq_menu_items, u32 hts, 1616 u32 f_index, u8 nlanes) 1617 { 1618 u64 ppl = hts * to_rate(link_freq_menu_items, f_index, nlanes); 1619 1620 do_div(ppl, OV8856_SCLK); 1621 1622 return ppl; 1623 } 1624 1625 static int ov8856_read_reg(struct ov8856 *ov8856, u16 reg, u16 len, u32 *val) 1626 { 1627 struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd); 1628 struct i2c_msg msgs[2]; 1629 u8 addr_buf[2]; 1630 u8 data_buf[4] = {0}; 1631 int ret; 1632 1633 if (len > 4) 1634 return -EINVAL; 1635 1636 put_unaligned_be16(reg, addr_buf); 1637 msgs[0].addr = client->addr; 1638 msgs[0].flags = 0; 1639 msgs[0].len = sizeof(addr_buf); 1640 msgs[0].buf = addr_buf; 1641 msgs[1].addr = client->addr; 1642 msgs[1].flags = I2C_M_RD; 1643 msgs[1].len = len; 1644 msgs[1].buf = &data_buf[4 - len]; 1645 1646 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs)); 1647 if (ret != ARRAY_SIZE(msgs)) 1648 return -EIO; 1649 1650 *val = get_unaligned_be32(data_buf); 1651 1652 return 0; 1653 } 1654 1655 static int ov8856_write_reg(struct ov8856 *ov8856, u16 reg, u16 len, u32 val) 1656 { 1657 struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd); 1658 u8 buf[6]; 1659 1660 if (len > 4) 1661 return -EINVAL; 1662 1663 put_unaligned_be16(reg, buf); 1664 put_unaligned_be32(val << 8 * (4 - len), buf + 2); 1665 if (i2c_master_send(client, buf, len + 2) != len + 2) 1666 return -EIO; 1667 1668 return 0; 1669 } 1670 1671 static int ov8856_write_reg_list(struct ov8856 *ov8856, 1672 const struct ov8856_reg_list *r_list) 1673 { 1674 struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd); 1675 unsigned int i; 1676 int ret; 1677 1678 for (i = 0; i < r_list->num_of_regs; i++) { 1679 ret = ov8856_write_reg(ov8856, r_list->regs[i].address, 1, 1680 r_list->regs[i].val); 1681 if (ret) { 1682 dev_err_ratelimited(&client->dev, 1683 "failed to write reg 0x%4.4x. error = %d", 1684 r_list->regs[i].address, ret); 1685 return ret; 1686 } 1687 } 1688 1689 return 0; 1690 } 1691 1692 static int ov8856_identify_module(struct ov8856 *ov8856) 1693 { 1694 struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd); 1695 int ret; 1696 u32 val; 1697 1698 if (ov8856->identified) 1699 return 0; 1700 1701 ret = ov8856_read_reg(ov8856, OV8856_REG_CHIP_ID, 1702 OV8856_REG_VALUE_24BIT, &val); 1703 if (ret) 1704 return ret; 1705 1706 if (val != OV8856_CHIP_ID) { 1707 dev_err(&client->dev, "chip id mismatch: %x!=%x", 1708 OV8856_CHIP_ID, val); 1709 return -ENXIO; 1710 } 1711 1712 ret = ov8856_write_reg(ov8856, OV8856_REG_MODE_SELECT, 1713 OV8856_REG_VALUE_08BIT, OV8856_MODE_STREAMING); 1714 if (ret) 1715 return ret; 1716 1717 ret = ov8856_write_reg(ov8856, OV8856_OTP_MODE_CTRL, 1718 OV8856_REG_VALUE_08BIT, OV8856_OTP_MODE_AUTO); 1719 if (ret) { 1720 dev_err(&client->dev, "failed to set otp mode"); 1721 return ret; 1722 } 1723 1724 ret = ov8856_write_reg(ov8856, OV8856_OTP_LOAD_CTRL, 1725 OV8856_REG_VALUE_08BIT, 1726 OV8856_OTP_LOAD_CTRL_ENABLE); 1727 if (ret) { 1728 dev_err(&client->dev, "failed to enable load control"); 1729 return ret; 1730 } 1731 1732 ret = ov8856_read_reg(ov8856, OV8856_MODULE_REVISION, 1733 OV8856_REG_VALUE_08BIT, &val); 1734 if (ret) { 1735 dev_err(&client->dev, "failed to read module revision"); 1736 return ret; 1737 } 1738 1739 dev_info(&client->dev, "OV8856 revision %x (%s) at address 0x%02x\n", 1740 val, 1741 val == OV8856_2A_MODULE ? "2A" : 1742 val == OV8856_1B_MODULE ? "1B" : "unknown revision", 1743 client->addr); 1744 1745 ret = ov8856_write_reg(ov8856, OV8856_REG_MODE_SELECT, 1746 OV8856_REG_VALUE_08BIT, OV8856_MODE_STANDBY); 1747 if (ret) { 1748 dev_err(&client->dev, "failed to exit streaming mode"); 1749 return ret; 1750 } 1751 1752 ov8856->identified = true; 1753 1754 return 0; 1755 } 1756 1757 static int ov8856_update_digital_gain(struct ov8856 *ov8856, u32 d_gain) 1758 { 1759 return ov8856_write_reg(ov8856, OV8856_REG_DIGITAL_GAIN, 1760 OV8856_REG_VALUE_16BIT, d_gain); 1761 } 1762 1763 static int ov8856_test_pattern(struct ov8856 *ov8856, u32 pattern) 1764 { 1765 if (pattern) 1766 pattern = (pattern - 1) << OV8856_TEST_PATTERN_BAR_SHIFT | 1767 OV8856_TEST_PATTERN_ENABLE; 1768 1769 return ov8856_write_reg(ov8856, OV8856_REG_TEST_PATTERN, 1770 OV8856_REG_VALUE_08BIT, pattern); 1771 } 1772 1773 static int ov8856_set_ctrl_hflip(struct ov8856 *ov8856, u32 ctrl_val) 1774 { 1775 int ret; 1776 u32 val; 1777 1778 ret = ov8856_read_reg(ov8856, OV8856_REG_MIRROR_OPT_1, 1779 OV8856_REG_VALUE_08BIT, &val); 1780 if (ret) 1781 return ret; 1782 1783 ret = ov8856_write_reg(ov8856, OV8856_REG_MIRROR_OPT_1, 1784 OV8856_REG_VALUE_08BIT, 1785 ctrl_val ? val & ~OV8856_REG_MIRROR_OP_2 : 1786 val | OV8856_REG_MIRROR_OP_2); 1787 1788 if (ret) 1789 return ret; 1790 1791 ret = ov8856_read_reg(ov8856, OV8856_REG_FORMAT2, 1792 OV8856_REG_VALUE_08BIT, &val); 1793 if (ret) 1794 return ret; 1795 1796 return ov8856_write_reg(ov8856, OV8856_REG_FORMAT2, 1797 OV8856_REG_VALUE_08BIT, 1798 ctrl_val ? val & ~OV8856_REG_FORMAT2_OP_1 & 1799 ~OV8856_REG_FORMAT2_OP_2 & 1800 ~OV8856_REG_FORMAT2_OP_3 : 1801 val | OV8856_REG_FORMAT2_OP_1 | 1802 OV8856_REG_FORMAT2_OP_2 | 1803 OV8856_REG_FORMAT2_OP_3); 1804 } 1805 1806 static int ov8856_set_ctrl_vflip(struct ov8856 *ov8856, u8 ctrl_val) 1807 { 1808 int ret; 1809 u32 val; 1810 1811 ret = ov8856_read_reg(ov8856, OV8856_REG_FLIP_OPT_1, 1812 OV8856_REG_VALUE_08BIT, &val); 1813 if (ret) 1814 return ret; 1815 1816 ret = ov8856_write_reg(ov8856, OV8856_REG_FLIP_OPT_1, 1817 OV8856_REG_VALUE_08BIT, 1818 ctrl_val ? val | OV8856_REG_FLIP_OP_1 | 1819 OV8856_REG_FLIP_OP_2 : 1820 val & ~OV8856_REG_FLIP_OP_1 & 1821 ~OV8856_REG_FLIP_OP_2); 1822 1823 ret = ov8856_read_reg(ov8856, OV8856_REG_FLIP_OPT_2, 1824 OV8856_REG_VALUE_08BIT, &val); 1825 if (ret) 1826 return ret; 1827 1828 ret = ov8856_write_reg(ov8856, OV8856_REG_FLIP_OPT_2, 1829 OV8856_REG_VALUE_08BIT, 1830 ctrl_val ? val | OV8856_REG_FLIP_OP_2 : 1831 val & ~OV8856_REG_FLIP_OP_2); 1832 1833 ret = ov8856_read_reg(ov8856, OV8856_REG_FLIP_OPT_3, 1834 OV8856_REG_VALUE_08BIT, &val); 1835 if (ret) 1836 return ret; 1837 1838 ret = ov8856_write_reg(ov8856, OV8856_REG_FLIP_OPT_3, 1839 OV8856_REG_VALUE_08BIT, 1840 ctrl_val ? val & ~OV8856_REG_FLIP_OP_0 & 1841 ~OV8856_REG_FLIP_OP_1 : 1842 val | OV8856_REG_FLIP_OP_0 | 1843 OV8856_REG_FLIP_OP_1); 1844 1845 ret = ov8856_read_reg(ov8856, OV8856_REG_FORMAT1, 1846 OV8856_REG_VALUE_08BIT, &val); 1847 if (ret) 1848 return ret; 1849 1850 return ov8856_write_reg(ov8856, OV8856_REG_FORMAT1, 1851 OV8856_REG_VALUE_08BIT, 1852 ctrl_val ? val | OV8856_REG_FORMAT1_OP_1 | 1853 OV8856_REG_FORMAT1_OP_3 | 1854 OV8856_REG_FORMAT1_OP_2 : 1855 val & ~OV8856_REG_FORMAT1_OP_1 & 1856 ~OV8856_REG_FORMAT1_OP_3 & 1857 ~OV8856_REG_FORMAT1_OP_2); 1858 } 1859 1860 static int ov8856_set_ctrl(struct v4l2_ctrl *ctrl) 1861 { 1862 struct ov8856 *ov8856 = container_of(ctrl->handler, 1863 struct ov8856, ctrl_handler); 1864 struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd); 1865 s64 exposure_max; 1866 int ret = 0; 1867 1868 /* Propagate change of current control to all related controls */ 1869 if (ctrl->id == V4L2_CID_VBLANK) { 1870 /* Update max exposure while meeting expected vblanking */ 1871 exposure_max = ov8856->cur_mode->height + ctrl->val - 1872 OV8856_EXPOSURE_MAX_MARGIN; 1873 __v4l2_ctrl_modify_range(ov8856->exposure, 1874 ov8856->exposure->minimum, 1875 exposure_max, ov8856->exposure->step, 1876 exposure_max); 1877 } 1878 1879 /* V4L2 controls values will be applied only when power is already up */ 1880 if (!pm_runtime_get_if_in_use(&client->dev)) 1881 return 0; 1882 1883 switch (ctrl->id) { 1884 case V4L2_CID_ANALOGUE_GAIN: 1885 ret = ov8856_write_reg(ov8856, OV8856_REG_ANALOG_GAIN, 1886 OV8856_REG_VALUE_16BIT, ctrl->val); 1887 break; 1888 1889 case V4L2_CID_DIGITAL_GAIN: 1890 ret = ov8856_update_digital_gain(ov8856, ctrl->val); 1891 break; 1892 1893 case V4L2_CID_EXPOSURE: 1894 /* 4 least significant bits of expsoure are fractional part */ 1895 ret = ov8856_write_reg(ov8856, OV8856_REG_EXPOSURE, 1896 OV8856_REG_VALUE_24BIT, ctrl->val << 4); 1897 break; 1898 1899 case V4L2_CID_VBLANK: 1900 ret = ov8856_write_reg(ov8856, OV8856_REG_VTS, 1901 OV8856_REG_VALUE_16BIT, 1902 ov8856->cur_mode->height + ctrl->val); 1903 break; 1904 1905 case V4L2_CID_TEST_PATTERN: 1906 ret = ov8856_test_pattern(ov8856, ctrl->val); 1907 break; 1908 1909 case V4L2_CID_HFLIP: 1910 ret = ov8856_set_ctrl_hflip(ov8856, ctrl->val); 1911 break; 1912 1913 case V4L2_CID_VFLIP: 1914 ret = ov8856_set_ctrl_vflip(ov8856, ctrl->val); 1915 break; 1916 1917 default: 1918 ret = -EINVAL; 1919 break; 1920 } 1921 1922 pm_runtime_put(&client->dev); 1923 1924 return ret; 1925 } 1926 1927 static const struct v4l2_ctrl_ops ov8856_ctrl_ops = { 1928 .s_ctrl = ov8856_set_ctrl, 1929 }; 1930 1931 static int ov8856_init_controls(struct ov8856 *ov8856) 1932 { 1933 struct v4l2_ctrl_handler *ctrl_hdlr; 1934 s64 exposure_max, h_blank; 1935 int ret; 1936 1937 ctrl_hdlr = &ov8856->ctrl_handler; 1938 ret = v4l2_ctrl_handler_init(ctrl_hdlr, 8); 1939 if (ret) 1940 return ret; 1941 1942 ctrl_hdlr->lock = &ov8856->mutex; 1943 ov8856->link_freq = v4l2_ctrl_new_int_menu(ctrl_hdlr, &ov8856_ctrl_ops, 1944 V4L2_CID_LINK_FREQ, 1945 ARRAY_SIZE 1946 (ov8856->priv_lane->link_freq_menu_items) 1947 - 1, 1948 0, ov8856->priv_lane->link_freq_menu_items); 1949 if (ov8856->link_freq) 1950 ov8856->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY; 1951 1952 ov8856->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops, 1953 V4L2_CID_PIXEL_RATE, 0, 1954 to_rate(ov8856->priv_lane->link_freq_menu_items, 1955 0, 1956 ov8856->cur_mode->data_lanes), 1, 1957 to_rate(ov8856->priv_lane->link_freq_menu_items, 1958 0, 1959 ov8856->cur_mode->data_lanes)); 1960 ov8856->vblank = v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops, 1961 V4L2_CID_VBLANK, 1962 ov8856->cur_mode->vts_min - ov8856->cur_mode->height, 1963 OV8856_VTS_MAX - ov8856->cur_mode->height, 1, 1964 ov8856->cur_mode->vts_def - 1965 ov8856->cur_mode->height); 1966 h_blank = to_pixels_per_line(ov8856->priv_lane->link_freq_menu_items, 1967 ov8856->cur_mode->hts, 1968 ov8856->cur_mode->link_freq_index, 1969 ov8856->cur_mode->data_lanes) - 1970 ov8856->cur_mode->width; 1971 ov8856->hblank = v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops, 1972 V4L2_CID_HBLANK, h_blank, h_blank, 1, 1973 h_blank); 1974 if (ov8856->hblank) 1975 ov8856->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY; 1976 1977 v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops, V4L2_CID_ANALOGUE_GAIN, 1978 OV8856_ANAL_GAIN_MIN, OV8856_ANAL_GAIN_MAX, 1979 OV8856_ANAL_GAIN_STEP, OV8856_ANAL_GAIN_MIN); 1980 v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops, V4L2_CID_DIGITAL_GAIN, 1981 OV8856_DGTL_GAIN_MIN, OV8856_DGTL_GAIN_MAX, 1982 OV8856_DGTL_GAIN_STEP, OV8856_DGTL_GAIN_DEFAULT); 1983 exposure_max = ov8856->cur_mode->vts_def - OV8856_EXPOSURE_MAX_MARGIN; 1984 ov8856->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops, 1985 V4L2_CID_EXPOSURE, 1986 OV8856_EXPOSURE_MIN, exposure_max, 1987 OV8856_EXPOSURE_STEP, 1988 exposure_max); 1989 v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &ov8856_ctrl_ops, 1990 V4L2_CID_TEST_PATTERN, 1991 ARRAY_SIZE(ov8856_test_pattern_menu) - 1, 1992 0, 0, ov8856_test_pattern_menu); 1993 v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops, 1994 V4L2_CID_HFLIP, 0, 1, 1, 0); 1995 v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops, 1996 V4L2_CID_VFLIP, 0, 1, 1, 0); 1997 if (ctrl_hdlr->error) 1998 return ctrl_hdlr->error; 1999 2000 ov8856->sd.ctrl_handler = ctrl_hdlr; 2001 2002 return 0; 2003 } 2004 2005 static void ov8856_update_pad_format(struct ov8856 *ov8856, 2006 const struct ov8856_mode *mode, 2007 struct v4l2_mbus_framefmt *fmt) 2008 { 2009 int index; 2010 2011 fmt->width = mode->width; 2012 fmt->height = mode->height; 2013 for (index = 0; index < ARRAY_SIZE(ov8856_mbus_codes); ++index) 2014 if (ov8856_mbus_codes[index] == fmt->code) 2015 break; 2016 if (index == ARRAY_SIZE(ov8856_mbus_codes)) 2017 index = mode->default_mbus_index; 2018 fmt->code = ov8856_mbus_codes[index]; 2019 ov8856->cur_mbus_index = index; 2020 fmt->field = V4L2_FIELD_NONE; 2021 } 2022 2023 static int ov8856_start_streaming(struct ov8856 *ov8856) 2024 { 2025 struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd); 2026 const struct ov8856_reg_list *reg_list; 2027 int link_freq_index, ret; 2028 2029 ret = ov8856_identify_module(ov8856); 2030 if (ret) 2031 return ret; 2032 2033 link_freq_index = ov8856->cur_mode->link_freq_index; 2034 reg_list = &ov8856->priv_lane->link_freq_configs[link_freq_index].reg_list; 2035 2036 ret = ov8856_write_reg_list(ov8856, reg_list); 2037 if (ret) { 2038 dev_err(&client->dev, "failed to set plls"); 2039 return ret; 2040 } 2041 2042 reg_list = &ov8856->cur_mode->reg_list; 2043 ret = ov8856_write_reg_list(ov8856, reg_list); 2044 if (ret) { 2045 dev_err(&client->dev, "failed to set mode"); 2046 return ret; 2047 } 2048 2049 reg_list = &bayer_offset_configs[ov8856->cur_mbus_index]; 2050 ret = ov8856_write_reg_list(ov8856, reg_list); 2051 if (ret) { 2052 dev_err(&client->dev, "failed to set mbus format"); 2053 return ret; 2054 } 2055 2056 ret = __v4l2_ctrl_handler_setup(ov8856->sd.ctrl_handler); 2057 if (ret) 2058 return ret; 2059 2060 ret = ov8856_write_reg(ov8856, OV8856_REG_MODE_SELECT, 2061 OV8856_REG_VALUE_08BIT, OV8856_MODE_STREAMING); 2062 if (ret) { 2063 dev_err(&client->dev, "failed to set stream"); 2064 return ret; 2065 } 2066 2067 return 0; 2068 } 2069 2070 static void ov8856_stop_streaming(struct ov8856 *ov8856) 2071 { 2072 struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd); 2073 2074 if (ov8856_write_reg(ov8856, OV8856_REG_MODE_SELECT, 2075 OV8856_REG_VALUE_08BIT, OV8856_MODE_STANDBY)) 2076 dev_err(&client->dev, "failed to set stream"); 2077 } 2078 2079 static int ov8856_set_stream(struct v4l2_subdev *sd, int enable) 2080 { 2081 struct ov8856 *ov8856 = to_ov8856(sd); 2082 struct i2c_client *client = v4l2_get_subdevdata(sd); 2083 int ret = 0; 2084 2085 if (ov8856->streaming == enable) 2086 return 0; 2087 2088 mutex_lock(&ov8856->mutex); 2089 if (enable) { 2090 ret = pm_runtime_resume_and_get(&client->dev); 2091 if (ret < 0) { 2092 mutex_unlock(&ov8856->mutex); 2093 return ret; 2094 } 2095 2096 ret = ov8856_start_streaming(ov8856); 2097 if (ret) { 2098 enable = 0; 2099 ov8856_stop_streaming(ov8856); 2100 pm_runtime_put(&client->dev); 2101 } 2102 } else { 2103 ov8856_stop_streaming(ov8856); 2104 pm_runtime_put(&client->dev); 2105 } 2106 2107 ov8856->streaming = enable; 2108 mutex_unlock(&ov8856->mutex); 2109 2110 return ret; 2111 } 2112 2113 static int __ov8856_power_on(struct ov8856 *ov8856) 2114 { 2115 struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd); 2116 int ret; 2117 2118 if (is_acpi_node(dev_fwnode(&client->dev))) 2119 return 0; 2120 2121 ret = clk_prepare_enable(ov8856->xvclk); 2122 if (ret < 0) { 2123 dev_err(&client->dev, "failed to enable xvclk\n"); 2124 return ret; 2125 } 2126 2127 if (ov8856->reset_gpio) { 2128 gpiod_set_value_cansleep(ov8856->reset_gpio, 1); 2129 usleep_range(1000, 2000); 2130 } 2131 2132 ret = regulator_bulk_enable(ARRAY_SIZE(ov8856_supply_names), 2133 ov8856->supplies); 2134 if (ret < 0) { 2135 dev_err(&client->dev, "failed to enable regulators\n"); 2136 goto disable_clk; 2137 } 2138 2139 gpiod_set_value_cansleep(ov8856->reset_gpio, 0); 2140 usleep_range(1500, 1800); 2141 2142 return 0; 2143 2144 disable_clk: 2145 gpiod_set_value_cansleep(ov8856->reset_gpio, 1); 2146 clk_disable_unprepare(ov8856->xvclk); 2147 2148 return ret; 2149 } 2150 2151 static void __ov8856_power_off(struct ov8856 *ov8856) 2152 { 2153 struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd); 2154 2155 if (is_acpi_node(dev_fwnode(&client->dev))) 2156 return; 2157 2158 gpiod_set_value_cansleep(ov8856->reset_gpio, 1); 2159 regulator_bulk_disable(ARRAY_SIZE(ov8856_supply_names), 2160 ov8856->supplies); 2161 clk_disable_unprepare(ov8856->xvclk); 2162 } 2163 2164 static int __maybe_unused ov8856_suspend(struct device *dev) 2165 { 2166 struct v4l2_subdev *sd = dev_get_drvdata(dev); 2167 struct ov8856 *ov8856 = to_ov8856(sd); 2168 2169 mutex_lock(&ov8856->mutex); 2170 if (ov8856->streaming) 2171 ov8856_stop_streaming(ov8856); 2172 2173 __ov8856_power_off(ov8856); 2174 mutex_unlock(&ov8856->mutex); 2175 2176 return 0; 2177 } 2178 2179 static int __maybe_unused ov8856_resume(struct device *dev) 2180 { 2181 struct v4l2_subdev *sd = dev_get_drvdata(dev); 2182 struct ov8856 *ov8856 = to_ov8856(sd); 2183 int ret; 2184 2185 mutex_lock(&ov8856->mutex); 2186 2187 __ov8856_power_on(ov8856); 2188 if (ov8856->streaming) { 2189 ret = ov8856_start_streaming(ov8856); 2190 if (ret) { 2191 ov8856->streaming = false; 2192 ov8856_stop_streaming(ov8856); 2193 mutex_unlock(&ov8856->mutex); 2194 return ret; 2195 } 2196 } 2197 2198 mutex_unlock(&ov8856->mutex); 2199 2200 return 0; 2201 } 2202 2203 static int ov8856_set_format(struct v4l2_subdev *sd, 2204 struct v4l2_subdev_state *sd_state, 2205 struct v4l2_subdev_format *fmt) 2206 { 2207 struct ov8856 *ov8856 = to_ov8856(sd); 2208 const struct ov8856_mode *mode; 2209 s32 vblank_def, h_blank; 2210 2211 mode = v4l2_find_nearest_size(ov8856->priv_lane->supported_modes, 2212 ov8856->modes_size, 2213 width, height, fmt->format.width, 2214 fmt->format.height); 2215 2216 mutex_lock(&ov8856->mutex); 2217 ov8856_update_pad_format(ov8856, mode, &fmt->format); 2218 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) { 2219 *v4l2_subdev_get_try_format(sd, sd_state, fmt->pad) = fmt->format; 2220 } else { 2221 ov8856->cur_mode = mode; 2222 __v4l2_ctrl_s_ctrl(ov8856->link_freq, mode->link_freq_index); 2223 __v4l2_ctrl_s_ctrl_int64(ov8856->pixel_rate, 2224 to_rate(ov8856->priv_lane->link_freq_menu_items, 2225 mode->link_freq_index, 2226 ov8856->cur_mode->data_lanes)); 2227 2228 /* Update limits and set FPS to default */ 2229 vblank_def = mode->vts_def - mode->height; 2230 __v4l2_ctrl_modify_range(ov8856->vblank, 2231 mode->vts_min - mode->height, 2232 OV8856_VTS_MAX - mode->height, 1, 2233 vblank_def); 2234 __v4l2_ctrl_s_ctrl(ov8856->vblank, vblank_def); 2235 h_blank = to_pixels_per_line(ov8856->priv_lane->link_freq_menu_items, 2236 mode->hts, 2237 mode->link_freq_index, 2238 ov8856->cur_mode->data_lanes) 2239 - mode->width; 2240 __v4l2_ctrl_modify_range(ov8856->hblank, h_blank, h_blank, 1, 2241 h_blank); 2242 } 2243 2244 mutex_unlock(&ov8856->mutex); 2245 2246 return 0; 2247 } 2248 2249 static int ov8856_get_format(struct v4l2_subdev *sd, 2250 struct v4l2_subdev_state *sd_state, 2251 struct v4l2_subdev_format *fmt) 2252 { 2253 struct ov8856 *ov8856 = to_ov8856(sd); 2254 2255 mutex_lock(&ov8856->mutex); 2256 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) 2257 fmt->format = *v4l2_subdev_get_try_format(&ov8856->sd, 2258 sd_state, 2259 fmt->pad); 2260 else 2261 ov8856_update_pad_format(ov8856, ov8856->cur_mode, &fmt->format); 2262 2263 mutex_unlock(&ov8856->mutex); 2264 2265 return 0; 2266 } 2267 2268 static int ov8856_enum_mbus_code(struct v4l2_subdev *sd, 2269 struct v4l2_subdev_state *sd_state, 2270 struct v4l2_subdev_mbus_code_enum *code) 2271 { 2272 if (code->index >= ARRAY_SIZE(ov8856_mbus_codes)) 2273 return -EINVAL; 2274 2275 code->code = ov8856_mbus_codes[code->index]; 2276 2277 return 0; 2278 } 2279 2280 static int ov8856_enum_frame_size(struct v4l2_subdev *sd, 2281 struct v4l2_subdev_state *sd_state, 2282 struct v4l2_subdev_frame_size_enum *fse) 2283 { 2284 struct ov8856 *ov8856 = to_ov8856(sd); 2285 int index; 2286 2287 if (fse->index >= ov8856->modes_size) 2288 return -EINVAL; 2289 2290 for (index = 0; index < ARRAY_SIZE(ov8856_mbus_codes); ++index) 2291 if (fse->code == ov8856_mbus_codes[index]) 2292 break; 2293 if (index == ARRAY_SIZE(ov8856_mbus_codes)) 2294 return -EINVAL; 2295 2296 fse->min_width = ov8856->priv_lane->supported_modes[fse->index].width; 2297 fse->max_width = fse->min_width; 2298 fse->min_height = ov8856->priv_lane->supported_modes[fse->index].height; 2299 fse->max_height = fse->min_height; 2300 2301 return 0; 2302 } 2303 2304 static int ov8856_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh) 2305 { 2306 struct ov8856 *ov8856 = to_ov8856(sd); 2307 2308 mutex_lock(&ov8856->mutex); 2309 ov8856_update_pad_format(ov8856, &ov8856->priv_lane->supported_modes[0], 2310 v4l2_subdev_get_try_format(sd, fh->state, 0)); 2311 mutex_unlock(&ov8856->mutex); 2312 2313 return 0; 2314 } 2315 2316 static const struct v4l2_subdev_video_ops ov8856_video_ops = { 2317 .s_stream = ov8856_set_stream, 2318 }; 2319 2320 static const struct v4l2_subdev_pad_ops ov8856_pad_ops = { 2321 .set_fmt = ov8856_set_format, 2322 .get_fmt = ov8856_get_format, 2323 .enum_mbus_code = ov8856_enum_mbus_code, 2324 .enum_frame_size = ov8856_enum_frame_size, 2325 }; 2326 2327 static const struct v4l2_subdev_ops ov8856_subdev_ops = { 2328 .video = &ov8856_video_ops, 2329 .pad = &ov8856_pad_ops, 2330 }; 2331 2332 static const struct media_entity_operations ov8856_subdev_entity_ops = { 2333 .link_validate = v4l2_subdev_link_validate, 2334 }; 2335 2336 static const struct v4l2_subdev_internal_ops ov8856_internal_ops = { 2337 .open = ov8856_open, 2338 }; 2339 2340 2341 static int ov8856_get_hwcfg(struct ov8856 *ov8856, struct device *dev) 2342 { 2343 struct fwnode_handle *ep; 2344 struct fwnode_handle *fwnode = dev_fwnode(dev); 2345 struct v4l2_fwnode_endpoint bus_cfg = { 2346 .bus_type = V4L2_MBUS_CSI2_DPHY 2347 }; 2348 u32 xvclk_rate; 2349 int ret; 2350 unsigned int i, j; 2351 2352 if (!fwnode) 2353 return -ENXIO; 2354 2355 ret = fwnode_property_read_u32(fwnode, "clock-frequency", &xvclk_rate); 2356 if (ret) 2357 return ret; 2358 2359 if (!is_acpi_node(fwnode)) { 2360 ov8856->xvclk = devm_clk_get(dev, "xvclk"); 2361 if (IS_ERR(ov8856->xvclk)) { 2362 dev_err(dev, "could not get xvclk clock (%pe)\n", 2363 ov8856->xvclk); 2364 return PTR_ERR(ov8856->xvclk); 2365 } 2366 2367 clk_set_rate(ov8856->xvclk, xvclk_rate); 2368 xvclk_rate = clk_get_rate(ov8856->xvclk); 2369 2370 ov8856->reset_gpio = devm_gpiod_get_optional(dev, "reset", 2371 GPIOD_OUT_LOW); 2372 if (IS_ERR(ov8856->reset_gpio)) 2373 return PTR_ERR(ov8856->reset_gpio); 2374 2375 for (i = 0; i < ARRAY_SIZE(ov8856_supply_names); i++) 2376 ov8856->supplies[i].supply = ov8856_supply_names[i]; 2377 2378 ret = devm_regulator_bulk_get(dev, 2379 ARRAY_SIZE(ov8856_supply_names), 2380 ov8856->supplies); 2381 if (ret) 2382 return ret; 2383 } 2384 2385 if (xvclk_rate != OV8856_XVCLK_19_2) 2386 dev_warn(dev, "external clock rate %u is unsupported", 2387 xvclk_rate); 2388 2389 ep = fwnode_graph_get_next_endpoint(fwnode, NULL); 2390 if (!ep) 2391 return -ENXIO; 2392 2393 ret = v4l2_fwnode_endpoint_alloc_parse(ep, &bus_cfg); 2394 fwnode_handle_put(ep); 2395 if (ret) 2396 return ret; 2397 2398 /* Get number of data lanes */ 2399 if (bus_cfg.bus.mipi_csi2.num_data_lanes != 2 && 2400 bus_cfg.bus.mipi_csi2.num_data_lanes != 4) { 2401 dev_err(dev, "number of CSI2 data lanes %d is not supported", 2402 bus_cfg.bus.mipi_csi2.num_data_lanes); 2403 ret = -EINVAL; 2404 goto check_hwcfg_error; 2405 } 2406 2407 dev_dbg(dev, "Using %u data lanes\n", ov8856->cur_mode->data_lanes); 2408 2409 if (bus_cfg.bus.mipi_csi2.num_data_lanes == 2) 2410 ov8856->priv_lane = &lane_cfg_2; 2411 else 2412 ov8856->priv_lane = &lane_cfg_4; 2413 2414 ov8856->modes_size = ov8856_modes_num(ov8856); 2415 2416 if (!bus_cfg.nr_of_link_frequencies) { 2417 dev_err(dev, "no link frequencies defined"); 2418 ret = -EINVAL; 2419 goto check_hwcfg_error; 2420 } 2421 2422 for (i = 0; i < ARRAY_SIZE(ov8856->priv_lane->link_freq_menu_items); i++) { 2423 for (j = 0; j < bus_cfg.nr_of_link_frequencies; j++) { 2424 if (ov8856->priv_lane->link_freq_menu_items[i] == 2425 bus_cfg.link_frequencies[j]) 2426 break; 2427 } 2428 2429 if (j == bus_cfg.nr_of_link_frequencies) { 2430 dev_err(dev, "no link frequency %lld supported", 2431 ov8856->priv_lane->link_freq_menu_items[i]); 2432 ret = -EINVAL; 2433 goto check_hwcfg_error; 2434 } 2435 } 2436 2437 check_hwcfg_error: 2438 v4l2_fwnode_endpoint_free(&bus_cfg); 2439 2440 return ret; 2441 } 2442 2443 static int ov8856_remove(struct i2c_client *client) 2444 { 2445 struct v4l2_subdev *sd = i2c_get_clientdata(client); 2446 struct ov8856 *ov8856 = to_ov8856(sd); 2447 2448 v4l2_async_unregister_subdev(sd); 2449 media_entity_cleanup(&sd->entity); 2450 v4l2_ctrl_handler_free(sd->ctrl_handler); 2451 pm_runtime_disable(&client->dev); 2452 mutex_destroy(&ov8856->mutex); 2453 2454 __ov8856_power_off(ov8856); 2455 2456 return 0; 2457 } 2458 2459 static int ov8856_probe(struct i2c_client *client) 2460 { 2461 struct ov8856 *ov8856; 2462 int ret; 2463 bool full_power; 2464 2465 ov8856 = devm_kzalloc(&client->dev, sizeof(*ov8856), GFP_KERNEL); 2466 if (!ov8856) 2467 return -ENOMEM; 2468 2469 ret = ov8856_get_hwcfg(ov8856, &client->dev); 2470 if (ret) { 2471 dev_err(&client->dev, "failed to get HW configuration: %d", 2472 ret); 2473 return ret; 2474 } 2475 2476 v4l2_i2c_subdev_init(&ov8856->sd, client, &ov8856_subdev_ops); 2477 2478 full_power = acpi_dev_state_d0(&client->dev); 2479 if (full_power) { 2480 ret = __ov8856_power_on(ov8856); 2481 if (ret) { 2482 dev_err(&client->dev, "failed to power on\n"); 2483 return ret; 2484 } 2485 2486 ret = ov8856_identify_module(ov8856); 2487 if (ret) { 2488 dev_err(&client->dev, "failed to find sensor: %d", ret); 2489 goto probe_power_off; 2490 } 2491 } 2492 2493 mutex_init(&ov8856->mutex); 2494 ov8856->cur_mode = &ov8856->priv_lane->supported_modes[0]; 2495 ov8856->cur_mbus_index = ov8856->cur_mode->default_mbus_index; 2496 ret = ov8856_init_controls(ov8856); 2497 if (ret) { 2498 dev_err(&client->dev, "failed to init controls: %d", ret); 2499 goto probe_error_v4l2_ctrl_handler_free; 2500 } 2501 2502 ov8856->sd.internal_ops = &ov8856_internal_ops; 2503 ov8856->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; 2504 ov8856->sd.entity.ops = &ov8856_subdev_entity_ops; 2505 ov8856->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR; 2506 ov8856->pad.flags = MEDIA_PAD_FL_SOURCE; 2507 ret = media_entity_pads_init(&ov8856->sd.entity, 1, &ov8856->pad); 2508 if (ret) { 2509 dev_err(&client->dev, "failed to init entity pads: %d", ret); 2510 goto probe_error_v4l2_ctrl_handler_free; 2511 } 2512 2513 ret = v4l2_async_register_subdev_sensor(&ov8856->sd); 2514 if (ret < 0) { 2515 dev_err(&client->dev, "failed to register V4L2 subdev: %d", 2516 ret); 2517 goto probe_error_media_entity_cleanup; 2518 } 2519 2520 /* Set the device's state to active if it's in D0 state. */ 2521 if (full_power) 2522 pm_runtime_set_active(&client->dev); 2523 pm_runtime_enable(&client->dev); 2524 pm_runtime_idle(&client->dev); 2525 2526 return 0; 2527 2528 probe_error_media_entity_cleanup: 2529 media_entity_cleanup(&ov8856->sd.entity); 2530 2531 probe_error_v4l2_ctrl_handler_free: 2532 v4l2_ctrl_handler_free(ov8856->sd.ctrl_handler); 2533 mutex_destroy(&ov8856->mutex); 2534 2535 probe_power_off: 2536 __ov8856_power_off(ov8856); 2537 2538 return ret; 2539 } 2540 2541 static const struct dev_pm_ops ov8856_pm_ops = { 2542 SET_SYSTEM_SLEEP_PM_OPS(ov8856_suspend, ov8856_resume) 2543 }; 2544 2545 #ifdef CONFIG_ACPI 2546 static const struct acpi_device_id ov8856_acpi_ids[] = { 2547 {"OVTI8856"}, 2548 {} 2549 }; 2550 2551 MODULE_DEVICE_TABLE(acpi, ov8856_acpi_ids); 2552 #endif 2553 2554 static const struct of_device_id ov8856_of_match[] = { 2555 { .compatible = "ovti,ov8856" }, 2556 { /* sentinel */ } 2557 }; 2558 MODULE_DEVICE_TABLE(of, ov8856_of_match); 2559 2560 static struct i2c_driver ov8856_i2c_driver = { 2561 .driver = { 2562 .name = "ov8856", 2563 .pm = &ov8856_pm_ops, 2564 .acpi_match_table = ACPI_PTR(ov8856_acpi_ids), 2565 .of_match_table = ov8856_of_match, 2566 }, 2567 .probe_new = ov8856_probe, 2568 .remove = ov8856_remove, 2569 .flags = I2C_DRV_ACPI_WAIVE_D0_PROBE, 2570 }; 2571 2572 module_i2c_driver(ov8856_i2c_driver); 2573 2574 MODULE_AUTHOR("Ben Kao <ben.kao@intel.com>"); 2575 MODULE_DESCRIPTION("OmniVision OV8856 sensor driver"); 2576 MODULE_LICENSE("GPL v2"); 2577