xref: /openbmc/linux/drivers/media/i2c/ov8856.c (revision 90848a25)
1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2019 Intel Corporation.
3 
4 #include <asm/unaligned.h>
5 #include <linux/acpi.h>
6 #include <linux/clk.h>
7 #include <linux/delay.h>
8 #include <linux/gpio/consumer.h>
9 #include <linux/i2c.h>
10 #include <linux/module.h>
11 #include <linux/pm_runtime.h>
12 #include <linux/regulator/consumer.h>
13 #include <media/v4l2-ctrls.h>
14 #include <media/v4l2-device.h>
15 #include <media/v4l2-fwnode.h>
16 
17 #define OV8856_REG_VALUE_08BIT		1
18 #define OV8856_REG_VALUE_16BIT		2
19 #define OV8856_REG_VALUE_24BIT		3
20 
21 #define OV8856_SCLK			144000000ULL
22 #define OV8856_XVCLK_19_2		19200000
23 #define OV8856_DATA_LANES		4
24 #define OV8856_RGB_DEPTH		10
25 
26 #define OV8856_REG_CHIP_ID		0x300a
27 #define OV8856_CHIP_ID			0x00885a
28 
29 #define OV8856_REG_MODE_SELECT		0x0100
30 #define OV8856_MODE_STANDBY		0x00
31 #define OV8856_MODE_STREAMING		0x01
32 
33 /* module revisions */
34 #define OV8856_2A_MODULE		0x01
35 #define OV8856_1B_MODULE		0x02
36 
37 /* the OTP read-out buffer is at 0x7000 and 0xf is the offset
38  * of the byte in the OTP that means the module revision
39  */
40 #define OV8856_MODULE_REVISION		0x700f
41 #define OV8856_OTP_MODE_CTRL		0x3d84
42 #define OV8856_OTP_LOAD_CTRL		0x3d81
43 #define OV8856_OTP_MODE_AUTO		0x00
44 #define OV8856_OTP_LOAD_CTRL_ENABLE	BIT(0)
45 
46 /* vertical-timings from sensor */
47 #define OV8856_REG_VTS			0x380e
48 #define OV8856_VTS_MAX			0x7fff
49 
50 /* horizontal-timings from sensor */
51 #define OV8856_REG_HTS			0x380c
52 
53 /* Exposure controls from sensor */
54 #define OV8856_REG_EXPOSURE		0x3500
55 #define	OV8856_EXPOSURE_MIN		6
56 #define OV8856_EXPOSURE_MAX_MARGIN	6
57 #define	OV8856_EXPOSURE_STEP		1
58 
59 /* Analog gain controls from sensor */
60 #define OV8856_REG_ANALOG_GAIN		0x3508
61 #define	OV8856_ANAL_GAIN_MIN		128
62 #define	OV8856_ANAL_GAIN_MAX		2047
63 #define	OV8856_ANAL_GAIN_STEP		1
64 
65 /* Digital gain controls from sensor */
66 #define OV8856_REG_DIGITAL_GAIN		0x350a
67 #define OV8856_REG_MWB_R_GAIN		0x5019
68 #define OV8856_REG_MWB_G_GAIN		0x501b
69 #define OV8856_REG_MWB_B_GAIN		0x501d
70 #define OV8856_DGTL_GAIN_MIN		0
71 #define OV8856_DGTL_GAIN_MAX		4095
72 #define OV8856_DGTL_GAIN_STEP		1
73 #define OV8856_DGTL_GAIN_DEFAULT	1024
74 
75 /* Test Pattern Control */
76 #define OV8856_REG_TEST_PATTERN		0x5e00
77 #define OV8856_TEST_PATTERN_ENABLE	BIT(7)
78 #define OV8856_TEST_PATTERN_BAR_SHIFT	2
79 
80 #define NUM_REGS				7
81 #define NUM_MODE_REGS				187
82 #define NUM_MODE_REGS_2				200
83 
84 /* Flip Mirror Controls from sensor */
85 #define OV8856_REG_FORMAT1			0x3820
86 #define OV8856_REG_FORMAT2			0x3821
87 #define OV8856_REG_FORMAT1_OP_1			BIT(1)
88 #define OV8856_REG_FORMAT1_OP_2			BIT(2)
89 #define OV8856_REG_FORMAT1_OP_3			BIT(6)
90 #define OV8856_REG_FORMAT2_OP_1			BIT(1)
91 #define OV8856_REG_FORMAT2_OP_2			BIT(2)
92 #define OV8856_REG_FORMAT2_OP_3			BIT(6)
93 #define OV8856_REG_FLIP_OPT_1			0x376b
94 #define OV8856_REG_FLIP_OPT_2			0x5001
95 #define OV8856_REG_FLIP_OPT_3			0x502e
96 #define OV8856_REG_MIRROR_OPT_1			0x5004
97 #define OV8856_REG_FLIP_OP_0			BIT(0)
98 #define OV8856_REG_FLIP_OP_1			BIT(1)
99 #define OV8856_REG_FLIP_OP_2			BIT(2)
100 #define OV8856_REG_MIRROR_OP_1			BIT(1)
101 #define OV8856_REG_MIRROR_OP_2			BIT(2)
102 
103 #define to_ov8856(_sd)			container_of(_sd, struct ov8856, sd)
104 
105 static const char * const ov8856_supply_names[] = {
106 	"dovdd",	/* Digital I/O power */
107 	"avdd",		/* Analog power */
108 	"dvdd",		/* Digital core power */
109 };
110 
111 enum {
112 	OV8856_MEDIA_BUS_FMT_SBGGR10_1X10,
113 	OV8856_MEDIA_BUS_FMT_SGRBG10_1X10,
114 };
115 
116 struct ov8856_reg {
117 	u16 address;
118 	u8 val;
119 };
120 
121 struct ov8856_reg_list {
122 	u32 num_of_regs;
123 	const struct ov8856_reg *regs;
124 };
125 
126 struct ov8856_link_freq_config {
127 	const struct ov8856_reg_list reg_list;
128 };
129 
130 struct ov8856_mode {
131 	/* Frame width in pixels */
132 	u32 width;
133 
134 	/* Frame height in pixels */
135 	u32 height;
136 
137 	/* Horizontal timining size */
138 	u32 hts;
139 
140 	/* Default vertical timining size */
141 	u32 vts_def;
142 
143 	/* Min vertical timining size */
144 	u32 vts_min;
145 
146 	/* Link frequency needed for this resolution */
147 	u32 link_freq_index;
148 
149 	/* Sensor register settings for this resolution */
150 	const struct ov8856_reg_list reg_list;
151 
152 	/* Number of data lanes */
153 	u8 data_lanes;
154 
155 	/* Default MEDIA_BUS_FMT for this mode */
156 	u32 default_mbus_index;
157 };
158 
159 struct ov8856_mipi_data_rates {
160 	const struct ov8856_reg regs_0[NUM_REGS];
161 	const struct ov8856_reg regs_1[NUM_REGS];
162 };
163 
164 static const struct ov8856_mipi_data_rates mipi_data_rate_lane_2 = {
165 	//mipi_data_rate_1440mbps
166 	{
167 		{0x0103, 0x01},
168 		{0x0100, 0x00},
169 		{0x0302, 0x43},
170 		{0x0303, 0x00},
171 		{0x030b, 0x02},
172 		{0x030d, 0x4b},
173 		{0x031e, 0x0c}
174 	},
175 	//mipi_data_rate_720mbps
176 	{
177 		{0x0103, 0x01},
178 		{0x0100, 0x00},
179 		{0x0302, 0x4b},
180 		{0x0303, 0x01},
181 		{0x030b, 0x02},
182 		{0x030d, 0x4b},
183 		{0x031e, 0x0c}
184 	}
185 };
186 
187 static const struct ov8856_mipi_data_rates mipi_data_rate_lane_4 = {
188 	//mipi_data_rate_720mbps
189 	{
190 		{0x0103, 0x01},
191 		{0x0100, 0x00},
192 		{0x0302, 0x4b},
193 		{0x0303, 0x01},
194 		{0x030b, 0x02},
195 		{0x030d, 0x4b},
196 		{0x031e, 0x0c}
197 	},
198 	//mipi_data_rate_360mbps
199 	{
200 		{0x0103, 0x01},
201 		{0x0100, 0x00},
202 		{0x0302, 0x4b},
203 		{0x0303, 0x03},
204 		{0x030b, 0x02},
205 		{0x030d, 0x4b},
206 		{0x031e, 0x0c}
207 	}
208 };
209 
210 static const struct ov8856_reg lane_2_mode_3280x2464[] = {
211 	/* 3280x2464 resolution */
212 		{0x3000, 0x20},
213 		{0x3003, 0x08},
214 		{0x300e, 0x20},
215 		{0x3010, 0x00},
216 		{0x3015, 0x84},
217 		{0x3018, 0x32},
218 		{0x3021, 0x23},
219 		{0x3033, 0x24},
220 		{0x3500, 0x00},
221 		{0x3501, 0x9a},
222 		{0x3502, 0x20},
223 		{0x3503, 0x08},
224 		{0x3505, 0x83},
225 		{0x3508, 0x01},
226 		{0x3509, 0x80},
227 		{0x350c, 0x00},
228 		{0x350d, 0x80},
229 		{0x350e, 0x04},
230 		{0x350f, 0x00},
231 		{0x3510, 0x00},
232 		{0x3511, 0x02},
233 		{0x3512, 0x00},
234 		{0x3600, 0x72},
235 		{0x3601, 0x40},
236 		{0x3602, 0x30},
237 		{0x3610, 0xc5},
238 		{0x3611, 0x58},
239 		{0x3612, 0x5c},
240 		{0x3613, 0xca},
241 		{0x3614, 0x50},
242 		{0x3628, 0xff},
243 		{0x3629, 0xff},
244 		{0x362a, 0xff},
245 		{0x3633, 0x10},
246 		{0x3634, 0x10},
247 		{0x3635, 0x10},
248 		{0x3636, 0x10},
249 		{0x3663, 0x08},
250 		{0x3669, 0x34},
251 		{0x366e, 0x10},
252 		{0x3706, 0x86},
253 		{0x370b, 0x7e},
254 		{0x3714, 0x23},
255 		{0x3730, 0x12},
256 		{0x3733, 0x10},
257 		{0x3764, 0x00},
258 		{0x3765, 0x00},
259 		{0x3769, 0x62},
260 		{0x376a, 0x2a},
261 		{0x376b, 0x30},
262 		{0x3780, 0x00},
263 		{0x3781, 0x24},
264 		{0x3782, 0x00},
265 		{0x3783, 0x23},
266 		{0x3798, 0x2f},
267 		{0x37a1, 0x60},
268 		{0x37a8, 0x6a},
269 		{0x37ab, 0x3f},
270 		{0x37c2, 0x04},
271 		{0x37c3, 0xf1},
272 		{0x37c9, 0x80},
273 		{0x37cb, 0x16},
274 		{0x37cc, 0x16},
275 		{0x37cd, 0x16},
276 		{0x37ce, 0x16},
277 		{0x3800, 0x00},
278 		{0x3801, 0x00},
279 		{0x3802, 0x00},
280 		{0x3803, 0x06},
281 		{0x3804, 0x0c},
282 		{0x3805, 0xdf},
283 		{0x3806, 0x09},
284 		{0x3807, 0xa7},
285 		{0x3808, 0x0c},
286 		{0x3809, 0xd0},
287 		{0x380a, 0x09},
288 		{0x380b, 0xa0},
289 		{0x380c, 0x07},
290 		{0x380d, 0x88},
291 		{0x380e, 0x09},
292 		{0x380f, 0xb8},
293 		{0x3810, 0x00},
294 		{0x3811, 0x00},
295 		{0x3812, 0x00},
296 		{0x3813, 0x01},
297 		{0x3814, 0x01},
298 		{0x3815, 0x01},
299 		{0x3816, 0x00},
300 		{0x3817, 0x00},
301 		{0x3818, 0x00},
302 		{0x3819, 0x00},
303 		{0x3820, 0x80},
304 		{0x3821, 0x46},
305 		{0x382a, 0x01},
306 		{0x382b, 0x01},
307 		{0x3830, 0x06},
308 		{0x3836, 0x02},
309 		{0x3837, 0x10},
310 		{0x3862, 0x04},
311 		{0x3863, 0x08},
312 		{0x3cc0, 0x33},
313 		{0x3d85, 0x14},
314 		{0x3d8c, 0x73},
315 		{0x3d8d, 0xde},
316 		{0x4001, 0xe0},
317 		{0x4003, 0x40},
318 		{0x4008, 0x00},
319 		{0x4009, 0x0b},
320 		{0x400a, 0x00},
321 		{0x400b, 0x84},
322 		{0x400f, 0x80},
323 		{0x4010, 0xf0},
324 		{0x4011, 0xff},
325 		{0x4012, 0x02},
326 		{0x4013, 0x01},
327 		{0x4014, 0x01},
328 		{0x4015, 0x01},
329 		{0x4042, 0x00},
330 		{0x4043, 0x80},
331 		{0x4044, 0x00},
332 		{0x4045, 0x80},
333 		{0x4046, 0x00},
334 		{0x4047, 0x80},
335 		{0x4048, 0x00},
336 		{0x4049, 0x80},
337 		{0x4041, 0x03},
338 		{0x404c, 0x20},
339 		{0x404d, 0x00},
340 		{0x404e, 0x20},
341 		{0x4203, 0x80},
342 		{0x4307, 0x30},
343 		{0x4317, 0x00},
344 		{0x4503, 0x08},
345 		{0x4601, 0x80},
346 		{0x4800, 0x44},
347 		{0x4816, 0x53},
348 		{0x481b, 0x58},
349 		{0x481f, 0x27},
350 		{0x4837, 0x0c},
351 		{0x483c, 0x0f},
352 		{0x484b, 0x05},
353 		{0x5000, 0x57},
354 		{0x5001, 0x0a},
355 		{0x5004, 0x06},
356 		{0x502e, 0x03},
357 		{0x5030, 0x41},
358 		{0x5795, 0x02},
359 		{0x5796, 0x20},
360 		{0x5797, 0x20},
361 		{0x5798, 0xd5},
362 		{0x5799, 0xd5},
363 		{0x579a, 0x00},
364 		{0x579b, 0x50},
365 		{0x579c, 0x00},
366 		{0x579d, 0x2c},
367 		{0x579e, 0x0c},
368 		{0x579f, 0x40},
369 		{0x57a0, 0x09},
370 		{0x57a1, 0x40},
371 		{0x5780, 0x14},
372 		{0x5781, 0x0f},
373 		{0x5782, 0x44},
374 		{0x5783, 0x02},
375 		{0x5784, 0x01},
376 		{0x5785, 0x01},
377 		{0x5786, 0x00},
378 		{0x5787, 0x04},
379 		{0x5788, 0x02},
380 		{0x5789, 0x0f},
381 		{0x578a, 0xfd},
382 		{0x578b, 0xf5},
383 		{0x578c, 0xf5},
384 		{0x578d, 0x03},
385 		{0x578e, 0x08},
386 		{0x578f, 0x0c},
387 		{0x5790, 0x08},
388 		{0x5791, 0x04},
389 		{0x5792, 0x00},
390 		{0x5793, 0x52},
391 		{0x5794, 0xa3},
392 		{0x59f8, 0x3d},
393 		{0x5a08, 0x02},
394 		{0x5b00, 0x02},
395 		{0x5b01, 0x10},
396 		{0x5b02, 0x03},
397 		{0x5b03, 0xcf},
398 		{0x5b05, 0x6c},
399 		{0x5e00, 0x00}
400 };
401 
402 static const struct ov8856_reg lane_2_mode_1640x1232[] = {
403 	/* 1640x1232 resolution */
404 		{0x3000, 0x20},
405 		{0x3003, 0x08},
406 		{0x300e, 0x20},
407 		{0x3010, 0x00},
408 		{0x3015, 0x84},
409 		{0x3018, 0x32},
410 		{0x3021, 0x23},
411 		{0x3033, 0x24},
412 		{0x3500, 0x00},
413 		{0x3501, 0x4c},
414 		{0x3502, 0xe0},
415 		{0x3503, 0x08},
416 		{0x3505, 0x83},
417 		{0x3508, 0x01},
418 		{0x3509, 0x80},
419 		{0x350c, 0x00},
420 		{0x350d, 0x80},
421 		{0x350e, 0x04},
422 		{0x350f, 0x00},
423 		{0x3510, 0x00},
424 		{0x3511, 0x02},
425 		{0x3512, 0x00},
426 		{0x3600, 0x72},
427 		{0x3601, 0x40},
428 		{0x3602, 0x30},
429 		{0x3610, 0xc5},
430 		{0x3611, 0x58},
431 		{0x3612, 0x5c},
432 		{0x3613, 0xca},
433 		{0x3614, 0x50},
434 		{0x3628, 0xff},
435 		{0x3629, 0xff},
436 		{0x362a, 0xff},
437 		{0x3633, 0x10},
438 		{0x3634, 0x10},
439 		{0x3635, 0x10},
440 		{0x3636, 0x10},
441 		{0x3663, 0x08},
442 		{0x3669, 0x34},
443 		{0x366e, 0x08},
444 		{0x3706, 0x86},
445 		{0x370b, 0x7e},
446 		{0x3714, 0x27},
447 		{0x3730, 0x12},
448 		{0x3733, 0x10},
449 		{0x3764, 0x00},
450 		{0x3765, 0x00},
451 		{0x3769, 0x62},
452 		{0x376a, 0x2a},
453 		{0x376b, 0x30},
454 		{0x3780, 0x00},
455 		{0x3781, 0x24},
456 		{0x3782, 0x00},
457 		{0x3783, 0x23},
458 		{0x3798, 0x2f},
459 		{0x37a1, 0x60},
460 		{0x37a8, 0x6a},
461 		{0x37ab, 0x3f},
462 		{0x37c2, 0x14},
463 		{0x37c3, 0xf1},
464 		{0x37c9, 0x80},
465 		{0x37cb, 0x16},
466 		{0x37cc, 0x16},
467 		{0x37cd, 0x16},
468 		{0x37ce, 0x16},
469 		{0x3800, 0x00},
470 		{0x3801, 0x00},
471 		{0x3802, 0x00},
472 		{0x3803, 0x00},
473 		{0x3804, 0x0c},
474 		{0x3805, 0xdf},
475 		{0x3806, 0x09},
476 		{0x3807, 0xaf},
477 		{0x3808, 0x06},
478 		{0x3809, 0x68},
479 		{0x380a, 0x04},
480 		{0x380b, 0xd0},
481 		{0x380c, 0x0c},
482 		{0x380d, 0x60},
483 		{0x380e, 0x05},
484 		{0x380f, 0xea},
485 		{0x3810, 0x00},
486 		{0x3811, 0x04},
487 		{0x3812, 0x00},
488 		{0x3813, 0x05},
489 		{0x3814, 0x03},
490 		{0x3815, 0x01},
491 		{0x3816, 0x00},
492 		{0x3817, 0x00},
493 		{0x3818, 0x00},
494 		{0x3819, 0x00},
495 		{0x3820, 0x90},
496 		{0x3821, 0x67},
497 		{0x382a, 0x03},
498 		{0x382b, 0x01},
499 		{0x3830, 0x06},
500 		{0x3836, 0x02},
501 		{0x3837, 0x10},
502 		{0x3862, 0x04},
503 		{0x3863, 0x08},
504 		{0x3cc0, 0x33},
505 		{0x3d85, 0x14},
506 		{0x3d8c, 0x73},
507 		{0x3d8d, 0xde},
508 		{0x4001, 0xe0},
509 		{0x4003, 0x40},
510 		{0x4008, 0x00},
511 		{0x4009, 0x05},
512 		{0x400a, 0x00},
513 		{0x400b, 0x84},
514 		{0x400f, 0x80},
515 		{0x4010, 0xf0},
516 		{0x4011, 0xff},
517 		{0x4012, 0x02},
518 		{0x4013, 0x01},
519 		{0x4014, 0x01},
520 		{0x4015, 0x01},
521 		{0x4042, 0x00},
522 		{0x4043, 0x80},
523 		{0x4044, 0x00},
524 		{0x4045, 0x80},
525 		{0x4046, 0x00},
526 		{0x4047, 0x80},
527 		{0x4048, 0x00},
528 		{0x4049, 0x80},
529 		{0x4041, 0x03},
530 		{0x404c, 0x20},
531 		{0x404d, 0x00},
532 		{0x404e, 0x20},
533 		{0x4203, 0x80},
534 		{0x4307, 0x30},
535 		{0x4317, 0x00},
536 		{0x4503, 0x08},
537 		{0x4601, 0x80},
538 		{0x4800, 0x44},
539 		{0x4816, 0x53},
540 		{0x481b, 0x58},
541 		{0x481f, 0x27},
542 		{0x4837, 0x16},
543 		{0x483c, 0x0f},
544 		{0x484b, 0x05},
545 		{0x5000, 0x57},
546 		{0x5001, 0x0a},
547 		{0x5004, 0x06},
548 		{0x502e, 0x03},
549 		{0x5030, 0x41},
550 		{0x5795, 0x00},
551 		{0x5796, 0x10},
552 		{0x5797, 0x10},
553 		{0x5798, 0x73},
554 		{0x5799, 0x73},
555 		{0x579a, 0x00},
556 		{0x579b, 0x28},
557 		{0x579c, 0x00},
558 		{0x579d, 0x16},
559 		{0x579e, 0x06},
560 		{0x579f, 0x20},
561 		{0x57a0, 0x04},
562 		{0x57a1, 0xa0},
563 		{0x5780, 0x14},
564 		{0x5781, 0x0f},
565 		{0x5782, 0x44},
566 		{0x5783, 0x02},
567 		{0x5784, 0x01},
568 		{0x5785, 0x01},
569 		{0x5786, 0x00},
570 		{0x5787, 0x04},
571 		{0x5788, 0x02},
572 		{0x5789, 0x0f},
573 		{0x578a, 0xfd},
574 		{0x578b, 0xf5},
575 		{0x578c, 0xf5},
576 		{0x578d, 0x03},
577 		{0x578e, 0x08},
578 		{0x578f, 0x0c},
579 		{0x5790, 0x08},
580 		{0x5791, 0x04},
581 		{0x5792, 0x00},
582 		{0x5793, 0x52},
583 		{0x5794, 0xa3},
584 		{0x59f8, 0x3d},
585 		{0x5a08, 0x02},
586 		{0x5b00, 0x02},
587 		{0x5b01, 0x10},
588 		{0x5b02, 0x03},
589 		{0x5b03, 0xcf},
590 		{0x5b05, 0x6c},
591 		{0x5e00, 0x00}
592 };
593 
594 static const struct ov8856_reg lane_4_mode_3280x2464[] = {
595 	/* 3280x2464 resolution */
596 		{0x3000, 0x20},
597 		{0x3003, 0x08},
598 		{0x300e, 0x20},
599 		{0x3010, 0x00},
600 		{0x3015, 0x84},
601 		{0x3018, 0x72},
602 		{0x3021, 0x23},
603 		{0x3033, 0x24},
604 		{0x3500, 0x00},
605 		{0x3501, 0x9a},
606 		{0x3502, 0x20},
607 		{0x3503, 0x08},
608 		{0x3505, 0x83},
609 		{0x3508, 0x01},
610 		{0x3509, 0x80},
611 		{0x350c, 0x00},
612 		{0x350d, 0x80},
613 		{0x350e, 0x04},
614 		{0x350f, 0x00},
615 		{0x3510, 0x00},
616 		{0x3511, 0x02},
617 		{0x3512, 0x00},
618 		{0x3600, 0x72},
619 		{0x3601, 0x40},
620 		{0x3602, 0x30},
621 		{0x3610, 0xc5},
622 		{0x3611, 0x58},
623 		{0x3612, 0x5c},
624 		{0x3613, 0xca},
625 		{0x3614, 0x20},
626 		{0x3628, 0xff},
627 		{0x3629, 0xff},
628 		{0x362a, 0xff},
629 		{0x3633, 0x10},
630 		{0x3634, 0x10},
631 		{0x3635, 0x10},
632 		{0x3636, 0x10},
633 		{0x3663, 0x08},
634 		{0x3669, 0x34},
635 		{0x366e, 0x10},
636 		{0x3706, 0x86},
637 		{0x370b, 0x7e},
638 		{0x3714, 0x23},
639 		{0x3730, 0x12},
640 		{0x3733, 0x10},
641 		{0x3764, 0x00},
642 		{0x3765, 0x00},
643 		{0x3769, 0x62},
644 		{0x376a, 0x2a},
645 		{0x376b, 0x30},
646 		{0x3780, 0x00},
647 		{0x3781, 0x24},
648 		{0x3782, 0x00},
649 		{0x3783, 0x23},
650 		{0x3798, 0x2f},
651 		{0x37a1, 0x60},
652 		{0x37a8, 0x6a},
653 		{0x37ab, 0x3f},
654 		{0x37c2, 0x04},
655 		{0x37c3, 0xf1},
656 		{0x37c9, 0x80},
657 		{0x37cb, 0x16},
658 		{0x37cc, 0x16},
659 		{0x37cd, 0x16},
660 		{0x37ce, 0x16},
661 		{0x3800, 0x00},
662 		{0x3801, 0x00},
663 		{0x3802, 0x00},
664 		{0x3803, 0x06},
665 		{0x3804, 0x0c},
666 		{0x3805, 0xdf},
667 		{0x3806, 0x09},
668 		{0x3807, 0xa7},
669 		{0x3808, 0x0c},
670 		{0x3809, 0xd0},
671 		{0x380a, 0x09},
672 		{0x380b, 0xa0},
673 		{0x380c, 0x07},
674 		{0x380d, 0x88},
675 		{0x380e, 0x09},
676 		{0x380f, 0xb8},
677 		{0x3810, 0x00},
678 		{0x3811, 0x00},
679 		{0x3812, 0x00},
680 		{0x3813, 0x01},
681 		{0x3814, 0x01},
682 		{0x3815, 0x01},
683 		{0x3816, 0x00},
684 		{0x3817, 0x00},
685 		{0x3818, 0x00},
686 		{0x3819, 0x10},
687 		{0x3820, 0x80},
688 		{0x3821, 0x46},
689 		{0x382a, 0x01},
690 		{0x382b, 0x01},
691 		{0x3830, 0x06},
692 		{0x3836, 0x02},
693 		{0x3862, 0x04},
694 		{0x3863, 0x08},
695 		{0x3cc0, 0x33},
696 		{0x3d85, 0x17},
697 		{0x3d8c, 0x73},
698 		{0x3d8d, 0xde},
699 		{0x4001, 0xe0},
700 		{0x4003, 0x40},
701 		{0x4008, 0x00},
702 		{0x4009, 0x0b},
703 		{0x400a, 0x00},
704 		{0x400b, 0x84},
705 		{0x400f, 0x80},
706 		{0x4010, 0xf0},
707 		{0x4011, 0xff},
708 		{0x4012, 0x02},
709 		{0x4013, 0x01},
710 		{0x4014, 0x01},
711 		{0x4015, 0x01},
712 		{0x4042, 0x00},
713 		{0x4043, 0x80},
714 		{0x4044, 0x00},
715 		{0x4045, 0x80},
716 		{0x4046, 0x00},
717 		{0x4047, 0x80},
718 		{0x4048, 0x00},
719 		{0x4049, 0x80},
720 		{0x4041, 0x03},
721 		{0x404c, 0x20},
722 		{0x404d, 0x00},
723 		{0x404e, 0x20},
724 		{0x4203, 0x80},
725 		{0x4307, 0x30},
726 		{0x4317, 0x00},
727 		{0x4503, 0x08},
728 		{0x4601, 0x80},
729 		{0x4800, 0x44},
730 		{0x4816, 0x53},
731 		{0x481b, 0x58},
732 		{0x481f, 0x27},
733 		{0x4837, 0x16},
734 		{0x483c, 0x0f},
735 		{0x484b, 0x05},
736 		{0x5000, 0x57},
737 		{0x5001, 0x0a},
738 		{0x5004, 0x06},
739 		{0x502e, 0x03},
740 		{0x5030, 0x41},
741 		{0x5780, 0x14},
742 		{0x5781, 0x0f},
743 		{0x5782, 0x44},
744 		{0x5783, 0x02},
745 		{0x5784, 0x01},
746 		{0x5785, 0x01},
747 		{0x5786, 0x00},
748 		{0x5787, 0x04},
749 		{0x5788, 0x02},
750 		{0x5789, 0x0f},
751 		{0x578a, 0xfd},
752 		{0x578b, 0xf5},
753 		{0x578c, 0xf5},
754 		{0x578d, 0x03},
755 		{0x578e, 0x08},
756 		{0x578f, 0x0c},
757 		{0x5790, 0x08},
758 		{0x5791, 0x04},
759 		{0x5792, 0x00},
760 		{0x5793, 0x52},
761 		{0x5794, 0xa3},
762 		{0x5795, 0x02},
763 		{0x5796, 0x20},
764 		{0x5797, 0x20},
765 		{0x5798, 0xd5},
766 		{0x5799, 0xd5},
767 		{0x579a, 0x00},
768 		{0x579b, 0x50},
769 		{0x579c, 0x00},
770 		{0x579d, 0x2c},
771 		{0x579e, 0x0c},
772 		{0x579f, 0x40},
773 		{0x57a0, 0x09},
774 		{0x57a1, 0x40},
775 		{0x59f8, 0x3d},
776 		{0x5a08, 0x02},
777 		{0x5b00, 0x02},
778 		{0x5b01, 0x10},
779 		{0x5b02, 0x03},
780 		{0x5b03, 0xcf},
781 		{0x5b05, 0x6c},
782 		{0x5e00, 0x00}
783 };
784 
785 static const struct ov8856_reg lane_4_mode_1640x1232[] = {
786 	/* 1640x1232 resolution */
787 		{0x3000, 0x20},
788 		{0x3003, 0x08},
789 		{0x300e, 0x20},
790 		{0x3010, 0x00},
791 		{0x3015, 0x84},
792 		{0x3018, 0x72},
793 		{0x3021, 0x23},
794 		{0x3033, 0x24},
795 		{0x3500, 0x00},
796 		{0x3501, 0x4c},
797 		{0x3502, 0xe0},
798 		{0x3503, 0x08},
799 		{0x3505, 0x83},
800 		{0x3508, 0x01},
801 		{0x3509, 0x80},
802 		{0x350c, 0x00},
803 		{0x350d, 0x80},
804 		{0x350e, 0x04},
805 		{0x350f, 0x00},
806 		{0x3510, 0x00},
807 		{0x3511, 0x02},
808 		{0x3512, 0x00},
809 		{0x3600, 0x72},
810 		{0x3601, 0x40},
811 		{0x3602, 0x30},
812 		{0x3610, 0xc5},
813 		{0x3611, 0x58},
814 		{0x3612, 0x5c},
815 		{0x3613, 0xca},
816 		{0x3614, 0x20},
817 		{0x3628, 0xff},
818 		{0x3629, 0xff},
819 		{0x362a, 0xff},
820 		{0x3633, 0x10},
821 		{0x3634, 0x10},
822 		{0x3635, 0x10},
823 		{0x3636, 0x10},
824 		{0x3663, 0x08},
825 		{0x3669, 0x34},
826 		{0x366e, 0x08},
827 		{0x3706, 0x86},
828 		{0x370b, 0x7e},
829 		{0x3714, 0x27},
830 		{0x3730, 0x12},
831 		{0x3733, 0x10},
832 		{0x3764, 0x00},
833 		{0x3765, 0x00},
834 		{0x3769, 0x62},
835 		{0x376a, 0x2a},
836 		{0x376b, 0x30},
837 		{0x3780, 0x00},
838 		{0x3781, 0x24},
839 		{0x3782, 0x00},
840 		{0x3783, 0x23},
841 		{0x3798, 0x2f},
842 		{0x37a1, 0x60},
843 		{0x37a8, 0x6a},
844 		{0x37ab, 0x3f},
845 		{0x37c2, 0x14},
846 		{0x37c3, 0xf1},
847 		{0x37c9, 0x80},
848 		{0x37cb, 0x16},
849 		{0x37cc, 0x16},
850 		{0x37cd, 0x16},
851 		{0x37ce, 0x16},
852 		{0x3800, 0x00},
853 		{0x3801, 0x00},
854 		{0x3802, 0x00},
855 		{0x3803, 0x00},
856 		{0x3804, 0x0c},
857 		{0x3805, 0xdf},
858 		{0x3806, 0x09},
859 		{0x3807, 0xaf},
860 		{0x3808, 0x06},
861 		{0x3809, 0x68},
862 		{0x380a, 0x04},
863 		{0x380b, 0xd0},
864 		{0x380c, 0x0e},
865 		{0x380d, 0xec},
866 		{0x380e, 0x04},
867 		{0x380f, 0xe8},
868 		{0x3810, 0x00},
869 		{0x3811, 0x04},
870 		{0x3812, 0x00},
871 		{0x3813, 0x05},
872 		{0x3814, 0x03},
873 		{0x3815, 0x01},
874 		{0x3816, 0x00},
875 		{0x3817, 0x00},
876 		{0x3818, 0x00},
877 		{0x3819, 0x10},
878 		{0x3820, 0x90},
879 		{0x3821, 0x67},
880 		{0x382a, 0x03},
881 		{0x382b, 0x01},
882 		{0x3830, 0x06},
883 		{0x3836, 0x02},
884 		{0x3862, 0x04},
885 		{0x3863, 0x08},
886 		{0x3cc0, 0x33},
887 		{0x3d85, 0x17},
888 		{0x3d8c, 0x73},
889 		{0x3d8d, 0xde},
890 		{0x4001, 0xe0},
891 		{0x4003, 0x40},
892 		{0x4008, 0x00},
893 		{0x4009, 0x05},
894 		{0x400a, 0x00},
895 		{0x400b, 0x84},
896 		{0x400f, 0x80},
897 		{0x4010, 0xf0},
898 		{0x4011, 0xff},
899 		{0x4012, 0x02},
900 		{0x4013, 0x01},
901 		{0x4014, 0x01},
902 		{0x4015, 0x01},
903 		{0x4042, 0x00},
904 		{0x4043, 0x80},
905 		{0x4044, 0x00},
906 		{0x4045, 0x80},
907 		{0x4046, 0x00},
908 		{0x4047, 0x80},
909 		{0x4048, 0x00},
910 		{0x4049, 0x80},
911 		{0x4041, 0x03},
912 		{0x404c, 0x20},
913 		{0x404d, 0x00},
914 		{0x404e, 0x20},
915 		{0x4203, 0x80},
916 		{0x4307, 0x30},
917 		{0x4317, 0x00},
918 		{0x4503, 0x08},
919 		{0x4601, 0x80},
920 		{0x4800, 0x44},
921 		{0x4816, 0x53},
922 		{0x481b, 0x58},
923 		{0x481f, 0x27},
924 		{0x4837, 0x16},
925 		{0x483c, 0x0f},
926 		{0x484b, 0x05},
927 		{0x5000, 0x57},
928 		{0x5001, 0x0a},
929 		{0x5004, 0x06},
930 		{0x502e, 0x03},
931 		{0x5030, 0x41},
932 		{0x5780, 0x14},
933 		{0x5781, 0x0f},
934 		{0x5782, 0x44},
935 		{0x5783, 0x02},
936 		{0x5784, 0x01},
937 		{0x5785, 0x01},
938 		{0x5786, 0x00},
939 		{0x5787, 0x04},
940 		{0x5788, 0x02},
941 		{0x5789, 0x0f},
942 		{0x578a, 0xfd},
943 		{0x578b, 0xf5},
944 		{0x578c, 0xf5},
945 		{0x578d, 0x03},
946 		{0x578e, 0x08},
947 		{0x578f, 0x0c},
948 		{0x5790, 0x08},
949 		{0x5791, 0x04},
950 		{0x5792, 0x00},
951 		{0x5793, 0x52},
952 		{0x5794, 0xa3},
953 		{0x5795, 0x00},
954 		{0x5796, 0x10},
955 		{0x5797, 0x10},
956 		{0x5798, 0x73},
957 		{0x5799, 0x73},
958 		{0x579a, 0x00},
959 		{0x579b, 0x28},
960 		{0x579c, 0x00},
961 		{0x579d, 0x16},
962 		{0x579e, 0x06},
963 		{0x579f, 0x20},
964 		{0x57a0, 0x04},
965 		{0x57a1, 0xa0},
966 		{0x59f8, 0x3d},
967 		{0x5a08, 0x02},
968 		{0x5b00, 0x02},
969 		{0x5b01, 0x10},
970 		{0x5b02, 0x03},
971 		{0x5b03, 0xcf},
972 		{0x5b05, 0x6c},
973 		{0x5e00, 0x00}
974 };
975 
976 static const struct ov8856_reg lane_4_mode_3264x2448[] = {
977 	/* 3264x2448 resolution */
978 		{0x0103, 0x01},
979 		{0x0302, 0x3c},
980 		{0x0303, 0x01},
981 		{0x031e, 0x0c},
982 		{0x3000, 0x20},
983 		{0x3003, 0x08},
984 		{0x300e, 0x20},
985 		{0x3010, 0x00},
986 		{0x3015, 0x84},
987 		{0x3018, 0x72},
988 		{0x3021, 0x23},
989 		{0x3033, 0x24},
990 		{0x3500, 0x00},
991 		{0x3501, 0x9a},
992 		{0x3502, 0x20},
993 		{0x3503, 0x08},
994 		{0x3505, 0x83},
995 		{0x3508, 0x01},
996 		{0x3509, 0x80},
997 		{0x350c, 0x00},
998 		{0x350d, 0x80},
999 		{0x350e, 0x04},
1000 		{0x350f, 0x00},
1001 		{0x3510, 0x00},
1002 		{0x3511, 0x02},
1003 		{0x3512, 0x00},
1004 		{0x3600, 0x72},
1005 		{0x3601, 0x40},
1006 		{0x3602, 0x30},
1007 		{0x3610, 0xc5},
1008 		{0x3611, 0x58},
1009 		{0x3612, 0x5c},
1010 		{0x3613, 0xca},
1011 		{0x3614, 0x60},
1012 		{0x3628, 0xff},
1013 		{0x3629, 0xff},
1014 		{0x362a, 0xff},
1015 		{0x3633, 0x10},
1016 		{0x3634, 0x10},
1017 		{0x3635, 0x10},
1018 		{0x3636, 0x10},
1019 		{0x3663, 0x08},
1020 		{0x3669, 0x34},
1021 		{0x366d, 0x00},
1022 		{0x366e, 0x10},
1023 		{0x3706, 0x86},
1024 		{0x370b, 0x7e},
1025 		{0x3714, 0x23},
1026 		{0x3730, 0x12},
1027 		{0x3733, 0x10},
1028 		{0x3764, 0x00},
1029 		{0x3765, 0x00},
1030 		{0x3769, 0x62},
1031 		{0x376a, 0x2a},
1032 		{0x376b, 0x30},
1033 		{0x3780, 0x00},
1034 		{0x3781, 0x24},
1035 		{0x3782, 0x00},
1036 		{0x3783, 0x23},
1037 		{0x3798, 0x2f},
1038 		{0x37a1, 0x60},
1039 		{0x37a8, 0x6a},
1040 		{0x37ab, 0x3f},
1041 		{0x37c2, 0x04},
1042 		{0x37c3, 0xf1},
1043 		{0x37c9, 0x80},
1044 		{0x37cb, 0x16},
1045 		{0x37cc, 0x16},
1046 		{0x37cd, 0x16},
1047 		{0x37ce, 0x16},
1048 		{0x3800, 0x00},
1049 		{0x3801, 0x00},
1050 		{0x3802, 0x00},
1051 		{0x3803, 0x0c},
1052 		{0x3804, 0x0c},
1053 		{0x3805, 0xdf},
1054 		{0x3806, 0x09},
1055 		{0x3807, 0xa3},
1056 		{0x3808, 0x0c},
1057 		{0x3809, 0xc0},
1058 		{0x380a, 0x09},
1059 		{0x380b, 0x90},
1060 		{0x380c, 0x07},
1061 		{0x380d, 0x8c},
1062 		{0x380e, 0x09},
1063 		{0x380f, 0xb2},
1064 		{0x3810, 0x00},
1065 		{0x3811, 0x04},
1066 		{0x3812, 0x00},
1067 		{0x3813, 0x02},
1068 		{0x3814, 0x01},
1069 		{0x3815, 0x01},
1070 		{0x3816, 0x00},
1071 		{0x3817, 0x00},
1072 		{0x3818, 0x00},
1073 		{0x3819, 0x10},
1074 		{0x3820, 0x80},
1075 		{0x3821, 0x46},
1076 		{0x382a, 0x01},
1077 		{0x382b, 0x01},
1078 		{0x3830, 0x06},
1079 		{0x3836, 0x02},
1080 		{0x3862, 0x04},
1081 		{0x3863, 0x08},
1082 		{0x3cc0, 0x33},
1083 		{0x3d85, 0x17},
1084 		{0x3d8c, 0x73},
1085 		{0x3d8d, 0xde},
1086 		{0x4001, 0xe0},
1087 		{0x4003, 0x40},
1088 		{0x4008, 0x00},
1089 		{0x4009, 0x0b},
1090 		{0x400a, 0x00},
1091 		{0x400b, 0x84},
1092 		{0x400f, 0x80},
1093 		{0x4010, 0xf0},
1094 		{0x4011, 0xff},
1095 		{0x4012, 0x02},
1096 		{0x4013, 0x01},
1097 		{0x4014, 0x01},
1098 		{0x4015, 0x01},
1099 		{0x4042, 0x00},
1100 		{0x4043, 0x80},
1101 		{0x4044, 0x00},
1102 		{0x4045, 0x80},
1103 		{0x4046, 0x00},
1104 		{0x4047, 0x80},
1105 		{0x4048, 0x00},
1106 		{0x4049, 0x80},
1107 		{0x4041, 0x03},
1108 		{0x404c, 0x20},
1109 		{0x404d, 0x00},
1110 		{0x404e, 0x20},
1111 		{0x4203, 0x80},
1112 		{0x4307, 0x30},
1113 		{0x4317, 0x00},
1114 		{0x4502, 0x50},
1115 		{0x4503, 0x08},
1116 		{0x4601, 0x80},
1117 		{0x4800, 0x44},
1118 		{0x4816, 0x53},
1119 		{0x481b, 0x50},
1120 		{0x481f, 0x27},
1121 		{0x4823, 0x3c},
1122 		{0x482b, 0x00},
1123 		{0x4831, 0x66},
1124 		{0x4837, 0x16},
1125 		{0x483c, 0x0f},
1126 		{0x484b, 0x05},
1127 		{0x5000, 0x77},
1128 		{0x5001, 0x0a},
1129 		{0x5003, 0xc8},
1130 		{0x5004, 0x04},
1131 		{0x5006, 0x00},
1132 		{0x5007, 0x00},
1133 		{0x502e, 0x03},
1134 		{0x5030, 0x41},
1135 		{0x5780, 0x14},
1136 		{0x5781, 0x0f},
1137 		{0x5782, 0x44},
1138 		{0x5783, 0x02},
1139 		{0x5784, 0x01},
1140 		{0x5785, 0x01},
1141 		{0x5786, 0x00},
1142 		{0x5787, 0x04},
1143 		{0x5788, 0x02},
1144 		{0x5789, 0x0f},
1145 		{0x578a, 0xfd},
1146 		{0x578b, 0xf5},
1147 		{0x578c, 0xf5},
1148 		{0x578d, 0x03},
1149 		{0x578e, 0x08},
1150 		{0x578f, 0x0c},
1151 		{0x5790, 0x08},
1152 		{0x5791, 0x04},
1153 		{0x5792, 0x00},
1154 		{0x5793, 0x52},
1155 		{0x5794, 0xa3},
1156 		{0x5795, 0x02},
1157 		{0x5796, 0x20},
1158 		{0x5797, 0x20},
1159 		{0x5798, 0xd5},
1160 		{0x5799, 0xd5},
1161 		{0x579a, 0x00},
1162 		{0x579b, 0x50},
1163 		{0x579c, 0x00},
1164 		{0x579d, 0x2c},
1165 		{0x579e, 0x0c},
1166 		{0x579f, 0x40},
1167 		{0x57a0, 0x09},
1168 		{0x57a1, 0x40},
1169 		{0x59f8, 0x3d},
1170 		{0x5a08, 0x02},
1171 		{0x5b00, 0x02},
1172 		{0x5b01, 0x10},
1173 		{0x5b02, 0x03},
1174 		{0x5b03, 0xcf},
1175 		{0x5b05, 0x6c},
1176 		{0x5e00, 0x00},
1177 		{0x5e10, 0xfc}
1178 };
1179 
1180 static const struct ov8856_reg lane_4_mode_1632x1224[] = {
1181 	/* 1632x1224 resolution */
1182 		{0x0103, 0x01},
1183 		{0x0302, 0x3c},
1184 		{0x0303, 0x01},
1185 		{0x031e, 0x0c},
1186 		{0x3000, 0x20},
1187 		{0x3003, 0x08},
1188 		{0x300e, 0x20},
1189 		{0x3010, 0x00},
1190 		{0x3015, 0x84},
1191 		{0x3018, 0x72},
1192 		{0x3021, 0x23},
1193 		{0x3033, 0x24},
1194 		{0x3500, 0x00},
1195 		{0x3501, 0x4c},
1196 		{0x3502, 0xe0},
1197 		{0x3503, 0x08},
1198 		{0x3505, 0x83},
1199 		{0x3508, 0x01},
1200 		{0x3509, 0x80},
1201 		{0x350c, 0x00},
1202 		{0x350d, 0x80},
1203 		{0x350e, 0x04},
1204 		{0x350f, 0x00},
1205 		{0x3510, 0x00},
1206 		{0x3511, 0x02},
1207 		{0x3512, 0x00},
1208 		{0x3600, 0x72},
1209 		{0x3601, 0x40},
1210 		{0x3602, 0x30},
1211 		{0x3610, 0xc5},
1212 		{0x3611, 0x58},
1213 		{0x3612, 0x5c},
1214 		{0x3613, 0xca},
1215 		{0x3614, 0x60},
1216 		{0x3628, 0xff},
1217 		{0x3629, 0xff},
1218 		{0x362a, 0xff},
1219 		{0x3633, 0x10},
1220 		{0x3634, 0x10},
1221 		{0x3635, 0x10},
1222 		{0x3636, 0x10},
1223 		{0x3663, 0x08},
1224 		{0x3669, 0x34},
1225 		{0x366d, 0x00},
1226 		{0x366e, 0x08},
1227 		{0x3706, 0x86},
1228 		{0x370b, 0x7e},
1229 		{0x3714, 0x27},
1230 		{0x3730, 0x12},
1231 		{0x3733, 0x10},
1232 		{0x3764, 0x00},
1233 		{0x3765, 0x00},
1234 		{0x3769, 0x62},
1235 		{0x376a, 0x2a},
1236 		{0x376b, 0x30},
1237 		{0x3780, 0x00},
1238 		{0x3781, 0x24},
1239 		{0x3782, 0x00},
1240 		{0x3783, 0x23},
1241 		{0x3798, 0x2f},
1242 		{0x37a1, 0x60},
1243 		{0x37a8, 0x6a},
1244 		{0x37ab, 0x3f},
1245 		{0x37c2, 0x14},
1246 		{0x37c3, 0xf1},
1247 		{0x37c9, 0x80},
1248 		{0x37cb, 0x16},
1249 		{0x37cc, 0x16},
1250 		{0x37cd, 0x16},
1251 		{0x37ce, 0x16},
1252 		{0x3800, 0x00},
1253 		{0x3801, 0x00},
1254 		{0x3802, 0x00},
1255 		{0x3803, 0x0c},
1256 		{0x3804, 0x0c},
1257 		{0x3805, 0xdf},
1258 		{0x3806, 0x09},
1259 		{0x3807, 0xa3},
1260 		{0x3808, 0x06},
1261 		{0x3809, 0x60},
1262 		{0x380a, 0x04},
1263 		{0x380b, 0xc8},
1264 		{0x380c, 0x07},
1265 		{0x380d, 0x8c},
1266 		{0x380e, 0x09},
1267 		{0x380f, 0xb2},
1268 		{0x3810, 0x00},
1269 		{0x3811, 0x02},
1270 		{0x3812, 0x00},
1271 		{0x3813, 0x02},
1272 		{0x3814, 0x03},
1273 		{0x3815, 0x01},
1274 		{0x3816, 0x00},
1275 		{0x3817, 0x00},
1276 		{0x3818, 0x00},
1277 		{0x3819, 0x10},
1278 		{0x3820, 0x80},
1279 		{0x3821, 0x47},
1280 		{0x382a, 0x03},
1281 		{0x382b, 0x01},
1282 		{0x3830, 0x06},
1283 		{0x3836, 0x02},
1284 		{0x3862, 0x04},
1285 		{0x3863, 0x08},
1286 		{0x3cc0, 0x33},
1287 		{0x3d85, 0x17},
1288 		{0x3d8c, 0x73},
1289 		{0x3d8d, 0xde},
1290 		{0x4001, 0xe0},
1291 		{0x4003, 0x40},
1292 		{0x4008, 0x00},
1293 		{0x4009, 0x05},
1294 		{0x400a, 0x00},
1295 		{0x400b, 0x84},
1296 		{0x400f, 0x80},
1297 		{0x4010, 0xf0},
1298 		{0x4011, 0xff},
1299 		{0x4012, 0x02},
1300 		{0x4013, 0x01},
1301 		{0x4014, 0x01},
1302 		{0x4015, 0x01},
1303 		{0x4042, 0x00},
1304 		{0x4043, 0x80},
1305 		{0x4044, 0x00},
1306 		{0x4045, 0x80},
1307 		{0x4046, 0x00},
1308 		{0x4047, 0x80},
1309 		{0x4048, 0x00},
1310 		{0x4049, 0x80},
1311 		{0x4041, 0x03},
1312 		{0x404c, 0x20},
1313 		{0x404d, 0x00},
1314 		{0x404e, 0x20},
1315 		{0x4203, 0x80},
1316 		{0x4307, 0x30},
1317 		{0x4317, 0x00},
1318 		{0x4502, 0x50},
1319 		{0x4503, 0x08},
1320 		{0x4601, 0x80},
1321 		{0x4800, 0x44},
1322 		{0x4816, 0x53},
1323 		{0x481b, 0x50},
1324 		{0x481f, 0x27},
1325 		{0x4823, 0x3c},
1326 		{0x482b, 0x00},
1327 		{0x4831, 0x66},
1328 		{0x4837, 0x16},
1329 		{0x483c, 0x0f},
1330 		{0x484b, 0x05},
1331 		{0x5000, 0x77},
1332 		{0x5001, 0x0a},
1333 		{0x5003, 0xc8},
1334 		{0x5004, 0x04},
1335 		{0x5006, 0x00},
1336 		{0x5007, 0x00},
1337 		{0x502e, 0x03},
1338 		{0x5030, 0x41},
1339 		{0x5795, 0x00},
1340 		{0x5796, 0x10},
1341 		{0x5797, 0x10},
1342 		{0x5798, 0x73},
1343 		{0x5799, 0x73},
1344 		{0x579a, 0x00},
1345 		{0x579b, 0x28},
1346 		{0x579c, 0x00},
1347 		{0x579d, 0x16},
1348 		{0x579e, 0x06},
1349 		{0x579f, 0x20},
1350 		{0x57a0, 0x04},
1351 		{0x57a1, 0xa0},
1352 		{0x5780, 0x14},
1353 		{0x5781, 0x0f},
1354 		{0x5782, 0x44},
1355 		{0x5783, 0x02},
1356 		{0x5784, 0x01},
1357 		{0x5785, 0x01},
1358 		{0x5786, 0x00},
1359 		{0x5787, 0x04},
1360 		{0x5788, 0x02},
1361 		{0x5789, 0x0f},
1362 		{0x578a, 0xfd},
1363 		{0x578b, 0xf5},
1364 		{0x578c, 0xf5},
1365 		{0x578d, 0x03},
1366 		{0x578e, 0x08},
1367 		{0x578f, 0x0c},
1368 		{0x5790, 0x08},
1369 		{0x5791, 0x04},
1370 		{0x5792, 0x00},
1371 		{0x5793, 0x52},
1372 		{0x5794, 0xa3},
1373 		{0x59f8, 0x3d},
1374 		{0x5a08, 0x02},
1375 		{0x5b00, 0x02},
1376 		{0x5b01, 0x10},
1377 		{0x5b02, 0x03},
1378 		{0x5b03, 0xcf},
1379 		{0x5b05, 0x6c},
1380 		{0x5e00, 0x00},
1381 		{0x5e10, 0xfc}
1382 };
1383 
1384 static const struct ov8856_reg mipi_data_mbus_sbggr10_1x10[] = {
1385 	{0x3813, 0x02},
1386 };
1387 
1388 static const struct ov8856_reg mipi_data_mbus_sgrbg10_1x10[] = {
1389 	{0x3813, 0x01},
1390 };
1391 
1392 static const u32 ov8856_mbus_codes[] = {
1393 	MEDIA_BUS_FMT_SBGGR10_1X10,
1394 	MEDIA_BUS_FMT_SGRBG10_1X10
1395 };
1396 
1397 static const char * const ov8856_test_pattern_menu[] = {
1398 	"Disabled",
1399 	"Standard Color Bar",
1400 	"Top-Bottom Darker Color Bar",
1401 	"Right-Left Darker Color Bar",
1402 	"Bottom-Top Darker Color Bar"
1403 };
1404 
1405 static const struct ov8856_reg_list bayer_offset_configs[] = {
1406 	[OV8856_MEDIA_BUS_FMT_SBGGR10_1X10] = {
1407 		.num_of_regs = ARRAY_SIZE(mipi_data_mbus_sbggr10_1x10),
1408 		.regs = mipi_data_mbus_sbggr10_1x10,
1409 	},
1410 	[OV8856_MEDIA_BUS_FMT_SGRBG10_1X10] = {
1411 		.num_of_regs = ARRAY_SIZE(mipi_data_mbus_sgrbg10_1x10),
1412 		.regs = mipi_data_mbus_sgrbg10_1x10,
1413 	}
1414 };
1415 
1416 struct ov8856 {
1417 	struct v4l2_subdev sd;
1418 	struct media_pad pad;
1419 	struct v4l2_ctrl_handler ctrl_handler;
1420 
1421 	struct clk		*xvclk;
1422 	struct gpio_desc	*reset_gpio;
1423 	struct regulator_bulk_data supplies[ARRAY_SIZE(ov8856_supply_names)];
1424 
1425 	/* V4L2 Controls */
1426 	struct v4l2_ctrl *link_freq;
1427 	struct v4l2_ctrl *pixel_rate;
1428 	struct v4l2_ctrl *vblank;
1429 	struct v4l2_ctrl *hblank;
1430 	struct v4l2_ctrl *exposure;
1431 
1432 	/* Current mode */
1433 	const struct ov8856_mode *cur_mode;
1434 
1435 	/* Application specified mbus format */
1436 	u32 cur_mbus_index;
1437 
1438 	/* To serialize asynchronus callbacks */
1439 	struct mutex mutex;
1440 
1441 	/* Streaming on/off */
1442 	bool streaming;
1443 
1444 	/* lanes index */
1445 	u8 nlanes;
1446 
1447 	const struct ov8856_lane_cfg *priv_lane;
1448 	u8 modes_size;
1449 
1450 	/* True if the device has been identified */
1451 	bool identified;
1452 };
1453 
1454 struct ov8856_lane_cfg {
1455 	const s64 link_freq_menu_items[2];
1456 	const struct ov8856_link_freq_config link_freq_configs[2];
1457 	const struct ov8856_mode supported_modes[4];
1458 };
1459 
1460 static const struct ov8856_lane_cfg lane_cfg_2 = {
1461 	{
1462 		720000000,
1463 		360000000,
1464 	},
1465 	{{
1466 		.reg_list = {
1467 			.num_of_regs =
1468 			ARRAY_SIZE(mipi_data_rate_lane_2.regs_0),
1469 			.regs = mipi_data_rate_lane_2.regs_0,
1470 		}
1471 	},
1472 	{
1473 		.reg_list = {
1474 			.num_of_regs =
1475 			ARRAY_SIZE(mipi_data_rate_lane_2.regs_1),
1476 			.regs = mipi_data_rate_lane_2.regs_1,
1477 		}
1478 	}},
1479 	{{
1480 		.width = 3280,
1481 		.height = 2464,
1482 		.hts = 1928,
1483 		.vts_def = 2488,
1484 		.vts_min = 2488,
1485 		.reg_list = {
1486 			.num_of_regs =
1487 			ARRAY_SIZE(lane_2_mode_3280x2464),
1488 			.regs = lane_2_mode_3280x2464,
1489 		},
1490 		.link_freq_index = 0,
1491 		.data_lanes = 2,
1492 		.default_mbus_index = OV8856_MEDIA_BUS_FMT_SGRBG10_1X10,
1493 	},
1494 	{
1495 		.width = 1640,
1496 		.height = 1232,
1497 		.hts = 3168,
1498 		.vts_def = 1514,
1499 		.vts_min = 1514,
1500 		.reg_list = {
1501 			.num_of_regs =
1502 			ARRAY_SIZE(lane_2_mode_1640x1232),
1503 			.regs = lane_2_mode_1640x1232,
1504 		},
1505 		.link_freq_index = 1,
1506 		.data_lanes = 2,
1507 		.default_mbus_index = OV8856_MEDIA_BUS_FMT_SGRBG10_1X10,
1508 	}}
1509 };
1510 
1511 static const struct ov8856_lane_cfg lane_cfg_4 = {
1512 		{
1513 			360000000,
1514 			180000000,
1515 		},
1516 		{{
1517 			.reg_list = {
1518 				.num_of_regs =
1519 				 ARRAY_SIZE(mipi_data_rate_lane_4.regs_0),
1520 				.regs = mipi_data_rate_lane_4.regs_0,
1521 			}
1522 		},
1523 		{
1524 			.reg_list = {
1525 				.num_of_regs =
1526 				 ARRAY_SIZE(mipi_data_rate_lane_4.regs_1),
1527 				.regs = mipi_data_rate_lane_4.regs_1,
1528 			}
1529 		}},
1530 		{{
1531 			.width = 3280,
1532 			.height = 2464,
1533 			.hts = 1928,
1534 			.vts_def = 2488,
1535 			.vts_min = 2488,
1536 			.reg_list = {
1537 				.num_of_regs =
1538 				 ARRAY_SIZE(lane_4_mode_3280x2464),
1539 				.regs = lane_4_mode_3280x2464,
1540 			},
1541 			.link_freq_index = 0,
1542 			.data_lanes = 4,
1543 			.default_mbus_index = OV8856_MEDIA_BUS_FMT_SGRBG10_1X10,
1544 		},
1545 		{
1546 			.width = 1640,
1547 			.height = 1232,
1548 			.hts = 3820,
1549 			.vts_def = 1256,
1550 			.vts_min = 1256,
1551 			.reg_list = {
1552 				.num_of_regs =
1553 				 ARRAY_SIZE(lane_4_mode_1640x1232),
1554 				.regs = lane_4_mode_1640x1232,
1555 			},
1556 			.link_freq_index = 1,
1557 			.data_lanes = 4,
1558 			.default_mbus_index = OV8856_MEDIA_BUS_FMT_SGRBG10_1X10,
1559 		},
1560 		{
1561 			.width = 3264,
1562 			.height = 2448,
1563 			.hts = 1932,
1564 			.vts_def = 2482,
1565 			.vts_min = 2482,
1566 			.reg_list = {
1567 				.num_of_regs =
1568 				 ARRAY_SIZE(lane_4_mode_3264x2448),
1569 				.regs = lane_4_mode_3264x2448,
1570 			},
1571 			.link_freq_index = 0,
1572 			.data_lanes = 4,
1573 			.default_mbus_index = OV8856_MEDIA_BUS_FMT_SBGGR10_1X10,
1574 		},
1575 		{
1576 			.width = 1632,
1577 			.height = 1224,
1578 			.hts = 1932,
1579 			.vts_def = 2482,
1580 			.vts_min = 2482,
1581 			.reg_list = {
1582 				.num_of_regs =
1583 				 ARRAY_SIZE(lane_4_mode_1632x1224),
1584 				.regs = lane_4_mode_1632x1224,
1585 			},
1586 			.link_freq_index = 1,
1587 			.data_lanes = 4,
1588 			.default_mbus_index = OV8856_MEDIA_BUS_FMT_SBGGR10_1X10,
1589 		}}
1590 };
1591 
1592 static unsigned int ov8856_modes_num(const struct ov8856 *ov8856)
1593 {
1594 	unsigned int i, count = 0;
1595 
1596 	for (i = 0; i < ARRAY_SIZE(ov8856->priv_lane->supported_modes); i++) {
1597 		if (ov8856->priv_lane->supported_modes[i].width == 0)
1598 			break;
1599 		count++;
1600 	}
1601 
1602 	return count;
1603 }
1604 
1605 static u64 to_rate(const s64 *link_freq_menu_items,
1606 		   u32 f_index, u8 nlanes)
1607 {
1608 	u64 pixel_rate = link_freq_menu_items[f_index] * 2 * nlanes;
1609 
1610 	do_div(pixel_rate, OV8856_RGB_DEPTH);
1611 
1612 	return pixel_rate;
1613 }
1614 
1615 static u64 to_pixels_per_line(const s64 *link_freq_menu_items, u32 hts,
1616 			      u32 f_index, u8 nlanes)
1617 {
1618 	u64 ppl = hts * to_rate(link_freq_menu_items, f_index, nlanes);
1619 
1620 	do_div(ppl, OV8856_SCLK);
1621 
1622 	return ppl;
1623 }
1624 
1625 static int ov8856_read_reg(struct ov8856 *ov8856, u16 reg, u16 len, u32 *val)
1626 {
1627 	struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd);
1628 	struct i2c_msg msgs[2];
1629 	u8 addr_buf[2];
1630 	u8 data_buf[4] = {0};
1631 	int ret;
1632 
1633 	if (len > 4)
1634 		return -EINVAL;
1635 
1636 	put_unaligned_be16(reg, addr_buf);
1637 	msgs[0].addr = client->addr;
1638 	msgs[0].flags = 0;
1639 	msgs[0].len = sizeof(addr_buf);
1640 	msgs[0].buf = addr_buf;
1641 	msgs[1].addr = client->addr;
1642 	msgs[1].flags = I2C_M_RD;
1643 	msgs[1].len = len;
1644 	msgs[1].buf = &data_buf[4 - len];
1645 
1646 	ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
1647 	if (ret != ARRAY_SIZE(msgs))
1648 		return -EIO;
1649 
1650 	*val = get_unaligned_be32(data_buf);
1651 
1652 	return 0;
1653 }
1654 
1655 static int ov8856_write_reg(struct ov8856 *ov8856, u16 reg, u16 len, u32 val)
1656 {
1657 	struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd);
1658 	u8 buf[6];
1659 
1660 	if (len > 4)
1661 		return -EINVAL;
1662 
1663 	put_unaligned_be16(reg, buf);
1664 	put_unaligned_be32(val << 8 * (4 - len), buf + 2);
1665 	if (i2c_master_send(client, buf, len + 2) != len + 2)
1666 		return -EIO;
1667 
1668 	return 0;
1669 }
1670 
1671 static int ov8856_write_reg_list(struct ov8856 *ov8856,
1672 				 const struct ov8856_reg_list *r_list)
1673 {
1674 	struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd);
1675 	unsigned int i;
1676 	int ret;
1677 
1678 	for (i = 0; i < r_list->num_of_regs; i++) {
1679 		ret = ov8856_write_reg(ov8856, r_list->regs[i].address, 1,
1680 				       r_list->regs[i].val);
1681 		if (ret) {
1682 			dev_err_ratelimited(&client->dev,
1683 				    "failed to write reg 0x%4.4x. error = %d",
1684 				    r_list->regs[i].address, ret);
1685 			return ret;
1686 		}
1687 	}
1688 
1689 	return 0;
1690 }
1691 
1692 static int ov8856_identify_module(struct ov8856 *ov8856)
1693 {
1694 	struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd);
1695 	int ret;
1696 	u32 val;
1697 
1698 	if (ov8856->identified)
1699 		return 0;
1700 
1701 	ret = ov8856_read_reg(ov8856, OV8856_REG_CHIP_ID,
1702 			      OV8856_REG_VALUE_24BIT, &val);
1703 	if (ret)
1704 		return ret;
1705 
1706 	if (val != OV8856_CHIP_ID) {
1707 		dev_err(&client->dev, "chip id mismatch: %x!=%x",
1708 			OV8856_CHIP_ID, val);
1709 		return -ENXIO;
1710 	}
1711 
1712 	ov8856->identified = true;
1713 
1714 	return 0;
1715 }
1716 
1717 static int ov8856_update_digital_gain(struct ov8856 *ov8856, u32 d_gain)
1718 {
1719 	return ov8856_write_reg(ov8856, OV8856_REG_DIGITAL_GAIN,
1720 				OV8856_REG_VALUE_16BIT, d_gain);
1721 }
1722 
1723 static int ov8856_test_pattern(struct ov8856 *ov8856, u32 pattern)
1724 {
1725 	if (pattern)
1726 		pattern = (pattern - 1) << OV8856_TEST_PATTERN_BAR_SHIFT |
1727 			  OV8856_TEST_PATTERN_ENABLE;
1728 
1729 	return ov8856_write_reg(ov8856, OV8856_REG_TEST_PATTERN,
1730 				OV8856_REG_VALUE_08BIT, pattern);
1731 }
1732 
1733 static int ov8856_set_ctrl_hflip(struct ov8856 *ov8856, u32 ctrl_val)
1734 {
1735 	int ret;
1736 	u32 val;
1737 
1738 	ret = ov8856_read_reg(ov8856, OV8856_REG_MIRROR_OPT_1,
1739 			      OV8856_REG_VALUE_08BIT, &val);
1740 	if (ret)
1741 		return ret;
1742 
1743 	ret = ov8856_write_reg(ov8856, OV8856_REG_MIRROR_OPT_1,
1744 			       OV8856_REG_VALUE_08BIT,
1745 			       ctrl_val ? val & ~OV8856_REG_MIRROR_OP_2 :
1746 			       val | OV8856_REG_MIRROR_OP_2);
1747 
1748 	if (ret)
1749 		return ret;
1750 
1751 	ret = ov8856_read_reg(ov8856, OV8856_REG_FORMAT2,
1752 			      OV8856_REG_VALUE_08BIT, &val);
1753 	if (ret)
1754 		return ret;
1755 
1756 	return ov8856_write_reg(ov8856, OV8856_REG_FORMAT2,
1757 				OV8856_REG_VALUE_08BIT,
1758 				ctrl_val ? val & ~OV8856_REG_FORMAT2_OP_1 &
1759 				~OV8856_REG_FORMAT2_OP_2 &
1760 				~OV8856_REG_FORMAT2_OP_3 :
1761 				val | OV8856_REG_FORMAT2_OP_1 |
1762 				OV8856_REG_FORMAT2_OP_2 |
1763 				OV8856_REG_FORMAT2_OP_3);
1764 }
1765 
1766 static int ov8856_set_ctrl_vflip(struct ov8856 *ov8856, u8 ctrl_val)
1767 {
1768 	int ret;
1769 	u32 val;
1770 
1771 	ret = ov8856_read_reg(ov8856, OV8856_REG_FLIP_OPT_1,
1772 			      OV8856_REG_VALUE_08BIT, &val);
1773 	if (ret)
1774 		return ret;
1775 
1776 	ret = ov8856_write_reg(ov8856, OV8856_REG_FLIP_OPT_1,
1777 			       OV8856_REG_VALUE_08BIT,
1778 			       ctrl_val ? val | OV8856_REG_FLIP_OP_1 |
1779 			       OV8856_REG_FLIP_OP_2 :
1780 			       val & ~OV8856_REG_FLIP_OP_1 &
1781 			       ~OV8856_REG_FLIP_OP_2);
1782 
1783 	ret = ov8856_read_reg(ov8856, OV8856_REG_FLIP_OPT_2,
1784 			      OV8856_REG_VALUE_08BIT, &val);
1785 	if (ret)
1786 		return ret;
1787 
1788 	ret = ov8856_write_reg(ov8856, OV8856_REG_FLIP_OPT_2,
1789 			       OV8856_REG_VALUE_08BIT,
1790 			       ctrl_val ? val | OV8856_REG_FLIP_OP_2 :
1791 			       val & ~OV8856_REG_FLIP_OP_2);
1792 
1793 	ret = ov8856_read_reg(ov8856, OV8856_REG_FLIP_OPT_3,
1794 			      OV8856_REG_VALUE_08BIT, &val);
1795 	if (ret)
1796 		return ret;
1797 
1798 	ret = ov8856_write_reg(ov8856, OV8856_REG_FLIP_OPT_3,
1799 			       OV8856_REG_VALUE_08BIT,
1800 			       ctrl_val ? val & ~OV8856_REG_FLIP_OP_0 &
1801 			       ~OV8856_REG_FLIP_OP_1 :
1802 			       val | OV8856_REG_FLIP_OP_0 |
1803 			       OV8856_REG_FLIP_OP_1);
1804 
1805 	ret = ov8856_read_reg(ov8856, OV8856_REG_FORMAT1,
1806 			      OV8856_REG_VALUE_08BIT, &val);
1807 	if (ret)
1808 		return ret;
1809 
1810 	return ov8856_write_reg(ov8856, OV8856_REG_FORMAT1,
1811 			       OV8856_REG_VALUE_08BIT,
1812 			       ctrl_val ? val | OV8856_REG_FORMAT1_OP_1 |
1813 			       OV8856_REG_FORMAT1_OP_3 |
1814 			       OV8856_REG_FORMAT1_OP_2 :
1815 			       val & ~OV8856_REG_FORMAT1_OP_1 &
1816 			       ~OV8856_REG_FORMAT1_OP_3 &
1817 			       ~OV8856_REG_FORMAT1_OP_2);
1818 }
1819 
1820 static int ov8856_set_ctrl(struct v4l2_ctrl *ctrl)
1821 {
1822 	struct ov8856 *ov8856 = container_of(ctrl->handler,
1823 					     struct ov8856, ctrl_handler);
1824 	struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd);
1825 	s64 exposure_max;
1826 	int ret = 0;
1827 
1828 	/* Propagate change of current control to all related controls */
1829 	if (ctrl->id == V4L2_CID_VBLANK) {
1830 		/* Update max exposure while meeting expected vblanking */
1831 		exposure_max = ov8856->cur_mode->height + ctrl->val -
1832 			       OV8856_EXPOSURE_MAX_MARGIN;
1833 		__v4l2_ctrl_modify_range(ov8856->exposure,
1834 					 ov8856->exposure->minimum,
1835 					 exposure_max, ov8856->exposure->step,
1836 					 exposure_max);
1837 	}
1838 
1839 	/* V4L2 controls values will be applied only when power is already up */
1840 	if (!pm_runtime_get_if_in_use(&client->dev))
1841 		return 0;
1842 
1843 	switch (ctrl->id) {
1844 	case V4L2_CID_ANALOGUE_GAIN:
1845 		ret = ov8856_write_reg(ov8856, OV8856_REG_ANALOG_GAIN,
1846 				       OV8856_REG_VALUE_16BIT, ctrl->val);
1847 		break;
1848 
1849 	case V4L2_CID_DIGITAL_GAIN:
1850 		ret = ov8856_update_digital_gain(ov8856, ctrl->val);
1851 		break;
1852 
1853 	case V4L2_CID_EXPOSURE:
1854 		/* 4 least significant bits of expsoure are fractional part */
1855 		ret = ov8856_write_reg(ov8856, OV8856_REG_EXPOSURE,
1856 				       OV8856_REG_VALUE_24BIT, ctrl->val << 4);
1857 		break;
1858 
1859 	case V4L2_CID_VBLANK:
1860 		ret = ov8856_write_reg(ov8856, OV8856_REG_VTS,
1861 				       OV8856_REG_VALUE_16BIT,
1862 				       ov8856->cur_mode->height + ctrl->val);
1863 		break;
1864 
1865 	case V4L2_CID_TEST_PATTERN:
1866 		ret = ov8856_test_pattern(ov8856, ctrl->val);
1867 		break;
1868 
1869 	case V4L2_CID_HFLIP:
1870 		ret = ov8856_set_ctrl_hflip(ov8856, ctrl->val);
1871 		break;
1872 
1873 	case V4L2_CID_VFLIP:
1874 		ret = ov8856_set_ctrl_vflip(ov8856, ctrl->val);
1875 		break;
1876 
1877 	default:
1878 		ret = -EINVAL;
1879 		break;
1880 	}
1881 
1882 	pm_runtime_put(&client->dev);
1883 
1884 	return ret;
1885 }
1886 
1887 static const struct v4l2_ctrl_ops ov8856_ctrl_ops = {
1888 	.s_ctrl = ov8856_set_ctrl,
1889 };
1890 
1891 static int ov8856_init_controls(struct ov8856 *ov8856)
1892 {
1893 	struct v4l2_ctrl_handler *ctrl_hdlr;
1894 	s64 exposure_max, h_blank;
1895 	int ret;
1896 
1897 	ctrl_hdlr = &ov8856->ctrl_handler;
1898 	ret = v4l2_ctrl_handler_init(ctrl_hdlr, 8);
1899 	if (ret)
1900 		return ret;
1901 
1902 	ctrl_hdlr->lock = &ov8856->mutex;
1903 	ov8856->link_freq = v4l2_ctrl_new_int_menu(ctrl_hdlr, &ov8856_ctrl_ops,
1904 					   V4L2_CID_LINK_FREQ,
1905 					   ARRAY_SIZE
1906 					   (ov8856->priv_lane->link_freq_menu_items)
1907 					   - 1,
1908 					   0, ov8856->priv_lane->link_freq_menu_items);
1909 	if (ov8856->link_freq)
1910 		ov8856->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1911 
1912 	ov8856->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops,
1913 				       V4L2_CID_PIXEL_RATE, 0,
1914 				       to_rate(ov8856->priv_lane->link_freq_menu_items,
1915 					       0,
1916 					       ov8856->cur_mode->data_lanes), 1,
1917 				       to_rate(ov8856->priv_lane->link_freq_menu_items,
1918 					       0,
1919 					       ov8856->cur_mode->data_lanes));
1920 	ov8856->vblank = v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops,
1921 			  V4L2_CID_VBLANK,
1922 			  ov8856->cur_mode->vts_min - ov8856->cur_mode->height,
1923 			  OV8856_VTS_MAX - ov8856->cur_mode->height, 1,
1924 			  ov8856->cur_mode->vts_def -
1925 			  ov8856->cur_mode->height);
1926 	h_blank = to_pixels_per_line(ov8856->priv_lane->link_freq_menu_items,
1927 				     ov8856->cur_mode->hts,
1928 				     ov8856->cur_mode->link_freq_index,
1929 				     ov8856->cur_mode->data_lanes) -
1930 				     ov8856->cur_mode->width;
1931 	ov8856->hblank = v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops,
1932 					   V4L2_CID_HBLANK, h_blank, h_blank, 1,
1933 					   h_blank);
1934 	if (ov8856->hblank)
1935 		ov8856->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1936 
1937 	v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops, V4L2_CID_ANALOGUE_GAIN,
1938 			  OV8856_ANAL_GAIN_MIN, OV8856_ANAL_GAIN_MAX,
1939 			  OV8856_ANAL_GAIN_STEP, OV8856_ANAL_GAIN_MIN);
1940 	v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops, V4L2_CID_DIGITAL_GAIN,
1941 			  OV8856_DGTL_GAIN_MIN, OV8856_DGTL_GAIN_MAX,
1942 			  OV8856_DGTL_GAIN_STEP, OV8856_DGTL_GAIN_DEFAULT);
1943 	exposure_max = ov8856->cur_mode->vts_def - OV8856_EXPOSURE_MAX_MARGIN;
1944 	ov8856->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops,
1945 					     V4L2_CID_EXPOSURE,
1946 					     OV8856_EXPOSURE_MIN, exposure_max,
1947 					     OV8856_EXPOSURE_STEP,
1948 					     exposure_max);
1949 	v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &ov8856_ctrl_ops,
1950 				     V4L2_CID_TEST_PATTERN,
1951 				     ARRAY_SIZE(ov8856_test_pattern_menu) - 1,
1952 				     0, 0, ov8856_test_pattern_menu);
1953 	v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops,
1954 			  V4L2_CID_HFLIP, 0, 1, 1, 0);
1955 	v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops,
1956 			  V4L2_CID_VFLIP, 0, 1, 1, 0);
1957 	if (ctrl_hdlr->error)
1958 		return ctrl_hdlr->error;
1959 
1960 	ov8856->sd.ctrl_handler = ctrl_hdlr;
1961 
1962 	return 0;
1963 }
1964 
1965 static void ov8856_update_pad_format(struct ov8856 *ov8856,
1966 				     const struct ov8856_mode *mode,
1967 				     struct v4l2_mbus_framefmt *fmt)
1968 {
1969 	int index;
1970 
1971 	fmt->width = mode->width;
1972 	fmt->height = mode->height;
1973 	for (index = 0; index < ARRAY_SIZE(ov8856_mbus_codes); ++index)
1974 		if (ov8856_mbus_codes[index] == fmt->code)
1975 			break;
1976 	if (index == ARRAY_SIZE(ov8856_mbus_codes))
1977 		index = mode->default_mbus_index;
1978 	fmt->code = ov8856_mbus_codes[index];
1979 	ov8856->cur_mbus_index = index;
1980 	fmt->field = V4L2_FIELD_NONE;
1981 }
1982 
1983 static int ov8856_start_streaming(struct ov8856 *ov8856)
1984 {
1985 	struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd);
1986 	const struct ov8856_reg_list *reg_list;
1987 	int link_freq_index, ret;
1988 
1989 	ret = ov8856_identify_module(ov8856);
1990 	if (ret)
1991 		return ret;
1992 
1993 	link_freq_index = ov8856->cur_mode->link_freq_index;
1994 	reg_list = &ov8856->priv_lane->link_freq_configs[link_freq_index].reg_list;
1995 
1996 	ret = ov8856_write_reg_list(ov8856, reg_list);
1997 	if (ret) {
1998 		dev_err(&client->dev, "failed to set plls");
1999 		return ret;
2000 	}
2001 
2002 	reg_list = &ov8856->cur_mode->reg_list;
2003 	ret = ov8856_write_reg_list(ov8856, reg_list);
2004 	if (ret) {
2005 		dev_err(&client->dev, "failed to set mode");
2006 		return ret;
2007 	}
2008 
2009 	reg_list = &bayer_offset_configs[ov8856->cur_mbus_index];
2010 	ret = ov8856_write_reg_list(ov8856, reg_list);
2011 	if (ret) {
2012 		dev_err(&client->dev, "failed to set mbus format");
2013 		return ret;
2014 	}
2015 
2016 	ret = __v4l2_ctrl_handler_setup(ov8856->sd.ctrl_handler);
2017 	if (ret)
2018 		return ret;
2019 
2020 	ret = ov8856_write_reg(ov8856, OV8856_REG_MODE_SELECT,
2021 			       OV8856_REG_VALUE_08BIT, OV8856_MODE_STREAMING);
2022 	if (ret) {
2023 		dev_err(&client->dev, "failed to set stream");
2024 		return ret;
2025 	}
2026 
2027 	return 0;
2028 }
2029 
2030 static void ov8856_stop_streaming(struct ov8856 *ov8856)
2031 {
2032 	struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd);
2033 
2034 	if (ov8856_write_reg(ov8856, OV8856_REG_MODE_SELECT,
2035 			     OV8856_REG_VALUE_08BIT, OV8856_MODE_STANDBY))
2036 		dev_err(&client->dev, "failed to set stream");
2037 }
2038 
2039 static int ov8856_set_stream(struct v4l2_subdev *sd, int enable)
2040 {
2041 	struct ov8856 *ov8856 = to_ov8856(sd);
2042 	struct i2c_client *client = v4l2_get_subdevdata(sd);
2043 	int ret = 0;
2044 
2045 	if (ov8856->streaming == enable)
2046 		return 0;
2047 
2048 	mutex_lock(&ov8856->mutex);
2049 	if (enable) {
2050 		ret = pm_runtime_resume_and_get(&client->dev);
2051 		if (ret < 0) {
2052 			mutex_unlock(&ov8856->mutex);
2053 			return ret;
2054 		}
2055 
2056 		ret = ov8856_start_streaming(ov8856);
2057 		if (ret) {
2058 			enable = 0;
2059 			ov8856_stop_streaming(ov8856);
2060 			pm_runtime_put(&client->dev);
2061 		}
2062 	} else {
2063 		ov8856_stop_streaming(ov8856);
2064 		pm_runtime_put(&client->dev);
2065 	}
2066 
2067 	ov8856->streaming = enable;
2068 	mutex_unlock(&ov8856->mutex);
2069 
2070 	return ret;
2071 }
2072 
2073 static int ov8856_power_on(struct device *dev)
2074 {
2075 	struct v4l2_subdev *sd = dev_get_drvdata(dev);
2076 	struct ov8856 *ov8856 = to_ov8856(sd);
2077 	int ret;
2078 
2079 	if (is_acpi_node(dev_fwnode(dev)))
2080 		return 0;
2081 
2082 	ret = clk_prepare_enable(ov8856->xvclk);
2083 	if (ret < 0) {
2084 		dev_err(dev, "failed to enable xvclk\n");
2085 		return ret;
2086 	}
2087 
2088 	if (ov8856->reset_gpio) {
2089 		gpiod_set_value_cansleep(ov8856->reset_gpio, 1);
2090 		usleep_range(1000, 2000);
2091 	}
2092 
2093 	ret = regulator_bulk_enable(ARRAY_SIZE(ov8856_supply_names),
2094 				    ov8856->supplies);
2095 	if (ret < 0) {
2096 		dev_err(dev, "failed to enable regulators\n");
2097 		goto disable_clk;
2098 	}
2099 
2100 	gpiod_set_value_cansleep(ov8856->reset_gpio, 0);
2101 	usleep_range(1500, 1800);
2102 
2103 	return 0;
2104 
2105 disable_clk:
2106 	gpiod_set_value_cansleep(ov8856->reset_gpio, 1);
2107 	clk_disable_unprepare(ov8856->xvclk);
2108 
2109 	return ret;
2110 }
2111 
2112 static int ov8856_power_off(struct device *dev)
2113 {
2114 	struct v4l2_subdev *sd = dev_get_drvdata(dev);
2115 	struct ov8856 *ov8856 = to_ov8856(sd);
2116 
2117 	if (is_acpi_node(dev_fwnode(dev)))
2118 		return 0;
2119 
2120 	gpiod_set_value_cansleep(ov8856->reset_gpio, 1);
2121 	regulator_bulk_disable(ARRAY_SIZE(ov8856_supply_names),
2122 			       ov8856->supplies);
2123 	clk_disable_unprepare(ov8856->xvclk);
2124 
2125 	return 0;
2126 }
2127 
2128 static int __maybe_unused ov8856_suspend(struct device *dev)
2129 {
2130 	struct v4l2_subdev *sd = dev_get_drvdata(dev);
2131 	struct ov8856 *ov8856 = to_ov8856(sd);
2132 
2133 	mutex_lock(&ov8856->mutex);
2134 	if (ov8856->streaming)
2135 		ov8856_stop_streaming(ov8856);
2136 
2137 	ov8856_power_off(dev);
2138 	mutex_unlock(&ov8856->mutex);
2139 
2140 	return 0;
2141 }
2142 
2143 static int __maybe_unused ov8856_resume(struct device *dev)
2144 {
2145 	struct v4l2_subdev *sd = dev_get_drvdata(dev);
2146 	struct ov8856 *ov8856 = to_ov8856(sd);
2147 	int ret;
2148 
2149 	mutex_lock(&ov8856->mutex);
2150 
2151 	ov8856_power_on(dev);
2152 	if (ov8856->streaming) {
2153 		ret = ov8856_start_streaming(ov8856);
2154 		if (ret) {
2155 			ov8856->streaming = false;
2156 			ov8856_stop_streaming(ov8856);
2157 			mutex_unlock(&ov8856->mutex);
2158 			return ret;
2159 		}
2160 	}
2161 
2162 	mutex_unlock(&ov8856->mutex);
2163 
2164 	return 0;
2165 }
2166 
2167 static int ov8856_set_format(struct v4l2_subdev *sd,
2168 			     struct v4l2_subdev_state *sd_state,
2169 			     struct v4l2_subdev_format *fmt)
2170 {
2171 	struct ov8856 *ov8856 = to_ov8856(sd);
2172 	const struct ov8856_mode *mode;
2173 	s32 vblank_def, h_blank;
2174 
2175 	mode = v4l2_find_nearest_size(ov8856->priv_lane->supported_modes,
2176 				      ov8856->modes_size,
2177 				      width, height, fmt->format.width,
2178 				      fmt->format.height);
2179 
2180 	mutex_lock(&ov8856->mutex);
2181 	ov8856_update_pad_format(ov8856, mode, &fmt->format);
2182 	if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
2183 		*v4l2_subdev_get_try_format(sd, sd_state, fmt->pad) = fmt->format;
2184 	} else {
2185 		ov8856->cur_mode = mode;
2186 		__v4l2_ctrl_s_ctrl(ov8856->link_freq, mode->link_freq_index);
2187 		__v4l2_ctrl_s_ctrl_int64(ov8856->pixel_rate,
2188 					 to_rate(ov8856->priv_lane->link_freq_menu_items,
2189 						 mode->link_freq_index,
2190 						 ov8856->cur_mode->data_lanes));
2191 
2192 		/* Update limits and set FPS to default */
2193 		vblank_def = mode->vts_def - mode->height;
2194 		__v4l2_ctrl_modify_range(ov8856->vblank,
2195 					 mode->vts_min - mode->height,
2196 					 OV8856_VTS_MAX - mode->height, 1,
2197 					 vblank_def);
2198 		__v4l2_ctrl_s_ctrl(ov8856->vblank, vblank_def);
2199 		h_blank = to_pixels_per_line(ov8856->priv_lane->link_freq_menu_items,
2200 					     mode->hts,
2201 					     mode->link_freq_index,
2202 					     ov8856->cur_mode->data_lanes)
2203 					     - mode->width;
2204 		__v4l2_ctrl_modify_range(ov8856->hblank, h_blank, h_blank, 1,
2205 					 h_blank);
2206 	}
2207 
2208 	mutex_unlock(&ov8856->mutex);
2209 
2210 	return 0;
2211 }
2212 
2213 static int ov8856_get_format(struct v4l2_subdev *sd,
2214 			     struct v4l2_subdev_state *sd_state,
2215 			     struct v4l2_subdev_format *fmt)
2216 {
2217 	struct ov8856 *ov8856 = to_ov8856(sd);
2218 
2219 	mutex_lock(&ov8856->mutex);
2220 	if (fmt->which == V4L2_SUBDEV_FORMAT_TRY)
2221 		fmt->format = *v4l2_subdev_get_try_format(&ov8856->sd,
2222 							  sd_state,
2223 							  fmt->pad);
2224 	else
2225 		ov8856_update_pad_format(ov8856, ov8856->cur_mode, &fmt->format);
2226 
2227 	mutex_unlock(&ov8856->mutex);
2228 
2229 	return 0;
2230 }
2231 
2232 static int ov8856_enum_mbus_code(struct v4l2_subdev *sd,
2233 				 struct v4l2_subdev_state *sd_state,
2234 				 struct v4l2_subdev_mbus_code_enum *code)
2235 {
2236 	if (code->index >= ARRAY_SIZE(ov8856_mbus_codes))
2237 		return -EINVAL;
2238 
2239 	code->code = ov8856_mbus_codes[code->index];
2240 
2241 	return 0;
2242 }
2243 
2244 static int ov8856_enum_frame_size(struct v4l2_subdev *sd,
2245 				  struct v4l2_subdev_state *sd_state,
2246 				  struct v4l2_subdev_frame_size_enum *fse)
2247 {
2248 	struct ov8856 *ov8856 = to_ov8856(sd);
2249 	int index;
2250 
2251 	if (fse->index >= ov8856->modes_size)
2252 		return -EINVAL;
2253 
2254 	for (index = 0; index < ARRAY_SIZE(ov8856_mbus_codes); ++index)
2255 		if (fse->code == ov8856_mbus_codes[index])
2256 			break;
2257 	if (index == ARRAY_SIZE(ov8856_mbus_codes))
2258 		return -EINVAL;
2259 
2260 	fse->min_width = ov8856->priv_lane->supported_modes[fse->index].width;
2261 	fse->max_width = fse->min_width;
2262 	fse->min_height = ov8856->priv_lane->supported_modes[fse->index].height;
2263 	fse->max_height = fse->min_height;
2264 
2265 	return 0;
2266 }
2267 
2268 static int ov8856_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
2269 {
2270 	struct ov8856 *ov8856 = to_ov8856(sd);
2271 
2272 	mutex_lock(&ov8856->mutex);
2273 	ov8856_update_pad_format(ov8856, &ov8856->priv_lane->supported_modes[0],
2274 				 v4l2_subdev_get_try_format(sd, fh->state, 0));
2275 	mutex_unlock(&ov8856->mutex);
2276 
2277 	return 0;
2278 }
2279 
2280 static const struct v4l2_subdev_video_ops ov8856_video_ops = {
2281 	.s_stream = ov8856_set_stream,
2282 };
2283 
2284 static const struct v4l2_subdev_pad_ops ov8856_pad_ops = {
2285 	.set_fmt = ov8856_set_format,
2286 	.get_fmt = ov8856_get_format,
2287 	.enum_mbus_code = ov8856_enum_mbus_code,
2288 	.enum_frame_size = ov8856_enum_frame_size,
2289 };
2290 
2291 static const struct v4l2_subdev_ops ov8856_subdev_ops = {
2292 	.video = &ov8856_video_ops,
2293 	.pad = &ov8856_pad_ops,
2294 };
2295 
2296 static const struct media_entity_operations ov8856_subdev_entity_ops = {
2297 	.link_validate = v4l2_subdev_link_validate,
2298 };
2299 
2300 static const struct v4l2_subdev_internal_ops ov8856_internal_ops = {
2301 	.open = ov8856_open,
2302 };
2303 
2304 
2305 static int ov8856_get_hwcfg(struct ov8856 *ov8856, struct device *dev)
2306 {
2307 	struct fwnode_handle *ep;
2308 	struct fwnode_handle *fwnode = dev_fwnode(dev);
2309 	struct v4l2_fwnode_endpoint bus_cfg = {
2310 		.bus_type = V4L2_MBUS_CSI2_DPHY
2311 	};
2312 	u32 xvclk_rate;
2313 	int ret;
2314 	unsigned int i, j;
2315 
2316 	if (!fwnode)
2317 		return -ENXIO;
2318 
2319 	ret = fwnode_property_read_u32(fwnode, "clock-frequency", &xvclk_rate);
2320 	if (ret)
2321 		return ret;
2322 
2323 	if (!is_acpi_node(fwnode)) {
2324 		ov8856->xvclk = devm_clk_get(dev, "xvclk");
2325 		if (IS_ERR(ov8856->xvclk)) {
2326 			dev_err(dev, "could not get xvclk clock (%pe)\n",
2327 				ov8856->xvclk);
2328 			return PTR_ERR(ov8856->xvclk);
2329 		}
2330 
2331 		clk_set_rate(ov8856->xvclk, xvclk_rate);
2332 		xvclk_rate = clk_get_rate(ov8856->xvclk);
2333 
2334 		ov8856->reset_gpio = devm_gpiod_get_optional(dev, "reset",
2335 							     GPIOD_OUT_LOW);
2336 		if (IS_ERR(ov8856->reset_gpio))
2337 			return PTR_ERR(ov8856->reset_gpio);
2338 
2339 		for (i = 0; i < ARRAY_SIZE(ov8856_supply_names); i++)
2340 			ov8856->supplies[i].supply = ov8856_supply_names[i];
2341 
2342 		ret = devm_regulator_bulk_get(dev,
2343 					      ARRAY_SIZE(ov8856_supply_names),
2344 					      ov8856->supplies);
2345 		if (ret)
2346 			return ret;
2347 	}
2348 
2349 	if (xvclk_rate != OV8856_XVCLK_19_2)
2350 		dev_warn(dev, "external clock rate %u is unsupported",
2351 			 xvclk_rate);
2352 
2353 	ep = fwnode_graph_get_next_endpoint(fwnode, NULL);
2354 	if (!ep)
2355 		return -ENXIO;
2356 
2357 	ret = v4l2_fwnode_endpoint_alloc_parse(ep, &bus_cfg);
2358 	fwnode_handle_put(ep);
2359 	if (ret)
2360 		return ret;
2361 
2362 	/* Get number of data lanes */
2363 	if (bus_cfg.bus.mipi_csi2.num_data_lanes != 2 &&
2364 	    bus_cfg.bus.mipi_csi2.num_data_lanes != 4) {
2365 		dev_err(dev, "number of CSI2 data lanes %d is not supported",
2366 			bus_cfg.bus.mipi_csi2.num_data_lanes);
2367 		ret = -EINVAL;
2368 		goto check_hwcfg_error;
2369 	}
2370 
2371 	dev_dbg(dev, "Using %u data lanes\n", ov8856->cur_mode->data_lanes);
2372 
2373 	if (bus_cfg.bus.mipi_csi2.num_data_lanes == 2)
2374 		ov8856->priv_lane = &lane_cfg_2;
2375 	else
2376 		ov8856->priv_lane = &lane_cfg_4;
2377 
2378 	ov8856->modes_size = ov8856_modes_num(ov8856);
2379 
2380 	if (!bus_cfg.nr_of_link_frequencies) {
2381 		dev_err(dev, "no link frequencies defined");
2382 		ret = -EINVAL;
2383 		goto check_hwcfg_error;
2384 	}
2385 
2386 	for (i = 0; i < ARRAY_SIZE(ov8856->priv_lane->link_freq_menu_items); i++) {
2387 		for (j = 0; j < bus_cfg.nr_of_link_frequencies; j++) {
2388 			if (ov8856->priv_lane->link_freq_menu_items[i] ==
2389 			    bus_cfg.link_frequencies[j])
2390 				break;
2391 		}
2392 
2393 		if (j == bus_cfg.nr_of_link_frequencies) {
2394 			dev_err(dev, "no link frequency %lld supported",
2395 				ov8856->priv_lane->link_freq_menu_items[i]);
2396 			ret = -EINVAL;
2397 			goto check_hwcfg_error;
2398 		}
2399 	}
2400 
2401 check_hwcfg_error:
2402 	v4l2_fwnode_endpoint_free(&bus_cfg);
2403 
2404 	return ret;
2405 }
2406 
2407 static void ov8856_remove(struct i2c_client *client)
2408 {
2409 	struct v4l2_subdev *sd = i2c_get_clientdata(client);
2410 	struct ov8856 *ov8856 = to_ov8856(sd);
2411 
2412 	v4l2_async_unregister_subdev(sd);
2413 	media_entity_cleanup(&sd->entity);
2414 	v4l2_ctrl_handler_free(sd->ctrl_handler);
2415 	pm_runtime_disable(&client->dev);
2416 	mutex_destroy(&ov8856->mutex);
2417 
2418 	ov8856_power_off(&client->dev);
2419 }
2420 
2421 static int ov8856_probe(struct i2c_client *client)
2422 {
2423 	struct ov8856 *ov8856;
2424 	int ret;
2425 	bool full_power;
2426 
2427 	ov8856 = devm_kzalloc(&client->dev, sizeof(*ov8856), GFP_KERNEL);
2428 	if (!ov8856)
2429 		return -ENOMEM;
2430 
2431 	ret = ov8856_get_hwcfg(ov8856, &client->dev);
2432 	if (ret) {
2433 		dev_err(&client->dev, "failed to get HW configuration: %d",
2434 			ret);
2435 		return ret;
2436 	}
2437 
2438 	v4l2_i2c_subdev_init(&ov8856->sd, client, &ov8856_subdev_ops);
2439 
2440 	full_power = acpi_dev_state_d0(&client->dev);
2441 	if (full_power) {
2442 		ret = ov8856_power_on(&client->dev);
2443 		if (ret) {
2444 			dev_err(&client->dev, "failed to power on\n");
2445 			return ret;
2446 		}
2447 
2448 		ret = ov8856_identify_module(ov8856);
2449 		if (ret) {
2450 			dev_err(&client->dev, "failed to find sensor: %d", ret);
2451 			goto probe_power_off;
2452 		}
2453 	}
2454 
2455 	mutex_init(&ov8856->mutex);
2456 	ov8856->cur_mode = &ov8856->priv_lane->supported_modes[0];
2457 	ov8856->cur_mbus_index = ov8856->cur_mode->default_mbus_index;
2458 	ret = ov8856_init_controls(ov8856);
2459 	if (ret) {
2460 		dev_err(&client->dev, "failed to init controls: %d", ret);
2461 		goto probe_error_v4l2_ctrl_handler_free;
2462 	}
2463 
2464 	ov8856->sd.internal_ops = &ov8856_internal_ops;
2465 	ov8856->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
2466 	ov8856->sd.entity.ops = &ov8856_subdev_entity_ops;
2467 	ov8856->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
2468 	ov8856->pad.flags = MEDIA_PAD_FL_SOURCE;
2469 	ret = media_entity_pads_init(&ov8856->sd.entity, 1, &ov8856->pad);
2470 	if (ret) {
2471 		dev_err(&client->dev, "failed to init entity pads: %d", ret);
2472 		goto probe_error_v4l2_ctrl_handler_free;
2473 	}
2474 
2475 	ret = v4l2_async_register_subdev_sensor(&ov8856->sd);
2476 	if (ret < 0) {
2477 		dev_err(&client->dev, "failed to register V4L2 subdev: %d",
2478 			ret);
2479 		goto probe_error_media_entity_cleanup;
2480 	}
2481 
2482 	/* Set the device's state to active if it's in D0 state. */
2483 	if (full_power)
2484 		pm_runtime_set_active(&client->dev);
2485 	pm_runtime_enable(&client->dev);
2486 	pm_runtime_idle(&client->dev);
2487 
2488 	return 0;
2489 
2490 probe_error_media_entity_cleanup:
2491 	media_entity_cleanup(&ov8856->sd.entity);
2492 
2493 probe_error_v4l2_ctrl_handler_free:
2494 	v4l2_ctrl_handler_free(ov8856->sd.ctrl_handler);
2495 	mutex_destroy(&ov8856->mutex);
2496 
2497 probe_power_off:
2498 	ov8856_power_off(&client->dev);
2499 
2500 	return ret;
2501 }
2502 
2503 static const struct dev_pm_ops ov8856_pm_ops = {
2504 	SET_SYSTEM_SLEEP_PM_OPS(ov8856_suspend, ov8856_resume)
2505 	SET_RUNTIME_PM_OPS(ov8856_power_off, ov8856_power_on, NULL)
2506 };
2507 
2508 #ifdef CONFIG_ACPI
2509 static const struct acpi_device_id ov8856_acpi_ids[] = {
2510 	{"OVTI8856"},
2511 	{}
2512 };
2513 
2514 MODULE_DEVICE_TABLE(acpi, ov8856_acpi_ids);
2515 #endif
2516 
2517 static const struct of_device_id ov8856_of_match[] = {
2518 	{ .compatible = "ovti,ov8856" },
2519 	{ /* sentinel */ }
2520 };
2521 MODULE_DEVICE_TABLE(of, ov8856_of_match);
2522 
2523 static struct i2c_driver ov8856_i2c_driver = {
2524 	.driver = {
2525 		.name = "ov8856",
2526 		.pm = &ov8856_pm_ops,
2527 		.acpi_match_table = ACPI_PTR(ov8856_acpi_ids),
2528 		.of_match_table = ov8856_of_match,
2529 	},
2530 	.probe_new = ov8856_probe,
2531 	.remove = ov8856_remove,
2532 	.flags = I2C_DRV_ACPI_WAIVE_D0_PROBE,
2533 };
2534 
2535 module_i2c_driver(ov8856_i2c_driver);
2536 
2537 MODULE_AUTHOR("Ben Kao <ben.kao@intel.com>");
2538 MODULE_DESCRIPTION("OmniVision OV8856 sensor driver");
2539 MODULE_LICENSE("GPL v2");
2540